Compal La-9832p r1.0 Schematics

A B C D E
COMPAL CONFIDENTIAL
MODEL NAME : VAW30
1 1
PCB NO : LA-9832P (DA8000XL000)

BOM P/N : 4319M931L01
GPIO MAP: X.X
Alpine 14"
Haswell ULT
2013-08-23(Gerber)
REV : 1.0
@ : Nopop Component
2 2
1@ : M/B SPI ROM

TAA@ : TAA/B SPI ROM
CONN@ : Connector Component
DIS@ : Discrete Pop Component
UMA@ : UMA Pop Component
EMI@ : EMI Component
ESD@ : ESD Component
3 3
RF@ : RF Component
XDP@ : XDP Component
eTP@ : TS eTP Component
NeTP@ : TS non - eTP Component
76_U3@ : USB 3.0 Redriver
: Short_Pad
4 Interleaved Memory 4
MB PCB
Part Number Description
DELL CONFIDENTIAL/PROPRIETARY
DAXXXXXXXXX PCB 0LD LA-9832P REV1 M/B DIS
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cover Sheet
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.5
LA-9832P
Date: Thursday, August 15, 2013 Sheet 1 of 64
A B C D E
A B C D E
Memory BUS DDRIII-DIMM X2

1.35V DDR3L 1333/1600 MHz BANK 0, 1, 2, 3
P18,19
eDP to LVDS
XDP Port LVDS eDP
LVDS CONN converter
P9 RTD2136R P20
P20
USB2.0 port 6
WiFi ON/OFF LCD Touch
1 1
on USB board P20
PCIe x4
DC/DC Interface USB2.0 port 5
DDR3 900Mhz 64bit nVidia port5 (L1~L4)
P40 Camera
VRAM * 4 =2G N14M-GE-S-A2 P20
LED P47,48 Through LVDS Cable
P41 P42~46
USB2.0 port 2 USB2.0
FFS LNG3DM
P25 P36
on USB board USB3.0
Docking DPC USB3.0 port 2 Redriver
For MB/DOCK PS8713B P34 USB 3.0 Port
DPB
Docking DPD Video Switch USB2.0 port 0 USB 2.0 Port
IDT VMM2320 P36
P21 INTEL USB on I/O board
DAI
SATA3.0 port 1 Shark Bay ULT USB3.0 port 1 USB 3.0 Port
USB2.0 port 3 VGA USB2.0 port 1 USB 2.0 Port
DOCKING USB2.0 port 4 P34
USB3.0 port 4 VGA
CRT CONN For MB/DOCK
Docking DPC P36 Video Switch Fingerprint
2
Docking VGA USB2.0 HUB port 1 2
Docking DPD on I/O board Pericom CONN
Docking VGA PI3V713-AZLEX P29
P35 Docking LAN P22
USB2.0 HUB port 2 Smart Card
OZ77CR6LN
P36
DPC USB2.0 1:4 option
HDMI CONN Reduce Level USB2.0 port 7
HUB
Shifter USB2.0 HUB port 3
P23 SMSC USX2064
P23 USB2.0 HUB port 4
P33
PCIe port6 lane 0 / SATA port 3(DIS) Full Mini Card
PCIe port6 lane 0 / SATA port 3(DIS) WWAN/mSATA
PCIe/SATA SW
P6~17 SATA 3.0 PI2DBS6212ZHEX PCIe port6 lane 0 (DIS) P34
PCIE BUS P32
Express Card
LPC Bus
SPI Bus
Port5/Lane 0 (UMA) HDD CONN
Port3 Port1 Port4 Port0
Port6/Lane 0 (DIS) P25
1/2 Mini Card
Intel Clarkville Card Reader Express Card Discrete TPM Port2
WLAN/BT4.0 HD Audio I/F ODD CONN
I218LM OZ777FJ2LN AT97SC3204 P26
/WiGig P29
P28 P30 P36 P31 port 1 Docking SATA3.0
3 3
USB2.0 HUB port 2 USB2.0 HUB port 3

option
W25Q64BVSSIQ
LAN SWITCH SDXC/MMC
INT.Speaker
PI3L720 (SD4.0) SMSC SIO P7 HDA Codec P27
P28 P30 64M 8K sector
ECE5048 BC BUS ALC3226
P37
Docking LAN P27
Combo Jack
W25Q32BVSSIQ DAI
RJ45 SMSC KBC P36
PWM FAN
P36 ECE5075 P7
on I/O board 32M 4K sector on I/O board
P38
P38
Dual Array
DMics P20
Through LVDS Cable
TP CONN KB CONN
P39 P39
Single Dig
4
Mic P36 4
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Block Diagram
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.5
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-9832P
Date: Thursday, June 13, 2013 Sheet 2 of 64
A B C D E
5 4 3 2 1
POWER STATES
Signal SLP SLP SLP SLP ALWAYS M SUS RUN CLOCKS PCIE USB3.0 SATA DESTINATION
State S3# S4# S5# A# PLANE PLANE PLANE PLANE
USB3.0 1 JUSB1-->MB-->LEFT
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH ON ON ON ON ON
USB3.0 2 USB3.0-->IOB-->Rear Right
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH HIGH ON ON ON OFF OFF
PCIE 1 USB3.0 3 PCIE1-->MMI PCIE
S4 (Suspend to DISK) / M3 LOW LOW HIGH HIGH ON ON OFF OFF OFF
PCIE 2 USB3.0 4 USB3.0-->Docking
S5 (SOFT OFF) / M3 LOW LOW LOW HIGH ON ON OFF OFF OFF
PCIE 3 LOM
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH LOW ON OFF ON OFF OFF
PCIE 4 WLAN (WiGi)
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW ON OFF OFF OFF OFF
PCIE 5 GPU(DIS)/Express card(UMA)
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW ON OFF OFF OFF OFF
PCIE 6 SATA 3 WWAN(mSATA)/Express card(PCIE)
SATA 2 ODD
PM TABLE
+5V_ALW +3.3V_SUS +5V_RUN +3.3V_M +3.3V_M SATA 1 HDD
C C
+3.3V_ALW +1.35V_MEM +3.3V_RUN +1.05V_M +1.05V_M
+3.3V_ALW_PCH +0.675V_DDR_VTT (M-OFF) SATA 0 DOCK
power
plane +3.3V_RTC_LDO +1.05V_RUN
+VCC_CORE
USB PORT# DESTINATION
State 0 IO (Right)
1 JUSB1(Left)
S0 ON ON ON ON ON
2 USB DB(Rear Left)
S3 ON ON OFF ON OFF HSW
3 DOCK
ULT
S5 S4/AC ON OFF OFF ON OFF
4 Dock
B
S5 S4/AC don't exist OFF OFF OFF OFF OFF B
5 WebCAM
need to update Power Status and
PM Table 6 Touch Screen
7 USB HUB
A A
Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Index and Config.
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
0.5
5 4 3 2 1
5 4 3 2 1
A_ON
PWRSHARE_EN#
USB_PWR_EN# USB_SIDE_EN#
TPS51362
(PU150) G471 G471 G471
(U35) (U35) (IO/B)
D D
DGPU_CORE_EN UP1642
+GPU_CORE
(PU600)
ADAPTER +1.05V_M
+5V_USB_
+USB_PWR +USB_IO_PWR
CHG_PWR
GPU_PGOOD RT8237 MPHYP_PWR_EN
+1.5V_GPU
(PU700)
NCP4543
(U44)
BATTERY +PWR_SRC
3S/4S Selector
CD3301
EN_INVPWR FDC654P +1.05V_MODPHY
+BL_PWR_SRC
(Q2)
ALWON
C TPS51225 C
CHARGER +5V_ALW
(PU51)
BQ24717
(PU402)
PCH_ALW_ON
+3.3V_ALW
RUN_ON
WWAN_mSATA_EN
3.3_1.5V_WLAN_EN
HOST_ALERT1_R_N
H_VR_EN
PCH_AUDIO_EN
PCH_AUDIO_EN
3.3V_HDD_EN
RUN_ON
EN_LCDPWR
RUN_ON
RUN_ON
3.3V_TP_EN
TPS22966
SUS_ON
(Q49)
A_ON
TPS51622 RT8207M
(PU300) (PU100)
TPS22966 TPS22965 TPS22965 TPS22965 TPS22965 TPS22965 TPS22965 SYN470 TPS22966 TPS22966
(U45) (U51) (U34) (U22) (U16) (U40) (U9) (PU200) (U29) (U18)
B B
SUS_ON
+3.3V_ALW_PCH
0.675V_DDR_VTT_ON
+1.5V_RUN
+VCC_CORE +1.35V_MEM +5V_RUN +3.3V_RUN
_AUDIO _AUDIO
+3.3V_M +3.3V_WLAN +3.3V_LAN +3.3V_TP
+3.3V_RUN +5V_RUN +1.05V_RUN
3.3V_CAM_EN
3.3V_TS_EN
+3.3V_mSATA
+0.675V_DDR_VTT +3.3V_SUS +3.3V_HDD +LCDVDD
_WWAN
PMV65XP
+3.3V_TSP
(Q1)
A A
PMV65XP
+3.3V_CAM
(Q3) DELL CONFIDENTIAL/PROPRIETARY
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
LA-9832P
5 4 3 2 1
5 4 3 2 1
2.2K
SMBUS Address [0x9a]
2.2K
+3.3V_ALW_PCH
AP2 MEM_SMBCLK 202
MEM_SMBDATA
2N7002
AH1 200 DIMMA
2N7002
499
202
PCH
D +3.3V_ALW_PCH 200 DIMMB D
499
SML0CLK 0ohm LAN_SMBCLK 28
AN1
SML0DATA 0ohm LAN_SMBDATA 31 LOM
AK1
AH3 AU3 53
51
XDP
2.2K
SML1_SMBDATA
SML1_SMBCLK
+3.3V_ALW_PCH 10K
2.2K
A5 B6 2.2K +3.3V_RUN
10K
3A 3A
+3.3V_ALW 4
2.2K
6 G Sensor
B4 DOCK_SMB_CLK 127
1A
129 DOCKING
1A A3 DOCK_SMB_DAT
30
2.2K 32 WWAN
C C
+3.3V_ALW
2.2K
@ 4.7K
B5 LCD_SMBCLK
1B +3.3V_DVCC
A4 LCD_SMDATA @ 4.7K
1B
0ohm 13
2.2K
0ohm 14 eDP to LVDS CONVERTER
KBC 2.2K
+3.3V_ALW
100 ohm 7
1C A56 PBAT_SMBCLK
6 BATTERY
1C B59 PBAT_SMBDAT 100 ohm
CONN
2.2K
10K
+3.3V_ALW +3.3V_USBHUB
2.2K 10K
A50 24
1E USH_SMBCLK
B53
2N7002 22
USH_SMBDAT USB HUB SMBUS Address [0x2C]
1E
2N7002 USX2064
B B
2.2K
+3.3V_SUS
2.2K
MEC 5075
2B A49 CARD_SMBCLK
Express card
2B B52 CARD_SMBDAT
10K
+3.3V_ALW
10K
B50 9
1G CHARGER_SMBCLK
A47 8 Charger
1G CHARGER_SMBDAT
2.2K
+3.3V_ALW
2.2K
2D B7 BAY_SMBDAT
A
2D A7 BAY_SMBCLK A
2.2K
+3.3V_ALW
2.2K
D8
2A B7 GPU_SMBDAT Compal Electronics, Inc.
2N7002 D9 Title
NV GPU SMBUS Address [0x9E]
2A A7 GPU_SMBCLK 2N7002 SMBUS TOPOLOGY
0.5
LA-9832P
5 4 3 2 1
5 4 3 2 1
+RTC_CELL
330K_0402_1%~D
1
RC1
2 PCH_INTVRMEN
330K_0402_1%~D
1
@ RC2
D D
+3.3V_ALW_PCH
2
1 2 PCH_AZ_SDOUT
@ RC3 1K_0402_1%~D
INTVRMEN - INTEGRATED SUS 1.05V VRM FLASH DESCRIPTOR SECURITY OVERRIDE

ENABLE LOW = DESABLED (DEFAULT)
High - Enable Internal VRs HIGH = ENABLED
Low - Enable External VRs
CC1
1 2 PCH_RTCX1_R 1 @ 2 PCH_RTCX1
RC4 0_0402_5%
10M_0402_5%~D
15P_0402_50V8J
1
RC5
HASWELL_MCP_E
YC1 UC1E
2
C 32.768KHZ_12.5PF_9H03200031 C
2
CC2
15P_0402_50V8J AW5
1 2 PCH_RTCX2 AY5 RTCX1
1 2 INTRUDER# AU6 RTCX2 J5
INTRUDER RTC SATA_RN0/PERN6_L3 SATA_PRX_DKTX_N0_C 35
RC7 1M_0402_5%~D PCH_INTVRMEN AV7 H5
INTVRMEN SATA_RP0/PERP6_L3 SATA_PRX_DKTX_P0_C 35
+RTC_CELL
1 2 SRTCRST# AV6 B15 DOCK
RC8 1 2 20K_0402_5%~D PCH_RTCRST# AU7 SRTCRST SATA_TN0/PETN6_L3 A15 SATA_PTX_DKRX_N0_C 35
RC6 20K_0402_5%~D RTCRST SATA_TP0/PETP6_L3 SATA_PTX_DKRX_P0_C 35
CMOS_CLR1 CMOS setting J8
9 PCH_RTCRST# SATA_RN1/PERN6_L2 SATA_PRX_DTX_N1_C 25
Shunt Clear CMOS H8
SATA_RP1/PERP6_L2 SATA_PRX_DTX_P1_C 25
1 2 1 2 A17 SATA HDD
1 2 1 2 SATA_TN1/PETN6_L2 B17 SATA_PTX_DRX_N1_C 25
Open Keep CMOS SATA_TP1/PETP6_L2 SATA_PTX_DRX_P1_C 25
@ @ PCH_AZ_BITCLK AW8 J6
HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 SATA_ODD_PRX_DTX_N2_C 26
ME_CLR1 TPM setting ME1 SHORT PADS~D CMOS1 SHORT PADS~D PCH_AZ_SYNC AV11 H6
HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 SATA_ODD_PRX_DTX_P2_C 26
PCH_AZ_RST# AU8 B14 ODD
1 2 1 2 PCH_AZ_CODEC_SDIN0 AY10 HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 C15 SATA_ODD_PTX_DRX_N2_C 26
Shunt Clear ME RTC Registers CC3 1U_0402_6.3V6K~D CC4 1U_0402_6.3V6K~D 27 PCH_AZ_CODEC_SDIN0
AU12 HDA_SDI0/I2S0_RXD AUDIO SATA SATA_TP2/PETP6_L1 SATA_ODD_PTX_DRX_P2_C 26
1 2 PCH_AZ_SDOUT AU11 HDA_SDI1/I2S1_RXD F5 EXP_PRX_EXPTX_N6 PCH Rx side need use strap pin to update PCIE +/-
Open Keep ME RTC Registers CMOS place near DIMM 37 ME_FWP
RC9 1K_0402_1%~D AW10 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 E5 EXP_PRX_EXPTX_P6
EXP_PRX_EXPTX_N6 32
HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 EXP_PRX_EXPTX_P6 32
AV10 C17 EXP_PTX_EXPRX_N6 Express card/mSATA
AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17 EXP_PTX_EXPRX_P6 EXP_PTX_EXPRX_N6 32 +3.3V_RUN
I2S1_SCLK SATA_TP3/PETP6_L0 EXP_PTX_EXPRX_P6 32
HDD_DET# 1 2
V1 MPCIE_RST# 100K_0402_5%~D RC11
SATA0GP/GPIO34 MPCIE_RST# 31
U1 HDD_DET#
SATA1GP/GPIO35 HDD_DET# 25
V6 PCH_GPIO36 MPCIE_RST# 2 1
+1.05V_M SATA2GP/GPIO36 AC1 MCARD_PCIE_MSATA# PCH_GPIO36 9
10K_0402_5%~D RC138
SATA3GP/GPIO37 MCARD_PCIE_MSATA# 37
9 PCH_JTAG_TRST# PCH_JTAG_TRST# AU62
PCH_JTAG_TCK AE62 PCH_TRST A12 SATA_IREF 2 @ 1 MCARD_PCIE_MSATA# 1 2
9 PCH_JTAG_TCK PCH_TCK SATA_IREF +PCH_ASATA3PLL
1
0_0603_5%~D
9 PCH_JTAG_TDI PCH_JTAG_TDI AD61 L11 0_0402_5% RC14 10K_0402_5%~D RC12

PCH_TDI RSVD
RC16
9 PCH_JTAG_TDO PCH_JTAG_TDO AE61 K10

@ PCH_JTAG_TMS AD62 PCH_TDO JTAG RSVD C12 SATA_COMP
9 PCH_JTAG_TMS PCH_TMS SATA_RCOMP
AL11 U3 SATA_ACT# Shark_Bay_ULT_PDG 0.9:
AC4 RSVD SATALED SATA_ACT# 41
the sampled value for the GPIO corresponding to
2
PCH_JTAG_JTAGX AE63 RSVD

9 PCH_JTAG_JTAGX JTAGX the particular port during boot time.
B +1.05V_M_JTAG 2 1 PCH_JTAG_TDI AV2 B
RC17 51_0402_1%~D RSVD SATA3GP/GPIO37-->SATAP3:
SATA_IREF 1:SATA
2 1 PCH_JTAG_TDO SATA_IREF min 4mil trace at break-out and 12-15mil trace
RC18 51_0402_1%~D 0:PCIe
Rev1p2
with <0.2 ohms and length total <= 500mils. Requires 12
5 OF 19
2 1 PCH_JTAG_TMS mils isolation from all High Speed IO and clocks.
RC20 51_0402_1%~D
2 1 PCH_JTAG_JTAGX
@ RC10 1K_0402_1%~D
SATA Impedance Compensation
2 1 PCH_JTAG_TCK
@ RC22 51_0402_1%~D +PCH_ASATA3PLL
reference 479493 figure 7-1 SATA_COMP 1 2

RC19 3.01K_0402_1%~D
SATA_RCOMP min 4mil trace at break-out and
12-15mil trace with <0.2 ohms and length total
<= 500mils. Requires 12 mils isolation from all
High Speed IO and clocks.
reference FFRD sch 0.5
HDA for Codec

1 2 PCH_AZ_SDOUT
27 PCH_AZ_CODEC_SDOUT
RC23 33_0402_5%~D
1 2 PCH_AZ_SYNC
27 PCH_AZ_CODEC_SYNC
RC24 33_0402_5%~D
1 2 PCH_AZ_RST#
27 PCH_AZ_CODEC_RST#
RC25 33_0402_5%~D
1 2 PCH_AZ_BITCLK
27 PCH_AZ_CODEC_BITCLK
RC26 33_0402_5%~D
27P_0402_50V8J~D
1
CC5
A @ A
EMI
PROPRIETARY NOTE:
Title
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(1/12) RTC,SATA,HDA,JTAG
0.5
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD LA-9832P
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. Date: Monday, June 17, 2013 Sheet 6 of 64
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
UC1G HASWELL_MCP_E
LPC_LAD0 AU14 AN2 PCH_SMB_ALERT#

29,31,37,38 LPC_LAD0 LAD0 SMBALERT/GPIO11
LPC_LAD1 AW12 AP2 MEM_SMBCLK
29,31,37,38 LPC_LAD1 LAD1 SMBCLK
2
LPC_LAD2 AY12 LPC AH1 MEM_SMBDATA
29,31,37,38 LPC_LAD2 LAD2 SMBDATA
LPC_LAD3 AW11 AL2 PCH_GPIO60
29,31,37,38 LPC_LAD3 LAD3 SML0ALERT/GPIO60
LPC_LFRAME# AV12 SMBUS AN1 LAN_SMBCLK MEM_SMBCLK 6 1
29,31,37,38 LPC_LFRAME# LFRAME SML0CLK LAN_SMBCLK 28 DDR_XDP_WAN_SMBCLK 18,19,20,25,31,9
AK1 LAN_SMBDATA
SML0DATA LAN_SMBDATA 28
AU4 PCH_GPIO73 QC1A
SML1ALERT/PCHHOT/GPIO73 PCH_GPIO73 12
5
AU3 SML1_SMBCLK DMN66D0LDW-7_SOT363-6~D
SML1CLK/GPIO75 AH3 SML1_SMBDATA SML1_SMBCLK 38
SML1DATA/GPIO74 SML1_SMBDATA 38
PCH_SPI_CLK AA3 MEM_SMBDATA 3 4
SPI_CLK DDR_XDP_WAN_SMBDAT 18,19,20,25,31,9
PCH_SPI_CS0# Y7 AF2 PCH_CL_CLK1
SPI_CS0 CL_CLK PCH_CL_CLK1 31
D PCH_SPI_CS1# Y4 AD2 PCH_CL_DATA1 QC1B D
SPI_CS1 CL_DATA PCH_CL_DATA1 31 +3.3V_ALW_PCH
+3.3V_M AC2 SPI C-LINK AF4 PCH_CL_RST1# DMN66D0LDW-7_SOT363-6~D
PCH_SPI_DO AA2 SPI_CS2 CL_RST PCH_CL_RST1# 31
1 2 PCH_SPI_DO2 PCH_SPI_DIN AA4 SPI_MOSI PCH_SMB_ALERT# 2 1
R1 1K_0402_5%~D PCH_SPI_DO2 Y6 SPI_MISO 10K_0402_5%~D RC27
1 2 PCH_SPI_DO3 PCH_SPI_DO3 AF1 SPI_IO2 MEM_SMBCLK 2 1
R2 1K_0402_5%~D SPI_IO3 2.2K_0402_5%~D RC28
reference PDG0.7 MEM_SMBDATA 2 1
BIOS ROM (4MB + 8MB) Part Number: 2.2K_0402_5%~D RC30
7 OF 19 Rev1p2
8MB Micron N25Q064A MXIC MX25L6475E
BIOS ROM (4MB + 8MB) Selection: SML1_SMBCLK 1 2
P/N SA000069G00 SA00006CG00 2.2K_0402_5%~D RC36
SML1_SMBDATA 1 2
2.2K_0402_5%~D RC37
1@ 8MB: Windbond W25Q64FVSSIQ, Micron N25Q064A, MXIC MX25L6475E, Atmel AT25DQ641A LAN_SMBCLK
499_0402_1%~D
1 2
RC186
4MB Micron N25Q032A MXIC MX25L3275E LAN_SMBDATA 1 2
4MB: Windbond W25Q32FVSSIQ, Micron N25Q032A, MXIC MX25L3275E, Atmel AT25DQ321 499_0402_1%~D RC192
Intel PDG 0.9
P/N SA00005KR00 SA00006DI00
+3.3V_M
C5 1@
64Mb Flash ROM 1 2
reference PDG0.7 200 MIL SO8 0.1U_0402_25V6K~D

TAA@ ACES_50051-02071-001 +3.3V_M
JTAA1
U1 1@ CONN@
PCH_SPI_CS0# R3 1 1@ 2 0_0402_5%~D SPI_PCH_CS0#_R 1 8 PCH_SPI_DO TAA@ R11 1 2 33_0402_5%~D TAA_DO64 1 2
PCH_SPI_DIN R4 1 1@ 2 33_0402_5%~D SPI_DIN64 2 /CS VCC 7 SPI_PCH_DO3_64 R5 1 1@ 2 33_0402_5%~D PCH_SPI_DO3 PCH_SPI_DO TAA@ R12 1 2 33_0402_5%~D TAA_DO32 3 1 2 4
PCH_SPI_DO2 R6 1 1@ 2 33_0402_5%~D SPI_PCH_DO2_64 3 DO(IO1) /HOLD(IO3) 6 SPI_CLK64 R7 1 1@ 2 33_0402_5%~D PCH_SPI_CLK 5 3 4 6
4 /WP(IO2) CLK 5 SPI_DO64 R9 1 1@ 2 33_0402_5%~D PCH_SPI_DO PCH_SPI_CLK TAA@ R13 1 2 33_0402_5%~D TAA_CLK64 7 5 6 8 TAA_DO3_64 TAA@ R43 1 2 33_0402_5%~D PCH_SPI_DO3
C GND DI(IO0) PCH_SPI_CLK TAA@ R18 1 2 33_0402_5%~D TAA_CLK32 9 7 8 10 TAA_DO3_32 TAA@ R48 1 2 33_0402_5%~D PCH_SPI_DO3 C
SPI_WP#_SEL 2 1 W25Q64FVSSIQ_SO8 PCH_SPI_CS0# TAA@ R10 1 2 0_0402_5%~D TAA_CS0#_R 11 9 10 12 TAA_DO2_64 TAA@ R58 1 2 33_0402_5%~D PCH_SPI_DO2
37 SPI_WP#_SEL
@ R8 0_0402_5%~D PCH_SPI_CS1# TAA@ R17 1 2 0_0402_5%~D TAA_CS1#_R 13 11 12 14 TAA_DO2_32 TAA@ R59 1 2 33_0402_5%~D PCH_SPI_DO2
15 13 14 16
PCH_SPI_DIN TAA@ R22 1 2 33_0402_5%~D TAA_DIN64 17 15 16 18
PCH_SPI_DIN TAA@ R41 1 2 33_0402_5%~D TAA_DIN32 19 17 18 20
19 20
21 22
+3.3V_M 23 G1 G2 24
25 G3 G4 26
C6 1@ G5 G6
200 MIL SO8 1 2
TAA Config
reference PDG0.7 32Mb Flash ROM 0.1U_0402_25V6K~D P/N:SP071210080
U2 1@
PCH_SPI_CS1# R14 1 1@ 2 0_0402_5%~D SPI_PCH_CS1#_R 1 8
PCH_SPI_DIN R15 1 1@ 2 33_0402_5%~D SPI_DIN32 2 /CS VCC 7 SPI_PCH_DO3_32 R16 1 1@ 2 33_0402_5%~D PCH_SPI_DO3 CC7
PCH_SPI_DO2 R19 1 1@ 2 33_0402_5%~D SPI_PCH_DO2_32 3 DO/IO1 /HOLD/IO3 6 SPI_CLK32 R20 1 1@ 2 33_0402_5%~D PCH_SPI_CLK 1 @ 2 XTAL24_IN_R 2 1
4 /WP/IO2 CLK 5 SPI_DO32 R21 1 1@ 2 33_0402_5%~D PCH_SPI_DO RC40 0_0402_5%
GND DI/IO0
1M_0402_5%~D
SPI_WP#_SEL 2 1 15P_0402_50V8J
2
@ R23 0_0402_5%~D W25Q32FVSSIQ_SO8
3
4
HASWELL_MCP_E
RC44
UC1F
YC2
24MHZ_12PF_+-20PPM_CRG3202412
1
2
RC160 2 DIS@ 1 0_0402_5%~D PEG_EXP# C43 A25 XTAL24_IN CC6
36 CLK_PCIE_EXP# RC184 2 DIS@ 1 0_0402_5%~D PEG_EXP C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT 2 1
36 CLK_PCIE_EXP MMICLK_REQ# U2 CLKOUT_PCIE_P0 XTAL24_OUT
30 MMICLK_REQ# PCIECLKRQ0/GPIO18
SPI_CLK32 SPI_CLK64 +3.3V_RUN RC55 1 2 10K_0402_5%~D K21 15P_0402_50V8J
RC48 2 @ 1 0_0402_5% PCIE_LAN# B41 RSVD M21
28 CLK_PCIE_LAN# CLKOUT_PCIE_N1 RSVD
33_0402_5%~D
33_0402_5%~D
10/100/1G LAN ---> RC49 2 @ 1 0_0402_5% PCIE_LAN A41 C26 CLK_BIASREF

28 CLK_PCIE_LAN CLKOUT_PCIE_P1 DIFFCLK_BIASREF
2
2
R45
R57
@ @ Y5
PCIECLKRQ1/GPIO19 C35 MCP_TESTLOW1
RC53 2 @ 1 0_0402_5% PCIE_MMI# C41 CLOCK TESTLOW_C35 C34 MCP_TESTLOW2
B B
30 CLK_PCIE_MMI# RC54 2 @ 1 0_0402_5% PCIE_MMI B42 CLKOUT_PCIE_N2 TESTLOW_C34 AK8 MCP_TESTLOW3
MMI---> 30 CLK_PCIE_MMI CLKOUT_PCIE_P2 TESTLOW_AK8 EMI
LANCLK_REQ# AD1 SIGNALS AL8 MCP_TESTLOW4
28,9 LANCLK_REQ#
1
PCIECLKRQ2/GPIO20 TESTLOW_AL8
CLK_PCIE_FMC# B38 AN15 PCI_CLK_LPC_0 0_0402_5% 1 @ 2 RC65 PCI_CLK_LPC
31 CLK_PCIE_FMC# CLK_PCIE_FMC C37 CLKOUT_PCIE_N3 CLKOUT_LPC_0 AP15 PCI_CLK_LPC_1 22_0402_5%~D 1 EMI@ 2 RC64
2 2 EXP/FMC Card---> 31 CLK_PCIE_FMC CLKOUT_PCIE_P3 CLKOUT_LPC_1 CLK_PCI_DOCK 35
33P_0402_50V8J~D
33P_0402_50V8J~D
MINI2CLK_REQ# N1 22_0402_5%~D 1 EMI@ 2 RC66

12,31 MINI2CLK_REQ# PCIECLKRQ3/GPIO21 CLK_PCI_LPDEBUG 31
C85
C76
@ @ B35
RC157 2 DIS@ 1 0_0402_5%~D PEG_VGA# A39 CLKOUT_ITPXDP_N A35
1 1 42 CLK_PEG_VGA# RC179 2 DIS@ 1 0_0402_5%~D PEG_VGA B39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P
DGPU ---> 42 CLK_PEG_VGA CLKOUT_PCIE_P4
PCIE_CLKRQ4# U5
RC166 1 2 10K_0402_5%~D PCIECLKRQ4/GPIO22
+3.3V_RUN
RC59 2 @ 1 0_0402_5% PCIE_MINI2# B37
31 CLK_PCIE_MINI2# CLKOUT_PCIE_N5
WLAN (Mini Card 2)---> RC60 2 @ 1 0_0402_5% PCIE_MINI2 A37
EMI 31 CLK_PCIE_MINI2
12,32 SWCLK_REQ#
SWCLK_REQ# T2 CLKOUT_PCIE_P5
PCIECLKRQ5/GPIO23
PEG_A_CLKRQ# RC162 2 DIS@ 1 0_0402_5%~D 6 OF 19 Rev1p2

42 PEG_A_CLKRQ#
EXPCLK_REQ# RC187 2 UMA@ 1 0_0402_5%~D PCIE_CLKRQ4#
32,36 EXPCLK_REQ#
0_0402_5%~D 0_0402_5%~D
CLK_PCIE_EXP# RC164 2 UMA@ 1 PEG_VGA_EXP# RC165 2 UMA@ 1 PEG_VGA#
RC164, RC188 co-layout with RC160, RC184
CLK_PCIE_EXP RC188 2 UMA@ 1 PEG_VGA_EXP RC196 2 UMA@ 1 PEG_VGA RC165, RC196 co-layout with RC157, RC179
0_0402_5%~D 0_0402_5%~D
+PCH_VCCACLKPLL
+3.3V_RUN RC38
0_0402_5% UC5 @ CLK_BIASREF 1 2
EMI Co-layout with UC5
5
PCI_CLK_LPC_0 2 1 @ 2 @ 1 3.01K_0402_1%~D RC45

12P_0402_50V8J~D CC15
VDD
PCI_CLK_LPC1 2PCI_TPM_TCM RC58 1 EMI@ 2 22_0402_5%~D MCP_TESTLOW1 1 2

CLKIN CLK1 CLK_PCI_TPM_TCM 29 PCI_CLK_LPC 1 @ 2 PCI_TPM_TCM 10K_0402_5%~D RC46
1
PCI_CLK_LPC_1 2 1 @ 3PCI_5048 RC61 1 EMI@ 2 22_0402_5%~D 0_0402_5% R38 MCP_TESTLOW2 1 2
CLK2 CLK_PCI_5048 37
0.1U_0402_25V6K~D
CC22
12P_0402_50V8J~D CC14 1 @ 2 PCI_5048 10K_0402_5%~D RC47

6PCI_MEC RC63 1 EMI@ 2 22_0402_5%~D 0_0402_5% R53 MCP_TESTLOW3 1 2
A 2 CLK3 CLK_PCI_MEC 38 1 @ 2 PCI_MEC 10K_0402_5%~D RC50 A
PCI_TPM_TCM 2 1 @ @ 7PCI_FBIN 1 @ 2 1 2 CC23 0_0402_5% R63 MCP_TESTLOW4 1 2

12P_0402_50V8J~D CC25 CLK4 10K_0402_5%~D RC52
RC100 0.1U_0402_25V6K~D
8 4 0_0402_5% @
PCI_5048 2 1 @ FBIN GND
12P_0402_50V8J~D CC57
IF RC100 =0 ohm DELL CONFIDENTIAL/PROPRIETARY
5V60034DCG8_SO8
P/N: SA000068V00
than zero delay
PCI_FBIN 2 1 @ PROPRIETARY NOTE: Compal Electronics, Inc.
12P_0402_50V8J~D CC80 Title
CLK_PCI_FBIN
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(2/12)CLK,SMB,SPI,LPC,CL
EMI BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-9832P
Date: Monday, June 17, 2013 Sheet 7 of 64
5 4 3 2 1
5 4 3 2 1
DDR interleave routing DDR interleave routing

D HASWELL_MCP_E HASWELL_MCP_E D
UC1C UC1D
18 DDR_A_D[32..47]
18 DDR_A_D[0..15]
DDR_A_D0 AH63 AU37 M_CLK_DDR#0
SA_DQ0 SA_CLK#0 M_CLK_DDR#0 18
DDR_A_D1 AH62 AV37 M_CLK_DDR0 DDR_A_D32 AY31 AM38 M_CLK_DDR#2
SA_DQ1 SA_CLK0 M_CLK_DDR0 18 SB_DQ0 SB_CK#0 M_CLK_DDR#2 19
DDR_A_D2 AK63 AW36 M_CLK_DDR#1 DDR_A_D33 AW31 AN38 M_CLK_DDR2
SA_DQ2 SA_CLK#1 M_CLK_DDR#1 18 SB_DQ1 SB_CK0 M_CLK_DDR2 19
DDR_A_D3 AK62 AY36 M_CLK_DDR1 DDR_A_D34 AY29 AK38 M_CLK_DDR#3
SA_DQ3 SA_CLK1 M_CLK_DDR1 18 SB_DQ2 SB_CK#1 M_CLK_DDR#3 19
DDR_A_D4 AH61 DDR_A_D35 AW29 AL38 M_CLK_DDR3
SA_DQ4 SB_DQ3 SB_CK1 M_CLK_DDR3 19
DDR_A_D5 AH60 AU43 DDR_CKE0_DIMMA DDR_A_D36 AV31
SA_DQ5 SA_CKE0 DDR_CKE0_DIMMA 18 SB_DQ4
DDR_A_D6 AK61 AW43 DDR_CKE1_DIMMA DDR_A_D37 AU31 AY49 DDR_CKE2_DIMMB
SA_DQ6 SA_CKE1 DDR_CKE1_DIMMA 18 SB_DQ5 SB_CKE0 DDR_CKE2_DIMMB 19
DDR_A_D7 AK60 AY42 DDR_A_D38 AV29 AU50 DDR_CKE3_DIMMB
SA_DQ7 SA_CKE2 SB_DQ6 SB_CKE1 DDR_CKE3_DIMMB 19
DDR_A_D8 AM63 AY43 DDR_A_D39 AU29 AW49
DDR_A_D9 AM62 SA_DQ8 SA_CKE3 DDR_A_D40 AY27 SB_DQ7 SB_CKE2 AV50
DDR_A_D10 AP63 SA_DQ9 AP33 DDR_CS0_DIMMA# DDR_A_D41 AW27 SB_DQ8 SB_CKE3
SA_DQ10 SA_CS#0 DDR_CS0_DIMMA# 18 SB_DQ9
DDR_A_D11 AP62 AR32 DDR_CS1_DIMMA# DDR_A_D42 AY25 AM32 DDR_CS2_DIMMB#
SA_DQ11 SA_CS#1 DDR_CS1_DIMMA# 18 SB_DQ10 SB_CS#0 DDR_CS2_DIMMB# 19
DDR_A_D12 AM61 DDR_A_D43 AW25 AK32 DDR_CS3_DIMMB#
SA_DQ12 SB_DQ11 SB_CS#1 DDR_CS3_DIMMB# 19
DDR_A_D13 AM60 AP32 DDR_A_D44 AV27
DDR_A_D14 AP61 SA_DQ13 SA_ODT0 DDR_A_D45 AU27 SB_DQ12 AL32
DDR_A_D15 AP60 SA_DQ14 AY34 DDR_A_RAS# DDR_A_D46 AV25 SB_DQ13 SB_ODT0
19 DDR_B_D[0..15] SA_DQ15 SA_RAS DDR_A_RAS# 18 SB_DQ14
DDR_B_D0 AP58 AW34 DDR_A_WE# DDR_A_D47 AU25 AM35 DDR_B_RAS#
SA_DQ16 SA_WE DDR_A_WE# 18 19 DDR_B_D[32..47] SB_DQ15 SB_RAS DDR_B_RAS# 19
DDR_B_D1 AR58 AU34 DDR_A_CAS# DDR_B_D32 AM29 AK35 DDR_B_WE#
SA_DQ17 SA_CAS DDR_A_CAS# 18 SB_DQ16 SB_WE DDR_B_WE# 19
DDR_B_D2 AM57 DDR_B_D33 AK29 AM33 DDR_B_CAS#
SA_DQ18 SB_DQ17 SB_CAS DDR_B_CAS# 19
DDR_B_D3 AK57 AU35 DDR_A_BS0 DDR_B_D34 AL28
SA_DQ19 SA_BA0 DDR_A_BS0 18 SB_DQ18
DDR_B_D4 AL58 AV35 DDR_A_BS1 DDR_B_D35 AK28 AL35 DDR_B_BS0
SA_DQ20 SA_BA1 DDR_A_BS1 18 SB_DQ19 SB_BA0 DDR_B_BS0 19
DDR_B_D5 AK58 AY41 DDR_A_BS2 DDR_B_D36 AR29 AM36 DDR_B_BS1
SA_DQ21 SA_BA2 DDR_A_BS2 18 SB_DQ20 SB_BA1 DDR_B_BS1 19
DDR_B_D6 AR57 DDR_B_D37 AN29 AU49 DDR_B_BS2
SA_DQ22 DDR_A_MA[0..15] 18 SB_DQ21 SB_BA2 DDR_B_BS2 19
DDR_B_D7 AN57 AU36 DDR_A_MA0 DDR_B_D38 AR28
SA_DQ23 SA_MA0 SB_DQ22 DDR_B_MA[0..15] 19
DDR_B_D8 AP55 AY37 DDR_A_MA1 DDR_B_D39 AP28 AP40 DDR_B_MA0
DDR_B_D9 AR55 SA_DQ24 SA_MA1 AR38 DDR_A_MA2 DDR_B_D40 AN26 SB_DQ23 SB_MA0 AR40 DDR_B_MA1
DDR_B_D10 AM54 SA_DQ25 SA_MA2 AP36 DDR_A_MA3 DDR_B_D41 AR26 SB_DQ24 SB_MA1 AP42 DDR_B_MA2
DDR_B_D11 AK54 SA_DQ26 SA_MA3 AU39 DDR_A_MA4 DDR_B_D42 AR25 SB_DQ25 SB_MA2 AR42 DDR_B_MA3
DDR_B_D12 AL55 SA_DQ27 SA_MA4 AR36 DDR_A_MA5 DDR_B_D43 AP25 SB_DQ26 SB_MA3 AR45 DDR_B_MA4
C DDR_B_D13 AK55 SA_DQ28 SA_MA5 AV40 DDR_A_MA6 DDR_B_D44 AK26 SB_DQ27 SB_MA4 AP45 DDR_B_MA5 C
DDR_B_D14 AR54 SA_DQ29 SA_MA6 AW39 DDR_A_MA7 DDR_B_D45 AM26 SB_DQ28 SB_MA5 AW46 DDR_B_MA6
DDR_B_D15 AN54 SA_DQ30 SA_MA7 AY39 DDR_A_MA8 DDR_B_D46 AK25 SB_DQ29 SB_MA6 AY46 DDR_B_MA7
18 DDR_A_D[16..31] SA_DQ31 SA_MA8 SB_DQ30 SB_MA7
DDR_A_D16 AY58 AU40 DDR_A_MA9 DDR_B_D47 AL25 AY47 DDR_B_MA8
SA_DQ32 SA_MA9 18 DDR_A_D[48..63] SB_DQ31 SB_MA8
DDR_A_D17 AW58 AP35 DDR_A_MA10 DDR_A_D48 AY23 AU46 DDR_B_MA9
DDR_A_D18 AY56 SA_DQ33 SA_MA10 AW41 DDR_A_MA11 DDR_A_D49 AW23 SB_DQ32 SB_MA9 AK36 DDR_B_MA10
DDR_A_D19 AW56 SA_DQ34 DDR CHANNEL A SA_MA11 AU41 DDR_A_MA12 DDR_A_D50 AY21 SB_DQ33 DDR CHANNEL B SB_MA10 AV47 DDR_B_MA11
DDR_A_D20 AV58 SA_DQ35 SA_MA12 AR35 DDR_A_MA13 DDR_A_D51 AW21 SB_DQ34 SB_MA11 AU47 DDR_B_MA12
DDR_A_D21 AU58 SA_DQ36 SA_MA13 AV42 DDR_A_MA14 DDR_A_D52 AV23 SB_DQ35 SB_MA12 AK33 DDR_B_MA13
DDR_A_D22 AV56 SA_DQ37 SA_MA14 AU42 DDR_A_MA15 DDR_A_D53 AU23 SB_DQ36 SB_MA13 AR46 DDR_B_MA14
DDR_A_D23 AU56 SA_DQ38 SA_MA15 DDR_A_D54 AV21 SB_DQ37 SB_MA14 AP46 DDR_B_MA15
SA_DQ39 DDR_A_DQS#[0..1] 18 SB_DQ38 SB_MA15
DDR_A_D24 AY54 AJ61 DDR_A_DQS#0 DDR_A_D55 AU21
SA_DQ40 SA_DQSN0 SB_DQ39 DDR_A_DQS#[4..5] 18
DDR_A_D25 AW54 AN62 DDR_A_DQS#1 DDR_A_D56 AY19 AW30 DDR_A_DQS#4
SA_DQ41 SA_DQSN1 DDR_B_DQS#[0..1] 19 SB_DQ40 SB_DQSN0
DDR_A_D26 AY52 AM58 DDR_B_DQS#0 DDR_A_D57 AW19 AV26 DDR_A_DQS#5
SA_DQ42 SA_DQSN2 SB_DQ41 SB_DQSN1 DDR_B_DQS#[4..5] 19
DDR_A_D27 AW52 AM55 DDR_B_DQS#1 DDR_A_D58 AY17 AN28 DDR_B_DQS#4
SA_DQ43 SA_DQSN3 DDR_A_DQS#[2..3] 18 SB_DQ42 SB_DQSN2
DDR_A_D28 AV54 AV57 DDR_A_DQS#2 DDR_A_D59 AW17 AN25 DDR_B_DQS#5
SA_DQ44 SA_DQSN4 SB_DQ43 SB_DQSN3 DDR_A_DQS#[6..7] 18
DDR_A_D29 AU54 AV53 DDR_A_DQS#3 DDR_A_D60 AV19 AW22 DDR_A_DQS#6
SA_DQ45 SA_DQSN5 DDR_B_DQS#[2..3] 19 SB_DQ44 SB_DQSN4
DDR_A_D30 AV52 AL43 DDR_B_DQS#2 DDR_A_D61 AU19 AV18 DDR_A_DQS#7
SA_DQ46 SA_DQSN6 SB_DQ45 SB_DQSN5 DDR_B_DQS#[6..7] 19
DDR_A_D31 AU52 AL48 DDR_B_DQS#3 DDR_A_D62 AV17 AN21 DDR_B_DQS#6
19 DDR_B_D[16..31] SA_DQ47 SA_DQSN7 SB_DQ46 SB_DQSN6
DDR_B_D16 AK40 DDR_A_D63 AU17 AN18 DDR_B_DQS#7
SA_DQ48 DDR_A_DQS[0..1] 18 19 DDR_B_D[48..63] SB_DQ47 SB_DQSN7
DDR_B_D17 AK42 AJ62 DDR_A_DQS0 DDR_B_D48 AR21
SA_DQ49 SA_DQSP0 SB_DQ48 DDR_A_DQS[4..5] 18
DDR_B_D18 AM43 AN61 DDR_A_DQS1 DDR_B_D49 AR22 AV30 DDR_A_DQS4
SA_DQ50 SA_DQSP1 DDR_B_DQS[0..1] 19 SB_DQ49 SB_DQSP0
DDR_B_D19 AM45 AN58 DDR_B_DQS0 DDR_B_D50 AL21 AW26 DDR_A_DQS5
SA_DQ51 SA_DQSP2 SB_DQ50 SB_DQSP1 DDR_B_DQS[4..5] 19
DDR_B_D20 AK45 AN55 DDR_B_DQS1 DDR_B_D51 AM22 AM28 DDR_B_DQS4
SA_DQ52 SA_DQSP3 DDR_A_DQS[2..3] 18 SB_DQ51 SB_DQSP2
DDR_B_D21 AK43 AW57 DDR_A_DQS2 DDR_B_D52 AN22 AM25 DDR_B_DQS5
SA_DQ53 SA_DQSP4 SB_DQ52 SB_DQSP3 DDR_A_DQS[6..7] 18
DDR_B_D22 AM40 AW53 DDR_A_DQS3 DDR_B_D53 AP21 AV22 DDR_A_DQS6
SA_DQ54 SA_DQSP5 DDR_B_DQS[2..3] 19 SB_DQ53 SB_DQSP4
DDR_B_D23 AM42 AL42 DDR_B_DQS2 DDR_B_D54 AK21 AW18 DDR_A_DQS7
SA_DQ55 SA_DQSP6 SB_DQ54 SB_DQSP5 DDR_B_DQS[6..7] 19
DDR_B_D24 AM46 AL49 DDR_B_DQS3 DDR_B_D55 AK22 AM21 DDR_B_DQS6
DDR_B_D25 AK46 SA_DQ56 SA_DQSP7 DDR_B_D56 AN20 SB_DQ55 SB_DQSP6 AM18 DDR_B_DQS7
DDR_B_D26 AM49 SA_DQ57 AP49 DDR_B_D57 AR20 SB_DQ56 SB_DQSP7
SA_DQ58 SM_VREF_CA +SM_VREF_CA SB_DQ57
DDR_B_D27 AK49 AR51 +SM_VREF_DQ0 DDR_B_D58 AK18
DDR_B_D28 AM48 SA_DQ59 SM_VREF_DQ0 AP51 DDR_B_D59 AL18 SB_DQ58
B SA_DQ60 SM_VREF_DQ1 +SM_VREF_DQ1 SB_DQ59 B
DDR_B_D29 AK48 DDR_B_D60 AK20
DDR_B_D30 AM51 SA_DQ61 DDR_B_D61 AM20 SB_DQ60
DDR_B_D31 AK51 SA_DQ62 DDR_B_D62 AR18 SB_DQ61
SA_DQ63 DDR_B_D63 AP18 SB_DQ62
SB_DQ63
3 OF 19 Rev1p2 4 OF 19 Rev1p2
+1.35V_MEM +1.35V_MEM +1.35V_MEM

Place near to SO-DIMM connector.
1
1
1.8K_0402_1%
1.8K_0402_1%
1.8K_0402_1%
RC67
RC130
RC217
+SM_VREF_CA_DIMM +SM_VREF_CA +SM_VREF_DQ1_DIMM2 +SM_VREF_DQ1 +SM_VREF_DQ0_DIMM1 +SM_VREF_DQ0

2
RC68 1 2 RC126 1 2 RC173 1 2

2_0402_1% 1 2_0402_1% 1 2_0402_1% 1
CC67 CC69 CC70
1
1
1.8K_0402_1%
1.8K_0402_1%
1.8K_0402_1%
0.022U_0402_16V7K~D 0.022U_0402_16V7K~D 0.022U_0402_16V7K~D

2 2 2
RC69
RC132
RC221
change 22nF change 22nF change 22nF

1
Interleaved Memory
A RC83 RC128 RC195 A
2
24.9_0402_1%~D 24.9_0402_1%~D 24.9_0402_1%~D

2
PROPRIETARY NOTE:
Title
Refer to Intel request PDG1.0 P148
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(3/12) DDR3
0.5
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. Date: Thursday, June 13, 2013 Sheet 8 of 64
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW_PCH +RTC_CELL
RC72 1 @ 2 0_0402_5% +3.3V_RUN
330K_0402_1%~D
1 2 ME_SUS_PWR_ACK @ CC9
2
RC70 10K_0402_5%~D +3.3V_RUN 1 2
RC73
1 2 SUSACK# @ CC8
RC98 10K_0402_5%~D 1 2 0.1U_0402_25V6K~D
1 2 SUS_STAT#/LPCPD#
5
@ RC74 10K_0402_5%~D 0.1U_0402_25V6K~D +3.3V_ALW2
1
5
XDP_DBRESET# 1 @ CC82
P
B 4 SYS_RESET# PCH_PLTRST# 1 1 2
P
2 1 ME_RESET# 2 O B 4 PCH_PLTRST#_EC
PCH_PLTRST#_EC 29,31,33,36,37,38
G
+3.3V_RUN @ RC76 8.2K_0402_5%~D A @ UC2 2 O 0.1U_0402_25V6K~D DSWODVREN
G
74AHC1G09GW_TSSOP5~D A UC3
330K_0402_1%~D
RP3 TC7SH08FU_SSOP5~D
@ RC78
4 5 LANCLK_REQ#
LANCLK_REQ# 28,7
2
3 6 SIO_RCIN# SIO_SLP_A# 1
P
SIO_RCIN# 12,38 B
2 7 PCH_GPIO36 4 PM_APWROK_R
PCH_GPIO36 6 O
1 8 IRQ_SERIRQ PCH_DPWROK 1 @ 2 PCH_RSMRST#_R PM_APWROK 2
IRQ_SERIRQ 12,29,37,38 DeepSleep and Non-DeepSleep config: 38 PM_APWROK
G
RC79 0_0402_5%~D A UC7
D TC7SH08FU_SSOP5~D D
1
10K_8P4R_5% ME_SUS_PWR_ACK_R 1 @ 2 SUSACK#_R
RC82 0_0402_5%~D Config DSx Non-DSx
RESET_OUT# 1 @ 2 SYS_PWROK_R 1 2
RC84 0_0402_5%~D Pop RC86,R319,RC267 RC79,RC82,RC265 @ RC144 0_0402_5%~D
+3.3V_RUN DSWODVREN - ON DIE DSW VR ENABLE

Depop RC79,RC82,RC265 RC86,R319,RC267 HIGH = ENABLED (DEFAULT)
1 2 CLKRUN#
RC80 8.2K_0402_5%~D
1 2 ME_RESET# UC1H HASWELL_MCP_E
@ RC81 8.2K_0402_5%~D
LOW = DISABLED
SYSTEM POWER MANAGEMENT
RC86 1 @ 2 0_0402_5% SUSACK#_R AK2 AW7 DSWODVREN
37 SUSACK# SUSACK DSWVRMEN
SYS_RESET# AC3 AV5 PCH_DPWROK
SYS_RESET DPWROK PCH_DPWROK 37
RC87 1 @ 2 0_0402_5% SYS_PWROK_R AG2 AJ5 PCH_PCIE_WAKE#
37,9 SYS_PWROK SYS_PWROK WAKE PCH_PCIE_WAKE# 12,38
RC88 1 @ 2 0_0402_5% PCH_PWROK AY7
15,38 RESET_OUT# PCH_PWROK
PM_APWROK_R AB5 CONN@ JAPS1
RC90 1 @ 2 0_0402_5% PCH_PLTRST# AG7 APWROK V5 CLKRUN# 1
30 PLTRST_MMI# PLTRST CLKRUN/GPIO32 CLKRUN# 29,37,38 +3.3V_ALW_PCH
RC91 1 @ 2 0_0402_5% AG4 SUS_STAT#/LPCPD# SIO_SLP_S3# 2 1
28 PLTRST_LAN# SUS_STAT/GPIO61
1 2 PCH_RSMRST#_R RC92 1 @ 2 0_0402_5% AE6 +PCH_VCCDSW3_3
3 2
21 PLTRST_VMM2320# SUSCLK/GPIO62
RC136 10K_0402_5%~D RC180 1 @ 2 0_0402_5% AP5 SIO_SLP_S5# SIO_SLP_S5# 4 3
42 PLTRST_GPU# SLP_S5/GPIO63 SIO_SLP_S5# 38
RC93 1 @ 2 0_0402_5% PCH_RSMRST#_R AW6 SIO_SLP_S4# 5 4
39 PCH_RSMRST#_Q RSMRST
RC94 1 @ 2 0_0402_5% ME_SUS_PWR_ACK_R AV4 SIO_SLP_A# 6 5
38 ME_SUS_PWR_ACK SUSWARN/SUSPWRDNACK/GPIO30
SIO_PWRBTN# AL7 AJ6 SIO_SLP_S4# +PCH_VCCDSW3_3
7 6
38,9 SIO_PWRBTN# PWRBTN SLP_S4 SIO_SLP_S4# 37,40,53,55
AC_PRESENT AJ8 AT4 SIO_SLP_S3# 8 7
12,38 AC_PRESENT ACPRESENT/GPIO31 SLP_S3 SIO_SLP_S3# 36,37,40,53
PCH_BATLOW# AN4 AL5 SIO_SLP_A# PCH_RTCRST# 9 8
12 PCH_BATLOW# BATLOW/GPIO72 SLP_A SIO_SLP_A# 37,40,54 6 PCH_RTCRST#
SIO_SLP_S0# AF3 AP4 SIO_SLP_SUS# 10 9
38,54 SIO_SLP_S0# AM5 SLP_S0 SLP_SUS AJ7 SIO_SLP_LAN# SIO_SLP_SUS# 37 SIO_PWRBTN# 11 10
37 SIO_SLP_WLAN# SLP_WLAN/GPIO29 SLP_LAN SIO_SLP_LAN# 28,37 12 11
SYS_RESET# 13 12
14 13
SIO_SLP_S0# 15 14
8 OF 19 Rev1p2 16 15
17 16
18 17
19 18
20 GND
+3.3V_RUN GND
ACES_50506-01841-P01
C CC41 XDP@ C
2 1
UC6 XDP@
0.1U_0402_25V6K~D
14
VCC
PCH_JTAG_TDO 1 XDP@ 2 TDO_XDP 2 3 CPU_XDP_TDO
6 PCH_JTAG_TDO 1A 1B +1.05V_RUN
RC95 0_0402_5%~D
RUNPWROK 1
1OE
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 XDP@ 2 TDI_XDP 1 XDP@ 2 TDI_XDP_R 5 6 CPU_XDP_TDI
6 PCH_JTAG_TDI 2A 2B
RC96 0_0402_5%~D RC103 0_0402_5%~D 1 @ 1 @
+1.05V_RUN +1.05V_RUN
CC10
CC11
RUNPWROK 4
2OE
1 XDP@ 2 TMS_XDP 9 8 CPU_XDP_TMS 2 2
6 PCH_JTAG_TMS 3A 3B
RC101 0_0402_5%~D JXDP1
1 2
RUNPWROK 10 CPU_XDP_PREQ# 3 GND0 GND1 4 CFG17
3OE OBSFN_A0 OBSFN_C0 CFG17 13
CPU_XDP_PRDY# 5 6 CFG16 CFG16 13
TRST#_XDP 12 11 CPU_XDP_TRST# 7 OBSFN_A1 OBSFN_C1 8
4A 4B CFG0 9 GND2 GND3 10 CFG8
Place near JXDP1 13 CFG0
CFG1 11 OBSDATA_A0 OBSDATA_C0 12 CFG9
CFG8 13
13 CFG1 OBSDATA_A1 OBSDATA_C1 CFG9 13
RUNPWROK 13 7 13 14
37,38 RUNPWROK 4OE GND GND4 GND5
13 CFG2 CFG2 15 16 CFG10 CFG10 13
15 CFG3 17 OBSDATA_A2 OBSDATA_C2 18 CFG11
GND PAD 13 CFG3 OBSDATA_A3 OBSDATA_C3 CFG11 13
19 20
XDP_OBS0_R 21 GND6 GND7 22 CFG19
OBSFN_B0 OBSFN_D0 CFG19 13
XDP_OBS1_R 23 24 CFG18 CFG18 13
74CBTLV3126BQ_DHVQFN14_2P5X3 OBSFN_B1 OBSFN_D1
25 26
reference Shark Bay ULT Validation Customer Debug Port CFG4 27 GND8 GND9 28 CFG12
13 CFG4 OBSDATA_B0 OBSDATA_D0 CFG12 13
Implementation Requirement Rev 1.0 13 CFG5 CFG5 29 30 CFG13 CFG13 13
31 OBSDATA_B1 OBSDATA_D1 32
RC5 need to close to JCPU1 GND10 GND11
2 XDP@ 1 CPU_XDP_TRST# 13 CFG6 CFG6 33 34 CFG14 CFG14 13
6 PCH_JTAG_TRST# OBSDATA_B2 OBSDATA_D2
0_0402_5%~D RC135 RC105 1 XDP@ 2 1K_0402_1%~D 13 CFG7 CFG7 35 36 CFG15 CFG15 13
15 H_VCCST_PWRGD OBSDATA_B3 OBSDATA_D3
37 38
2 XDP@ 1 CPU_XDP_TCLK H_CPUPWRGD @ RC106 1 2 1K_0402_1%~D H_VCCST_PWRGD_XDP 39 GND12 GND13 40
6 PCH_JTAG_JTAGX PWRGOOD/HOOK0 ITPCLK/HOOK4
0_0402_5%~D RC97 RC107 1 @ 2 0_0402_5% CFD_PWRBTN#_XDP 41 42
38,9 SIO_PWRBTN# HOOK1 ITPCLK#/HOOK5
43 44
2 1 TDO_XDP RC108 1 @ 2 0_0402_5% CPU_PWR_DEBUG#_R 45 VCC_OBS_AB VCC_OBS_CD 46 XDP_RST#_R 2 XDP@ 1 PCH_PLTRST#_EC
15 CPU_PWR_DEBUG# HOOK2 RESET#/HOOK6
0_0402_5%~D RC123 @ RC110 1 @ 2 0_0402_5% SYS_PWROK_XDP 47 48 XDP_DBRESET# RC109 1K_0402_1%~D
B 37,9 SYS_PWROK HOOK3 DBR#/HOOK7 B
49 50
PCH_JTAG_TDO 2 1 TDI_XDP_R RC111 1 @ 2 0_0402_5% DDR_XDP_SMBDAT_R1 51 GND14 GND15 52 TDO_XDP
18,19,20,25,31,7 DDR_XDP_WAN_SMBDAT SDA TD0
0_0402_5%~D RC104 @ RC112 1 @ 2 0_0402_5% DDR_XDP_SMBCLK_R1 53 54 TRST#_XDP
18,19,20,25,31,7 DDR_XDP_WAN_SMBCLK SCL TRST#
RC142 1 @ 2 0_0402_5% PCH_JTAG_TCK_R 55 56 TDI_XDP
6 PCH_JTAG_TCK TCK1 TDI
PCH_JTAG_TCK 2 1 CPU_XDP_TCLK CPU_XDP_TCLK 57 58 TMS_XDP
0_0402_5%~D RC124 @ 59 TCK0 TMS 60 CFG3_R 1 XDP@ 2 CFG3
+1.05V_VCCST GND16 GND17 RC99 1K_0402_1%~D
SAMTE_BSH-030-01-L-D-A CONN@ +1.05V_RUN
1 2 H_CATERR#
@ RC113 49.9_0402_1%~D @
1 2 H_PROCHOT# TDO_XDP RC280 2 1 51_0402_1%~D
RC114 62_0402_5%~D +3.3V_ALW_PCH
2
XDP@
RC102
1K_0402_1%~D Place near JXDP1.48
XDP_DBRESET#
0.01U_0402_16V7K~D
H_CPUPWRGD
SYS_PWROK_XDP 1
10K_0402_5%~D
PU/PD for JTAG signals

1
CC68 XDP@
1 @
HASWELL_MCP_E
RC115
reference CRB UC1B CC48

0.1U_0402_25V6K~D 2 +3.3V_RUN
CPU_DETECT# D61 2
Place near JXDP1.47
2
37 CPU_DETECT# H_CATERR# K61 PROC_DETECT XDP_DBRESET# RC116 2 1 1K_0402_1%~D

MISC
PECI_EC N62 CATERR J62 CPU_XDP_PRDY#
38 PECI_EC PECI PRDY K62 CPU_XDP_PREQ#
JTAG
PREQ E60 CPU_XDP_TCLK +1.05V_RUN
PROC_TCK E61 CPU_XDP_TMS
CAD Note: 1 2H_PROCHOT#_R K63 PROC_TMS E59 CPU_XDP_TRST# CPU_XDP_TMS @ RC118 2 1 51_0402_1%~D
38,56,58,59 H_PROCHOT# PROCHOT PROC_TRST
Avoid stub in the PWRGD path RC117 56_0402_5%~D THERMAL F63 CPU_XDP_TDI_R RC209 1 @ 2 0_0402_5% CPU_XDP_TDI
PROC_TDI F62 CPU_XDP_TDO_R RC208 1 @ 2 0_0402_5% CPU_XDP_TDO CPU_XDP_TDI @ RC119 2 1 51_0402_1%~D
while placing resistors RC115 PROC_TDO For ESD concern,place RC209,
H_CPUPWRGD C61 RC208, RC194, RC204 near to CPU CPU_XDP_PREQ# @ RC120 2 1 51_0402_1%~D
PROCPWRGD PWR RC121
J60 BPM#0 RC194 1 @ 2 0_0402_5% XDP_OBS0_R 1 @ 2 0_0402_5%~D CPU_XDP_TDO RC122 2 1 51_0402_1%~D
DDR3 COMPENSATION SIGNALS BPM#0
BPM#1
H60 BPM#1 RC204 1 @ 2 0_0402_5% XDP_OBS1_R
H61
BPM#2 H62
A 200_0402_1%~D 2 1RC125 SM_RCOMP0 SM_RCOMP0 AU60
SM_RCOMP0
BPM#3
BPM#4
K59 EMI CPU_XDP_TCLK RC127 2 1 51_0402_1%~D A
SM_RCOMP1 AV60 DDR3 H63
121_0402_1% 2 1RC129 SM_RCOMP1 SM_RCOMP2 AU61 SM_RCOMP1 BPM#5 K60 CPU_XDP_TRST# @ RC131 2 1 51_0402_1%~D
AV15 SM_RCOMP2 BPM#6 J61
18 DDR3_DRAMRST#_CPU SM_DRAMRST BPM#7
100_0402_1%~D 2 1RC133 SM_RCOMP2 18 DDR_PG_CTRL AV61
SM_PG_CNTL1
CAD Note: 2 OF 19 Rev1p2
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(4/12) PM, JTAG,MISC
0.5
5 4 3 2 1
5 4 3 2 1
HASWELL_MCP_E
UC1A
Intel check list has updated correctly

DDI1_LANE_N0 C54 C45 EDP_CPU_LANE_N0 COMPENSATION PU FOR eDP
21 DDI1_LANE_N0 DDI1_LANE_P0 C55 DDI1_TXN0 EDP_TXN0 B46 EDP_CPU_LANE_P0 EDP_CPU_LANE_N0 20 follow intel feedback
21 DDI1_LANE_P0 DDI1_LANE_N1 B58 DDI1_TXP0 EDP_TXP0 A47 EDP_CPU_LANE_N1 EDP_CPU_LANE_P0 20
21 DDI1_LANE_N1 DDI1_LANE_P1 C58 DDI1_TXN1 EDP_TXN1 B47 EDP_CPU_LANE_P1 EDP_CPU_LANE_N1 20 +VCCIOA_OUT
21 DDI1_LANE_P1 DDI1_LANE_N2 B55 DDI1_TXP1 EDP_TXP1 EDP_CPU_LANE_P1 20
DP HUB <----- 21 DDI1_LANE_N2 DDI1_LANE_P2 A55 DDI1_TXN2 C47
21 DDI1_LANE_P2 DDI1_LANE_N3 A57 DDI1_TXP2 EDP_TXN2 C46 EDP_COMP 2 1
21 DDI1_LANE_N3 DDI1_LANE_P3 B57 DDI1_TXN3 EDP_TXP2 A49 24.9_0402_1%~D RC134
21 DDI1_LANE_P3 DDI1_TXP3 DDI EDP EDP_TXN3 B49
D TMDS_N2 C51 EDP_TXP3 D
23 TMDS_N2 TMDS_P2 C50 DDI2_TXN0 A45 EDP_CPU_AUX#
CAD Note:Trace width=20 mils ,Spacing=25mil,
23 TMDS_P2 DDI2_TXP0 EDP_AUXN EDP_CPU_AUX# 20
23 TMDS_N1
TMDS_N1 C53
DDI2_TXN1 EDP_AUXP
B45 EDP_CPU_AUX
EDP_CPU_AUX 20
Max length=100 mils.
TMDS_P1 B54
23 TMDS_P1 TMDS_N0 C49 DDI2_TXP1 D20 EDP_COMP
HDMI<----- 23 TMDS_N0 TMDS_P0 B50 DDI2_TXN2 EDP_RCOMP A43
23 TMDS_P0 TMDS_CLK# A53 DDI2_TXP2 EDP_DISP_UTIL
23 TMDS_CLK# TMDS_CLK B53 DDI2_TXN3
23 TMDS_CLK DDI2_TXP3
+3.3V_RUN
1 2 ODD_DA# 1 OF 19 Rev1p2
RC137 100K_0402_5%~D +3.3V_RUN
1 2 TOUCHPAD_INTR# RP1
RC140 10K_0402_5%~D 2.2K_0804_8P4R_5%
CPU_DPB_CTRLCLK 8 1
Intel WW18 Strapping option CPU_DPB_CTRLDAT 7 2
HASWELL_MCP_E
1 2 PIRQ#_TPM UC1I TMDS_DDC_SCL 6 3
RC146 10K_0402_5%~D TMDS_DDC_SDA 5 4
1 2 PIRQD
RC148 10K_0402_5%~D EDP_BIA_PWM Intel WW18 Strapping option
20 EDP_BIA_PWM CPU_DPB_AUX# 2 1
B8 B9 CPU_DPB_CTRLCLK 2
CPU_DPC_AUX# 100K_0402_5%~D 1RC147
reference 0.55 design chane log WW23_2 PANEL_BKLEN A9 EDP_BKLCTL DDPB_CTRLCLK C9 CPU_DPB_CTRLDAT 100K_0402_5%~D RC149
20 PANEL_BKLEN ENVDD_PCH C6 EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA D9 TMDS_DDC_SCL
20,37 ENVDD_PCH EDP_VDDEN DDPC_CTRLCLK D11 TMDS_DDC_SDA TMDS_DDC_SCL 23
DDPC_CTRLDATA TMDS_DDC_SDA 23
26 ODD_DA# ODD_DA# U6
12,37,60,62 DGPU_PWROK DGPU_PWROK P4 PIRQA/GPIO77 C5 CPU_DPB_AUX#
C PIRQB/GPIO78 DISPLAY DDPB_AUXN CPU_DPB_AUX# 21 C
0_0402_5%~D 1 2 R73 PIRQ#_TPM N4 B6 CPU_DPC_AUX#
HDD_FALL_INT 0_0402_5%~D 1 @ 2 R75 PIRQD N2 PIRQC/GPIO79 DDPC_AUXN B5 CPU_DPB_AUX DPB_HPD 2 1
12,25 HDD_FALL_INT AD4 PIRQD/GPIO80 DDPB_AUXP A6 CPU_DPC_AUX CPU_DPB_AUX 21
@ 100K_0402_5%~D RC156
1 2 ENVDD_PCH PME GPIO DDPC_AUXP CPU_DPB_AUX 2 1
RC152 100K_0402_5%~D TOUCHPAD_INTR# U7 2
CPU_DPC_AUX 100K_0402_5%~D 1 RC153
2 @ 1 CODEC_IRQ TOUCH_RST_N_GYRO_INT1 L1 GPIO55 100K_0402_5%~D RC155
12 TOUCH_RST_N_GYRO_INT1 L3 GPIO52 C8
RC154 1K_0402_1%~D DGPU_PWR_EN DPB_HPD
1 2 DGPU_PWR_EN 49 DGPU_PWR_EN DGPU_CORE_EN R5 GPIO54 DDPB_HPD A8 TMDS_HPD DPB_HPD 21
60 DGPU_CORE_EN CODEC_IRQ L4 GPIO51 DDPC_HPD D6 EDP_CPU_HPD TMDS_HPD 23
RC306 10K_0402_5%~D
1 2 DGPU_CORE_EN GPIO53 EDP_HPD EDP_CPU_HPD 20
RC305 10K_0402_5%~D
100K_0402_5%~D
1
RC158
9 OF 19 Rev1p2
reference PDG 0.9
2
B B
A A
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(5/12) DDI,EDP,GPIO
0.5
5 4 3 2 1
5 4 3 2 1
PEG_GTX_C_HRX_N[0..3]
42 PEG_GTX_C_HRX_N[0..3]
PEG_GTX_C_HRX_P[0..3]
42 PEG_GTX_C_HRX_P[0..3]
PEG_HTX_C_GRX_N[0..3]
D 42 PEG_HTX_C_GRX_N[0..3] D
PEG_HTX_C_GRX_P[0..3]
42 PEG_HTX_C_GRX_P[0..3]
PEG_GTX_C_HRX_N0_M R101 1 UMA@ 2 0_0402_5%~D PEG_GTX_C_HRX_N0_R

32 PEG_GTX_C_HRX_N0_M PEG_GTX_C_HRX_P0_M R100 1 UMA@ 2 0_0402_5%~D PEG_GTX_C_HRX_P0_R
32 PEG_GTX_C_HRX_P0_M
PEG_HTX_GRX_N0_M R102 1 UMA@ 2 0_0402_5%~D PEG_HTX_GRX_N0
32 PEG_HTX_GRX_N0_M PEG_HTX_GRX_P0_M R104 1 UMA@ 2 0_0402_5%~D PEG_HTX_GRX_P0
32 PEG_HTX_GRX_P0_M
HASWELL_MCP_E
UC1K
PEG_GTX_C_HRX_N0 R106 1 DIS@ 2 0_0402_5%~D PEG_GTX_C_HRX_N0_R F10 AN8 USBP0-

PERN5_L0 USB2N0 USBP0- 36
PEG_GTX_C_HRX_P0 R105 1 DIS@ 2 0_0402_5%~D PEG_GTX_C_HRX_P0_R E10
PERP5_L0 USB2P0
AM8 USBP0+
USBP0+ 36
----->Ext Port 1(I/O) RIGHT
PEG_HTX_C_GRX_N0 CU16 1 2 DIS@ 0.1U_0402_10V7K~D PEG_HTX_GRX_N0 C23 AR7 USBP1-
PETN5_L0 USB2N1 USBP1- 34
PEG_HTX_C_GRX_P0 CU17 1 2 DIS@ 0.1U_0402_10V7K~D PEG_HTX_GRX_P0 C22
PETP5_L0 USB2P1
AT7 USBP1+
USBP1+ 34 ----->Ext Port 2 (MB/Debug Port) LEFT
PEG_GTX_C_HRX_N1 F8 AR8 USBP2-
PEG_GTX_C_HRX_P1 E8 PERN5_L1 USB2N2 AP8 USBP2+ USBP2- 36
PERP5_L1 USB2P2 USBP2+ 36 ----->Ext Port 3 (USB/B) REAR
C PEG_HTX_C_GRX_N1 CU18 1 2 DIS@ 0.1U_0402_10V7K~D PEG_HTX_GRX_N1 B23 AR10 DOCK_USBP1- C
PETN5_L1 USB2N3 DOCK_USBP1- 35
PEG_HTX_C_GRX_P1 CU19 1 2 DIS@ 0.1U_0402_10V7K~D PEG_HTX_GRX_P1 A23
PETP5_L1 USB2P3
AT10 DOCK_USBP1+
DOCK_USBP1+ 35
----->E-DOCK1
GPU -->
PEG_GTX_C_HRX_N2 H10 AM15 DOCK_USBP2-
PEG_GTX_C_HRX_P2 G10 PERN5_L2 USB2N4 AL15 DOCK_USBP2+ DOCK_USBP2- 35
PERP5_L2 USB2P4 DOCK_USBP2+ 35 ----->E-DOCK2
PEG_HTX_C_GRX_N2 CU20 1 2 DIS@ 0.1U_0402_10V7K~D PEG_HTX_GRX_N2 B21 AM13 USBP5-
PEG_HTX_C_GRX_P2 CU21 1 2 DIS@ 0.1U_0402_10V7K~D PEG_HTX_GRX_P2 C21 AN13 USBP5+
PETP5_L2 USB2P5 USBP5+ 20 ----->Camera
PEG_GTX_C_HRX_N3 E6 AP11 USBP6-
PEG_GTX_C_HRX_P3 F6 PERN5_L3 USB2N6 AN11 USBP6+ USBP6- 22
PERP5_L3 USB2P6 USBP6+ 22 ----->Touch Screen
PEG_HTX_C_GRX_N3 CU22 1 2 DIS@ 0.1U_0402_10V7K~D PEG_HTX_GRX_N3 B22 AR13 USBP7-
PEG_HTX_C_GRX_P3 CU23 1 2 DIS@ 0.1U_0402_10V7K~D PEG_HTX_GRX_P3 A21
PETP5_L3 USB2P7
AP13 USBP7+
USBP7+ 33
----->HUB
PCIE_PRX_GLANTX_N3 G11
28 PCIE_PRX_GLANTX_N3 F11 PERN3 G20
PCIE_PRX_GLANTX_P3 USB3RN0 USBRBIAS
28 PCIE_PRX_GLANTX_P3 PERP3 USB3RN1 H20 USB3RN0 34
10/100/1G LAN ---> USB3RP0
USB3RP1 USB3RP0 34
22.6_0402_1%~D
PCIE_PTX_GLANRX_N3 C29
28 PCIE_PTX_GLANRX_N3 PETN3 ----->Ext USB3 Port 1
1
PCIE_PTX_GLANRX_P3 B30 PCIe USB C33 USB3TN0
28 PCIE_PTX_GLANRX_P3 PETP3 USB3TN1 USB3TN0 34
RC159
B34 USB3TP0
F13 USB3TP1 USB3TP0 34
PCIE_PRX_WLANTX_N4
31 PCIE_PRX_WLANTX_N4 PCIE_PRX_WLANTX_P4 G13 PERN4 E18 USB3RN1
31 PCIE_PRX_WLANTX_P4 PERP4 USB3RN2 F18 USB3RN1 34
WLAN (Mini Card 2)---> USB3RP1
2
PCIE_PTX_WLANRX_N4 B29 USB3RP2 USB3RP1 34
31 PCIE_PTX_WLANRX_N4 PCIE_PTX_WLANRX_P4 A29 PETN4 B33 USB3TN1 ----->Ext USB3 Port 2 IO/B
31 PCIE_PTX_WLANRX_P4 PETP4 USB3TN2 A33 USB3TN1 34
USB3TP1
USB3TP2 USB3TP1 34
PCIE_PRX_MMITX_N1 G17
30 PCIE_PRX_MMITX_N1 PCIE_PRX_MMITX_P1 F17 PERN1/USB3RN3
30 PCIE_PRX_MMITX_P1 PERP1/USB3RP3 CAD NOTE:
MMI PCIE <----- PCIE_PTX_MMIRX_N1 C30 Route single-end 50-ohms and max 500-mils length.
30 PCIE_PTX_MMIRX_N1 PCIE_PTX_MMIRX_P1 C31 PETN1/USB3TN3 AJ10 USBRBIAS Avoid routing next to clock pins or under stitching capacitors.
B 30 PCIE_PTX_MMIRX_P1 PETP1/USB3TP3 USBRBIAS AJ11 B
USBRBIAS Recommended minimum spacing to other signal traces is 15 mils.
F15 AN10
35 USB3RN4 G15 PERN2/USB3RN4 RSVD AM10
35 USB3RP4 PERP2/USB3RP4 RSVD
E-Dock USB3.0<----- B31
35 USB3TN4 A31 PETN2/USB3TN4
35 USB3TP4 PETP2/USB3TP4 AL3 USB_OC0#
OC0/GPIO40 AT1 USB_OC1# USB_OC0# 12,36
OC1/GPIO41 AH2 USB_OC2# USB_OC1# 12,34
E15 OC2/GPIO42 AV3 USB_OC2# 12,36
reference CRB 3.01K 1% USB_OC3#
E13 RSVD OC3/GPIO43 USB_OC3# 12
RC161 1 2 3.01K_0402_1%~D PCH_PCIE_RCOMP A27 RSVD
+PCH_AUSB3PLL PCIE_RCOMP
RC163 1 @ 2 0_0402_5% PCH_PCIE_IREF B27
PCIE_IREF
11 OF 19 Rev1p2
A A
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(6/12) PCIE,USB
0.5
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
reference PDG0.9
+1.05V_VCCST
2 1 MPHYP_PWR_EN H_THERMTRIP# 2 1
RC170 100K_0402_5%~D 1K_0402_5%~D R24
2 1 SIO_EXT_SCI#
RC199 100K_0402_5%~D
PCH_OPI_COMP 1 2
49.9_0402_1%~D RC168
+PCH_VCCDSW3_3
D HASWELL_MCP_E D
2 1 PM_LANPHY_ENABLE UC1J
RC197 10K_0402_5%~D
2 1 EC_WAKE# 2 @ 1 LAN_WAKE#
LAN_WAKE# 28,38
RC206 10K_0402_5%~D RC211 0_0402_5%
PCH_AUDIO_EN P1 D60 H_THERMTRIP#_R 0_0402_5% 2 @ 1 RC172

12 PCH_AUDIO_EN SIO_EXT_WAKE# AU2 BMBUSY/GPIO76 THERMTRIP V4 SIO_RCIN# H_THERMTRIP# 38
+3.3V_ALW_PCH suppoer DSW mode 37 SIO_EXT_WAKE# PM_LANPHY_ENABLEAM7 GPIO8 RCIN/GPIO82 T4 IRQ_SERIRQ SIO_RCIN# 38,9
+3.3V_RUN
28 PM_LANPHY_ENABLE PCH_GPIO15 AD6 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ AW15 PCH_OPI_COMP IRQ_SERIRQ 29,37,38,9
Y1 GPIO15 MISC PCH_OPI_RCOMP AF20
2 1 MEDIACARD_PWREN_R 28 LAN_RST# SC48M_CLK_EN T3 GPIO16 RSVD AB21
36 SC48M_CLK_EN PCH_GPIO24 AD5 GPIO17 RSVD USB_MCARD1_DET# 2 1
RC175 10K_0402_5%~D
EC_WAKE# AN5 GPIO24 100K_0402_5%~D R459
38 EC_WAKE# AD7 GPIO27
PCH_GPIO28
PCH_GPIO26 AN3 GPIO28 FFS_INT2 2 1
+3.3V_ALW_PCH @ T191 GPIO26 R6 PCH_GPIO83 100K_0402_5%~D RC183
MEDIACARD_RST# AG6 GSPI0_CS/GPIO83 L6 PCH_GPIO84 PCIE_MCARD1_DET# 2 1
+PCH_VCCDSW3_3 RP12 1 2 MEDIACARD_PWREN_RAP1 GPIO56 GSPI0_CLK/GPIO84 N6 PCH_GPIO85
RC181 @ 0_0402_5% 100K_0402_5%~D RC185
5 4 SIO_EXT_SMI# 30 MEDIACARD_PWREN SLATE_MODE_R AL4 GPIO57 GSPI0_MISO/GPIO85 L8 BBS_BIT CAM_MIC_CBL_DET# 2 1
6 3 USB_OC1# PCH_GPIO59 AT5 GPIO58 GSPI0_MOSI/GPIO86 R7 PCH_GPIO87 10K_0402_5%~D RP8 RC193
7 2 USB_OC1# 11,34 AK4 GPIO59 GSPI1_CS/GPIO87 L5
PCH_PCIE_WAKE# PCH_GPIO44 2.2K_0804_8P4R_5%
8 1 PCH_BATLOW# PCH_PCIE_WAKE# 38,9 30 MEDIACARD_IRQ# AB6 GPIO44 GPIO GSPI1_CLK/GPIO88 N7 I2C0_SDA 8 1
PCH_BATLOW# 9 GPIO47 GSPI1_MISO/GPIO89 3.3V_TS_EN 22
0_0402_5%~D 1 @ 2 R76 PCH_GPIO48 U4 K2 I2C0_SCL 7 2
HDD_FALL_INT DGPU_HOLD_RST# Y3 GPIO48 GSPI_MOSI/GPIO90 J1 PCIE_MCARD1_DET# 3.3V_HDD_EN 25 I2C1_SCL_TCH_PAD 6 3
10K_8P4R_5% 10,25 HDD_FALL_INT 42 DGPU_HOLD_RST# TOUCH_PANEL_INTR# P3 GPIO49 UART0_RXD/GPIO91 K3 USB_MCARD1_DET# PCIE_MCARD1_DET# 31 I2C1_SDA_TCH_PAD 5 4
22 TOUCH_PANEL_INTR# Y2 GPIO50 UART0_TXD/GPIO92 J2 USB_MCARD1_DET# 31,37
MPHYP_PWR_EN PCH_GPIO93
+3.3V_ALW_PCH 40 MPHYP_PWR_EN KB_DET# AT3 HSIOPC/GPIO71 LPIO UART0_RTS/GPIO93 G1 PCH_GPIO94 TPM_ID0 2 1
39 KB_DET# PCH_GPIO14 AH4 GPIO13 UART0_CTS/GPIO94 K4 PCH_GPIO0 10K_0402_5%~D RC284
RP13 AM4 GPIO14 UART1_RXD/GPIO0 G2 2 1
3.3V_CAM_EN# FFS_INT2 TPM_ID1
+PCH_VCCDSW3_3 5 4 20 3.3V_CAM_EN# AG5 GPIO25 UART1_TXD/GPIO1 J3 FFS_INT2 25
SIO_EXT_WAKE# SIO_EXT_SMI# LCD_CBL_DET# 20K_0402_5%~D RC285
6 3 USB_OC3# 38 SIO_EXT_SMI# PCH_GPIO46 AG3 GPIO45 UART1_RST/GPIO2 J4 PCH_GPIO3 LCD_CBL_DET# 20 SLP_ME_CSW_DEV# 2 1
7 2 PCH_GPIO73 USB_OC3# 11 GPIO46 UART1_CTS/GPIO3 F2 I2C0_SDA 10K_0402_5%~D RC289
C 8 1 AC_PRESENT PCH_GPIO73 7 PCH_GPIO9 AM3 I2C0_SDA/GPIO4 F3 I2C0_SCL PCH_GPIO83 2 1 C
AC_PRESENT 38,9 PCH_GPIO10 AM2 GPIO9 I2C0_SCL/GPIO5 G4 I2C1_SDA_TCH_PAD 10K_0402_5%~D RC290
mSATA_DEVSLP P2 GPIO10 I2C1_SDA/GPIO6 F1 I2C1_SCL_TCH_PAD PCH_GPIO84 2 1
10K_8P4R_5% 31 mSATA_DEVSLP C4 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 E3
PCH_GPIO70 10K_0402_5%~D RC291
2 1 3.3V_CAM_EN# HDD_DEVSLP L2 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 F4 CAM_MIC_CBL_DET# PCH_GPIO48 2 1
25 HDD_DEVSLP SIO_EXT_SCI# N5 DEVSLP1/GPIO38 SDIO_CMD/GPIO65 D3 PCH_GPIO66 CAM_MIC_CBL_DET# 20
RC198 100K_0402_5%~D 10K_0402_5%~D RC292
2 1 38 SIO_EXT_SCI# V2 DEVSLP2/GPIO39 SDIO_D0/GPIO66 E4
MPHYP_PWR_EN SPKR TPM_ID0
27 SPKR SPKR/GPIO81 SDIO_D1/GPIO67
@
RC169
R C169 10K_0402_5%~D C3 TPM_ID1
SDIO_D2/GPIO68 E2 SLP_ME_CSW_DEV# 3.3V_TS_EN 2 1
SDIO_D3/GPIO69 SLP_ME_CSW_DEV# 37
10K_0402_5%~D RC282
10 OF 19 Rev1p2
+3.3V_RUN
RP9
+3.3V_ALW_PCH PCH_GPIO85 5 4
I2C1_SDA_TCH_PAD 0_0402_5% 2 @ 1 RC174 TOUCH_RST_N_GYRO_INT1 6 3
RP14 I2C1_SDA_VMM 21 10 TOUCH_RST_N_GYRO_INT1 3.3V_HDD_EN 7 2
4 5 KB_DET# I2C1_SCL_TCH_PAD 0_0402_5% 2 @ 1 RC176 LCD_CBL_DET# 8 1
3 6 I2C1_SCL_VMM 21
SLATE_MODE_R
2 7 SWCLK_REQ#
+3.3V_RUN SWCLK_REQ# 32,7 I2C1_SDA_TCH_PAD 39 10K_8P4R_5%
1 8 USB_OC2#
+3.3V_ALW_PCH USB_OC2# 11,36
I2C1_SCL_TCH_PAD 39 +3.3V_ALW_PCH
10K_8P4R_5% RP10
PCH_GPIO9 5 4
MEDIACARD_IRQ# 6 3
+3.3V_RUN +3.3V_RUN PCH_GPIO44 7 2
8 1 USB_OC0#
+3.3V_ALW_PCH USB_OC0# 11,36
1
@
1K_0402_1%~D
10K_0402_5%~D
10K_8P4R_5%
@RC283
@
RC218
RC283
+3.3V_RUN +3.3V_RUN
+3.3V_ALW_PCH RP11
+3.3V_RUN
B MINI2CLK_REQ# 5 4 B
2
31,7 MINI2CLK_REQ# 6 3
DGPU_PWROK
10,37,60,62 DGPU_PWROK
1
1
1K_0402_1%~D
1K_0402_1%~D
PCH_GPIO66 BBS_BIT DGPU_HOLD_RST# 7 2
2
@ RC222
PCH_AUDIO_EN 8 1
12 PCH_AUDIO_EN
1
1K_0402_1%~D
RC190
RC315
1
@ RC288
1K_0402_1%~D
10K_0402_5%~D 10K_8P4R_5%
@ RC287
1
PCH_GPIO15 SPKR TOUCH_PANEL_INTR#
2
2
GPIO66 GPIO86 GPIO15 GPIO81 RC324
10K_0402_5%~D
@ RC85
PCH_GPIO83 1 @ 2
TOP-BLOCK SWAP OVERRIDE BOOT BIOS STRAP BIT BBS TLS CONFIDENTIALITY NO REBOOT STRAP
1
HIGH depop RC288 (DEFAULT) HIGH LPC HIGH HIGH 100_0402_1%~D
LOW pop RC288 LOW(DEFAULT) SPI LOW(DEFAULT) LOW(DEFAULT)

+3.3V_ALW_PCH
1
10K_0402_5%~D
RC230
2
PCH_GPIO46
A A
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(7/12) GPIO, LPIO, MISC
0.5
5 4 3 2 1
5 4 3 2 1
CFG STRAPS for CPU

D D
CFG0
1K_0402_1%~D
1
@ RC232
2
UC1S HASWELL_MCP_E
EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKE
1:(Default) Normal Operation; No stall
CFG0
0:Lane Reversed
CFG0 AC60 AV63
9 CFG0 CFG1 AC62 CFG0 RSVD_TP AU63
9 CFG1 AC63 CFG1 RSVD_TP
9 CFG2 AA63 CFG2
9 CFG3 AA60 CFG3 C63
CFG4
9 CFG4 Y62 CFG4 RSVD_TP C62 CFG1
9 CFG5 Y61 CFG5 RSVD_TP B43
9 CFG6 CFG6 RSVD
1K_0402_1%~D
Y60
9 CFG7 CFG7
1
CFG8 V62 A51
9 CFG8 CFG8 RSVD_TP
@ RC233
CFG9 V61 B51
9 CFG9 CFG10 V60 CFG9 RSVD_TP
C 9 CFG10 U60 CFG10 L60 C
9 CFG11 T63 CFG11 RESERVED RSVD_TP
2
9 CFG12 T62 CFG12 N60
9 CFG13 T61 CFG13 RSVD
9 CFG14 T60 CFG14 W23
9 CFG15 CFG15 RSVD Y22
AA62 RSVD AY15 PROC_OPI_RCOMP
9 CFG16 U63 CFG16 PROC_OPI_RCOMP
9 CFG18 AA61 CFG18 AV62 PCH/PCH LESS MODE SELECTION
9 CFG17 U62 CFG17 RSVD D58
9 CFG19 CFG19 RSVD
CFG_RCOMP V63 P22 1:(Default) Normal Operation
CFG_RCOMP VSS N21 CFG1
A5 VSS 0:Lane Reversed
RSVD P20
E1 RSVD R20
D1 RSVD RSVD
J20 RSVD
H18 RSVD
TDI_IREF B12 RSVD
TD_IREF
19 OF 19 Rev1p2
2 1 CFG_RCOMP
RC235 49.9_0402_1%~D
1 2 TDI_IREF PROC_OPI_RCOMP 1 2
RC236 8.2K_0402_1% 49.9_0402_1%~D RC237
B B
CFG4
1K_0402_1%~D
CFG9 CFG8
1
CFG10
1
1
1K_0402_1%~D
1K_0402_1%~D
RC238
1
1K_0402_1%~D
@ RC240
@ RC241
@ RC239
2
2
2
2
Display Port Presence Strap

NO SVID PROTOCOL CAPABLE VR CONNECTED ALLOW THE USE OF NOA ON LOCKED UNITS
SAFE MODE BOOT 1 : Disabled; No Physical Display Port
1: VRS support SVID protocol are present 1: Enable(Default): Noa will be disable in
1: POWER FEATURES ACTIVATED DURING CFG4 attached to Embedded Display Port
0:No VR support SVID is present locked units and enable in un-locked units
RESET CFG9 CFG8 0 : Enabled; An external Display Port device is
A CFG10 The chip will not generate(OR Respond to) 0: Enable Noa will be available pegardless of A
0: POWER FEATURES (ESPECIALLY CLOCK connected to the Embedded Display Port
SVID activity the locking of the unit
GATINE ARE NOT ACTIVATED
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(8/12) CFG, RSVD
0.5
5 4 3 2 1
5 4 3 2 1
D D
1
1 2
@RC139
@ RC139 0_0402_5%~D
HASWELL_MCP_E
UC1Q
DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3

DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 DC_TEST_A4
DC_TEST_AY60 AY60 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4
DC_TEST_AY61_AW61 AY61 DAISY_CHAIN_NCTF_AY60 A60 DC_TEST_A60
DC_TEST_AY62_AW62 AY62 DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 A61 DC_TEST_A61_B61
TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_AY62
DAISY_CHAIN_NCTF_B2
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62
A62 DC_TEST_A62 1 2 2
DC_TEST_A3_B3 B3 AV1 DC_TEST_AV1 @ RC143 0_0402_5%~D
DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 DC_TEST_AW1 1 2
B62 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW2 DC_TEST_AY2_AW2 @ RC145 0_0402_5%~D
DC_TEST_B62_B63 B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW3
C1 DAISY_CHAIN_NCTF_B63
DAISY_CHAIN_NCTF_C1
DAISY_CHAIN_NCTF_AW3
AW61 DC_TEST_AY61_AW61 4
DC_TEST_C1_C2 C2 AW62 DC_TEST_AY62_AW62
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 DC_TEST_AW63
17 OF 19 Rev1p2
3
C 1 2 C
@RC141
@ RC141 0_0402_5%~D
Package Daisy Chain:

1.B2-PKG-C1-PCB-C2-PKG-B3-PCB-A3-PKG-A4
2.A62-PKG-A61-PCB-B61-PKG-B62-PCB-B63-PKG-A60
3.AY60-PKG-AW61-PCB-AY61-PKG-AW62-PCB-AY62-PKG-AW63
4.AW1-PKG-AW3-PCB-AY3-PKG-AW2-PCB-AY2-PKG-AV1
HASWELL_MCP_E
UC1R
N23
RSVD R23
RSVD T23
AT2 RSVD
RSVD U10
AU44 RSVD
AV44 RSVD
D15 RSVD
RSVD AL1
RSVD AM11
RSVD AP7
F22 RSVD
RSVD AU10
H22 RSVD
RSVD AU15
J21 RSVD
RSVD AW14
RSVD AY14
RSVD
B B
18 OF 19 Rev1p2
A A
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(9/12) TP,RSVD
0.5
5 4 3 2 1
5 4 3 2 1
+1.05V_RUN
150_0402_1%~D
1
+1.05V_RUN +VCCIO_OUT VDDQ DECOUPLING
RC253
+1.35V_MEM
Reference ULT DDRDG_080912 change to10uX6 2.2uX4
2 1
2.2U_0402_6.3V6M~D
2.2U_0402_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@ RC242 0_0603_5%~D
@
1 1 1 1 1 1 1 1 1 1
2.2U_0402_6.3V6M~D
2.2U_0402_6.3V6M~D
CPU_PWR_DEBUG#
CC81
CC52
CC12
CC13
CC16
CC17
CC18
CC19
CC20
CC21
RESISTOR STUFFING OPTIONS ARE
10K_0402_5%~D
PROVIDED FOR TESTING PURPOSES
1
2 2 2 2 2 2 2 2 2 2
@
D D
RC258
2
+1.05V_VCCST +3.3V_RUN
1
@
@
+VCC_CORE
HASWELL_MCP_E
RC255 RC259 UC1L
10K_0402_5%~D 10K_0402_5%~D
L59 C36
+1.35V_MEM J58 RSVD VCC C40
2
RSVD VCC C44
H_VR_EN 2 1 H_VR_READY AH26 VCC C48
10K_0402_5%~D RC256 AJ31 VDDQ VCC C52
AJ33 VDDQ VCC C56
+3.3V_ALW +1.05V_VCCST AJ37 VDDQ VCC E23
AN33 VDDQ VCC E25
AP43 VDDQ VCC E27
AR48 VDDQ VCC E29
VDDQ VCC
2
AY35 E31
RC243 AY40 VDDQ VCC E33
VDDQ VCC
@
UC4 1K_0402_5%~D AY44 E35
1 5 1 2 AY50 VDDQ VCC E37
RC263 NC VCC CC24 0.1U_0402_25V6K~D VDDQ VCC E39
1
2 @ 1 2 F59 VCC E41
C 38,9 RESET_OUT# A +VCC_CORE VCC VCC C
4 H_VCCST_PWRGD N58 E43
0_0402_5% 3 Y AC58 RSVD VCC E45
GND RSVD VCC E47
74AUP1G07GW_TSSOP5 VCCSENSE E63 VCC E49
AB23 VCC_SENSE VCC E51
A59 RSVD VCC E53
+VCCIO_OUT VCCIO_OUT VCC
E20 E55
+VCCIOA_OUT VCCIOA_OUT VCC
AD23 E57
AA23 RSVD VCC F24
+1.05V_VCCST AE59 RSVD VCC F28
SVID ALERT H_CPU_SVIDALRT# L62
RSVD
VIDALERT
VCC
VCC
VCC
F32
F36
75_0402_1%~D
VIDSCLK N63 F40

56 VIDSCLK VIDSCLK VCC
1
VIDSOUT L63 F44

VIDSOUT VCC
RC244
H_VCCST_PWRGD RC2451 @ 2 0_0402_5% VCCST_PWRGD B59 HSW ULT POWER F48

CAD Note: Place the PU resistors close to CPU 9 H_VCCST_PWRGD H_VR_EN RC2461 @ 2 0_0402_5% VR_EN F60 VCCST_PWRGD VCC F52
56 H_VR_EN VR_EN VCC
RC224 close to CPU 300 - 1500mils 56 H_VR_READY
H_VR_READY RC2471 @ 2 0_0402_5% VR_READY C59
VR_READY VCC
F56
G23
2
check D63 VCC G25

2 1 H_CPU_SVIDALRT# CPU_PWR_DEBUG# H59 VSS VCC G27
56 VIDALERT_N 9 CPU_PWR_DEBUG# P62 PWR_DEBUG VCC G29
43_0402_5%~D RC248
P60 VSS VCC G31
P61 RSVD_TP VCC G33
N59 RSVD_TP VCC G35
+1.05V_VCCST N61 RSVD_TP VCC G37
SVID DATA T59 RSVD_TP
RSVD
VCC
VCC
G39
110_0402_1%~D
AD60 G41
RSVD VCC
1
AD59 G43
CAD Note: Place the PU resistors close to CPU RSVD VCC
RC249
AA59 G45
RC249close to CPU 300 - 1500mils AE60 RSVD VCC G47
AC59 RSVD VCC G49
AG58 RSVD VCC G51
2
B U59 RSVD VCC G53 B

VIDSOUT V59 RSVD VCC G55
56 VIDSOUT RSVD VCC G57
AC22 VCC H23
+1.05V_VCCST VCCST VCC
AE22 J23
AE23 VCCST VCC K23
VCCST VCC K57
AB57 VCC L22
+VCC_CORE +VCC_CORE VCC VCC
AD57 M23
reference ULT CRB AG57 VCC VCC M57
VCC_SENSE C24 VCC
VCC
VCC
VCC
P57
100_0402_1%~D
C28 U57
VCC VCC
1
C32 W57
VCC VCC
RC250
12 OF 19 Rev1p2
2
+1.05V_RUN @ +1.05V_VCCST
PJP11
VCCSENSE 1 2
56 VCCSENSE
22U_0603_6.3V6M~D
1U_0402_6.3V6K
@
CAD Note: RC250 SHOULD BE PLACED CLOSE TO CPU PAD-OPEN1x1m 1 1

CC50
CC26
2 2
A A
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(10/12) Power
0.5
5 4 3 2 1
5 4 3 2 1
+1.05V_MODPHY +1.05V_MODPHY_PCH
1 @ 2
RC262 0_0805_5% +1.05V_M +1.05V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1
DeepSleep and Non-DeepSleep config:
@
CC74
CC27
CC29
CC29 place near K9;
330U_D3_2.5VY_R6M
330U_D3_2.5VY_R6M
1 @ 1 @ Config DSx Non-DSx
2 2 2
CC27 place near L10
CC73
CC71
+ +
CC74 place near M9 Pop RC86,R319,RC267 RC79,RC82,RC265
2 2
D D
Depop RC79,RC82,RC265 RC86,R319,RC267
+1.05V_MODPHY
+PCH_AUSB3PLL
LC1 22U_0603_6.3V6M~D
22U_0603_6.3V6M~D
1 2
2.2UH +-20% LQM21PN2R2MC0D 1 1
CC76
CC42
CC42 place near B18 2 2 UC1M HASWELL_MCP_E
+1.05V_MODPHY_PCH K9
+1.05V_RUN L10 VCCHSIO
VCCHSIO
1.838A
M9 +RTC_CELL
N8 VCCHSIO mPHY AH11
62mA VCCSUS3_3
VCC1_05 +PCH_RTC_VCCSUS3_3 CC35,CC38, CC39 place near AG10
1U_0402_6.3V6K~D
P9 1632mA RTC 1mA AG10
+1.05V_MODPHY +PCH_ASATA3PLL VCC1_05 VCCRTC
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1 +PCH_AUSB3PLL B18 41mA AE7 +DCPRRTC 1 2
LC2 VCCUSB3PLL DCPRTC
@
+PCH_ASATA3PLL B11 42mA CC36 1 @ 1 1
VCCSATA3PLL +3.3V_M
CC31
1 2 0.1U_0402_10V7K~D
22U_0603_6.3V6M~D
22U_0603_6.3V6M~D
CC38
CC39
CC35
2.2UH +-20% LQM21PN2R2MC0D
1 1
2 Y20 SPI 18mA Y8 CC40 place near Y8
RSVD VCCSPI 2 2 2
CC77
CC49
0.1U_0402_10V7K~D
AA21 OPI
CC49 place near B11 +V1.05S_APLLOPI W21 VCCAPLL
57mA 1
VCCAPLL
@
AG14 +1.05V_M
2 2 VCCASW
CC40
658mA AG13
VCCASW CC34 and CC33 place near +1.05V_RUN
+3.3V_ALW_PCH J13 10mA USB3 2
+PCH_DCPSUS DCPSUS3 J11 J11; CC37 place near AE8
VCC1_05
0.1U_0402_10V7K~D
H11
1632mA VCC1_05
10U_0603_6.3V6M~D
AH14 11mA AXALIA/HDA H15 +PCH_VCCDSW 2 1
+1.05V_RUN +V1.05S_APLLOPI VCCHDA VCC1_05 +1.05V_M
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C AE8 5.11_0402_1%~D RC275 C
+PCH_VCCDSW_R
LC5 1 CC44 place near AH14 VCC1_05 1 1 1
CC44
AF22
VCC1_05
22U_0805_6.3V6M~D
CC37
CC33
CC34
1 2 AH13 25mA VRM/USB2/AZALIA AG19 +PCH_VCCDSW
+3.3V_ALW_PCH DCPSUS2 DCPSUSBYP
100U_1206_6.3V6M
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2.2UH_LQM2MPN2R2NG0L_30% CORE AG20
1 1
2 DCPSUSBYP AE9 CC46 CC47 place near AE9 1 1
2 2 2
VCCASW
@
658mA VCCASW AF9
CC28 place near AC9
CC55
CC56
CC46
CC47
AC9 AG8
CC56 place near AA21 VCCSUS3_3 VCCASW
1U_0402_6.3V6K~D
AA9 62mA AD10 +PCH_DCPSUS1
2 2 +3.3V_RUN VCCSUS3_3 DCPSUS1 2 2
22U_0603_6.3V6M~D
+PCH_VCCDSW3_3 AH10 114mA 109mA AD8

V8 VCCDSW3_3 GPIO/LCC DCPSUS1
1 CC43 place near V8 VCC3_3 1
CC28
CC65
W9 41mA 3mA
VCC3_3 +3.3V_RUN
22U_0603_6.3V6M~D
J15 +1.5V_THERMAL
THERMAL SENSOR VCCTS1_5 K14
2 1 VCC3_3 CC59 place near K14 2
0.1U_0402_10V7K~D
41mA K16
VCC3_3 CC65 place near AG19
CC43
1
+1.05V_M +PCH_DCPSUS +3.3V_RUN
2 +1.05V_RUN
@
CC59
RC276 J18
1 2
+PCH_VCC1P05
K19 VCCCLK
200mA SDIO/PLSS U8 CC45 place near U8
VCCCLK VCCSDIO 2
1U_0402_6.3V6K~D
+PCH_VCCACLKPLL A20 31mA 17mA T9
0_0603_5%~D J17 VCCACLKPLL VCCSDIO +PCH_RTC_VCCSUS3_3 +3.3V_ALW_PCH
VCCCLK 1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
R21 200mA
VCCCLK
CC45
T21 LPT LP POWER 1mA 2 @ 1
1 1 1 1 1 VCCCLK
@ CC66
@ CC61
@ CC62
K18 SUS OSCILLATOR AB8 0_0402_5% RC261

RSVD DCPSUS4 +PCH_DCPSUS4 2
CC63
CC64
M20
V21 RSVD +1.05V_RUN +3.3V_ALW
2 2 2 2 2 AE20 RSVD AC20
+3.3V_ALW_PCH VCCSUS3_3 RSVD CC60 place near AG16
1U_0402_6.3V6K~D
AE21 62mA AG16 2 1
VCCSUS3_3 USB2 VCC1_05 AG17 0_0402_5%~D @ RC264
1632mA
CC66 place near AH13 CC63 close to Pin J17 VCC1_05
CC60
1 1
1U_0402_6.3V6K~D
CC61 CC62 place near J13 CC64 close to Pin R21
CC30
13 OF 19 Rev1p2
B 2 2 B
CC30 place near AH11
+3.3V_ALW_PCH +PCH_VCCDSW3_3
1 @ 2
RC265 0_0402_5%~D
+PCH_DCPSUS1 +1.05V_M
+3.3V_ALW
1U_0402_6.3V6K~D
2 1
1U_0402_6.3V6K~D
1 @ 2 0_0402_5%~D @ RC272
RC267 0_0402_5% 1 1
@ CC54
@
CC32
+1.5V_THERMAL use 20mil trace close to UC1

CC32 place near AH10 2 2
CC54 place near AD10
+1.5V_THERMAL
+1.5V_RUN +PCH_VCCDSW3_3
@
+1.05V_RUN +PCH_VCC1P05 C413
1 @ 2
RC254 0_0805_5% 1 2 +PCH_VCCDSW +PCH_DCPSUS4 @ +1.05V_M
LC3 LC4
1U_0402_6.3V6K~D
1 2 .47U_0402_10V6K 2 1
close to UC1.J15
100U_1206_6.3V6M
1U_0402_6.3V6K~D
2.2UH_LQM2MPN2R2NG0L_30% 1 1 2.2UH_LQM2MPN2R2NG0L_30%
100U_1206_6.3V6M
1 1
CC79
CC51
@
CC53
CC75
CC51 place near J18 2 2
2 2
CC53 place near AB8
A A
+PCH_VCCACLKPLL
+1.05V_RUN
LC6
1U_0402_6.3V6K~D
1 2
100U_1206_6.3V6M
2.2UH_LQM2MPN2R2NG0L_30% 1 1
PROPRIETARY NOTE:
CC78
CC58
Title
CC58 place near A20 2 2 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(11/12) Power
0.5
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. Date: Friday, August 30, 2013 Sheet 16 of 64
5 4 3 2 1
5 4 3 2 1
D D
HASWELL_MCP_E HASWELL_MCP_E
UC1N UC1O UC1P HASWELL_MCP_E
H17
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22
A32 VSS VSS AJ47 AP31 VSS VSS AW35 D39 VSS VSS K1
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D41 VSS VSS K12
A40 VSS VSS AJ52 AP39 VSS VSS AW4 D42 VSS VSS L13
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D49 VSS VSS L58
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
C AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58 C
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62 VSSSENSE
AH24 VSS VSS AN23 AU33 VSS VSS C11 VSS VSS_SENSE AH16 VSSSENSE 56
AH28 VSS VSS AN31 AU51 VSS VSS C14 16 OF 19 Rev1p2 VSS
VSS VSS VSS VSS
1
100_0402_1%~D
AH30 AN32 AU53 C18
AH32 VSS VSS AN35 AU55 VSS VSS C20
VSS VSS VSS VSS
RC260
AH34 AN36 AU57 C25
AH36 VSS VSS AN39 AU59 VSS VSS C27
AH38 VSS VSS AN40 AV14 VSS VSS C38
2
AH44 VSS VSS AN45 AV24 VSS VSS D12
CAD Note: RC260 SHOULD BE PLACED CLOSE TO CPU
B AH55 VSS VSS AN51 AV36 VSS VSS D21 B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ25 VSS VSS AP10 AV49 VSS VSS D29
VSS VSS VSS 15 OF 19 Rev1p2 VSS
14 OF 19 Rev1p2
A A
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT MCP(12/12) VSS
0.5
5 4 3 2 1
5 4 3 2 1
+DIMM1_VREF_DQ JDIMM1 H=8mm

+1.35V_MEM +1.35V_MEM 2-3A to 1 DIMMs/channel
@ JDIMM1 CONN@
1 2 1 2
+SM_VREF_DQ0_DIMM1 VREF_DQ VSS1
RD1 0_0402_5% 3 4 DDR_A_D4
VSS2 DQ4 Reverse Type
2.2U_0402_6.3V6M~D
0.1U_0402_25V6K~D
DDR_A_D0 5 6 DDR_A_D5
DDR_A_D1 7 DQ0 DQ5 8 +1.35V_MEM
9 DQ1 VSS3 10 DDR_A_DQS#0
1 1 VSS4 DQS#0
CD2
11 12 DDR_A_DQS0
DM0 DQS0
CD1
13 14
VSS5 VSS6
1
2 2 DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7 RD3
D 19 DQ3 DQ7 20 470_0402_5%~D D
DDR_A_D8 21 VSS7 VSS8 22 DDR_A_D12
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
2
All VREF traces should 25 DQ9 DQ13 26 RC279
DDR_A_DQS#1 27 VSS9 VSS10 28 1 @ 2
have 10 mil trace width DQS#1 DM1 19 DDR3_DRAMRST# DDR3_DRAMRST#_CPU 9
0.1U_0402_25V6K~D
DDR_A_DQS1 29 30 DDR3_DRAMRST#
31 DQS1 RESET# 32 0_0402_5%
DDR_A_D10 33 VSS11 VSS12 34 DDR_A_D14 @
8 DDR_A_DQS#[0..7] DQ10 DQ14 1
CD3
37 DQ11 DQ15 38
8 DDR_A_D[0..63] DDR_A_D16 39 VSS13 VSS14 40 DDR_A_D20
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21 2
8 DDR_A_DQS[0..7] 43 DQ17 DQ21 44
DDR_A_DQS#2 45 VSS15 VSS16 46
8 DDR_A_MA[0..15] DDR_A_DQS2 47 DQS#2 DM2 48
49 DQS2 VSS17 50 DDR_A_D22
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23
DQ18 DQ23 CAD NOTE
DDR_A_D19 53 54
55 DQ19 VSS19 56 DDR_A_D28 PLACE THE CAP NEAR TO
Layout Note: Note: VSS20 DQ28
DDR_A_D24 57 58 DDR_A_D29 DIMM RESET PIN
Place near JDIMM1 Check voltage tolerance of DDR_A_D25 59 DQ24 DQ29 60
VREF_DQ at the DIMM socket VSS22 DQS#3
63 64 DDR_A_DQS3
65 DM3 DQS3 66
DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
+1.35V_MEM 71 DQ27 DQ31 72
VSS25 VSS26
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
8 DDR_CKE0_DIMMA 75 CKE0 CKE1 76 DDR_CKE1_DIMMA 8
1 1 1 1 1 1 1 1 VDD1 VDD2
C 77 78 DDR_A_MA15 C
NC1 A15
CD4
CD5
CD6
CD7
CD8
CD9
CD10
CD11
DDR_A_BS2 79 80 DDR_A_MA14
8 DDR_A_BS2 81 BA2 A14 82
2 2 2 2 2 2 2 2 DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
87 A9 A7 88
DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100
+1.35V_MEM M_CLK_DDR0 101 VDD9 VDD10 102 M_CLK_DDR1
8 M_CLK_DDR0 M_CLK_DDR#0 103 CK0 CK1 104 M_CLK_DDR#1 M_CLK_DDR1 8
8 M_CLK_DDR#0 105 CK0# CK1# 106 M_CLK_DDR#1 8
DDR_A_MA10 107 VDD11 VDD12 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 8
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
DDR_A_BS0 109 110 DDR_A_RAS#

8 DDR_A_BS0 111 BA0
VDD13
RAS#
VDD14
112 DDR_A_RAS# 8
+5V_ALW +1.35V_MEM
DDR3L SODIMM ODT GENERATION
330U_D3_2.5VY_R6M
@ @ 1 DDR_A_WE# 113 114 DDR_CS0_DIMMA#

8 DDR_A_WE# DDR_A_CAS# 115 WE# S0# 116 M_ODT0 DDR_CS0_DIMMA# 8
1 1 1 1 1 1 1 1 QD1
8 DDR_A_CAS# CAS# ODT0
CD14
CD15
CD16
CD17
CD18
CD19
CD20
CD21
CD22
+ 117 118 BSS138-G_SOT23-3

VDD15 VDD16
220K_0402_5%~D
DDR_A_MA13 119 120 M_ODT1
A13 ODT1
1
DDR_CS1_DIMMA# 121 122 +SM_VREF_CA_DIMMA +SM_VREF_CA_DIMM 1 3
S
2 2 2 2 2 2 2 2 2 8 DDR_CS1_DIMMA# 123 S1# NC2 124 @ R28
125 VDD17 VDD18 126 1 2 1 2 M_ODT0
NCTEST VREF_CA
2.2U_0402_6.3V6M~D
0.1U_0402_25V6K~D
127 128 RD12 0_0402_5% R29 66.5_0402_1%
G
2
DDR_A_D32 129 VSS27 VSS28 130 DDR_A_D36 1 2 M_ODT1
2
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37 R30 66.5_0402_1%
DQ33 DQ37 1 1
CD12
CD13
133 134 1 2
DDR_A_DQS#4 135 VSS29 VSS30 136 M_ODT2 19
R31 66.5_0402_1%
DQS#4 DM4
2
DDR_A_DQS4 137 138 1 2
139 DQS4 VSS31 140 DDR_A_D38 2 2 M_ODT3 19
R32 R33 66.5_0402_1%
B DDR_A_D34 141 VSS32 DQ38 142 DDR_A_D39 @ B
Layout Note: DQ34 DQ39 2M_0402_5%~D
DDR_A_D35 143 144
Place near JDIMM1.203,204 145 DQ35 VSS33 146 DDR_A_D44
1
DDR_A_D40 147 VSS34 DQ44 148 DDR_A_D45 0.675V_DDR_VTT_ON
149 DQ40 DQ45 150 0.675V_DDR_VTT_ON 53
DDR_A_D41
153 VSS36 DQS#5 154 DDR_A_DQS5
155 DM5 DQS5 156
DDR_A_D42 157 VSS37 VSS38 158 DDR_A_D46 +1.35V_MEM
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
+0.675V_DDR_VTT 161 DQ43 DQ47 162 CD23 @
DDR_A_D48 163 VSS39 VSS40 164 DDR_A_D52 U5 0.1U_0402_25V6K~D
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53 1 5 1 2
167 DQ49 DQ53 168 NC VCC
DDR_A_DQS#6 169 VSS41 VSS42 170 2
DQS#6 DM6 9 DDR_PG_CTRL A
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
DDR_A_DQS6 171 172 4 0.675V_DDR_VTT_ON

173 DQS6 VSS43 174 DDR_A_D54 3 Y
1 1 1 1 1 1 VSS44 DQ54 GND
2
CD26
CD27
CD28
CD29
CD30
CD31
R34 0_0402_5%~D
DDR_A_D50 175 176 DDR_A_D55
DDR_A_D51 177 DQ50 DQ55 178 74AUP1G07GW_TSSOP5
179 DQ51 VSS45 180 DDR_A_D60 @
2 2 2 2 2 2 DDR_A_D56 181 VSS46 DQ60 182 DDR_A_D61
DDR_A_D57 183 DQ56 DQ61 184
1
187 VSS48 DQS#7 188 DDR_A_DQS7
189 DM7 DQS7 190
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
RD5 1 @ 2 0_0402_5% 197 VSS51 VSS52 198
199 SA0 EVENT# 200
+3.3V_RUN VDDSPD SDA DDR_XDP_WAN_SMBDAT 19,20,25,31,7,9
1 @ 2 201 202
203 SA1 SCL 204 DDR_XDP_WAN_SMBCLK 19,20,25,31,7,9
RD6 0_0402_5% 1 1 +0.675V_DDR_VTT
VTT1 VTT2
Interleaved Memory
2.2U_0402_6.3V6M~D
0.1U_0402_25V6K~D
A 205 206 A
+0.675V_DDR_VTT GND GND
CONCR_0706F0BE80F
CD25
CD24
2 2
P/N:SP07000VB00
@ DELL CONFIDENTIAL/PROPRIETARY
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT DDRIII DIMM1
5 4 3 2 1
5 4 3 2 1
JDIMM2 H=4mm 2-3A to 1 DIMMs/channel

+DIMM2_VREF_DQ +1.35V_MEM +1.35V_MEM
@ JDIMM2 CONN@
1 2 1 2
+SM_VREF_DQ1_DIMM2 VREF_DQ VSS
RD7 0_0402_5% 3 4 DDR_B_D22
VSS DQ4 Reverse Type
2.2U_0402_6.3V6M~D
0.1U_0402_25V6K~D
DDR_B_D23 5 6 DDR_B_D16
DDR_B_D17 7 DQ0 DQ5 8
9 DQ1 VSS 10 DDR_B_DQS#2
1 1 VSS DQS0#
CD33
11 12 DDR_B_DQS2
DM0 DQS0
CD32
13 14
DDR_B_D21 15 VSS VSS 16 DDR_B_D19
D 2 2 DDR_B_D18 17 DQ2 DQ6 18 DDR_B_D20 D
19 DQ3 DQ7 20
DDR_B_D2 23 DQ8 DQ12 24 DDR_B_D5
25 DQ9 DQ13 26
8 DDR_B_DQS#[0..7] 27 VSS VSS 28
DDR_B_DQS#0
DDR_B_DQS0 29 DQS1# DM1 30 DDR3_DRAMRST#
8 DDR_B_D[0..63]
All VREF traces should DQS1 RESET# DDR3_DRAMRST# 18
have 10 mil trace width Note: 31 32
VSS VSS
0.1U_0402_25V6K~D
DDR_B_D0 33 34 DDR_B_D6 1
8 DDR_B_DQS[0..7] Check voltage tolerance of DQ10 DQ14
CD34
DDR_B_D1 35 36 DDR_B_D7 @
37 DQ11 DQ15 38
8 DDR_B_MA[0..15] VREF_DQ at the DIMM socket VSS VSS
DDR_B_D12 39 40 DDR_B_D13
DDR_B_D8 41 DQ16 DQ20 42 DDR_B_D9 2
43 DQ17 DQ21 44
DDR_B_DQS#1 45 VSS VSS 46
Layout Note: DQS2# DM2
DDR_B_DQS1 47 48
Place near JDIMM2 49 DQS2 VSS 50 DDR_B_D11
DDR_B_D14 51 VSS DQ22 52 DDR_B_D10
DQ18 DQ23 CAD NOTE
DDR_B_D15 53 54
55 DQ19 VSS 56 DDR_B_D30
PLACE THE CAP NEAR TO
DDR_B_D31 57 VSS DQ28 58 DDR_B_D26 DIMM RESET PIN
DDR_B_D25 59 DQ24 DQ29 60
63 VSS DQS3# 64 DDR_B_DQS3
+1.35V_MEM 65 DM3 DQS3 66
DDR_B_D24 69 DQ26 DQ30 70 DDR_B_D28
71 DQ27 DQ31 72
VSS VSS
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1 1 1 1 1 1
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
8 DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB 8
CD35
CD36
CD37
CD38
CD39
CD40
CD41
CD42
75 76
C 77 VDD VDD 78 DDR_B_MA15 C
2 2 2 2 2 2 2 2 DDR_B_BS2 79 NC A15 80 DDR_B_MA14
8 DDR_B_BS2 81 BA2 A14 82
DDR_B_MA12 83 VDD VDD 84 DDR_B_MA11
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
87 A9 A7 88
DDR_B_MA8 89 VDD VDD 90 DDR_B_MA6
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
93 A5 A4 94
+1.35V_MEM DDR_B_MA3 95 VDD VDD 96 DDR_B_MA2
DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
99 A1 A0 100
M_CLK_DDR2 101 VDD VDD 102 M_CLK_DDR3
8 M_CLK_DDR2 CK0 CK1 M_CLK_DDR3 8
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
M_CLK_DDR#2 103 104 M_CLK_DDR#3

8 M_CLK_DDR#2 105 CK0# CK1# 106 M_CLK_DDR#3 8
VDD VDD
330U_D3_2.5VY_R6M
@ @ 1 DDR_B_MA10 107 108 DDR_B_BS1

A10/AP BA1 DDR_B_BS1 8
1 1 1 1 1 1 1 1 DDR_B_BS0 109 110 DDR_B_RAS#
8 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 8
CD45
CD46
CD47
CD48
CD49
CD50
CD51
CD52
CD62
+ 111 112
DDR_B_WE# 113 VDD VDD 114 DDR_CS2_DIMMB#
8 DDR_B_WE# DDR_B_CAS# 115 WE# S0# 116 M_ODT2 DDR_CS2_DIMMB# 8
2 2 2 2 2 2 2 2 2 8 DDR_B_CAS# 117 CAS# ODT0 118 M_ODT2 18
DDR_B_MA13 119 VDD VDD 120 M_ODT3
DDR_CS3_DIMMB# 121 A13 ODT1 122 M_ODT3 18 +SM_VREF_CA_DIMMB +SM_VREF_CA_DIMM
8 DDR_CS3_DIMMB# 123 S1# NC 124 @
125 VDD VDD 126 1 2
127 TEST VREF_CA 128 RD13 0_0402_5%
VSS VSS
2.2U_0402_6.3V6M~D
0.1U_0402_25V6K~D
DDR_B_D32 129 130 DDR_B_D33
DDR_B_D35 131 DQ32 DQ36 132 DDR_B_D34
133 DQ33 DQ37 134
VSS VSS 1 1
CD44
DDR_B_DQS#4 135 136
DQS4# DM4
CD43
DDR_B_DQS4 137 138
139 DQS4 VSS 140 DDR_B_D39
B DDR_B_D36 141 VSS DQ38 142 DDR_B_D37 2 2 B
DDR_B_D38 143 DQ34 DQ39 144
145 DQ35 VSS 146 DDR_B_D44
DDR_B_D45 149 DQ40 DQ45 150
Layout Note: DQ41 VSS
151 152 DDR_B_DQS#5
Place near JDIMM2.203,204 153 VSS DQS5# 154 DDR_B_DQS5
155 DM5 DQS5 156
DDR_B_D42 159 DQ42 DQ46 160 DDR_B_D46
161 DQ43 DQ47 162
DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D55
167 DQ49 DQ53 168
+0.675V_DDR_VTT DDR_B_DQS#6 169 VSS VSS 170
DDR_B_DQS6 171 DQS6# DM6 172
173 DQS6 VSS 174 DDR_B_D48
DDR_B_D53 177 DQ50 DQ55 178
DQ51 VSS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
179 180 DDR_B_D56

1 1 1 1 1 1 DQ56 DQ61
CD54
CD55
CD56
CD57
CD58
CD59
DDR_B_D62 183 184

187 VSS DQS7# 188 DDR_B_DQS7
2 2 2 2 2 2 189 DM7 DQS7 190
VSS VSS
+3.3V_RUN
+3.3V_RUN
DDR_B_D58
DDR_B_D59
191
193
195
197
DQ58
DQ59
VSS
DQ62
DQ63
VSS
192
194
196
198
DDR_B_D60
DDR_B_D61
Interleaved Memory
199 SA0 EVENT# 200
VDDSPD SDA DDR_XDP_WAN_SMBDAT 18,20,25,31,7,9
0_0402_5% 2 @ 1 RD10 201 202
203 SA1 SCL 204 DDR_XDP_WAN_SMBCLK 18,20,25,31,7,9
+0.675V_DDR_VTT VTT VTT +0.675V_DDR_VTT
1
A A
0.1U_0402_25V6K~D
2.2U_0402_6.3V6M~D
0_0402_5%
@
1 1 @ 205 206
BOSS1 BOSS2
CD60
RD11
CD61
2
CONCR_0706E0BE40F
2 2 P/N:SP07000QA00
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII DIMM2
LA-9832P
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN +3.3V_DVCC
L49 +3.3V_CAM
BLM18PG471SN1D_2P~D
1 2
W=80mils For Webcam
PJP10 @
1
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
Q124 PAD-OPEN1x1m
SI3457CDV-T1-GE3_TSOP6~D +3.3V_RUN
1 1
C441
C442
+PWR_SRC
40mil
6
6 Q126
40mil 4 5 LP2301ALT1G_SOT23-3
D
+3.3V_RUN 2 2 Change to RTD2136R part number 2
+BL_PWR_SRC
Q125A
0.1U_0402_25V6K~D
1 2 DMN66D0LDW-7_SOT363-6~D +3.3V_CAM_Q 1 3
S
1000P_0402_50V7K~D
L50
G
BLM18PG471SN1D_2P~D U52
1 1
1
1
C440
1 2 1
G
RTD2136S
2
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
R2576 C439
D D
C438
1 1 100K_0402_5%~D 0.1U_0603_50V7K~D @
2 2
C443
C444
35 PCH_TXCLK+ 2 1
TXOC+ 2 12 3.3V_CAM_EN#
22 36 PCH_TXCLK- R2602 0_0402_5%
2
PVCC TXOC-
2 2 18 41 PCH_TXOUT0+ PWR_SRC_ON 2 1
SWR_VDD TXO0+ 37 CCD_OFF
42 PCH_TXOUT0- R2601 @ 0_0402_5%~D
TXO0-
PWR
+3.3V_AVCC 5
+SWR_V12 DP_V33 39 PCH_TXOUT1+ DMN66D0LDW-7_SOT363-6~D
W=80mils 17 TXO1+
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
22U_0603_6.3V6M~D
+SWR_LX 40 PCH_TXOUT1- Q125B
SWR_LX TXO1- 1 2 3 4
1 1 1 1 W=80mils 15
C434
C435
C436
C437
1 2 +SWR_V12 37 PCH_TXOUT2+ R2578 47K_0402_5%~D
L51 SWR_VCCK TXO2+ 38 PCH_TXOUT2-
BLM18PG471SN1D_2P~D 43 TXO2- check Resistor
5
2 2 2 2 VCCK 33
11 TXO3+ 34 L52 @
DP_V12 TXO3- EN_INVPWR 4 3 USBP5_D+
38 EN_INVPWR 11 USBP5+ 4 3
25 PCH_TZCLK+
FDC654P: P CHANNAL
EDP_CPU_LANE_P0 C445 2 1 0.1U_0402_10V7K~D EDP_CPU_LANE_P0_C 7 TXEC+ 26 PCH_TZCLK- 1 2 USBP5_D-
LVDS
10 EDP_CPU_LANE_P0 LANE0P TXEC- 11 USBP5- 1 2
EDP_CPU_LANE_N0 C446 2 1 0.1U_0402_10V7K~D EDP_CPU_LANE_N0_C 8 Panel backlight power control by EC
10 EDP_CPU_LANE_N0 LANE0N 31 PCH_TZOUT0+ DLW21SN900SQ2L_0805_4P~D
EDP_CPU_LANE_P1 C447 2 1 0.1U_0402_10V7K~D EDP_CPU_LANE_P1_C 9 TXE0+ 32 PCH_TZOUT0- R2579 1 @ 2 0_0402_5%
10 EDP_CPU_LANE_P1 LANE1P TXE0-
EDP_CPU_LANE_N1 C448 2 1 0.1U_0402_10V7K~D EDP_CPU_LANE_N1_C 10
10 EDP_CPU_LANE_N1 LANE1N
DP
29 PCH_TZOUT1+
EDP_CPU_AUX C449 2 1 0.1U_0402_10V7K~D EDP_CPU_AUX_C 4 TXE1+ 30 PCH_TZOUT1- R2580 1 @ 2 0_0402_5%
10 EDP_CPU_AUX AUX-CH_P TXE1-
EDP_CPU_AUX# C450 2 1 0.1U_0402_10V7K~D EDP_CPU_AUX#_C 3
10 EDP_CPU_AUX# AUX-CH_N 27 PCH_TZOUT2+
10 EDP_CPU_HPD
EDP_CPU_HPD 1
DP_HPD
TXE2+
TXE2-
28 PCH_TZOUT2- EMI
0_0402_5% 23
EDP_BIA_PWM 2 @ 1 RC33 TXE3+ 24 +3.3V_CAM
10 EDP_BIA_PWM TXE3-
Connect to LVDS EDID. +3.3V_DVCC D79
0.1U_0402_25V6K~D
1 2 EDP_BIA_PWM_R 21 BIA_PWM_CVT 2
100K_0402_5%~D R2577 @ RC32 2 1 0_0402_5%~D 2 PWMIN 46 EDID_CLK R2582 1 2 2.2K_0402_5%~D
R2583 1 2 12K_0402_1% 12 TESTMODE MIICSCL1 45 EDID_DATA R2584 1 2 2.2K_0402_5%~D 1 BIA_PWM_OUT
DP_REXT MIICSDA1 1
OTHERS
C451
1
20 LCD_ENVDD_CVT BIA_PWM_EC 3
PANEL_VCC 38 BIA_PWM_EC
C 19 BIA_PWM_CVT R2585 Close to C
RTD2136_SCL 48 PWMOUT 44 PANEL_BKEN_CVT 10K_0402_5%~D 2
RTD2136_SDA 47 MIICSCL0 BL_EN BAT54CW_SOT323-3 JLVDS1.36
1
MIICSDA0
2
R2586
CIICSCL 13 6 100K_0402_5%~D
CIICSDA 14 CIICSCL1 DP_GND
CIICSDA1 16
GND
2
GND
49 C459 +3.3V_ALW
R2598 2 @ 1 0_0402_5% PAD 0.1U_0603_50V7K~D
18,19,25,31,7,9 DDR_XDP_WAN_SMBCLK 2 1 0_0402_5%
R2597 RTD2136R-CG_QFN48_6X6
18,19,25,31,7,9 DDR_XDP_WAN_SMBDAT
@ 1 2
+3.3V_DVCC +3.3V_DVCC U87
5
TC7SH08FU_SSOP5~D
PANEL_BKEN_CVT 1 D80
P
B 4 2
RTD2136R Operation Mode Table
2
@ 2 O +BL_PWR_SRC
10 PANEL_BKLEN
G
R2590 R2591 A 1 DISP_ON
0.1U_0603_50V7K~D
C453
Pin 47 4.7K_0402_5%~D 4.7K_0402_5%~D
1
3 2
37 PANEL_BKEN_EC
R2581
0 1
1
Pin 48 100K_0402_5%~D
RTD2136_SCL RTD2136_SDA BAT54CW_SOT323-3
1
2
0 X EP Mode
2
@
R2592 R2593
Internal 4.7K_0402_5%~D 4.7K_0402_5%~D Close to Pin 10
1 ROM only EEPROM
1
LVDS Conn.
B B
JLVDS1 CONN@
0_0402_5% 1
+3.3V_CAM 1
DMIC0 2 @ 1 R2595 DMIC0_R 2
27 DMIC0 3 2
DMIC_CLK0 2 @ 1 DMIC_CLK0_R 4 3
27 DMIC_CLK0 4
R2596 5
5
100P_0402_50V8J~D
100P_0402_50V8J~D
0_0402_5% USBP5_D- 6
USBP5_D+ 7 6
1 1 7
@ @ CAM_MIC_CBL_DET# 8
12 CAM_MIC_CBL_DET# 8
CE10
CE11
+BL_PWR_SRC 9
10 9
2 2 W=40mils 11 10
11
2
@ LE2 DISP_ON 12
12
PESD5V0U2BT_SOT23-3~D
D77
BIA_PWM_OUT 1 @ 2 0_0603_5%~D 13
LCD_CBL_DET# 14 13
12 LCD_CBL_DET# 14
15
PCH_TZCLK+ 16 15
EMI PCH_TZCLK- 17 16
17
18
PCH_TZOUT2+ 19 18
C458 +3.3V_ALW PCH_TZOUT2- 20 19
1
0.1U_0603_50V7K~D PCH_TZOUT1+ 21 20
@ PCH_TZOUT1- 22 21
1 2 PCH_TZOUT0+ 23 22
PCH_TZOUT0- 24 23
U86 @ ESD 25 24
LCD Power
5
TC7SH08FU_SSOP5~D PCH_TXCLK+ 26 25
LCD_ENVDD_CVT 1 PCH_TXCLK- 27 26
P
B 4 28 27
2 O PCH_TXOUT2+ 29 28
10,37 ENVDD_PCH
G
A PCH_TXOUT2- 30 29
PCH_TXOUT1+ 31 30
3
PCH_TXOUT1- 32 31
U33 C461 1U_0603_10V6K~D PCH_TXOUT0+ 33 32
6 1 1 2 PCH_TXOUT0- 34 33
R110 D76 FLAG GND EDID_DATA R2599 2 @ 1 0_0402_5% EDID_DATA_LCD 35 34
1 2 2 5 2 EDID_CLK R2600 2 @ 1 0_0402_5% EDID_CLK_LCD 36 35 41
+5V_ALW VBIAS VIN +3.3V_ALW 36 G1
A 0_0402_5%~D LCD_TST 37 42 A
1 4 3 37 LCD_TST 38 37 G2 43
EN_LCDPWR +LCDVDD +3.3V_RUN
EN VOUT 38 G3
100K_0402_5%~D
39 44
1
3 APE8988Y_SOT26-6 1 2 40 39 G4 45
37 LCD_VCC_TEST_EN W=80mils +LCDVDD 40 G5
R2678
C430 1U_0603_10V6K~D ACES_50398-04071-001

BAT54CW_SOT323-3
2
P/N:SP010013I00
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP to LVDS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
2 1
+1.05V_RUN +3.3V_RUN
+3.3V_RUN
EEPROM
1
+3.3V_RUN
L1 L2 C34
U6B R64
1 2 +1.05V_VMM_VDD E6 3.3V Analog H5 +3.3V_RUN_VDDA 1 2 10K_0402_5%~D 1 2
VDD VDDRX_33
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
1U_0603_10V6K~D
E7 10mA C10 1 1 1 1
VDD VDDTX0_33
1U_0603_10V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
C10
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
C13
C14
C15
C16
BLM18AG102SN1D_2P~D 1 1 1 1 1 E8 30mA H12 BLM18AG102SN1D_2P~D U7 0.1U_0402_25V6K~D
2
VDD VDDTX1_33
C8
C9
C11
C12
E9 K6 VMM_SPI_CS# 1 8
H6 VDD VGA_AVDD33 K7 VMM_SPI_DIN 2 CS# VCC 7 VMM_SPI_HOLD R65 2 1
VDD
1A Max VGA_AVDD33 DO(IO1) HOLD#(IO3)
H7 2 2 2 2 VMM_SPI_WP# 3 6 VMM_SPI_CLK 2.2K_0402_5%~D
1V Digital
2 2 2 2 2 H8 VDD 4 WP#(IO2) CLK 5 VMM_SPI_DO
H9 VDD C5 GND DI(IO0)
VDD VSS D5 W25X10CLSNIG_SO8
E3 VSS D6
VDDRX VSS P/N: SA00006HH00
G3 150mA D7
VDDRX VSS D8
C8 VSS D9 U6A
C9 VDDTX0 VSS D10 DDI1_LANE_P0 0.1U_0402_10V7K~D 1 2 C155 DDI1_LANE_P0_C G1 B7
F12 VDDTX0 VSS D11 10 DDI1_LANE_P0 1 2 G2 RxP0 Tx0P0 A7 DPC_LANE_P0 35
360mA DDI1_LANE_N0 0.1U_0402_10V7K~D C156 DDI1_LANE_N0_C
VDDTX1 VSS 10 DDI1_LANE_N0 RxN0 Tx0N0 DPC_LANE_N0 35
G12 E4 DDI1_LANE_P1 0.1U_0402_10V7K~D 1 2 C157 DDI1_LANE_P1_C F1 B8
VDDTX1 VSS E11 10 DDI1_LANE_P1 1 2 F2 RxP1 Tx0P1 A8 DPC_LANE_P1 35
DDI1_LANE_N1 0.1U_0402_10V7K~D C158 DDI1_LANE_N1_C
VSS 10 DDI1_LANE_N1 RxN1 Tx0N1 DPC_LANE_N1 35
1U_0603_10V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
1 1 1 J3 10mA F4 DDI1_LANE_P2 0.1U_0402_10V7K~D 1 2 C159 DDI1_LANE_P2_C E1 B9
VDDXT1V VSS 10 DDI1_LANE_P2 RxP2 Tx0P2 DPC_LANE_P2 35
C17
F5 DDI1_LANE_N2 0.1U_0402_10V7K~D 1 2 C160 DDI1_LANE_N2_C E2 A9
VSS 10 DDI1_LANE_N2 RxN2 Tx0N2 DPC_LANE_N2 35
C25
C18
E5 50mA F6 DDI1_LANE_P3 0.1U_0402_10V7K~D 1 2 C161 DDI1_LANE_P3_C D1 B10
VDDLP VSS 10 DDI1_LANE_P3 RxP3 Tx0P3 DPC_LANE_P3 35
F7 DDI1_LANE_N3 0.1U_0402_10V7K~D 1 2 C162 DDI1_LANE_N3_C D2 A10
2 2 2 H3 VSS 10 DDI1_LANE_N3 1 2 H1 RxN3 Tx0N3 A14 DPC_LANE_N3 35
CPU_DPB_AUX 0.1U_0402_10V7K~D C19 CPU_DPB_AUX_C
VDDRXA0 10 CPU_DPB_AUX RxAUXP CAD0 DPC_CA_DET 24,35
F3 120mA F8 CPU_DPB_AUX# 0.1U_0402_10V7K~D 1 2 C20 CPU_DPB_AUX#_C H2 B11 SW_DPC_AUX
VDDRXA1 VSS 10 CPU_DPB_AUX# RXAUXN Tx0AUXP SW_DPC_AUX 24
D3 F9 SRCDET C2 A11 SW_DPC_AUX#
VDDRXA2 VSS F10 J1 RxSRCDET Tx0AUXN B12 SW_DPC_AUX# 24
DPB_HPD VMM_DPC_CTRLCLK
VSS 10 DPB_HPD RxHPD Tx0DDCSCL VMM_DPC_CTRLCLK 24
E10 F11 A12 VMM_DPC_CTRLDAT
C7 VDDTX0A0 VSS G4 Tx0DDCSDA A6 VMM_DPC_CTRLDAT 24
1 V Analog
+1.05V_RUN C6 VDDTX0A1 VSS G5 Tx0HPD DPC_DOCK_HPD 35
360mA
VDDTX0A2 VSS A13 E13
L4 H11 G6 9 PLTRST_VMM2320# RSTN_IN Tx1P0 E14 DPB_LANE_P0 35
1 2 +1.05V_VMM_VDDTX E12 VDDTX1A0 VSS G7 VMM_MESCL B5 Tx1N0 F13 DPB_LANE_N0 35
D12 VDDTX1A1 VSS G8 VMM_MESDA B6 MESCL Tx1P1 F14 DPB_LANE_P1 35
B VDDTX1A2
360mA VSS MESDA Tx1N1 DPB_LANE_N1 35 B
1U_0603_10V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
BLM18AG102SN1D_2P~D 1 1 1 1 G9 VMM_SPI_WP# B1 G13

VSS ROMWP Tx1P2 DPB_LANE_P2 35
C22
C23
C24
J10 G10 G14

VGA_AVDD VSS Tx1N2 DPB_LANE_N2 35
C21
K8 G11 H13
K9 VGA_AVDD VSS H4 VMM_SPI_CS# A4 Tx1P3 H14 DPB_LANE_P3 35
2 2 2 2 K10 VGA_AVDD VSS D4 VMM_SPI_CLK B3 SPICS Tx1N3 M14 DPB_LANE_N3 35
VGA_AVDD VSS VMM_SPI_DIN B4 SPICLK CAD1 J13 SW_DPB_AUX DPB_CA_DET 24,35
+3.3V_RUN SPIDI Tx1AUXP SW_DPB_AUX 24
J2 VMM_SPI_DO A3 J14 SW_DPB_AUX#
VDDSA J5 SPIDO Tx1AUXN K13 SW_DPB_AUX# 24
VMM_DPB_CTRLCLK
L5 VSS Tx1DDCSCL VMM_DPB_CTRLCLK 24
C3 J11 L14 VMM_DPB_CTRLDAT
1 2 C4 VDDIO VSS J12 D14 Tx1DDCSDA K14 VMM_DPB_CTRLDAT 24
+3.3V_RUN_VDDIO
3.3V IO
C11 VDDIO VSS K5 D13 GPIO0 Tx1HPD DPB_DOCK_HPD 35
BLM18AG102SN1D_2P~D C12 VDDIO VSS H10 C14 GPIO1 L9 VMM2310_VSYNC
1 1 1 1 VDDIO
250mA VGA_AVSS GPIO2 VGA_VSYNC VMM2310_VSYNC 22
C26
C27
C28
C29
K3 J6 C13 M9 VMM2310_HSYNC
VDDIO VGA_AVSS GPIO3 VGA_HSYNC VMM2310_HSYNC 22
1U_0603_10V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
K4 J7 B14 M6 VMM2310_RED
K11 VDDIO VGA_AVSS J8 B13 GPIO4 VGA_RP L6 VMM2310_TX2P3 VMM2310_RED 22
2 2 2 2 K12 VDDIO VGA_AVSS J9 VMM_GPIO6 C1 GPIO5 VGA_RN M7 VMM2310_GRN
J4 VDDIO VGA_AVSS VMM_GPIO7 M12 GPIO6/INT VGA_GP L7 VMM2310_TX2P2 VMM2310_GRN 22
VDDXT3V
10mA GPIO7/MSCL VGA_GN
VMM_GPIO8 M13 M8 VMM2310_BLU
IDTVMM2320BKG8_BGA168 VMM_GPIO10 L3 GPIO8/MSDA VGA_BP L8 VMM2310_TX2P1 VMM2310_BLU 22
LP_CTL B2 GPIO9 VGA_BN L4 VMM2310_CLK_DDC2
VMM_GPIO09 A5 LP_CTL VGA_SCL M4 VMM2310_DAT_DDC2 VMM2310_CLK_DDC2 22
LP_EN VGA_SDA VMM2310_DAT_DDC2 22
2.7K_0402_5%~D
M3 VGA_DET 2 R74 1 +5V_RUN
CLK_27M_IN_R 1 @ 2 K2 VGA_DET M5 VGA_IREF 1 2
RX_STS VGA_IREF
1
R107 0_0402_5% L2 L5 R2705 3.74K_0402_1%
M1 TX0_STS VGA_NC
TX1_STS Place R2705 close to U6 ASAP
Y1 R66 M2 A1
TX2_STS SSDA I2C1_SDA_VMM 12
27MHZ_12PF_+-20PPM_CRG3202712 1M_0402_5%~D A2
1 3 SSCL I2C1_SCL_VMM 12
2
IN OUT M11
TRSTN
18P_0402_50V8J
18P_0402_50V8J
1 2 4 1 CLK_27M_IN K1 M10
GND GND XIN TCK L12
TMS
C42
C43
L13
CLK_27M_OUT L1 TMS2 L11 VMM2310_RED R311 1 2 150_0402_1%~D
2 2 XOUT TDI L10
TDO VMM2310_GRN R312 1 2 150_0402_1%~D
IDTVMM2320BKG8_BGA168 VMM2310_BLU R351 1 2 150_0402_1%~D

VMM2320 has
removed JTAG Close to VGA
port of U6
+3.3V_RUN
VMM_DPC_CTRLCLK 1 2
R49 2.2K_0402_5%~D
VMM_DPC_CTRLDAT 1 2
R46 2.2K_0402_5%~D
SW_DPC_AUX# 1 @ 2
R91 1M_0402_5%~D
+3.3V_RUN
SW_DPC_AUX 1 @ 2
R92 1M_0402_5%~D
SW_DPB_AUX 1 @ 2 VMM_MESCL 1 2
R47 1M_0402_5%~D R40 2.7K_0402_5%~D
VMM_MESDA 1 2
R42 2.7K_0402_5%~D
SW_DPB_AUX# 1 @ 2
R44 1M_0402_5%~D
VMM_GPIO09 1 @ 2
R232 2.7K_0402_5%~D
A A
VMM_GPIO8 1 2
R54 2.7K_0402_5%~D
LP_CTL 1 2
R55 2.2K_0402_5%~D
SRCDET 1 2
R69 1M_0402_5%~D
RP6
VMM_DPB_CTRLCLK 1 8
VMM_DPB_CTRLDAT 2 7
VMM_GPIO7 3 6
VMM_GPIO6 4 5
2.2K_0804_8P4R_5%
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT IDT VMM2320 DP and VGA SW
2 1
5 4 3 2 1
CRT SW for MB/DOCK +3.3V_RUN +5V_RUN
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+5V_RUN
D U39 D
VMM2310_RED 1 16 +3.3V_RUN 1 1 1 1 1 1
21 VMM2310_RED R 5V VDD
@ C2988
@ C2987
VMM2310_GRN 2
21 VMM2310_GRN G
C2989
C2990
C2991
C2992
VMM2310_BLU 5 4
21 VMM2310_BLU VMM2310_HSYNC 6 B VDD 23
21 VMM2310_HSYNC 7 H_SOURCE VDD 32 2 2 2 2 2 2
VMM2310_VSYNC
21 VMM2310_VSYNC VMM2310_DAT_DDC2 9 V_HOURCE VDD
21 VMM2310_DAT_DDC2 VMM2310_CLK_DDC2 10 SDA_SOURCE 27 RED_CRT
21 VMM2310_CLK_DDC2 SCL_SOURCE R1 25 GREEN_CRT RED_CRT 36
SEL1/SEL2 Chanel Source G1 22 BLUE_CRT GREEN_CRT 36
CRT_SWITCH 30 B1 20 HSYNC_BUF BLUE_CRT 36 Close to U39
0 A=B1 MB 37 CRT_SWITCH SEL H1_OUT 18 VSYNC_BUF HSYNC_BUF 36
V1_OUT 12 DAT_DDC2_CRT VSYNC_BUF 36
1 A=B2 APR/SPR 29 SDA1 14 CLK_DDC2_CRT DAT_DDC2_CRT 36
+3.3V_RUN TEST SCL1 CLK_DDC2_CRT 36
1 2 8 26 RED_DOCK
+3.3V_RUN Reserved R2 RED_DOCK 35
R556 4.7K_0402_5%~D 24 GREEN_DOCK
3 G2 21 BLUE_DOCK GREEN_DOCK 35
11 GND B2 19 HSYNC_DOCK BLUE_DOCK 35
28 GND H2_OUT 17 VSYNC_DOCK HSYNC_DOCK 35
31 GND V2_OUT 13 DAT_DDC2_DOCK VSYNC_DOCK 35
33 GND SDA2 15 CLK_DDC2_DOCK DAT_DDC2_DOCK 35
GPAD SCL2 CLK_DDC2_DOCK 35
PI3V713-AZLEX_TQFN32_6X3~D
C C
+5V_RUN +5V_TSP
Touch Screen Connector
PJP13 @
1
PAD-OPEN1x1m
+5V_RUN +3.3V_RUN
NeTP@ eTP@
2
Q137 Q138
LP2301ALT1G_SOT23-3 LP2301ALT1G_SOT23-3
R2605
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
47K_0402_5%~D +5V_TSP_Q 1 3 +5V_TSP_Q 1 3
D
S
1
1 1
C454
C456
Place close JTS1
G
G
2
2
NeTP@ eTP@
3.3V_TS_EN# 3.3V_TS_EN# +5V_TSP
2 2
0.1U_0402_25V6K~D
6
C455
Q140A DMN66D0LDW-7_SOT363-6~D
2 DMN66D0LDW-7_SOT363-6~D5 Q140B
12 3.3V_TS_EN
B 2 B
1
+5V_TSP CONN@
L58 @
4 3 USBP6_D- JTS1
11 USBP6- 4 3 1
2 1
1 2 USBP6_D+ 3 2
11 USBP6+ 1 2 4 3
DLW21SN900SQ2L_0805_4P~D 5 4
1 @ 2 6 5
12 TOUCH_PANEL_INTR# 7 6
R2594 0_0402_5%
8 GND
1 @ 2 GND
R2588 0_0402_5% E-T_4260K-Q06N-23L
EMI P/N:SP01001HX00
2
ESD@
L30ESDL5V0C3-2_SOT23-3
D88
A A
EMI

CRT switch/Conn and TS
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
5 4 3 2 1
5 4 3 2 1
L9 @
1 2
0_0402_5%~D
L10 EMI@
TMDS_CLK 2 1 TMDS_RP_CLK 1 2 TMDSB_CON_CLK
10 TMDS_CLK 1 2
C103 0.1U_0402_10V7K~D
TMDS_CLK# 2 1 TMDS_RP_CLK# 4 3 TMDSB_CON_CLK#

10 TMDS_CLK# 4 3
C191 0.1U_0402_10V7K~D
DLW21SN900HQ2L_0805_4P~D
L11 @
D 1
0_0402_5%~D
2 +5V_RUN D
0.1U_0402_16V4Z~D
L12 @ 1
C333
1 2
0_0402_5%~D @ +VHDMI_VCC
1
HDMIU1
2
IN
L13 EMI@
TMDS_P0 2 1 TMDS_RP_P0 1 2 TMDSB_CON_P0
10 TMDS_P0 1 2
C199 0.1U_0402_10V7K~D @
0.1U_0402_10V7K~D
10U_0805_10V6K
1 1
TMDS_N0 2 1 TMDS_RP_N0 4 3 TMDSB_CON_N0
10 TMDS_N0 4 3
C87
C88
C209 0.1U_0402_10V7K~D
GND
OUT
2 2
L14 @ AP2330W-7_SC59-3
3
1 2
0_0402_5%~D
L15 @
1 2 JHDMI1 CONN@
0_0402_5%~D HDMI_HPD_SINK 19
18 HP_DET
17 +5V
L16 EMI@ TMDS_DDC_SDA_R 16 DDC/CEC_GND
TMDS_P1 2 1 TMDS_RP_P1 1 2 TMDSB_CON_P1 TMDS_DDC_SCL_R 15 SDA
10 TMDS_P1 1 2 14 SCL
C269 0.1U_0402_10V7K~D
HDMI_CEC 13 Reserved
CEC
C 10 TMDS_N1
TMDS_N1 2
C270
1 TMDS_RP_N1
0.1U_0402_10V7K~D
4
4 3
3 TMDSB_CON_N1 TMDSB_CON_CLK# 12
11 CK-
CK_shield
C
DLW21SN900HQ2L_0805_4P~D TMDSB_CON_CLK 10
TMDSB_CON_N0 9 CK+
L17 @ 8 D0-
1 2 TMDSB_CON_P0 7 D0_shield
0_0402_5%~D TMDSB_CON_N1 6 D0+
5 D1-
TMDSB_CON_P1 4 D1_shield 23
L18 @ TMDSB_CON_N2 3 D1+ GND1 22
1 2 2 D2- GND2 21
0_0402_5%~D TMDSB_CON_P2 1 D2_shield GND3 20
D2+ GND4
CONCR_099A6AC19CBLCNF
L19 EMI@ P/N:DC232002G00
TMDS_P2 2 1 TMDS_RP_P2 1 2 TMDSB_CON_P2
10 TMDS_P2 1 2
C271 0.1U_0402_10V7K~D
TMDS_N2 2 1 TMDS_RP_N2 4 3 TMDSB_CON_N2

10 TMDS_N2 4 3
C272 0.1U_0402_10V7K~D
L20 @
1 2
0_0402_5%~D
EMI
+3.3V_RUN
B +5V_RUN @
B
HDMI_CEC 2 1
R473 10K_0402_5%~D
+3.3V_RUN
RB751VM-40TE-17_SOD323-2~D
2
@
D65
R472
0_0402_5%~D TMDS_RP_P2 R465 1 2 680_0402_1% HDMI_OB
Q122A TMDS_RP_N2 R468 1 2 680_0402_1%
1
2
2
DMN66D0LDW-7_SOT363-6~D TMDS_RP_P1 R467 1 2 680_0402_1%

TMDS_RP_N1 R469 1 2 680_0402_1%
1 6 TMDS_DDC_SCL_R 1 2 +5V_HDMI_DDC TMDS_RP_P0 R462 1 2 680_0402_1%
10 TMDS_DDC_SCL TMDS_RP_N0 1 2
R471 2.2K_0402_5%~D R463 680_0402_1%
TMDS_RP_CLK R464 1 2 680_0402_1%
5
TMDS_RP_CLK# R466 1 2 680_0402_1%
DMN66D0LDW-7_SOT363-6
4 3 TMDS_DDC_SDA_R 1 2
10 TMDS_DDC_SDA
R470 2.2K_0402_5%~D
Q122B
3
DMN66D0LDW-7_SOT363-6~D
1 2 10K_0402_5%~D 5
D
+3.3V_RUN R460 G
S
QZ22A
4
+3.3V_RUN
1M_0402_5%~D
2
R475
A A
2
1
1 6 HDMI_HPD_SINK 1 2
10 TMDS_HPD
S
R474 20K_0402_5%~D
QZ22B Compal Electronics, Inc.
DMN66D0LDW-7_SOT363-6 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, HDMI Conn
LA-9832P
5 4 3 2 1
+3.3V_RUN
AUX/DDC SW for DPB to E-DOCK 1 2
C93
0.1U_0402_25V6K~D
C94 U11
D 0.1U_0402_10V7K~D 1 14 D
2 1 SW_DPB_AUX_C 2 BE0 VCC 13
21 SW_DPB_AUX A0 BE3
DPB_DOCK_AUX 3 12
35 DPB_DOCK_AUX B0 A3 VMM_DPB_CTRLCLK 21
4 11
2 1 SW_DPB_AUX#_C 5 BE1 B3 10
21 SW_DPB_AUX# A1 BE2
C95 0.1U_0402_10V7K~D
DPB_DOCK_AUX# 6 9
35 DPB_DOCK_AUX# B1 A2 VMM_DPB_CTRLDAT 21
7 8
GND B2
PI3C3125LEX_TSSOP14~D
+3.3V_RUN
2
R161
100K_0402_5%~D
1
1 DPB_CA_DET#
D
DPB_CA_DET 2 Q133
21,35 DPB_CA_DET
G
C C
S
3
+3.3V_RUN
AUX/DDC SW for DPC to E-DOCK 1 2
C97
0.1U_0402_25V6K~D
C98 U13
0.1U_0402_10V7K~D 1 14
2 1 SW_DPC_AUX_C 2 BE0 VCC 13
21 SW_DPC_AUX A0 BE3
DPC_DOCK_AUX 3 12
35 DPC_DOCK_AUX B0 A3 VMM_DPC_CTRLCLK 21
4 11
2 1 SW_DPC_AUX#_C 5 BE1 B3 10
21 SW_DPC_AUX# A1 BE2
C99 0.1U_0402_10V7K~D
DPC_DOCK_AUX# 6 9
35 DPC_DOCK_AUX# B1 A2 VMM_DPC_CTRLDAT 21
7 8
GND B2
PI3C3125LEX_TSSOP14~D
B B
+3.3V_RUN
2
R164
100K_0402_5%~D
1
DPC_CA_DET#
1
D
DPC_CA_DET 2 Q135
21,35 DPC_CA_DET
G
S
3
1 2 DPB_CA_DET
R120 1M_0402_5%~D
1 2 DPC_CA_DET
R121 1M_0402_5%~D
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DP SW_DP125
LA-9832P
5 4 3 2 1
5 4 3 2 1
JSATA1 CONN@
D 1 D
C105 2 1 0.01U_0402_16V7K~D SATA_PTX_DRX_P1 2 GND
6 SATA_PTX_DRX_P1_C A+
C106 2 1 0.01U_0402_16V7K~D SATA_PTX_DRX_N1 3
6 SATA_PTX_DRX_N1_C 4 A-
C109 2 1 0.01U_0402_16V7K~D SATA_PRX_DTX_N1 5 GND
6 SATA_PRX_DTX_N1_C C108 2 1 0.01U_0402_16V7K~D SATA_PRX_DTX_P1 6 B-
6 SATA_PRX_DTX_P1_C 7 B+
@ PJP9 GND
HDD Power +5V_HDD +3.3V_HDD

PAD-OPEN1x1m
1 2 +3.3V_HDD_C 8
9 V33
@ +3.3V_HDD_C HDD_DEVSLP 1 2 10 V33
12 HDD_DEVSLP V33
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
U34 @ C462 1U_0603_10V6K~D 0_0402_5%~D R52 11
GND
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
6 1 1 2 1 HDD_DET# 12
FLAG GND 6 HDD_DET# GND
C113
1 1 1 13
GND
C111
C112
C114
5 2 1 2 +5V_HDD 14
+5V_ALW VBIAS VIN +3.3V_ALW +5V_RUN V5
15
4 3 2 @ PJP3 PAD-OPEN1x1m 16 V5
12 3.3V_HDD_EN EN VOUT +3.3V_HDD 2 2 2 V5
17
APE8988Y_SOT26-6 1 2 FFS_INT2_Q 18 GND
19 Reserved 23
C431 1U_0603_10V6K~D 20 GND GND 24
21 V12 GND
@ V12
22
V12
Place near HDD CONN +3.3V_HDD SANTA_196002-1

P/N:SP010015V00
1 @ 2 HDD_DEVSLP Link CIS
R124 10K_0402_5%~D
C C
+3.3V_RUN
1
PJP2 @
PAD-OPEN1x1m
2
+3.3V_RUN_FFS +5V_HDD
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
+3.3V_RUN
1
1 1 C102
Free Fall Sensor +3.3V_RUN @R125
@ R125
C101
1 2 DDR_XDP_WAN_SMBDAT 100K_0402_5%~D
R122 10K_0402_5%~D
1
1 2 DDR_XDP_WAN_SMBCLK 2 2 U15
2
R123 10K_0402_5%~D LNG3DM R126 FFS_INT2_Q
10 100K_0402_5%~D
RES
3
1 13
14 VDD_IO RES 15
2
VDD RES
Q19B
0_0402_5%~D 1 2 R77 16
10,12 HDD_FALL_INT 11 RES 5
FFS_INT2 9 INT 1 5
INT 2 GND
6
12
4
7 GND
SDO/SA0
Q19A
6
18,19,20,31,7,9 DDR_XDP_WAN_SMBDAT 4 SDA / SDI / SDO FFS_INT2 2
B 18,19,20,31,7,9 DDR_XDP_WAN_SMBCLK SCL/SPC 2 12 FFS_INT2 B
8 NC 3
1
CS NC
LNG3DMTR_LGA16_3X3~D
A A
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT HDD CONN
5 4 3 2 1
5 4 3 2 1
D D
C C
ODD power 1
JSATA2 CONN@
CS1 1 2 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_P2 2 GND

6 SATA_ODD_PTX_DRX_P2_C 1 2 0.01U_0402_16V7K~D 3 A+
CS2 SATA_ODD_PTX_DRX_N2
6 SATA_ODD_PTX_DRX_N2_C 4 A-
CS3 1 2 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_N2 5 GND
6 SATA_ODD_PRX_DTX_N2_C CS4 1 2 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_P2 6 B-
U29 C460 1U_0603_10V6K~D 6 SATA_ODD_PRX_DTX_P2_C 7 B+
6 1 1 2 GND
FLAG GND
5 2 DEVICE_DET# 8
+5V_ALW VBIAS VIN +5V_ALW 38 DEVICE_DET# DP
9
+5V_MOD +5V
4 3 10
37 MODC_EN EN VOUT +5V_MOD +5V
ODD_DA# 11
1 2 10 ODD_DA# 12 MD 14
APE8988Y_SOT26-6 +5V_RUN
@ 13 GND GND 15
C432 PJP802 GND GND
1U_0603_10V6K~D 1 2
SANTA_201902-1
PAD-OPEN1x1m +5V_MOD P/N: SP01001RS00
Link CIS
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
1 1
B B
C3004
C3005
2 2
Close to JSATA2
A A
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT ODD module
0.5
5 4 3 2 1
2 1
+5V_RUN_AUDIO
place close to pin27 L21 +5V_RUN_AUDIO
Internal Speakers Header Analog 5V

+VDDA_AVDD1
BLM21PG600SN1D_0805
1 2
1
+VDDA_AVDD2 +3.3V_RUN_AUDIO
0.1U_0402_25V6K~D
+3.3V_RUN_AUDIO +3.3V_RUN_AUDIO
10U_0805_10V6K
place close to pin38 L37 R130
40 mils trace keep 10 mil spacing DVDD_IO should match CONN@
1 1
0_0805_5%
Analog 3.3V 0_0805_5%
with HDA Bus level
C115
C117
JSPK1 +VDDA_AVDD2 1 @ 2 @
0.1U_0402_25V6K~D
INT_SPK_L+ R2688 1 EMI@ 2 INT_SPKR_L+ 1 +DVDD_CORE place close to pin39 place close to pin45
2
1 2 2
1U_0603_10V6K~D
0.1U_0402_25V6K~D
1U_0603_10V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K
10U_0805_10V6K
INT_SPK_L- R2702 1 EMI@ 2 INT_SPKR_L- 2 1 1 1 1 1 1 1
INT_SPK_R+ R2703 1 EMI@ 2 INT_SPKR_R+ 3 2 @
3
C118
C119
C405
C121
C116
C150
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
INT_SPK_R- R2704 1 EMI@ 2 INT_SPKR_R- 4 2A: 80 mil width
4
C120
10U_0805_10V6K
10U_0805_10V6K
5 1 1 1 1
6 G5 2 2 2 2 2 U17 2 2
G6
C128
C129
C122
C123
1 27
EMI ACES_50273-00401-001 DREG_OUT AVDD1
AVDD2/HVDD(3.3)
38
2 2 2 2
C124
@
C125
@
C126
@
C127
@
P/N:SP02000U900 3 45 +VDDA_PVDD +VREFOUT
DVDD-IO PVDD2 39
1 1 1 1 PVDD1
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
PESD5V0U2BT_SOT23-3
PESD5V0U2BT_SOT23-3
9 13 AUD_SENSE_A RING2 1 2
2
DVDD Sense A 14 AUD_SENSE_B R187 2.2K_0402_5%
2 2 2 2 Sense B SLEEVE 1 2
28 RING2 R197 2.2K_0402_5%
LINE1-L/RING2 RING2 36
DE2
DE1
PCH_AZ_CODEC_BITCLK 6 29 SLEEVE SLEEVE/RING2 : keep 40mils trace
6 PCH_AZ_CODEC_BITCLK BIT-CLK LINE1-R/SLEEVE SLEEVE 36
23 +VREFOUT
PCH_AZ_CODEC_SDOUT 5 LINE1-VREFO 1 2 AUD_HP_OUT_R/AUD_HP_OUT_L : keep 15mils trace
6 PCH_AZ_CODEC_SDOUT
1
SDATA-OUT
@
31 C385 10U_0805_10V6K +VREFOUT
10 HPOUT-L/MIC-CAP 33 AUD_OUT_L 1 2 AUD_HP_OUT_L
ESD 6 PCH_AZ_CODEC_SYNC
Place R136 close to codec
SYNC AVSS2/HPOUT-L
HP-OUT-R
32 AUD_OUT_R R162 1 2 18_0402_5% AUD_HP_OUT_R AUD_HP_OUT_L
AUD_HP_OUT_R
36
36
1U_0603_10V4Z~D
1 2 PCH_AZ_SDIN0_R 8 R166 18_0402_5% 1
6 PCH_AZ_CODEC_SDIN0 SDATA-IN
@
B R136 33_0402_5%~D 40 INT_SPK_L+ B
SPK-L+
C131
PCH_AZ_CODEC_RST# 11 41 INT_SPK_L- R160 12 10K_0402_5%~D @
6 PCH_AZ_CODEC_RST# RESET# SPK-L- R167 12 @
44 INT_SPK_R+ 10K_0402_5%~D 2
EMI Close to U17 EMI SPK-R+
SPK-R-
43 INT_SPK_R- C143 2 1 0.1U_0402_25V6K~D PC_BEEP R353 1 2 100K_0402_5%~D
BEEP 38
1 EMI@ 2 I2S_MCLK 15
35 DAI_12MHZ# R137 22_0402_5%~D I2S_MCLK 12 AUD_PC_BEEP C133 2 1 0.1U_0402_25V6K~D PC_SPKR R387 1 2 100K_0402_5%~D
PCBEEP SPKR 12
1 EMI@ 2 I2S_BCLK 16
35 DAI_BCLK# R139 22_0402_5%~D I2S_SCLK 2 1 @ 2 LE3 0_0603_5%~D
Place R142 close to codec DMIC_CLK_L DMIC_CLK0
1 2 I2S_DO 17 GPIO0/DMIC-CLK 4 1 @ 2 LE4 0_0603_5%~D DMIC_CLK1 DMIC_CLK0 20
35 DAI_DO# I2S_DOUT GPIO1/DMIC-DATA DMIC_CLK1 36
R141 33_0402_5%~D 46 DMIC0
DMIC1/GPIO2 DMIC0 20
1 @ 2 I2S_LRCLK 18 48 DMIC1
35 DAI_LRCK# I2S_LRCK GPIO3 DMIC1 36
R143 0_0402_5%
EN_I2S_NB_CODEC# 37
1 @ 2 I2S_DI# 24 37 1
35 DAI_DI R144 0_0402_5% I2S_DIN MONO-OUT/CBP C134 DMIC_CLK0 DMIC_CLK1
Close to U17 pin5 Close to U17 pin6
2.2U_0603_6.3V6K~D
@ 1 @ 1
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK 19 35 2
MIC1-L CBN Place C134 close to Codec C139 C130
BCLK: Audio serial data bus bit clock input/output
LRCK: Audio serial data bus word clock input/output 20 22P_0402_50V8J 22P_0402_50V8J
1
MIC1-R 2 2
@ R148 R149 @ 36
47_0402_5%~D 33_0402_5%~D AUD_NB_MUTE# 47 CBP/AVSS2
37 AUD_NB_MUTE# EAPD/PD Place close to Codec
1U_0603_10V7K~D
21 +ALC290_LDO_CAP
+3.3V_RUN LDO-CAP 22 place close to pin2
EMI EMI 1
EMI
2
7 JDREF 34 +ALC3226_CPVEE
1 1 DVSS CPVEE
C410
20K_0402_1%~D
@ 25 +ALC3226_VREF
1
VREF
2.2U_0603_6.3V6K~D
@C135
@C135 C136 @ 1 2 42
2 PVSS
0.1U_0402_25V6K~D
2.2U_0603_10V6K
R39
10U_0805_10V6K
0.1U_0402_10V7K~D 10P_0402_50V8J~D R150 10K_0402_5%~D 30 2 1 1 1
2 2 49 MIC1-VREFO 26
GND AVSS1
C167
C169
C138
C140
ALC3226-CG_QFN48_7X7
2
1 2 2 2
place at AGND and DGND plane

Notes:
Place closely to Pin 13. 1 2 Keep PVDD supply and speaker traces routed on the DGND plane.
AUD_SENSE_A C141 EMI@ Keep away from AGND and other analog signals
0.1U_0402_25V6K~D
1
1 2
@
R152 C142 EMI@ place at Codec bottom side
39.2K_0402_1%~D 0.1U_0402_25V6K~D EMI PJP4
1 2 1 2
2
C144 EMI@
0.1U_0402_25V6K~D PAD-OPEN1x1m
1
D
Q20 2
AUD_HP_NB_SENSE 36,37
L2N7002WT1G_SC-70-3 G
0.1U_0402_25V6K~D
10U_0805_10V6K
S @
3
1 @ 1
C408
R163
C137
100K_0402_5%~D
Pay attention to Audio
2 2 +RTC_CELL
no sound issue.
2
Add for solve pop noise and detect issue

+3.3V_RUN_AUDIO
1 SLEEVE
R208 @
A 100K_0402_5%~D U18 C145 1U_0603_10V6K~D A
Realtek feedback +3.3V_ALW 1 14 1 2
2 VIN1 VOUT1 13
Place closely to Pin 14 Prevent the Noise from Combo Jack
2
3
VIN1 VOUT1
while system entry into S3 / S4 /S Q123B RUN_ON 1 @ 2 3 12 C147 1 2
(for Global Headset) 37,38,40,55 RUN_ON ON1 CT1
R154 0_0402_5% 1000P_0402_50V7K~D
AUD_SENSE_B 5 +5V_ALW 4 11
VBIAS GND
Analog 3.3V Analog 3.3V
R153 4 5 10 C148 1 2
6
+VDDA_AVDD2 +VDDA_AVDD2 ON2 CT2

0_0402_5% 470P_0402_50V7K~D
1
AUD_NB_MUTE# 1 @ 2 Q123A +5V_ALW 6 9

R156 R157 7 VIN2 VOUT2 8
20K_0402_1%~D VIN2 VOUT2 +5V_RUN_AUDIO
39.2K_0402_1%~D PCH_AZ_CODEC_RST# 1 2 2
1
R142 15 1
1
R158 0_0402_5%~D GPAD

2
1
1U_0603_10V6K~D
100K_0402_5%~D R159 @ 1 @ TPS22966DPUR_SON14_2X3~D

100K_0402_5%~D @ C149
2
C412
1U_0603_10V6K~D
2
3
Q21A Q21B 2
37 DOCK_HP_DET
2 5
DOCK_MIC_DET 37
1
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Azalia (HD) Codec - ALC3226
LA-9832P
Date: Friday, July 26, 2013 Sheet 27 of 64
2 1
5 4 3 2 1
+3.3V_LAN
+3.3V_RUN @ C406 0.1U_0402_10V7K~D SA000066W4L I218 (B1)
22U_0805_6.3V6M~D
2 1
SA00005OO3L I217 (A3) 1
C188
Place C188 close to pin5
R331
10K_0402_5%~D
U21 2
5
U20 TC7SH08FU_SSOP5~D
1
1 1 @ 2 LANCLK_REQ#_R 48 13 LAN_TX0+
P
12 LAN_RST# B 7,9 LANCLK_REQ# CLK_REQ_N MDI_PLUS0
4 PLT_LAN_RST# R169 0_0402_5% 36 14 LAN_TX0-
2 O PE_RST_N MDI_MINUS0
9 PLTRST_LAN# A
G
CLK_PCIE_LAN 44 17 LAN_TX1+ +0.9V_LAN
7 CLK_PCIE_LAN PE_CLKP MDI_PLUS1
1
@ CLK_PCIE_LAN# 45 18 LAN_TX1-
7 CLK_PCIE_LAN#
3
PE_CLKN MDI_MINUS1
PCIE
D R25 2 1 PCIE_PRX_GLANTX_P3_C
MDI
D
11 PCIE_PRX_GLANTX_P3
100K_0402_5%~D C179 0.1U_0402_10V7K~D 38 20 LAN_TX2+
PETp MDI_PLUS2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2 1 PCIE_PRX_GLANTX_N3_C 39 21 LAN_TX2-
11 PCIE_PRX_GLANTX_N3 PETn MDI_MINUS2
C176 0.1U_0402_10V7K~D 1 1 1 1
2
R201 1 2 PCIE_PTX_GLANRX_P3_C 41 23 LAN_TX3+
11 PCIE_PTX_GLANRX_P3 PERp MDI_PLUS3
C183
C184
C185
C186
2 @ 1 C178 0.1U_0402_10V7K~D 42 24 LAN_TX3-
1 2 PCIE_PTX_GLANRX_N3_C PERn MDI_MINUS3
11 PCIE_PTX_GLANRX_N3 2 2 2 2
0_0402_5%~D C181 0.1U_0402_10V7K~D
LAN_SMBCLK 28 6 VCT_LAN_R1 R175 2 @ 1 0_0402_5%
7 LAN_SMBCLK SMB_CLK SVR_EN_N Pin 6 is SVR_EN in Clarkville
SMBUS
LAN_SMBDATA 31
7 LAN_SMBDATA SMB_DATA 1 +RSVD_VCC3P3_1 R178 2 1 4.7K_0402_5%~D
RSVD_VCC3P3_1 +3.3V_LAN
0_0402_5% 1 @ 2 R179 LAN_WAKE#_R 2 5 reference INTEL r217 circuit version1.7 Note:
12,38 LAN_WAKE# LANWAKE_N VDD3P3_IN
1 @ 2 LAN_DISABLE#_R 3
12 PM_LANPHY_ENABLE
R180 0_0402_5% LAN_DISABLE_N 4 +3.3V_LAN_OUT 2 @ 1 +1.0V_LAN will work at 0.95V to 1.15V
SMBus Device Address 0xC8 VDD3P3_4 +3.3V_LAN
R181 0_0603_5%~D
37 LAN_DISABLE#_R
1U_0603_10V6K~D
15 1
LOM_ACTLED_YEL# 26 VDD3P3_15 19
Pin 2 is WAKE_EN in Clarkville LED0 VDD3P3_19
C182
LOM_SPD100LED_ORG# 27 29
+3.3V_LAN LOM_SPD10LED_GRN# 25 LED1 VDD3P3_29 +0.9V_LAN
LED
LED2 2
1 2 TP_LAN_JTAG_TMS 47
@ R171 10K_0402_5%~D VDD0P9_47 46
1 2 TP_LAN_JTAG_TCK @ T92 PAD~D TP_LAN_JTAG_TDI 32 VDD0P9_46 37
@ R172 10K_0402_5%~D @ T93 PAD~D TP_LAN_JTAG_TDO 34 JTAG_TDI VDD0P9_37
2 1 LAN_WAKE#_R TP_LAN_JTAG_TMS 33 JTAG_TDO 43
JTAG
@ R176 4.7K_0402_5%~D TP_LAN_JTAG_TCK 35 JTAG_TMS VDD0P9_43
JTAG_TCK 11
VDD0P9_11
XTALO_R R183 1 @ 2 0_0402_5% XTALO 9 40
XTALI 10 XTAL_OUT VDD0P9_40 22
XTAL_IN VDD0P9_22
1
16
VDD0P9_16 8 +0.9V_LAN
R206 LAN_TEST_EN 30 VDD0P9_8
Y3 1M_0402_5%~D TEST_EN
C C
25MHZ_18PF_7V25000034 RES_BIAS 12 7 REGCTL_PNP10 1 2
2
3 1 RBIAS CTRL0P9 4.7UH_CBC2012T4R7M_20%~D L26
OUT IN
0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
49
VSS_EPAD
27P_0402_50V8J
1
27P_0402_50V8J
1K_0402_5%~D
3.01K_0402_1%~D
4 2 1 1
GND GND
C177
C180
2 2 WGI218LM-SLJK3A-B1_QFN48_6X6
C189
C190
R184
R185
2 2
Place C177, C180 and L26 close to U21
2
1 1
U22 C452 1U_0603_10V6K~D

LAN ANALOG SWITCH 6
FLAG GND
1 1 2
5 2
+5V_ALW VBIAS VIN +3.3V_ALW
+3.3V_LAN
4 3 +3.3V_LAN
37,9 SIO_SLP_LAN# EN VOUT
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 @ 1 1 1 APE8988Y_SOT26-6 1 2
C206
C192
C193
C194
C426 1U_0603_10V6K~D
2 2 2 2 +3.3V_LAN
Layout Notice : Place bead as
@
close PI3L720 as possible C198
39
30
21
14
8
4
1
U23 1 2
EMI
VDD
VDD
VDD
VDD
VDD
VDD
VDD
38 SW_LAN_TX0+ 0.1U_0402_10V7K~D
B0+ SW_LAN_TX0+ 36
5
B 37 SW_LAN_TX0- B
B0- SW_LAN_TX0- 36
LAN_TX0+ 1 @ 2 LAN_TX0+R 2 LOM_SPD100LED_ORG# 1
P
L27 0_0603_5%~D A0+ 34 SW_LAN_TX1+ B 4
B1+ SW_LAN_TX1+ 36 O WLAN_LAN_DISB# 37
LAN_TX0- 1 @ 2 LAN_TX0-R 3 33 SW_LAN_TX1- LOM_SPD10LED_GRN# 2
A0- B1- SW_LAN_TX1- 36 A
G
L28 0_0603_5%~D U24
29 SW_LAN_TX2+ TC7SH08FU_SSOP5~D
3
LAN_TX1+ 1 @ 2 LAN_TX1+R 6 B2+ 28 SW_LAN_TX2- SW_LAN_TX2+ 36
L29 0_0603_5%~D A1+ B2- SW_LAN_TX2- 36
LAN_TX1- 1 @ 2 LAN_TX1-R 7 25 SW_LAN_TX3+
A1- B3+ SW_LAN_TX3+ 36
L30 0_0603_5%~D 24 SW_LAN_TX3-
B3- SW_LAN_TX3- 36
LAN_TX2+ 1 @ 2 LAN_TX2+R 9 17 LAN_ACTLED_YEL#_Q
L31 0_0603_5%~D A2+ LEDB0 18 LED_100_ORG#_Q
LAN_TX2- 1 @ 2 LAN_TX2-R 10 LEDB1 41 LED_10_GRN#_Q
L32 0_0603_5%~D A2- LEDB2
36 DOCK_LOM_TRD0+
LAN_TX3+
L33
1 @ 2 LAN_TX3+R
0_0603_5%~D
11
A3+
C0+
C0-
35 DOCK_LOM_TRD0-
DOCK_LOM_TRD0+
DOCK_LOM_TRD0-
35
35 To LED on LAN jack
LAN_TX3- 1 @ 2 LAN_TX3-R 12 32 DOCK_LOM_TRD1+
A3- C1+ DOCK_LOM_TRD1+ 35 Q32A Q22B
L34 0_0603_5%~D 31 DOCK_LOM_TRD1-
C1- DOCK_LOM_TRD1- 35 DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
DOCKED 13 27 DOCK_LOM_TRD2+ LAN_ACTLED_YEL#_Q 6 1 LAN_ACTLED_YEL# LED_10_GRN#_Q 3 4 LED_10_GRN#
37 DOCKED SEL C2+ DOCK_LOM_TRD2+ 35 LAN_ACTLED_YEL# 36 LED_10_GRN# 36
26 DOCK_LOM_TRD2-
C2- DOCK_LOM_TRD2- 35
LOM_ACTLED_YEL# 15 23 DOCK_LOM_TRD3+
DOCK_LOM_TRD3+ 35
5
LOM_SPD100LED_ORG# 16 LEDA0 C3+ 22 DOCK_LOM_TRD3-
LEDA1 C3- DOCK_LOM_TRD3- 35
LOM_SPD10LED_GRN# 42 MASK_BASE_LEDS# MASK_BASE_LEDS#
LEDA2 MASK_BASE_LEDS# 41
19 DOCK_LOM_ACTLED_YEL#
LEDC0 DOCK_LOM_ACTLED_YEL# 35
5 20 DOCK_LOM_SPD100LED_ORG#
PD LEDC1 DOCK_LOM_SPD100LED_ORG# 35
40 DOCK_LOM_SPD10LED_GRN#
LEDC2 DOCK_LOM_SPD10LED_GRN# 35 Q32B
43
1: TO DOCK PAD_GND DMN66D0LDW-7_SOT363-6~D
DOCKED LED_100_ORG#_Q 3 4 LED_100_ORG#
LED_100_ORG# 36
0: TO RJ45
A A
PI3L720ZHEX_TQFN42_9X3P5~D
5
MASK_BASE_LEDS#
PROPRIETARY NOTE:
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT LAN Lewisville / LAN SW
0.5
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. Date: Tuesday, August 13, 2013 Sheet 28 of 64
5 4 3 2 1
5 4 3 2 1
ATMEL TPM
+3.3V_RUN @ +3.3V_RUN_TPM
PJP5
1 2
+3.3V_RUN_TPM
D D
PAD-OPEN1x1m
+3.3V_RUN_TPM
0.1U_0402_25V6K~D
4700P_0402_25V7K~D
1 1
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.1U_0402_25V6K~D
C200
C201
U25 1 1 1 1
2 2
C203
C202
C384
C204
@ 10
5 VCC_0 19
SB3V VCC_1 24 2 2 2 2
VCC_2 @
1 @ 2 SP_TPM_LPC_EN_R 28 12
37 SP_TPM_LPC_EN LPCPD# V_BAT 13
R193 0_0402_5%
LPC_LAD0 26 NBO_13 14
31,37,38,7 LPC_LAD0 23 LAD0 NBO_14
LPC_LAD1
31,37,38,7 LPC_LAD1 LPC_LAD2 20 LAD1
31,37,38,7 LPC_LAD2 LPC_LAD3 17 LAD2
31,37,38,7 LPC_LAD3 LAD3 6
GPIO6
CLK_PCI_TPM_TCM CLK_PCI_TPM_TCM 21 9
7 CLK_PCI_TPM_TCM LPC_LFRAME# 22 LCLK TESTBI 8
31,37,38,7 LPC_LFRAME# LFRAME# TESTI
1
@ PCH_PLTRST#_EC 16
31,33,36,37,38,9 PCH_PLTRST#_EC 27 LRESET#
R290 IRQ_SERIRQ
12,37,38,9 IRQ_SERIRQ 15 SERIRQ
33_0402_5%~D CLKRUN#
37,38,9 CLKRUN# CLKRUN# 7
NC_7
2
C 1 4 C
1 @ EMI 2 ATEST_1
ATEST_2
GND_4
GND_11
11
CC84 3 18
27P_0402_50V8J~D ATEST_3 GND_18 25
GND_25
2 AT97SC3204-X4A12-ABF TSSOP 28P
B
Finger print module B
1 @ 2
R741 0_0402_5%
L54 @ +3.3V_RUN CONN@

1 2 HUB_USBP1_R_D- JBIO1
33 HUB_USBP1- 1 2
0.1U_0402_25V6K~D
1
2 1
1 2
C268
4 3 HUB_USBP1_R_D+ HUB_USBP1_R_D- 3
33 HUB_USBP1+ 4 3 HUB_USBP1_R_D+ 4 3
OCF2012181YZF_4P 5 4 7
2 37 FPR_DET# 6 5 G1 8
6 G2
3
2 1
+3.3V_ALW
ESD@ D78
1 @ 2 ACES_51524-0060N-001
R742 0_0402_5% R481 10K_0402_5%~D
P/N:SP010014M10
EMI
Link CIS
1
A ESD A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, TPM/FP
LA-9832P
5 4 3 2 1
A B C D E
+3.3V_RUN +3.3V_RUN
+3.3V_RUN_CARD +1.8V_RUN_CARD
C215 close to U27.9
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
C213 C214 close to U27.35
1U_0402_6.3V6K~D
L35 1
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
1 2 +3.3V_RUN_AIN
1
C227
C229
C228
BLM18BD601SN1D_0603~D C215 must close to U27.27 within 50mils
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C214 must close to U27.9 within 50mils
2
C210
C211
C212
C213 must close to U27.9 with 100mils
2
1
1
L35 must close to U38.9 within 200mils @ @ @
C213
C214
C215
+3.3V_RUN_AIN trace width 30mils
2
1 C210 close to U27.42 C227 near U27.22 C228 C229 near U27.24 1
C211 C212 close to U27.23
homestay ES1(no SD4.0)

+1.2V_LDO +3.3V_RUN
use 3.3V
U27
M00 (symbol has been updated 26~36 pin swap) please routing daisy chain
1. from U27.38 (SD_D0) -> U27.32 (SD_RCLK_P) -> L46.4
2. From U27.37 (SD_D1) -> U27.33 (SD_RCLK_N) -> L46.1
OZ777FJ2LN
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
9 12 +AUX_LDO R231 1 @ 2 0_0402_5%

PE_33VCCAIN AUX_LDO_CAP
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
2
27 L46 @
2 UHSII_33VCCAIN/NC
2
C223
C217
C218
25 +SD_IO_LDO SD_RCLK+ 4 3 SD_RCLK+_D

SD_IO_LDO_CAP 4 3
C224
C219
C225
C226
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
1
1U_0603_10V6K~D
42 1
1
1
SD_33VCCD
C221
30mils width SD_RCLK- 1 2 SD_RCLK-_D
1 2
C220
C216
23
SD_SKT_33VIN DLW21SN900SQ2L_0805_4P~D
1
13 22 2
AUX _33VIN SD_SKT_33VOUT +3.3V_RUN_CARD
30mils width R297 1 @ 2 0_0402_5%
11 24
+1.2V_LDO MAIN_LDO_VIN SD_SKT_18VOUT +1.8V_RUN_CARD
L36 10
1 2 +1.2V_LDO_AIN MAIN_LDO_12VOUT
BLM18BD601SN1D_0603~D R306 1 @ 2 0_0402_5%
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D 41
L36 close to U27.31 within CORE_12VCCD
200mils 30mils width 20 SDWP L47 @
SD_WPI
2
36 21 SD/MMCCD# SD_UHS2_D0P 4 3 SD_UHS2_D0P_D

+1.2V_LDO, +1.2V_LDO_AIN trace UHSII_12VCCAIN/NC SD_CD# 4 3
C230
C231
C232
C233
C234
31 EMI@
width 30mils 28 UHSII_12VCCAIN/NC 43 SD/MMCCLK_R R230 1 2 10_0402_5%~D SD/MMCCLK
1
UHSII_12VCCAIN/NC SD_CLK 45 SD/MMCCMD SD_UHS2_D0N 1 2 SD_UHS2_D0N_D

SD_CMD 1 2
5P_0402_50V8C~D
2 @ 1 2
PE_12VCCAIN 1
@
39 DLW21SN900SQ2L_0805_4P~D
MMC_D7 EMI
C255
40
R205 must be close to U27 pin4 less than 100mils MMC_D6 44 R315 1 @ 2 0_0402_5%
1 2 PE_REXT 4 MMC_D5 46 2
R205 191_0402_1%~D PE_REXT MMC_D4 47 SD/MMCDAT3 R410 1 @ 2 0_0402_5% SD/MMCDAT3_R
C235 1 2 0.1U_0402_10V7K~D PCIE_PTX_MMIRX_P1_C 6 SD_D3 48 SD/MMCDAT2 R341 1 @ 2 0_0402_5% SD/MMCDAT2_R
11 PCIE_PTX_MMIRX_P1 5 PE_RXP SD_D2
C236 1 2 0.1U_0402_10V7K~D PCIE_PTX_MMIRX_N1_C 37 R333 1 @ 2 0_0402_5%
11 PCIE_PTX_MMIRX_N1 PE_RXM SD_D1 38
C237 1 2 0.1U_0402_10V7K~D PCIE_PRX_MMITX_P1_C 7 SD_D0 L48 @
11 PCIE_PRX_MMITX_P1 C238 1 2 0.1U_0402_10V7K~D PCIE_PRX_MMITX_N1_C 8 PE_TXP 29 SD_RCLK- SD_UHS2_D1P 1 2 SD_UHS2_D1P_D
11 PCIE_PRX_MMITX_N1 PE_TXM SD_RCLK_M/NC 30 SD_RCLK+ 1 2
2 SD_RCLK_P/NC 32 SD_UHS2_D1P
7 CLK_PCIE_MMI# 3 PE_REFCLKM SD_D1P/NC 33 SD_UHS2_D1N SD_UHS2_D1N 4 3 SD_UHS2_D1N_D
7 CLK_PCIE_MMI PE_REFCLKP SD_D1M/NC 34 SD_UHS2_D0N 4 3
PE_RST# 15 SD_D0M/NC 35 SD_UHS2_D0P DLW21SN900SQ2L_0805_4P~D
check MEDIACARD_PWREN pull up to 3.3VRUN PE_RST#_GATE# SD_D0P/NC
or connect to PCH. 14 26 R211 1 2 4.7K_0402_1%~D R337 1 @ 2 0_0402_5%
12 MEDIACARD_PWREN MAIN_LDO_EN SD_REXT/NC EMI
16
12 MEDIACARD_IRQ# DEV_WAKE#
17 19
7 MMICLK_REQ# CLKREQ# LED#
IO_LDOSEL 18 49
IO0_LDOSEL GND
OZ777FJ2LN_QFN48P_6X6
NO MMC+
Near to JSD1
JSD1 CONN@
3 +3.3V_RUN_CARD 4 3
+3.3V_RUN_CARD VDD/VDD1
14
+1.8V_RUN_CARD VDD2
SD/MMCCMD 2
SD/MMCCLK 5 CMD
CLK
+3.3V_RUN SD/MMCCD# 18
CARD DETECT
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
R443 1 @ 2 0_0402_5% PE_RST# SDWP 19
9 PLTRST_MMI# WRITE PROTEC
1 1 @
1
0.1U_0402_25V6K~D
SD_RCLK+_D 7
1M_0402_5%~D
DAT0/RCLK+
1
100K_0402_5%~D
C239
C240
R212 1 SD_RCLK-_D 8
100K_0402_5%~D @ SD/MMCDAT2_R 9 DAT1/RCLK-
DAT2
1
2 2
R299
C273
SD/MMCDAT3_R 1
CD/DAT3
R27
SD_UHS2_D0P_D 11
2
IO_LDOSEL 2 SD_UHS2_D0N_D 12 D0+
2
SD_UHS2_D1P_D 16 DO-
D1+
1
SD_UHS2_D1N_D 15 20
2
@ R214 D1- GND1 21

100K_0402_5%~D +1.8V_RUN_CARD 3 GND2 22
6 VSS1 GND3 23
10 VSS2 GND4 24
2
13 VSS3 GND5 25
17 VSS4 GND6 26
VSS5 GND7
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
ALPS_SCDADA0101_NR
IO0_LDOSEL: 1 1
High: Select internal LDO for main area core power.
C246
C247
Low: Select external LDO for main area core power.
2 2
4 4
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Card Reader OZ777FJ2
A B C D E
5 4 3 2 1
+3.3V_WLAN
L57 @
HUB_USBP4+_D 3
3 4
4
HUB_USBP4+ 33 HMC: Mini WLAN/WIiGi/BT H=4
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
@ C257
HUB_USBP4-_D 2 1 1 1 1 2 2 1
2 1 HUB_USBP4- 33
+3.3V_WLAN +3.3V_WLAN
C258
C259
C260
C261
C262
DLW21SN900SQ2L_0805_4P~D
JMINI1 CONN@
2 @ 1 2 2 2 1 1 2 PCIE_WAKE# 1 2
R483 0_0402_5% 3 1 2 4
2 @ 1 EMI 5 3 4 6 For 80 port Debug
R482 0_0402_5% 7 5 6 8 R238 1 @ 2 0_0402_5% LPC_LFRAME#
12,7 MINI2CLK_REQ# 9 7 8 10 1 2 LPC_LAD3 LPC_LFRAME# 29,37,38,7
R239 @ 0_0402_5%
11 9 10 12 1 2 LPC_LAD3 29,37,38,7
R240 @ 0_0402_5% LPC_LAD2
D 7 CLK_PCIE_MINI2# 13 11 12 14 1 2 LPC_LAD2 29,37,38,7 D
R236 @ 0_0402_5% LPC_LAD1
For 80 port Debug 7 CLK_PCIE_MINI2 15 13 14 16 R234 1 @ 2 0_0402_5% LPC_LAD0 LPC_LAD1 29,37,38,7
FMC: Mini WWAN/LTE H=8 29,31,33,36,37,38,9

7
PCH_PLTRST#_EC
CLK_PCI_LPDEBUG
PCH_PLTRST#_EC 1
R241 1
@
@
2
2 0_0402_5%
17
19
15
17
19
16
18
20
18
20 WLAN_RADIO_DIS#_R
LPC_LAD0 29,37,38,7
R244 0_0402_5% 21 22 MINI_CARD_RST#

23 21 22 24 R228 1 @ 2 0_0402_5%~D
11 PCIE_PRX_WLANTX_N4 23 24 +3.3V_ALW
+3.3V_PCIE_WWAN +3.3V_PCIE_WWAN 25 26 R233 1 @ 2 0_0402_5%
11 PCIE_PRX_WLANTX_P4 25 26 +3.3V_WLAN
JMINI2 CONN@ 27 28
36,38 PCIE_WAKE# PCIE_WAKE# 1 2 C242 0.1U_0402_10V7K~D 29 27 28 30
3 1 2 4 1 2 PCIE_PTX_WLANRX_N4_C 31 29 30 32 WIGIG60GHZ_DIS#_R For 80 port Debug
5 3 4 6 11 PCIE_PTX_WLANRX_N4 1 2 PCIE_PTX_WLANRX_P4_C 33 31 32 34
7 5 6 8 11 PCIE_PTX_WLANRX_P4 35 33 34 36 HUB_USBP3-
+SIM_PWR C243 0.1U_0402_10V7K~D
32 FMCCLK_REQ# 9 7 8 10 UIM_DATA PCIE_MCARD1_DET# 37 35 36 38 HUB_USBP3+ HUB_USBP3- 33
11 9 10 12 12 PCIE_MCARD1_DET# 39 37 38 40 HUB_USBP3+ 33
UIM_CLK USB_MCARD1_DET#
7 CLK_PCIE_FMC# 13 11 12 14 UIM_RESET 41 39 40 42 USB_MCARD1_DET# 12,37
7 CLK_PCIE_FMC 15 13 14 16 43 41 42 44
UIM_VPP WLAN_LED#
17 15 16 18 45 43 44 46 BT_LED#
19 17 18 20 7 PCH_CL_CLK1 47 45 46 48
21 19 20 22 WWAN_RADIO_DIS# 37 7 PCH_CL_DATA1
1 2 49 47 48 50
MINI_CARD_RST# @ PCH_CL_RST1#_R
23 21 22 24 7 PCH_CL_RST1# 51 49 50 52
R223 0_0402_5% BT_RADIO_DIS#_R
32 SATA_PRX_mSATATX_P3 25 23 24 26 51 52
32 SATA_PRX_mSATATX_N3 27 25 26 28 53 54
C280 0.1U_0402_10V7K~D 29 27 28 30 WWAN_SMBCLK GND1 GND2
1 2 SATA_PTX_mSATARX_N3_C 31 29 30 32 WWAN_SMBDAT
32 SATA_PTX_mSATARX_N3 1 2 SATA_PTX_mSATARX_P3_C 33 31 32 34 LOTES_AAA-PCI-041-K01
32 SATA_PTX_mSATARX_P3 35 33 34 36 1 2
C256 0.1U_0402_10V7K~D HUB_USBP4-_D P/N:SP01000PJ00
37 35 36 38 HUB_USBP4+_D @ R215 0_0402_5%~D
39 37 38 40 USB_MCARD2_DET# D12
41 39 40 42 USB_MCARD2_DET# 37 1 2
LED_WWAN_OUT# WLAN_RADIO_DIS#_R
43 41 42 44 37 WLAN_RADIO_DIS#
mSATA_DEVSLP
45 43 44 46 mSATA_DEVSLP 12
47 45 46 48 HDD_DEVSLP confrim with INTEL
47 48 RB751S40T1_SOD523-2~D
C 49 50 C
51 49 50 52 1 2
37 HW_GPS_DISABLE# 51 52 @ R224 0_0402_5%~D
53 54 D13
GND1 GND2 1 2 WIGIG60GHZ_DIS#_R
37 WIGIG60GHZ_DIS#
LOTES_AAA-PCI-041-K01
P/N:SP01000PJ00 RB751S40T1_SOD523-2~D Primary Power Aux Power
+3.3V_PCIE_WWAN
PWR Voltage
+3.3V_PCIE_WWAN +3.3V_PCIE_WWAN
1 2 Rail Tolerance Peak Normal Normal
2 @ 1 mSATA_DEVSLP @ R225 0_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
22U_0805_6.3V6M~D
33P_0402_50V8J~D
150U_D2_6.3VY_R15M~D
R480 10K_0402_5%~D D14
1
1
@ R216
@ R217
@ C253
@
1 1 1 2 BT_RADIO_DIS#_R +3.3V +-9% 1000 750
37 BT_RADIO_DIS#
220U_6.3V_M
1 1 1 1 1
C254
+ + 250 (Wake enable)
C248
C249
C250
C251
C252
RB751S40T1_SOD523-2~D +3.3Vaux +-9% 330 250 5 (Not wake enable)
2
2 2 2 2 2 2 2
2 1 WWAN_SMBCLK
18,19,20,25,7,9 DDR_XDP_WAN_SMBCLK
@R218
@ R218 0_0402_5%~D
2 1 WWAN_SMBDAT
18,19,20,25,7,9 DDR_XDP_WAN_SMBDAT
@R219
@ R219 0_0402_5%~D
uSIM Card Push-Push LED control circuit

+3.3V_ALW +3.3V_WLAN +3.3V_WLAN
JSIM1 CONN@ 1U_0603_10V6K~D
2 1 C422
U51 @
NC DETECT 1 14 1 2
VIN1 VOUT1
100K_0402_5%~D
100K_0402_5%~D
B UIM_DATA 4 3 2 13 B
I/O NC VIN1 VOUT1
2
R229
R227
UIM_VPP 6 5 UIM_CLK 3 12 C409 1 2
VPP CLK +SIM_PWR 37 AUX_EN_WOWL ON1 CT1
8 7 UIM_RESET 4 11 470P_0402_50V7K~D
GND RST +5V_ALW VBIAS GND
1
10 9 5 10 1 2
NC VCC 37 MCARD_WWAN_PWREN ON2 CT2 C427 470P_0402_50V7K~D
12 11 6 9
GND GND VIN2 VOUT2 +3.3V_PCIE_WWAN
1U_0402_6.3V6K~D
7 8 Q22A
VIN2 VOUT2
2
14 13 1 1 DMN66D0LDW-7_SOT363-6~D
GND GND 15
GPAD
C263
16 15 C425 @ WLAN_LED# 1 6
GND GND WIRELESS_LED# 37,41
TPS22966DPUR_SON14_2X3~D 1U_0603_10V6K~D
18 17 2 2 AUX_EN_WOWL 1 2
GND GND
2
@ RC189 Q30A
T-SOL_159-1000302602 100K_0402_5%~D
P/N:SP070011M00 BT_LED# 1 6
2 MCARD_WWAN_PWREN 1
RC191 DMN66D0LDW-7_SOT363-6~D
100K_0402_5%~D
+3.3V_RUN
@ +3.3V_PCIE_WWAN
U28 @ 0.1U_0402_25V6K~D C338
2 1
100K_0402_5%~D
UIM_RESET 1 6 UIM_VPP
5
2
U30
R226
1
P
2 5 29,31,33,36,37,38,9 PCH_PLTRST#_EC B 4 MINI_CARD_RST#

+SIM_PWR O
100K_0402_5%~D
2
6 MPCIE_RST# A
G
5
@ Q30B
1
1
A UIM_CLK 3 4 UIM_DATA TC7SH08FU_SSOP5~D A

3
R26
LED_WWAN_OUT# 4 3
33P_0402_50V8J~D
@
33P_0402_50V8J~D
@
33P_0402_50V8J~D
@
33P_0402_50V8J~D
@
1 1 1 1 @ DMN66D0LDW-7_SOT363-6~D
SRV05-4.TCT_SOT23-6~D
2
C264
C265
C266
C267
2 2 2 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Mini Card/SIM Card
ESD NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
LA-9832P
5 4 3 2 1
5 4 3 2 1
EXP/FMC PCIe clock/REQ Switch

+COINCELL COIN RTC Battery
1
D D
RTCR1
1K_0402_1%~D
+3.3V_RTC_LDO
2
CONN@
JBT1
Z4012
+COINCELL
1 3
2 1 NC1 4
2 NC2
ACES_50273-0020N-001
3
RTCD1
BAT54CW_SOT323-3
+RTC_CELL
1
1U_0603_10V6K~D
1
C50
B\S EXPRESS_DET#
EXPCLK_REQ# 0
FMCCLK_REQ# 1
C C
UMA@
R485
1 2
0_0402_5%~D
U93 DIS@
FMCCLK_REQ# 1 6 EXPRESS_DET#
31 FMCCLK_REQ# B1 S EXPRESS_DET# 32,36,37
R168 1 DIS@ 2 10K_0402_5%~D 2 5
+3.3V_RUN GND VCC +3.3V_RUN
EXPCLK_REQ# 3 4 SWCLK_REQ#
36,7 EXPCLK_REQ# B0 A SWCLK_REQ# 12,7
+3.3V_RUN R170 1 2 10K_0402_5%~D PI5A3157CEX_SC70-6 1

DIS@ C414
0.01U_0402_16V7K~D
2
R488 @
1 2
0_0402_5%~D
UMA@
+1.5V_RUN
PCIE_PRX_EXPTX_P R96 1 UMA@ 2 0_0402_5%~D PEG_GTX_C_HRX_P0_M DIS@ U91

PCIE_PRX_EXPTX_N R97 1 UMA@ 2 0_0402_5%~D PEG_GTX_C_HRX_N0_M PEG_GTX_C_HRX_P0_M 11 9
PCIE_PTX_EXPRX_P R98 1 UMA@ 2 0_0402_5%~D PEG_HTX_GRX_P0_M PEG_GTX_C_HRX_N0_M 11 11 VDD 4 EXP_PTX_EXPRX_P6_M R50 1 DIS@ 2 0_0402_5%~D EXP_PTX_EXPRX_P6
PEG_HTX_GRX_P0_M 11 VDD A0+ EXP_PTX_EXPRX_P6 6
PCIE_PTX_EXPRX_N R99 1 UMA@ 2 0_0402_5%~D PEG_HTX_GRX_N0_M 13 5 EXP_PTX_EXPRX_N6_M R51 1 DIS@ 2 0_0402_5%~D EXP_PTX_EXPRX_N6
PEG_HTX_GRX_N0_M 11 VDD A0- EXP_PTX_EXPRX_N6 6
19
26 VDD 6 EXP_PRX_EXPTX_P6_M R56 1 DIS@ 2 0_0402_5%~D EXP_PRX_EXPTX_P6
VDD A1+ EXP_PRX_EXPTX_P6 6
28 7 EXP_PRX_EXPTX_N6_M R60 1 DIS@ 2 0_0402_5%~D EXP_PRX_EXPTX_N6
VDD A1- EXP_PRX_EXPTX_N6 6
PCIE_PTX_EXPRX_P R71 1 DIS@ 2 0_0402_5%~D PCIE_PTX_EXPRX_P_M 24 3 EXPRESS_DET#_M 1 2 EXPRESS_DET#
B 36 PCIE_PTX_EXPRX_P B0+ SEL EXPRESS_DET# 32,36,37 B
PCIE_PTX_EXPRX_N R93 1 DIS@ 2 0_0402_5%~D PCIE_PTX_EXPRX_N_M 23 R37 DIS@ 0_0402_5%~D
36 PCIE_PTX_EXPRX_N 1 2 22 B0-
PCIE_PRX_EXPTX_P R95 DIS@ 0_0402_5%~D PCIE_PRX_EXPTX_P_M
EXPRESS <----- 36 PCIE_PRX_EXPTX_P
PCIE_PRX_EXPTX_N R94 1 DIS@ 2 0_0402_5%~D PCIE_PRX_EXPTX_N_M 21 B1+ 1
36 PCIE_PRX_EXPTX_N B1- GND
R61 1 DIS@ 2 0_0402_5%~D SATA_PTX_mSATARX_P3_M 18 10
31 SATA_PTX_mSATARX_P3 C0+ GND
R62 1 DIS@ 2 0_0402_5%~D SATA_PTX_mSATARX_N3_M 17 12
31 SATA_PTX_mSATARX_N3 C0- GND
R68 1 DIS@ 2 0_0402_5%~D SATA_PRX_mSATATX_P3_M 16 14
WWAN FMC <----- 31 SATA_PRX_mSATATX_P3 R67 1 DIS@ 2 0_0402_5%~D SATA_PRX_mSATATX_N3_M 15 C1+ GND 20
31 SATA_PRX_mSATATX_N3 C1- GND 25
2 GND 27
8 NC GND 29
NC TPAD
SEL Destination
PI2DBS6212ZHEX TQFN 28P 0 EXP_PCIE
1 mSATA
UMA@ Co-Layout with PI2DBS6212 PCIE/SATA SW

SATA_PTX_mSATARX_P3 R2665 1 UMA@ 2 0_0402_5%~D EXP_PTX_EXPRX_P6_CL R2660 1 UMA@ 2 0_0402_5%~D EXP_PTX_EXPRX_P6
SATA_PTX_mSATARX_N3 R2664 1 UMA@ 2 0_0402_5%~D EXP_PTX_EXPRX_N6_CL R2661 1 UMA@ 2 0_0402_5%~D EXP_PTX_EXPRX_N6
SATA_PRX_mSATATX_P3 R2662 1 UMA@ 2 0_0402_5%~D EXP_PRX_EXPTX_P6_CL R2658 1 UMA@ 2 0_0402_5%~D EXP_PRX_EXPTX_P6
SATA_PRX_mSATATX_N3 R2663 1 UMA@ 2 0_0402_5%~D EXP_PRX_EXPTX_N6_CL R2659 1 UMA@ 2 0_0402_5%~D EXP_PRX_EXPTX_N6
A A

DELL CONFIDENTIAL/PROPRIETARY Title
RTC Batt/PCIE_SATA SW
0.5
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-9832P
5 4 3 2 1
5 4 3 2 1
D D
+3.3V_USBHUB
+3.3V_RUN +3.3V_USBHUB
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
4.7U_0603_6.3V6K~D
@
PJP12 +3.3V_USBHUB 1 1 C3030 MUST be placed
2
C3028
C3029
1 2
close to pin 36 as
C3030
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
1 1 possible
1
2 2
C3023
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PAD-OPEN1x1m
1 1 1 1 @
C3022
C3024
C3025
C3026
C3027
2 2
2 2 2 2
Place R2689 close to
Pin35 and trace width
USX2064_RBIAS is 20 mils
10
23
29
15
36
5
U90
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
VDDA18CR 14 35 USX2064_RBIAS 1 2
2 1 VDDA18PLL 34 CRFILT RBIAS R2689 12K_0402_1%~D
PLLFILT
1 1
C3032
C3031
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
CC85 18P_0402_50V8J~D 1 HUB_USBP1-
USBDN1_DM/PRT_DIS_M1 HUB_USBP1- 29
2
2 HUB_USBP1+
USBDN1_DP/PRT_DIS_P1 HUB_USBP1+ 29 ----->Finger print module
4
3
RC297 XTAL24M_IN 1 1 XTAL24M_IN 33 12

2 2 XTALIN/CLKIN PRTPWR1/BC_EN1
C3033
C3034
1M_0402_5%~D 13
@ XTAL24M_OUT XTAL24M_OUT 32 OCS_N1
XTALOUT
1
2
1
C Y6 2 2 HS_IND/CFG_SEL1 25 C
2 1 HS_IND/CFG_SEL1
+3.3V_USBHUB USX_SCL 24 3 HUB_USBP2-
22 SCL/SMBCLK/CFG_SEL0 USBDN2_DM/PRT_DIS_M2 4 HUB_USBP2- 36
CC86 18P_0402_50V8J~D 24MHZ_12PF_+-20PPM CRG3202412 USX_SDA HUB_USBP2+
2 1 28 SDA/SMBDATA/NON_REM1 USBDN2_DP/PRT_DIS_P2 16 HUB_USBP2+ 36 ----->Express card /Smart card
SUSP_IND/LOCAL_PWR/NON_REM0 PRTPWR2/BC_EN2 17
R2701 10K_0402_5%~D OCS_N2
2 @ 1 26
29,31,36,37,38,9 PCH_PLTRST#_EC RESET_N
R2699 0_0402_5%
+3.3V_USBHUB 11 6 HUB_USBP3-
TEST USBDN3_DM/PRT_DIS_M3 7 HUB_USBP3- 31
HUB_USBP3+
2 1 27 USBDN3_DP/PRT_DIS_P3 18 HUB_USBP3+ 31 ----->WLAN/BT
VBUS_DET PRTPWR3/BC_EN3 19
R2700 10K_0402_5%~D OCS_N3
Thermal Slug(VSS)
USBP7-_D 30
+3.3V_USBHUB USBP7+_D 31 USBDM_UP 8 HUB_USBP4-
USBDP_UP USBDN4_DM/PRT_DIS_M4 9 HUB_USBP4- 31
HUB_USBP4+
USBDN4_DP/PRT_DIS_P4 20 HUB_USBP4+ 31 ----->WWAN
PRTPWR4/BC_EN4 21
OCS_N4
+3.3V_USBHUB
37
USX2064-AEZG-TR_QFN36_6X6
2
@
R2691 R2692 R2693
10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D
2
B B
1
HS_IND/CFG_SEL1 USX_SCL 1 6 USH_SMBCLK

USX_SCL USH_SMBCLK 38
USX_SDA QC4A 2 @ 1
5
DMN66D0LDW-7_SOT363-6~D R2694 0_0402_5%

2
@ @ USX_SDA 4 3 USH_SMBDAT 2 @ 1
USH_SMBDAT 38
R2695 R2696 R2698 R2697 0_0402_5%
100K_0402_5%~D 100K_0402_5%~D 100K_0402_5%~D QC4B
1
L72 @
3 4
3 4 USBP7- 11
USBP7-_D
USBP7+_D 2 1
2 1 USBP7+ 11
DLW21SN900SQ2L_0805_4P~D
EMI
USX2064 CFG Selection Table
CFG_SEL[0]
CFG_SEL[1]
0 1
SMBus
A 0 Default slave device A
Bus-powered I2C
1 operation EEPROM
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT USB2.0 HUB-USX2064
5 4 3 2 1
5 4 3 2 1
USB 3.0 Re-driver for IOB

+3.3V_RUN +3.3V_RUN
+3.3V_RUN
R2628
R2629
R2630
R2631
R2633
R2634
R2635
R2636
R2637
@ @ @ @
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.01U_0402_16V7K~D
@ @ @ @
10U_0805_10V6K
@
1
1 1 1 @ 1
C2964
D 76_U3@ D
C2965
C2962
C2963
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
2
2
2 2 2 2
2
+3.3V_RUN
B_EQ_0B A_EQ_0B
B_EQ_1B A_EQ_1B U83 76_U3@
B_DE_0B A_DE_0B 1 1
B_DE_1B A_DE_1B C2972 13 VDD
TESTB 0.1U_0402_16V4Z~D VDD
REXTB
2
R2639
R2638
A_EQ_1B 15 4 B_EQ_1B
A_DE_0B 16 A_EQ1/SDA_CTL B_EQ1/I2C_ADDR1 3 B_DE_0B
4.53K_0402_1% A_EQ_0B 17 A_DE0/SCL_CTL B_DE0/I2C_ADDR0 2 B_EQ_0B
A_EQ0/NC B_EQ0/NC
1
1
A_DE_1B 18 6 B_DE_1B
A_DE1/NC B_DE1/NC
R2644
76_U3@ 76_U3@ 76_U3@ USB3TP1 0.1U_0402_10V7K~D 1 2 C2969 USB3TP1_C 19 12 USB3TP1_RP_C R2656 1 @ 2 0_0402_5% USB3TP1_RP
11 USB3TP1 A_INp A_OUTp USB3TP1_RP 36
4.7K_0402_5%~D
4.7K_0402_5%~D
USB3TN1 0.1U_0402_10V7K~D 1 2 C2968 USB3TN1_C 20 11 USB3TN1_RP_C R2657 1 @ 2 0_0402_5% USB3TN1_RP
11 USB3TN1 A_INn A_OUTn USB3TN1_RP 36
2
2
0_0402_5%
USB3RP1_R R2654 1 @ 2 USB3RP1_RC 9 22 USB3RP1_C C2967 2 1 0.1U_0402_10V7K~D USB3RP1
36 USB3RP1_R 1 2 8 B_INp B_OUTp 23 USB3RP1 11
USB3RN1_R R2655 @ USB3RN1_RC USB3RN1_C C2966 2 1 0.1U_0402_10V7K~D USB3RN1
36 USB3RN1_R B_INn B_OUTn USB3RN1 11
0_0402_5%
PD#B PD#B 5
@ REXTB 7 PD# 10
R2627 TESTB 14 REXT GND 21
1 2 24 TEST GND 25
+3.3V_RUN I2C_EN GPAD
R2626
C C
ONLY FOR VAW30 4.7K_0402_5%~D PS8713BTQFN24GTR2_TQFN24_4X4
1
Pericom (Main) Parade (2nd) Pin24 internal pull-down
@
(pin control mode)
SA00006WV00 SA00005OR20
2K_0402_5%
2
POP:R2638, R2639 POP:R2628 Co-Layout with PS8713B USB3.0 re-driver
USB3TP1 R2653 1 @ 2 0_0402_5%~D USB3TP1_RP_CL R2648 1 @ 2 0_0402_5%~D USB3TP1_RP
POP:R2644 POP:R2644
USB3TN1 R2652 1 @ 2 0_0402_5%~D USB3TN1_RP_CL R2649 1 @ 2 0_0402_5%~D USB3TN1_RP
(SD00000U200) (SD034453180)
A channel EQ 3db DE -3.5db A channel EQ 9.5db DE 3.5db USB3RP1_R R2650 1 @ 2 0_0402_5%~D USB3RP1_R_CL R2646 1 @ 2 0_0402_5%~D USB3RP1
B channel EQ 3db DE -3.5db B channel EQ 13db DE 3.5db USB3RN1_R R2651 1 @ 2 0_0402_5%~D USB3RN1_R_CL R2647 1 @ 2 0_0402_5%~D USB3RN1
+5V_ALW
+5V_USB_CHG_PWR Ext USB3 Port 1

0.1U_0402_25V6K~D
B B
10U_0805_10V6K
1 1
C288
C289
JUSB1 CONN@
1
USBP1_R_D- 2 VBUS
2 2 +5V_USB_CHG_PWR USBP1_R_D+ 3 D-
D+
0.1U_0402_25V6K~D
4
GND
47U_0805_6.3V6M
US1 1 @ USB3RN0_D- 5
StdA-SSRX-
220U_6.3V_M
1 8 1 1 USB3RP0_D+ 6 10
GND VOUT StdA-SSRX+ GND
C809
2 7 + 7 11
VIN VOUT GND-DRAIN GND
C290
C291
3 6 USB3TN0_D- 8 12
VIN VOUT StdA-SSTX- GND D17,D18 will be
2
USB_SIDE_EN# 4 5 USB3TP0_D+ 9 13
37 USB_SIDE_EN# EN FLG USB_OC1# 11,12 2 2 2 StdA-SSTX+ GND
D18
merged to one ESD
G547I2P81U_MSOP8 SANTA_373280-4
P/N:DC23300BD00 part later.
ESD@
L40 EMI@
1 2 USB3RN0_D-
11 USB3RN0 1 2
D17 ESD@
1
4 3 USB3RP0_D+ USB3RN0_D- 1 10 USB3RN0_D-
11 USB3RP0 4 3
DLW21SN900HQ2L_0805_4P~D USB3RP0_D+ 2 9 USB3RP0_D+
1 2
R246 @ 0_0402_5%~D USB3TN0_D- 4 7 USB3TN0_D-
L42 EMI@ EMI ESD
1 2 DLW21SN900SQ2L_0805_4P~D USB3TP0_D+ 5 6 USB3TP0_D+
R247 @ 0_0402_5%~D USBP1+ 4 3 USBP1_R_D+
11 USBP1+ 4 3 3
EMI USBP1- 1 2 USBP1_R_D- 8

A L41 EMI@
11 USBP1- 1 2 ESD A
2 1 USB3TN0_C 1 2 USB3TN0_D- IP4292CZ10-TBR_XSON10_2.5X1~D
11 USB3TN0 1 2 1 2
C292 0.1U_0402_10V7K~D
R249 @ 0_0402_5%~D
2 1 USB3TP0_C 4 3 USB3TP0_D+
11 USB3TP0
C293 0.1U_0402_10V7K~D 4
3 1
R251 @
2
0_0402_5%~D
1 2
R248 @ 0_0402_5%~D Compal Electronics, Inc.
1 2 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
R250 @ 0_0402_5%~D BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, USB on MB/Redriver
LA-9832P
Date: Friday, August 30, 2013 Sheet 34 of 64
5 4 3 2 1
5 4 3 2 1
JDOCK1 CONN@
DOCK_DET_1 1 2 DOCK_AC_OFF
3 1 2 4 DOCK_AC_OFF 59
28 DOCK_LOM_SPD10LED_GRN# DPC_CA_DET 5 3 4 6 DPB_CA_DET DOCK_LOM_SPD100LED_ORG# 28
21,24 DPC_CA_DET 7 5 6 8 DPB_CA_DET 21,24
D C302 2 1 0.1U_0402_10V7K~D DPC_LANE_P0_C R259 1 @ 2 0_0402_5% DPC_DOCK_LANE_P0 9 7 8 10 DPB_DOCK_LANE_P0 R260 1 @ 2 0_0402_5% DPB_LANE_P0_C C294 2 1 0.1U_0402_10V7K~D D
21 DPC_LANE_P0 9 10 DPB_LANE_P0 21
C295 2 1 0.1U_0402_10V7K~D DPC_LANE_N0_C R252 1 @ 2 0_0402_5% DPC_DOCK_LANE_N0 11 12 DPB_DOCK_LANE_N0 R261 1 @ 2 0_0402_5% DPB_LANE_N0_C C296 2 1 0.1U_0402_10V7K~D
21 DPC_LANE_N0 13 11 12 14 DPB_LANE_N0 21
C297 2 1 0.1U_0402_10V7K~D DPC_LANE_P1_C R253 1 @ 2 0_0402_5% DPC_DOCK_LANE_P1 15 13 14 16 DPB_DOCK_LANE_P1 R254 1 @ 2 0_0402_5% DPB_LANE_P1_C C298 2 1 0.1U_0402_10V7K~D
DPC_DOCK_AUX 33 31 32 34 DPB_DOCK_AUX
EMI 24
24
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPC_DOCK_AUX# 35 33
35
34
36
36 DPB_DOCK_AUX#
DPB_DOCK_AUX 24
DPB_DOCK_AUX# 24
EMI
37 38
DPC_DOCK_HPD 39 37 38 40 DPB_DOCK_HPD
21 DPC_DOCK_HPD 41 39 40 42 DPB_DOCK_HPD 21
+NBDOCK_DC_IN_SS 41 42 ACAV_DOCK_SRC# 59
1
1
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1 43 44 1
BLUE_DOCK_PI 45 43 44 46
45 46 DAT_DDC2_DOCK 22
C310
EMI@
C311 EMI@
R268 47 48 R271
49 47 48 50 CLK_DDC2_DOCK 22
100K_0402_5%~D 100K_0402_5%~D Close to DOCK
2 51 49 50 52 2
Its for Enhance ESD on
2
2
RED_DOCK_PI 53 51 52 54 SATA_PRX_DKTX_P0 2 1
EMI 55 53
55
54
56
56 SATA_PRX_DKTX_N0 C312 2 1 0.01U_0402_16V7K~D SATA_PRX_DKTX_P0_C 6
SATA_PRX_DKTX_N0_C 6
dock issue.
57 58 C313 0.01U_0402_16V7K~D
GREEN_DOCK_PI 59 57 58 60 SATA_PTX_DKRX_P0 1 2
Close to DOCK 61 59
61
60
62
62 SATA_PTX_DKRX_N0 C314 1 2 0.01U_0402_16V7K~D SATA_PTX_DKRX_P0_C 6
SATA_PTX_DKRX_N0_C 6
EMI EMI
63 64 C315 0.01U_0402_16V7K~D L43 @
Its for Enhance ESD on dock issue. 65 63 64 66 DOCK_USBP2_D+ 3 4
22 HSYNC_DOCK 67 65 66 68 3 4 DOCK_USBP2+ 11
DOCK_USBP2_D-
22 VSYNC_DOCK 69 67 68 70
71 69 70 72 DOCK_USBP1_D+ 2 1
C 38 CLK_MSE 73 71 72 74 DOCK_USBP1_D- 2 1 DOCK_USBP2- 11 C
38 DAT_MSE 75 73 74 76 DLW21SN900SQ2L_0805_4P~D
0_0402_5% 1 @ 2 L71 BLUE_DOCK_PI 77 75 76 78
22 BLUE_DOCK 27 DAI_BCLK# 79 77 78 80 CLK_KBD 38 2 1
@
27 DAI_LRCK# 81 79 80 82 DAT_KBD 38
R269 0_0402_5%
0_0402_5% 1 @ 2 L70 RED_DOCK_PI 83 81 82 84 USB3RN4_D- 2 @ 1
22 RED_DOCK 27 DAI_DI 85 83 84 86 USB3RP4_D+ R270 0_0402_5%
27 DAI_DO# 87 85 86 88
87 88 EMI solution for E-Docking USB
0_0402_5% 1 @ 2 L69 GREEN_DOCK_PI 89 90 USB3TN4_D-
22 GREEN_DOCK 27 DAI_12MHZ# 91 89
91
90
92
92 USB3TP4_D+ EMI L53 @
93 94 3 4
95 93 94 96 3 4 DOCK_USBP1+ 11
97 95 96 98
37 D_LAD0 99 97 98 100 BREATH_LED# 37,41 2 1
37 D_LAD1 101 99 100 102 DOCK_LOM_ACTLED_YEL# 28 2 1 DOCK_USBP1- 11
103 101 102 104 DLW21SN900SQ2L_0805_4P~D
37 D_LAD2 105 103 104 106 DOCK_LOM_TRD0+ 28
37 D_LAD3 107 105 106 108 DOCK_LOM_TRD0- 28 2 1
@
109 107 108 110 R415 0_0402_5%
37 D_LFRAME# 111 109 110 112 DOCK_LOM_TRD1+ 28 2 1
@
37 D_CLKRUN# 113 111 112 114 DOCK_LOM_TRD1- 28 R407 0_0402_5%
115 113 114 116
37 D_SERIRQ 115 116 +LOM_VCT
EMI solution for E-Docking USB
117 118
37 D_DLDRQ1# 117 118 +LOM_VCT
119 120
121 119 120 122
7 CLK_PCI_DOCK 121 122 DOCK_LOM_TRD2+ 28 1
123 124 @
125 123 124 126 DOCK_LOM_TRD2- 28
C316
127 125 126 128 1U_0402_6.3V6K~D
38 DOCK_SMB_CLK 129 127 128 130 DOCK_LOM_TRD3+ 28 2
38 DOCK_SMB_DAT 131 129 130 132 DOCK_LOM_TRD3- 28
133 131 132 134
37,51,59 DOCK_SMB_ALERT# 135 133 134 136 DOCK_DCIN_IS+ 58
B 51 DOCK_PSID 137 135 136 138 DOCK_DCIN_IS- 58 1 2 B
137 138 +3.3V_ALW
139 140 R272 10K_0402_5%~D
38 DOCK_PWR_BTN# 141 139 140 142 DOCK_POR_RST# 38
SLICE_BAT_PRES# 143 141 142 144 DOCK_DET_R# 1 2
37,51,59 SLICE_BAT_PRES# 143 144 DOCK_DET# 37,59
145 149 D19 RB751S40T1_SOD523-2~D
GND1 PWR2 +DOCK_PWR_BAR
146 150
+DOCK_PWR_BAR PWR1 PWR2
PESD24VS2UT_SOT23-3~D
0.1U_0603_50V7K~D
147 151
PWR1 PWR2
3
2
0.1U_0603_50V7K~D
148 152
PWR1 GND2
4.7U_0805_25V6K~D
2
D20 ESD@
C318
1 @ 1 153 159
Shield_G Shield_G
C317
154 160 D87

Shield_G Shield_G
CE7
155 161 @
156 Shield_G Shield_G 162 2
1
L55 @ 2 2 157 Shield_G Shield_G 163

4 3 USB3RN4_D- 158 Shield_G Shield_G 164
11 USB3RN4 4 3 Shield_G Shield_G
DAI_12MHZ# DAI_BCLK# CLK_PCI_DOCK
1 2 USB3RP4_D+
1
11 USB3RP4 1 2
1
DLW21SN900HQ2L_0805_4P~D ESD JAE_WD2F144WB3R300~D ESD @ RE4 @ RE5 R273
1 @ 2 P/N:SP030000G0L 10_0402_1%~D 10_0402_1%~D @ 33_0402_5%~D
R274 0_0402_5%
2
1 @ 2 Place D87 near to JDOCK1.
R276 0_0402_5% EMI 1 1 1
@CE8
@CE8 @CE9
@CE9 @ C319
4.7P_0402_50V8C~D 4.7P_0402_50V8C~D 12P_0402_50V8J~D
2 2 2
L56 @
4 3 USB3TN4_D-
11 USB3TN4 4 3
A EMI A
1 2 USB3TP4_D+
11 USB3TP4 1 2
1 @ 2
R275 0_0402_5% DELL CONFIDENTIAL/PROPRIETARY
1 2
R277
@
0_0402_5% Compal Electronics, Inc.
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT E series Dock Connector
5 4 3 2 1
5 4 3 2 1
+5V_ALW USB BOARD Conn. IOB Conn. +5V_ALW

JIO1
0.1U_0402_16V4Z~D
2 1
2 1 3 +5V_RUN
4
4 3 5 +3.3V_LAN
1 +5V_ALW 6 <------------------------Pin6 for IOB Detect loopback
C1186
CONN@ 8 6 5 7
10 8 7 9 LAN_ACTLED_YEL# 28
JUDB1
1 37 USB_PWR_SHR_VBUS_EN# 12 10 9 11 LED_100_ORG# 28
2 2 1 37 USB_PWR_SHR_EN# 14 12 11 13 LED_10_GRN# 28
3 2 11,12 USB_OC0# 16 14 13 15 SW_LAN_TX0-
+3.3V_ALW 4 3
4
Close to JIO1 22 RED_CRT
RED_CRT 18 16
18
15 17
17 19
SW_LAN_TX0+ SW_LAN_TX0- 28
SW_LAN_TX0+ 28
5 GREEN_CRT 20
Place close to JP1.1 6 5 D2 22 GREEN_CRT BLUE_CRT 22 20 19 21 SW_LAN_TX1-
D 7 6 2 22 BLUE_CRT 24 22 21 23 SW_LAN_TX1- 28 D
SLEEVE SW_LAN_TX1+
USB_DB_PWR_EN# 8 7 1 HSYNC_BUF 26 24 23 25 SW_LAN_TX1+ 28
37 USB_DB_PWR_EN# 8 22 HSYNC_BUF 26 25 27 Digital Area
USB_OC2# 9 RING2 3 VSYNC_BUF 28 SW_LAN_TX2-
11,12 USB_OC2# 10 9 22 VSYNC_BUF DAT_DDC2_CRT 30 28 27 29 SW_LAN_TX2+ SW_LAN_TX2- 28
11 10 22 DAT_DDC2_CRT CLK_DDC2_CRT 32 30 29 31 SW_LAN_TX2+ 28
12 11 22 CLK_DDC2_CRT 34 32 31 33 SW_LAN_TX3-
13 12 USB3RN1_R 36 34 33 35 SW_LAN_TX3+ SW_LAN_TX3- 28
USBP2- 14 13 34 USB3RN1_R USB3RP1_R 38 36 35 37 SW_LAN_TX3+ 28
11 USBP2- USBP2+ 15 14 34 USB3RP1_R 40 38 37 39
11 USBP2+ 15 40 39 41
Moat 30 mil
16 USB3TN1_RP 42
WIRELESS_ON#_OFF 17 16 34 USB3TN1_RP USB3TP1_RP 44 42 41 43 SLEEVE 27
37 WIRELESS_ON#_OFF 18 17 34 USB3TP1_RP 46 44 43 45 SLEEVE & RING2 :
LID_CL# 19 18 USBP0+ 48 46 45 47 40mils trace width
37,41 LID_CL# 20 19 11 USBP0+ 50 48 47 49
USB_DB_DET# USBP0-
37 USB_DB_DET# 20 11 USBP0- 52 50 49 51 RING2 27
R490 10K_0402_5%~D
2 1 IOR_DB_DET# 54 52 51 53
+3.3V_ALW 37 IOR_DB_DET# 54 53 55 AUD_HP_OUT_L 27
21 2 1 56
GND +3.3V_ALW 56 55 57 Analog Area
22 R476 10K_0402_5%~D 58
GND +VDDA_AVDD2 58 57 59 AUD_HP_OUT_R 27
60
27,37 AUD_HP_NB_SENSE 62 60 59 61
G2 G1
P/N:SP01001KD00
ACES_51522-02001-P02 E-T_1000K-Y60E-01L
CONN@
P/N:SP02000UZ00
HUB_USBP2+_D 2
L59 @
1
MEDIA BOARD Conn. +3.3V_LAN +5V_RUN +5V_ALW
2 1 HUB_USBP2+ 33
ACES_51522-00601-001 C2980
0.1U_0402_10V7K~D
0.1U_0402_25V6K~D
0.1U_0402_16V4Z~D
C HUB_USBP2-_D 3 4 8 1 2 C
3 4 HUB_USBP2- 33 1 1
7 G2
C482
C1001
1
6 G1
C1185
DLW21SN900SQ2L_0805_4P~D 0.1U_0603_50V7K~D
38 VOL_UP# 5 6
2 @ 1 38 VOL_DOWN# 4 5 2 2
R487 0_0402_5% 38 VOL_MUTE# 3 4 2
2 @ 1 37 MED_DET# 2 3
R486 0_0402_5% 2 1 1 2
+3.3V_ALW 1
R477 10K_0402_5%~D JMED1 Place close to JIO1.4 Place close to JIO1.2 Place close to JIO1.1
CONN@
EMI P/N:SP01000F200
POWER BOARD Conn.

Express/Smart Card Conn. +5V_ALW +3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CONN@
JPWR1 1 1
C1188
C1189
+3.3V_RUN +1.5V_RUN 1
+5V_ALW 1
JEXP1 CONN@ 2
2 1 3 2
2 1 3 +3.3V_RUN 3 2 2
4 BREATH_LED#_Q 4
6 4 3 5 41 BREATH_LED#_Q 5 4
8 6 5 7 37 PWR_DET# 6 5
HUB_USBP2+_D 10 8 7 9 2 R479 1 DMIC1 7 6
10 9 11 +3.3V_ALW 27 DMIC1 7
HUB_USBP2-_D 12 DMIC_CLK1 8
B 14 12 11 13 +5V_RUN
10K_0402_5%~D
27 DMIC_CLK1 9 8 11
Place close to JPWR1.1 Place close to JPWR1.2 B
16 14 13 15 10 9 GND 12
7 CLK_PCIE_EXP# 18 16 15 17 38,41 POWER_SW#_MB 10 GND
7 CLK_PCIE_EXP 20 18 17 19
20 19 21 +3.3V_SUS
22 ACES_51522-01001-001
32 PCIE_PRX_EXPTX_N 22 21 23
24
32 PCIE_PRX_EXPTX_P 24 23 25
C647 0.1U_0402_10V7K~D 26
1 2 PCIE_PTX_EXPRX_N_C 28 26 25 27
32 PCIE_PTX_EXPRX_N 1 2 PCIE_PTX_EXPRX_P_C 30 28 27 29 EXPRESS_DET# 32,37
EXPRCRD_STBY_R# 0_0402_5% 2 @ 1 R734
32 PCIE_PTX_EXPRX_P 32 30 29 31 SIO_SLP_S3# 37,40,53,9
C648 0.1U_0402_10V7K~D
34 32 31 33 EXPCLK_REQ# 32,7
38 CARD_SMBCLK
38 CARD_SMBDAT
36
38
34
36
33 35
35 37
SMART_DET# 37
PCH_PLTRST#_EC 29,31,33,37,38,9 LED EXTERNAL BOARD Conn.
40 38 37 39
31,38 PCIE_WAKE# 40 39 SC48M_CLK_EN 12
42 41 CONN@
+5V_ALW: 40mil
G2 G1
R478 JLED1
E&T_1001K-F40C-03L 10K_0402_5%~D 1 +5V_ALW
+5V_ALW 1
P/N:SP01001I400 2 1 2
+3.3V_ALW 2
0.1U_0402_16V4Z~D
3
4 3
Link CIS 37 LED_DET# 5 4
1
41 HDD_LED# 5
C1187
6
+3.3V_SUS 41 BATT_WHITE_LED# 7 6
+1.5V_RUN +3.3V_RUN +5V_RUN
41 BATT_YELLOW_LED# 8 7
+1.5V_RUN
41 BREATH_WHITE_LED# 8 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
EXPCLK_REQ# EXPRESS_DET# PCH_PLTRST#_EC 9

41 WLAN_LED 9
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10
11 10 13
1 1 1 1 11 GND
1 1 1 1 12 14
12 GND
C635
C634
C633
C645
Place close to JLED1.1

C636
@
CE20
@
CE22
@
CE14
@
ACES_51522-01201-001
A 2 2 2 2 A
2 2 2 2
Close to JEXP1 DELL CONFIDENTIAL/PROPRIETARY

EMI TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
I/O Conn
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
LA-9832P
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW
1 2 HW_GPS_DISABLE#
R282 100K_0402_5%~D +3.3V_ALW +3.3V_ALW_5048
1 2 PROCHOT_GATE @
R283 100K_0402_5%~D PJP6
1 2 CPU_DETECT# 1 2
R284 100K_0402_5%~D 1 1 1 1 1 1
1 2 SLICE_BAT_PRES#
R285 100K_0402_5%~D R79 C328 PAD-OPEN1x1m C329 C330 C334 C331 C332
1 2 WWAN_RADIO_DIS# 0_0402_5%~D 10U_0603_6.3V6M~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D 0.1U_0402_10V7K~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
R286 100K_0402_5%~D GPU_PWR_LEVEL 1 DIS@ 2 GPIOA7 2 2 2 2 2 2
D 1 2 GPU_PWR_LEVEL GPUHOT# 1 @ 2 GPIOA6 D
DIS@ R296 10K_0402_5%~D 0_0402_5%~D
A17
B30
A43
A54
1 2 USB_SIDE_EN# R78
B5
R288 10K_0402_5%~D U37
1 2 WIGIG60GHZ_DIS#
VCC1
VCC1
VCC1
VCC1
VCC1
@ R289 100K_0402_5%~D A23
CRT_SWITCH B52 GPIOI0 B63 SIO_SLP_A#
22 CRT_SWITCH GPIO11_NVVDD_VID A49 GPIOA0 GPIOI1 A60 SIO_SLP_A# 40,54,9
45,60 GPIO11_NVVDD_VID MED_DET# B53 GPIOA1 GPIOI2/TACH0 A61
36 MED_DET# A50 GPIOA2 GPIOI3 B65 SIO_SLP_S4# 40,53,55,9
58 PROCHOT_GATE PROCHOT_GATE
LID_CL_SIO# B54 GPIOA3 GPIOI4 A62 SIO_SLP_S3# 36,40,53,9
DOCK_SMB_ALERT# A51 GPIOA4 GPIOI5 B66 1 2 IMVP_PWRGD 56
@
35,51,59 DOCK_SMB_ALERT# 1 2 GPIOA6 B55 GPIOA5 GPIOI6 A63 IMVP_VR_ON 56
@ R294 0_0402_5%
GPU_PWR_LEVEL R70 10_0402_5%~D
2 GPIOA7 A52 GPIOA6 GPIOI7 DOCK_AC_OFF_EC 59
45 GPU_PWR_LEVEL GPUHOT# R72 @ 0_0402_5%~D GPIOA7 B67
45,60 GPUHOT# A33 GPIOJ0 A64 AUX_EN_WOWL 31
USB_SIDE_EN#
34 USB_SIDE_EN# EN_I2S_NB_CODEC# B36 GPIOB0 GPIOJ1/TACH1 A5 SIO_SLP_LAN# WLAN_LAN_DISB# 28
27 EN_I2S_NB_CODEC# LED_DET# A34 GPIOB1 GPIOJ2/TACH2 B6 SIO_SLP_SUS# SIO_SLP_LAN# 28,9
36 LED_DET# B37 GPOC2 GPIOJ3 A6 SIO_SLP_SUS# 9
59 EN_DOCK_PWR_BAR EN_DOCK_PWR_BAR
1 2 DOCK_SMB_ALERT# PANEL_BKEN_EC A35 GPOC3 GPIOJ4 B7 MODC_EN GPIO_PSID_SELECT 51
20 PANEL_BKEN_EC B38 GPOC4 GPIOJ5 A7 MODC_EN 26
R292 100K_0402_5%~D ENVDD_PCH DOCK_HP_DET
1 2 WIRELESS_ON#_OFF 10,20 ENVDD_PCH LCD_TST A36 GPOC5 GPIOJ6 B8 DOCK_MIC_DET DOCK_HP_DET 27
20 LCD_TST PSID_DISABLE# A37 GPOC6/TACH4 GPIOJ7 DOCK_MIC_DET 27
R293 100K_0402_5%~D
1 2 ESATA_USB_PWR_EN# 51 PSID_DISABLE# PBAT_PRES# B40 GPIOC7 A8 ME_FWP
51,59 PBAT_PRES# GPIOD0 GPIOK0 ME_FWP 6
@ R295 100K_0402_5%~D DOCKED A38 B9 MASK_SATA_LED#
1 2 28 DOCKED B41 GPIOC1 GPIOK1/TACH3 B10 MASK_SATA_LED# 41
BT_RADIO_DIS# DOCK_DET# USB_PWR_SHR_EN#
35,59 DOCK_DET# AUD_NB_MUTE# A39 GPIOC0 GPIOK2 A10 LED_SATA_DIAG_OUT# USB_PWR_SHR_EN# 36
@ R298 100K_0402_5%~D +3.3V_RUN
1 2 GPUHOT# 27 AUD_NB_MUTE# MCARD_WWAN_PWREN B42 GPIOB7 GPIOK3 B11 LED_SATA_DIAG_OUT# 41
@ R389 100K_0402_5%~D 31 MCARD_WWAN_PWREN LCD_VCC_TEST_EN A40 GPIOB6 GPIOK4 A11 RUN_ON RP5
1 2 20 LCD_VCC_TEST_EN B43 GPIOB5 GPIOK5 B12 RUN_ON 27,38,40,55 1 8
USB_PWR_SHR_VBUS_EN# CCD_OFF D_DLDRQ1#
20 CCD_OFF AUD_HP_NB_SENSE A41 GPIOB4 GPIOK6 A12 AC_DIS 51,59 D_SERIRQ 2 7
R302 100K_0402_5%~D
1 2 USB_PWR_SHR_EN# 27,36 AUD_HP_NB_SENSE USB_DB_PWR_EN# B44 GPIOB3 GPIOK7 SPI_WP#_SEL 7 D_CLKRUN# 3 6
C 36 USB_DB_PWR_EN# GPIOB2 B60 SUS_ON USB_MCARD2_DET# 4 5 C
R391 100K_0402_5%~D
1 2 USB_DB_PWR_EN# GPIOL0/PWM7 A57 SUS_ON 40,53
R291 10K_0402_5%~D B32 GPIOL1/PWM8 B64 BAT1_LED# 100K_0804_8P4R_5%
GPIOD1 GPIOL2/PWM0 BAT1_LED# 41 trace width 20 mils
SLICE_BAT_ON A31 B68
59 SLICE_BAT_ON GPIOD2 GPIOL3/PWM1
SLICE_BAT_PRES# B33 A9 BAT2_LED# trace width 20 mils
35,51,59 SLICE_BAT_PRES# EXPRESS_DET# B15 GPIOD3 GPIOL4/PWM3 B1 BAT2_LED# 41
32,36 EXPRESS_DET# A15 GPIOD4 GPIOL5/PWM2 A18
SMART_DET# USB_MCARD2_DET#
36 SMART_DET# B16 GPIOD5 GPIOL6 A44 USB_MCARD2_DET# 31 2 1
EXPRESS_DET#
FPR_DET# A16 GPIOD6 GPIOL7/PWM5 100K_0402_5%~D R419
29 FPR_DET# GPIOD7 B34 HW_GPS_DISABLE#
GPIOM1 B39 BREATH_LED# HW_GPS_DISABLE# 31 RUN_ON 2 1
A1 GPIOM3/PWM4 B51 BREATH_LED# 35,41
WIGIG60GHZ_DIS# R303 100K_0402_5%~D
31 WIGIG60GHZ_DIS# B2 GPIOE0/RXD GPIOM4/PWM6 DIS_BAT_PROCHOT# 59 2 1
EC5048_TX CPU_VTT_ON
+3.3V_RUN 38 EC5048_TX USB_DB_DET# A2 GPIOE1/TXD R305 100K_0402_5%~D
36 USB_DB_DET# MCARD_PCIE_MSATA# B3 GPIOE2/RTS# A27 LPC_LAD0
1 2 SP_TPM_LPC_EN 6 MCARD_PCIE_MSATA# CPU_DETECT# A3 GPIOE3/DSR# LAD0 A26 LPC_LAD1 LPC_LAD0 29,31,38,7
9 CPU_DETECT# B45 GPIOE4/CTS# LAD1 B26 LPC_LAD1 29,31,38,7 2 1
@ R304 10K_0402_5%~D LPC_LAD2 SLICE_BAT_ON
A42 GPIOE5/DTR# LAD2 B25 LPC_LAD2 29,31,38,7
LPC_LAD3 R307 100K_0402_5%~D
B4 GPIOE6/RI# LAD3 A21 LPC_LAD3 29,31,38,7 2 1
PWR_DET# LPC_LFRAME# SUS_ON
1 2 SMART_DET# 36 PWR_DET# GPIOE7/DCD# LFRAME# B22 PCH_PLTRST#_EC LPC_LFRAME# 29,31,38,7
R308 100K_0402_5%~D
LRESET# A28 CLK_PCI_5048 PCH_PLTRST#_EC 29,31,33,36,38,9
R484 100K_0402_5%~D
A59 PCICLK B20 CLK_PCI_5048 7
USB_MCARD1_DET# CLKRUN#
12,31 USB_MCARD1_DET# IOR_DB_DET# B62 GPIOF0 CLKRUN# CLKRUN# 29,38,9
36 IOR_DB_DET# A58 GPIOF1 A22
9 SUSACK# B61 GPIOF2 LDRQ1# B21 IRQ_SERIRQ
DGPU_PWROK A56 GPIOF3/TACH8 SER_IRQ A32 IRQ_SERIRQ 12,29,38,9
1 2 10,12,60,62 DGPU_PWROK B59 GPIOF4/TACH7 14.318MHZ/GPIOM0 B35
@ DGPU_PWROK VGA_ID
GPIOF5 CLK32/GPIOM2 EC_32KHZ_ECE5048 38
R354 10K_0402_5%~D 3.3V_RUN_GFX_ON A55
SLP_ME_CSW_DEV# B58 GPIOF6
12 SLP_ME_CSW_DEV# GPIOF7 B29 D_LAD0
1 2 LCD_TST DLAD0 B28 D_LAD1 D_LAD0 35
R309 100K_0402_5%~D LAN_DISABLE#_R B47 DLAD1 A25 D_LAD2 D_LAD1 35
B 1 2 28 LAN_DISABLE#_R A45 GPIOG0/TACH5 DLAD2 A24 D_LAD2 35 B
SYS_LED_MASK# CHARGE_EN D_LAD3
R310 10K_0402_5%~D SYS_LED_MASK# B48 GPIOG1 DLAD3 B23 D_LFRAME# D_LAD3 35
41 SYS_LED_MASK# GPIOG2 DLFRAME# D_LFRAME# 35
1 2 CHARGE_EN A46 A19 D_CLKRUN#
GPIOG3 DCLKRUN# D_CLKRUN# 35
R313 100K_0402_5%~D 12 SIO_EXT_WAKE# R316 1 @ 2 0_0402_5% B49 B24 D_DLDRQ1#
A47 GPIOG4 DLDRQ1# A20 D_DLDRQ1# 35
WIRELESS_LED# D_SERIRQ
31,41 WIRELESS_LED# USB_PWR_SHR_VBUS_EN# B50 GPIOG5 DSER_IRQ D_SERIRQ 35
36 USB_PWR_SHR_VBUS_EN# A48 GPIOG6
WLAN_RADIO_DIS#
31 WLAN_RADIO_DIS# GPIOG7/TACH6 A29 BC_INT#_ECE5048
BC_INT# B31 BC_DAT_ECE5048 BC_INT#_ECE5048 38
B13 BC_DAT A30 BC_DAT_ECE5048 38
WIRELESS_ON#_OFF BC_CLK_ECE5048
36 WIRELESS_ON#_OFF BT_RADIO_DIS# A13 GPIOH0 BC_CLK BC_CLK_ECE5048 38
31 BT_RADIO_DIS# A53 GPIOH1
WWAN_RADIO_DIS#
31 WWAN_RADIO_DIS# SYS_PWROK B57 SYSOPT1/GPIOH2 A4 RUNPWROK
9 SYS_PWROK B14 SYSOPT0/GPIOH3 PWRGD RUNPWROK 38,9
R318 1 @ 2 0_0402_5% A14 GPIOH4 B56 SP_TPM_LPC_EN
9 SIO_SLP_WLAN# CPU_VTT_ON B17 GPIOH5 OUT65 SP_TPM_LPC_EN 29
+3.3V_ALW
1 @ 2 B18 GPIOH6
9 PCH_DPWROK GPIOH7 B19 1 2
R319 0_0402_5%
TEST_PIN R321 1K_0402_5%~D +CAP_LDO trace width 20 mils
1
B46 +CAP_LDO
CAP_LDO CLK_PCI_5048 R322
1
B27 100K_0402_5%~D
VSS C1 C336
EP
1
4.7U_0603_6.3V6K~D
2
DB Version 0.4 2 @ R324
+3.3V_ALW ECE5048-LZY_DQFN132_11X11~D 33_0402_5%~D LID_CL_SIO# 2 1
LID_CL# 36,41
R325 10_0402_1%~D
100K_0402_5%~D 100K_0402_5%~D
2
2
UMA@
R317
1 C337
ME_FWP PCH has internal 20K PD. @ C339 0.047U_0402_16V4Z~D
33P_0402_50V8J~D 2
A (suspend power rail) A
1
ME_FWP 2
VGA_ID
1
@ R326
@R326 EMI
2
1K_0402_5%~D
R320
DIS@
VGA_ID0
2
Discrete 0 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
1
UMA 1 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SIO & GPIO ECE5048
LA-9832P
5 4 3 2 1
5 4 3 2 1
+RTC_CELL +RTC_CELL
100K_0402_5%~D
100K_0402_5%~D
1
1
R327
R328
@ C340 @ C342
1 2 1 2
1U_0402_6.3V6K~D 1U_0402_6.3V6K~D
2
+RTC_CELL POWER_SW_IN# 1 2 DOCK_PWR_SW# 1 2
POWER_SW#_MB 36,41 DOCK_PWR_BTN# 35
R329 10K_0402_5%~D R330 10K_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 @ 2 +RTC_CELL_VBAT 1 1
R332 0_0402_5% +1.05V_RUN
0.1U_0402_25V6K~D
C343
C344
2 2
10K_0402_5%~D
1 1 @ 2
1
@ R335
R334 0_0402_5%
C345
2
H_PROCHOT# 56,58,59,9
1
U38 D @
D 1 @ 2 +3.3V_VTR PROCHOT#_EC 2 Q9 D
+3.3V_ALW_5075
R336 0_0402_5% B64 A10 SYSTEM_ID G L2N7002WT1G_SC-70-3
VBAT GPIO021/RC_ID1
0.1U_0402_25V6K~D
1U_0402_6.3V4Z~D
+3.3V_ALW_5075 B10 BOARD_ID S
3
GPIO020/RC_ID2
100K_0402_5%~D
+3.3V_ALW 1 1 B8 R338 1 2 1K_0402_5%~D
GPIO014/GPTP-IN7/RC_ID3 VOL_UP# 36
2
A22 B27 LAN_WAKE#
H_VTR GPIO025/UART_CLK LAN_WAKE# 12,28
C346
C352
@ R342
1 @ 2 +3.3V_VTR_ADC B44 HOST_DEBUG_TX
R461 GPIO120/UART_TX B46 HOST_DEBUG_RX
2 2 GPIO124/GPTP-OUT5/UART_RX
0.1U_0402_25V6K~D
1U_0402_6.3V4Z~D
0_0402_5% A58 B26 RUNPWROK +3.3V_ALW
VTR_ADC VCC_PWRGD A25 EN_INVPWR RUNPWROK 37,9
1 1
1
1 2 PCIE_WAKE# GPIO060/KBRST/BCM_B_INT# B36 EN_INVPWR 20 RP17
GPIO101/ECGP_SCLK/GANG_DATA5
C353
C347
R340 10K_0402_5%~D B3 B37 THERMATRIP3# 1 8 +RTC_CELL
1 2 BC_DAT_ECE5048 A11 VTR GPIO103/ECGP_MISO/GANG_DATA7 B38 PCIE_WAKE# SLICE_PERF_EN 59 DEVICE_DET# 2 7
+3.3V_ALW +3.3V_ALW_5075 2 2 A26 VTR GPIO105/ECGP_MOSI A34 PCIE_WAKE# 31,36 3 6
R343 100K_0402_5%~D @ POA_WAKE#
B35 VTR GPIO102/BCM_C_INT#/GANG_DATA6 A35 VCI_IN2# 4 5
PJP7 A41 VTR GPIO104 A36 DYN_TUR_CURRNT_SET# 58
1 2 A52 VTR GPIO106 A40 SIO_SLP_S0# 54,9
MSDATA 100K_0804_8P4R_5%
VTR GPIO116/MSDATA/V2P_COUT_LO/TAP_SEL_STRAP B43 MSCLK +3.3V_ALW
GPIO117/MSCLK/V2P_COUT_HI
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PAD-OPEN1x1m A45
GPIO127/A20M B65 FWP#
1 1 1 1 1 1 1 NFWP
SML1_SMBDATA A5 DYN_TUR_CURRNT_SET# 2 1
7 SML1_SMBDATA GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA/GANG_BUSY
C349
C354
C350
C355
C356
C351
C348
SML1_SMBCLK B6 100K_0402_5%~D R363
7 SML1_SMBCLK A37 GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK/GANG_ERROR B57
CLK_TP_SIO R349 1 2 1K_0402_5%~D
2 2 2 2 2 2 2 39 CLK_TP_SIO B40 GPIO110/PS2_CLK2/GPTP-IN6 GPIO156/LED0 B1 VOL_DOWN# 36
DAT_TP_SIO DEVICE_DET#
39 DAT_TP_SIO A38 GPIO111/PS2_DAT2/GPTP-OUT6 GPIO157/LED1 A55 DEVICE_DET# 26
+5V_RUN change to 10K by vendor feedback CLK_KBD PS_ID
35 CLK_KBD B41 GPIO112/PS2_CLK1A GPIO153/LED2 A1 PS_ID 51
RP4 DAT_KBD ALW_PWRGD_3V_5V
1 8 35 DAT_KBD A39 GPIO113/PS2_DAT1A GPIO027/GPTP-OUT1 B28 ALW_PWRGD_3V_5V 52
DAT_KBD CLK_MSE 1.05V_A_PWRGD
2 7 35 CLK_MSE B42 GPIO114/PS2_CLK0A GPIO026/GPTP-IN1 B2 1 2 1.05V_A_PWRGD 54
CLK_KBD DAT_MSE
3 6 35 DAT_MSE B59 GPIO115/PS2_DAT0A GPIO001/ECSPI_CS1 A8 VOL_MUTE# 36
CLK_MSE PBAT_SMBDAT R352 1K_0402_5%~D RP7
4 5 51 PBAT_SMBDAT A56 GPIO154/I2C1C_DATA/PS2_CLK1B GPIO015/GPTP-OUT7/GANG_DATA3 B9 ME_SUS_PWR_ACK 9 1 8
DAT_MSE PBAT_SMBCLK 1.35V_SUS_PWRGD DOCK_SMB_DAT
51 PBAT_SMBCLK GPIO155/I2C1C_CLK/PS2_DAT1B GPIO016/GPTP-IN8/GANG_DATA4 A9 1.35V_SUS_PWRGD 53 2 7
PM_APWROK DOCK_SMB_CLK
A51 GPIO017/GPTP-OUT8 B39 PM_APWROK 9 3 6
4.7K_8P4R_5% JTAG_TDI RESET_OUT# GPU_SMBDAT
B55 GPIO145/I2C1K_DATA/JTAG_TDI GPIO107/NRESET_OUT A44 RESET_OUT# 15,9 4 5
JTAG_TDO PCH_PCIE_WAKE# GPU_SMBCLK
JTAG_CLK B56 GPIO146/I2C1K_CLK/JTAG_TDO GPIO125/GPTP-IN5 B47 PCH_RSMRST# PCH_PCIE_WAKE# 12,9
A53 GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO126 A54 PCH_RSMRST# 39
JTAG_TMS AC_PRESENT 2.2K_0804_8P4R_5%
+3.3V_RUN A57 GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO151/GPTP-IN4 B58 AC_PRESENT 12,9
JTAG_RST# SIO_PWRBTN#
JTAG_RST# GPIO152/GPTP-OUT4 SIO_PWRBTN# 9
1 2 VOL_MUTE# FAN1_TACH B22 A3 DOCK_SMB_DAT
A21 GPIO050/FAN_TACH1/GTACH GPIO003/I2C1A_DATA/GANG_MODE B4 DOCK_SMB_DAT 35
@ R358 100K_0402_5%~D DOCK_POR_RST# DOCK_SMB_CLK
1 2 35 DOCK_POR_RST# B23 GPIO051/FAN_TACH2 GPIO004/I2C1A_CLK/GANG_START A4 DOCK_SMB_CLK 35
VOL_DOWN# EC_WAKE#
12 EC_WAKE# B24 GPIO052/FAN_TACH3 GPIO005/I2C1B_DATA/BCM_B_DAT/GANG_STROBE B5
@ R360 100K_0402_5%~D A_ON
1 2 40,54,62 A_ON A23 GPIO053/PWM0 GPIO006/I2C1B_CLK/BCM_B_CLK/GANG_FULL B7
VOL_UP# PCH_ALW_ON
40 PCH_ALW_ON B25 GPIO054/PWM1 GPIO012/I2C1H_DATA/I2C2D_DATA/GANG_DATA1 A7
@ R362 100K_0402_5%~D BIA_PWM_EC
1 2 FAN1_PWM
20 BIA_PWM_EC
FAN1_PWM A24 GPIO055/PWM2
GPIO056/PWM3/GPWM
GPIO013/I2C1H_CLK/I2C2D_CLK/GANG_DATA2
GPIO130/I2C2A_DATA/BCM_C_DAT
B48 GPU_SMBDAT
GPU_SMBDAT 45
GPU I2CS
R408 10K_0402_5%~D B49 GPU_SMBCLK
1 2 FAN1_TACH GPIO131/I2C2A_CLK/BCM_C_CLK
GPIO132/I2C1G_DATA
A47 CHARGER_SMBDAT
GPU_SMBCLK 45
CHARGER_SMBDAT 58
SMBUS: 0x9E
R376 10K_0402_5%~D B50 CHARGER_SMBCLK USH_SMBDAT 2 1
A43 GPIO140/I2C1G_CLK B52 CHARGER_SMBCLK 58
BC_CLK_ECE5048 CARD_SMBDAT 2.2K_0402_5%~D R492
37 BC_CLK_ECE5048 B45 GPIO123/BCM_A_CLK GPIO141/I2C1F_DATA/I2C2B_DATA A49 CARD_SMBDAT 36 2 1
BC_DAT_ECE5048 CARD_SMBCLK USH_SMBCLK
37 BC_DAT_ECE5048 A42 GPIO122/BCM_A_DAT GPIO142/I2C1F_CLK/I2C2B_CLK B53 CARD_SMBCLK 36
BC_INT#_ECE5048 USH_SMBDAT 2.2K_0402_5%~D R491
37 BC_INT#_ECE5048 B20 GPIO121/BCM_A_INT# GPIO143/I2C1E_DATA A50 USH_SMBDAT 33
+3.3V_ALW ACAV_IN_NB USH_SMBCLK
58,59 ACAV_IN_NB A18 GPIO032/BCM_E_CLK GPIO144/I2C1E_CLK USH_SMBCLK 33
9 SIO_SLP_S5# SIO_SLP_S5#
BEEP B19 GPIO031/GPTP-OUT2/BCM_E_DAT A59 1 2
27 BEEP GPIO030/GPTP-IN2/BCM_E_INT# SYSPWR_PRES +3.3V_ALW2
100K_0402_5%~D
C RP18 BC_CLK_ECE1117 A20 R367 1K_0402_5%~D @ C395 C
39 BC_CLK_ECE1117 GPIO047/LSBCM_D_CLK
1
1 8 BC_DAT_ECE1117 BC_DAT_ECE1117 B21 A64 ACAV_IN
39 BC_DAT_ECE1117 GPIO046/LSBCM_D_DAT VCI_OVRD_IN ACAV_IN 45,58,59
2 7 PCH_ALW_ON BC_INT#_ECE1117 A19 A60 ALWON PECI_EC_R 1 2 For signal
3 6 39 BC_INT#_ECE1117 GPIO045/LSBCM_D_INT# VCI_OUT B67 ALWON 52
A_ON POWER_SW_IN#
VCI_IN0# integrity issue
R370
4 5 DOCK_POR_RST# SIO_EXT_SMI# A6 A63 DOCK_PWR_SW# 47P_0402_50V8J~D
12 SIO_EXT_SMI# A27 GPIO011/nSMI/GANG_DATA0 VCI_IN1# B63
SIO_RCIN# VCI_IN2#
2
100K_0804_8P4R_5% 12,9 SIO_RCIN# IRQ_SERIRQ A28 GPIO061/LPCPD# VCI_IN2# B68 POA_WAKE#
12,29,37,9 IRQ_SERIRQ PCH_PLTRST#_EC B30 SER_IRQ VCI_IN3# +3.3V_ALW
29,31,33,36,37,9 PCH_PLTRST#_EC LRESET# R374 close to U38 at least 250mils
CLK_PCI_MEC A29 B51 +PECI_VREF 1 @ 2
7 CLK_PCI_MEC PCI_CLK VREF_PECI +1.05V_RUN
LPC_LFRAME# B31 A48 PECI_EC_R 1 2 R374 0_0402_5% RP15
29,31,37,7 LPC_LFRAME# LFRAME# PECI_DAT PECI_EC 9
0.1U_0402_25V6K~D
1 2 MSDATA LPC_LAD0 A30 R375 43_0402_5%~D PBAT_SMBCLK 1 8 +3.3V_SUS
29,31,37,7 LPC_LAD0 LAD0 1
R366 10K_0402_5%~D LPC_LAD1 B32 PBAT_SMBDAT 2 7
29,31,37,7 LPC_LAD1 LAD1
C360
1 2 EN_INVPWR LPC_LAD2 A31 B13 REM_DIODE1_N C358 1 2 2200P_0402_50V7K~D CARD_SMBCLK 3 6
29,31,37,7 LPC_LAD2 B33 LAD2 DN1-THERM A13 4 5
R371 100K_0402_5%~D LPC_LAD3 REM_DIODE1_P CARD_SMBDAT
29,31,37,7 LPC_LAD3 A32 LAD3 DP1-VREF_T B14 2
CLKRUN# REM_DIODE2_N C359 1 2 2200P_0402_50V7K~D
1 2 29,37,9 CLKRUN# A33 CLKRUN# DN2 A14
RESET_OUT# SIO_EXT_SCI# REM_DIODE2_P 2.2K_0804_8P4R_5%
12 SIO_EXT_SCI# GPIO100/NEC_SCI DP2 A15
R373 8.2K_0402_5%~D reference 0.55 design chane log WW23_2 REM_DIODE3_N C382 1 2 2200P_0402_50V7K~D
R378 0_0402_5% MEC_XTAL1 A61 DN3 B16 REM_DIODE3_P +3.3V_ALW
MEC_XTAL2 1 @ 2 MEC_XTAL2_R A62 XTAL1 DP3 A16 REM_DIODE4_N C361 1 2 2200P_0402_50V7K~D
1 2 B62 XTAL2 DN4 B17 RP16
@ EC_32KHZ_ECE5048_R REM_DIODE4_P
37 EC_32KHZ_ECE5048 GPIO160/32KHZ_OUT DP4 B15 5 4
R379 0_0402_5% C358, C359, C382, C361 Place near U38 CHARGER_SMBCLK
VIN A17 VSET_5075 CHARGER_SMBDAT 6 3
VSET A12 HOST_DEBUG_RX 7 2
VCP VCP 58
B34 THERMATRIP2# PCH_RSMRST# 8 1
THERMTRIP2# A2 THERMATRIP3#
GPIO002/THERMTRIP3# THERMATRIP3# 45,60
B29 THSEL_STRAP
VSS_ADC
GPIO024/THSEL_STRAP 10K_8P4R_5%
VSS_RO
VR_CAP
A46 PROCHOT#_EC
H_VSS
PROCHOT_IN#/PROCHOT_IO#
AGND
B61 1 2
V_SYS 58
VSS
V_ISYS R381 4.7K_0402_5%~D
EP
MEC5075-LZY-SAL00_DQFN132_11X11~D
B66
B11
B60
+VR_CAP B12
B54
B18
C1
15mil
5075 Setting for Thermal Design
4.7U_0603_6.3V6K~D
32 KHz Clock 1
Thermal diode mapping
C366
2
MEC_XTAL1 1 2 MEC_XTAL2 5075 Channel Location
ESR <2ohms JFAN1
33P_0402_50V8J~D
33P_0402_50V8J~D
Y4 CONN@
+3.3V_ALW 1 32.768KHZ_12.5PF_9H03200031 1
DP1/DN1 CPU(OTP) 4 6
FAN1_PWM 3 4 G2 5
3 G1
C364
C365
FAN1_TACH 2
DP2/DN2 Skin +5V_RUN
1 2
2 2 1
100K_0402_5%~D
1
R380
22U_0805_6.3V6M~D
ACES_50281-0040N-001
DP3/DN3 SO-DIMM
1
1 P/N:SP02000SC00
C7
B D1 B
RB751S40T1_SOD523-2~D
DP4/DN4 HDD
2
2
JTAG_RST#
CLK_PCI_MEC
Place under CPU
DOCK_POR_RST# +3.3V_RUN Place C266 close to the Q11 as possible
1
1
10_0402_1%~D
REM_DIODE1_P +3.3V_ALW
1U_0402_6.3V6K~D
@ R382
10K_0402_5%~D
100P_0402_50V8J~D
1
1
JTAG1 CONN@
@SHORT PADS~D
100_0402_1%~D
@ C370
1 2
1
0.1U_0402_25V6K~D
R35
8.2K_0402_5%~D
@
1
+3.3V_ALW
C362
R384
R402
1 2
2
4.7P_0402_50V8C~D
C357
B
2 1 E Q11
2
3
100K_0402_5%~D
1 PMST3904_SOT323-3~D
1
2
2
RUNPWROK REM_DIODE1_N
2
@ C363
R36
2
2
THERMATRIP2#
DP2/DN2 for GPU on Q13, place Q13 close
MMST3904-7-F_SOT323-3~D
2
to GPU and C372 close to Q13

Q5B
+1.05V_RUN
Place close pin A21
0.1U_0402_25V6K~D
RUN_ON# 5
Place close pin A29
1
REM_DIODE2_P C
6
Q12
1 2 2 1
4
100P_0402_50V8J~D
C371
1 R403 2.2K_0402_5%~D B
1
Q5A
@ C372
C E
3
2 2
+3.3V_ALW 27,37,40,55 RUN_ON B 2
2 E Q13
1
3
PMST3904_SOT323-3~D
12 H_THERMTRIP#
49.9_0402_1%~D
REM_DIODE2_N
1
8
7
6
5
+3.3V_ALW
R388
RP2 DP3/DN3 for S0-DIMM on Q11, place Q15 close

10K_8P4R_5% to SO-DOMM and C383 close to Q15
1
1
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
100K_0402_5%~D
driven low when +3.3V_RUN is OFF;

2
1
2
3
4
@ R398
JDEG1 REM_DIODE3_P
R395
R396
R397
1
1 driven high when +3.3V_RUN is ON
100P_0402_50V8J~D
2 JTAG_TDI 1
2
1
@ C383
3 JTAG_TMS C
2
3 4 JTAG_CLK 2
4 5 JTAG_TDO B
11 5 6 MSCLK 5048_TX should be change Host_debug_tx 2 E Q15
3
12 G1 6 7 MSDATA PMST3904_SOT323-3~D
G2 7 8 HOST_DEB_TX 1 @ 2 HOST_DEBUG_TX VSET_5075
8 9 R400 1 20_0402_5%
0.1U_0402_25V6K~D
@ REM_DIODE3_N
9 10 EC5048_TX 37
R406 0_0402_5%
10
1
1.58K_0402_1%
Pin8 5075_TXD for EC Debug
TYCO_1-2041070-0~D pin9 5048_TXD for SBIOS debug
DP4/DN4 for Skin on Q14, place Q14 close to HDD. 1
THSEL_STRAP 1 2
C367
R394
CONN@ R392 C368 REV +3.3V_ALW +3.3V_ALW +3.3V_ALW REM_DIODE4_N R383 1K_0402_5%~D
100P_0402_50V8J~D
A A
PMST3904_SOT323-3~D 2
240K 4700p X00 1
2
3
1K_0402_5%~D
10K_0402_5%~D
@ C373
E
Q14
1
1
8.2K_0402_5%~D
2
B
130K 4700p X01(PT1)
R392
R386
R393
2 C 1: Channel 1 will provide Thermistor Readings

62K 4700p X01(PT2)
1
0: Channel 1 will provide Diode Readings

33K 4700p X02
2
REM_DIODE4_P
Rest=1.58K , Tp=96 degree
4700P_0402_25V7K~D
BOARD_ID SYSTEM_ID FWP#

8.2K 4700p A00
4700P_0402_25V7K~D
4.3K 4700p 1
2
10K_0402_5%~D
1
C369
80 Port Debug/ LPC BUS -- > WLAN conn. 2K 4700p

C368
@ R399
1K 4700p 2
2 DELL CONFIDENTIAL/PROPRIETARY
1
PROPRIETARY NOTE:
Title
BOARD_ID rise time is measured from 5%~68%. CHIPSET_ID for BID function TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT KBC & GPIO MEC5075
0.5
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. Date: Wednesday, August 14, 2013 Sheet 38 of 64
5 4 3 2 1
5 4 3 2 1
Place close to JTP1

ACES_51522-00801-001
8
TP_CLK 7 8 10 +3.3V_TP
TP_DATA 6 7 G2 9
5 6 G1
4 5
+3.3V_TP 4
2
PS2_DAT_TS 3 1
3
D22
PS2_CLK_TS 2
1 2 C374
1 0.1U_0402_25V6K~D
JTP1 2
@
D @ CONN@ D
P/N:SP01001AE00
1
ESD
JKB1 CONN@
12
+3.3V_TP +3.3V_RUN +3.3V_TP 11 GND
Touch Pad PJP8

@
12 KB_DET#
KB_DET#
PS2_CLK_TS
10
9
GND
10
Place close to JKB1
1 2 PS2_DAT_TS 8 9 +3.3V_ALW +5V_RUN
7 8
+3.3V_ALW 7
PAD-OPEN1x1m 6
+5V_RUN 6
5
38 BC_INT#_ECE1117 5
4.7K_0402_5%~D
4.7K_0402_5%~D
4 1 1
38 BC_DAT_ECE1117 4
1
3
3 C375 C376
R404
R405
2
C 1 2 38 BC_CLK_ECE1117 1 2 C
0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
12 I2C1_SDA_TCH_PAD 1 2 2
@
@ R450 0_0402_5%~D
1 2 ACES_51524-01001-003
2
12 I2C1_SCL_TCH_PAD
@ R449 0_0402_5%~D P/N:SP01001AI10
1 @ 2 L44 2 @ 1 0_0603_5%~D TP_DATA
38 DAT_TP_SIO
R441 0_0402_5%
1 @ 2 L45 2 @ 1 0_0603_5%~D TP_CLK
38 CLK_TP_SIO
R444 0_0402_5%
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1 1
C377 @
1 1
C378 @
C380
C379 @
2 2
2 2
@
EMI
B B
RSMRST circuit @ R414

0_0402_5%~D
1 2
+5V_ALW +3.3V_ALW
+3.3V_ALW
C386 @
1
1 2
1
10K_0402_5%~D
R440
R411 0.1U_0402_25V6K~D
33_0402_5%~D EC SIDE
U41
5
U42
2
1
P
38 PCH_RSMRST#
2
+3.3V_ALW_PCH_U41 1 B 4 1 @ 2
VCC O R413 PCH_RSMRST#_Q 9
0.01U_0402_16V7K~D
3 RSMRST# 2 0_0402_5%
RESET# A
G
1 2
GND TC7SH08FU_SSOP5~D
3
C387
RT9818A-44GU3_SC70-3~D
2
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, KB/TP/RSMRST
LA-9832P
5 4 3 2 1
5 4 3 2 1
DC/DC Interface
+1.05V_MODPHY source
+3.3V_ALW_PCH/+1.05V_RUN source
+5V_ALW +1.05V_M +1.05V_MODPHY +3.3V_ALW_PCH
Q142
D SI3456DDV-T1-GE3_TSOP6 U43 C389 1U_0603_10V6K~D D
1 14 1 2
+3.3V_ALW VIN1 VOUT1
D
10K_0402_5%~D
6 2 13
S
VIN1 VOUT1
10U_0603_6.3V6M~D
5 4
+3.3V_ALW2
R109
2 R416 1 @ 2 0_0402_5% 3 12 C390 1 2
1 38 PCH_ALW_ON ON1 CT1
1 470P_0402_50V7K~D
SIO_SLP_S3# 1 2 4 11
G
36,37,53,9 SIO_SLP_S3# +5V_ALW VBIAS GND
C3
@ R417 0_0402_5%~D
3
100K_0402_5%~D
RUN_ON 1 @ 2 5 10 C391 1 2
27,37,38,55 RUN_ON ON2 CT2
1
2
2200P_0402_50V7K~D
1.05V_MODPHY_EN R418 0_0402_5% 470P_0402_50V7K~D
R108
6 9
+1.05V_M VIN2 VOUT2
1 7 8
VIN2 VOUT2 +1.05V_RUN
3
1
C207
15
2
GPAD
Q143B
C393
MPHYP_PWR_EN# 5 2 TPS22966DPUR_SON14_2X3~D 1U_0603_10V6K~D
2
confirm 1.05V should be change solution
4
6
Q143A
2
12 MPHYP_PWR_EN
1
C
+3.3V_SUS/+3.3V_M source C
+3.3V_M
1 @ 2 U45 C396 1U_0603_10V6K~D

38,54,62 A_ON 1 14 1 2
R424 0_0402_5%
2 VIN1 VOUT1 13
VIN1 VOUT1
1 2 3 12 C397 1 2
37,54,9 SIO_SLP_A# ON1 CT1
@ R423 0_0402_5%~D 470P_0402_50V7K~D
4 11
+5V_ALW VBIAS GND
+1.05V_M 1 @ 2 5 10 C398 1 2
37,53 SUS_ON ON2 CT2
R422 0_0402_5% 470P_0402_50V7K~D
4.7U_0603_6.3V6K~D
@ 6 9
7 VIN2 VOUT2 8
+3.3V_ALW VIN2 VOUT2 +3.3V_SUS
C30
1 2 1
37,53,55,9 SIO_SLP_S4#
1
+1.05V_MODPHY @ R421 0_0402_5%~D 15

GPAD C399
9
U94 @ TPS22966DPUR_SON14_2X3~D 1U_0603_10V6K~D

2
1 8 2
VIN_PAD
VIN VOUT
2 7 1
VIN VOUT
3 6 C75 @
+5V_ALW VBIAS VOUT
0.1U_0402_25V6K~D
MPHYP_PWR_EN 4 5 2
EN GND
1 APE8939GN3_DFN8_3X3
C73 @
B
2
0.1U_0402_25V6K~D +3.3V_RUN/+5V_RUN source B
+5V_RUN
U46 C400 1U_0603_10V6K~D

SIO_SLP_S3# 1 2 1 14 1 2
+5V_ALW VIN1 VOUT1
@ R425 0_0402_5%~D 2 13
VIN1 VOUT1
RUN_ON 1 @ 2 3 12 C401 1 2
R426 0_0402_5% ON1 CT1 470P_0402_50V7K~D
4 11
VBIAS GND
5 10 C402 1 2
ON2 CT2 1000P_0402_50V7K~D
6 9
+3.3V_ALW VIN2 VOUT2
7 8
VIN2 VOUT2 +3.3V_RUN
1
15
GPAD C403
TPS22966DPUR_SON14_2X3~D 1U_0603_10V6K~D
2
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, POWER CONTROL
LA-9832P
5 4 3 2 1
5 4 3 2 1
Battery LED
+3.3V_ALW HDD LED solution for White LED
1
R428
10K_0402_5%~D
2
Q24B
DMN66D0LDW-7_SOT363-6~D D23
4 3 1 2
6 SATA_ACT#
D D
5 RB751S40T1_SOD523-2~D R429 300_0402_5%
1 2 BATT_WHITE_LED# 36
37 MASK_SATA_LED# 37 BAT2_LED#
D24
1 2 1 2 BATT_YELLOW_LED# 36
37 LED_SATA_DIAG_OUT# 37 BAT1_LED#
R433 300_0402_5%
RB751S40T1_SOD523-2~D
HDD_LED# 36
3
Q24A
1 6 2
Q26
PDTA114EU_SC70-3~D
Breath LED
1
1 2
SYS_LED_MASK# R438 300_0402_5%
Q28A
1 6 BREATH_LED#_Q BREATH_LED#_Q 36
35,37 BREATH_LED#
Place LED1 close to SW5 LED(white) current need to reach 2mA,
2
+3.3V_ALW
WLAN LED solution for White LED MASK_BASE_LEDS#
need to check current limit resistor
1 2 BREATH_WHITE_LED# 36
R436 300_0402_5%
+5V_ALW
1
C R432 C
100K_0402_5%~D
3
Q28B
2
4 3 2
31,37 WIRELESS_LED#
Q16
PDTA114EU_SC70-3~D
5
SYS_LED_MASK#
1
1 2 WLAN_LED WLAN_LED 36
R435 300_0402_5%
Lid has beed moved to DB.

+3.3V_ALW
@
C404 0.1U_0402_25V6K~D
1 2
POWER & INSTANT ON SWITCH Need to change as ALW17 power switch.
5
U47
SN111002700 SYS_LED_MASK# 1
P
37 SYS_LED_MASK# B
SW5 @ 4 MASK_BASE_LEDS#
2 O MASK_BASE_LEDS# 28
36,37 LID_CL# A
G
1 3
B 36,38 POWER_SW#_MB
TOP side TC7SH08FU_SSOP5~D
B
3
@ D27 2 4
2
1
6
5
L30ESD24VC3-2_SOT23-3
ESD SW6 @
1 3
2 4
BOTTOM side
6
5
Screw hole Φ3.3mm X 1, Φ2.8mm X 14, Φ2.3mm X 1

CPU stand-off hole : Screw hole Φ5.0mm X 1 Stand-off hole Φ3.3mm X 7,Φ1.2mm X 1
Φ4.3mm X 1, Φ4.6mm X 3 @ H5 @ H6 @ H7 @ H9
H_2P8 H_3P3 H_2P8 H_2P8
@ H8 @ H17 @ H18 @ H19 @ H20
H_5P0 H_1P2 H_3P3 H_3P3 H_3P3
1
@ H1 @ H2 @ H3 @ H4
H_4P6 H_4P6 H_4P3 H_4P6 1
1
@ H11 @ H12 @ H13
1
H_2P8 H_2P8 H_2P8 @ H21 @ H22 @ H23

H_3P3 H_3P3 H_3P3
LED Circuit Control Table
Fiducial Mark
1
Screw hole Φ3.3mmx2.8mm X 1
1
@ FD1
1 SYS_LED_MASK# LID_CL# @ H10
H_3P3X2P8
FIDUCIAL MARK~D @ H14 @ H15 @ H16 @ H24
H_2P8 H_2P8 H_2P3 H_2P8
A
@ FD2
Mask All LEDs (Sniffer Function) 0 X A
1
1
Mask Base MB LEDs (Lid Closed) 1 0
1
FIDUCIAL MARK~D
Do not Mask LEDs (Lid Opened) 1 1
@ FD3
1
FIDUCIAL MARK~D
@ FD4
1 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
FIDUCIAL MARK~D BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PAD & ME & LED
LA-9832P
Date: Wednesday, August 14, 2013 Sheet 41 of 64
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW
PEG_HTX_C_GRX_P[0..3]
11 PEG_HTX_C_GRX_P[0..3]
0.1U_0402_10V7K~D
PEG_HTX_C_GRX_N[0..3]
11 PEG_HTX_C_GRX_N[0..3]
@
PEG_GTX_C_HRX_P[0..3] 1
11 PEG_GTX_C_HRX_P[0..3]
PEG_GTX_C_HRX_N[0..3]
CV87
11 PEG_GTX_C_HRX_N[0..3]
DIS@ 2 UV1A DIS@
5
UV14
1 COMMON
P
12 DGPU_HOLD_RST# B 4 DGPU_PEX_RST# 1/14 PCI_EXPRESS
O DGPU_PEX_RST# 45
2 Place near Place near BGA
9 PLTRST_GPU#
1
G
A GK208/GF117/GF119 +1.05V_GPU
DIS@ balls
TC7SH08FU_SSOP5~D AB6 PEX_WAKE NC 1.05V
3
10K_0402_5%~D
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K~D
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
RV29 PEX_IOVDD AA22
D D
CV89
CV88
CV3048 DIS@
CV86
CV90
CV3047 DIS@
CV3049 DIS@
2 @ 1 DGPU_PEX_RST_R# AC7 PEX_RST PEX_IOVDD AB23 1 1 1 1 1 1 1
2
RV2427 0_0402_5% PEX_IOVDD AC24
CLKRQ_GPU# AC6 PEX_CLKREQ PEX_IOVDD AD25
PEX_IOVDD AE26
2 2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
AE8 PEX_REFCLK PEX_IOVDD AE27
7 CLK_PEG_VGA
AD8 PEX_REFCLK
7 CLK_PEG_VGA#
PEG_GTX_C_HRX_P0 0.1U_0402_10V7K~D DIS@ 1 2 CV2402 PEG_GTX_HRX_P0 AC9 PEX_TX0
PEG_GTX_C_HRX_N0 0.1U_0402_10V7K~D DIS@ 1 2 CV2403 PEG_GTX_HRX_N0 AB9 PEX_TX0
+3.3V_GPU +3.3V_GPU
CLK_REQ PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0
AG6
AG7
PEX_RX0
AA10
Place near Place near BGA +1.05V_GPU
PEX_RX0 PEX_IOVDDQ
PEX_IOVDDQ AA12 balls 1.05V
PEG_GTX_C_HRX_P1 0.1U_0402_10V7K~D DIS@ 1 2 CV2404 PEG_GTX_HRX_P1 AB10 PEX_TX1 PEX_IOVDDQ AA13
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K~D
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
@ PEG_GTX_C_HRX_N1 0.1U_0402_10V7K~D DIS@ 1 2 CV2405 PEG_GTX_HRX_N1 AC10 PEX_TX1 PEX_IOVDDQ AA16
CV95
CV94
CV3051 DIS@
CV91
CV96
CV3050 DIS@
CV3052 DIS@
RV2433 PEX_IOVDDQ AA18 1 1 1 1 1 1 1
10K_0402_5%~D PEG_HTX_C_GRX_P1 AF7 PEX_RX1 PEX_IOVDDQ AA19
5
PEG_HTX_C_GRX_N1 AE7 PEX_RX1 PEX_IOVDDQ AA20

PEX_IOVDDQ AA21
2
2 2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
3 4 CLKRQ_GPU# PEG_GTX_C_HRX_P2 0.1U_0402_10V7K~D DIS@ 1 2 CV2406 PEG_GTX_HRX_P2 AD11 PEX_TX2 PEX_IOVDDQ AB22
7 PEG_A_CLKRQ#
PEG_GTX_C_HRX_N2 0.1U_0402_10V7K~D DIS@ 1 2 CV2407 PEG_GTX_HRX_N2 AC11 PEX_TX2 PEX_IOVDDQ AC23
QC11B DIS@ PEX_IOVDDQ AD24
DMN66D0LDW-7_SOT363-6~D PEG_HTX_C_GRX_P2 AE9 PEX_RX2 PEX_IOVDDQ AE25
PEG_HTX_C_GRX_N2 AF9 PEX_RX2 PEX_IOVDDQ AF26
PEX_IOVDDQ AF27
PEG_GTX_C_HRX_P3 0.1U_0402_10V7K~D DIS@ 1 2 CV2408 PEG_GTX_HRX_P3 AC12 PEX_TX3
PEG_GTX_C_HRX_N3 0.1U_0402_10V7K~D DIS@ 1 2 CV2401 PEG_GTX_HRX_N3 AB12 PEX_TX3
PEG_HTX_C_GRX_P3 AG9 PEX_RX3

PEG_HTX_C_GRX_N3 AG10 PEX_RX3
AB13 PEX_TX4
AC13 PEX_TX4
AF10 PEX_RX4
AE10 PEX_RX4
+3.3V_GPU
C AD14 PEX_TX5 Place near BGA 3.3V C
AC14 PEX_TX5 PEX_PLL_HVDD AA8
PEX_PLL_HVDD AA9
0.1U_0402_10V7K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
AE12 PEX_RX5
CV226
CV3053 DIS@
CV3054 DIS@
AF12 PEX_RX5 1 1 1
PEX_SVDD_3V3 AB8
AC15 PEX_TX6
AB15 PEX_TX6
2 2 2
DIS@
AG12 PEX_RX6
AG13 PEX_RX6
AB16 PEX_TX7
AC16 PEX_TX7
AF13 PEX_RX7
AE13 PEX_RX7
AD17 PEX_TX8 NC
AC17 PEX_TX8 NC
AE15 PEX_RX8 NC
AF15 PEX_RX8 NC
AC18 PEX_TX9 NC VDD_SENSE F2 NVVDD_SENSE

NVVDD_SENSE 60
AB18 PEX_TX9 NC
AG15 PEX_RX9 NC GND_SENSE F1 NVVDD_GND_SENSE

NVVDD_GND_SENSE 60
AG16 PEX_RX9 NC
AB19 PEX_TX10 NC
AC19 PEX_TX10 NC
AF16 PEX_RX10 NC
AE16 PEX_RX10 NC
AD20 PEX_TX11 NC
AC20 PEX_TX11 NC
B B
AE18 PEX_RX11 NC
AF18 PEX_RX11 NC
AC21 PEX_TX12 NC @
AB21 PEX_TX12 NC RV2
200_0402_1%~D
AG18 PEX_RX12 NC PEX_TSTCLK_OUT AF22 PEX_PLL_CLK_OUT 2 1
AG19 PEX_RX12 NC PEX_TSTCLK_OUT AE22 PEX_PLL_CLK_OUT#
AD23 PEX_TX13 NC DIS@

AE23 PEX_TX13 +1.05V_GPU
NC LV74
1.05V
AF19 PEX_RX13 NC PEX_PLLVDD AA14 PEX_PLLVDD_GPU 1 2
AE19 PEX_RX13 NC PEX_PLLVDD AA15
0.1U_0402_10V7K~D
1U_0402_6.3V6K
4.7U_0603_6.3V6K~D
BLM18AG121SN1D_2P
CV227
CV97
CV3056 DIS@
AF24 PEX_TX14 NC Place near BALL 1 1 1
AE24 PEX_TX14 NC
AE21 PEX_RX14 NC 2 2 2
DIS@
DIS@
AF21 PEX_RX14 NC
TESTMODE AD9 GPU_TESTMODE
AG24 PEX_TX15 NC Place near BGA
AG25 PEX_TX15 NC
AG21 PEX_RX15 NC
AG22 PEX_RX15 NC
1
DIS@
GF119 GF117
AF25 PEX_TERMP 10K_0402_5%~D
GK208 PEX_TERMP
RV2435
2
N14M-GE-S-A2_FCBGA595~D
1
DIS@
RV2703
A 2.49K_0402_1%~D A
2

NV(1/5)-PCIE EXPRESS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C LA-9832P 0.5
5 4 3 2 1
5 4 3 2 1
IFPA/B IFPE/F
UV1G DIS@ UV1J DIS@
COMMON COMMON
4/14 IFPAB
7/14 IFPEF
GF117 GF119/GK208 GF119/GK208
AC4 GF117
NC IFPA_TXC
AC3 DVI-DL DVI-SL/HDMI DP
NC IFPA_TXC
GF119/GK208 GF117 GF117 J3
NC I2CY_SDA I2CY_SDA IFPE_AUX
AA6 GF119 GK208 J2
IFPAB_RSET NC NC I2CY_SCL I2CY_SCL IFPE_AUX
NC IFPA_TXD0 Y3 J7 IFPEF_PLLVDD NC
IFPA_TXD0 Y4
NC
IFPE_L3 J1
NC TXC TXC
V7 IFPAB_PLLVDD IFPE_L3 K1
D
W7 IFPAB_PLLVDD
NC
NC
NC
NC
IFPA_TXD1
IFPA_TXD1
AA2
AA3
K7 IFPEF_PLLVDD NC
NC
NC
TXC
TXD0
TXC
TXD0
IFPE_L2 K3
K2
DAC_A D
NC IFPE_L2
TXD0 TXD0
NC IFPA_TXD2 AA1 K6 IFPEF_RSET IFPE_L1 M3

NC NC TXD1 TXD1
NC IFPA_TXD2 AB1 IFPE_L1 M2 UV1K DIS@
NC TXD1 TXD1
IFPE_L0 M1 COMMON
AA5 NC TXD2 TXD2 N1
NC IFPA_TXD3 IFPE_L0 3/14 DACA
NC TXD2 TXD2
NC IFPA_TXD3 AA4
GF119/GK208 GF117 GF117 GF119/GK208
NC FOR GK208
IFPE W5 DACA_VDD NC NC I2CA_SCL B7
NC IFPB_TXC AB4 I2CA_SDA A7
NC
IFPB_TXC AB5 AE2 DACA_VREF
NC TSEN_VREF
NC GPIO18 C2
GF119/GK208 GF117 HPD_E HPD_E
AF2 DACA_RSET DACA_HSYNC AE3
NC NC
W6 IFPA_IOVDD NC NC IFPB_TXD4 AB2 NC DACA_VSYNC AE4
AB3 GF117
NC IFPB_TXD4
Y6 GF119 GK208
IFPB_IOVDD NC
H6 IFPE_IOVDD NC DACA_RED AG3
NC
NC IFPB_TXD5 AD2 GF119/GK208
AD3 J6 GF117 AF4
NC IFPB_TXD5 IFPF_IOVDD NC NC DACA_GREEN
DVI-DL DVI-SL/HDMI DP
NC IFPF_AUX H4 DACA_BLUE AF3

I2CZ_SDA NC
NC IFPB_TXD6 AD1 NC I2CZ_SCL IFPF_AUX H3
NC IFPB_TXD6 AE1
NC TXC IFPF_L3 J5
IFPB_TXD7 AD5 NC TXC IFPF_L3 J4 N14M-GE-S-A2_FCBGA595~D
NC
NC IFPB_TXD7 AD4
IFPF_L2 K5
NC TXD3 TXD0
NC IFPF_L2 K4
TXD3 TXD0
NC TXD4 TXD1 IFPF_L1 L4

IFPF NC TXD4 TXD1 IFPF_L1 L3
NC GPIO14 B3
IFPAB NC
NC
TXD5
TXD5
TXD2
TXD2
IFPF_L0
IFPF_L0
M5
M4
NC FOR GK208
NC GPIO19 F7
HPD_F
C C
IFPC
UV1H DIS@
COMMON
5/14 IFPC
IFPC
GF119/GK208 GF117
T6 IFPC_RSET GF117 GF119/GK208
NC
DVI/HDMI DP
M7 IFPC_PLLVDD NC NC I2CW_SDA IFPC_AUX N5

N7 IFPC_PLLVDD NC NC I2CW_SCL IFPC_AUX N4
IFPC_L3 N3
NC TXC
NC IFPC_L3 N2
TXC
IFPC_L2 R3
NC TXD0
IFPC_L2 R2
NC TXD0
NC TXD1 IFPC_L1 R1
NC TXD1 IFPC_L1 T1
IFPC_L0 T3
NC TXD2 +FB_PLLAVDD
IFPC_L0 T2
NC TXD2
1.05V
DIS@
L73
BLM18PG300SN1D_2P~D
Place near balls X'TAL
P6 IFPC_IOVDD NC GPIO15 C3 1 2 GPU_PLLVDD
NC
22U_0805_6.3V6M~D
0.1U_0402_10V7K~D
CV3064 DIS@
CV236
1 1
B N14M-GE-S-A2_FCBGA595~D UV1M DIS@ B
COMMON
2 2
DIS@
DIS@ 9/14 XTAL_PLL
+1.05V_GPU LV80
BLM18PG181SN1D_2P 1.05V Place near balls L6 PLLVDD
1 2 M6 SP_PLLVDD
22U_0805_6.3V6M~D
4.7U_0603_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
N6 VID_PLLVDD NC
CV3063 DIS@
CV3062 DIS@
CV239
CV240
1 1 1 1
GF119/GK208 GF117
DIS@ DIS@
2 2 2 2 RV2441 RV2442
DIS@
DIS@
Place near BGA
1 2 A10 XTALSSIN XTALOUTBUFF C10 1 2
10K_0402_5%~D 10K_0402_5%~D
IFPD XTALIN C11 XTALIN XTALOUT B10 XTAL_OUT
UV1I DIS@
COMMON
6/14 IFPD
90-OHM DIFF Impedance for XTALIN & XTALOUT.
GF119/GK208 GF117 DIS@
U6 GF117 GF119/GK208 YV2401
IFPD_RSET NC
1 3
DVI/HDMI DP IN OUT
1 1
DIS@ 2 4 DIS@
T7 P4 CV104 GND GND CV105
IFPD_PLLVDD NC NC I2CX_SDA IFPD_AUX
NC I2CX_SCL IFPD_AUX P3 15P_0402_50V8J 27MHZ_12PF_X3G027000FC1H-H~D 15P_0402_50V8J
R7 2 2
IFPD_PLLVDD NC
NC TXC IFPD_L3 R5
NC TXC IFPD_L3 R4
IFPD_L2 T5
NC TXD0
TXD0 IFPD_L2 T4
NC
NC TXD1 IFPD_L1 U4
IFPD NC TXD1 IFPD_L1 U3
IFPD_L0 V4
A NC TXD2 A
IFPD_L0 V3
NC TXD2
R6 IFPD_IOVDD NC NC GPIO17 D4
GF119/GK208 GF117

NV(2/5)-IFP_ABCDEF_DAC_XTAL
Custom 0.5
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-9832P
5 4 3 2 1
5 4 3 2 1
(1.35V)
+1.5V_GPU
UV1D DIS@
COMMON
Place near 12/14 FBVDDQ
D
1.35V balls D
B26 FBVDDQ
C25 FBVDDQ
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
E23 FBVDDQ
CV3060 DIS@
CV3058 DIS@
CV100
CV101
CV231
CV232
1 1 1 1 1 1 E26 FBVDDQ
F14 FBVDDQ
F21 FBVDDQ
G13 FBVDDQ
2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
G14 FBVDDQ
G15 FBVDDQ
G16 FBVDDQ
G18 FBVDDQ
G19 FBVDDQ
G20 FBVDDQ UV1F DIS@
G21 FBVDDQ COMMON
H24 FBVDDQ
22U_0805_6.3V6M~D
10U_0603_6.3V6M H26 FBVDDQ 13/14 GND

CV3059 DIS@
CV102 J21 A2 M13

1 1 FBVDDQ GND GND
K21 FBVDDQ AB17 GND GND M15
L22 FBVDDQ AB20 GND GND M17
L24 FBVDDQ AB24 GND GND N10
2 2
DIS@
L26 FBVDDQ AC2 GND GND N12

M21 FBVDDQ AC22 GND GND N14
N21 FBVDDQ AC26 GND GND N16
R21 FBVDDQ AC5 GND GND N18
T21 FBVDDQ AC8 GND GND P11
V21 FBVDDQ AD12 GND GND P13
W21 FBVDDQ AD13 GND GND P15
A26 GND GND P17
Place near BGA AD15 GND GND P2
AD16 GND GND P23
AD18 GND GND P26
UV1E DIS@ AD19 GND GND P5
+GPU_CORE AD21 GND GND R10
COMMON AD22 GND GND R12
Voltage by GPU SKU 11/14 NVVDD AE11 GND GND R14
K10 VDD AE14 GND GND R16
K12 VDD AE17 GND GND R18
C K14 VDD AE20 GND GND T11 C
K16 VDD AB11 GND GND T13
K18 VDD AF1 GND GND T15
L11 VDD AF11 GND GND T17
GPU_Decoupling L13
L15
L17
VDD
VDD
VDD
AF14
AF17
AF20
GND
GND
GND
GND
GND
GND
U10
U12
U14
M10 AF23 U16
CAPs @ Power M12
M14
M16
VDD
VDD
VDD
AF5
AF8
AG2
GND
GND
GND
GND
GND
GND
U18
U2
U23
(1.35V) VDD GND GND
1.35V
+1.5V_GPU Page M18
N11
N13
VDD
VDD
VDD
AG26
AB14
B1
GND
GND
GND
GND
GND
GND
U26
U5
V11
DIS@ N15 VDD B11 GND GND V13
FB_CAL_PD_VDDQ D22 40.2_0402_1%~D 1 2 RV2720 N17 VDD B14 GND GND V15
P10 VDD B17 GND GND V17
DIS@ P12 VDD B20 GND GND Y2
FB_CAL_PU_GND C24 42.2_0402_1% 1 2 RV2721 P14 VDD B23 GND GND Y23
P16 VDD B27 GND GND Y26
DIS@ P18 VDD B5 GND GND Y5
FB_CALTERM_GND B25 51.1_0402_1% 1 2 RV2722 R11 VDD B8 GND
R13 VDD E11 GND
R15 VDD E14 GND
N14M-GE-S-A2_FCBGA595~D R17 VDD E17 GND
T10 VDD E2 GND
T12 VDD E20 GND
T14 VDD E22 GND
T16 VDD E25 GND
T18 VDD E5 GND
U11 VDD E8 GND
U13 VDD H2 GND
U15 VDD H23 GND
U17 VDD H25 GND
V10 VDD H5 GND
V12 VDD K11 GND
V14 VDD K13 GND
V16 VDD K15 GND
B B
V18 VDD K17 GND
L10 GND
L12 GND
N14M-GE-S-A2_FCBGA595~D L14 GND
L16 GND
L18 GND
L2 GND
UV1C DIS@ L23 GND
+3.3V_GPU L25 GND
COMMON
3.3V L5 GND GND AA7
14/14 XVDD/VDD33 M11 GND GND AB7
Place near balls Place near BGA
AD10 NC VDD33 G10 1 @ 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K
4.7U_0603_6.3V6K~D
AD7 NC VDD33 G12

CV235
CV233
CV234
CV103
CV3061 DIS@
B19 NC VDD33 G8 1 1 1 1 1 0_0402_5% N14M-GE-S-A2_FCBGA595~D

VDD33 G9 RV2404
F11 3V3AUX_NC
2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
V5 FERMI_RSVD1_NC
V6 FERMI_RSVD2_NC
CONFIGURABLE
POWER CHANNELS
* nc on substrate
G1 XPWR_G1
G2 XPWR_G2
G3 XPWR_G3
G4 XPWR_G4
G5 XPWR_G5 ** XPWR pins are configurable.
G6 XPWR_G6
G7 XPWR_G7 These pins are not connected on the substrate.
A Therefore, XPWR pins can be assigned as needed, A
V1 XPWR_V1
V2 XPWR_V2 to improve Top layer routing, power delivery.
W1 XPWR_W1
W2 XPWR_W2
W3 XPWR_W3
W4 XPWR_W4 Security Classification Compal Secret Data Compal Electronics, Inc.
NV(3/5)-POWER_GND
5 4 3 2 1
5 4 3 2 1
+3.3V_GPU
2
UV1N DIS@
GPIO I2CS_SCL 1 6 GPU_SMBCLK GPU_SMBCLK 38
QC9A DIS@
5
VGA_THERMDN and VGA_THERMDP: COMMON +3.3V_GPU DMN66D0LDW-7_SOT363-6~D
1. 5mil track width and spacing 8/14 MISC1 @
I2CS_SCL D9 I2CS_SCL 2.2K_0402_5%~D 2 1 RV49 I2CS_SDA 4 3 GPU_SMBDAT
2. 5mil grounded gurad tracks width and spacing D8 I2CS_SDA 2.2K_0402_5%~D 2 1 RV50
GPU_SMBDAT 38
3. ground referenced
I2CS_SDA
@ I2CS SMBUS: 0x9E QC9B DIS@
4. Connect guard tracks to pin5 I2CC_SCL A9 I2CC_SCL 2.2K_0402_5%~D 2 DIS@ 1 RV45 DMN66D0LDW-7_SOT363-6~D
I2CC_SDA B9 I2CC_SDA 2.2K_0402_5%~D 2 1 RV46 +3.3V_GPU
DIS@ RV76 RV75
D GF119 1 DIS@ 2 1 2 D
42 DGPU_PEX_RST# @
E12 GF117 GK208
THERMDN 0_0402_5%~D 0_0402_5%~D
2
NC I2CB_SCL C9
F12 THERMDP NC I2CB_SDA C8
GPIO8_THERMATRIP# 1 6 THERMATRIP3# THERMATRIP3# 38,60
@ T186 GPU_JTAG_TCK AE5 JTAG_TCK QC6A DIS@
@ T187 GPU_JTAG_TMS AD6 JTAG_TMS DMN66D0LDW-7_SOT363-6~D
@ T188 GPU_JTAG_TDI AE6
For Boundary @ T189 GPU_JTAG_TDO AF6
JTAG_TDI
JTAG_TDO +3.3V_GPU
Scan using. @ T190 GPU_JTAG_TRST# AG4 JTAG_TRST GPIO0 C6
B2 +3.3V_GPU
GPIO1
5
GPIO2 D6
RV88 GPIO3 C7
10K_0402_5% GPIO4 F9 GPIO11_NVVDD_VID_R 4 3 GPIO11_NVVDD_VID
GPIO11_NVVDD_VID 37,60
GPIO5 A3
DIS@
1 GPIO6 A4 QC6B DIS@
GK208 GPIO7 B6 DMN66D0LDW-7_SOT363-6~D
OVERT GPIO8 A6 GPIO8_THERMATRIP# GPIO8_THERMATRIP# RV48 1 DIS@ 2 100K_0402_5%~D
GPIO9 F8 GPIO09_GPUHOT# GPIO09_GPUHOT# RV34 1 DIS@ 2 100K_0402_5%~D +3.3V_GPU
GPIO10 C5
GPIO11 E7 GPIO11_NVVDD_VID_R 1 DIS@ 2 RV74 GPU_PWR_LEVEL GPU_PWR_LEVEL 37
GPIO12 D7 GPIO12_AC_DETECT GPIO12_AC_DETECT RV35 1 DIS@ 2 100K_0402_5%~D 0_0402_5%~D
2
GPIO13 B4 GPIO13_NVVDD_PSI_R GPIO13_NVVDD_PSI_R RV2446 1 DIS@ 2 10K_0402_5%~D
GPIO12_AC_DETECT 1 6 1 @ 2 RV73 ACAV_IN

GK208 GF117 GF119 ACAV_IN 38,58,59
0_0402_5%~D
GPIO16 NC GPIO16 D5 QC8A DIS@
5
GPIO20 NC GPIO20 E6 DMN66D0LDW-7_SOT363-6~D
GPIO8 NC GPIO21 C4
GPIO13_NVVDD_PSI_R 4 3 GPIO13_NVVDD_PSI
GPIO13_NVVDD_PSI 60
QC8B DIS@
+3.3V_GPU
C C
2
GPIO09_GPUHOT# 1 6 GPUHOT# GPUHOT# 37,60
QC11A DIS@
UV1L DIS@
ROM_SI
COMMON ROM_SO
10/14 MISC2 ROM_SCLK
GF117/GF119/GK208
2
E10 VMON_IN0 NC
2
F10 VMON_IN1 ROM_CS D12 10K_0402_1%~D 10K_0402_1%~D
NC
RV89 RV92 10K_0402_1%~D
ROM_SI B12 ROM_SI DIS@ DIS@ RV90
ROM_SO A12 ROM_SO DIS@
STRAP
1
B B
STRAP0 D1 STRAP0 ROM_SCLK C12 ROM_SCLK
1
STRAP1 D2 STRAP1
STRAP2 E4 STRAP2
STRAP3 E3 STRAP3
STRAP4 D3 STRAP4
GF119
GF117 STRAP[3:0]
GK208
C1 STRAP5_NC DIS@ RAM_CF[3:0]
NC
BUFRST D11 RV2444 2 1 10K_0402_5%~D (Micron) MT41K256M16HA-107GM: 0xD = 1101
STRAPREF0 F6 D10
(Hynix) H5TC4G63AFR-11C: 0x4 = 0100
MULTISTRAP_REF0_GND NC PGOOD
GF117 GF117 +3.3V_GPU

GF119 GF119
GK208 GK208
F4 MULTISTRAP_REF1_GND NC
1
NC CEC E9
@ F5 MULTISTRAP_REF2_GND NC GF117
RV2723
GK208
40.2K_0402_1%~D GF119
1
@
2
De-POP RV2723 for N14M-GE-S-A2_FCBGA595~D DIS@ DIS@ @ DIS@

10K_0402_1%~D RV2651 RV2647 RV2649 RV2653
N14M-GE and Binary RV94 10K_0402_1%~D 10K_0402_1%~D 10K_0402_1%~D 10K_0402_1%~D
Strap Mode
2
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
1
DIS@
@ @ DIS@ @
10K_0402_1%~D RV2652 RV2648 RV2650 RV2654
RV93 10K_0402_1%~D 10K_0402_1%~D 10K_0402_1%~D 10K_0402_1%~D
2
A A

NV(4/5)-GPIO_BIOS_STRAP
5 4 3 2 1
5 4 3 2 1
UV1B DIS@
COMMON
2/14 FBA
47 FBA_D[0..31] FBA_D0 E18 F3
FBA_D0 NC FB_CLAMP
FBA_D1 F18 FBA_D1
1
FBA_D2 E16 FBA_D2 DIS@
GF119 GF117/GK208
FBA_D3 F17 FBA_D3 RV2436
FBA_D4 D20 FBA_D4 10K_0402_5%~D
FBA_D5 D21 FBA_D5
FBA_D6 F20 FBA_D6
2
FBA_D7 E21 FBA_D7
FBA_D8 E15 FBA_D8
FBA_D9 D15 FBA_D9
D FBA_D10 F15 D
FBA_D10
FBA_D11 F13 FBA_D11
FBA_D12 C13 FBA_D12
FBA_D13 B13 FBA_D13
FBA_D14 E13 FBA_D14
FBA_D15 D13 FBA_D15
FBA_D16 B15 FBA_D16
FBA_D17 C16 FBA_D17
FBA_D18 A13 FBA_D18
FBA_D19 A15 FBA_D19
FBA_D20 B18 FBA_D20
FBA_D21 A18 FBA_D21
FBA_D22 A19 FBA_D22
FBA_D23 C19 FBA_D23
FBA_D24 B24 FBA_D24
FBA_D25
FBA_D26
FBA_D27
C23
A25
A24
FBA_D25
FBA_D26
FBA_RST
FBA_D27
FBA_D28 A21 FBA_D28
FBA_D29 B21 FBA_D29 FBA_CMD5
C20 FBA_CMD[0..31] 47,48
FBA_D30 FBA_D30
FBA_D31 C21 FBA_D31
48 FBA_D[32..63]
1
FBA_D32 R22 FBA_D32 DIS@
FBA_D33 R24 FBA_D33 FBA_CMD0 C27 FBA_CMD0
FBA_D34 T22 C26 SNN_FBA_CMD1 10K_0402_5%~D
FBA_D34 FBA_CMD1
FBA_D35 R23 FBA_D35 FBA_CMD2 E24 FBA_CMD2 RV2447
FBA_D36 N25 FBA_D36 FBA_CMD3 F24 FBA_CMD3
2
FBA_D37 N26 FBA_D37 FBA_CMD4 D27 FBA_CMD4
FBA_D38 N23 FBA_D38 FBA_CMD5 D26 FBA_CMD5
FBA_D39 N24 FBA_D39 FBA_CMD6 F25 FBA_CMD6
FBA_D40 V23 FBA_D40 FBA_CMD7 F26 FBA_CMD7
FBA_D41 V22 FBA_D41 FBA_CMD8 F23 FBA_CMD8
C FBA_D42 T23 G22 FBA_CMD9 C
FBA_D42 FBA_CMD9
FBA_D43 U22 FBA_D43 FBA_CMD10 G23 FBA_CMD10 FBA_DOT_L FBA_CMD2
FBA_D44 Y24 FBA_D44 FBA_CMD11 G24 FBA_CMD11
FBA_D45 AA24 FBA_D45 FBA_CMD12 F27 FBA_CMD12 FBA_DOT_H FBA_CMD18
FBA_D46 Y22 FBA_D46 FBA_CMD13 G25 FBA_CMD13
FBA_D47 AA23 FBA_D47 FBA_CMD14 G27 FBA_CMD14 FBA_CKE_L FBA_CMD3
FBA_D48 AD27 FBA_D48 FBA_CMD15 G26 FBA_CMD15
FBA_D49 AB25 FBA_D49 FBA_CMD16 M24 FBA_CMD16 FBA_CKE_H FBA_CMD19
FBA_D50 AD26 FBA_D50 FBA_CMD17 M23 SNN_FBA_CMD17
10K_0402_1%~D
RV2437 DIS@
10K_0402_1%~D
RV2438 DIS@
10K_0402_1%~D
RV2439 DIS@
10K_0402_1%~D
RV2440 DIS@
FBA_D51 AC25 FBA_D51 FBA_CMD18 K24 FBA_CMD18
1
FBA_D52 AA27 FBA_D52 FBA_CMD19 K23 FBA_CMD19
FBA_D53 AA26 FBA_D53 FBA_CMD20 M27 FBA_CMD20
FBA_D54 W26 FBA_D54 FBA_CMD21 M26 FBA_CMD21
FBA_D55 Y25 FBA_D55 FBA_CMD22 M25 FBA_CMD22
FBA_D56 R26 FBA_D56 FBA_CMD23 K26 FBA_CMD23
2
FBA_D57 T25 FBA_D57 FBA_CMD24 K22 FBA_CMD24
FBA_D58 N27 FBA_D58 FBA_CMD25 J23 FBA_CMD25
FBA_D59 R27 FBA_D59 FBA_CMD26 J25 FBA_CMD26
FBA_D60 V26 FBA_D60 FBA_CMD27 J24 FBA_CMD27
FBA_D61 V27 FBA_D61 FBA_CMD28 K27 FBA_CMD28
FBA_D62 W27 FBA_D62 FBA_CMD29 K25 FBA_CMD29
FBA_D63 W25 FBA_D63 FBA_CMD30 J27 FBA_CMD30
FBA_CMD31 J26 SNN_FBA_CMD31
47 DQMA[3..0] DQMA0 D19
(1.35V)
FBA_DQM0
DQMA1 D14 FBA_DQM1 FBVDDQ_GPU
DQMA2 C17 FBA_DQM2
DQMA3 C22 FBA_DQM3 +1.5V_GPU
48 DQMA[7..4] DQMA4 P24 FBA_DQM4 @
DQMA5 W24 FBA_DQM5 RV2704
DQMA6 AA25 FBA_DQM6 60.4_0402_1%~D 1.35V
DQMA7 U25 FBA_DQM7 FBA_DEBUG0 F22 1 2
B J22 1 2 B
FBA_DEBUG1
60.4_0402_1%~D
47 QSA[3..0] QSA0 E19 FBA_DQS_WP0 RV2705
QSA1 C15 FBA_DQS_WP1 @
QSA2 B16 FBA_DQS_WP2 FBA_CLK0 D24 CLKA0
QSA3 B22 D25 CLKA0# CLKA0 47
48 QSA[7..4] FBA_DQS_WP3 FBA_CLK0 CLKA0# 47
QSA4 R25 FBA_DQS_WP4 FBA_CLK1 N22 CLKA1
QSA5 W23 M22 CLKA1# CLKA1 48
FBA_DQS_WP5 FBA_CLK1 CLKA1# 48
QSA6 AB26 FBA_DQS_WP6
QSA7 T26 FBA_DQS_WP7
47 QSA#[3..0] QSA#0 F19 D18 SNN_FBA_WCK01

FBA_DQS_RN0 FBA_WCK01
QSA#1 C14 FBA_DQS_RN1 FBA_WCK01 C18 SNN_FBA_WCK01#
QSA#2 A16 FBA_DQS_RN2 FBA_WCK23 D17 SNN_FBA_WCK23
QSA#3 A22 FBA_DQS_RN3 FBA_WCK23 D16 SNN_FBA_WCK23#
48 QSA#[7..4] P25 T24
QSA#4 FBA_DQS_RN4 FBA_WCK45 SNN_FBA_WCK45
QSA#5 W22 FBA_DQS_RN5 FBA_WCK45 U24 SNN_FBA_WCK45#
QSA#6 AB27 FBA_DQS_RN6 FBA_WCK67 V24 SNN_FBA_WCK67
QSA#7 T27 FBA_DQS_RN7 FBA_WCK67 V25 SNN_FBA_WCK67#
+FB_PLLAVDD
DIS@ +1.05V_GPU
1.05V LV76
FB_PLLAVDD F16 +FB_PLLAVDD 1 2
0.1U_0402_10V7K~D
22U_0805_6.3V6M~D
FB_PLLAVDD P22 BLM18PG300SN1D_2P~D

CV228
CV3057
1 1
FB_DLLAVDD H22
FB_PLLAVDD
GF117 GF119/GK208 2 2
DIS@
DIS@
A A
For VRAM DEBUG using Place near BALL

@ FB_VREF D23 FB_VREF_PROBE
T171

NV(5/5)-MEMORY FBA
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-9832P 0.5
5 4 3 2 1
5 4 3 2 1
Memory Partition A - Lower 32 bits [31..0] VRAM P/N changes to Micron 900Mhz
VRAM P/N changes to Micron 900Mhz 46 FBA_D[0..31] MT41K256M16HA-107G:E
MT41K256M16HA-107G:E
46 DQMA[3..0]
UV4 DIS@
UV5 DIS@
46 QSA[3..0] M8 E3
+VREFC_UV5 FBA_D4
@ +VREFC_UV5 M8 E3 FBA_D12 +VREFD_UV5 H1 VREFCA DQ0 F7 FBA_D1
+VREFD_UV5 H1 VREFCA DQ0 F7 FBA_D8 46 QSA#[3..0] VREFDQ DQ1 F2 FBA_D5
RV2707
FBA_CLK0_C 1 2 CLKA0 VREFDQ DQ1 F2 FBA_D13 FBA_CMD9 N3 DQ2 F8 FBA_D0
FBA_CMD9 N3 DQ2 F8 FBA_D10 46,48 FBA_CMD[0..31] FBA_CMD11 P7 A0 DQ3 H3 FBA_D6
A0 DQ3 A1 DQ4
1
80.6_0402_1%~D DIS@ FBA_CMD11 P7 H3 FBA_D14 FBA_CMD8 P3 H8 FBA_D2
D RV2706 FBA_CMD8 P3 A1 DQ4 H8 FBA_D11 FBA_CMD25 N2 A2 DQ5 G2 FBA_D7 D
162_0402_1% FBA_CMD25 N2 A2 DQ5 G2 FBA_D15 FBA_CMD10 P8 A3 DQ6 H7 FBA_D3
@ FBA_CMD10 P8 A3 DQ6 H7 FBA_D9 FBA_CMD24 P2 A4 DQ7
RV2708 2 FBA_CMD24 P2 A4 DQ7 FBA_CMD22 R8 A5
1 2 CLKA0# FBA_CMD22 R8 A5 FBA_CMD7 R2 A6 D7 FBA_D31
FBA_CMD7 R2 A6 D7 FBA_D20 FBA_CMD21 T8 A7 DQ8 C3 FBA_D27
80.6_0402_1%~D FBA_CMD21 T8 A7 DQ8 C3 FBA_D16 FBA_CMD6 R3 A8 DQ9 C8 FBA_D30
1 A8 DQ9 A9 DQ10
0.01U_0402_16V7K~D
FBA_CMD6 R3 C8 FBA_D23 FBA_CMD29 L7 C2 FBA_D25

A9 DQ10 A10/AP DQ11
CV2901
FBA_CMD29 L7 C2 FBA_D19 FBA_CMD23 R7 A7 FBA_D28

A10/AP DQ11 A11 DQ12
@
FBA_CMD23 R7 A7 FBA_D21 FBA_CMD28 N7 A2 FBA_D26

2 FBA_CMD28 N7 A11 DQ12 A2 FBA_D18 FBA_CMD20 T3 A12/BC# DQ13 B8 FBA_D29
FBA_CMD20 T3 A12/BC# DQ13 B8 FBA_D22 FBA_CMD4 T7 A13 DQ14 A3 FBA_D24
FBA_CMD4 T7 A13 DQ14 A3 FBA_D17 FBA_CMD14 M7 A14 DQ15 (1.35V)
FBA_CMD14 M7 A14 DQ15 (1.35V) A15/NC +1.5V_GPU
A15/NC +1.5V_GPU 1.35V
1.35V FBA_CMD12 M2 B2
BA0 VDD
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
FBA_CMD12 M2 B2 FBA_CMD27 N8 D9
BA0 VDD BA1 VDD
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
FBA_CMD27 N8 D9 FBA_CMD26 M3 G7 1 1 1
BA1 VDD BA2 VDD
CV2946
CV2947
FBA_CMD26 M3 G7 1 1 1 K2
BA2 VDD VDD
CV2934
CV2935
CV2950
K2 K8
VDD VDD
CV2933
K8 N1
VDD N1 CLKA0 J7 VDD N9 2 2 2
VDD 2 2 2 CK VDD PLACE 0.1uF CAPS CLOSEST
DIS@
DIS@
DIS@
CLKA0 J7 N9 PLACE 0.1uF CAPS CLOSEST CLKA0# K7 R1
46 CLKA0 CK VDD CK# VDD TO THE MEMORY DEVICES
DIS@
DIS@
DIS@
CLKA0# K7 R1 R9
46 CLKA0# CK# VDD R9 TO THE MEMORY DEVICES VDD
VDD FBA_CMD3 K9
FBA_CMD3 K9 J9 CKE0 A1 PLACE LARGER CAPACITORS
J9 CKE0 A1 PLACE LARGER CAPACITORS FBA_CMD2 K1 CKE1/NC VDDQ A8
FBA_CMD2 K1 CKE1/NC VDDQ A8 J1 ODT0 VDDQ C1 SLIGHTLY FARTHER AWAY
J1 ODT0 VDDQ C1
SLIGHTLY FARTHER AWAY FBA_CMD0 L2 ODT1/NC VDDQ C9
FBA_CMD0 L2 ODT1/NC VDDQ C9 L1 CS0# VDDQ D2
(1.35V)
L1 CS0# VDDQ D2
(1.35V) CS1#/NC VDDQ E9 +1.5V_GPU
C CS1#/NC VDDQ E9 +1.5V_GPU VDDQ F1 C
VDDQ F1 FBA_CMD30 J3 VDDQ H2
VDDQ RAS# VDDQ 1.35V
FBA_CMD30 J3 H2 1.35V FBA_CMD15 K3 H9
FBA_CMD15 K3 RAS# VDDQ H9 FBA_CMD13 L3 CAS# VDDQ
CAS# VDDQ WE#
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
FBA_CMD13 L3
WE#
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
A9 1 1 1 1 1 1 1 1
VSS
CV2940
CV2945
CV2948
CV2949
CV2919
A9 1 1 1 1 1 1 1 1 QSA0 F3 B3
VSS LDQS VSS
CV2936
CV2937
CV2938
CV2939
CV2918
CV2932
CV2927
CV2930
QSA1 F3 B3 QSA3 C7 E1
LDQS VSS UDQS VSS
CV2931
CV2926
CV2929
QSA2 C7 E1 G8
UDQS VSS G8 VSS J2 2 2 2 2 2 2 2 2
VSS 2 2 2 2 2 2 2 2 VSS
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
J2 QSA#0 G3 J8
VSS LDQS# VSS
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
QSA#1 G3 J8 QSA#3 B7 M1
QSA#2 B7 LDQS# VSS M1 UDQS# VSS M9
UDQS# VSS M9 VSS P1
VSS P1 DQMA0 E7 VSS P9
DQMA1 E7 VSS P9 DQMA3 D3 LDM VSS T1
DQMA2 D3 LDM VSS T1 UDM VSS T9
UDM VSS T9 VSS
VSS
FBA_CMD5 T2 B1
FBA_CMD5 T2 B1 RESET# VSSQ B9
46,48 FBA_CMD5 RESET# VSSQ B9 VSSQ D1
VSSQ D1 VSSQ D8
VSSQ D8 RV2906 1 DIS@ 2 243_0402_1%~D L8 VSSQ E2
RV2909 1 DIS@ 2 243_0402_1%~D L8 VSSQ E2 ZQ0 VSSQ E8
ZQ0 VSSQ E8 L9 VSSQ F9
L9 VSSQ F9 ZQ1/NC VSSQ G1
ZQ1/NC VSSQ G1 VSSQ G9
VSSQ G9 VSSQ
VSSQ 96-BALL
96-BALL SDRAM DDR3L
SDRAM DDR3L
PT
B B
MT41K256M16HA-107G-E_FBGA96~D
SAMSUNG
UV5 UV4
(1.35V) (1.35V)
+1.5V_GPU +1.5V_GPU
PCB-MB PCB-MB
X76_SAM@ X76_SAM@
1
DIS@ DIS@
RV2709 RV2711
1.33K_0402_1%~D 1.33K_0402_1%~D
HYNIX
2
+VREFC_UV5 +VREFD_UV5
UV5 UV4
1
1 1
DIS@ DIS@ DIS@ DIS@
RV2710 CV2902 RV2712 CV2941
1.33K_0402_1%~D 0.01U_0402_16V7K~D 1.33K_0402_1%~D 0.01U_0402_16V7K~D A15 is not required for any x16
2 2
2
PCB-MB PCB-MB device, even up to 4Gb density.

X76_HYN@ X76_HYN@
A15 is only needed if we support

x8 configurations, and only at
A A
4Gb.

VRAM_DDR3_A Lower
5 4 3 2 1
5 4 3 2 1
Memory Partition A - Upper 32 bits [64..32]

VRAM P/N changes to Micron 900Mhz
VRAM P/N changes to Micron 900Mhz MT41K256M16HA-107G:E
MT41K256M16HA-107G:E
46 FBA_D[32..63]
UV7 DIS@ UV6 DIS@
@
+VREFC_UV7 M8 E3 FBA_D52 46 DQMA[7..4] +VREFC_UV7 M8 E3 FBA_D35
RV2718
FBA_CLK1_C 1 2 CLKA1 +VREFD_UV7 H1 VREFCA DQ0 F7 FBA_D49 +VREFD_UV7 H1 VREFCA DQ0 F7 FBA_D37
VREFDQ DQ1 F2 FBA_D53 46 QSA[7..4] VREFDQ DQ1 F2 FBA_D34
DQ2 DQ2
1
80.6_0402_1%~D DIS@ FBA_CMD9 N3 F8 FBA_D50 FBA_CMD9 N3 F8 FBA_D39
D P7 A0 DQ3 H3 46 QSA#[7..4] P7 A0 DQ3 H3 D
RV2717 FBA_CMD11 FBA_D54 FBA_CMD11 FBA_D33
162_0402_1% FBA_CMD8 P3 A1 DQ4 H8 FBA_D48 FBA_CMD8 P3 A1 DQ4 H8 FBA_D38
FBA_CMD25 N2 A2 DQ5 G2 FBA_D55 46,47 FBA_CMD[0..31] FBA_CMD25 N2 A2 DQ5 G2 FBA_D32
@
RV2719 FBA_CMD10 P8 A3 DQ6 H7 FBA_D51 FBA_CMD10 P8 A3 DQ6 H7 FBA_D36
2
1 2 CLKA1# FBA_CMD24 P2 A4 DQ7 FBA_CMD24 P2 A4 DQ7

FBA_CMD22 R8 A5 FBA_CMD22 R8 A5
80.6_0402_1%~D FBA_CMD7 R2 A6 D7 FBA_D44 FBA_CMD7 R2 A6 D7 FBA_D56
1 A7 DQ8 A7 DQ8
0.01U_0402_16V7K~D
FBA_CMD21 T8 C3 FBA_D40 FBA_CMD21 T8 C3 FBA_D60

A8 DQ9 A8 DQ9
CV2944
FBA_CMD6 R3 C8 FBA_D46 FBA_CMD6 R3 C8 FBA_D58

A9 DQ10 A9 DQ10
@
FBA_CMD29 L7 C2 FBA_D41 FBA_CMD29 L7 C2 FBA_D61

2 FBA_CMD23 R7 A10/AP DQ11 A7 FBA_D45 FBA_CMD23 R7 A10/AP DQ11 A7 FBA_D57
FBA_CMD28 N7 A11 DQ12 A2 FBA_D43 FBA_CMD28 N7 A11 DQ12 A2 FBA_D63
FBA_CMD20 T3 A12/BC# DQ13 B8 FBA_D47 FBA_CMD20 T3 A12/BC# DQ13 B8 FBA_D59
FBA_CMD4 T7 A13 DQ14 A3 FBA_D42 FBA_CMD4 T7 A13 DQ14 A3 FBA_D62
FBA_CMD14 M7 A14 DQ15 (1.35V) FBA_CMD14 M7 A14 DQ15 (1.35V)
A15/NC +1.5V_GPU A15/NC +1.5V_GPU
1.35V 1.35V
FBA_CMD12 M2 B2 FBA_CMD12 M2 B2
BA0 VDD BA0 VDD
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
FBA_CMD27 N8 D9 FBA_CMD27 N8 D9
FBA_CMD26 M3 BA1 VDD G7 FBA_CMD26 M3 BA1 VDD G7
BA2 VDD 1 1 1 BA2 VDD 1 1 1
CV2955
CV2956
CV2965
CV2966
K2 K2
VDD VDD
CV2959
CV2969
K8 K8
VDD N1 VDD N1
CLKA1 J7 VDD N9 2 2 2 CLKA1 J7 VDD N9 2 2 2
46 CLKA1 CK VDD PLACE 0.1uF CAPS CLOSEST CK VDD PLACE 0.1uF CAPS CLOSEST
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
CLKA1# K7 R1 CLKA1# K7 R1
46 CLKA1# CK# VDD R9 TO THE MEMORY DEVICES CK# VDD R9 TO THE MEMORY DEVICES
VDD VDD
FBA_CMD19 K9 FBA_CMD19 K9
J9 CKE0 A1 PLACE LARGER CAPACITORS J9 CKE0 A1 PLACE LARGER CAPACITORS
FBA_CMD18 K1 CKE1/NC VDDQ A8 FBA_CMD18 K1 CKE1/NC VDDQ A8
J1 ODT0 VDDQ C1 SLIGHTLY FARTHER AWAY J1 ODT0 VDDQ C1 SLIGHTLY FARTHER AWAY
FBA_CMD16 L2 ODT1/NC VDDQ C9 FBA_CMD16 L2 ODT1/NC VDDQ C9
C L1 CS0# VDDQ D2
(1.35V) L1 CS0# VDDQ D2
(1.35V) C
CS1#/NC VDDQ E9 +1.5V_GPU CS1#/NC VDDQ E9 +1.5V_GPU
VDDQ F1 VDDQ F1
FBA_CMD30 J3 VDDQ H2 FBA_CMD30 J3 VDDQ H2
RAS# VDDQ 1.35V RAS# VDDQ 1.35V
FBA_CMD15 K3 H9 FBA_CMD15 K3 H9
FBA_CMD13 L3 CAS# VDDQ FBA_CMD13 L3 CAS# VDDQ
WE# WE#
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
A9 1 1 1 1 1 1 1 1 A9 1 1 1 1 1 1 1 1
VSS VSS
CV2953
CV2954
CV2957
CV2958
CV2920
CV2963
CV2964
CV2967
CV2968
CV2921
QSA6 F3 B3 QSA4 F3 B3
LDQS VSS LDQS VSS
CV2952
CV2928
CV2951
CV2962
CV2961
CV2960
QSA5 C7 E1 QSA7 C7 E1
UDQS VSS G8 UDQS VSS G8
VSS J2 2 2 2 2 2 2 2 2 VSS J2 2 2 2 2 2 2 2 2
VSS VSS
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
QSA#6 G3 J8 QSA#4 G3 J8
QSA#5 B7 LDQS# VSS M1 QSA#7 B7 LDQS# VSS M1
UDQS# VSS M9 UDQS# VSS M9
VSS P1 VSS P1
DQMA6 E7 VSS P9 DQMA4 E7 VSS P9
DQMA5 D3 LDM VSS T1 DQMA7 D3 LDM VSS T1
UDM VSS T9 UDM VSS T9
VSS VSS
FBA_CMD5 T2 B1 FBA_CMD5 T2 B1
46,47 FBA_CMD5 RESET# VSSQ B9 RESET# VSSQ B9
VSSQ D1 VSSQ D1
VSSQ D8 VSSQ D8
RV2907 1 DIS@ 2 243_0402_1%~D L8 VSSQ E2 RV2908 1 DIS@ 2 243_0402_1%~D L8 VSSQ E2
ZQ0 VSSQ E8 ZQ0 VSSQ E8
L9 VSSQ F9 L9 VSSQ F9
ZQ1/NC VSSQ G1 ZQ1/NC VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ
96-BALL 96-BALL
B SDRAM DDR3L SDRAM DDR3L B
PT MT41K256M16HA-107G-E_FBGA96~D
SAMSUNG
UV7 UV6
(1.35V) (1.35V)
+1.5V_GPU +1.5V_GPU
PCB-MB PCB-MB
X76_SAM@ X76_SAM@
1
DIS@ DIS@
RV2713 RV2716
1.33K_0402_1%~D 1.33K_0402_1%~D
HYNIX
2
+VREFC_UV7 +VREFD_UV7
UV7 UV6
1
1 1
DIS@ DIS@ DIS@ DIS@ A15 is not required for any x16
RV2714 CV2942 RV2715 CV2943
1.33K_0402_1%~D 0.01U_0402_16V7K~D 1.33K_0402_1%~D 0.01U_0402_16V7K~D device, even up to 4Gb density.
2 2
2
PCB-MB PCB-MB
X76_HYN@ X76_HYN@ A15 is only needed if we support
A x8 configurations, and only at A
4Gb.

VRAM_DDR3_A Upper
5 4 3 2 1
5 4 3 2 1
GPU Power Discharge Path

+3.3V_ALW
QV2806B
DIS@
(1.35V)
1
5
D DIS@ +1.5V_GPU +1.05V_GPU +GPU_CORE +3.3V_GPU D
RV2805
4
100K_0402_5%~D
1
2
DIS@ DIS@ DIS@ DIS@
RZ10 RZ11 RZ40 RZ41
3.3VS_GFX_ON# 22_0402_5%~D 22_0402_5%~D 22_0402_5%~D 22_0402_5%~D
2
6
QV2806A
DIS@
DGPU_PWR_EN 2
10 DGPU_PWR_EN
6
1
2 5 5 2
D D D D
3.3VS_GFX_ON# G 3.3VS_GFX_ON# G 3.3VS_GFX_ON# G 3.3VS_GFX_ON# G
S S S S
QZ5B QZ5A QZ21A QZ21B
1
DIS@ DIS@ DIS@ DIS@
C
GPU Power Up Power Rail Sequence GPU Power Up Sub-system Sequence C
GPU Power on GPU-Init begin
nVidia Driver Waiting GPU-Init

+3.3V_GPU
Power EN T1
+GPU_CORE
NV3V3 Stable T2
+1.5V_GPU (1.35V)
27Mhz clock
CLK REQ# T1>8uS

+1.05V_GPU T2 >0
T3 10mS>T3 >0
The ramp time for any rail must be more than 40us. 100MHz PCIe Refclk
T4 >100uS
T5 >0
GPU all Rails Stable T6 >2mS
T4
GPU Power Down Sequence PEX_RST#
Link-Training Link-Stable
First rail to power down PCIe Link Training
90%
T5 T6
B
+3.3VRUN to +3.3V_RUN_GFX Toff < 10ms
B
Last rail to power down

GPU Power Down Sub-system Sequence
Around 1.4 A 10% GPU disable call Call return
+3.3V_GPU @
U19 DIS@ C153 1U_0603_10V6K~D nVidia Driver
1 14 1 2 Waiting
+3.3V_RUN VIN1 VOUT1
2 13
VIN1 VOUT1
DGPU_PWR_EN 1 @ 2 3 12 C152 1 2 DIS@ T2 T3
ON1 CT1 GPU Power EN
R155 0_0402_5% 470P_0402_50V7K~D
4 11
+5V_ALW VBIAS GND T4
NV3V3
1.5V_PWRGD 1 @ 2 5 10 C163 1 2 DIS@
62 1.5V_PWRGD ON2 CT2
R165 0_0402_5% 470P_0402_50V7K~D
6 9 27Mhz clock
+P1.05V_PEX_VDD VIN2 VOUT2
7 8
VIN2 VOUT2 +1.05V_GPU
1
15 CLK REQ# T1 >0
GPAD
TPS22966DPUR_SON14_2X3~D
@
C154
Around 3 A T2 >0
2 1U_0603_10V6K~D 100MHz PCIe Refclk T3 >0
T4 >0
All Non-3.3V GPU Rails T1
A
+1.05V_MP to +1.05V_PEX_VDD PEX_RST#
A
Stable Link-Tear-Down
PCIe Link

VGA_DC/DC Interface
Size
Document Number Rev
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK PAGE
B B
A A

DELL CONFIDENTIAL/PROPRIETARY Title
BLANK PAGE
0.5
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-9832P
5 4 3 2 1
5 4 3 2 1
EMI (47.1)
Dell feature: ESD&EMI
D D
+3.3V_ALW
EMI (47.1) PL1
FBMJ4516HS720NT_2P
Primary Battery Connector 1 2
37.1 PL2
100K_0402_5%
1
FBMJ4516HS720NT_2P
1 2
PR2
PBATT+_C +PBATT
11
GND 10
GND 9 PR3
2
9 8 100_0402_5% PR5
8 7 Z4304 1 2 100_0402_5%
7 PBAT_SMBCLK 38
6 Z4305 1 2
2200P_0402_50V7K
6 PBAT_SMBDAT 38
5 Z4306 1 2
PBAT_PRES# 37,58 Dell feature: Support dock
1
5 4
4 3
PC3
PR4
3 2 100_0402_5% PQ1
2
2 1 DMG2301U-7_SOT23-3
1
ACES_51996-00971-001 1 2 1 3
S
DOCK_SMB_ALERT# 35,37
CONN@ PBATT2
TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
PD4
3
2
RB751VM-40TE-17_SOD323-2
G
2
PD1
PD2
1500P_0402_50V7K
35,37,58 SLICE_BAT_PRES#
1
1
PSID circuit (39.1)
PC4
C +5V_ALW C
Dell feature: PSID
2
47.2 for ESD 47.2 for ESD +3.3V_ALW
Others (37.1) Dell feature: ESD&EMI
PWR support
BAV99W-7-F_SOT323-3
3
2
PD5
GND PU1
TS5A63157DCKR_SC70-6
2.2K_0402_5%
1
@ 1 6
35 DOCK_PSID NO IN GPIO_PSID_SELECT 37
PR8
1
PQ2 2 5
GND V+ +5V_ALW
PL3 FDV301N-G_SOT23-3 PR9
2
BLM18BD102SN1D_2P 33_0402_5%
1 2 1 3 1 2 NB_PSID_TS5A63157 3 4
S
D
NC COM PS_ID 38
100K_0402_1%
1
PR10
+5V_ALW
G
2
10K_0402_1%
2
1
C
2
PR11
PQ3
B MMST3904-7-F_SOT323-3
E
15K_0402_1%
3
1
2
@ PR13
PR12
10K_0402_5%
1 2
DC_IN+ Source PSID_DISABLE# 37
2
Dell feature
EMI (47.1) peak power
B
37.1 PQ4
B
FDS6679AZ-G_SO8
3
2
1
+DC_IN +DC_IN_SS
4
PL4
FBMA-L11-453215800LMA90T_2P
1 2 +DC_IN
3
1M_0402_5%
0.022U_0603_50V7K
5
6
7
8
IMD2AGZT108_SC74-6
PR14
100K_0402_5%
E
10U_0805_25V6K
0.1U_0603_25V7K
1
1
PQ5B
PC5
PR18
0.1U_0603_25V7K
PC6
PC9
PR20
2
2
1
10K_0402_5%
4.7K_0805_5%
0.1U_0603_25V7K
1 NB_PSID 1 2 @
SOFT_START_GC 58
2
IMD2AGZT108_SC74-6
1
1
2
PC10
PC11
PR19
C
2
2 3 +DCIN_JACK
4
1
4
1M_0402_5%
2
4 5 -DCIN_JACK 5
PR21
@ @
AC_DIS 37,58
2
5 B
PQ5A
GND
6 EMI (47.1)
E
2
GND
6
CONN@ PJPDC1
ACES_50299-00501-003 1 2
PL5 Charger (40.2)
FBMA-L11-453215800LMA90T_2P
0.1U_0603_25V7K
1
PC12
A A
Title
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D +DCIN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 0.1
LA-XXXX
5 4 3 2 1
A B C D E
35.1 & 35.2
+3.3V_RTC_LDO
1 1
+3.3V_ALW2
DEL: PR54
PR51 PR52
6.49K_0402_1% 15.4K_0402_1%
1 2 1 2
1U_0603_10V6K
PR53 PR55
10K_0402_5% 10K_0402_5%
1
PC51
1 2 1 2
105K_0402_1%
38 ALW_PWRGD_3V_5V
95.3K_0402_1%
1
1
+DC1_PWR_SRC
PR56
PR57
+DC1_PWR_SRC +3.3V_ALW
2
PL51
2200P_0402_50V7K
1UH_PCMB053T-1R0MS_7A_20%
100K_0402_5%
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
1 2
1
2200P_0402_50V7K
PC55
1
10U_0805_25V6K
10U_0805_25V6K
PR58
PC57
PC58
@ PC59
0.1U_0402_25V6
SIS412DN-T1-GE3_POWERPAK8-5
CS2
VFB2
VREG3
VFB1
CS1
21
PAD
1
5
PC54
PC56
@ PC52
EN 6 @
2
EN2
PC53
20 EN
@ PR60 @
2
EN1
5
2 0_0402_5% @ PR59 2
2
@ 1 2 PGOOD_3V_5V 7 200_0402_1%
PGOOD
PQ51
19 1 2
VCLK
PQ52
4
SW2 8
+PWR_SRC PC61 PR62 SW2 PU51 18 SW1 4
0.1U_0603_25V7K 2.2_0603_5% TPS51225CRUKR_QFN20_3X3 SW1 PR61 PC60
1 2 1 2 BST_3V 9 2.2_0603_5% 0.1U_0603_25V7K
1
2
3
VBST2 17 BST_5V 1 2 1 2
VBST1
3
2
1
UG_3V 10
DRVH2 16 UG_5V
VREG5
DRVL2
DRVL1
PL52 DRVH1 PL53
+3.3V_ALWP +5V_ALWP
VO1
VIN
2.2UH_ETQP3W2R2WFN_8.5A_20% 2.2UH_ETQP3W2R2WFN_8.5A_20%
1 2 1 2
11
12
13
14
15
680P_0603_50V7K
SIS472DN-T1_POWERPAK1212-8-5
SIS472DN-T1_POWERPAK1212-8-5
220U_D2_6.3VY_R15M
220U_D2_6.3VY_R15M
5
4.7_1206_5% 680P_0603_50V7K
1
PC62
0.1U_0603_25V7K
1 1
1
PC65
1
PC71
PC72
+ +
2
PQ53
PQ54
PC67
@ @
2
4 LG_3V LG_5V 4
2
2 2
@
1
1
@ PR64
4.7_1206_5%
1
2
3
3
2
1
@ PR63
1U_0603_10V6K
0.1U_0603_25V7K
2
1
1
PC69
2
PC68
3 3
2
+DC1_PWR_SRC +5V_ALW2
EN
@ PR65
0_0402_5%
1 2 @ PJP52
38 ALWON 1 2
3VALWP +5V_ALWP +5V_ALW
TDC 6.6 A Change from 2K to 0 ohm PAD-OPEN 1x3m

5VALWP
Peak Current 9.4 A TDC 7.2 A
1U_0603_10V6K
@ PJP53
1
Peak Current 10.3 A

PC70
1 2 +3.3V_ALW
OCP Current 11.22 A +3.3V_ALWP
Rds(on):10.3m ohm typ. PAD-OPEN 1x3m OCP Current 12.24 A

2
@
Fsw 355 kHz typ. Rds(on):10.3m ohm typ.
Fsw 300 kHz typ.
4 4

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PWR_+5V_ALW/3.3V_ALW
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-XXXX
A B C D E
5 4 3 2 1
1.35Volt +/- 5%
TDC: 7.2 A 0.675Volt +/- 5%
Peak Current: 10.3 A TDC 0.525A
OCP current: 12.24 A Peak Current 0.75A
Rds(on):14.5m ohm typ OCP Current 0.8925A
Fsw
+PWR_SRC PL101
D 1 2 1.35V_B+ PR100 D
FBMA-L11-453215-121LMA90T_2 2.2_0603_5% @ PJP101
1 2 BOOT_1.35V +VLDOIN_1.35V 1 2 +1.35V_MEN_P
PAD-OPEN1x1m
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
DH_1.35V +0.675V_P
0.1U_0402_25V6
0.22U_0603_16V7K
1
1
PC100
@ PC101
PC102
PC103
1
SW _1.35V
PC104
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
@
2
8
7
6
5
1
DL_1.35V
PC105
PC106
16
17
18
19
20
PQ100
SI4128DY-T1-GE3_SO8
DH
VLDOIN
LX
BST
VTT
2
21
PAD
4 15 1
+1.35V_MEN_P DL VTTGND
14 2
PL100 PR101 PGND VTTSNS +V_DDR_REF
1
2
3
2.2UH_ETQP3W 2R2W FN_8.5A_20% 19.6K_0402_1%
1 2 1 2 CS_1.35V 13 3
PC107 CS GND
1U_0603_10V6K PU100
680P_0603_50V7K
8
7
6
5
1 2 12 G5616ARZ1U_TQFN20_3X3 4 +V_DDR_REF
330U_D2_2.5VY_R15M
VPP VTTREF
1
PQ101
PR102
PC109
1 1
SI4134DY-T1-GE3_SO8
5.1_0603_5%
330U_2.5V_M
+ + 1 2 VDD_1.35V 11 5 +1.35V_MEN_P
PC110
C C
0.033U_0402_16V7K
SNUB_1.35V 2
@ +5V_ALW VCC VDDQSNS

PC116
1
VDDQSET
4
PC112
2 2@
PGOOD
PC111
1U_0603_10V6K
FB sense trace
TON
2
2
when FB pull down to GND
S5
S3
+3.3V_ALW +5V_ALW
1
2
3
10
6
1
PR105
4.7_1206_5%
100K_0402_5%
1
8.06K_0402_1%
@ PR103
1.35V_FB 1 2
+1.35V_MEN_P
PR104
2
PC113
FB sense trace
2
100P_0402_50V8J
38 1.35V_SUS_PW RGD 1.35V_SUS_PW RGD 1 2
PR106
1M_0402_1%
@ PR107 1.35V_B+ 1 2
0_0402_5%
10K_0402_1%
0.1U_0402_10V7K
1
1 2 S5_1.35V
37,40,54,9 SIO_SLP_S4#
1
PR109
@ PC114
@ PR108
0_0402_5%
2
1 2 @ PR110
37,40 SUS_ON
2
0_0402_5%
0.1U_0402_10V7K
1 2
18 0.675V_DDR_VTT_ON
1
@ PC115
B @ PR111 B
0_0402_5%
2
1 2
36,37,40,9 SIO_SLP_S3#
Mode S3 S5 +1.35V_MEN_P +V_DDR_REF +0.675V_P
S5 L L off off off
S3 L H on on off(Hi-Z)
S0 H H on on on
@ PJP102
1 2
1 2
JUMP_1x3m
@ PJP103
+1.35V_MEN_P 1 2 +1.35V_MEM @ PJP104
1 2
+0.675V_P 1 2 +0.675V_DDR_VTT
JUMP_1x3m
PAD-OPEN1x1m
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PWR_+1.35V_MEN/+0.675V_DDR
Date: W ednesday, August 14, 2013 Sheet 53 of 64
5 4 3 2 1
5 4 3 2 1
D D
+5V_ALW
+PWR_SRC
4700P_0402_25V7K
1U_0402_6.3V6K
@PJP150
@ PJP150
1
0_0402_5%
PAD-OPEN 1x2m~D
1
PC150
@ PR150
PC151
+V1.05SP_B+ 2 1
2
2
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
1
1
PC152
PC153
PC154
PC155
23
22
21
20
19
18
17
16
15
2
@
GND
VIN
VIN
VIN
GSNS
VSNS
TRIP
V5
SLEW
24
REFIN2 14
C PGND C
25
PC156 REFIN 13
0.1U_0402_10V7K PGND
1 2 REF_+1.05V_MP 26 PU150
VREF TPS51362RVER_QFN28_4P5X3P5 12
PGND EMC change to non-pop 11/15
27
@PR153
@ PR153 RA 11
0_0402_5% PGND
1 2 EN_+V1.05SP 28
37,40,61,9 SIO_SLP_A# EN 10
PGND
0.1U_0402_10V7K
PGOOD
@ PR154
MODE
0_0402_5% 29
BST
TP
1
1
LP#
+3.3V_ALW
680P_0603_50V7K 4.7_1206_5%
SW
SW
SW
SW
@ PC157
1 2
NC
38,40,61 A_ON
@ PR155
100K_0402_5%
S0 mode be high level

2
9
1
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
PR156
1
BST_+V1.05SP
1
0_0402_5%
PC158
PC159
PC163
2
2
1
@ PR157
PC164
B B
2
38 1.05V_A_PWRGD @
2
SW_+V1.05SP 1 2 +1.05V_MP
SIO_SLP_S0#
38,40,61 PL150
0.1U_0603_25V7K 0.68UH_TMPC0624H-R68MG-D_13A_20%
5.1_0603_5%
1
PC165
PR158
+1.05Volt +/- 5%
TDC 8.2 A
2
Peak Current 11.62 A

@PJP151
@ PJP151
+1.05V_MP 1 2 +1.05V_M OCP current 12A (Fix)
PAD-OPEN 1x3m Fsw 800 kHz
@PJP152
@ PJP152
1 2 +P1.05V_PEX_VDD
A PAD-OPEN 1x2m~D
DELL CONFIDENTIAL/PROPRIETARY A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PWR_+1.05VTTP
5 4 3 2 1
5 4 3 2 1
1.5Volt
Frequency 1MHz
TDC 0.65A
D Peak Current 0.93A D
OCP current 3.5A (Fix)
DEL: PR200
PU200
SYN470DBC_DFN10_3X3 PL200
4
@ PJP200 1UH_NRS4018T1R0NDGJ_3.2A_30%
+3.3V_ALW 1 2 1.5VRUN_VIN 10 2 1.5VRUN_LX 1 2
PG
PVIN LX +1.5V_RUNP
7.68K_0805_1%
22U_0805_6.3VAM
0.1U_0603_25V7K
PAD-OPEN 1x2m~D 9 3
PVIN LX
47P_0402_50V8J
1
22P_0402_50V8J
30.1K_0402_1%
22U_0805_6.3VAM
22U_0805_6.3VAM
PC201
PR201
8
SVIN
PC205
1
1
PC200
PR202
PC202
6 1.5VRUN_FB
2
@ 5 FB @
SNUB_1.5VRUN2
2
EN
PC203
PC204
@
NC
NC
TP
2
@ PR203
@PR203
2
C C
0_0402_5%
11
1
1 2 EN_1.5VRUN
37,40,52,9 SIO_SLP_S4#
@ PR206
680P_0603_50V7K
20K_0402_1%
0.1U_0402_10V7K
0_0402_5%
1
1M_0402_5%
1 2
36,37,38,40 RUN_ON
1
PR205
@ PC206
@ PC207
PR204
2
2
2
2
VFB=0.6V Vo=VFB*(1+PR202/PR204)=0.6*(1+30.1K/20K)=1.503V
@ PJP201
1 2
+1.5V_RUNP +1.5V_RUN
B PAD-OPEN 1x2m~D B
A A

Issued Date <Issued_Date> Deciphered Date <Deciphered_Date> Title
PWR_1.5V_RUN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
5 4 3 2 1
5 4 3 2 1
VREF
100K_0402_1%_NCP15WF104F03RC
1
PH300 IMON
1M_0402_1%
75_0402_1%
348K_0402_1%
9.31K_0402_1%
1
1
75_0402_1%
PR300
PR301
PR302
PR303
PR304
2
4700P_0603_50V7K
@
2
@
0.1U_0402_10V7K
2
1
10K_0402_5%
PC300
1
D OCP-I B-RAMP F-IMAX O-USR D
1
PR305
SLEWA
PC301
1
75K_0402_1%
150K_0402_1%
150K_0402_1%
150K_0402_1%
PR306
PR307
PR308
PR309
2
39K_0402_5%
2
1
PR310
2
2
@ PR312
+VCC_PWR_SRC 1 2 0_0402_5%
1 2
PR311 H_VR_EN 15
10K_0402_5% 1 2 +5V_RUN
75_0402_1%
@PR313
@ PR313 IMVP_VR_ON 37
16
15
14
13
12
11
10
@ PR314
0_0402_5%
SKIP# @ PD300
VBAT
THERM
SLEWA
B-RAMP
F-IMAX
IMON
OCP-I
O-USR
SDMK0340L-7-F_SOD323-2 @ PR315
PWM1 1 2 0_0402_5%
2
CSP1 17 8 SKIP# 1 2 SKIP#1
CSP1 VR_ON @ PR317
CSN1 18 7 0_0402_5%
CSN1 SKIP# 1 2
19 6 H_VR_READY 15
CSN2 PWM1 @PR318
@ PR318
2.2U_0603_10V7K
20 5 0_0402_5%
+3.3V_RUN CSP2 PU300 PWM2 1 2
1
IMVP_PWRGD 37
PC303
21 TPS51622RSM_QFN32_4X4 4 @PR319
@ PR319 PC302
+3.3V_RUN PU3 N/C 1.91K_0402_1% 0.1U_0402_25V7K +VCC_CORE
22 3 1 2
+3.3V_RUN
2
N/C PGOOD
C C
23 2 1 2 PC304 PR321
GFB VDD +3.3V_RUN 0.1U_0402_25V7K 0_0603_5% 5 1 PL300
VR_HOT#
VIN SKIP#
ALERT#
24 1 PR320 1 2 1 2 6 2 0.22UH_FDUE0640J-H-R2_25A_20%
DROOP
VFB VDIO BOOT_R VDD

COMP
VREF
3
VCLK
1_0603_5%
GND
PAD
PGND1
V5A
7 4 LX_DGPU 1 4
BOOT VSW
1
PWM1 8
PWM
GFB
VFB
PC306 9 2 3
25
26
27
28
29
30
31
32
33
PGND2
VIDSOUT
1U_0603_10V6K
2
PU301
CSD97374CQ4M_SON8_3P5X4P5
PC307 PR324
680P_0603_50V7K 4.7_1206_5%
1 2 1 2
2.1K_0402_1%
1
1 2
PR328
@PC305
@ PC305 PR322
100P_0402_50V8J 2.43K_0402_1%
1 2 1 2
2
1VR_HOT#
PR323
10K_0402_5%
VIDALERT_N
1 2 1 2 VREF
+PWR_SRC
VIDSCLK
PR325
5.62K_0402_1% PC308
1
1500P_0402_50V7K 1 2 +VCC_PWR_SRC CSP1

PC309
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
33U_D_25VM_R60M
33U_D_25VM_R60M
PC320 0.068U_0402_16V7K
PC318 0.068U_0402_16V7K
10K_0402_1%_TSM0A103F34D1RZ
0.33U_0603_10V7K @ PR326 PL301 1 1
2
1
0_0402_5% FBMA-L11-453215-121LMA90T_2
2
@ PC315
@ PC316
PH301
+ +
PC311
PC312
PC313
PC314
2
2
1 2 2 2
+5V_ALW
1
B B
3.01K_0402_1%
PR327
1
1
47P_0402_50V8J
PC317
10_0603_1% PC310
49.9K_0402_1%
2
1
PR329
1U_0603_10V6K
PR333
2
2
2
CSN1
38,57,58,9 H_PROCHOT#
+1.05V_VCCST
0.1U_0402_10V7K
CPU
1
130_0402_1%
54.9_0402_1%
@ PR334
1
PR331
PR330
0_0402_5% TDC 10 A
PC319
1 2 VFB
15 VCCSENSE Peak Current 32 A
2
OCP Current 38.4 A

2
@ PR335
0_0402_5%
15 VIDSCLK 1 2 GFB Fsw 1MHz
15 VIDALERT_N VIDALERT_N 15 VSSSENSE
from processor
15 VIDSOUT
A A
DELL CONFIDENTIAL/PROPRIETARY Compal Electronics, Inc.

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PWR_+VCC_CORE
5 4 3 2 1
5 4 3 2 1
+VCC_CORE
D D
1
1
PC360 PC361 PC362 @ PC363 @ PC364
22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM
2
2
1
1
PC365 @ PC366 @ PC367 PC368 PC369
2
2
1
1
PC370 @ PC371 @ PC372 PC373 PC374
2
2
C C
1
1
PC375 PC376 PC377 PC378 PC379
2
2
1
PC380 PC381 PC382 @ PC383 @ PC384 @

2
2
1
PC385 PC386 @ PC387 @ PC388 PC389 @

2
B B
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PWR_PROCESSOR DECOUPLING
5 4 3 2 1
5 4 3 2 1
+PWR_SRC_AC
PQ400
AON7403L_DFN8-5 +SDC_IN
CHAGER_SRC Dell feature
PR400 PL400
1 0.01_1206_1% 1UH_PCMB053T-1R0MS_7A_20%
5 2 1 4 1 2
+DC_IN_SS 3 sense adapter
2 3
1
@ PC400 @ PR402
47P_0402_50V8J
0.1U_0603_25V7K
0.1U_0603_25V7K 0_0402_5%
1
38,57 VCP 1 2
PC401
PC402
2
@ PR403
DC_BLOCK_GC 58
1
0_0402_5% D PQ401
2
1 2 2 NTR4502PT1G_SOT23-3 @ @
VCP_1
58 CSS_GC
G PU401 @ PR404 @ PR405
1
D D D
S INA199A1DCKR_SC70-6 150K_0402_1% 100K_0402_1%
3
2 1 6 1 2 1 2
G PQ403A REF Out
PQ402 S
S
PD400 NTR4502PT1G_SOT23-3 5 6 CSSN_1
D
DOCK_DCIN_IS+ 35
BAT54CW_SOT323-3 PR408
100K_0402_5%
1
2 44.2_0402_1%
E-dock power(41.2)
CSSN_1
+DOCK_PWR_BAR
CSSP_1
2 5 1 2
PR417
G
1
1 GND IN-
Charger controller (40.1) @ PR410 PQ403B Dell feature
+SDC_IN 3
V+ IN+
4 PR411
3 10K_0402_5% 59_0402_1%
Support Component (40.2)
2
+DC_IN_SS
S
1 2 2 4 1 2 CSSP_1
D
DOCK_DCIN_IS- 35
0.1U_0603_25V7K
PC438
1
1U_0603_25V6
PC406
100K_0402_5%
1
1 2 SI3993CDV-T1-GE3_TSOP6
G
Discrete current monitor circuit
3
PR418
58 +CHGR_DC_IN
2
@ PC407 PC408 PC409
0.1U_0402_25V6 0.1U_0402_25V6 0.1U_0402_25V6
1 2 1 2 1 2
2
1
10_1206_5%
DK_CSS_GC 58
PR420
1 2
@ PU403A
2
+SDC_IN GNDA_CHG GNDA_CHG PC410 VCP_1 3 LM358DR2G_SO8
2
+IN
1
PC411 1U_0603_10V6K 1
10U_0805_25V6K PD401 2 OUT VCP 38,57
ACN
ACP
1
1 2 +DCIN 20 16 BQ24715_REGN BAT54HT1G_SOD323-2 -IN Vcc
VCC REGN
1
PR421 +SDC_IN PR422 PR423 4
5
PR424 316K_0402_1% 4.02K_0402_1% 2.2_0603_5%
SIR472DP-T1-GE3_POWERPAK8-5
49.9K_0402_1% 1 2 3 17 1 2
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
2200P_0402_50V7K
0.1U_0603_25V7K
2
1 2 CMSRC BTST
PQ404
1 1 1 1 1
1
PC414
PC412
PC415
PC416
PC430
PC436
PC437
PC413 4 18 CHG_UGATE 4
2
0.1U_0402_25V6 ACDRV HIDRV @ 2 2 2 2 2 +3.3V_ALW
1
1 2 PC417
C 0.047U_0603_25V7M C
6 19 8
3
2
1
GNDA_CHG ACDET PHASE
@ PR429 6
BQ24715_REGN 0_0402_5% -IN Vcc 7
1 2 8 15 CHG_LGATE +PWR_SRC 5 OUT
38 CHARGER_SMBDAT SDA LODRV +IN
100K_0402_1%
1
@ PR430 @ PU403B
0_0402_5% LM358DR2G_SO8
PR425
1 2 9 14 +VCHGR
38 CHARGER_SMBCLK SCL GND PL401 PR426
@ PR427 2.2UH_PCMB103T-2R2MS_13A_20% 0.01_1206_1%
2
0_0402_5% 1 2 1 4
1 2 BQ24715_3.3V 5 13
38,57,58 ACAV_IN ACOK SRP SRN_B2 3SRP_B
10U_0805_25V6K
10U_0805_25V6K
1000P_0603_50V7K
2200P_0402_50V7K
121K_0402_1%
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
1
PC418
0.1U_0603_25V7K
1
1
7 12
PR428
PC440
PC441
PC419
PC420
1
38 V_SYS IOUT SRN
PC421
SIRA06DP-T1-GE_POWERPAKSO-8-5
2
PR431 @
PC422
PC423
100P_0402_50V8J
2
10K_0402_5%
PQ406
2
2
1
BQ24715_REGN 1 2 10 11 4 @
PC424
CELL /BATDRV
TP
1
2
21
PU402 @ PC425 PC426 PC427
PR433
4.7_1206_5%
1
2
3
GNDA_CHG BQ24717RGRR_QFN20_3P5X3P5 0.1U_0402_25V6 0.1U_0402_25V6 0.1U_0402_25V6
58 CHARGER_CELL_PIN 1 2 1 2 1 2
2
GNDA_CHG @
GNDA_CHG @ PJP401
1 2
GNDA_CHG GNDA_CHG
Adapter protection (39.7) PAD-OPEN1x1m
Dell feature: AC protect GNDA_CHG PR432

4.02K_0402_1% 57, 58
1 2 BATDRV#
B E-dock power(41.2) B
+5V_ALW
Dell feature: AC protect
0.01UF_0402_25V7K
DYN_TUR_CURRENT_SET#
100P_0402_50V8J
1
1
PC428
PC429
221K_0402_1%
+3.3V_ALW2
1
+3.3V_ALW2
BQ24715_REGN
PR435
65W High
2
+5V_ALW @ @
PR437
1.8M_0402_1%
150K_0402_1%
2
1
1 2
90W Low @ PR442
PR440
0_0402_5%
PR441 1 2 +DC_IN
H_PROCHOT# 38,55,57,58,9
8
20K_0402_1% PR447
2
VCP 1 2 3 D D 1M_0402_1%
10K_0402_1%
232K_0402_1%
P
48.7K_0402_1%
+
1
PQ409A
1 2 5 1 2
2 O G G
PR445
PR446
PR448
-
G
+5V_ALW
PQ409B
PU404A S S
1200P_0402_50V7K
4
LM393DR_SO8
220P_0402_25V8J
2
1
150K_0402_1%
66.5K_0402_1%
100P_0402_50V8J
1
8
+3.3V_ALW PU404B @ PR450
PC432
PC439
1
5 0_0402_5%
PR443
PR444
PC431
P
+3.3V_ALW + 7 1 2 ACAV_IN_NB 38,58
2
2 6 O
100K_0402_5%
2
-
1
G
PC433
2
0.1U_0402_10V7K LM393DR_SO8
PR449
4
1 2
10K_0402_1%
100P_0402_50V8J
100P_0402_50V8J
1
1
D
22.6K_0402_1%
42.2K_0402_1%
1
1
2
PC434
PC435
PR453
38 DYN_TUR_CURRNT_SET#
2
5
PR451
PR452
G
PQ410 S 1
P
3
2
DMN65D8LW-7_SOT323-3 4 B
2
Y 2
PROCHOT_GATE 37
2
G
A
1
A PU405 D A
3
74AHC1G08GW_SOT353-5 2
ACAV_IN 38,57,58
G
S PQ411
3
DMN65D8LW-7_SOT323-3
Adapter Protection Circuit for Turbo Mode

Title
PWR_Chager
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-XXXX
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Wednesday, August 14, 2013 Sheet 58 of 64
5 4 3 2 1
5 4 3 2 1
PQ500
PD500 PD501 NTR4502PT1G_SOT23-3 +3.3V_ALW
PDS5100H-13_POWERDI5-3 SDMK0340L-7-F_SOD323-2 PC500 PR500
D
3 +PBATT_IN_SS 2 1 3 1 0.1U_0402_10V7K 100K_0402_5%
+NBDOCK_DC_IN_SS
1 1 2 1 2 +3.3V_ALW
2
240K_0402_5% 100K_0402_5%
Battery select (39.3)
G
2
5
PQ501 PU500
PR503
Dell feature:Battery selector
3
SI4835DDY-T1-GE3_SO8 SLICE_BAT_PRES# 1 D
P
1 8 B 4 5
PQ507B
Y
+BATT_SUM 2 7 SLICE_BAT_ON 2 G
G
3 6 A +3.3V_ALW
H_PROCHOT# 38,55,57,9
5 74AHC1G08GW_SOT353-5 S
4
1
100K_0402_5%
1
+3.3V_ALW2
PR501
100K_0402_5%
Charger (40.2)
1
PR502
PR504
1
100K_0402_5%
+PBATT
2
+3.3V_ALW
PR505
2
3
PD502 D
2
3
2
1
PDS5100H-13_POWERDI5-3 5
PQ502B
100K_0402_5%
1
3 PQ505 G
10K_0402_5%
D D
2
1
6
1 D D
PR506
+VCHGR FDS6679AZ-G_SO8
2 2 2
PQ503A
PQ507A
PR507
S
4
+3.3V_ALW2 4 G G
EMI (47.1)
3
PQ504 D +PWR_SRC_AC
2
SI4835DDY-T1-GE3_SO8 5
PQ503B
S S
1
1 8 G SLICE_BAT_PRES# +3.3V_ALW
100K_0402_5%
SDMK0340L-7-F_SOD323-2
1
2 7 1 2 35,37,50,58 @ PC503 PC502
3 6 0.1U_0603_25V7K 0.1U_0402_10V7K
PR508
S
5
6
7
8
6
5 PR509 1 2 1 2 D
2
1
330K_0402_5% D 2
PQ502A
SLICE_BAT_ON 2 G
PD503
4
5
G
57 BATDRV# @ PC504 PQ508 S PBAT_PRES# 1 S
P
3
1
2200P_0402_50V7K DMN65D8LW-7_SOT323-3 B 4
1
Y
1 2 2
G
A
PU502
3
74AHC1G08GW_SOT353-5
PC505 @ PR513 @ PR514 PD504
0.47U_0805_25V6K 0_0402_5% 0_0402_5% SDMK0340L-7-F_SOD323-2
6
D PR510 1 2 1 2 37 DIS_BAT_PROCHOT# 1 2 1 2
CHARGER_CELL_PIN 57
2 820_0603_1%
PQ506A
G 1 2 3301_DSCHRG_FET_GC
STSTART_DCBLOCK_GC
3
D
5
PQ506B
S SLICE_BAT_ON 37,58
1
G PQ510
0.01U_0603_25V7K
1
FDS6679AZ-G_SO8
PC506
4
S
4
2
5
1
PDS5100H-13_POWERDI5-3
3 6
2 7
E-dock power(41.2) 1 8
PD505
Dell feature: Support dock
37,50 PBAT_PRES#
+3.3V_ALW2
3
PR516
330K_0402_5% PC507
1 2 0.1U_0402_10V7K
Purpose: Turn on the PQ817
1 2 for primary or module bay
+DOCK_PWR_BAR
+3.3V_ALW2 PU503 battery to provide power to
5
PC508 74AHC1G08GW_SOT353-5
100K_0402_5%
dock side without AC exist.
1
C C
0.1U_0402_10V7K 1
P
B
1
PQ524 @ PC509 1 2 4 SLICE_BAT_PRES# 35,37,50,58
PR517
1500P_0402_50V7K Y 2 1 2
FDMC6679AZ_MLP8-5 +3.3V_ALW2
G
A PR518
5
4 PD506 100K_0402_5%
1
SDMK0340L-7-F_SOD323-2 1 D
P
1 2 4 B 2
Y DOCK_DET# 35,37
4
2 1 2 ACAV_IN# G
G
A PQ512
10K_0402_5%
S
3
2
1
3
1
5 PU504 @ PR519 DMN65D8LW-7_SOT323-3
3
3 6 74AHC1G08GW_SOT353-5 0_0402_5%
PR520
2 7
1 8
2
PQ511
Purpose: Turn on the PQ817
1
FDS6679AZ-G_SO8 D
2 +3.3V_ALW2 +3.3V_ALW2 for Slice battery discharge
G +3.3V_ALW2
PC510 without AC exist
PQ525
100K_0402_5%
100K_0402_5%
AO3418_SOT23-3
S
1
0.1U_0402_10V7K
Charger (37.1) 1 2
PR521
PR522
11/15
PD507
Edock controller(41.1), support component(41.2) Dell feature
5
PD508 @
Dell feature: Support dock
2
Peak power SDMK0340L-7-F_SOD323-2 1
P
B SLICE_BAT_ON 37,58
PQ515A PR524 1 2 4
2
Y
3
DMN66D0LDW-7_SOT363-6 240K_0402_5% 2 1 2 D
G
1 6 1 2 A 5 ACAV_IN#
D
S
+3.3V_ALW2 PU505 @ PR523 G
1
@ PR531 +3.3V_ALW 74AHC1G08GW_SOT353-5 0_0402_5% D
0_0402_5% 2 S @ PQ516B
4
1 2 +DOCK_PWR_BAR G DMN66D0LDW-7_SOT363-6
G
PD512 PQ514 S
NTR4502PT1G_SOT23-3
2
3
2
@ PR559 PQ515B SDMK0340L-7-F_SOD323-2 DMN65D8LW-7_SOT323-3
PQ517
0_0402_5%
2
@ PR529 0_0402_5% DMN66D0LDW-7_SOT363-6 1 2

0_0402_5%
@ PR568
DOCK_SMB_ALERT#38,58
6
0_0402_5% 1 23301_DSCHRG_FET_GC 4 3 D
@ PR567
D
S
1
1 2 D 2
+DC_IN_SS SLICE_PERF_EN 38,58
2 G
1
1 2 1 2 +PBATT PQ518 PD509 G

1
57 +CHGR_DC_IN DMG2301U-7_SOT23-3 S S @ PQ516A
1
G
@ PR530 @ PR534 SDMK0340L-7-F_SOD323-2 PR528 DMN66D0LDW-7_SOT363-6

5
S
PR533 0_0402_5% 0_0402_5% 3 1 2 1 100K_0402_5%

47_0805_5% 1 2
1
1 2 CD3301_DCIN @ PR562
0_0402_5%
0_0402_5%
100K_0402_5%
B +DC_IN B
1
PR526 0_0402_5%
PR563
@ PR564
G
DSCHRG_MOSFET_GC
PR527 2
PD514 100K_0402_5% 1 2
1 2 SLICE_BAT_PRES# 35,37,50,58
+3.3V_ALW2
1
PC511 SDMK0340L-7-F_SOD323-2 @
DK_PWRBAR
35,37,50,58
2
0.1U_0603_50V4Z 1 2 +NBDOCK_DC_IN_SS
CHGVR_DCIN
SLICE_BAT_PRES#
2
DC_IN_SS
2
PR525 SLICE_PERF_EN DOCK_DET#
PD510
1
1
10K_0402_5% D @ PR566 +3.3V_ALW2
38,58
38,58
PD513
3
1
S
AC_DIS 1 2 2 0_0402_5% PQ528
G
37,50 G SLICE_BAT_PRES# 1 2 2 DMN65D8LW-7_SOT323-3
50 SOFT_START_GC PQ529
100K_0402_5%
S DOCK_AC_OFF 35
3
1
PU701 DMN65D8LW-7_SOT323-3 PR535
36
35
34
33
32
31
30
29
28
2
CD3301BRHHR_QFN36_6X6 @ PR536 38,58 240K_0402_5%
PR532
35 ACAV_DOCK_SRC#
2
1
0_0402_5% 1 6 1 2
10K_0402_5%
D
NC
CHARGERVR_DCIN
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
DC_IN_SS
PBatt+
+5V_ALW
S
PR538 @ PR541 P50ALW 1 2 PQ519A

PR537
NTR4502PT1G_SOT23-3
1
100K_0402_5% 0_0402_5% DMN66D0LDW-7_SOT363-6 D
NTR4502PT1G_SOT23-3
2
1 2 1 2 1 2 2 PQ527
PQ520
+3.3V_ALW2 ACAVDK_SRC
SLICE_BAT_ON 37,58
CD_PBATT_OFF PR539 G PR540 DMN65D8LW-7_SOT323-3 ACAV_IN#
2
1
D
G
@ PR542 1 27 @ PR543 PD511 100K_0402_5% 240K_0402_5%
PQ526
S
2
3
0_0402_5% 2 DC_IN P50ALW 26 0_0402_5% SDMK0340L-7-F_SOD323-2 4 3 1 2 PR544 2 1 2 1 3
D
S
+3.3V_ALW2
S
SS_GC PBATT_OFF
1
1 2 CD3301_SDC_IN ERC1 3 25 DK_AC_OFF 2 1 100K_0402_5% G D
+SDC_IN ERC1 DK_AC_OFF_EN
4 24 PQ519B 1 2 S 38,57,58 ACAV_IN 2 PQ521
3
5 ACAVDK_SRC ACAV_IN_NB 23 @ PR545 DMN66D0LDW-7_SOT363-6 PR565 +3.3V_ALW2 PC515 DMN65D8LW-7_SOT323-3
G
G
2
6 GND GND 22 0_0402_5% 100K_0402_5% 0.1U_0402_10V7K S
3
SDC_IN DK_AC_OFF_EN
G
7 21 3301_ACAV_IN_NB 1 2 @ PR561 1 2 1 2
ACAV_IN_NB 38,57
5
57 DC_BLOCK_GC 8 DC_BLK_GC SL_BAT_PRES# 20 0_0402_5%

ACAV_IN BLKNG_MOSFET_GC
5
@ PR548 9 19 DK_AC_OFF_EN 1 2 1 2
DOCK_AC_OFF_EC 37 38,58
EN_DK_PWRBAR
0_0402_5% P33ALW2 NBDK_DCINSS 1

SLICE_PERF_EN
P
SLICE_BAT_PRES# 37,58
SS_DCBLK_GC
1 2 ACAVIN SL_BAT_PRES# @ PR546 PR547 4 B

38,57,58 ACAV_IN Y
DK_CSS_GC
0_0402_5% 1M_0402_5% 1 2 DOCK_DET# +DC_IN_SS +PBATT 2

DOCK_DET# 37,58
G
A
PWR_SRC
+3.3V_ALW2 1 2 P33ALW2 @ PR549 1 2

CSS_GC
P33ALW
37 0_0402_5% @ PR560 PU506
3
TP 38,58
ERC3
ERC2
@ PR550 1 2 0_0402_5% 74AHC1G08GW_SOT353-5

GND
SLICE_BAT_PRES# 35,37,50,58
0_0402_5% @ PQ522
@ PR551 NTR4502PT1G_SOT23-3
0_0402_5%
10
11
12
13
14
15
16
17
18
1 2 3 1
+NBDOCK_DC_IN_SS
57 CSS_GC @ PR553 @ PR554 @ PR555 @ PQ523A

G
2
0_0402_5% 240K_0402_5% 47K_0402_5% DMN66D0LDW-7_SOT363-6

57 DK_CSS_GC 1 2 1 2 1 2 6 1
P33ALW
D
+3.3V_ALW
S
@ PR552
A A
0_0402_5%
ERC3 EN_DK_PWRBAR 1 2
EN_DOCK_PWR_BAR 37
@ PR557 @ PQ523B
G
0.047U_0603_25V7M
ERC2 1 2 100K_0402_5% DMN66D0LDW-7_SOT363-6

0.1U_0402_25V6
0.1U_0603_25V7K
1 2 3 4
D
+3.3V_ALW2
1
STSTART_DCBLOCK_GC PR556
PC512
PC513
PC514
@ PR558 1M_0402_5%
0_0402_5%
2
@ 3301_PWRSRC 1 2
+PWR_SRC_AC
G
5
38,58 SLICE_PERF_EN DELL CONFIDENTIAL/PROPRIETARY

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR_Selector
LA-9941P
Date: Tuesday, August 20, 2013 Sheet 59 of 64
5 4 3 2 1
+PWR_SRC @ PJP600
1 2 GPU_B+
1 2
0.1U_0402_25V6
1000P_0402_50V7K
1000P_0402_50V7K
0.1U_0402_25V6
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
JUMP_43X118
10U_0805_25V6K
10U_0805_25V6K
1
1
@ PC602
@ PC603
PC321
PC322
PC323
PC324
PC600
PC601
PC604
PC605
2
2
@ @ @ @
VGA_CORE
TDC 35 A
+3.3V_RUN Peak Current 40.89 A
OCP Current 35 x 1.7 = 59.5 A
Rds(on) typ 2.75m ohm
GPU_B+
1
0_0402_5%
PR601 Fsw 300 kHz when Rton=500 Kohm
PR600
2.2_0603_1%
U2_BOOT1 1 2
@
0.1U_0603_25V7K
2
38 GPIO11_NVVDD_VID
PQ600
PC612
1
1 2
0_0402_5%
38 GPIO13_NVVDD_PSI
PR602
2
PR634
15.4K_0402_1%
@ U2_UGATE1 4
2
+3.3V_RUN
10K_0402_5%
3
2
1
1
PL601 +PNVVDD
PR603
0.22UH_FDUE0640J-H-R2_25A_20%
U2_PHASE1 1 4
2
2 3
30K_0402_1%
1U_0402_6.3V6K
1
4.7_1206_5%
1
PC613
PR604
PR606
47P_0402_50V8J
2
1
PC614
2
2
U2_LGATE1 4 4
2
PR607 PR608 @
680P_0603_50V7K
3K_0402_1% 39K_0402_1%
1
1 2 1 2
PC615
1
2
3
1
2
3
24K_0402_1%
2
1
PQ601
PQ602
1800P_0402_50V7K
1800P_0402_50V7K
GPU_REFADJ
PR610
1
PC616
PC617
1 2
@ @ PR627
0_0402_5%
3K_0402_1%
1 2
PR611
U2_BOOT1
DGPU_CORE_EN 38
U2_UGATE1
GPU_EN
PD601
2
2 1 THERMATRIP3# 38
PR614
510K_0402_1% RT8813AGQW_WQFN24_4X4
GPU_B+
6
1
GPU_B+ 1 2 UGATE1 PU600
BOOT1
VID
PSI
EN
REFADJ
0.01UF_0402_25V7K
U2_BOOT2 1 2 EMC change to non-pop 11/17

@ PR615
1
0_0402_5% GPU_REFIN 7 24 U2_PHASE1 PR635 PR631

PC619
0.1U_0603_25V7K
1 2 REFIN PHASE1 +5V_ALW
38 NVVDD_GND_SENSE 7.87K_0402_1% 2.2_0603_1%
5
GPU_VREF 8 23 U2_LGATE1 1 2
PQ603
PC627
2
1 2 @ VREF LGATE1
GPU_TON 9 22 @ PR617
2
PR616 TON GND/PWM3 2.2_0603_1%
100_0402_5% GPU_FBRTN 10 21 GPU_PVCC 1 2
RGND PVCC U2_UGATE2 4
TALERT/ISEN2
1 2 1 2 1 2 GPU_FB 11 20 U2_LGATE2
38 NVVDD_SENSE
0.1U_0402_10V7K
VSNS LAGTE2
TSNS/ISEN3
VCC/ISNE1
2
@ PR618 @ PR619 @ PC620 GPU_COMP 12 19 U2_PHASE2
PC621
SS PHASE2
UGATE2
PGOOD
0_0402_5% 0_0402_5% 33P_0402_50V8J

BOOT2
3
2
1
1 2 PL602
GND
+PNVVDD
1
1 2 0.22UH_FDUE0640J-H-R2_25A_20%
PR620 PR621 U2_PHASE2 1 4
100_0402_5% 0_0402_5%
Trace : 16 mil
25
13
14
15
16
17
18
2 3
Spacing : 12 mil
1
1 2 1 2 +5V_RUN
4.7_1206_5%
PR632
GPU_TSNS/ISEN3
GPU_TALERT/ISEN2
GPU_VREF
GPU_DSBL/ISEN1
@ PR622 @ PC622 PR630

15.8K_0402_1% 470P_0402_50V7K 2.2_0603_1%
U2_UGATE2
1 2
U2_BOOT2
2
1
U2_LGATE2 4 4
25.5K_0402_1%
1 2
PR623
680P_0603_50V7K
@ PC623
1
47P_0402_50V8J @ PR633
PC628
2
1
2
3
1
2
3
0_0402_5%
1 2 UP1642 RT8813
2
DGPU_PWROK 15
PQ604
PQ605
0.01U_0402_16V7K
pr635 NC POP
866_0402_1%
470K_0402_1%
1
GPU_PGOOD 15
10K_0402_1%_TSM0A103F34D1RZ
+3.3V_RUN
1
1
PR625
PR624
PC624
PH302
pr621 1K ohm 0 ohm

10K_0402_5%
2
@ @
PR626
2
2
2
pc622 4700pF - POP 470pF - NC

2
0.01U_0402_16V7K
1
@ PJP601
PC625
@ PR637 1 2 +GPU_CORE pr636 NC POP

0_0402_5%
2
GPUHOT# 2 1 @ PAD-OPEN 1x3m

15
@ PJP602 pr630 POP NC
1 2
+PNVVDD
PAD-OPEN 1x3m
pr614 91K ohm 510K ohm
@ PJP603
10K_0402_5%
1
1 2
0.01U_0402_16V7K
1
PR628
pr622 POP NC
2.2_0402_1%
PAD-OPEN 1x3m
PR636
PC626
2
2
2
+3.3V_RUN
GPU_PVCC

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR_VGA_ CORE
LA-XXXX
5 4 3 2 1
+GPU_CORE
+GPU_CORE (place under GPU)
D D
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
1
1
PC660
PC661
PC662
PC663
PC664
PC665
PC666
PC667
PC668
PC669
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
PC670
PC671
PC672
PC673
2
2
+GPU_CORE (place near GPU)
C +PNVVDD C
47U_0805_6.3V6M
22U_0805_6.3VAM
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
330U_X_2VM_R6M
330U_X_2VM_R6M
1 1
1
PC674
PC675
PC676
PC677
PC678
PC679
PC680
+ +
PC683
PC684
2
2
2 2
B B
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR_GPU_ DECOUPLING
LA-8821P
5 4 3 2 1
5 4 3 2 1
@ PJP700
PAD-OPEN 1x2m~D
+VDDRP_B+ 2 1
+PWR_SRC
2200P_0402_50V7K
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
D D
1
PC700
PC701
@ PC702
PC703
5
@ PR709
0_0402_5%
2
DGPU_PW ROK 1 2
PQ700
4
PR701 PC704
1.5V_PW RGD 2.2_0603_5% 0.1U_0603_25V7K
PU700 1 2 1 2
RT8237EZQW (2)_W DFN10_3X3 Change PC707 from SGA00000Y0L to SGA00000Y80
3
2
1
PR702 1 10 BST_+VDDRP 12/13
40.2K_0402_1% PGOOD BOOT
1 2 TRIP_+VDDRP 2 9 UG_+VDDRP PL700
CS UGATE 1UH_FDSD0630-H-1R0M-P3_11A_20%
EN_+VDDRP 3
EN PHASE
8 SW _++VDDRP 1 2 +VDDRP
@ PR704
5
0_0402_5% FB_+VDDRP 4 7
680P_0603_50V7K
37,40,53,9 FB VCC
1 2
PQ701
GPU_PGOOD
1
SI7716ADN-T1-GE3_POWERPAK8-5
RF_+VDDRP 5 6 LG_+VDDRP
PC705
330U_2.5V_M
RF LGATE 1
S0 mode be high level
PC709
11 +
2
@ PR703 TP 4
0_0402_5%
1 2 @ PR711 2
1U_0402_6.3V6K
38,40,53 A_ON
0_0402_5%
1
1
1 2
PC706
470K_0402_1%
4.7_1206_5%
3
2
1
+5V_ALW
PR705
PR706
C C
0.1U_0402_10V7K
@ PR710
2
1
0_0402_5%
@ PC708
1 2
2
2
+5V_RUN
2
PR707
9.31K_0402_1%
1 2
10K_0402_1%
1
@ PJP701
1 2
PR708
PAD-OPEN 1x2m~D
2
@ PJP702
+VDDRP 1 2 +1.5V_GPU
PAD-OPEN 1x2m~D
SSI: 1.5V
B
After PT change to 1.35V B
+VDDRP(1.35V)
TDC 2.94A
Peak Current 4.2A
OCP current 5A
Rds(on):13.5m ohm typ
Fsw 290 kHz when Rrf=470 Kohm
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR_+1.5VDDR
LA-9391P
5 4 3 2 1
5 4 3 2 1
VAW30 Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Issue Description Solution Description Rev.
Owner
1 58 Adapter Protection Circuit 2013/1/30 Power PC432 220pF is not popular part Change to 0402 size X00
D D
2 59 P59-PWR_Selector 2013/2/4 Power Battery voltage leakage to docking if only battery Add: PD513, PQ526, PR565, PR540, PQ527, PU506, PC515 X00
3 56 Vcore fine tune 2013/2/7 Power Vcore fine tune Modify: PR306, PR301, PR333, PR328, PR325, PR322, PL300 X00
4 57 Vcorecapacitor reduce 2013/2/7 Power Vcore output capacitor reduce NC: PC371 ,PC386, PC370 ,PC382,PC383 X00
5 58 Charger 2013/2/18 Power Reserve H_PROCHOT# delay time fine tune by soft ware Add "MODULE_BATT_PRES#" and PR454(Cancel 3/19) X00
6 59 P59-PWR_Selector 2013/2/26 Power Adjust divider resistor for MOSFET Change from 240K to 100K: PR503, PR528, PR544, PR565 X00
7 59 P59-PWR_Selector 2013/2/26 Power Adjust divider resistor for MOSFET Change from 47K to 240K: PR501, PR524, PR535, PR540 X00
8 59 P59-PWR_Selector 2013/2/26 Power SUT will unexpected shut down if un-docking during S0/S3 Add: PQ528, PR566 X00
9 51 "PBAT_PRES#" ESD fail 2013/3/4 Power ESD PD1 fail, even connect 3.3V to VBUS pin Change PD1 to PD1, PD2(TVNST52302AB0) X00
10 59 P59-PWR_Selector 2013/3/6 Power SB903380020 FDN338P derating fail PQ500, PQ517,PQ520,PQ522,PQ526 change to SB000007900, PQ1change to SB00000PJ00
X00
11 51 PC5 down size 2013/3/12 Power PC5 down size Change PC5 from 0805 to 0603 size X00
12 51,59 AC_DIS# net change 2013/3/12 Power AC_DIS# should high enable, not low enable AC_DIS# change to AC_DIS X00
C C
13 EMC open issue 2013/3/18 Power Add parts for EMI PR606,PC615, PR632, PC628, PR706, PC705, PR324, PC307 X00
14 60, 62 PU600, PU601 VCC 2013/3/19 Power DIS S3 power consumption voer 200mW Add PR630 PR711, PR710 for reserve +5V_RUN X00
15 61 Change DGPU output cap 2013/3/19 Power For thermal issue change DGPU power output cap.-14" Change PC683,PC684 X00
16 62 GPU DDR change to 1.35V 2013/3/19 Power Change VDDR output voltage from 1.5V to 1.35V Change PR707 from 11.5K to 9.1K X00
17 54 +1.05V dynamic load test 2013/3/19 Power +1.05V dynamic load over spec Change PL150 from 1uH to 0.68uH X00
18 58 Change output chock 2013/3/20 Power Same as 14" for height limit Charger output choke change to 2.2uH X00
19 60 0 ohm resistor 2013/3/21 Power 0 ohm 1% vender is not correct in ISPD Change PR621 0ohm from 1% to 5% X00
20 54 1.05V dynamic over spec 2013/3/21 Power 1.05V dynamic over spec Change PL150 from 1uH to 0.68uH X00
21 59 Modify for Peak power 2013/3/21 Power Modify schematic PQ529, PQ518, PR527 and PR567 X00
22 NA Reserve Reserve Power Reserve Reserve X01
B 23 60 DGPU core output ripple 2013/5/10 Power Output ripple with a low frequence ripple +PWR_SRC do not include feedback via X01 B
24 60 DGPU core output ripple 2013/5/10 Power Output ripple with a low frequence ripple +PWR_SRC do not include feedback via X01
25 59 14" 組組組組 2013/5/10 Power PD512 太太太太 Move location X01
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, EE PIR(1)
LA-XXXX
5 4 3 2 1
5 4 3 2 1
VAW30 Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Issue Description Solution Description Rev.
Owner
1 56 14" Vcore find tune 2013/5/29 Power 14" Vcore find tune for LL and DIMON PR328=2.4K->2.1K; PR333=30K->49.9K; PR301=390K->348K X02
D D
2 NA Reserve Reserve Power Reserve Reserve X02
Populate bead 120 ohm on PJP100 and PL301, populate 0.1uF on pc302 and
3 58 EMI solution 2013/5/31 EMI EMI: 200~225MHz boardband pc700, 2200pF on pc701. X02
4 58 EMI solution 2013/5/31 EMI EMI: 200~225MHz boardband PC419 add parallel PC441:2200pF and PC440: 0.1uF X02
Change to X6S/X7R: PC600, PC601, PC604, PC605, PC674, PC302,
5 62 Thermal de-ratgin issue 2013/6/10 Power MLCC are exceeded thermal derating criteria PC304,PC311,PC312,PC313,PC314 X02
6 59 Change part number 2013/6/6 Power Part number ~N0 is for other customer PC505 SE043474KN0 change to SE043474K80 X02
7 NA 14" NPI report(4/19) 2013/6/6 Power Co-lay need select 1 conponent Del NC: PJP300, PL600, PJP1, PC66, PC707, PJP51,PJP400 X02
8 Selector 2013/5/30 Power For 3V/5V volgate level, change VDS rating from 30V to 20V PQ1, PQ518 change to 20V rating DMG2301U-7_SOT23-3 X02
9 62 14" DGPU DDR 2013/6/7 Power Output capacitor PC709 not in PSL Change to NCC: SF000003100 X02
XB
1 Thermal de-ratgin issue 2013/7/10 Power According QAD test result change MLCC back to X5R PC674, PC302, PC304,PC311,PC312,PC313,PC314 X03
C C
2 Change 0 ohm to short pad 2013/7/10 Power Reduce part count Except: PR321 and PR621 X03
3 Thermal de-ratgin issue 2013/7/10 Power MLCC are exceeded thermal derating criteria VAW30 change to X6S/X7R: PC302, PC304, PC311, PC312, PC313, PC314 X03
B B
A A

LA-XXXX
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
1 34 USB3.0 Re-driver 13'0814 EE Pull-up and Pull-down resister R2628, R2638, R2639, R2644 1.0
D 2 41 POWER BOTTON 13'0814 EE Un-pop power botton. SW5 and SW6 1.0 D
3 38 Board ID 13'0814 EE Change board ID to REV. A00. Change R392 to 8.2K ohm. 1.0
4 41 LED bright 13'0814 ME change LED resister to 300 ohm R438, R436, R435, R433 and R429 1.0
5 38 AUDIO test fail 13'0814 EE Audio resistor change from 9.1 ohm to 18 ohm R162 and R166 1.0
6 42~46 GPU chip PN 13'0814 EE Update P/N of GPU chip Change P/N of UV1 to SA00006CB1L. 1.0
7 28 LAN chip P/N 13'0814 EE Type change to T & R Change P/N of U21 to SA000066W4L. 1.0
8 1 change R3 PN of PCB 13'0815 EE change R3 PN of PCB Change from DA8000WJ000 to DA8000WJ011 1.0
9 16 BT issue 13'0822 EE Un-pop 0.47uF between “+PCH_VCCDSW3_3” and “+PCH_VCCDSW” C413 1.0
10 36 EMI Request 13'0822 EMI Add D2 on “Sleeve” & “Ring2” and connect to DGND 1.0
C C
B B
A A

LA-9832P
Date: Friday, August 30, 2013 Sheet 65 of 64
5 4 3 2 1
www.s-manuals.com

Compal La-9832p r1.0 Schematics

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Compal La-9832p r1.0 Schematics

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A B C D E

PCB NO : LA-9832P (DA8000XL000)

1@ : M/B SPI ROM

Memory BUS DDRIII-DIMM X2

USB2.0 HUB port 2 USB2.0 HUB port 3

USB PORT# DESTINATION

+3.3V_RUN +5V_RUN +1.05V_RUN

INTVRMEN - INTEGRATED SUS 1.05V VRM FLASH DESCRIPTOR SECURITY OVERRIDE

9 PCH_JTAG_TDI PCH_JTAG_TDI AD61 L11 0_0402_5% RC14 10K_0402_5%~D RC12

9 PCH_JTAG_TDO PCH_JTAG_TDO AE61 K10

PCH_JTAG_JTAGX AE63 RSVD

reference 479493 figure 7-1 SATA_COMP 1 2

HDA for Codec

LPC_LAD0 AU14 AN2 PCH_SMB_ALERT#

reference PDG0.7 200 MIL SO8 0.1U_0402_25V6K~D

10/100/1G LAN ---> RC49 2 @ 1 0_0402_5% PCIE_LAN A41 C26 CLK_BIASREF

MINI2CLK_REQ# N1 22_0402_5%~D 1 EMI@ 2 RC66

PEG_A_CLKRQ# RC162 2 DIS@ 1 0_0402_5%~D 6 OF 19 Rev1p2

PCI_CLK_LPC_0 2 1 @ 2 @ 1 3.01K_0402_1%~D RC45

PCI_CLK_LPC1 2PCI_TPM_TCM RC58 1 EMI@ 2 22_0402_5%~D MCP_TESTLOW1 1 2

12P_0402_50V8J~D CC14 1 @ 2 PCI_5048 10K_0402_5%~D RC47

PCI_TPM_TCM 2 1 @ @ 7PCI_FBIN 1 @ 2 1 2 CC23 0_0402_5% R63 MCP_TESTLOW4 1 2

DDR interleave routing DDR interleave routing

+1.35V_MEM +1.35V_MEM +1.35V_MEM

+SM_VREF_CA_DIMM +SM_VREF_CA +SM_VREF_DQ1_DIMM2 +SM_VREF_DQ1 +SM_VREF_DQ0_DIMM1 +SM_VREF_DQ0

RC68 1 2 RC126 1 2 RC173 1 2

0.022U_0402_16V7K~D 0.022U_0402_16V7K~D 0.022U_0402_16V7K~D

change 22nF change 22nF change 22nF

24.9_0402_1%~D 24.9_0402_1%~D 24.9_0402_1%~D

+3.3V_RUN DSWODVREN - ON DIE DSW VR ENABLE

PU/PD for JTAG signals

reference CRB UC1B CC48

37 CPU_DETECT# H_CATERR# K61 PROC_DETECT XDP_DBRESET# RC116 2 1 1K_0402_1%~D

Intel check list has updated correctly

reference PDG 0.9

PEG_GTX_C_HRX_N0_M R101 1 UMA@ 2 0_0402_5%~D PEG_GTX_C_HRX_N0_R

PEG_GTX_C_HRX_N0 R106 1 DIS@ 2 0_0402_5%~D PEG_GTX_C_HRX_N0_R F10 AN8 USBP0-

PCH_AUDIO_EN P1 D60 H_THERMTRIP#_R 0_0402_5% 2 @ 1 RC172

PCH_GPIO66 BBS_BIT DGPU_HOLD_RST# 7 2

LOW pop RC288 LOW(DEFAULT) SPI LOW(DEFAULT) LOW(DEFAULT)

CFG STRAPS for CPU

Display Port Presence Strap

DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3

Package Daisy Chain:

VIDSCLK N63 F40

VIDSOUT L63 F44

H_VCCST_PWRGD RC2451 @ 2 0_0402_5% VCCST_PWRGD B59 HSW ULT POWER F48

check D63 VCC G25

B U59 RSVD VCC G53 B

CAD Note: RC250 SHOULD BE PLACED CLOSE TO CPU PAD-OPEN1x1m 1 1

+PCH_VCCDSW3_3 AH10 114mA 109mA AD8

K18 SUS OSCILLATOR AB8 0_0402_5% RC261

+1.5V_THERMAL use 20mil trace close to UC1

+DIMM1_VREF_DQ JDIMM1 H=8mm

DDR_A_BS0 109 110 DDR_A_RAS#

@ @ 1 DDR_A_WE# 113 114 DDR_CS0_DIMMA#

+ 117 118 BSS138-G_SOT23-3

DDR_A_DQS6 171 172 4 0.675V_DDR_VTT_ON

JDIMM2 H=4mm 2-3A to 1 DIMMs/channel

M_CLK_DDR#2 103 104 M_CLK_DDR#3

@ @ 1 DDR_B_MA10 107 108 DDR_B_BS1

179 180 DDR_B_D56

DDR_B_D62 183 184

+3.3V_DVCC +3.3V_DVCC U87