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Utkarsh Verma

Mobile: +91 – 94526 74383 | E-mail: utkar.sh@outlook.com

Academic Details
Institute Course Year Percentage/CGPA
Delhi Technological University Bachelor of Technology 2014 – 2018 82%(As of 3rd Sem.)
The Mother’s International School Class 12 CBSE 2012 – 2014 95%
The Mother’s International School Class 10 CBSE 2006 – 2012 CGPA 9.8
Scholastic Achievements
• National Talent Search Examination (NTSE) Scholarship, conducted by NCERT, New Delhi, 2010
• Junior Science Talent Search Examination (JSTSE) Scholarship, conducted by Directorate of Education, Govt. of
N.C.T. Delhi, 2011. Ranked 26th out of 2500 participants
• The Fluor Foundation Scholarship, by the Fluor Foundation, for excellence in Academics and ExtraCurriculars,
• Secured ranks in National and International Olympiads of Science, Computer Science and English from Class 5 to

Co-Curricular and Extra-Curricular Achievements

• 1st position in Talent Fiesta, conducted by The Mother’s International School, New Delhi, 2011, 2012
• 1st position in Cerebrations-Inter School Quiz, organized by Air Force Bal Bharti School, Delhi, 2012
• 1st position in Summation MMXI, conducted by Sigma Math Association, New Delhi, 2012
• Senior Diploma in Indian Instrumental Music, with Distinction in Practicals, Prayag Sangeet Samiti, Allahabad,
• Runner up in ‘Brainwave-Predefined Hardware’ in IEEE DTU’s annual Technical Fest, Troika 2015

Positions of Responsibility
1. Columnist and Journalist, DTU Times
a. Responsible for the complete coverage co-ordination for the Cultural and Technical Fests in the college.
b. Responsible for filling in evaluation proformas for the University for various accreditors and evaluation agencies.
c. Responsible for coverage of all University wide events.
d. Writing and publishing Articles, Reports and Blog posts for DTU Times, DTU Pulse and DTU Times blog.
e. Chief Coordinator, Faculty News. Sending out notices and emails to faculty members intimating them about an
upcoming issue, coordinating the team and the responses to the mails, final editing for print.
2. Student Member, IEEE DTU Student Branch
a. Responsible for conceptualizing, organizing and managing ‘Plethora – the Hardware Hackathon’, DTU’s first
successful event of such sorts, in Troika 2016, IEEE DTU’s Annual Technical Fest.
b. Organized the ‘Brainwave – Acumen’ event in in Troika 2016, IEEE DTU’s Annual Technical Fest.
c. Co-ordinator, Embedded Systems. Conducting and teaching in SIGs, conceptualizing and leading the execution
of Embedded Systems Projects.
d. Coordinator, Publications Team, responsible for Report writing and drafting of all print and text material.
3. Co-Ordinator of the school’s Community Service Program,” Reaching Out”, organized by The Mother’s
International School.
a. Co-Ordinated the time scheduling of all volunteers.
b. Contacted various departments of Sri Aurobindo Ashram for Shramdaan duties as per students’ choice.
4. Co-Ordinator, Environment Club, The Mother’s International School.
a. Organized talks, visits and interactions with various NGOs and Activists.
b. Co-ordinated the school’s audits including Green Coverage, Water and Waste Management.
c. Set up the segregated waste-bin system for bio-degradable and non-bio-degradable waste in the school

Projects and Internships

1. Buzzer System using only 555 Timer ICs
The Mother’s International School Dec 2013
The entire system was made to support 6 teams. The first team the presses the button activates their LED and
sounds a beep. No subsequent presses will be registered until it is reset. The system had no micro controller

2. DTMF Based Home Automation System June-July 2015

A cellular phone set to auto answer was connected to a charger and the device. Anybody could call the
number, then enter a series of numbers on their keypad, triggering some action in the house’s switchboard,
eg. turning the A.C. Unit on.

3. SPICE Simulations supported study of the ideal and non-ideal characteristics of Bipolar Junction Transistor based
Single and Multistage Amplifiers and Current Mirrors
Semester Project under Dr. Rajeshwari Pandey Oct-Dec, 2015
BJT based amplifier and mirror circuits were simulated for temporal, transient and frequency spectrum
response analysis. Non ideal characteristics were considered.

4. A Schematic-Layout Verification tool for Spiral Inductors on-Chip for implementation on Radio Frequency
Integrated Circuits
Research Project under Dr. Shouribrata Chatterjee, I.I.T. Delhi Dec 2015 – till date.
To develop a program that will give out the equivalent model of an entered Spiral Inductor on Silicon Substrate.
Outputs Inductance, losses in the form of impedances, and maximum operable frequency.

5. Operational Amplifier based New Topologies for Low Frequency Oscillators

Research Project under Dr. Rajeshwari Pandey Feb 2016 – till date. To develop
a new topology for Low Frequency (<50Hz) Oscillators based on Operational Amplifiers and other active
amplifiers like OTAs and OTRAs.

Relevant Courses Taken

Analog and Digital Electronics, Probability and Stochastic Processes, Signals & Systems, Network Analysis & Synthesis,
Programming Fundaments, Analog Integrated Circuits*, Digital System Design*, Computer Architecture*,
Electromagnetic Theory*, Communication Systems*
*will be completed during Spring Semester, 2016

Technical Skills
Programming: C, C++, Embedded C, VHDL
Operating Systems: Windows, Ubuntu
Other Software: OrCAD Capture, OrCAD PSpice, N.I. Multisim, MATLAB, Atmel Studio, Xilinx ISE