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Construction and operation– NPN and PNP transistors– CB, CE and CC configurations– transistor
characteristics and regions of operation–Specification sheet–Biasing of BJTs– operating point–
stabilization of operating point–different biasing circuits and DC load line characteristics –Bias
compensation techniques–thermal stability and thermal runaway.

1. With diagram explain construction and operation of NPN transistor. [Nov/Dec 2015]

 A bipolar (junction) transistor (BJT) is a three-terminal electronic device constructed of

doped semiconductor material and may be used in amplifying or switching applications.
 Bipolar transistors are so named because their operation involves both electrons and holes.

 Charge flow in a BJT is due to bidirectional diffusion of charge carriers across a junction
between two regions of different charge concentrations.
 This mode of operation is contrasted with unipolar transistors, such as field-effect transistors,
in which only one carrier type is involved in charge flow due to drift.
 By design, most of the BJT collector current is due to the flow of charges injected from a
high-concentration emitter into the base where they are minority carriers that diffuse towards
the collector and so BJTs are classified as minority-carrier devices.

 An NPN transistor can be considered as two diodes with a shared anode. In typical operation,
the base-emitter junction is forward biased and the base–collector junction is reverse biased.
 In an NPN transistor, for example, when a positive voltage is applied to the base–emitter
junction, the equilibrium between thermally generated carriers and the repelling electric field
of the depletion region becomes unbalanced, allowing thermally excited electrons to inject
into the base region.
 These electrons wander (or "diffuse") through the base from the region of high concentration
near the emitter towards the region of low concentration near the collector.
 The electrons in the base are called minority carriers because the base is doped p-type which
would make holes the majority carrier in the base.
 To minimize the percentage of carriers that recombine before reaching the collector–base
junction, the transistor's base region must be thin enough that carriers can diffuse across it in
much less time than the semiconductor's minority carrier lifetime.
 In particular, the thickness of the base must be much less than the diffusion length of the
 The collector–base junction is reverse-biased, and so little electron injection occurs from the
collector to the base, but electrons that diffuse through the base towards the collector are
swept into the collector by the electric field in the depletion region of the collector–base
 The thin shared base and asymmetric collector–emitter doping is what differentiates a bipolar
transistor from two separate and oppositely biased diodes connected in series.
2. Explain the input and output of a transistor in CB configuration. Discuss the parameters and
various regions involved in it.[Nov/Dec 2014]

Input Characteristic:

 The curve between IB and VBE for different values of VCE is shown in figure. Since the base
emitter junction of a transistor is a diode, therefore the characteristic is similar to diode one.
 With higher values of VCE collector gathers slightly more electrons and therefore base current
reduces. Normally this effect is neglected. (Early effect).
 When collector is shorted with emitter then the input characteristic is the characteristic of a
forward biased diode when VBE is zero and IB is also zero.

Output Characteristic:

 The output characteristic is the curve between VCE and IC for various values of IB.
 For fixed value of IB and is shown in figure.
 For fixed value of IB, IC is not varying much dependent on VCE but slopes are greater than CE
characteristic. The output characteristics can again be divided into three parts.

(1) Active Region:
 In this region collector junction is reverse biased and emitter junction is forward biased. It is
the area to the right of VCE = 0.5 V and above IB= 0. In this region transistor current responds
most sensitively to IB. If transistor is to be used as an amplifier, it must operate in this region.

 If αdc is truly constant then IC would be independent of VCE.

 But because of early effect, αdc increases by 0.1% (0.001) e.g. from 0.995 to 0.996 as
VCE increases from a few volts to 10V. Then βdc increases from 0.995 / (1-0.995) = 200 to
0.996 / (1-0.996) = 250 or about 25%.
 This shows that small change in a reflects large change in b. Therefore the curves are
subjected to large variations for the same type of transistors.
(2) Cut Off:
 Cut off in a transistor is given by IB = 0, IC= ICO. A transistor is not at cut off if the base
current is simply reduced to zero (open circuited) under this condition,
IC = IE= ICO / ( 1-αdc) = ICEO
 The actual collector current with base open is designated as ICEO. Since even in the
neighborhood of cut off, a dc may be as large as 0.9 for Ge, then IC=10 ICO(approximately), at
zero base current.
 Accordingly in order to cut off transistor it is not enough to reduce IB to zero, but it is
necessary to reverse bias the emitter junction slightly. It is found that reverse voltage of 0.1 V
is sufficient for cut off a transistor. In Si, the α dc is very nearly equal to zero, therefore, IC =
 Hence even with IB= 0, IC= IE= ICO so that transistor is very close to cut off. In summary, cut
off means IE = 0, IC = ICO, IB = -IC = -ICO , and VBE is a reverse voltage whose magnitude is of
the order of 0.1 V for Ge and 0 V for Si.

(3)Saturation Region:
 In this region both the diodes are forward biased by at least cut in voltage. Since the voltage
VBE and VBC across a forward is approximately 0.7 V therefore, VCE = VCB+ VBE = - VBC +
VBE is also few tenths of volts.
 Hence saturation region is very close to zero voltage axis, where all the current rapidly
reduces to zero.
 In this region the transistor collector current is approximately given by VCC / R C and
independent of base current.
 Normal transistor action is last and it acts like a small ohmic resistance.

3. Explain the input and output of a transistor in CB configuration. Discuss the parameters and
various regions involved in it.
If the base is common to the input and output circuits, it is known as common base configuration as
shown in figure.

 For a pnp transistor the largest current components are due to holes.
 Holes flow from emitter to collector and few holes flow down towards ground out of the base
terminal. The current directions are shown (IE = IC + IB ).
 For a forward biased junction, VEB is positive and for a reverse biased junction VCB is negative.
The complete transistor can be described by the following two relations, which give the input
voltage VEB and output current IC in terms of the output voltage (VCB) and input current IE.
The Input Characteristic:
 In the active region the input diode is forward biased, therefore, input characteristic is simply
the forward biased characteristic of the emitter to base diode for various collector
voltages Below cut in voltage (0.7 or 0.3) the emitter current is very small.
 The curve with the collector open represents the forward biased emitter diode. Because of the
early effect the emitter current increases for same VEB. (The diode becomes better diode).
 When the collector is shorted to the base, the emitter current increases for a given VEBsince
the collector now removes minority carriers from the base, and hence base can attract more
holes from the emitter. This mean that the curve VCB= 0, is shifted from the character when
VCB = open.

The output characteristic:
 The collector current IC is completely determined by the input current IE and the VCB voltage.
 It is a plot of IC versus VCB, with emitter current IE as parameter.
 The curves are known as the output or collector or static characteristics.
 The transistor consists of two diodes placed in series back to back (with two cathodes connected
together). The complete characteristic can be divided in three regions.

(1). Active region:

 In this region the collector diode is reverse biased and the emitter diode is forward biased.
 Consider first that the emitter current is zero. Then the collector current is small and equals the
reverse saturation current ICO of the collector junction considered as a diode.
 If the forward current IB is increased, then a fraction of IE ie. αdcIE will reach the collector.
 In the active region, the collector current is essentially independent of collector voltage and
depends only upon the emitter current.
 Because adc is, less than one but almost equal to unity, the magnitude of the collector current is
slightly less that of emitter current.
 The collector current is almost constant and works as a current source.
 The collector current slightly increases with voltage. This is due to early effect.
 At higher voltage collector gathers in a few more electrons.

 This reduces the base current. The difference is so small, that it is usually neglected. If the
collector voltage is increased, then space charge width increases; this decreased the effective
base width.
 Then there is less chance for recombination within the base region.
(2). Saturation region:
 The region to the left of the ordinate VCB = 0, and above the IE = 0, characteristic in which both
emitter and collector junction are forward biased, is called saturation region.
 When collector diode is forward biased, there is large change in collector current with small
changes in collector voltage.
 A forward bias means, that p is made positive with respect to n, there is a flow of holes from p
to n. This changes the collector current direction.
 If diode is sufficiently forward biased the current changes rapidly. It does not depend upon
emitter current.
(3). Cut off region:
 The region below IE = 0 and to the right of VCB for which emitter and collector junctions are
both reversed biased is referred to cutoff region.
 The characteristics IE = 0, is similar to other characteristics but not coincident with horizontal
 The collector current is same as ICO. ICBO is frequently used for ICO. It means collector to base
current with emitter open. This is also temperature dependent.

4. Explain the input and output of a transistor in CC configuration. Discuss the parameters and
various regions involved in it.

 The common emitter configuration has a current gain approximately equal to the β value of
the transistor itself. In the common collector configuration the load resistance is situated in
series with the emitter so its current is equal to that of the emitter current.
 As the emitter current is the combination of the collector AND the base current combined, the
load resistance in this type of transistor configuration also has both the collector current and
the input current of the base flowing through it. Then the current gain of the circuit is given
Input characteristics:

i. The input current IB is plotted on the Y axis and the input voltage VBC is plotted on the X axis for a
constant output voltage VEC.

ii. The base emitter junction is not forward biased upto VBC=1.5volt. Therefore the base current is
zero upto VBC=1.5 volt at constant VCE of 1volt.

iii. Then it increases rapidly as VBC is inceased beyond 1.5volt. This is because BE junction is more
and more forward biased.

Output Characteristics:

i. It is a graph of output current IE vs output voltage VEC at constant value of input current IB.

ii. Biasing of the 2 junctions of a transistor is done as follows.

Region of operation Base emitter junction Collector base junction

1. Cutoff region Reverse biased Reverse biased

2. Active region Forward biased Reverse biased

3. Saturation region Forward biased Forward biased

iii. The region below the curve for IB = 0 is called cutoff region. In the active region, at a fixed value
of VEC if IB is increased, it will cause IE to increase substantially. In the saturation region, emitter
current increases rapidly with increase in VEC.

The Common Collector Current Gain

5. Explain in detail any two biasing methods for a transistor circuit with neat diagram and obtain
respective stability factors. [Nov/Dec 2014]
Fixed bias circuit
 In this method, a high resistance RB (several hundred kΩ) is connected between the base and
+ve end of supply for npn transistor (See Fig.) and between base and negative end of supply
for pnp transistor. Here, the required zero signal base current is provided by VCC and it flows
through RB
 It is because now base is positive w.r.t. emitter i.e. base-emitter junction is forward biased.
The required value of zero signal base current IB (and hence IC = βIB) can be made to flow by
selecting the proper value of base resistor RB.
Circuit analysis. It is required to find the value of RB so that required collector current flows in the
zero signal conditions. Let IC be the required zero signal collector current

Considering the closed circuit ABENA and applying

Kirchhoff 's voltage law, we get,

 As VCC and IB are known and VBE can be seen from the transistor manual, therefore, value of
RB can be readily found from exp. (i).
 Since VBE is generally quite small as compared to VCC, the former can be neglected with little
error. It then follows from exp. (i) that :

 It may be noted that VCC is a fixed known quantity and IB is chosen at some suitable value.
Hence, RB can always be found directly, and for this reason, this method is sometimes called
fixed-bias method.

 In fixed-bias method of biasing, IB is independent of IC so that dIB/dIC = 0. Putting the value

of dIB / dIC = 0 in the above expression, we have,
Stability factor, S = β + 1
 Thus the stability factor in a fixed bias is (β + 1). This means that IC changes (β + 1) times as
much as any change in ICO.
 For instance, if β = 100, then S = 101 which means that IC increases 101 times faster than ICO.
Due to the large value of S in a fixed bias, it has poor thermal stability.
(i) This biasing circuit is very simple as only one resistance RB is required.
(ii) Biasing conditions can easily be set and the calculations are simple.
(iii) There is no loading of the source by the biasing circuit since no resistor is employed across base-
emitter junction.
(i) This method provides poor stabilization. It is because there is no means to stop a self increase in
collector current due to temperature rise and individual variations. For example, if β increases due to
transistor replacement, then IC also increases by the same factor as IB is constant.
(ii) The stability factor is very high. Therefore, there are strong chances of thermal runaway.
Due to these disadvantages, this method of biasing is rarely employed.

Biasing with collector feedback resistor.

 In this method, one end of RB is connected to the base and the other end to the collector as
shown in Fig..
 Here, the required zero signal base current is determined not by VCC but by the collector
base voltage VCB. It is clear that VCB forward biases the base-emitter junction and hence
base current IB flows through RB. This causes the zero signal collector current to flow in the

Circuit analysis.
 The required value of RB needed to give the zero signal current IC can be determined
as follows. Referring to Fig.

 It can be shown mathematically that stability factor S for this method of biasing is less than
(β+ 1) i.e.
 Stability factor, S < (β+ 1)
 Therefore, this method provides better thermal stability than the fixed bias.
Note. It can be easily proved that Q-point values (IC and VCE) for the circuit are given by ;

(i) It is a simple method as it requires only one resistance RB.
(ii) This circuit provides some stabilisation of the operating point as discussed below :
Suppose the temperature increases. This will increase collector leakage current and hence the
total collector current. But as soon as collector current increases, VCE decreases due to greater drop
across RC. The result is that VCB decreases i.e. lesser voltage is available across RB. Hence the base
current IB decreases. The smaller IB tends to decrease the collector current to original value.
(i) The circuit does not provide good stabilization because stability factor is fairly high, though
it is lesser than that of fixed bias. Therefore, the operating point does change, although to lesser
extent, due to temperature variations and other effects.
(ii) This circuit provides a negative feedback which reduces the gain of the amplifier as explained
hereafter. During the positive half-cycle of the signal, the collector current increases. The
increased collector current would result in greater voltage drop across RC. This will reduce the base
current and hence collector current.
Voltage Divider Bias Method

This is the most widely used method of providing biasing and stabilization to a transistor. In this
method, two resistances R1 and R2 are connected across the supply voltage VCC (See Fig. 9.24) and
provide biasing. The emitter resistance RE provides stabilization. The name „„voltage divider‟‟ comes
from the voltage divider formed by R1 and R2. The voltage drop across R2 forward biases the base-


emitter junction. This causes the base current and hence collector current flow in the zero signals
Circuit analysis. Suppose that the current flowing through resistance R1 is I1. As base current IB is very
small, therefore, it can be assumed with reasonable accuracy that current flowing through R2 is also I1.
(i) Collector current IC:

∴ Voltage across resistance R2 is

Applying Kirchhoff 's voltage law to the base circuit of Fig. 9.24,
V2 = VBE + VE
or V2 = VBE + IE RE

Since IE ≈IC

It is clear from exp. (i) above that IC does not at all depend upon β. Though IC depends upon VBE but
in practice V2 >> VBE so that IC is practically independent of VBE. Thus IC in this circuit is almost
independent of transistor parameters and hence good stabilization is ensured. It is due to this reason
that potential divider bias has become universal method for providing transistor biasing.

(ii) Collector-emitter voltage VCE. Applying Kirchhoff 's voltage law to the collector side,



Stabilisation. In this circuit, excellent stabilisation is provided by RE. Consideration of eq. (i)
reveals this fact.
V2 = VBE + IC RE
Suppose the collector current IC increases due to rise in temperature. This will cause the
voltage drop across emitter resistance RE to increase. As voltage drop across R2 (i.e. V2) is
*independent of IC, therefore, VBE decreases. This in turn causes IB to decrease. The reduced value
of IB tends to restore IC to the original value.

Stability factor. It can be shown mathematically (See Art. 9.13) that stability factor of the circuit is
given by:

If the ratio R0/RE is very small, then R0/RE can be neglected as compared to 1 and the stability
factor becomes :

Stability factor =

This is the smallest possible value of S and leads to the maximum possible thermal stability. Due to
design considerations, R0 / RE has a value that cannot be neglected as compared to 1. In actual
practice, the circuit may have stability factor around 10.

6. Explain about the Transistor DC Load Line.

In the transistor circuit analysis, it is generally required to determine the collector current for various
collector-emitter voltages. One of the methods can be used to plot the output characteristics and
determine the collector current at any desired collector-emitter voltage. However, a more convenient
method, known as load line method can be used to solve such problems. As explained later in this
section, this method is quite easy and is frequently used in the analysis of transistor applications. d.c.
load line. Consider a common emitter npn transistor circuit shown in Fig. 8.35 (i) where no signal is
applied. Therefore, d.c. conditions prevail in the circuit. The output characteristics of this circuit are
shown in Fig.
The value of collector-emitter voltage VCE at any time is given by;

As VCC and RC are fixed values, therefore, it is a first degree equation and can be represented by a
straight line on the output characteristics. This is known as d.c. load line and determines the locus of

VCE − IC points for any given value of RC. To add load line, we need two end points of the straight line.
These two points can be located as under :
(i) When the collector current IC = 0, then collector-emitter voltage is maximum and is equal to VCC
i.e. Max. VCE = VCC- ICRC
= VCC (Since IC = 0)
This gives the first point B (OB = VCC) on the collector-emitter voltage axis as shown in Fig. (ii).
(ii) When collector-emitter voltage VCE = 0, the collector current is maximum and is equal to VCC /RC
i.e. VCE = VCC − IC RC
or 0 = VCC − IC RC
∴ Max. IC = VCC /RC
This gives the second point A (OA = VCC /RC) on the collector current axis as shown in Fig. (ii).
By joining these two points, d.c. *load line AB is constructed.

Importance. The current (IC) and voltage (VCE) conditions in the transistor circuit are represented by
some point on the output characteristics. The same information can be obtained from the load line. Thus
when IC is maximum (= VCC /RC), then VCE = 0 as shown in Fig. below. If IC = 0, then VCE is maximum
and is equal to VCC. For any other value of collector current say OC, the collector-emitter voltage VCE =
OD. It follows, therefore, that load line gives a far more convenient and direct solution to the problem.

Note. If we plot the load line on the output characteristic of the transistor, we can investigate the
behavior of the transistor amplifier. It is because we have the transistor output current and voltage
specified in the form of load line equation and the transistor behaviour itself specified implicitly by the
output characteristics.
Operating Point
The zero signal values of IC and VCE are known as the operating point. It is called operating point
because the variations of IC and VCE take place about this point when signal is applied. It is also called
quiescent (silent) point or Q-point because it is the point on IC − VCE characteristic when the transistor is
silent i.e. in the absence of the signal.

Suppose in the absence of signal, the base current is 5 μA. Then IC and VCE conditions in the
circuit must be represented by some point on IB = 5 μA characteristic. But IC and VCE conditions in the
circuit should also be represented by some point on the d.c. load line AB. The point Q where the load
line and the characteristic intersect is the only point which satisfies both these conditions. Therefore, the
point Q describes the actual state of affairs in the circuit in the zero signal conditions and is called the
operating point. Referring to Fig. 8.37, for IB = 5 μA, the zero signal values are :
VCE = OC volts
IC = OD mA
It follows, therefore, that the zero signal values of IC and VCE (i.e. operating point) are determined
by the point where d.c. load line intersects the proper base current curve.

7. Explain thermal runaway.

The collector current for a CE configuration is given by :

 The collector leakage current ICBO is strongly dependent on temperature. The flow of
collector current produces heat within the transistor.
 This raises the transistor temperature and if no stabilization is done, the collector leakage
current ICBO also increases.
 It is clear from exp. (i) that if ICBO increases, the collector current IC increases by (β + 1) ICBO.
 The increased IC will raise the temperature of the transistor, which in turn will cause ICBO to
 This effect is cumulative and in a matter of seconds, the collector current may become very
large, causing the transistor to burn out.
 The self-destruction of an unstabilised transistor is known as thermal runaway.
 In order to avoid thermal runaway and consequent destruction of transistor, it is very essential
that operating point is stabilized i.e. IC is kept constant. In practice, this is done by causing IB
to decrease automatically with temperature increase by circuit modification.

 Then decrease in β IB will compensate for the increase in (β + 1) ICBO, keeping IC nearly
constant. In fact, this is what is always aimed at while building and designing a biasing
8. Explain about different Biasing compensation techniques.
a) Diode bias compensation

IR = ID + IB (ID is reverse saturation Current increases with temp.)

When temperature increases, IC increases at the time, ID also increases, making IB to Reduce and
controlling IC.
b) Thermistor Bias compensation

RT is having negative temp. Coefficient i.e., temperature increases the value of RT increases and if
temperature decreases RT increases.
- When temperature increases RT decreases thereby reducing base bias voltage & base current and
hence collects to current.
c) Sensistor Bias compensation.

Rs is sensistor (resistance) having positive temperature coefficient.

- When temperature increases Rs increases and the voltage drop (VR2) across R2 decreases. Hence
Base bias voltage decreases then Base current also decreases and the Collector current is controlled.

(2 marks)

1. Why base is made thin in BJT? [Nov/Dec 2014]

Transistor consists of three portions namely emitter, base and collector. Among them base
forms the middle part. It is very thin and lightly doped because it allows most of the emitter current
carriers towards the collector. Since base is acting as an interface it doesn't need more area.

2. What is meant by biasing a transistor? [Nov/Dec 2015]

Transistor biasing is the process of maintaining proper flow of zero signal collector current
and collector-emitter voltage during the passage of signal. Biasing keeps emitter-base junction
forward biased and collector-base junction reverse biased during the passage of signal.

3. Define the different operating regions of transistor. . [Nov/Dec 2014]

Active region: It is defined in which transistor collector junction is biased in reverse direction and
emitter junction in forward direction.

Cutoff region: The region in which the collector and emitter junctions are both reverse-biased
Saturation region : The region in which both the collector and emitter junctions are forward biased.

4. Define Base width modulation (Early effect) . [Nov 2013]

In a CB configuration, an increase in collector voltage increases the width of the depletion

region at the output junction diode. This will decrease the effective width of the base. This is known
as early effect. Due to this effect recombination rate reduces at the base region and charge gradient is
increased within the base.

5. Explain the significance of Base width modulation (Early effect) . [Nov 2013]

a) It reduces the charges recombination of electrons with holes in the base region, hence the current
gain increases with the increase in collector -base voltage
b) The charge gradient is increased within base; hence the current due to minority carriers injected
across emitter junction increases.
6. What are the three types of configurations? [Nov/Dec 2015]

Common base configuration, Common emitter configuration Common collector configuration

7. Among CB, CE, CC which is most important?

The CE configuration is important. The reasons

i) High current gain

ii) Output to input impedance ratio is moderate therefore easy coupling is possible
between various transistor stages
iii) It finds excellent usage in audio frequency applications hence used in receivers and
8. Give the advantages of CE configuration. . [Nov 2013]

i. High output impedance

ii. High current gain

iii. High power gain

9. What is thermal runaway? [Nov 2013]

The reverse saturation current in a semiconductor doubles for every 100 C rise in temperature
I as temperature increases the leakage current increases I and the collector current also increases. The
increase in collector produces an increase in power dissipation at the collector - base junction. This I
in turn further increases the temperature of the collector-base junction causing the collector current to
further increase. This process may become cumulative and it is possible for the transistor to burn out.
This process is known as Thermal runaway.

10. How thermal runaway can be avoided?

Thermal runaway can be avoided using a stabilization or heat sink with the transistor.

11. How a transistor is used as a switch?

A transistor should be operated in saturation and cutoff regions to use it as a switch I While
operating in saturation region I transistor carry heavy current hence considered as ON state. In cutoff
it doesn't carry current and it is equivalent to open switch.

13. Which configuration is known as emitter follower and why it is named so?

CC configuration is known as emitter follower, whatever may be the signal applied at the
input, may produce same signal at the output. In other words, the gain of the circuit is unity. So that
the common collector circuit - the so called emitter follower is named as emitter follower. (Output
follows the input)

14. Why do the output characteristics of CB transistor have a slight upward slope?

The emitter and collector are forward biased under the saturation region. Hence a small
change in collector voltage causes a significant change in collector current .Therefore a slight upward
slope is found in the output characteristics.

15. Compare the performance of CE, CB, CC

Parameters CB CE CC
Current gain (Ai) Low High High
Voltage gain (Vi) High High Low
Input resistance (Ri) Low Medium High
Output resistance (Ro) High Medium Low

16. Compare BJT and JFET (May 2010)

Low input impedance High input impedance
High Output impedance Low output impedance
Bipolar device Unipolar device
Noise is more Less noise
Cheaper Costlier
Gain is more Gain is less
Current controlled device Voltage controlled device

17. Mention the advantages of FET over BJT? (Nov 2013)

i) The noise level is very low in FET since there are no junctions.

ii) FET has very high power gain iii) Offers perfect isolation between input and output since it has
very high input impedance.

iv) FET is a negative temperature coefficient device hence avoids thermal runaway.

1. JacobMillmanandChristosC.Halkias,“ElectronicDevicesandCircuits”,Tata-McGraw
Hill, 2003.
2. Robert L. Boylestad and Louis Nashelsky, “Electronic Devices and Circuit Theory”,
Prentice-Hall India, 2009.
3. David A Bell, “Electronic Devices and Circuits”,PHI, 4thEdition, 2006.