XLIX

Engineering Design Firm

9201 University City Blvd
Charlotte, NC 28223

Transmittal
Date: Sunday, September 23, 2018

Section: 1201 – 009

To: Professor Meg Harkins

TA Rachel Glendenning

From: Victoria Mulvihill

Electrical Lab Report

Subject:

We are submitting: ☐ Memorandum ☐ Design Package ☐ Problem Set

☐ Report - Draft ☐ Test Data Sheet ☐ Extra Credit
☒ Report - Final ☐ Other: Enter Other Item

Date Description
9/19/2018 Test Data sheet
9/23/2018 Draft Submittal
9/25/2018 Final Draft
These are transmitted as checked below:
☒ Individual Assignment ☐ Team Assignment -- Team No. ________-_

☒ For grading
☐ For review/comment
☐ Other: Enter Description
 Electrical Laboratory Report

ENGR 1201-009
Prof. Harkins

Victoria Mulvihill

Test Date: September 19, 2018

Report Submitted: September 24, 2018

I have neither given nor received any unauthorized help on this assignment, nor witnessed any violation
of the UNC Charlotte Code of Academic Integrity.
9/24/18
Abstract

Resistance and voltage drop characteristics were tested through experiments at The University of North
Carolina at Charlotte. Testing was completed through assembly of a breadboard and demonstrated an
understanding of electrical systems and laws. Microsoft Visio, construction and testing of a voltage
divider, and communication of results were used to evaluate the final project.

Basic mathematics skills and the engineering design process were integral in completion of the
breadboard. Given resources for completion were 25 resistors of various resistance, a breadboard, overall
voltage and five test nodes. To complete the unknown data, calculations showing change in voltage and
equivalent resistance over each node were necessary. Completion and success were based on finding the
resistance and voltage drop within a 5% range of error. The voltage source was 18V and showed the
proper voltage drop between each node as specified by the instructor.

Introduction

A breadboard assembly was used to demonstrate an understanding of circuits and basic electrical theory.
The goal was the assembly of one DC voltage divider. Given knowledge for a specific network consisted
a voltage divider circuit with a specified current, a total voltage, and five voltage nodes. Basic math
calculations were used to test electrical systems and reconfiguring of equations to find unknown
variables. Proper reading of a resistor was necessary before starting assembly of the breadboard. Resistors
were identified to have a resistance of 3300Ω, 330Ω, 2200Ω, 220Ω, 𝑎𝑛𝑑 10000Ω values. Each given
resistor had a tolerance of +
−5%. This is a crucial part of the final circuit. Application of laws such as
Ohm’s Law, Kirchhoff’s Current and Voltage Laws, and calculate voltage drop over a resistor were the
basis of the assembly.

The first step was to identify the types of resistors given. Four band resistors are color coordinated to
specifically identify them. The first and second band are used to find the significant figures, the third band
is the multiplier 10𝑛 , and the fourth band is the tolerance (Electronics Center).

Each network must contain at least one parallel circuit on the final project. Materials not provided were
strictly prohibited. Construction of the final network was only allowed to be assembled using resistors
and wires provided. Communication was completed using both documentation and diagrams.

Theoretical Analysis

This assignment required application of basic electrical theories such as Ohm’s Law (OL), Kirchhoff’s
Current Law (KCL), and Kirchhoff’s Voltage Law (KVL) (Apsencore 2018).

Ohm’s Law: 𝑉 = 𝐼𝑅 (1)

Ohm’s Law can be applied to solve for any unknown variable for a specific resistor. The equation can be
manipulated to solve either voltage, current, or resistance.
Kirchhoff’s Current Law (KCL) can be used to determine the total current going through a source, or at a
specific point. The equations for current in series and parallel are different.

In series: 𝐼𝑅1 = 𝐼𝑅2 = 𝐼𝑅3 = 𝐼𝑇𝑜𝑡𝑎𝑙 (2)

In parallel: 𝐼𝑅1 + 𝐼𝑅2 = 𝐼𝑇𝑜𝑡𝑎𝑙 (3)

Kirchhoff’s Voltage Law (KVL)is similar to KCL in that it is different for circuits in series and in
parallel. Unlike KCL voltage is the opposite of how to calculate current through a resistor.

In series: 𝑉𝑇𝑜𝑡𝑎𝑙 = 𝑉𝑅1 + 𝑉𝑅2 + 𝑉𝑅3 (4)

In parallel: 𝑉𝑇𝑜𝑡𝑎𝑙 = 𝑉𝑅1 = 𝑉𝑅2 (5)

Resistance through a circuit in series and in parallel also differs. In this case there are special calculations
and combinations that must be met in order to properly calculate the resistance. In order to calculate the
total resistance in a combination circuit, one must be able to simplify the equation as much as possible,
most likely into two resistors in series, and then add the totals together.

In series: 𝑅𝑇𝑜𝑡𝑎𝑙 = 𝑅1 + 𝑅2 + 𝑅3 (6)

1 1
In parallel: 𝑅𝑇𝑜𝑡𝑎𝑙 = (𝑅 + 𝑅 )−1 (7)
1 2

Voltage Divider Network is used to find the voltages that appear across different resistors. This can also
be called the “voltage drop” across a resistor. This can be calculated using the following equation.
𝑅2
𝑉𝑜𝑢𝑡 = 𝑉𝑖𝑛 ( ) (8)
𝑅1 + 𝑅2

Experimental Apparatus and Procedures

Completion of the unknown resistance for each node can be found using the above equations (1-8). For
the final test a multimeter was used at each of the specified nodes. If the current at each node was within
+
−5% the assignment was considered within “passing” range.

Node 2 can be referenced for an example of resistance found in series (6). Using KCL (2) the current
through the node is found to 0.0011𝐴. Similarly, KVL (4) gives the voltage value. Then by using Ohm’s
Law (1) the total resistance of the node can be calculated. In this example, two resisters in series could
equaled the required resistance.

4.84𝑉
Ω = 0.0011𝐴 = 4400Ω (1)
2200Ω + 2200Ω = 4400Ω (6)
Node 3 was calculated using a combination circuit, both in parallel (7) and in series (6) and must be
calculated in two steps to find total resistance. This is done by solving the part of the equation in parallel
and then adding the totals as though they are in series.

1 1
(2200Ω + 2200Ω)−1 + 330Ω (6)(7)
= 1100Ω + 330Ω = 1430Ω

The final node was found by calculating the total resistance of a circuit in parallel (7).
1 1
(10000Ω + 10000Ω)−1 (7)
= 5000Ω

Figure 1.1 MS Visio schematic of final test circuit

Network: 3401
MS Visio Schematic

I=0.0011 A

Node 1 14.37 V

18 V DC

Node 2 9.53 V

Node 3 7.76 V

Node 4 5.41 V

Node 5 0V
Figure 1.2 of the final test schematic

Results

When testing the final network, there were five separate nodes the voltage was being tested. Each of these
nodes had to be within a 5% range of the theoretical voltage. In order to test if a voltage was in range,
plug the numbers into the equation below.

Experimental vs Theoretical Equation (% Difference)

𝑎𝑐𝑡𝑢𝑎𝑙 − 𝑡ℎ𝑒𝑜𝑟𝑒𝑡𝑖𝑐𝑎𝑙
( ) ∗ 100 (9)
𝑡ℎ𝑒𝑜𝑟𝑒𝑡𝑖𝑐𝑎𝑙
Table 1.1Results comparing theoretical and experimental voltage results

Voltage Required Node to Test 1 Experimental

Divider Ground Voltage Node to Ground Results
Node (from the Network Voltage (V)
Sheet (V))
Node 1 14.37V 14.36V -0.069%
Node 2 9.53V 9.59V 0.63%
Node 3 7.96V 8.04V 1.01%
Node 4 5.41V 5.49V 1.48%
Node 5 0V 0V 0%

Discussion

Based on the results in Table 1.1 above, all the tests for Network 3401 were within the 5% range required
for “passing” the job on the first test. Some of the actual values were slightly higher or lower than the
theoretical values. This was most likely due to each resistor having its own 5% tolerance, which meant
that all values were likely to have at least some about of error in them. This is important to note because it
shows the effect range of error can have on a system.
Reconfiguring equation can be done to attempt to achieve the most accurate data. There are many ways
that each of the resistor values could have been found. Finding more “alternate calculations” could have
led to the results being closer to the theoretical value.

Conclusion

The objective of this experiment was to complete engineering calculations and to demonstrate an
understanding of OL, KVL, and KCL. The requirements were met for this set of information. The
breadboard was assembled using the materials provided that demonstrated the required voltage drop for
Network 3401. All of the experimental data was within range of the theoretical data, with some more
room for error.

Assembly of this Network required discussion of electrical theory and concepts. Outside research on how
to properly read resistors, use computer programs such as Microsoft Visio, and finding resistance was
necessary for the success of the project.
References
1. Apsencore "Resistors in Parallel - Parallel Connected Resistors." Basic Electronics Tutorials. July
09, 2018. Accessed September 17, 2018. https://www.electronics-tutorials.ws/resistor/res_4.html.

2. Apseoncore "Resistors in Series - Series Connected Resistors." Basic Electronics Tutorials. July
08, 2018. Accessed September 17, 2018. https://www.electronics-tutorials.ws/resistor/res_3.html.

3. "Electronics Center." Integrated Teaching & Learning PROGRAM and LABORATORY.

Accessed September 17, 2018. http://itll.colorado.edu/electronics_center/resistor_chart/.

4. Knisley, Charles W., and Karin I. Knisley. "Sample Lab Report." In Engineering
Communication, 107-120. P2BS ed. Series 11. Cengage Learning, 1947.
Appendix

Other Calculations

Given:
I=0.0011A
DC=18V
Node 1=14.37V
Node 2=9.53V
Node 3=7.96V
Node 4=5.41V
Node 5=0V
+
−5%Tolerance

Node 1:

Voltage Drop:
∆𝑉 = 18𝑉 − 14.37𝑉 = 3.63𝑉
Equivalent Resistance:
Ω ∗ 0.0011𝐴 = 3.63𝑉
3.63𝑉
Ω = 0.0011𝐴 = 3300Ω
Calculated Resistance: 3300Ω = 3300Ω3300Ω ∗ 0.05 = 165Ω
Lower Tolerance: 3300Ω − 165Ω = 3135Ω
Upper Tolerance: 3300Ω + 165Ω = 3465Ω
Alternative Calculation:
1 1 1 1
(3300Ω + 3300Ω)−1 + (3300Ω + 3300Ω)−1
= 1650Ω + 1650Ω = 3300Ω
Node 2:

Voltage Drop:
∆𝑉 = 14.37𝑉 − 9.53𝑉 = 4.84𝑉
Equivalent Resistance:
Ω ∗ 0.0011𝐴 = 4.84𝑉
4.84𝑉
Ω = 0.0011𝐴 = 4400Ω
Calculated Resistance:
2200Ω + 2200Ω = 4400Ω
4400Ω ∗ 0.05 = 220Ω
Lower Tolerance: 4400Ω − 220Ω = 4180Ω
Upper Tolerance: 4400Ω + 220Ω = 4620Ω
Alternative Calculation:
1 1
(2200Ω + 2200Ω)−1 + 3300Ω
= 1100Ω + 3300Ω = 4400Ω
Node 3:

Voltage Drop:
∆𝑉 = 9.53𝑉 − 7.96𝑉 = 1.57𝑉
 Equivalent Resistance:
Ω ∗ 0.0011𝐴 = 1.57𝑉
1.57𝑉
Ω= = 1427.27Ω
0.0011𝐴
Calculated Resistance:
1 1
(2200Ω + 2200Ω)−1 + 330Ω
= 1100Ω + 330Ω = 1430Ω
1427.27Ω ∗ 0.05 = 71.36Ω
Lower Tolerance: 1427.27Ω − 71.36Ω = 1355.91Ω
Upper Tolerance: 1427.27Ω + 71.36Ω = 1498.64Ω
Alternative Calculation:
1 1 1
( + + )−1
3300Ω 3300Ω 10000Ω
= 1416.31Ω
Node 4:

Voltage Drop:
∆𝑉 = 7.96𝑉 − 5.41𝑉 = 2.55𝑉
Equivalent Resistance:
Ω ∗ 0.0011𝐴 = 2.55𝑉
2.55𝑉
Ω = 0.0011𝐴 = 2318.18Ω
Calculated Resistance:
1 1
( + )−1 + 330Ω + 220Ω
10000Ω 2200Ω
= 1803.28Ω = 550Ω =1803.28Ω + 550Ω = 2353.28Ω
2318.18Ω ∗ 0.05 = 115.91Ω
Lower Tolerance: 2318.18Ω − 115.91Ω = 2202.27Ω
Upper Tolerance: 2318.18Ω + 115.91Ω = 2434.09Ω
Alternative Calculation:
1 1
( + )−1 + 2200Ω
220 220
= 110Ω + 2200Ω = 2310Ω
Node 5:
Voltage Drop:
∆𝑉 = 5.41𝑉 − 0𝑉 = 5.41𝑉
Equivalent Resistance:
Ω ∗ 0.0011𝐴 = 5.41𝑉
5.41𝑉
Ω= = 4918.18Ω
0.0011𝐴
4918.18Ω ∗ 0.05 = 245.91Ω
Lower Tolerance: 4918.18Ω − 245.91Ω = 4672.27Ω
Upper Tolerance: 4918.18Ω + 245.91Ω = 5164.09Ω
Alternative Calculation:
2200Ω + 2200Ω + 220Ω = 4950Ω
Finding % Error

14.36𝑉 − 14.37𝑉
( ) ∗ 100
14.37𝑉
9.59𝑉 − 9.53𝑉
( ) ∗ 100
9.53𝑉
8.04𝑉 − 7.96𝑉
( ) ∗ 100
7.96𝑉
5.49𝑉 − 5.41𝑉
( ) ∗ 100
5.41𝑉
0𝑉 − 0𝑉
( ) ∗ 100
0𝑉

Image 3 Original Circuit Diagram