Bipolar Junction Transistor (BJT)

Lecture notes: Sec. 3

Sedra & Smith (6th Ed): Sec. 6.1-6.4*

Sedra & Smith (5th Ed): Sec. 5.1-5.4*

* Includes details of BJT device operation which is not covered in this course

F. Najmabadi, ECE65, Winter 2012

 A BJT consists of three regions
NPN transistor
Simplified physical structure An implementation on an IC

 Device construction is NOT symmetric

 Device is constructed such that o “Thin” base region (between E & C)
BJT does NOT act as two o Heavily doped emitter
diodes back to back (when
o Large area collector
voltages are applied to all
three terminals).

F. Najmabadi, ECE65, Winter 2012

 BJT iv characteristics includes four parameters

NPN transistor
 Six circuit variables: (3 i and 3 v)
 Two can be written in terms of the
other four:
KCL : iE = iC + iB
KVL : vBC = vBE − vCE

Circuit symbol and  BJT iv characteristics is the relationship

Convention for current directions among (iB , iC , vBE , and vCE )
(Note: vCE = vC – vE)  It is typically derived as
iB = f (vBE )
iC = g (iB , vCE )

F. Najmabadi, ECE65, Winter 2012

 BJT operation in the “active” mode
As Emitter is heavily doped, a large number of
BE junction is forward biased electrons diffuse into the base (only a small
(vBE = VD0) fraction combine with holes)

The number of these electrons scales as e vBE / VT

 If the base is “thin” these electrons get

near the depletion region of BC junction
and are swept into the collector if vCB ≥ 0
(vBC ≤ 0 : BC junction is reverse biased!)
iC = I S e vBE / VT
 In this picture, ic is independent of vBC
(and vCE ) as long as
Active mode:
iC IS vBC = vBE − vCE = VD 0 − vCE ≤ 0
iB = = e v BE / VT

β β vCE ≥ VD 0
iC = I S e vBE / VT
 Base current is also proportional to
vCE ≥ VD 0
e vBE / VT and therefore, iC : iB = iC/β
F. Najmabadi, ECE65, Winter 2012
 BJT operation in saturation mode
BE junction is forward biased Similar to the active mode, a large number of
(vBE = VD0) electrons diffuse into the base.

 For vBC ≥ 0 BC junction is forward biased

and a diffusion current will set up, reducing iC .
1. Soft saturation: vCE ≥ 0.3 V (Si)*
vBC ≤ 0.4 V (Si), diffusion current is small and
iC is very close to its active-mode level.
2. Deep saturation region: 0.1 < vCE < 0.3 V (Si)
or vCE ≈ 0.2 V = Vsat (Si), iC is smaller than
its active-mode level (iC < β iB).
o Called saturation as iC is set by outside
“Deep” Saturation mode: circuit & does not respond to changes in iB.
IS
iB = e vBE / VT 3. Near cut-off: vCE ≤ 0.1 V (Si)
β
Both iC & iB are close to zero.
iC < β iB
vCE ≈ Vsat
* Sedra & Smith includes this in the active region, i.e.,
F. Najmabadi, ECE65, Winter 2012 BJT is in active mode as long as vCE ≥ 0.3 V.
 BJT iv characteristics includes four parameters

NPN transistor
Simplified physical structure

Circuit symbol and  BJT iv characteristics is the relationship

Convention for current directions among (iB , iC , vBE , and vCE )
(Note: vCE = vC – vE)  It is typically derived as
iB = f (vBE )
iC = g (iB , vCE )

F. Najmabadi, ECE65, Winter 2012

 BJT iv characteristics:
iB = f(vBE) & iC = g(iB , vCE)
Saturation:
BE is forward biased, BC is forward biased
1. Soft saturation: 0.3 ≤ vCE ≤ 0.7 V, iC ≈ β iB Active:
BE is forward biased
2. Deep saturation: 0.1 ≤ vCE ≤ 0.3 V, iC < β iB BC is reverse biased
3. Near cut-off: vCE ≤ 0.1 V, iC ≈ 0 iC = β iB

iB

Cut-off :
BE is reverse biased
iB = 0, iC = 0
F. Najmabadi, ECE65, Winter 2012
 Early Effect modifies iv characteristics in
the active mode

 iC is NOT constant in the active region.

 Early Effect: Lines of iC vs vCE for
different iB (or vBE ) coincide at
vCE = − VA
 v 
iC = I S e vBE / VT 1 + CE 
 VA 

F. Najmabadi, ECE65, Winter 2012

 NPN BJT iv equations
“Linear” model
Cut-off : iB = 0, iC = 0 iB = 0, iC = 0
BE is reverse biased
vBE < VD 0

iC IS
Active: iB = = e vBE / VT vBE = VD 0 , iB ≥ 0
β β
BE is forward biased
 vCE  iC = β iB , vCE ≥ VD 0
BC is reverse biased
iC = I S e v BE / VT
1 + 
 VA 

IS vBE = VD 0 , iB ≥ 0
(Deep) Saturation: iB = e vBE / VT
BE is forward biased β
vCE = Vsat , iC < β iB
BC is reverse biased vCE ≈ Vsat , iC < β iB

For Si, VD 0 = 0.7 V, Vsat = 0.2 V

F. Najmabadi, ECE65, Winter 2012

 PNP transistor is the analog to NPN BJT
PNP transistor
“Linear” model
Cut-off : iB = 0, iC = 0
EB is reverse biased vEB < VD 0

Active: vEB = VD 0 , iB ≥ 0
EB is forward biased
CB is reverse biased iC = β iB , vEC ≥ VD 0

(Deep) Saturation: vEB = VD 0 , iB ≥ 0

EB is forward biased
vEC = Vsat , iC < β iB
CB is reverse biased
Compared to a NPN:
1) Current directions are reversed
2) Voltage subscripts “switched”

F. Najmabadi, ECE65, Winter 2012

 Notations

DC voltages: Voltage sources are

Use “Double subscript” of BJT identified by node
terminal: VCC , VBB , VEE . voltage!
Resistors:
Use “subscript” of BJT
terminal: RC , RB , RE .

F. Najmabadi, ECE65, Winter 2012

 Transistor operates like a “valve:”
iC & vCE are controlled by iB

Controlled part:
iC & vCE are set by
transistor state (&
Controller part: outside circuit)
Circuit connected to BE sets iB

 Cut-off (iB = 0): Valve Closed iC = 0

 Active (iB > 0): Valve partially open iC = β iB
 Saturation (iB > 0): Valve open iC < β iB
iC limited by circuit connected
to CE terminals, increasing iB
does not increase iC

F. Najmabadi, ECE65, Winter 2012

 Recipe for solving BJT circuits
(State of BJT is unknown before solving the circuit)

1. Write down BE-KVL and CE-KVL:

2. Assume BJT is OFF, Use BE-KVL to check:
a. BJT OFF: Set iC = 0, use CE-KVL to find vCE (Done!)
b. BJT ON: Compute iB
3. Assume BJT in active. Set iC = β iB . Use CE-KVL to find vCE .
If vCE ≥ VD0 , Assumption Correct, otherwise in saturation:
4. BJT in Saturation. Set vCE = Vsat . Use CE-KVL to find iC .
(Double-check iC < β iB )

NOTE:
o For circuits with RE , both BE-KVL & CE-KVL have to be solved
simultaneously.

F. Najmabadi, ECE65, Winter 2012

 Example 1: Compute transistor parameters (Si BJT with β = 100).

BE - KVL : 4 = 40 × 103 iB + vBE

CE - KVL : 12 = 103 iC + vCE

Assume Cut - off : iB = 0 and vBE < VD 0 = 0.7 V

BE - KVL : 4 = 40 × 103 × 0 + vBE → vBE = 4 V
vBE = 4 V > VD 0 = 0.7 V → Assumption incorrect

BE ON : vBE = VD 0 = 0.7 V and iB ≥ 0

BE - KVL : 4 = 40 × 103 × iB + 0.7 → iB = 8.25 µ A > 0

Assume Active : iC = β iB and vCE ≥ VD 0 = 0.7 V

iC = β iB = 100 × 8.25 × 10 −6 = 8.25 mA
CE - KVL : 12 = 103 × 8.25 × 10 −3 + vCE → vCE = 3.75 V
vCE = 3.75 V > VD 0 = 0.7 V → Assumption correct

F. Najmabadi, ECE65, Winter 2012

 BJT Transfer Function (1)
BE - KVL : vi = RB iB + vBE
CE - KVL : VCC = RC iC + vCE

Cut - off : iB = 0 and vBE < VD 0

BE - KVL : vi = RB × 0 + vBE → vBE = vi
iC = 0
CE - KVL : VCC = RC × 0 + vCE → vCE = VCC

For vi < VD 0 → BJT in Cutoff

iB = 0, iC = 0, vCE = VCC

BE ON : vBE = VD 0 and iB ≥ 0
vi − VD 0
BE - KVL : vi = RB × iB + VD 0 → iB =
RB
iB ≥ 0 → vi ≥ VD 0
F. Najmabadi, ECE65, Winter 2012
 BJT Transfer Function (2)
vi − VD 0
BE ON : vBE = VD 0 and iB =
RB
CE - KVL : VCC = RC iC + vCE

Active : ic = β iB and vCE ≥ VD 0

vi − VD 0
iC = β ×
RB
CE - KVL : VCC = RC iC + vCE → vCE = VCC - RC iC
VCC − VD 0
vCE ≥ VD 0 → vi ≤ VD 0 +
βRC / RB

VCC − VD 0
For VD 0 ≤ vi ≤ VD 0 + → BJT in active
βRC / RB

F. Najmabadi, ECE65, Winter 2012

 BJT Transfer Function (3)
vi − VD 0
BE ON : vBE = VD 0 and iB =
RB
CE - KVL : VCC = RC iC + vCE

Saturaation : vCE = Vsat and ic < β iB

VCC - Vsat
CE - KVL : VCC = RC iC + Vsat → iC =
RC
VCC − Vsat
ic < β iB → vi > VIH = VD 0 +
βRC / RB

VCC − VD 0
For VD 0 + < vi → BJT in saturation
βRC / RB

F. Najmabadi, ECE65, Winter 2012

 BJT Transfer Function (4)
vi < VD 0 → BJT in Cutoff
VCC − VD 0
VD 0 ≤ vi ≤ VD 0 + → BJT in active
βRC / RB
VCC − Vsat
VD 0 + < vi → BJT in deep saturation
βRC / RB

F. Najmabadi, ECE65, Winter 2012

 BJT transfer function on the load line

Saturation : VIH < vi

iB increases but iC unchanged Load Line (CE - KVL)
vCE = VCC − RC iC

Active : VD 0 ≤ vi ≤ VIH Cut − off :

iB & iC increase together vi < VD 0

F. Najmabadi, ECE65, Winter 2012

 BJT as a switch
Load is placed in
collector circuit

 Use: Logic gate can turn loads ON (BJT in saturation) or OFF

(BJT in cut-off)
 ic is uniquely set by CE circuit (as vce = Vsat)
 RB is chosen such that BJT is in deep saturation with a wide
margin (e.g., iB = 0.2 ic /β)

*Lab 4 circuit
F. Najmabadi, ECE65, Winter 2012 Solved in Lecture notes (problems 12 & 13)
 BJT as a Digital Gate
Resistor-Transistor logic (RTL)

RTL NOT gate (VL = Vsat , VH = VCC) RTL NOR gate* RTL NAND gate*

 Other variants: Diode-transistor logic (DTL) and transistor-transistor logic (TTL)

 BJT logic gates are not used anymore except for high-speed emitter-coupled
logic circuits
o Low speed (switching to saturation is quite slow).
o Large space and power requirements on ICs
F. Najmabadi, ECE65, Winter 2012 *Solved in Lecture notes (problems 14 & 15)
 BJT β varies substantially
 Our BJT model includes three parameters: VD0 , Vsat and β
o VD0 and Vsat depend on base semiconductor:
o For Si, VD0 = 0.7 V, Vsat = 0.2 V
 Transistor β depends on many factors:
o Strongly depends on temperature (9% increase per oC)
o Depends on iC (not constant as assumed in the model)
o β of similarly manufactured BJT can vary (manufacturer spec sheet
typically gives a range as well as an average value for β )
o We will use the average β in calculations (PSpice also uses average β but
includes temperature and iC dependence).
o βmin is an important parameter. For example, to ensure operation in
deep saturation for all similar model BJTs, we need to set iC /iB < βmin

F. Najmabadi, ECE65, Winter 2012