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International Journal of Engineering Trends and Technology (IJETT) - Volume4Issue4- April 2013

Sinusoidal and Space Vector Pulse Width


Modulation for Inverter
K. Mounika#1, B. Kiran Babu^2
#
Final Year B. Tech, Dept. of EEE, KL University, Vaddeswaram, AP, India
^
Assistant professor, Dept. of EEE, KL University, Vaddeswaram, AP, India
Address

Abstract- Inverters inherently have the property of 2. External control of dc input voltage.
controlling output frequency but the output volt- 3. Internal control of inverter.
age can’t be varied. Usually to vary output voltage In external type of control, circuit becomes bulky,
we have to vary supply voltage which is not always costly and complicated so we go for internal control
possible for this reason PWM techniques gained of inverter. In internal control inverter output voltage
momentum. Basic aim of PWM technique is to can be adjusted by exercising the control within the
control output voltage and harmonic reduction. inverter itself. The two possible ways of doing this
Pulse-width modulation (PWM), or pulse- are: 1. Series inverter control. [7]
duration modulation (PDM), is a commonly used 2. Pulse Width Modulation control.
technique for controlling power to inertial electri- Pulse-width modulation (PWM) [2] uses a rectangu-
cal devices, made practical by modern electronic lar pulse wave whose pulse width is modulated re-
power switches. Here we apply PWM techniques sulting in the variation of the average value of the
like Sinusoidal pulse width modulation (SPWM) waveform. The simplest way to generate a PWM
and Space Vector Pulse width Modulation signal is the interceptive method, which requires only
(SVPWM) to inverter and study its performance. a saw tooth or a triangle waveform (easily generated
In Sinusoidal Pulse width modulation using a simple oscillator) and a control wave. When
(SPWM) we generate the gating signals by com- the value of the reference signal is more than the
paring a sinusoidal reference signal with a trian- modulation waveform, the PWM signal is in the high
gular carrier wave. In Space vector Modulation state, otherwise it is in the low state. The inverter
(SVPWM) we consider a rotating phased which is output voltage is determined in the following:
obtained by adding all the three voltages. Modula-
tion is accomplished by switching state of an in-  When Vcontrol > Vtri, VA0 = Vdc/2
verter. Thus by comparing these two techniques  When Vcontrol < Vtri, VA0 = −Vdc/2
we study the performance of our inverter.

Keywords - PWM (pulse width modulation),


SPWM (sinusoidal pulse width modulation) and
SVPWM (space vector pulse width modulation).
II. SINUSOIDAL PULSE WIDTH MODULA-
TION
I. INTRODUCTION
In single-pulse and multiple pulse modulation tech-
Inverter is usually a device which converts DC power niques the width of all pulses are same but in sinus-
into AC power. In many industrial applications, it is oidal pulse width modulation the width of each pulse
often required to vary output voltage of inverter [1] is varied in proportion to the amplitude of a sine
due to the following reasons: 1.To compensate for the wave. In this technique the gating signals are gener-
variations in input voltage.2.To compensate for the ated by comparing a sinusoidal reference signal with
regulation of inverters.3. To supply some special a triangular carrier wave. The DF and LOH [3] are
loads which need variation of voltage with frequency. reduced significantly. The output voltage is obtained
The various methods for the control of output voltage from the mat lab results. The DF and LOH are meas-
are: 1. External control of ac output voltage. ured by using FFT analysis. The gating signal for the

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International Journal of Engineering Trends and Technology (IJETT) - Volume4Issue4- April 2013

inverter is obtained by taking the repeating se- V. SIMULATION CIRCUIT FOR SVPWM
quence(triangular wave)as the control signal and
comparing it with the reference wave(sinusoidal
wave).In order to detect or eliminate the zero se-
quence currents we use zero hold circuit and by com-
paring the with the help of greater than or equal to
blocks.
III.SIMULATION CIRCUIT FOR SINUSOIDAL
PWM

Fig:2 circuit for svpwm

VI. IMPLEMENTING SVPWM

The SVPWM [4] can be implemented by using with-


er sector selection algorithm or by using a carrier
based space vector algorithm. The types of SVPWM
Fig:1 Circuit for sinusoidal pwm implementations are: a) Sector selection based space
vector modulation b) Reduced switching Space vec-
IV. SPACE VECTOR PULSE WIDTH MODU- tor modulation c) Carrier based space vector modula-
LATION tion d) Reduced switching carrier based space vector
Space vector modulation is a PWM control algorithm modulation.
[8] for multi-phase AC generation, in which the ref-
VII. STEPS TO IMPLEMENT SVPWM, THE
erence signal is sampled regularly; after each sample,
CONVENTIONAL METHOD
non-zero active switching vectors adjacent to the ref-
erence vector and one or more of the zero switching 1) The sector in which the tip of the reference sector
vectors are selected for the appropriate fraction of the is situated is to be determined from the instantaneous
sampling period in order to synthesize the reference phase references Va *, Vb * and Vc*
signal as the average of the used vectors. The topolo-  Va *, Vb *, Vc * v,v   = Tan-1(v /
gy of a three-leg voltage source inverter is Because of
v)
the constraint that the input lines must never be
  =  - k(600) ; k such that  < 60 0
shorted and the output current must always be con-
tinuous a voltage source inverter can assume only  Sector number = k + 1
eight distinct topologies. Six out of these eight topol- 2) Computation of T1 and T2; here lookup tables are
ogies produce a nonzero output voltage and are needed to know the values of Sin (600- ) and Sin 
known as non-zero switching states and the remain- 3) Determination of switching vectors.
ing two topologies produce zero output voltage and 4) Assert the appropriate control signals to affect the
are known as zero switching states. required switching action.
From this analysis, the space vector modulation task
can be solved into following steps to make actual
PWM pattern.

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International Journal of Engineering Trends and Technology (IJETT) - Volume4Issue4- April 2013

Step-1: Sector identification The imaginary switching periods Tas, Tbs and Tcs are
By comparing the stationary frame d-q components defined as:
of the reference voltage vector, the sector where the
reference voltage vector is located is identified.
T  T  T 
Step-2: Calculating the effective times Tas   s  va* ; Tbs   s  vb* ; Tcs   s  vc*
Using the d-q components of the reference voltage  Vdc   Vdc   Vdc 
vector, a sine loop voltage and a dc-link voltage in-
formation, the effective times T1, T2 are calculated. The active vector switching times T1 and T2 in sector-
Instead of the sine table, to reduce the calculation 1 may be expressed as:
time, another look-up table which contains the corre-
sponding to each sector number may be used.
Step-3: Determining the switching states T1  Tas  Tbs ; T2  Tbs  Tcs
Using the corresponding sector information the actual Extending this procedure, for the other sectors, the
switching time for each inverter leg is generated from active vector switching times (T1 andT2) [4] and for
the combination of effective times and zero sequence the respective sectors may be expressed in terms of
time. Equating volt-seconds along the -axis: the imaginary switching times (Tas,Tbs and Tcs) for a
particular sampling interval. The effective time Teff
( Vsr cos)* Ts  Vdc* T 1  (Vdccos600 ) * Ts is the time during which the active vectors are
switched in a sector and is given by (T1 + T2). This
Equating volt-seconds along the -axis: may be determined as the difference between the
maximum and minimum values among Tas, Tbs and
( Vsr sin ) * Ts  ( Vdc sin600 ) * T2 Tcs. Hence, T0 = Ts - Teff.
Solving the above two simultaneous equations, one
gets: Teff  max{Tas,Tbs,Tcs} min{Tas,Tbs,Tcs}
| v sr | T s sin(  / 3   )  Tmax Tmin
T1  The offset time, Toffset required to distribute the
V dc sin(  / 3 ) zero voltage symmetrically during one sampling pe-
riod is given by:
| v sr | T s sin 
T 2  T0
V dc sin(  / 3 ) Toffset  Tmin
|Vsr | represents the length of the reference Vector and
2
 is measured from the start of the vector. The actual switching times for each the inverter
leg can be obtained by the time shifting operation as
2Ts [v sin( / 3)  v cos( / 3)] 2Tsv follows:
T1  ; T2 
3Vdc 3Vdc
TgaTasToffset; TgbTbsToffset; TgcTcsToffset
Substituting

3 *
v   v a VIII. DC-BUS UTILIZATION WITH SVPWM
2 The principal advantage of the SVPWM over SPWM
3 is that it enhances the DC bus utilization [6] by about
v  ( v b*  v c* ) 15%. It is instructive to evaluate the sample-averaged
2 pole voltage of a phase, V AO for instance, to under-
stand this fact.
Ts (va*  vb* ) Ts (vb*  vc* ) During (0<Wt<30)
T1  ; T2 
Vdc Vdc

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International Journal of Engineering Trends and Technology (IJETT) - Volume4Issue4- April 2013

Vdc / 2  T0 T
VAO,avg     T1  T2  0 
Ts  2 2
The maximum magnitude of the reference voltage
V /2 T T space vector corresponds to the radius of the biggest
VBO,avg  dc   0  T1  T2  0  circle that can be inscribed in the hexagon. Thus, the
Ts  2 2 maximum value of the peak-phase voltage is given
by
Vdc / 2  T0 T
VCO,avg     T1  T2  0 
Ts  2 2
2 3 V
During (30<Wt<90) Vph, peak,max  * *Vdc  dc  0.577*Vdc
3 2 3
Vdc / 2  T0 T
VAO,avg    T1 T2  0 
Ts  2 2 IX. OUTPUT VOLTAGE FOR SPWM
Vdc / 2  T0 T INVERTER
VBO,avg    T1 T2  0 
Ts  2 2
Vdc / 2  T0 T
VCO,avg    T1 T2  0 
Ts  2 2
V /2 V T
Ts Vdc sin60

VAO,avg dc * sr * s 0 sin(600 ) sin 
0
 t    30

when
 t  30 0 simplifying
Noting that

0
 t    30

when
30 0   t  90 0 Fig:3 output waveform of spwm

simplifying

Vsr
V AO , avg  Sin (  t  30 0 )
3
The peak value of the A-phase voltage, while the
inverter is operated in the range of linear modulation
is given by:

Vph, peak  (2 / 3) * Vsr


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International Journal of Engineering Trends and Technology (IJETT) - Volume4Issue4- April 2013

Fig:5 fft analysis of spwm

X. OUTPUT VOLTAGE OF SVPWM XII. FFT ANALYSIS FOR SVPWM

Fig:4 output waveform of svpwm

Simulation results [5] are observed by the following


analysis.

XI. FFT ANALYSIS OF SPWM

Fig:6 fft analysis of svpwm

XIII. CONCLUSION

Compared to SPWM the Total harmonic distortion


(THD) and lower order harmonics (LOH) contents
are decreased in SVPWM. It is known that the max-
imum value of the peak-phase voltage that can be
obtained from a 3-Ph inverter with Sinusoidal Pulse
Width Modulation (SPWM) technique is equal to
Vdc/2. It is therefore evident that SVPWM achieves a
better DC bus utilization compared to SPWM (by
about 15.4%).

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International Journal of Engineering Trends and Technology (IJETT) - Volume4Issue4- April 2013

XIV. LATEST IMPROVEMENTS


BIOGRAPHIES
• Microprocessor-based controllers eliminate analog,
potentiometer-based adjustments. Kondapalli Mounika was
• Digital control capability. born in India in 1991. She is
• Built-in Power Factor correction. pursuing B. Tech final year
• Radio Frequency Interference (RFI) filters. in KL University in Electri-
• Short Circuit Protection (automatic shutdown). cal and Electronics Engi-
• Advanced circuitry to detect motor rotor position by neering. Her field of interest
sampling power at terminals, ASD and motor circuit- is in FACTS devices and
ry combined to keep power waveforms sinusoidal, Power Electronics.
minimizing power losses.
• Motor Control Centers (MCC) coupled with the
Email Id: mouni.kondapalli99@gmail.com
ASD using real-time monitors to trace motor-drive
system performance.
• Higher starting torques at low speeds (up to 150%
running torque) up to 500 HP, in voltage source B. Kiran babu received the
drives. B. Tech degree from JNTU
• Load-commutated Inverters coupled with synchro-
Hyderabad in the year 2004,
nous motors.
the M. Tech degree in pow-
REFERENCES er system engineering from
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area includes distribution system reconfiguration,
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cuits, devices, and applications. Low price edi- transmission loss allocation.
tion.Isbn:978-81-317-0246-8. Email Id: kiranbabu.b@gmail.com
[3]M.D.Singh, K.B.Kanchandani “Power electronics”
Tata McGraw-Hill Education Private limited, Isbn:
13:978-0-07-058394.
[4]. Mohan, Undeland, Riobbins, “Power electronic
converters, applications and design” WILEY STU-
DENT EDITION, Isbn: 978-8126-510900.
[5].www.mathwork.com
[6]. B.K. Bose. 1986. Power electronics and ac
drives. Prentice hall Inc., Englewood Cliffs, New
Jersey.
[7]. Shoji Fukuda and Yoshitaka Iwaji, “Introduction
of the Harmonic Distortion Determining Factor and
its Application to Evaluating Real Time PWM In-
verters,” IEEE transactions on Industry Applications,
Vol. 31, No. 1, January/February, 1995.
[8]. G. Narayanan, Harish K. Krishnamurthy, Ra-
japandian Ayyanar and V. T. Ranganathan, “Space
Vector Based Hybrid PWM Techniques for Reduced
Current Ripple,” IEEE Transactions on Industrial
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