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5 4 3 2 1

LA46 Switchable Graphics System Schematicshttp://hobi-elektronika.net Project Code: 91.4GV01.001 USB BD PCB LAYER
PCB(Raw Card): 09911-1 L1: Top
L2: GND
I/O BD L3: Signal
Thermal Clock GEN VRAM DDR3 X4
Sensor CK505 512MB / 1GB L4: Signal
EMC2103 PortA 57,58 L5: VCC
11 3 CRT BD L6: Signal
D L7: GND D
L8: Signal
UNBUFFERED Power BD
Channel A
DDR3 SODIMM
DDR3 800/1066 Intel CPU NVIDIA
Socket1 Auburndale CPU DC/DC
12 Finger Printer BD 38,39
(Dual Core) N11M-GE ISL62882
204-PIN DDR3 SODIMM PCIe 16X Gen2 HDMI HDMI CONN 26 INPUTS OUTPUTS

UNBUFFERED Channel B DDR3 800/1066MHz HDMI BD DCBATOUT VCC_CORE


HDMI BD
DDR3 SODIMM DDR3 800/1066
Socket2 4,5,6,7,8,9,10 54,55,56,57,58,59 SYSTEM DC/DC
13 TPS51123 40
BT BD
INPUTS OUTPUTS
FDI DMI x4 RGB LVDS 5V_AUX_S5
3D3V_AUX_S5
Mic in AV BD DCBATOUT 5V_S5
3D3V_S5

14'' WUXGA
HD AUDIO CODEC HDA Link LVDS LVDS SYSTEM DC/DC
Intel (WSXGA) LCD 24 41
PCH HM55 MUX RT8209E
ALC269Q-VB-GR
INPUTS OUTPUTS
C 27
USB 2.0 (12 ports)
RGB
23,24,25
RGB CRT CONN 25 DCBATOUT 1D5V_S3 C
Serial ATA (4 ports) CRT BD
Headphone out PCI Express (8 ports) SYSTEM DC/DC
RT8209E 41
AC97 2.3/Azalia Interface
INPUTS OUTPUTS
ACPI 2.0 DCBATOUT 1D05V_S0
LPC I/F
GLAN
PCI Express 8 AR8131 Transformer RJ45
PCI Rev 2.3 30 SYSTEM DC/DC
29 42
INT. RTC 30 RT8209E
INPUTS OUTPUTS
SATA HDD SATA CONN SATA Port 0
28 DCBATOUT 1D05V_VTT
14,15,16,17,18,19,20,21,22 USB 2.0 CH2 Mini PCI-E
WLAN Card LDO
SATA ODD SATA CONN SATA Port 1
43
28
PCI Express 1
RT9025
INPUTS OUTPUTS
3D3V_S5 1D8V_S0
I/O BD
USB 2.0 CH4 Mini PCI-E
5-in-1 MediaCard Reader USB 2.0 port? LDO
WWAN Card SIM Slot 43
Slot Realtek/5138 RT9026
PCI Express 3 INPUTS OUTPUTS
0D75_S0
B Bluetooth CH3
1D5V_S3 DDR_VREF_S3
B
32 USB 2.0 CH6
Express Card SYSTEM DC/DC
EHCI#1

ISL62881 44

Camera CH5 PCI Express 4 I/O BD INPUTS OUTPUTS


24 31
DCBATOUT VCC_GFXCORE

Finger Printer CH7 SYSTEM DC/DC


38 45
ISL62872
SPI

LPC Bus / 33MHz


INPUTS OUTPUTS
USB 2.0

USB 2.0 CH7


35 DCBATOUT VGA_CORE_S0
USB BD
SPI FLASH KBC LPC Debug
4MB
Nuvoton NPCE781E Board Conn CHARGER
CH8 38 BQ24745 46
USB 2.0
35 36 36
INPUTS OUTPUTS
CH0 DCBATOUT BT+
USB 2.0
35
Multi-touch Int. KB G-Sensor SPI Flash
Touchpad 128Kb
38 36 38 38
A A
<Core Design>

Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

01_Block Diagram
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 1 of 58

5 4 3 2 1
5 4 3 2 1
Processor Strapping http://hobi-elektronika.net
Sequence AC
Pin Name Strap Description Configuration (Default value for each bit is Default
AD+
1 unless specified otherwise) Value
CFG[4] Embedded 1: Disabled - No Physical Display Port attached to 1 3D3V_AUX_S5
DisplayPort Embedded DisplayPort.
5V_AUX_S5
Presence 0: Enabled - An external Display Port device is
connected to the Embedded Display Port.
S5_ENABLE (KBC)
CFG[3] PCI-Express Static 1: Normal Operation. 1
Lane Reversal 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
5V_S5

D CFG[0] PCI-Express
Configuration
1: Single PCI-Express Graphics
0: Bifurcation enabled
1 3D3V_S5 >10ms

Select RSMRST#_KBC
CFG[7] Reserved - Clarksfield (only for early samples pre-ES1) - 0
Temporarily used Connect to GND with 3.01K Ohm/5% resistor can power after power switch press
LAN_PWR_ON
for early Note: Only temporary for early CFD samples
Clarksfield (rPGA/BGA) [For details please refer to the WW33
samples. MoW and sighting report]. 3D3V_LAN_S5
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality. KBC_PWRBTN#

PM_PWRBTN#

PCH Strapping PM_SLP_S4#

Name Schematics Notes


1D5V_S3
SPKR Reboot option at power-up DDR3_VREF_S3
Default Mode: Internal weak Pull-down.
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k
- 10-k weak pull-up resistor. PM_SLP_S3#
INIT3_3V# Weak internal pull-down. Do not pull high.
5V_S0
GNT3#/ Default Mode: Internal pull-up. 3D3V_S0
GPIO55 Low (0) = Top Block Swap Mode (Connect to ground with 4.7-k weak 1D8V_S0 PLANAR_ID[1..0]
pull-down resistor). 1D5V_S0
1D05V_S0 KBC GPIn 31 23
C INTVRMEN High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
0D75V_S0
PLANAR_IDn 1 0
Planar ID Version Planar PCB Version
GNT0#, Default (SPI): Left both GNT0# and GNT1# floating. No pull up ALL_PWRGD
GNT1# required.
0 0 LA46 - SA SA
Boot from PCI: Connect GNT1# to ground with 1-k pull-down
resistor. Leave GNT0# Floating. 1D05V_VTT
0 1 LA46 - SB SB
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-k
pull-down resistor.
VTT_PWRGD 1 0 LA46 - SB SC
GNT2#/ Default - Internal pull-up. (H_VTTPWRGD -->CPU, KBC)
GPIO53 Low (0)= Configures DMI for ESI compatible operation (for servers
only. Not for mobile/desktops). 1 1 -1
GFX_VR_EN
GPIO33 Default: Do not pull low.
Disable ME in Manufacturing Mode: Connect to ground with 1-k
pull-down resistor. VCC_GFXCORE
SPI_MOSI Enable iTPM: Connect to Vcc3_3 with 8.2-k weak pull-up resistor.
Disable iTPM: Left floating, no pull-down required. DIS: Before 1D05V_VTT 7,36,39 VCC_CORE VCC_CORE
NV_ALE Enable Danbury: Connect to Vcc3_3 with 8.2-k weak pull-up
resistor. DGPU_PWR_EN# 11,20,21,23,24,25,26,27,28,35,36,44,45,48,49 5V_S0 5V_S0
Disable Danbury: Connect to ground with 4.7-k weak pull-down 3,5,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,31,32,33,34,35,36,38,41,43,44,50 3D3V_S0 3D3V_S0
resistor.
3D3V_S0_NV 5,8,12,13,36,41,43,50 1D5V_S3 1D5V_S3
NC_CLE Weak internal pull-up. Do not pull low.
3,14,15,16,20,21,41,50 1D05V_S0 1D05V_S0
HAD_DOCK_EN# Low (0): Flash Descriptor Security will be overridden.
/GPIO[33] High (1) : Flash Descriptor Security will be in effect. VGA_CORE_PWR 5,7,8,19,20,21,36,38,42 1D05V_VTT 1D05V_VTT
HDA_SDO Weak internal pull-down. Do not pull high. 8,20,23,36,43 1D8V_S0 1D8V_S0
HDA_SYNC Weak internal pull-down. Do not pull high. DGPU_PWROK 12,13,43 DDR_VREF_S3 DDR_VREF_S3
GPIO15 Weak internal pull-down. Do not pull high. 8,36,44 VCC_GFXCORE VCC_GFXCORE
B GPIO8 Weak internal pull-up. Do not pull low. 1D8V_S0_NV
FBVDD
GPIO27 Default = Do not connect (floating) 45,50,51,53,54,55 3D3V_S0_NV 3D3V_S0_NV
1D05V_S0_NV
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit. 45,50,51 VGA_CORE_S0 VGA_CORE_S0
Low (0) = Disables the VccVRM. Need to use on-board filter 50,54 1D8V_S0_NV 1D8V_S0_NV
circuits for analog rails.
>99ms 50,52,57,58 FBVDD FBVDD
S0_PWR_GOOD
(IMVP_VR_EN) 50,51,52,54,55 1D05V_S0_NV 1D05V_S0_NV

VCC_CORE
N11M-GE Power Sequence
VR_CLKEN#

VDD33
Platform CORE_PWRGD
PEX_VDD can ramp up any time
controlled (SYS_PWROK, PCH_PWROK)
PEX_VDD
tNVVDD Sillicon
controlled PM_DRAM_PWRGD
NVVDD
tNV-IFPAB_IOVDD
H_PWRGD
IFPAB_IOVDD

tNV-FBVDDQ PLT_RST#
FBVDDQ

A A
<Core Design>

Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

02_Reference
Size Document Number Rev
A2 LA46 MB -1

Date: Wednesday, January 27, 2010 Sheet 2 of 58


5 4 3 2 1
-1 0107
http://hobi-elektronika.net
FOR CO-LAY SLG8LV595
3D3V_S0 3D3V_CK505 1D5V_S0_CK505 1D5V_S0 1D5V_S0_CK505 1D05V_S0 1D05V_CK505

1 2 1 DY 2 -1 0107
R247 1 2

1
0R0603-PAD C358 C347 C348 C369 C346 C383 C349 R264 R268

1
0R3J-0-U-GP 0R0603-PAD C402 C401 C376 C384

1
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC47P50V2JN-3GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

SC47P50V2JN-3GP
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP
R258

2
D 3D3V_CK505
0R3J-0-U-GP
1D05V_CK505 D

2
Low voltage I/O power
supply for outputs.

VGA 27M RNT1 R75 X1 R79 R80 C107 C131

24

17

29

15

18
1

5
U27
Crystal DY DY Mount Mount Mount Mount Mount

VDD_27

VDD_SRC_IO
VDD_SRC

VDD_CPU_IO
VDD_CPU

VDD_DOT
VDD_REF
CLK GEN Mount Mount DY DY DY DY DY

DY
15 DREFCLK# 4 6 VGA_XIN1_L 4 1 RNT1 VGA_XIN1 55
DOT_96# 27MHZ OSC_SPREAD_L
15 DREFCLK 3 DOT_96 27MHZ_SS 7 3 2 SRN33J-5-GP-U OSC_SPREAD 55

15 CLKIN_DMI# 14 FOR DIS


SRC_2# CPU_STOP#
15 CLKIN_DMI 13 SRC_2 CPU_STOP# 16
25 CK_PWRGD
CKPWRGD/PD# REF_0/CPU_SEL R249 1
15 CLK_PCIE_SATA# 11 SRC_1/SATA# REF_0/CPU_SEL 30 2 33R2J-2-GP CLK_ICH14 15
15 CLK_PCIE_SATA 10 SRC_1/SATA
C C

1
15 CLK_CPU_BCLK# 22 28 GEN_XTAL_IN
CPU_0# XTAL_IN GEN_XTAL_OUT C351
15 CLK_CPU_BCLK 23 CPU_0 XTAL_OUT 27 DY
SC10P50V2JN-4GP

2
-1 0111 19 CPU_1# SDA 31 PCH_SMBDATA 12,13,15
20 CPU_1 SCL 32 PCH_SMBCLK 12,13,15

VSS_SATA
VSS_SRC
VSS_CPU

VSS_DOT
VSS_REF

VSS_27
GND
SLG8SP585VTR-GP

33

26

21

12

9
2ND = 71.93197.003

3D3V_CK505
1D05V_CK505 3D3V_CK505
1 2 CPU_STOP#
R255 10KR2J-3-GP
2
2

3.3V LVTTL input for CPU_STOP#. Contains


R251 10KR2J-3-GP internal pull-up resistor.
DY 2K2R2J-2-GP R266
B B
1
1

CK_PWRGD CL=20pF±0.2pF
REF_0/CPU_SEL C370
Layout Notes:
SC10P50V2JN-4GP
D

1 2 GEN_XTAL_IN Make sure that the stubs to the


2

FSC 0 1 Q21 test points(CK_PWRGD, CLK_EN#,

1
R250 X4
10KR2J-3-GP G 82.30005.A51
GEN_XTAL_OUT) in the layout are as
38 VR_CLKEN# 2N7002A-7-GP X-14D31818M-50GP short as possible on the high speed
133MHz
SPEED 100MHz 2ND = 82.30005.C51 signals.
1

2
(Default) 1 2 GEN_XTAL_OUT
S

SB-1015 change to 84.2N702.E31 C377


SC12P50V2JN-3GP

SB BOM change to 82.30005.A51

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

03_Clock Generator SLG8SP585


Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 3 of 58
5 4 3 2 1
CPU1A 1 OF 9 http://hobi-elektronika.net
PEG_IRCOMP_R
R500
PEG_ICOMPI B26 1 2 49D9R2F-GP
PEG_ICOMPO A26
16 DMI_TXN0 A24 B27 R498

AUBURNDALE
DMI_RX0# PEG_RCOMPO EXP_RBIAS
16 DMI_TXN1 C23 DMI_RX1# PEG_RBIAS A25 1 2 750R2F-GP
16 DMI_TXN2 B22 DMI_RX2# PEG_RXN[15..0] 51
16 DMI_TXN3 A21 K35 PEG_RXN15
DMI_RX3# PEG_RX0# PEG_RXN14
PEG_RX1# J34
16 DMI_TXP0 B24 J33 PEG_RXN13
DMI_RX0 PEG_RX2# PEG_RXN12
16 DMI_TXP1 D23 DMI_RX1 PEG_RX3# G35

DMI
16 DMI_TXP2 B23 G32 PEG_RXN11
DMI_RX2 PEG_RX4#
D 16 DMI_TXP3 A22 DMI_RX3 PEG_RX5#
PEG_RX6#
F34
F31
PEG_RXN10
PEG_RXN9 D
16 DMI_RXN0 D24 D35 PEG_RXN8
DMI_TX0# PEG_RX7# PEG_RXN7
16 DMI_RXN1 G24 DMI_TX1# PEG_RX8# E33
16 DMI_RXN2 F23 C33 PEG_RXN6
DMI_TX2# PEG_RX9# PEG_RXN5
16 DMI_RXN3 H23 DMI_TX3# PEG_RX10# D32
B32 PEG_RXN4
PEG_RX11# PEG_RXN3
16 DMI_RXP0 D25 DMI_TX0 PEG_RX12# C31
16 DMI_RXP1 F24 B28 PEG_RXN2
DMI_TX1 PEG_RX13# PEG_RXN1
16 DMI_RXP2 E23 DMI_TX2 PEG_RX14# B30
16 DMI_RXP3 G23 A31 PEG_RXN0
DMI_TX3 PEG_RX15#
PEG_RXP15 PEG_RXP[15..0] 51
PEG_RX0 J35
H34 PEG_RXP14
PEG_RX1 PEG_RXP13
PEG_RX2 H33
16 FDI_TXN0 E22 F35 PEG_RXP12
FDI_TX0# PEG_RX3 PEG_RXP11
16 FDI_TXN1 D21 FDI_TX1# PEG_RX4 G33
16 FDI_TXN2 D19 E34 PEG_RXP10
FDI_TX2# PEG_RX5 PEG_RXP9
16 FDI_TXN3 D18 FDI_TX3# PEG_RX6 F32

Intel(R) FDI
16 FDI_TXN4 G21 D34 PEG_RXP8
FDI_TX4# PEG_RX7 PEG_RXP7
16 FDI_TXN5 E19 FDI_TX5# PEG_RX8 F33
16 FDI_TXN6 F21 B33 PEG_RXP6
FDI_TX6# PEG_RX9 PEG_RXP5
16 FDI_TXN7 G18 FDI_TX7# PEG_RX10 D31
A32 PEG_RXP4
PEG_RX11 PEG_RXP3
PEG_RX12 C30
16 FDI_TXP0 D22 A28 PEG_RXP2
FDI_TX0 PEG_RX13

PCI EXPRESS -- GRAPHICS


16 FDI_TXP1 C21 B29 PEG_RXP1
FDI_TX1 PEG_RX14 PEG_RXP0
16 FDI_TXP2 D20 FDI_TX2 PEG_RX15 A30
16 FDI_TXP3 C18 FDI_TX3 PEG_TXN[15..0] 51
PEG_TXN15_L C632 SCD1U10V2KX-5GP PEG_TXN15
C 16
16
FDI_TXP4
FDI_TXP5
G22
E20
FDI_TX4
FDI_TX5
PEG_TX0#
PEG_TX1#
L33
M35 PEG_TXN14_L
DIS
DIS
1
1
2
2 C628 SCD1U10V2KX-5GP PEG_TXN14 C
16 FDI_TXP6 F20 M33 PEG_TXN13_L DIS 1 2 C630 SCD1U10V2KX-5GP PEG_TXN13
FDI_TX6 PEG_TX2# PEG_TXN12_L C342 SCD1U10V2KX-5GP PEG_TXN12
16 FDI_TXP7 G19 FDI_TX7 PEG_TX3# M30 DIS 1 2
L31 PEG_TXN11_L DIS 1 2 C343 SCD1U10V2KX-5GP PEG_TXN11
PEG_TX4# PEG_TXN10_L C340 SCD1U10V2KX-5GP PEG_TXN10
16 FDI_FSYNC0 F17 FDI_FSYNC0 PEG_TX5# K32 DIS 1 2
E17 M29 PEG_TXN9_L DIS 1 2 C338 SCD1U10V2KX-5GP PEG_TXN9
16 FDI_FSYNC1 FDI_FSYNC1 PEG_TX6# PEG_TXN8_L C345 SCD1U10V2KX-5GP PEG_TXN8
PEG_TX7# J31 DIS 1 2
C17 K29 PEG_TXN7_L DIS 1 2 C335 SCD1U10V2KX-5GP PEG_TXN7
16 FDI_INT FDI_INT PEG_TX8# PEG_TXN6_L C316 SCD1U10V2KX-5GP PEG_TXN6
PEG_TX9# H30 DIS 1 2
F18 H29 PEG_TXN5_L DIS 1 2 C312 SCD1U10V2KX-5GP PEG_TXN5
16 FDI_LSYNC0 FDI_LSYNC0 PEG_TX10# PEG_TXN4_L C294 SCD1U10V2KX-5GP PEG_TXN4
16 FDI_LSYNC1 D17 FDI_LSYNC1 PEG_TX11# F29 DIS 1 2
E28 PEG_TXN3_L DIS 1 2 C270 SCD1U10V2KX-5GP PEG_TXN3
PEG_TX12# PEG_TXN2_L C272 SCD1U10V2KX-5GP PEG_TXN2
PEG_TX13# D29 DIS 1 2
D27 PEG_TXN1_L DIS 1 2 C260 SCD1U10V2KX-5GP PEG_TXN1
PEG_TX14# PEG_TXN0_L C258 SCD1U10V2KX-5GP PEG_TXN0
PEG_TX15# C26 DIS 1 2
PEG_TXP[15..0] 51
L34 PEG_TXP15_L DIS 1 2 C633 SCD1U10V2KX-5GP PEG_TXP15
PEG_TX0 PEG_TXP14_L C629 SCD1U10V2KX-5GP PEG_TXP14
PEG_TX1 M34 DIS 1 2
M32 PEG_TXP13_L DIS 1 2 C631 SCD1U10V2KX-5GP PEG_TXP13
PEG_TX2 PEG_TXP12_L C341 SCD1U10V2KX-5GP PEG_TXP12
PEG_TX3 L30 DIS 1 2
M31 PEG_TXP11_L DIS 1 2 C344 SCD1U10V2KX-5GP PEG_TXP11
PEG_TX4 PEG_TXP10_L C339 SCD1U10V2KX-5GP PEG_TXP10
PEG_TX5 K31 DIS 1 2
M28 PEG_TXP9_L DIS 1 2 C337 SCD1U10V2KX-5GP PEG_TXP9
PEG_TX6 PEG_TXP8_L C336 SCD1U10V2KX-5GP PEG_TXP8
PEG_TX7 H31 DIS 1 2
K28 PEG_TXP7_L DIS 1 2 C332 SCD1U10V2KX-5GP PEG_TXP7
PEG_TX8 PEG_TXP6_L C320 SCD1U10V2KX-5GP PEG_TXP6
PEG_TX9 G30 DIS 1 2
G29 PEG_TXP5_L DIS 1 2 C302 SCD1U10V2KX-5GP PEG_TXP5
PEG_TX10 PEG_TXP4_L C277 SCD1U10V2KX-5GP PEG_TXP4
PEG_TX11 F28 DIS 1 2
E27 PEG_TXP3_L DIS 1 2 C268 SCD1U10V2KX-5GP PEG_TXP3
B PEG_TX12
PEG_TX13 D28 PEG_TXP2_L
PEG_TXP1_L
DIS 1 2 C276
C263
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PEG_TXP2
PEG_TXP1
B
PEG_TX14 C27 DIS 1 2
C25 PEG_TXP0_L DIS 1 2 C252 SCD1U10V2KX-5GP PEG_TXP0
PEG_TX15

AUBURUNF

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

04_CPU (1/7)-PEG / DMI / FDI


Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 4 of 58
5 4 3 2 1
1D05V_VTT

1 2 H_CATERR#
R496
1

1
2

2
20R2F-GP
H_COMP3

H_COMP2
AT23

AT24
CPU1B
COMP3 http://hobi-elektronika.net 2 OF 9

BCLK A16
B16
BCLK_CPU_P
BCLK_CPU_N
BCLK_CPU_P 19
DPLL_REF_SSCLK# 1
RN77
4
SM_RCOMP_0
R90
1 2
100R2F-L1-GP-U

AUBURNDALE
COMP2 BCLK# BCLK_CPU_N 19
R162 49D9R2F-GP R497 20R2F-GP DPLL_REF_SSCLK 2 3 SM_RCOMP_1 1 2

MISC
CLOCKS
1 2 PROCHOT# 1 2 H_COMP1 G16 AR30 R91 24D9R2F-L-GP
R207 68R2-GP R179 49D9R2F-GP COMP1 BCLK_ITP SRN0J-6-GP SM_RCOMP_2
BCLK_ITP# AT30 1 2
1 2 H_COMP0 AT26 DY R92 130R2F-1-GP
R499 49D9R2F-GP COMP0 PEG_CLK_R -1 0112
PEG_CLK E16 PEG_CLK_R 15
D16 PEG_CLK#_R impedance compensation
PEG_CLK# PEG_CLK#_R 15
TPAD14-GP TP41 1 SKTOCC#_R AH24 SKTOCC# DPLL_REF_SSCLK
DPLL_REF_SSCLK A18 DPLL_REF_SSCLK 15
D SKTOCC# (Socket Occupied)
H_CATERR# AK14 CATERR#
DPLL_REF_SSCLK# A17 DPLL_REF_SSCLK# DPLL_REF_SSCLK# 15
SA 0901 : LC require to reserve

1D5V_S3
D

THERMAL
F6 DDR3_DRAMRST#_R
SM_DRAMRST#

2
AT15 RN30 1D05V_VTT
19 H_PECI PECI
AL1 SM_RCOMP_0 SRN10KJ-5-GP R479
H_PROCHOT# SM_RCOMP0 SM_RCOMP_1 1KR2J-1-GP
SM_RCOMP1 AM1 1 4
If using an optional glue AN1 SM_RCOMP_2 2 3 S3_DY
logic receiver, a series R209 1 PROCHOT# SM_RCOMP2
38 H_PROCHOT# 2 0R2J-2-GP AN26

1
resistor of 2.2 k ±5% is PROCHOT# DDR3_DRAMRST#_R
DY PM_EXT_TS0# AN15 PM_EXTTS#0_R 12 1 2 DDR3_DRAMRST# 12,13
needed. R484 0R2J-2-GP
PM_EXT_TS1# AP15 PM_EXTTS#1_R 13 S3
-1 0112

DDR3
MISC
19,36 PM_THRMTRIP-A# AK15 THERMTRIP#
S3_DY Q49
130°C 2 3 BSS138LT1

D
AT28 XDP_PRDY# 1 TP106 TPAD14-GP
PRDY#

1
AP27 XDP_PREQ# 2ND = 84.00138.G31
PREQ# R489 Vgs(th)<=1.5V SC CHECK

1
AN28 XDP_TCLK 100KR2J-1-GP
TPAD14-GP TP50 H_CPURST# TCK XDP_TMS

G
1 AP26 RESET_OBS# TMS AP28 S3_DY

PWR MANAGEMENT
AT27 XDP_TRST#
RST_GATE 19

2
TRST#

JTAG & BPM

2
AL15 AT29 XDP_TDI
16 H_PM_SYNC PM_SYNC TDI
AR27 XDP_TDO C601
TDO XDP_TDI_M SCD1U10V2KX-5GP
AR29

1
VCCPWRGOOD_1 TDI_M XDP_TDO_M
19,36 H_PWRGD 1 2 AN14 VCCPWRGOOD_1 TDO_M AP29 S3_DY
R493
0R0402-PAD AN25 XDP_DBRESET#
VCCPWRGOOD_0 DBR#
2 R213
C 1
0R0402-PAD
AN27 VCCPWRGOOD_0

BPM0# AJ22
C
1 2 DRAMPWROK AK13 AK22 1D05V_VTT
16 PM_DRAM_PWRGD SM_DRAMPWROK BPM1#
R119 0R0402-PAD AK24 CPU JTAG
BPM2# XDP_TMS
BPM3# AJ24 1 DY 2
-1 0107 H_VTTPWRGD AM15 AJ25 R503 51R2J-2-GP XDP_TDO_M
VTTPWRGOOD BPM4# XDP_TDI
BPM5# AH22 1 DY 2

1
AK23 R504 51R2J-2-GP
TPAD14-GP TP53 H_PWRGD_XDP BPM6# XDP_PREQ# R505
1 AM26 TAPPWRGOOD BPM7# AH23 1 DY 2
R205 51R2J-2-GP -1 0107 0R0402-PAD
XDP_TDO 1 2
18,29,31,33,35,51 PLT_RST# R128 1 2 PLT_RST#_R AL14 R502 51R2J-2-GP

2
RSTIN# XDP_TDI_M
1

1K5R2F-2-GP
R132
750R2F-GP AUBURUNF XDP_TCLK 1 DY 2 3D3V_S0
R215 51R2J-2-GP
XDP_DBRESET# 1 2
2

XDP_TRST# 1 2 R203
R501 51R2J-2-GP 1KR2J-1-GP
check list: 5k pu

SA 0903

3D3V_S5
3D3V_S5
1D5V_S3 3D3V_S0

B B
1

1
1

1
C593 R492
S3 R125 SCD1U10V2KX-5GP R494 100KR2J-1-GP
2

1K1R2F-GP U58 S3_DY 10KR2J-3-GP


1 Q51

2
16,31,33,36,41,42,43,44 PM_SLP_S3# B SC 1130 change to 1.5Kohm 1D05V_VTT
5 1 6
2

2
VCC
2 A
DRAMPWROK 33,42 VTT_PWRGD CPU_VDDQ_PWRGD R486 1 DRAMPWROK VTT_PWRGD H_VTTPWRGD_R
Y 4 2 33,42 VTT_PWRGD 2 5

1
3 GND
1

1K5R2F-2-GP 3 4 R495

2
R120 74LVC1G08GW-1-GP S3_DY R487 C617 1KR2J-1-GP
S3 3KR2F-GP S3_DY 750R2F-GP SCD1U10V2KX-5GP DMN66D0LDW-7-GP
CPU_VDDQ_PWRGD 43 S3_DY DY

2
-1 0114 SB 1015 change to 84.DMN66.03F H_VTTPWRGD
2

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

05_CPU (2/7)-HOST
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 5 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net CPU1D 4 OF 9

CPU1C 3 OF 9

AUBURNDALE
AUBURNDALE
13 M_B_DQ[63..0] SB_CK0 W8 M_CLK_DDR2 13
SB_CK0# W9 M_CLK_DDR#2 13
AA6 M_B_DQ0 B5 M3
SA_CK0 M_CLK_DDR0 12 SB_DQ0 SB_CKE0 M_CKE2 13
AA7 M_B_DQ1 A5
12 M_A_DQ[63..0] SA_CK0# M_CLK_DDR#0 12 SB_DQ1
P7 M_CKE0 12 M_B_DQ2 C3
D M_A_DQ0
M_A_DQ1
A10
C10
SA_DQ0
SA_DQ1
SA_CKE0 M_B_DQ3
M_B_DQ4
B3
E4
SB_DQ2
SB_DQ3
SB_DQ4
SB_CK1
SB_CK1#
V7
V6
M_CLK_DDR3 13
M_CLK_DDR#3 13
M_A_DQ2 C7 M_B_DQ5 A6 M2 M_CKE3 13
M_A_DQ3 SA_DQ2 M_B_DQ6 SB_DQ5 SB_CKE1
A7 SA_DQ3 SA_CK1 Y6 M_CLK_DDR1 12 A4 SB_DQ6
M_A_DQ4 B10 Y5 M_B_DQ7 C4
SA_DQ4 SA_CK1# M_CLK_DDR#1 12 SB_DQ7
M_A_DQ5 D10 P6 M_CKE1 12 M_B_DQ8 D1
M_A_DQ6 SA_DQ5 SA_CKE1 M_B_DQ9 SB_DQ8
E10 SA_DQ6 D2 SB_DQ9
M_A_DQ7 A8 M_B_DQ10 F2 AB8
SA_DQ7 SB_DQ10 SB_CS0# M_CS#2 13
M_A_DQ8 D8 M_B_DQ11 F1 AD6 M_CS#3 13
M_A_DQ9 SA_DQ8 M_B_DQ12 SB_DQ11 SB_CS1#
F10 SA_DQ9 SA_CS0# AE2 M_CS#0 12 C2 SB_DQ12
M_A_DQ10 E6 AE8 M_B_DQ13 F5
SA_DQ10 SA_CS1# M_CS#1 12 SB_DQ13
M_A_DQ11 F7 M_B_DQ14 F3
M_A_DQ12 SA_DQ11 M_B_DQ15 SB_DQ14
E9 SA_DQ12 G4 SB_DQ15 SB_ODT0 AC7 M_ODT2 13
M_A_DQ13 B7 M_B_DQ16 H6 AD1 M_ODT3 13
M_A_DQ14 SA_DQ13 M_B_DQ17 SB_DQ16 SB_ODT1
E7 SA_DQ14 SA_ODT0 AD8 M_ODT0 12 G2 SB_DQ17
M_A_DQ15 C6 AF9 M_B_DQ18 J6
SA_DQ15 SA_ODT1 M_ODT1 12 SB_DQ18
M_A_DQ16 H10 M_B_DQ19 J3
M_A_DQ17 SA_DQ16 M_B_DQ20 SB_DQ19
G8 SA_DQ17 G1 SB_DQ20 M_B_DM[7..0] 13
M_A_DQ18 K7 M_B_DQ21 G5 D4 M_B_DM0
M_A_DQ19 SA_DQ18 M_B_DQ22 SB_DQ21 SB_DM0 M_B_DM1
J8 SA_DQ19 J2 SB_DQ22 SB_DM1 E1
M_A_DQ20 G7 M_B_DQ23 J1 H3 M_B_DM2
M_A_DQ21 SA_DQ20 M_B_DQ24 SB_DQ23 SB_DM2 M_B_DM3
G10 SA_DQ21 M_A_DM[7..0] 12 J5 SB_DQ24 SB_DM3 K1
M_A_DQ22 J7 B9 M_A_DM0 M_B_DQ25 K2 AH1 M_B_DM4
M_A_DQ23 SA_DQ22 SA_DM0 M_A_DM1 M_B_DQ26 SB_DQ25 SB_DM4 M_B_DM5
J10 SA_DQ23 SA_DM1 D7 L3 SB_DQ26 SB_DM5 AL2
M_A_DQ24 L7 H7 M_A_DM2 M_B_DQ27 M1 AR4 M_B_DM6
M_A_DQ25 SA_DQ24 SA_DM2 M_A_DM3 M_B_DQ28 SB_DQ27 SB_DM6 M_B_DM7
M6 SA_DQ25 SA_DM3 M7 K5 SB_DQ28 SB_DM7 AT8
M_A_DQ26 M8 AG6 M_A_DM4 M_B_DQ29 K4
M_A_DQ27 SA_DQ26 SA_DM4 M_A_DM5 M_B_DQ30 SB_DQ29
L9 SA_DQ27 SA_DM5 AM7 M4 SB_DQ30
M_A_DQ28 L6 AN10 M_A_DM6 M_B_DQ31 N5
M_A_DQ29 SA_DQ28 SA_DM6 M_A_DM7 M_B_DQ32 SB_DQ31
K8 SA_DQ29 SA_DM7 AN13 AF3 SB_DQ32
C M_A_DQ30
M_A_DQ31
M_A_DQ32
N8
P9
SA_DQ30
SA_DQ31
M_B_DQ33
M_B_DQ34
M_B_DQ35
AG1
AJ3
SB_DQ33
SB_DQ34 SB_DQS0# D5 M_B_DQS#0
M_B_DQS#1
M_B_DQS#[7..0] 13
AH5 SA_DQ32 AK1 SB_DQ35 SB_DQS1# F4
M_A_DQ33 AF5 M_A_DQS#[7..0] 12 M_B_DQ36 AG4 J4 M_B_DQS#2
M_A_DQ34 SA_DQ33 M_A_DQS#0 M_B_DQ37 SB_DQ36 SB_DQS2# M_B_DQS#3
AK6 SA_DQ34 SA_DQS0# C9 AG3 SB_DQ37 SB_DQS3# L4
M_A_DQ35 AK7 F8 M_A_DQS#1 M_B_DQ38 AJ4 AH2 M_B_DQS#4
M_A_DQ36 SA_DQ35 SA_DQS1# M_A_DQS#2 M_B_DQ39 SB_DQ38 SB_DQS4# M_B_DQS#5
AF6 SA_DQ36 SA_DQS2# J9 AH4 SB_DQ39 SB_DQS5# AL4
M_A_DQ37 AG5 N9 M_A_DQS#3 M_B_DQ40 AK3 AR5 M_B_DQS#6
M_A_DQ38 SA_DQ37 SA_DQS3# M_A_DQS#4 M_B_DQ41 SB_DQ40 SB_DQS6# M_B_DQS#7
AJ7 SA_DQ38 SA_DQS4# AH7 AK4 SB_DQ41 SB_DQS7# AR8
DDR SYSTEM MEMORY A

M_A_DQ39 AJ6 AK9 M_A_DQS#5 M_B_DQ42 AM6


SA_DQ39 SA_DQS5# SB_DQ42

DDR SYSTEM MEMORY - B


M_A_DQ40 AJ10 AP11 M_A_DQS#6 M_B_DQ43 AN2
M_A_DQ41 SA_DQ40 SA_DQS6# M_A_DQS#7 M_B_DQ44 SB_DQ43
AJ9 SA_DQ41 SA_DQS7# AT13 AK5 SB_DQ44
M_A_DQ42 AL10 M_B_DQ45 AK2
M_A_DQ43 SA_DQ42 M_B_DQ46 SB_DQ45
AK12 SA_DQ43 AM4 SB_DQ46
M_A_DQ44 AK8 M_B_DQ47 AM3 M_B_DQS[7..0] 13
M_A_DQ45 SA_DQ44 M_B_DQ48 SB_DQ47 M_B_DQS0
AL7 SA_DQ45 M_A_DQS[7..0] 12 AP3 SB_DQ48 SB_DQS0 C5
M_A_DQ46 AK11 C8 M_A_DQS0 M_B_DQ49 AN5 E3 M_B_DQS1
M_A_DQ47 SA_DQ46 SA_DQS0 M_A_DQS1 M_B_DQ50 SB_DQ49 SB_DQS1 M_B_DQS2
AL8 SA_DQ47 SA_DQS1 F9 AT4 SB_DQ50 SB_DQS2 H4
M_A_DQ48 AN8 H9 M_A_DQS2 M_B_DQ51 AN6 M5 M_B_DQS3
M_A_DQ49 SA_DQ48 SA_DQS2 M_A_DQS3 M_B_DQ52 SB_DQ51 SB_DQS3 M_B_DQS4
AM10 SA_DQ49 SA_DQS3 M9 AN4 SB_DQ52 SB_DQS4 AG2
M_A_DQ50 AR11 AH8 M_A_DQS4 M_B_DQ53 AN3 AL5 M_B_DQS5
M_A_DQ51 SA_DQ50 SA_DQS4 M_A_DQS5 M_B_DQ54 SB_DQ53 SB_DQS5 M_B_DQS6
AL11 SA_DQ51 SA_DQS5 AK10 AT5 SB_DQ54 SB_DQS6 AP5
M_A_DQ52 AM9 AN11 M_A_DQS6 M_B_DQ55 AT6 AR7 M_B_DQS7
M_A_DQ53 SA_DQ52 SA_DQS6 M_A_DQS7 M_B_DQ56 SB_DQ55 SB_DQS7
AN9 SA_DQ53 SA_DQS7 AR13 AN7 SB_DQ56
M_A_DQ54 AT11 M_B_DQ57 AP6
M_A_DQ55 SA_DQ54 M_B_DQ58 SB_DQ57
AP12 SA_DQ55 AP8 SB_DQ58
M_A_DQ56 AM12 M_B_DQ59 AT9
M_A_DQ57 SA_DQ56 M_B_DQ60 SB_DQ59
AN12 SA_DQ57 M_A_A[15..0] 12 AT7 SB_DQ60
M_A_DQ58 AM13 Y3 M_A_A0 M_B_DQ61 AP9
M_A_DQ59 SA_DQ58 SA_MA0 M_A_A1 M_B_DQ62 SB_DQ61
AT14 SA_DQ59 SA_MA1 W1 AR10 SB_DQ62 M_B_A[15..0] 13
M_A_DQ60 AT12 AA8 M_A_A2 M_B_DQ63 AT10 U5 M_B_A0
B M_A_DQ61
M_A_DQ62
AL13
AR14
SA_DQ60
SA_DQ61
SA_DQ62
SA_MA2
SA_MA3
SA_MA4
AA3
V1
M_A_A3
M_A_A4
SB_DQ63 SB_MA0
SB_MA1
SB_MA2
V2
T5
M_B_A1
M_B_A2
M_A_DQ63 AP14 AA9 M_A_A5 V3 M_B_A3
SA_DQ63 SA_MA5 M_A_A6 SB_MA3 M_B_A4
SA_MA6 V8 SB_MA4 R1
T1 M_A_A7 AB1 T8 M_B_A5
SA_MA7 13 M_B_BS0 SB_BS0 SB_MA5
Y9 M_A_A8 W5 R2 M_B_A6
SA_MA8 13 M_B_BS1 SB_BS1 SB_MA6
12 M_A_BS0 AC3 U6 M_A_A9 13 M_B_BS2 R7 R6 M_B_A7
SA_BS0 SA_MA9 M_A_A10 SB_BS2 SB_MA7 M_B_A8
12 M_A_BS1 AB2 SA_BS1 SA_MA10 AD4 SB_MA8 R4
U7 T2 M_A_A11 R5 M_B_A9
12 M_A_BS2 SA_BS2 SA_MA11 SB_MA9
U3 M_A_A12 13 M_B_CAS# AC5 AB5 M_B_A10
SA_MA12 M_A_A13 SB_CAS# SB_MA10 M_B_A11
SA_MA13 AG8 13 M_B_RAS# Y7 SB_RAS# SB_MA11 P3
T3 M_A_A14 AC6 R3 M_B_A12
SA_MA14 13 M_B_WE# SB_WE# SB_MA12
12 M_A_CAS# AE1 V9 M_A_A15 AF7 M_B_A13
SA_CAS# SA_MA15 SB_MA13 M_B_A14
12 M_A_RAS# AB3 SA_RAS# SB_MA14 P5
AE9 N1 M_B_A15
12 M_A_WE# SA_WE# SB_MA15

AUBURUNF

AUBURUNF

A <Core Design>
A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

06_CPU (3/7)-MEM INTERFACE


Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 6 of 58

5 4 3 2 1
5 4 3 2 1
CPU1F http://hobi-elektronika.net 6 OF 9

AUBURNDALE
VCC_CORE
PROCESSOR CORE POWER 1D05V_VTT SA 0917

48A -->Arrandale AG35 VCC VTT0 AH14 1D05V_VTT


AG34 AH12 C621 C616 C613 C605 C603 C604 C611
VCC VTT0

1
AG33 AH11
VCC VTT0

2
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AG32 AH10 C636
VCC VTT0 SCD1U10V2KX-5GP
AG31 J14
D D

2
VCC VTT0
AG30 J13 DY

1
VCC VTT0
AG29 H14
VCC VTT0
AG28 H12
VCC_CORE VCC VTT0
AG27 G14
VCC VTT0
AG26 G13
VCC VTT0
AF35 G12
VCC VTT0
AF34 G11
VCC VTT0
AF33 F14
C244 C235 C236 C238 C237 C239 VCC VTT0
AF32 F13
VCC VTT0
1

1
AF31 F12
VCC VTT0
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AF30 F11
VCC VTT0
AF29 E14 The decoupling capacitors, filter
2

2
VCC VTT0
AF28 VCC VTT0 E12
AF27 D14 recommendations and sense resistors on the
VCC VTT0
AF26 VCC VTT0 D13 CPU/PCH Rails are specific to the CRB

1.1V RAIL POWER


AD35 VCC VTT0 D12
AD34 VCC VTT0 D11 Implementation. Customers need to follow the
AD33 VCC VTT0 C14 recommendations in the Calpella Platform
AD32 VCC VTT0 C13
AD31 VCC VTT0 C12 Design Guide.
AD30 VCC VTT0 C11
C240 C618 C619 C620 C241 AD29 B14
VCC VTT0
1

AD28 VCC VTT0 B12


SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

AD27 VCC VTT0 A14


AD26 A13
2

VCC VTT0
AC35 VCC VTT0 A12
AC34 VCC VTT0 A11
AC33 VCC
AC32 1D05V_VTT
VCC
AC31 VCC
AC30 VCC VTT0 AF10
AC29 VCC VTT0 AE10

C AC28 VCC VTT0 AC10 C602 C218


C

1
CPU CORE SUPPLY
C267 C251 AC27 AB10
VCC VTT0
1

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AC26 VCC VTT0 Y10
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

AA35 W10

2
VCC VTT0
AA34 U10
2

VCC VTT0
AA33 VCC VTT0 T10
AA32 VCC VTT0 J12
AA31 J11
VCC VTT0
AA30 J16
VCC VTT0
AA29 J15
VCC VTT0
AA28
VCC
AA27
VCC Please note that the VTT Rail
AA26 Values are Auburndale
VCC
Y35
VCC VTT=1.05V; Clarksfield
Y34
C242 C243 C627 C634 C635 VCC VTT=1.1V
Y33
VCC
1

Y32
VCC
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

Y31
VCC
Y30
2

VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35 AN33 PSI# 38
VCC PSI#
V34
VCC
V33 H_VID[6..0] 38
VCC H_VID0
V32 AK35
VCC VID0 H_VID1
V31 AK33
VCC VID1 H_VID2
V30 AK34
POWER

VCC VID2 H_VID3


V29 AL35
VCC VID3
CPU VIDS

V28 AL33 H_VID4


VCC VID4 H_VID5
V27 AM33
VCC VID5 H_VID6
V26 AM35
B U35
U34
VCC
VCC
VCC
VID6
PROC_DPRSLPVR
AM34 PM_DPRSLPVR 38 B
U33
VCC
U32
VCC H_VTTVID1
U31 G15 1
VCC VTT_SELECT TP35 TPAD14-GP
U30
VCC Clarksfield H_VTTVID1 = Low, VTT = 1.1V
U29
VCC
U28 Arrandale H_VTTVID1 = High, VTT = 1.05V
VCC
U27
VCC VCC_CORE
U26
VCC
R35
VCC
R34
VCC

1
R33
VCC R238
R32 AN35 IMVP_IMON 38
VCC ISENSE 100R2F-L1-GP-U
R31
VCC
R30
VCC
R29

2
VCC
SENSE LINES

R28 AJ34 VCC_SENSE 38


VCC VCC_SENSE
R27 AJ35 VSS_SENSE 38
VCC VSS_SENSE
R26
VCC

1
P35
VCC R232
P34 B15 VTT_SENSE 42
VCC VTT_SENSE 100R2F-L1-GP-U
P33 A15
VCC VSS_SENSE_VTT
P32
VCC
P31

2
VCC
P30
VCC
SB 1019 remove test point
P29
VCC
P28
VCC
P27
VCC
P26
VCC

A <Core Design>
A
Wistron Corporation
AUBURUNF 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

07_CPU (4/7)-POWER
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 7 of 58
5 4 3 2 1
VCC_GFXCORE CPU1G
http://hobi-elektronika.net 7 OF 9

AT21

AUBURNDALE
VAXG1
AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE 44

SENSE
LINES
AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE 44
AT16 VAXG4
C614 C216 C223 C612 C610 C609 C233 C234 AR21 VAXG5
1

1
AR19 VAXG6
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AR18 VAXG7
SA 0901: LC require to reserve s3 reduce
AR16 AM22 GFX_VID0 GFX_VID[6..0] 44 power circuit
2

2
VAXG8 GFX_VID0 GFX_VID1
DY DY DY DY AP21 VAXG9 GFX_VID1 AP22

GRAPHICS VIDs
AP19 AN22 GFX_VID2
VAXG10 GFX_VID2
D AP18
AP16
VAXG11
VAXG12
GFX_VID3
GFX_VID4
AP23
AM23
GFX_VID3
GFX_VID4 1D5V_CPU_VDDQ 1D5V_S3 D
AN21 AP24 GFX_VID5
VAXG13 GFX_VID5

GRAPHICS
AN19 AN24 GFX_VID6 GFX_VR_EN:
VAXG14 GFX_VID6 4.7-k pull-down to GND at PWM
AN18 VAXG15
AN16 VAXG16 1 S3 2
AM21 AR25 GFX_VR_EN 44 R454 1 S3 2 0R2J-2-GP
VAXG17 GFX_VR_EN R453 0R2J-2-GP
AM19 VAXG18 GFX_DPRSLPVR AT25 GFX_DPRSLPVR 44 1 S3 2
AM18 AM24 GFX_IMON 44 R455 1 S3 2 0R2J-2-GP
VAXG19 GFX_IMON R456 0R2J-2-GP
AM16 VAXG20 1 S3 2
AL21 R457 0R2J-2-GP
VAXG21
AL19 VAXG22
AL18 VAXG23
AL16 VAXG24 6A U56 S3_DY
AK21 AJ1 1 S D 8
VAXG25 VDDQ S D
AK19 VAXG26 VDDQ AF1 2 7

1
AK18 AE7 C201 C203 C202 C204 C182 C184 C185 C186 3 S D 6

- 1.5V RAILS
VAXG27 VDDQ G D
AK16 VAXG28 VDDQ AE4 4 5

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
Please note that the VTT Rail AJ21 AC1

2
VAXG29 VDDQ

SC10U6D3V3MX-GP
AJ19 AB7 AO4468-GP
Values are Auburndale VAXG30 VDDQ
AJ18 VAXG31 VDDQ AB4 84.04468.037
VTT=1.05V; Clarksfield AJ16 Y1 2nd = 84.04800.D37
VAXG32 VDDQ RUN_POWER_ON
VTT=1.1V AH21 VAXG33 VDDQ W7
AH19 VAXG34 VDDQ W4
AH18 U1 U37_G 1 S3_DY 2
VAXG35 VDDQ R459 0R2J-2-GP
AH16 VAXG36 VDDQ T7
VDDQ T4
C570

POWER
VDDQ P1

1
N7 SCD01U50V2KX-1GP
1D05V_VTT VDDQ
C VDDQ N4 S3_DY
C

DDR3
L1

2
VDDQ
J24 VTT1 VDDQ H1

FDI
J23 VTT1
H25 VTT1
1

C607 C205
SC10U6D3V3MX-GP SC1U6D3V2KX-GP 1D5V_CPU_VDDQ
P10
2

VTT1 1D05V_VTT
VTT1 N10

2
VTT1 L10
K10 R466
VTT1
200R2J-L1-GP

1
C230 C606 S3_DY
SC1U6D3V2KX-GP SC10U6D3V3MX-GP

1
1D05V_VTT

2
1.1V
18A J22 Q64_D
VTT1
K26 VTT1 VTT1 J20
J27 VTT1 VTT1 J18
1D05V_VTT

PEG & DMI


J26 H21 Q45

D
VTT1 VTT1
1

TC7 C210 C208 C608 C255 J25 H20 2N7002A-7-GP


VTT1 VTT1 ESD Protect
H27 VTT1 VTT1 H19 S3_DY
ST220U2D5VBM-2GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

DY G28
2

VTT1

1
G27 C211 C209 G
VTT1 SC1U6D3V2KX-GP SC10U6D3V3MX-GP PM_SLP_S3 36
G26 VTT1
F26

2
VTT1 -1 0114
E26 L26

S
VTT1 VTT1

1.8V
E25 VTT1 VTT1 L27
VTT1 M26
1D8V_S0
0.6A
B +V1.8S_VCCSFR 1 2
B
R257

1
C256 C259 C246 C247 C381 0R0603-PAD
-1 0110

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC4D7U6D3V3KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AUBURUNF

2
SA 0903: Place across the plane

SB 1022 Remove

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

08_CPU (5/7)-Graphic PWR


Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 8 of 58
5 4 3 2 1
http://hobi-elektronika.net
CPU1H 8 OF 9 CPU1I 9 OF 9

AT20 VSS VSS AE34


AT17 AE33

AUBURNDALE

AUBURNDALE
VSS VSS
AR31 VSS VSS AE32 K27 VSS
AR28 VSS VSS AE31 K9 VSS
AR26 VSS VSS AE30 K6 VSS
AR24 VSS VSS AE29 K3 VSS
D AR23
AR20
VSS
VSS
VSS
VSS
AE28
AE27
J32
J30
VSS
VSS
D
AR17 VSS VSS AE26 J21 VSS
AR15 VSS VSS AE6 J19 VSS
AR12 VSS VSS AD10 H35 VSS
AR9 VSS VSS AC8 H32 VSS
AR6 VSS VSS AC4 H28 VSS
AR3 VSS VSS AC2 H26 VSS
AP20 VSS VSS AB35 H24 VSS
AP17 VSS VSS AB34 H22 VSS
AP13 VSS VSS AB33 H18 VSS
AP10 VSS VSS AB32 H15 VSS
AP7 VSS VSS AB31 H13 VSS
AP4 VSS VSS AB30 H11 VSS
AP2 VSS VSS AB29 H8 VSS
AN34 VSS VSS AB28 H5 VSS
AN31 VSS VSS AB27 H2 VSS
AN23 VSS VSS AB26 G34 VSS
AN20 VSS VSS AB6 G31 VSS
AN17 VSS VSS AA10 G20 VSS
AM29 VSS VSS Y8 G9 VSS
AM27 VSS VSS Y4 G6 VSS
AM25 VSS VSS Y2 G3 VSS
AM20 VSS VSS W35 F30 VSS
AM17 VSS VSS W34 F27 VSS
AM14 VSS VSS W33 F25 VSS
AM11 VSS VSS W32 F22 VSS
AM8 VSS VSS W31 F19 VSS
AM5 VSS VSS W30 F16 VSS
C AM2
AL34
VSS VSS W29
W28
E35
E32
VSS C
AL31
AL23
VSS
VSS
VSS
VSS VSS
VSS
VSS
W27
W26
E29
E24
VSS
VSS
VSS
VSS
AL20 VSS VSS W6 E21 VSS
AL17 VSS VSS V10 E18 VSS
AL12 VSS VSS U8 E13 VSS
AL9 VSS VSS U4 E11 VSS
AL6 VSS VSS U2 E8 VSS
AL3 VSS VSS T35 E5 VSS
AK29 VSS VSS T34 E2 VSS VSS_NCTF#AR34 AR34
AK27 VSS VSS T33 D33 VSS VSS_NCTF#B34 B34
AK25 T32 D30 B2

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
VSS VSS VSS VSS_NCTF#B2
AK20 T31 D26

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
VSS VSS VSS
AK17 VSS VSS T30 D9 VSS
AJ31 T29 D6 B1 TP_MCP_VSS_NCTF6 1 TP27 AFTE14P-GP
VSS VSS VSS VSS_NCTF#B1 TP_MCP_VSS_NCTF1 TP63 AFTE14P-GP
AJ23 VSS VSS T28 D3 VSS VSS_NCTF#A35 A35 1
AJ20 T27 C34 AT1 TP_MCP_VSS_NCTF2 1 TP26 AFTE14P-GP
VSS VSS VSS VSS_NCTF#AT1 TP_MCP_VSS_NCTF7 TP64 AFTE14P-GP
AJ17 VSS VSS T26 C32 VSS VSS_NCTF#AT35 AT35 1
AJ14 VSS VSS T6 C29 VSS RSVD_NCTF#AT33 AT33
AJ11 VSS VSS R10 C28 VSS RSVD_NCTF#AT34 AT34
AJ8 VSS VSS P8 C24 VSS RSVD_NCTF#AP35 AP35
AJ5 VSS VSS P4 C22 VSS RSVD_NCTF#AR35 AR35
AJ2 VSS VSS P2 C20 VSS RSVD_NCTF#AT3 AT3
AH35 VSS VSS N35 C19 VSS RSVD_NCTF#AR1 AR1
AH34 VSS VSS N34 C16 VSS RSVD_NCTF#AP1 AP1
AH33 VSS VSS N33 B31 VSS RSVD_NCTF#AT2 AT2
AH32 VSS VSS N32 B25 VSS RSVD_NCTF#C1 C1
AH31 N31 B21 A3

NCTF TEST PIN:


VSS VSS VSS RSVD_NCTF#A3
AH30 N30 B18 C35
B AH29
AH28
VSS
VSS
VSS
VSS N29
N28
B17
B13
VSS
VSS
RSVD_NCTF#C35
RSVD_NCTF#B35 B35
A34
B
VSS VSS VSS RSVD_NCTF#A34
AH27 VSS VSS N27 B11 VSS RSVD_NCTF#A33 A33
AH26 VSS VSS N26 B8 VSS
AH20 VSS VSS N6 B6 VSS
AH17 VSS VSS M10 B4 VSS
AH13 VSS VSS L35 A29 VSS
AH9 VSS VSS L32 A27 VSS
AH6 VSS VSS L29 A23 VSS
AH3 VSS VSS L8 A9 VSS
AG10 VSS VSS L5
AF8 VSS VSS L2
AF4 VSS VSS K34
AF2 VSS VSS K33
AE35 VSS VSS K30

AUBURUNF AUBURUNF

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

09_CPU (6/7)-VSS
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 9 of 58
5 4 3 2 1
CPU1E 5 OF 9
http://hobi-elektronika.net
AJ13 CFG0 PCI-Express Configuration Select

AUBURNDALE
RSVD#AJ13
RSVD#AJ12 AJ12

1
AP25 R236 1:Single PEG
RSVD#AP25 3KR2F-GP
AL25 RSVD#AL25 RSVD#AH25 AH25 DY CFG0 0:Bifurcation enabled
AL24 RSVD#AL24 RSVD#AK26 AK26
AL22

2
RSVD#AL22
AJ33 RSVD#AJ33 RSVD#AL26 AL26
D AG9
M27
RSVD#AG9
RSVD#M27
RSVD_NCTF#AR2 AR2
D
L28 RSVD#L28 RSVD#AJ26 AJ26
1 H_RSVD9_R J17 AJ27
TPAD14-GP TP37 H_RSVD10_R SA_DIMM_VREF# RSVD#AJ27 CFG3
1 H17 SB_DIMM_VREF# CFG3 - PCI-Express Static Lane Reversal
TPAD14-GP TP38 G25 RSVD#G25

1
G17 RSVD#G17
E31 R233 1 :Normal Operation
RSVD#E31 3KR2F-GP
E30 RSVD#E30 CFG3 0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...

2
RSVD#AL28 AL28
CFG0 AM30 AL29
CFG1 CFG0 RSVD#AL29 CFG4
1 AM28 CFG1 RSVD#AP30 AP30 CFG4 - Display Port Presence
TPAD14-GP TP51 1 CFG2 AP31 AP32
CFG2 RSVD#AP32

1
TPAD14-GP TP59 CFG3 AL32 AL27
CFG4 CFG3 RSVD#AL27 R235
AL30 CFG4 RSVD#AT31 AT31 1:Disabled; No Physical Display Port
1 CFG5 AM31 AT32 DY 3KR2F-GP CFG4
TPAD14-GP TP58 1 CFG6 AN29
CFG5 RSVD#AT32
AP33
attached to Embedded Display Port
CFG6 RSVD#AP33
TPAD14-GP TP55 CFG7 AM32 AR33 0:Enabled; An external Display Port

2
CFG8 CFG7 RSVD#AR33
1 AK32 CFG8 device is connected to the Embedded
TPAD14-GP TP61 1 CFG9 AK31

RESERVED
TPAD14-GP TP56 CFG10 CFG9 Display Port
1 AK28 CFG10
TPAD14-GP TP49 1 CFG11 AJ28
TPAD14-GP TP48 CFG12 CFG11
1 AN30 CFG12 RSVD#AR32 AR32
TPAD14-GP TP57 CFG13
C TPAD14-GP TP60
1
1 CFG14
AN32
AJ32
CFG13
CFG14
C
TPAD14-GP TP62 1 CFG15 AJ29 E15
TPAD14-GP TP52 CFG16 CFG15 RSVD_TP#E15
1 AJ30 CFG16 RSVD_TP#F15 F15
TPAD14-GP TP47 1 CFG17 AK30 A2 CFG7 CFG7(Reserved) - Temporarily used for early
TPAD14-GP TP54 CFG17 KEY
H16 D15
RSVD_TP#H16 RSVD#D15 Clarksfield samples.

1
RSVD#C15 C15
AJ15 RSVD64_R 1 R234
RSVD#AJ15 RSVD65_R TP36 TPAD14-GP 3KR2F-GP
RSVD#AH15 AH15 1 DY CFG7 Clarksfield (only for early samples pre-ES1) -
TP33 TPAD14-GP
B19
Connect to GND with 3.01K Ohm/5% resistor.

2
RSVD#B19
A19 RSVD#A19
Note: Only temporary for early CFD sample
1 H_RSVD17_R A20
TPAD14-GP TP105 1 H_RSVD18_R B20
RSVD#A20 (rPGA/BGA) [For details please refer to the
RSVD#B20
TPAD14-GP TP104
RSVD_TP#AA5 AA5 WW33 MoW and sighting report].
U9 RSVD#U9 RSVD_TP#AA4 AA4 For a common M/B design (for AUB and CFD),
T9 RSVD#T9 RSVD_TP#R8 R8
AD3 the pull-down resistor shouble be used. Does
RSVD_TP#AD3
AC9 RSVD#AC9 RSVD_TP#AD2 AD2 not impact AUB functionality.
AB9 RSVD#AB9 RSVD_TP#AA2 AA2
RSVD_TP#AA1 AA1
RSVD_TP#R9 R9
RSVD_TP#AG7 AG7
RSVD_TP#AE3 AE3

RSVD_TP#V4 V4
RSVD_TP#V5 V5
N2
B J29
J28
RSVD#J29
RSVD_TP#N2
RSVD_TP#AD5 AD5
AD7
B
RSVD#J28 RSVD_TP#AD7
RSVD_TP#W3 W3
RSVD_TP#W2 W2
RSVD_TP#N3 N3
RSVD_TP#AE5 AE5
RSVD_TP#AD9 AD9

AP34 RSVD_VSS 1 2
VSS R231
0R0402-PAD
-1 0114
AUBURUNF

VSS (AP34) can be left NC is


CRB implementation; EDS/DG
recommendation to GND.

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

10_CPU (7/7)-RESERVED
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 10 of 58
5 4 3 2 1
http://hobi-elektronika.net
T8
Close to PCH on top side. 2200p close to smsc2103 chip
H_THERMDA
SA 0905 change to 390p

3 1

1
E
B C389

1
B C183 SC2200P50V2KX-2GP

2
SC390P50V2KX-GP Q9

E
H_THERMDC

2
C

D Q6
MMBT3904WT1G-GP
CPU backside or inside the socket
D
MMBT3904WT1G-GP

CPU TEMP:
2200p close to smsc2103 chip H_THERMDA and H_THERMDC routing 10mil trace width
REMOTE2-
2 and spacing. Locate Capacity near Thermal diode.
E

1
B
C404 C569
SC390P50V2KX-GP SC2200P50V2KX-2GP
2

2
C

DY
Q42 REMOTE2+
MMBT3904WT1G-GP
between CPU, VGA and DIMM on bottom side 5V_S0
Close to connector

K
D2 C39

1
SC4D7U6D3V3KX-GP
1SS355PT-GP SA 0905
R426
DY 10KR2J-3-GP

2
3D3V_AUX_S5 3D3V_S0 3D3V_S0 3D3V_S0

2
SA 0823
2

1
FAN1
R633 R275 R280 5
G

6K8R2J-GP
C 10KR2J-3-GP 10KR2J-3-GP
1 C
1

2
33,36 HW_THRMTRIP# D S SYS_SHDN# SHDN_SEL FAN_PWM R427 1 2 FAN_PWM_C 2
FAN_TACH 0R0402-PAD 3
SHDN --> 2N3904 ON External diode 4
Q25 -1 0107
2N7002A-7-GP 6
49 FAN_PWM_C
49 FAN_TACH
SB 1015 change to 84.2N702.E31 ACES-CON4-GP-U1
20.F0714.004

4 WIRE PWM Fan Control circuit

3D3V_S0
1

R260 RN49
68R2-GP 2 3 3D3V_S0
C388 1 4
U31
2

1 2 2103_VDD SRN10KJ-5-GP
3 4 2103_4 1 TP65 TPAD14-GP
SCD1U10V2KX-4GP VDD GPIO1 2103_5 TP67 TPAD14-GP
5 1
B H_THERMDA
H_THERMDC
2
1
DP1
GPIO2
10 A K FAN_TACH
B
REMOTE2+ DN1 TACH FAN_PWM
16 DP2/DN3 PWM 11
REMOTE2- 15 D7
ND2/DP3 TRIP_SET R276 1
TRIP_SET 14 2 2K05R2F-GP 1SS355PT-GP
SC 1203 SYS_SHDN# 7 13 SHDN_SEL T8 = 105 SA 0905
THERM_SCI# THERM_SCI#_R SYS_SHDN# SHDN_SEL
1 1 2 6 ALERT#
TP66 R272 0R0402-PAD
TPAD14-GP 9 12
33,34,55 SMBC_THERM SMCLK GND
33,34,55 SMBD_THERM 8 SMDATA GND 17

EMC2103-2-AP-GP

pin6, ALERT# OD
pin7, SYS_SHDN# OD

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

11_THERMAL SMSC2103
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 11 of 58
5 4 3 2 1
http://hobi-elektronika.net
SA 0820
3D3V_S0

6 M_A_A[15..0] DM1

1
M_A_A0 98 NP1 R43
M_A_A1 A0 NP1
M_A_A2
97 A1 NP2 NP2 DY 10KR2J-3-GP
96 A2
M_A_A3 95 110 M_A_RAS# 6 Note:

2
M_A_A4 A3 RAS#
92 A4 WE# 113 M_A_WE# 6
M_A_A5 91 115 M_A_CAS# 6
If SA0 DIM0 = 0, SA1_DIM0 = 0
M_A_A6 A5 CAS# SA0_DIM0
90 A6 SO-DIMMA SPD Address is 0xA0
M_A_A7 86 114 M_CS#0 6
A7 CS0#
M_A_A8 SA1_DIM0 SO-DIMMA TS Address is 0x30
D M_A_A9
M_A_A10
89
85
107
A8
A9
CS1# 121

73
M_CS#1 6

M_CKE0 6
D
A10/AP CKE0

1
M_A_A11 84 A11 CKE1 74 M_CKE1 6 If SA0 DIM0 = 1, SA1_DIM0 = 0
M_A_A12 83 R45 R44
M_A_A13 119
A12
101 10KR2J-3-GP 10KR2J-3-GP SO-DIMMA SPD Address is 0xA2
A13 CK0 M_CLK_DDR0 6
M_A_A14 80 A14 CK0# 103 M_CLK_DDR#0 6 SO-DIMMA TS Address is 0x32
M_A_A15 78

2
A15
6 M_A_BS2 79 A16/BA2 CK1 102 M_CLK_DDR1 6
CK1# 104 M_CLK_DDR#1 6
6 M_A_BS0 109 BA0 M_A_DM[7..0] 6
108 11 M_A_DM0
6 M_A_BS1 BA1 DM0 M_A_DM1
6 M_A_DQ[63..0] DM1 28
M_A_DQ0 5 46 M_A_DM2
M_A_DQ1 DQ0 DM2 M_A_DM3
7 DQ1 DM3 63
M_A_DQ2 15 136 M_A_DM4
M_A_DQ3 DQ2 DM4 M_A_DM5
SA 0902 17 DQ3 DM5 153
M_A_DQ4 4 170 M_A_DM6
M_A_DQ5 DQ4 DM6 M_A_DM7
6 187 SC 1203
1D5V_S3 DDR_VREF_S3 M_A_DQ6 DQ5 DM7
16 DQ6
M_A_DQ7 18 200 SODIMM0_1_SMB_DATA_R R53 1 2 0R0402-PAD
DQ7 SDA PCH_SMBDATA 3,13,15
M_A_DQ8 21 202 SODIMM0_1_SMB_CLK_R R54 1 2 0R0402-PAD
DQ8 SCL PCH_SMBCLK 3,13,15
1

M_A_DQ9 23
R63 R66 M_A_DQ10 DQ9 TS#_DIMM0 R52 1 3D3V_S0
33 DQ10 EVENT# 198 2 PM_EXTTS#0_R 5
1KR2F-3-GP 0R0603-PAD M_A_DQ11 35 0R0402-PAD -1 0107
M_A_DQ12 DQ11
DY 22 DQ12 VDDSPD 199
M_A_DQ13 24
2

DQ13

2
DIMM0_VREF_CADQ M_A_DQ14 34 197 SA0_DIM0 C54
M_A_DQ15 DQ14 SA0 SA1_DIM0 SCD1U10V2KX-5GP C57
-1 0114 36 201
DQ15 SA1
1

M_A_DQ16 39 SC2D2U6D3V3KX-GP

1
R64 M_A_DQ17 DQ16
41 DQ17 NC#1 77 SB 1026 change to 78.22520.5BL
1KR2F-3-GP M_A_DQ18 51 122
M_A_DQ19 DQ18 NC#2 1D5V_S3
DY 53 DQ19 NC#/TEST 125
M_A_DQ20 40
2

M_A_DQ21 DQ20
42 DQ21 VDD1 75
M_A_DQ22 50 76
C M_A_DQ23
M_A_DQ24
52
57
DQ22
DQ23
DQ24
VDD2
VDD3
VDD4
81
82
C
M_A_DQ25 59 87
DIMM0_VREF_CADQ R59 1 M_VREF_CA_DIMM0 M_A_DQ26 DQ25 VDD5
2 67 DQ26 VDD6 88
0R0603-PAD M_A_DQ27 69 93 SODIMM A DECOUPLING
DQ27 VDD7
1

M_A_DQ28 56 94
C82 C89 M_A_DQ29 DQ28 VDD8
58 DQ29 VDD9 99
SCD1U10V2KX-5GP SC2D2U6D3V3KX-GP M_A_DQ30 68 100 1D5V_S3
2

M_A_DQ31 DQ30 VDD10


70 DQ31 VDD11 105
-1 0107 M_A_DQ32 129 106
M_A_DQ33 DQ32 VDD12
131 DQ33 VDD13 111
M_A_DQ34 141 112
DIMM0_VREF_CADQ R42 1 M_VREF_DQ_DIMM0 M_A_DQ35 DQ34 VDD14
2 143 DQ35 VDD15 117

1
0R0603-PAD M_A_DQ36 130 118 C47 C46 C86 C87 C88
DQ36 VDD16
1

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
M_A_DQ37 132 123
C53 C55 M_A_DQ38 DQ37 VDD17
140 124

2
SCD1U10V2KX-5GP SC2D2U6D3V3KX-GP M_A_DQ39 DQ38 VDD18
142
2

M_A_DQ40 DQ39
147 DQ40 VSS 2
M_A_DQ41 149 3
M_A_DQ42 DQ41 VSS
157 DQ42 VSS 8
SB 1026 change to 78.22520.5BL M_A_DQ43 159 9
M_A_DQ44 DQ43 VSS
146 DQ44 VSS 13
M_A_DQ45 148 14
M_A_DQ46 DQ45 VSS
158 DQ46 VSS 19
M_A_DQ47 160 20
M_A_DQ48 DQ47 VSS
163 DQ48 VSS 25
0D75_S0 M_A_DQ49 165 26 C81 C83 C84 C85 C51 C52
DQ49 VSS

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
M_A_DQ50 175 31
M_A_DQ51 DQ50 VSS
177 DQ51 VSS 32
2

-1 0107 M_A_DQ52 164 37

2
R46 M_A_DQ53 DQ52 VSS
166 DQ53 VSS 38
0R0603-PAD M_A_DQ54 174 43
M_A_DQ55 DQ54 VSS
176 DQ55 VSS 44
M_A_DQ56 181 48
1

M_A_DQ57 DQ56 VSS


183 DQ57 VSS 49

B Place these caps


close to VTT1 and
MA_VTT M_A_DQ58
M_A_DQ59
M_A_DQ60
191
193
180
DQ58
DQ59
VSS
VSS
54
55
60
Place these Caps near SO-DIMMA. B
M_A_DQ61 DQ60 VSS
VTT2. 182 DQ61 VSS 61
M_A_DQ62 192 65
M_A_DQ63 DQ62 VSS
194 DQ63 VSS 66
6 M_A_DQS#[7..0] VSS 71
M_A_DQS#0 10 72
DQS0# VSS
1

C48 C58 C60 C70 M_A_DQS#1 27 127


M_A_DQS#2 DQS1# VSS
45 DQS2# VSS 128
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

M_A_DQS#3 62 133
2

M_A_DQS#4 DQS3# VSS


135 DQS4# VSS 134
M_A_DQS#5 152 138
M_A_DQS#6 DQS5# VSS
169 DQS6# VSS 139
M_A_DQS#7 186 144
DQS7# VSS
6 M_A_DQS[7..0] VSS 145
M_A_DQS0 12 150
M_A_DQS1 DQS0 VSS
29 DQS1 VSS 151
M_A_DQS2 47 155
M_A_DQS3 DQS2 VSS
64 DQS3 VSS 156
M_A_DQS4 137 161
M_A_DQS5 DQS4 VSS
154 DQS5 VSS 162
M_A_DQS6 171 167
M_A_DQS7 DQS6 VSS
188 DQS7 VSS 168
VSS 172
6 M_ODT0 116 ODT0 VSS 173
6 M_ODT1 120 ODT1 VSS 178
VSS 179
M_VREF_CA_DIMM0 126 184
M_VREF_DQ_DIMM0 VREF_CA VSS
1 VREF_DQ VSS 185
VSS 189
5,13 DDR3_DRAMRST# 30 RESET# VSS 190
VSS 195
VSS 196
MA_VTT 203 205
VTT1 VSS
204 206
A H = 4mm
VTT2 VSS
A
DDR3-204P-31-GP-U <Core Design>
62.10017.M11
62.10017.M41
SB 1024 Change to 62.10017.M41 Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

12_DDR3-SODIMM1
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 12 of 58
5 4 3 2 1
SA 0820
DM2
http://hobi-elektronika.net 3D3V_S0
6 M_B_A[15..0]
M_B_A0 98 NP1
M_B_A1 A0 NP1
97 A1 NP2 NP2

1
M_B_A2 96
M_B_A3 A2 R36
95 A3 RAS# 110 M_B_RAS# 6
M_B_A4 92 113 10KR2J-3-GP
A4 WE# M_B_WE# 6
M_B_A5 91 115 M_B_CAS# 6
M_B_A6 A5 CAS#
90

2
M_B_A7 A6
86 A7 CS0# 114 M_CS#2 6
M_B_A8 89 121 M_CS#3 6 Note:
M_B_A9 A8 CS1# SA1_DIM1
85 A9
M_B_A10 SO-DIMMB SPD Address is 0xA4
D M_B_A11
M_B_A12
107
84
83
A10/AP
A11
CKE0
CKE1
73
74
M_CKE2 6
M_CKE3 6 SA0_DIM1
SO-DIMMB TS Address is 0x34 D
M_B_A13 A12
119 A13 CK0 101 M_CLK_DDR2 6

1
M_B_A14 80 103 M_CLK_DDR#2 6
M_B_A15 A14 CK0# R424 R37
78 A15
79 102 M_CLK_DDR3 6 10KR2J-3-GP DY 10KR2J-3-GP
6 M_B_BS2 A16/BA2 CK1
CK1# 104 M_CLK_DDR#3 6
109 M_B_DM[7..0] 6

2
6 M_B_BS0 BA0 M_B_DM0
6 M_B_BS1 108 BA1 DM0 11
28 M_B_DM1
6 M_B_DQ[63..0] DM1
M_B_DQ0 5 46 M_B_DM2
M_B_DQ1 DQ0 DM2 M_B_DM3
7 DQ1 DM3 63
M_B_DQ2 15 136 M_B_DM4
M_B_DQ3 DQ2 DM4 M_B_DM5
SA 0902 17 DQ3 DM5 153
M_B_DQ4 4 170 M_B_DM6
M_B_DQ5 DQ4 DM6 M_B_DM7
6 DQ5 DM7 187 SC 1203
1D5V_S3 DDR_VREF_S3 M_B_DQ6 16
M_B_DQ7 DQ6 SODIMM1_1_SMB_DATA_R R39
18 DQ7 SDA 200 1 2 0R0402-PAD PCH_SMBDATA 3,12,15
M_B_DQ8 21 202 SODIMM1_1_SMB_CLK_R R40 1 2 0R0402-PAD
DQ8 SCL PCH_SMBCLK 3,12,15
1

M_B_DQ9 23
R420 R419 M_B_DQ10 DQ9 TS#_DIMM1 R38 1 3D3V_S0
33 DQ10 EVENT# 198 2 PM_EXTTS#1_R 5
1KR2F-3-GP 0R0603-PAD M_B_DQ11 35 0R0402-PAD -1 0107
M_B_DQ12 DQ11
DY 22 DQ12 VDDSPD 199
M_B_DQ13 24
2

DQ13

2
DIMM1_VREF_CADQ M_B_DQ14 34 197 SA0_DIM1 C548
M_B_DQ15 DQ14 SA0 SA1_DIM1 SCD1U10V2KX-5GP C546
-1 0114 36 201
DQ15 SA1
1

M_B_DQ16 39 SC2D2U6D3V3KX-GP

1
R421 M_B_DQ17 DQ16
41 77 SB 1026 change to 78.22520.5BL
1KR2F-3-GP M_B_DQ18 DQ17 NC#1
51 DQ18 NC#2 122
DY M_B_DQ19 53 125 1D5V_S3
M_B_DQ20 DQ19 NC#/TEST
40
2

M_B_DQ21 DQ20
42 DQ21 VDD1 75
M_B_DQ22 50 76
M_B_DQ23 DQ22 VDD2
52 DQ23 VDD3 81
-1 0107 M_B_DQ24 57 82
C DIMM1_VREF_CADQ R425 1
0R0603-PAD
2 M_VREF_CA_DIMM1 M_B_DQ25
M_B_DQ26
59
67
DQ24
DQ25
DQ26
VDD4
VDD5
VDD6
87
88
C
1

M_B_DQ27 69 93
C547 C543 M_B_DQ28 DQ27 VDD7
56 DQ28 VDD8 94
SCD1U10V2KX-5GP SC2D2U6D3V3KX-GP M_B_DQ29 58 99
2

M_B_DQ30 DQ29 VDD9


68 DQ30 VDD10 100
M_B_DQ31 70 105
M_B_DQ32 DQ31 VDD11
129 DQ32 VDD12 106
M_B_DQ33 131 111
DIMM1_VREF_CADQ R423 1 M_VREF_DQ_DIMM1 M_B_DQ34 DQ33 VDD13
2 141 DQ34 VDD14 112
0R0603-PAD M_B_DQ35 143 117
DQ35 VDD15
1

M_B_DQ36 130 118


C544 C538 M_B_DQ37 DQ36 VDD16
132 DQ37 VDD17 123
SCD1U10V2KX-5GP SC2D2U6D3V3KX-GP M_B_DQ38 140 124
2

M_B_DQ39 DQ38 VDD18


142 DQ39
M_B_DQ40 147 2 SODIMM B DECOUPLING
M_B_DQ41 DQ40 VSS
149 DQ41 VSS 3
SB 1026 change to 78.22520.5BL M_B_DQ42 157 8
M_B_DQ43 DQ42 VSS 1D5V_S3
159 DQ43 VSS 9
M_B_DQ44 146 13
M_B_DQ45 DQ44 VSS
148 DQ45 VSS 14
M_B_DQ46 158 19
M_B_DQ47 DQ46 VSS
160 DQ47 VSS 20
M_B_DQ48 163 25
DQ48 VSS

1
M_B_DQ49 165 26 C45 C44 C535 C536 C537
DQ49 VSS

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
M_B_DQ50 175 31
M_B_DQ51 DQ50 VSS
177 32

2
M_B_DQ52 DQ51 VSS
164 DQ52 VSS 37
M_B_DQ53 166 38
M_B_DQ54 DQ53 VSS
174 DQ54 VSS 43
M_B_DQ55 176 44
M_B_DQ56 DQ55 VSS
181 DQ56 VSS 48
M_B_DQ57 183 49
M_B_DQ58 DQ57 VSS
191 DQ58 VSS 54
M_B_DQ59 193 55
DQ59 VSS
B M_B_DQ60
M_B_DQ61
M_B_DQ62
180
182
192
DQ60
DQ61
VSS
VSS
60
61
65 C539 C540 C541 C542 C49 C50
B
DQ62 VSS

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
M_B_DQ63 194 66
DQ63 VSS
6 M_B_DQS#[7..0] VSS 71
M_B_DQS#0 10 72

2
M_B_DQS#1 DQS0# VSS
27 DQS1# VSS 127
M_B_DQS#2 45 128
M_B_DQS#3 DQS2# VSS
62 DQS3# VSS 133
M_B_DQS#4 135 134
M_B_DQS#5 DQS4# VSS
152 DQS5# VSS 138
M_B_DQS#6 169 139
M_B_DQS#7 DQS6# VSS
186 DQS7# VSS 144
6 M_B_DQS[7..0] VSS 145
M_B_DQS0 12 150
M_B_DQS1 DQS0 VSS
29 DQS1 VSS 151
M_B_DQS2 47 155
M_B_DQS3 DQS2 VSS
64 DQS3 VSS 156
M_B_DQS4 137 161
M_B_DQS5 DQS4 VSS
154 DQS5 VSS 162
M_B_DQS6 171 167
M_B_DQS7 DQS6 VSS
188 DQS7 VSS 168
VSS 172
0D75_S0 116 173
6 M_ODT2 ODT0 VSS
6 M_ODT3 120 ODT1 VSS 178
VSS 179
2

-1 0107 M_VREF_CA_DIMM1 126 184


R41 M_VREF_DQ_DIMM1 VREF_CA VSS
1 VREF_DQ VSS 185
0R0603-PAD 189
VSS
5,12 DDR3_DRAMRST# 30 RESET# VSS 190
Place these caps 195
1

VSS
VSS 196
close to VTT1 and MB_VTT 203 205
MB_VTT VTT1 VSS
VTT2. 204 VTT2 VSS 206

H =8mm
A DDR3-204P-51-GP
A
1

C40 C41 C42 C43 62.10017.P51


62.10017.P91 SO-DIMMB is placed farther from <Core Design>
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SB 1024 Change to 62.10017.P91


2

the Processor than SO-DIMMA


Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

13_DDR3-SODIMM2
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 13 of 58
5 4 3 2 1
SA 0906
http://hobi-elektronika.net integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN High=Enable Low=Disable
ICH_RTCX1
RTC_AUX_S5 RTC_AUX_S5 integrated VccLan1_05VccCL1_05
1 2 ICH_RTCX2 R472
R104 10MR2J-L-GP 1 2 20KR2J-L2-GP 1 2 SM_INTRUDER# LAN100_SLP High=Enable Low=Disable
R99 1MR2J-1-GP

2
X2

1
C591 G77 1 2 ICH_INTVRMEN
4 1 SC1U6D3V2KX-GP R475 330KR2F-L-GP

GAP-OPEN
PCH1A 1 OF 10

2
X-32D768KHZ-34GPU
D D

1
ICH_RTCX1 B13 D33
1 RTCX1 FWH0/LAD0 LPC_LAD0 33,35

1
C191 3 2 C190 ICH_RTCX2 D13 B33
RTCX2 FWH1/LAD1 LPC_LAD1 33,35
SC5D6P50V2CN-1GP SC5D6P50V2CN-1GP C32
FWH2/LAD2 LPC_LAD2 33,35
A32 LPC_LAD3 33,35
2

2
RTC_AUX_S5 ICH_RTCRST# FWH3/LAD3
82.30001.661 C14 RTCRST#
FWH4/LFRAME# C34 LPC_LFRAME# 33,35
R471 1 2 SRTCRST# D17
20KR2J-L2-GP SRTCRST# new signal Pin SRTCRST#
A34

RTC

LPC
LDRQ0#

1
SC-BOM Change to 6p check 20ppm + 5.6p SM_INTRUDER# A16 F34 PCH_GPIO23 1
C587 INTRUDER# LDRQ1#/GPIO23 TP101 TPAD14-GP
-1 0109 10ppm
SC1U6D3V2KX-GP ICH_INTVRMEN A14 AB9 INT_SERIRQ INT_SERIRQ 33

2
INTVRMEN SERIRQ
-1 0126 BOM Change

27 ACZ_BITCLK_AUDIO 1 2 ACZ_BIT_CLK A30


R96 33R2J-2-GP HDA_BCLK
SATA0RXN AK7 SATA_RXN0 28
1 2 ACZ_SYNC D29 AK6
ACZ_RST# 1 2
27 ACZ_SYNC_AUDIO
R94 33R2J-2-GP HDA_SYNC SATA0RXP
SATA0TXN AK11
SATA_RXP0
SATA_TXN0
28
28
HDD
DY ECT4 SC33P50V2JN-3GP 27 ACZ_SPKR P1 SPKR SATA0TXP AK9 SATA_TXP0 28
ACZ_SYNC 1 2
DY ECT1 SC33P50V2JN-3GP 27 ACZ_RST#_AUDIO 1 2 ACZ_RST# C30
ACZ_BIT_CLK R97 33R2J-2-GP HDA_RST#
1 2 SATA1RXN AH6
DY ECT3 SC33P50V2JN-3GP
SATA1RXP AH5
ACZ_SDATAOUT 1 2 27 ACZ_SDATAIN0 G30 AH9
DY ECT2 SC33P50V2JN-3GP
F30
HDA_SDIN0

HDA_SDIN1
SATA1TXN
SATA1TXP AH8

AF11
PCH: 71.0IBEX.G0U
HDA_SDIN2 SATA2RXN
1 E32 AF9

IHDA
TPAD14-GP TP98 HDA_SDIN2 SATA2RXP
SATA2TXN AF7
F32 HDA_SDIN3 SATA2TXP AF6

C 27 ACZ_SDATAOUT_AUDIO 1 2 ACZ_SDATAOUT B29 HDA_SDO


SATA3RXN
SATA3RXP
AH3
AH1
C
R95 33R2J-2-GP AF3
SATA3TXN
-1 0107 SATA3TXP AF1
33 ME_UNLOCK# R482 1 2 HDA_DOCK_EN# H32

SATA
0R0402-PAD HDA_DOCK_EN#/GPIO33
AD9
NO REBOOT STRAP 1 DY 2 J30 HDA_DOCK_RST#/GPIO13
SATA4RXN
SATA4RXP AD8
SATA_RXN4
SATA_RXP4
28
28
ODD
R481 8K2R2J-3-GP AD6 SATA_TXN4 28
3D3V_S0 Low: Flash Descriptor Security will be overridden SATA4TXN
SATA4TXP AD5 SATA_TXP4 28
1 DY 2 ACZ_SPKR PCH_JTAG_TCK M3 AD3
R158 1KR2J-1-GP JTAG_TCK SATA5RXN
SATA5RXP AD1
PCH_JTAG_TMS K3 AB3
JTAG_TMS SATA5TXN
No Reboot Strap R23 SATA5TXP AB1
Low = Default PCH_JTAG_TDI K1 JTAG_TDI 1D05V_S0
HDA_SPKR High = No Reboot

JTAG
PCH_JTAG_TDO J2 AF16
JTAG_TDO SATAICOMPO
SPI_CS0#, SPI_MISO, SPI_MOSI, SPI_CLK: PCH_JTAG_RST# J4 AF15 SATAICOMP 1 2
No series resistor required if routing length is 1.5"-6.5" TRST# SATAICOMPI R186
37D4R2F-GP

35 PCH_SPI_CLK R206 1 2 SPI_CLK_R BA2


15R2J-GP SPI_CLK

35 PCH_SPI_CS#0 R202 1 2 SPI_CS#0_R AV3


15R2J-GP SPI_CS0#
AY3 T3 SATA_LED# SATA_LED# 34
SPI_CS1# SATALED#

R201 1 SPI_MOSI_R SATA_DET#0_R


CHECK 1D05V_S0 35 PCH_SPI_MOSI
15R2J-GP
2 AY1 SPI_MOSI SATA0GP/GPIO21 Y9

SPI
B PCH_JTAG_TMS DY 1
-1 0114
2
35 SPI_MOSO_R SPI_MOSO_R AV1 SPI_MISO SATA1GP/GPIO19 V1 SATA_DET#1_R
B
R145 200R2J-L1-GP IBEXPEAK-M-GP-NF

PCH_JTAG_TDO DY 1 2
R131 200R2J-L1-GP

PCH_JTAG_TDI DY 1 2 SPI_MOSI Enable iTPM: Connect to Vcc3_3 with


R149 200R2J-L1-GP 3D3V_S0
8.2-k weak pull-up resistor. RN25
PCH_JTAG_RST# 1 DY 2 Disable iTPM: Left floating, no INT_SERIRQ 5 4
R126 10KR2J-3-GP pull-down required SATA_LED# 6 3
SATA_DET#1_R 7 2
SATA_DET#0_R 8 1
3D3V_S0 3D3V_AUX_S5
SA-0914 SRN10KJ-6-GP
PCH_JTAG_TMS DY 1 2 1 DY 2 SPI_MOSI_R RTC_AUX_S5 D20 RTC_BAT
R136 100R2J-2-GP R204 8K2R2J-3-GP 2 RTC1
4
PCH_JTAG_TDO DY 1 2 1 2 RTC_PWR_L 3
R135 100R2J-2-GP R515
1

0R0603-PAD 1 RTC_PWR 1 2 1
PCH_JTAG_TDI DY 1 2 -1 0107 R516
R140 100R2J-2-GP C643 BAS40WCGP-GP-U 1KR2J-1-GP 2
2

SC1U10V2ZY-GP 83.00040.R81 3
PCH_JTAG_RST# 1 DY 2 2ND = 83.BAT54.Z81
R121 51R2F-2-GP
SB 1015 change to 83.00040.Q81 5
PCH_JTAG_TCK 1 2 SB 1030 change to 83.00040.R81
R154 51R2F-2-GP ACES-CON3-4-GP-U
20.F1267.003
A When unused all JTAG pins may be NC
<Core Design> A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

14_PCH (1/9)-SATA/SPI/LPC/HDA
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 14 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
3D3V_S5
PCH1B 2 OF 10

8
7
6
5
PU, page 19
PCIE_RXN1 BG30 B9 PCH_GPIO11 19 RN70
29 PCIE_RXN1 PCIE_RXP1 PERN1 SMBALERT#/GPIO11
LAN 29 PCIE_RXP1 SCD1U10V2KX-5GP 2 1 C321 TXN1
BJ30
BF29
PERP1
H14 SMB_CLK IO
SRN2K2J-4-GP
29 PCIE_TXN1 PETN1 SMBCLK SMB_CLK 31
29 PCIE_TXP1 SCD1U10V2KX-5GP 2 1 C322 TXP1 BH29 PETP1 SMB_DATA
C8 SMB_DATA 31

1
2
3
4
PCIE_RXN2 SMBDATA
D MINICARD1
WLAN
31
31
31
PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_RXP2
SCD1U10V2KX-5GP 2 1 C324 TXN2
AW30
BA30
BC30
PERN2
PERP2
J14 PCH_GPIO60 19
SML0_CLK KBC_SDA1 D
SCD1U10V2KX-5GP 2 TXP2 PETN2 SML0ALERT#/GPIO60 PU, page 19 SML0_DATA KBC_SCL1
31 PCIE_TXP2 1 C323 BD30 PETP2
C6 SML0_CLK
SML0CLK
AU30

SMBus
31 PCIE_RXN3 PERN3 SML0_DATA
MINICARD2 31 PCIE_RXP3
C328 SCD1U10V2KX-5GP 2 1 TXN3
AT30
AU32
PERP3 SML0DATA G8
31 PCIE_TXN3 PETN3
WWAN 31 PCIE_TXP3 C327 SCD1U10V2KX-5GP 2 1 TXP3 AV32 PETP3 PCH_GPIO74
SML1ALERT#/GPIO74 M14 3D3V_S0
31 PCIE_RXN4 BA32 PERN4 3D3V_S5
31 PCIE_RXP4 BB32 E10 KBC_SCL1
PERP4 SML1CLK/GPIO58 KBC_SCL1 33

8
7
6
5
C326 SCD1U10V2KX-5GP 2 TXN4
NEW CARD 31 PCIE_TXN4
C325 SCD1U10V2KX-5GP 2
1
1 TXP4
BD32
BE32
PETN4
G12 KBC_SDA1 RN62
31 PCIE_TXP4 PETP4 SML1DATA/GPIO75 KBC_SDA1 33
SRN2K2J-4-GP

PCI-E*
BF33 3D3V_S0
PERN5 CL_CLK
BH33 PERP5 CL_CLK1 T13 1

Controller
BG32 TP45 TPAD14-GP

1
2
3
4
PETN5 CL_DATA 1 SMB_CLK
BJ32 PETP5 CL_DATA1 T11
TP43 TPAD14-GP SMB_DATA

Link
BA34 T9 CL_RST# 1
PERN6 CL_RST1# TP40 TPAD14-GP
AW34 PERP6
BC34 Q7
PETN6 SMB_DATA
PCIECLKRQ{0,3,4,5,6,7}# should BD34 PETP6 3,12,13 PCH_SMBDATA 1 6
H1 PEG_CLKREQ# 1 DY 2
have a 10K pull-up to +3VALW. PEG_A_CLKRQ#/GPIO47 R124 0R2J-2-GP
PEX_CLKREQ 51
AT34 PERN7 2 5
AU34 PERP7 DIS
PCIECLKRQ{1,2} should have a AU36 AD43 CLK_PCH_PEGA_N 2 3 RN27 CLK_PCIE_PEG# 51 SMB_CLK 3 4 PCH_SMBCLK 3,12,13
PETN7 CLKOUT_PEG_A_N CLK_PCH_PEGA_P
10K pull-up to +1.05VS (But CRB is AV36 PETP7 CLKOUT_PEG_A_P AD45 1 4 SRN0J-10-GP-U CLK_PCIE_PEG 51
DMN66D0LDW-7-GP
pull-up to +3VS). BG34 AN4 84.DMN66.03F
PERN8 CLKOUT_DMI_N PEG_CLK#_R 5

PEG
BJ34 AN2 PEG_CLK_R 5 2ND = 84.27002.F3F
C BG36
BJ36
PERP8
PETN8
PETP8
CLKOUT_DMI_P

CLKOUT_DP_N
-1 0111 SB 1015 change to 84.DMN66.03F C
CLKOUT_DP_N/CLKOUT_BCLK1_N AT1 4 1 DPLL_REF_SSCLK# 5
AT3 CLKOUT_DP_P 3 2 RN36 DPLL_REF_SSCLK 5
CLKOUT_DP_P/CLKOUT_BCLK1_P SRN0J-10-GP-U
AK48 CLKOUT_PCIE0N
AK47 CLKOUT_PCIE0P DY

From CLK BUFFER


CLKIN_DMI#
CHECK PCIE_CLK_RQ0# P9
CLKIN_DMI_N AW24
BA24 CLKIN_DMI
CLKIN_DMI# 3
PCIECLKRQ0#/GPIO73 CLKIN_DMI_P CLKIN_DMI 3

31 CLK_PCIE_MINI1# AM43 AP3 CLK_CPU_BCLK# CLK_CPU_BCLK# 3


CLKOUT_PCIE1N CLKIN_BCLK_N CLK_CPU_BCLK
31 CLK_PCIE_MINI1 AM45 CLKOUT_PCIE1P CLKIN_BCLK_P AP1 CLK_CPU_BCLK 3 CHECK
1 2 PCIE_CLK_RQ1# U4 PEG_CLKREQ# 1 2
31 MINI1_CLKREQ# R172 0R0402-PAD PCIECLKRQ1#/GPIO18 DREFCLK# R127 10KR2J-3-GP
CLKIN_DOT_96N F18 DREFCLK# 3
E18 DREFCLK DREFCLK 3
CLKIN_DOT_96P
31 CLK_PCIE_MINI2# AM47 CLKOUT_PCIE2N
AM48 SA 0908
31 CLK_PCIE_MINI2 CLKOUT_PCIE2P 3D3V_S5
AH13 CLK_PCIE_SATA#
CLKIN_SATA_N/CKSSCD_N CLK_PCIE_SATA# 3
1 2 PCIE_CLK_RQ2# N4 AH12 CLK_PCIE_SATA CLK_PCIE_SATA 3 RN23
31 MIN2_CLKREQ# R148 0R0402-PAD PCIECLKRQ2#/GPIO20 CLKIN_SATA_P/CKSSCD_P PCIE_CLK_RQ0# 1 8
PCH_GPIO74 2 7
AH42 P41 CLK_ICH14 3 6
29 CLK_PCIE_LAN# CLKOUT_PCIE3N REFCLK14IN CLK_ICH14 3 19 PCH_GPIO12
29 CLK_PCIE_LAN AH41 CLKOUT_PCIE3P 4 5

1 2 PCIE_CLK_RQ3# A8 J42 CLK_PCI_FB CLK_PCI_FB 18 SRN10KJ-6-GP


29 LAN_CLKREQ# R113 0R0402-PAD PCIECLKRQ3#/GPIO25 CLKIN_PCILOOPBACK

AM51 AH51 XTAL25_IN


31 CLK_PCIE_NEW# CLKOUT_PCIE4N XTAL25_IN 1D05V_S0
31 CLK_PCIE_NEW AM53 AH53 XTAL25_OUT
CLKOUT_PCIE4P XTAL25_OUT ASM if external crystal is not used.

B 31 NEW_CLKREQ# R122
1 2
0R0402-PAD
PCIE_CLK_RQ4# M9 PCIECLKRQ4#/GPIO26 XCLK_RCOMP AF38 XCLK_RCOMP 1
R229
2
90D9R2F-1-GP XTAL25_IN
R187
1 2
0R2J-2-GP
B
-1 0111 AJ50 T45 PCH_FLEX0 1
CLKOUT_PCIE5N CLKOUTFLEX0/GPIO64 TP107 TPAD14-GP
AJ52 CLKOUT_PCIE5P
PCIE_CLK_RQ5# H6 P43 PCH_FLEX1 1 DY
Clock Flex

PCIECLKRQ5#/GPIO44 CLKOUTFLEX1/GPIO65 TP108 TPAD14-GP XTAL25_IN 2 1


X3 C227

1
AK53 T42 PCH_FLEX2 1 SC18P50V2JN-1-GP
CLKOUT_PEG_B_N CLKOUTFLEX2/GPIO66 TP109 TPAD14-GP XTAL-25MHZ-102-GP
AK51 CLKOUT_PEG_B_P DY
82.30020.851
PEG_B_CLKRQ# P13 N50 CLK48 1 2 2nd = 82.30020.791 DY
CLK48_Cardreader 31

2
PEG_B_CLKRQ#/GPIO56 CLKOUTFLEX3/GPIO67 33R2J-2-GP R155 XTAL25_OUT 2 1
C219

1
IBEXPEAK-M-GP-NF C207
DY SC4D7P50V2CN-1GP SC18P50V2JN-1-GP
CHECK
3D3V_S5 3D3V_S0 3D3V_S0

2
2

R112 R168 R153


10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 3D3V_S5

RN72
1

PCIE_CLK_RQ3# PCIE_CLK_RQ1# PCIE_CLK_RQ2# 1 8 PEG_B_CLKRQ#


2 7 PCIE_CLK_RQ4#
2

3 6 PCIE_CLK_RQ5#
R165 R157 4 5 PCH_GPIO57 PCH_GPIO57 19
R114 10KR2J-3-GP 10KR2J-3-GP
10KR2J-3-GP DY DY SRN10KJ-6-GP
DY
A A
1

<Core Design>

Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

15_PCH (2/9)-PCIE / SMBUS / CLK


Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 15 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
PCH1C 3 OF 10
FDI_RXN0 BA18 FDI_TXN0 4
4 DMI_RXN0 BC24 DMI0RXN FDI_RXN1 BH17 FDI_TXN1 4
4 DMI_RXN1 BJ22 DMI1RXN FDI_RXN2 BD16 FDI_TXN2 4
4 DMI_RXN2 AW20 DMI2RXN FDI_RXN3 BJ16 FDI_TXN3 4
4 DMI_RXN3 BJ20 DMI3RXN FDI_RXN4 BA16 FDI_TXN4 4
FDI_RXN5 BE14 FDI_TXN5 4
4 DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14 FDI_TXN6 4
4 DMI_RXP1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_TXN7 4
4 DMI_RXP2 BA20 DMI2RXP
4 DMI_RXP3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_TXP0 4
FDI_RXP1 BF17 FDI_TXP1 4
4 DMI_TXN0 BE22 DMI0TXN FDI_RXP2 BC16 FDI_TXP2 4
D 4
4
DMI_TXN1
DMI_TXN2
BF21
BD20
DMI1TXN
DMI2TXN
FDI_RXP3
FDI_RXP4
BG16
AW16
FDI_TXP3
FDI_TXP4
4
4
D
4 DMI_TXN3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_TXP5 4
FDI_RXP6 BB14 FDI_TXP6 4
4 DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 4
4 DMI_TXP1 BH21 DMI1TXP
4 DMI_TXP2 BC20 DMI2TXP
4 DMI_TXP3 BD18 DMI3TXP FDI_INT BJ14 FDI_INT 4

DMI
FDI
FDI_FSYNC0 BF13 FDI_FSYNC0 4
1D05V_S0 BH25 DMI_ZCOMP
FDI_FSYNC1 BH13 FDI_FSYNC1 4
1 2 DMI_IRCOMP_R BF25
R219 49D9R2F-GP DMI_IRCOMP
FDI_LSYNC0 BJ12 FDI_LSYNC0 4
3D3V_S0 BG14
FDI_LSYNC1 FDI_LSYNC1 4

1
R173
10KR2J-3-GP

2
PM_SYSRST#_R T6 J12 PCIE_WAKE# PCIE_WAKE# 29,31
SYS_RESET# WAKE#

M6 Y1 PM_CLKRUN#
SYS_PWROK CLKRUN#/GPIO32 PM_CLKRUN# 33
36 PM_PWROK R102 1 DY 2 0R2J-2-GP

System Power Management


PM_PWROK_1
C 36,38 CORE_PWRGD
R103
1 2
0R0402-PAD
B17 PWROK C
-1 0107 1 2 -1 0107
R116 10KR2J-3-GP 1 2 ME_PWROK K5 P8 PM_SUS_STAT# 1
R139 0R0402-PAD MEPWROK SUS_STAT#/GPIO61 TP42 TPAD14-GP
SA 0906
1 2 LAN_RST#1 A10 F3 PM_SUS_CLK 1
R485 10KR2J-3-GP LAN_RST# SUSCLK/GPIO62 TP28 TPAD14-GP

5 PM_DRAM_PWRGD D9 E4 PM_SLP_S5# 1
DRAMPWROK SLP_S5#/GPIO63 TP97 TPAD14-GP

PM_RSMRST# C16 H7 PM_SLP_S4#_R 1 2 PM_SLP_S4# 31,33,36,41,43


SC 1203 RSMRST# SLP_S4# R129 0R0402-PAD

33 SUS_PWR_DN_ACK 1 2 SUS_PWR_DN_ACK_R M1 P12 PM_SLP_S3#_R 1 2 PM_SLP_S3# 5,31,33,36,41,42,43,44


R159 0R0402-PAD SUS_PWR_DN_ACK/GPIO30 SLP_S3# R137 0R0402-PAD

33 PM_PWRBTN# 1 2 PM_PWRBTN#_R P5 K8 PM_SLP_M#_R 1 -1 0107


R169 0R0402-PAD PWRBTN# SLP_M# TP102 TPAD14-GP

33 AC_PRESENT 1 2 AC_PRESENT_R P7 N2 PM_SLP_DSW# 1


R166 0R0402-PAD ACPRESENT/GPIO31 TP23 TP30 TPAD14-GP

PCH_GPIO72 A6 BJ10 H_PM_SYNC


BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 5

PM_RI# F14 F6 PM_SLP_LAN# 1


RI# SLP_LAN#/GPIO29 TP96 TPAD14-GP

B IBEXPEAK-M-GP-NF B
3D3V_S5
RN24
PM_RI# 1 8
SUS_PWR_DN_ACK_R 2 7
AC_PRESENT_R 3 6
3D3V_AUX_S5 SC 1209 PM_PWRBTN#_R 4 5

SRN10KJ-6-GP
3D3V_S5
1

3D3V_S5
1

R646
1
R100 10KR2J-3-GP DY R647 PCH_GPIO72 1 2
10KR2J-3-GP 100KR2J-1-GP DY R111 8K2R2J-3-GP
83.00054.T81 Q64 DY
2

2ND = 83.00054.Z81 4 3 PM_RSMRST# PCIE_WAKE# 1 2


2

1 PM_RSMRST# R133 1KR2J-1-GP


2

D16 5 2 PWM_RSMRST# 40
1

1 2 RSMRST#_KBC_R 3 BAT54PT-GP R101 3D3V_S0


33 RSMRST#_KBC
R601 6 1 High Active
100KR2J-1-GP

0R0402-PAD 2 PM_CLKRUN# 1 2
DMN66D0LDW-7-GP R174
-1 0107 84.DMN66.03F 8K2R2J-3-GP
2

2ND = 84.27002.F3F
<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

16_PCH (3/9)-DMI / FDI / PM


Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 16 of 58
5 4 3 2 1
SA 0908 Add
http://hobi-elektronika.net
3D3V_S0

2 3 PCH_HDMI_CLK
1 4 PCH_HDMI_DATA Reserve PD at SW PCH1D 4 OF 10
23 PCH_BL_ON T48 L_BKLTEN SDVO_TVCLKINN BJ46
UMA RN22 24 PCH_LCDVDD_ON T47 L_VDD_EN SDVO_TVCLKINP BG46
SRN2K2J-1-GP
24 L_BKLTCTL Y48 L_BKLTCTL SDVO_STALLN BJ48
D SA 0904 Add 23 CLK_DDC_EDID CLK_DDC_EDID AB48 L_DDC_CLK
SDVO_STALLP BG48
D
23 DAT_DDC_EDID DAT_DDC_EDID Y45 BF45
3D3V_S0 L_DDC_DATA SDVO_INTN
SDVO_INTP BH45
LCTL_CLK AB46
CLK_DDC_EDID LCTL_DATA L_CTRL_CLK
2 3 V48 L_CTRL_DATA
1 4 DAT_DDC_EDID
LIBG AP39 T51 PCH_HDMI_CLK
LVD_IBG SDVO_CTRLCLK PCH_HDMI_CLK 26
RN67 TPAD14-GP TP44 1 L_LVBG AP41 T53 PCH_HDMI_DATA
LVD_VBG SDVO_CTRLDATA PCH_HDMI_DATA 26
SRN2K2J-1-GP
2 R196 1 LVDS_VREF AT43 LVD_VREFH
0R0402-PAD AT42 BG44
3D3V_S0 LVD_VREFL DDPB_AUXN
DDPB_AUXP BJ44
AU38 PCH_HDMI_DETECT
DDPB_HPD PCH_HDMI_DETECT 26

LVDS
RN26 23 PCH_TXACLK- AV53
LCTL_CLK LVDSA_CLK# PCH_HDMI_DATA2-_L
1 4 23 PCH_TXACLK+ AV51 LVDSA_CLK DDPB_0N BD42 1 UMA
2 PCH_HDMI_DATA2- 26
2 3 LCTL_DATA BC42 PCH_HDMI_DATA2+_L C288 1 UMA
2 SCD1U10V2KX-5GP PCH_HDMI_DATA2+ 26
DDPB_0P PCH_HDMI_DATA1-_L C289 SCD1U10V2KX-5GP
23 PCH_TXAOUT0- BB47 LVDSA_DATA#0 DDPB_1N BJ42 1 UMA
2 PCH_HDMI_DATA1- 26
SRN10KJ-5-GP 23 PCH_TXAOUT1- BA52 BG42 PCH_HDMI_DATA1+_L C286 1 UMA
2 SCD1U10V2KX-5GP PCH_HDMI_DATA1+ 26

Digital Display Interface


LVDSA_DATA#1 DDPB_1P PCH_HDMI_DATA0-_L C287 SCD1U10V2KX-5GP
23 PCH_TXAOUT2- AY48 LVDSA_DATA#2 DDPB_2N BB40 1 UMA
2 PCH_HDMI_DATA0- 26
AV47 BA40 PCH_HDMI_DATA0+_L C284 1 UMA
2 SCD1U10V2KX-5GP PCH_HDMI_DATA0+ 26
LVDSA_DATA#3 DDPB_2P PCH_HDMI_CLK-_L C285 SCD1U10V2KX-5GP
DDPB_3N AW38 1 UMA
2 PCH_HDMI_CLK- 26
23 PCH_TXAOUT0+ BB48 BA38 PCH_HDMI_CLK+_L C283 1 UMA
2 SCD1U10V2KX-5GP PCH_HDMI_CLK+ 26
LIBG LVDSA_DATA0 DDPB_3P C282 SCD1U10V2KX-5GP
2 1 23 PCH_TXAOUT1+ BA50 LVDSA_DATA1
R195 23 PCH_TXAOUT2+ AY49
2K37R2F-GP LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
LVDS reference current. AB49
DDPC_CTRLDATA
AP48 LVDSB_CLK#
SA 0908 Add
C 1 2 PCH_HDMI_DETECT
AP47 LVDSB_CLK DDPC_AUXN
DDPC_AUXP
BE44
BD44 C
R191 AY53 AV40
100KR2J-1-GP LVDSB_DATA#0 DDPC_HPD
AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
AT53 LVDSB_DATA#3 DDPC_0P BD40
DDPC_1N BF41
SA 0904 Add AY51 LVDSB_DATA0 DDPC_1P BH41
AT48 LVDSB_DATA1 DDPC_2N BD38
3D3V_S0 AU50 BC38
LVDSB_DATA2 DDPC_2P
AT51 LVDSB_DATA3 DDPC_3N BB36
RN66 BA36
PCH_DDCCLK DDPC_3P
2 3
1 4 PCH_DDCDATA
23 PCH_BLUE PCH_BLUE AA52 U50
SRN2K2J-1-GP PCH_GREEN CRT_BLUE DDPD_CTRLCLK
23 PCH_GREEN AB53 CRT_GREEN DDPD_CTRLDATA U52
23 PCH_RED PCH_RED AD53 CRT_RED

DDPD_AUXN BC46
25 PCH_DDCCLK PCH_DDCCLK V51 BD46
PCH_DDCDATA CRT_DDC_CLK DDPD_AUXP
RN29 25 PCH_DDCDATA V53 AT38
PCH_BLUE CRT_DDC_DATA DDPD_HPD
8 1
7 2 PCH_GREEN BJ40
PCH_RED DDPD_0N
6 3 25 PCH_HSYNC Y53 CRT_HSYNC DDPD_0P BG40
5 4 25 PCH_VSYNC Y51 CRT_VSYNC DDPD_1N BJ38
DDPD_1P BG38

CRT
SRN150F-1-GP BF37
CRT_IREF DDPD_2N
1 2 AD48 DAC_IREF DDPD_2P BH37
R177 AB51 BE36
1KR2D-1-GP CRT_IRTN DDPD_3N
BD36
B 1K 0.5% ohm IBEXPEAK-M-GP-NF
DDPD_3P
B
Intel check list recommend use 1K 0.5%

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

17_PCH (4/9)-LVDS / CRT


Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 17 of 58
5 4 3 2 1
http://hobi-elektronika.net
PCH1E 5 OF 10
H40 AY9 +V_NVRAM_VCCQ
AD0 NV_CE#0
RN63 3D3V_S0 N34 BD1 DMI Termination Voltage
PCI_TRDY# AD1 NV_CE#1
1 10 C44 AP15
AD2 NV_CE#2

1
PCI_PLOCK# 2 9 PCI_STOP# These pins are left as NC, A38 BD8 NV_CLE Set to Vss when low.
PCI_DEVSEL# INT_PIRQD# AD3 NV_CE#3 R210
3 8 C36
AD4 Set to Vcc when high.
INT_PIRQG# PCI_IRDY# because the function is disable. 1KR2J-1-GP
D 3D3V_S0
4
5
7
6 PCI_FRAME#
J34
A40
D45
AD5
AD6
NV_DQS0
NV_DQS1
AV9
BG8
DY
D

2
AD7 NV_CLE
SRN8K2J-2-GP-U E36 AP7
AD8 NV_DQ0/NV_IO0
H48 AP6
AD9 NV_DQ1/NV_IO1
E40 AT6
AD10 NV_DQ2/NV_IO2
C40 AT9
AD11 NV_DQ3/NV_IO3
M48 BB1
3D3V_S0 AD12 NV_DQ4/NV_IO4
M45 AV6
3D3V_S0 AD13 NV_DQ5/NV_IO5 +V_NVRAM_VCCQ
RN73 F53 BB3
PCI_REQ0# AD14 NV_DQ6/NV_IO6
1 8
PCI_PERR#
M40
AD15 NV_DQ7/NV_IO7
BA4 These pins are left as NC,

NVRAM
2 7 M43
AD16 NV_DQ8/NV_IO8
BE4

1
1 2 INT_PIRQB# 3 6 INT_PIRQH# J36
AD17 NV_DQ9/NV_IO9
BB6 because the function is disable. Danbury Technology:
R134 1 2 8K2R2J-3-GP PCI_REQ3# 4 5 PCI_REQ1# K48 BD6 Disabled when Low. R214
R141 8K2R2J-3-GP AD18 NV_DQ10/NV_IO10
SRN8K2J-4-GP
F40 AD19 NV_DQ11/NV_IO11 BB7 Enable when High. DY 1KR2J-1-GP
C42 AD20 NV_DQ12/NV_IO12 BC8
K46 BJ8

2
3D3V_S0 AD21 NV_DQ13/NV_IO13 NV_ALE
M51 AD22 NV_DQ14/NV_IO14 BJ6
-1 0114 J52 BG6
AD23 NV_DQ15/NV_IO15
K51 AD24
1 2 INT_PIRQF# L34 BD3 NV_ALE
R138 8K2R2J-3-GP AD25 NV_ALE NV_CLE
F42 AD26 NV_CLE AY6
J40 AD27
G46 AD28
F44 AU2 NV_RCOMP 1 DY 2
AD29 NV_RCOMP R197
M47 AD30

PCI
H36 AV7 32D4R2F-GP
3D3V_S0 AD31 NV_RB#
RN65 J50 AY8
INT_PIRQA# C/BE0# NV_WR#0_RE#
1 8 G42 C/BE1# NV_WR#1_RE# AY5
2 7 INT_PIRQC# SB 1015 R105 change to ASM H47
INT_PIRQE# C/BE2#
3 6 G34 C/BE3# NV_WE#_CK0 AV11
4 5 PCI_SERR# 3D3V_S0 BF5
INT_PIRQA# NV_WE#_CK1
G38 Pair Device
C SRN8K2J-4-GP 2 INT_PIRQB#
INT_PIRQC#
H51
B37
PIRQA#
PIRQB#
PIRQC# USBP0N H18 0 NC
C
R105 INT_PIRQD# A44 J18
8K2R2J-3-GP PIRQD# USBP0P
USBP1N A18 USBPN1 32 1 USB3
PCI_REQ0# F51 C18
REQ0# USBP1P USBPP1 32
PCI_REQ1# A46 N20 2 USB1
USBPN2 32
1

dGPU_SELECT# REQ1#/GPIO50 USBP2N


23,24,25 dGPU_SELECT# B45 REQ2#/GPIO52 USBP2P P20 USBPP2 32
PCI_REQ3# M53 J20 3 WLAN
REQ3#/GPIO54 USBP3N USBPN3 31
USBP3P L20 USBPP3 31
PCI_GNT0# F48 F20 USBPN4 31 4 Card Reader
PCI_GNT1# GNT0# USBP4N
K45 G20 USBPP4 31
dGPU_PWM_SELECT# GNT1#/GPIO51 USBP4P
24 dGPU_PWM_SELECT# F36
GNT2#/GPIO53 USBP5N
A20 USBPN5 31 5 WWAN
PCI_GNT0# 1 DY 2 R118 PCI_GNT3# H53 C20 USBPP5 31
1KR2J-1-GP GNT3#/GPIO55 USBP5P
USBP6N
M22 6 Disable (HM55)
PCI_GNT1# 1 DY 2 R150 INT_PIRQE# B41 N22
1KR2J-1-GP INT_PIRQF# PIRQE#/GPIO2 USBP6P
K53
PIRQF#/GPIO3 USBP7N
B21 7 Disable (HM55)
INT_PIRQG# A36 D21
INT_PIRQH# PIRQG#/GPIO4 USBP7P
A48
PIRQH#/GPIO5 USBP8N
H22 USBPN8 32 8 USB2
BOOT BIOS Strap USBP8P
J22 USBPP8 32

USB
K6
PCIRST# USBP9N
E22 USBPN9 32 9 Blue Tooth
PCI_GNT#0 PCI_GNT#1 BOOT BIOS Location F22 USBPP9 32
PCI_SERR# USBP9P
E44
SERR# USBP10N
A22 USBPN10 35 10 Finger Print
0 0 LPC(Default) PCI_PERR# E50 C22 USBPP10 35
PERR# USBP10P
USBP11N
G24 11 NC
1 0 Reserved USBP11P
H24
PCI_IRDY# A42 L24 USBPN12 31 12 Express Card
IRDY# USBP12N
0 1 PCI H44
PAR USBP12P
M24 USBPP12 31
PCI_DEVSEL# F46 A24 USBPN13 24 13 Camera
PCI_FRAME# DEVSEL# USBP13N
1 1 SPI C46
FRAME# USBP13P
C24 USBPP13 24
PCI_PLOCK# D49
PLOCK# USB_RBIAS_PN
B25 1 2
PCI_STOP# USBRBIAS# R115
D41
STOP#
B 1
PCI_TRDY#

ICH_PME#
C48

M7
TRDY# USBRBIAS
D25 20R2F-GP
SC 1208, BOM Change to 20ohm for fine tune USB signal B
TPAD14-GP TP39 PME#
N16 USB_OC#0 32
PCI_PLTRST# OC0#/GPIO59 3D3V_S5
D5 J16 USB_OC#1 32
PLTRST# OC1#/GPIO40 USB_OC#3 RN68
F16
R151 1 OC2#/GPIO41
35 PCLK_FWH 2 22R2J-2-GP CLK_PCI_SIO_R N52 L16 USB_OC#4 8 1
R160 1 CLKOUT_PCI0 OC3#/GPIO42
15 CLK_PCI_FB 2 22R2J-2-GP CLK_PCI_FB_R P53
CLKOUT_PCI1 OC4#/GPIO43
E14 USB_OC#4 32
USB_OC#1 7 2
33 CLK_PCI_KBC R161 1 2 22R2J-2-GP CLK_PCI_KBC_R P46 G16 USB_OC#3 6 3
CLKOUT_PCI2 OC5#/GPIO9
1 CLK_PCI_3 P51 F12 USB_OC#0 5 4
TPAD14-GP TP32 CLKOUT_PCI3 OC6#/GPIO10
1 CLK_PCI_4 P48 T15
TPAD14-GP TP29 CLKOUT_PCI4 OC7#/GPIO14 SRN10KJ-6-GP

IBEXPEAK-M-GP-NF

3D3V_S5

2 1

C197
U59 SCD1U10V2KX-5GP
1
B DY
5
PCI_PLTRST# VCC
2
A OC#0 Port 0 & 1
4 PLT_RST# 5,29,31,33,35,51
Y
3
GND
1

PCI_GNT3# 1 DY 2 OC#1 Port 2 & 3


74LVC1G08GW-1-GP R490 R123 4K7R2J-2-GP EHCI 1
DY 100KR2J-1-GP OC#2 Port 4 & 5
1 2 A16 swap override Strap/Top-Block OC#3 Port 6 & 7
2

R483 0R2J-2-GP Swap Override jumper


A OC#4 Port 8 & 9
<Core Design>
A
PCI_GNT#3 Low = A16 swap OC#5 Port 10 & 11
override/Top-Block EHCI 2
Swap Override enabled OC#6 Port 12 & 13 Wistron Corporation
High = Default 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
OC#7 Floater OC# (not used)
Taipei Hsien 221, Taiwan, R.O.C

Title

18_PCH (5/9)-PCI / USB


Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 18 of 58

5 4 3 2 1
5 4 3 2 1
3D3V_S0 PCH_GPIO0
http://hobi-elektronika.net
PCH1F 6 OF 10

Y3 BMBUSY#/GPIO0 CLKOUT_PCIE6N AH45


CLKOUT_PCIE6P AH46
RN28 EC_SMI# C38 TACH1/GPIO1
5 4
PCH_GPIO48 6 3 1 PX_HDMI# D37
PCH_GPIO39 TPAD14-GP TP100 TACH2/GPIO6
7 2 CLKOUT_PCIE7N AF48

MISC
PSW_CLR# 8 1 33 EC_SCI# EC_SCI# J32 AF47
TACH3/GPIO7 CLKOUT_PCIE7P
SRN10KJ-6-GP 33 EC_SWI# EC_SWI# F10 GPIO8

D SA 091015 PCH_GPIO12 PCH_GPIO12 K9 LAN_PHY_PWR_CTRL/GPIO12 A20GATE U2 KA20GATE 33


PU at KBC
D
PCH_GPIO35 1 2 PCH_GPIO15 T7
10KR2J-3-GP R175 GPIO15 -1 0112
51 DGPU_HOLD_RST# DGPU_HOLD_RST# AA2 AM3 BCLK_CPU_N 5
SATA4GP/GPIO16 CLKOUT_BCLK0_N/CLKOUT_PCIE8N
BCLK_CPU_P 5
DGPU_HOLD_RST# 2 1 45,50,51 DGPU_PWROK DGPU_PWROK F38 AM1
10KR2J-3-GP R180 TACH0/GPIO17 CLKOUT_BCLK0_P/CLKOUT_PCIE8P
PCH_GPIO22 Y7 BG10
SCLOCK/GPIO22 PECI H_PECI 5

GPIO
DGPU_PWR_EN# 1 2 1 PCH_GPIO24 H10 T1 PU at KBC
GPIO24 RCIN# KBRCIN# 33
10KR2J-3-GP R178 TPAD14-GP TP99
1 PCH_GPIO27 AB12 BE10 H_PWRGD 5,36
GPIO27 PROCPWRGD

CPU
TPAD14-GP TP46
PCH_GPIO28 V13 BD10
GPIO28 THRMTRIP# 1D05V_VTT
STP_PCI# M11
PSW_CLR# STP_PCI#/GPIO34
1 2
CHECK PCH_GPIO35 V6 R223
SATACLKREQ#/GPIO35
2

CRB, 1K PH 3D3V_S0 56R2J-4-GP


50 DGPU_PWR_EN# DGPU_PWR_EN# AB7 BA22
G12 SATA2GP/GPIO36 TP1 PCH_THERMTRIP_R 1 2 PM_THRMTRIP-A# 5,36
GAP-OPEN dGPU_PRSNT# AB13 AW22 R224
SATA3GP/GPIO37 TP2 54D9R2F-L1-GP
1

23,25 dGPU_EDID dGPU_EDID V3 BB22 SB 1015 modify circuit


SLOAD/GPIO38 TP3
Placed Within 2" from PCH
PCH_GPIO39 P3 AY45
SDATAOUT0/GPIO39 TP4
PCH_GPIO45 H3 AY46
PCIECLKRQ6#/GPIO45 TP5
SA 0901
C 5 RST_GATE 1 2 PCH_GPIO46 F1 PCIECLKRQ7#/GPIO46 TP6 AV43 C
R110 0R0402-PAD
S3 power reduce PCH_GPIO48 AB6 AV45 GPIO8 has a weak[20K] internal pull up.
SDATAOUT1/GPIO48 TP7 3D3V_S0
-1 0114 No need to have external pull down/up.
PSW_CLR# AA4 AF13
SATA5GP/GPIO49 TP8 GPIO8 pin set to high at reset.

2
15 PCH_GPIO57 PCH_GPIO57 F8 M18 UMA
GPIO57 TP9 R183 GPIO15 has a weak[20K] internal pull down.
N18 10KR2J-3-GP
TP10 No need to have external pull up/down.
B4 VSS_NCTF_8
B52 AJ24 GPIO 15 pin is set to low at reset.

1
VSS_NCTF_9 TP11 dGPU_PRSNT# Low : ME Crypto TLS with no confidentiality
BH2

NCTF
VSS_NCTF_16

RSVD
3D3V_S5 BH52 AK41
VSS_NCTF_17 TP12 High : ME Crypto TLS with confidentiality

2
D2 VSS_NCTF_28
RN69 AK42 R182
PCH_GPIO28 TP13 10KR2J-3-GP
5 4 A4 VSS_NCTF#A4 GPIO27 has a weak[20K] internal pull up.

BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
PCH_GPIO60 6 3 A49 M32 DIS
15 PCH_GPIO60
PCH_GPIO11 VSS_NCTF#A49 TP14 To enable on-die PLL Voltage regurator,

BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,
15 PCH_GPIO11 7 2 A5

1
EC_SWI# VSS_NCTF#A5 should not place external pull down.
8 1 A50 N32

A4,A49,A5,A50,A52,A53,B2,B53,BE1,
VSS_NCTF#A50 TP15
A52 VSS_NCTF#A52
SRN10KJ-6-GP A53 M30 SATACLKREQ#:
VSS_NCTF#A53 TP16
B2 VSS_NCTF#B2
B53 N30 When used as SATACLKREQ#,
R634 8K2R2J-3-GP VSS_NCTF#B53 TP17
BE1 VSS_NCTF#BE1 this pin is open drain and should
PCH_GPIO45 2 1 BE53 H12
PCH_GPIO46 2 1 TP113 1 PCH_NCTF_2 BF1
VSS_NCTF#BE53 TP18 use a pull-up resistor.
TPAD14-GP VSS_NCTF#BF1
BF53 VSS_NCTF#BF53 TP19 AA23
R635 8K2R2J-3-GP BH1 VSS_NCTF#BH1
BH53 AB45
B SB 1015 change to two 8.2k pu BJ1
BJ2
VSS_NCTF#BH53
VSS_NCTF#BJ1
NC_1
AB38
B
VSS_NCTF#BJ2 NC_2
BJ4 VSS_NCTF#BJ4 NCTF TEST PIN:
PCH_GPIO15 1 2 TP114 1 PCH_NCTF_3 BJ49 AB42
R171 1KR2J-1-GP TPAD14-GP VSS_NCTF#BJ49 NC_3
BJ5 VSS_NCTF#BJ5
BJ50 VSS_NCTF#BJ50 NC_4 AB41
BJ52 VSS_NCTF#BJ52
BJ53 VSS_NCTF#BJ53 NC_5 T39
RP1 3D3V_S0 D1
PCH_GPIO0 TP115 VSS_NCTF#D1
1 10 D53 VSS_NCTF#D53
EC_SMI# 2 9 PCH_GPIO22 TPAD14-GP 1 PCH_NCTF_1 E1 P6 INIT3_3V# 1
dGPU_EDID STP_PCI# TP116 PCH_NCTF_4 VSS_NCTF#E1 INIT3_3V# TP31 TPAD14-GP
3 8 1 E53 VSS_NCTF#E53
EC_SCI# 4 7 PX_HDMI# TPAD14-GP C10
TP24
3D3V_S0 5 6
-1 0114 IBEXPEAK-M-GP-NF
SRN10KJ-L3-GP

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

19_PCH (6/9)-GPIO/VSS_NCTF/RSVD
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 19 of 58
5 4 3 2 1
http://hobi-elektronika.net
1D05V_S0 3D3V_S0_DAC R669 3D3V_S0
1.432A PCH1G POWER 7 OF 10
+VCCA_DAC_1_2
69mA 0R2J-2-GP
AB24 VCCCORE VCCADAC AE50 1 R185 2 1 2
AB26 0R0402-PAD
VCCCORE

1
C290 C300 AB28 AE52 R176 C214 C213 C228
VCCCORE VCCADAC

SCD01U50V2KX-1GP

SCD1U10V2KX-5GP
SC10U6D3V3MX-GP SC1U6D3V2KX-GP AD26 0R2J-2-GP SC10U6D3V3MX-GP
VCCCORE

CRT
AD28 AF53 DY -1 0108

2
VCCCORE VSSA_DAC
AF26 -1 0111
VCCCORE

VCC CORE
AF28 AF51

2
VCCCORE VSSA_DAC
D AF30
AF31
VCCCORE
VCCCORE
D
AH26 VCCCORE
AH28 +3VS_VCCA_LVD 3D3V_S0
VCCCORE
AH30 VCCCORE 300mA
AH31 VCCCORE VCCALVDS AH38 1 R192 2
AJ30 0R0603-PAD
VCCCORE -1 0112
AJ31 VCCCORE VSSA_LVDS AH39
1D8V_S0

+1.8VS_VCCTX_LVDS
59mA
VCCTX_LVDS AP43 1 R200 2
1D05V_S0

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
AP45 0R0603-PAD
VCCTX_LVDS

1
AT46 C253 C254 C257 -1 0112

LVDS
VCCTX_LVDS
AK24 VCCIO VCCTX_LVDS AT45 DY
1D05V_S0 SC10U6D3V3MX-GP 5V_S0 U23 3D3V_S0_DAC

2
42mA +1.05VS_VCCAPLL_EXP
1 DY 2 BJ24 VCCAPLLEXP 1 VIN VOUT 5
L12 IND-1UH-2-GP AB34 2
VCC3_3 GND

1
NOTE: This pin can be left as no C304 C249 3 4 C229 C231
3D3V_S0 EN NC#4

SC10U6D3V3MX-GP

SC22U6D3V5MX-2GP
connect in On-Die VR enabled mode DY SC10U6D3V3MX-GP AN20 AB35 DY
(default). VCCIO VCC3_3

SC1U16V3ZY-GP
AN22 357mA

HVCMOS
2

2
VCCIO

1
AN23 AD35 G9091-330T11U-GP
VCCIO VCC3_3
AN24 VCCIO DY 74.09091.J3F

1
AN26 C199 Imax = 300 mA

2
1D05V_S0 VCCIO SCD1U10V2KX-5GP
AN28 VCCIO DY
3.062A BJ26

2
VCCIO
BJ28 VCCIO
AT26 VCCIO
1

TC4 C298 C299 C319 C315 C311 C279 AT28 VCCIO


-1 0112
1
ST220U2D5VBM-2GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C AU26 VCCIO C
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DY AU28 1D5V_S0_1D8V_S0
2

VCCIO
AV26 196mA
2

VCCIO
AV28 VCCIO VCCVRM AT24
AW26 VCCIO
AW28 VCCIO +1.1VS_VCC_DMI 1D05V_VTT

DMI
BA26 VCCIO VCCDMI AT16
BA28 VCCIO
-1 0110 61mA
BB26 AU16 1 2 1D8V_S0 3D3V_S0
VCCIO VCCDMI R239 0R0603-PAD 1D05V_S0
BB28 VCCIO

1
3D3V_S0 BC26 C331
VCCIO

1
PCI E*
BC28 R240 1 DY 2 0R3J-0-U-GP DY
VCCIO SC1U6D3V2KX-GP R225
BD26

2
VCCIO 0R0603-PAD 0R3J-0-U-GP
BD28 VCCIO
1

C306 BE26 AM16 +V_NVRAM_VCCQ R226


SCD1U10V2KX-5GP VCCIO VCCPNAND -1 0110
BE28 AK16 156mA

2
VCCIO VCCPNAND
BG26 AK20
2

VCCIO VCCPNAND
BG28 VCCIO VCCPNAND AK19

1
NOTE: This pin can be left as no BH27 AK15 C274 VCCPNAND which power the DC NAND interface must be powered even if dual channel
connect in On-Die VR enabled mode VCCIO VCCPNAND SCD1U10V2KX-5GP
VCCPNAND AK13 NAND interface is not connected since it also supplies power to other functions inside
1D05V_S0 (default). AN30 AM12

2
VCCIO VCCPNAND PCH.
NAND / SPI
AN31 VCCIO VCCPNAND AM13
1 DY 2 AM15 If NAND Interface is unused then this pin should be pulled up to 1.8V or 3.3V.
L13 IND-1UH-2-GP VCCPNAND
357mA
1

AN35 VCC3_3
C303 DY
SC10U6D3V3MX-GP
2

VCCAFDI_VRM AT22 VCCVRM[1]


1D05V_S0 +1.05VS_VCCAPLL_FDI BJ18 AM8
B VCCFDIPLL VCCME3_3
VCCME3_3 AM9 3D3V_S0 B
FDI

AM23 VCCIO VCCME3_3 AP11 85mA VCCME3_3


VCCME3_3 AP9 1 2
R208
1

1
C308 C317 C329 C333 C297 C269 0R3J-0-U-GP
SC10U6D3V3MX-GP SCD1U10V2KX-5GP
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

IBEXPEAK-M-GP-NF
2

2
1D8V_S0 1D5V_S0_1D8V_S0
-1 0110
1D5V_S0 1 2
R243 0R0603-PAD
1 DY 2 1 2 VCCAFDI_VRM
R242 0R3J-0-U-GP R237 0R0603-PAD
-1 0110

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

20_PCH (7/9)-PWR_1
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 20 of 58
5 4 3 2 1
1D05V_S0
52mA
SB 1015 change to 68.1001D.10E
1 DY
L11
2 IND-10UH-215-GP
+1.05VS_VCCA_CLK

PCH1J
http://hobi-elektronika.net
POWER 10 OF 10 1D05V_S0
NOTE: This pin can be left as no connect in

1
SC1U10V2KX-1GP
On-Die VR enabled mode (default). DY C245 AP51 V24
C266 VCCACLK VCCIO
DY VCCIO V26

1
SC10U6D3V3MX-GP AP53 Y24 C307

2
VCCACLK VCCIO SC1U6D3V2KX-GP
VCCIO Y26

2
1D05V_S0 AF23 V28
R221 VCCLAN VCCSUS3_3 3D3V_S5
VCCSUS3_3 U28
1 DY 2 0R2J-2-GP +1.05VS_VCCLAN AF24 U26
VCCLAN VCCSUS3_3
VCCSUS3_3 U24

1
D VccLAN may be grounded if C291
VCCSUS3_3 P28
D

1
R222 SC1U6D3V2KX-GP DCPSUSBYP Y20 P26 C195 C597 C598
Intel LAN is disabled DCPSUSBYP VCCSUS3_3
0R0402-PAD DY C217 N28 SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP
VCCSUS3_3

1
SCD1U10V2KX-5GP N26

2
VCCSUS3_3
AD38 M28

2
VCCME VCCSUS3_3
M26

2
-1 0112 VCCSUS3_3
AD39 L28

USB
VCCME VCCSUS3_3
VCCSUS3_3 L26
AD41 VCCME VCCSUS3_3 J28
1D05V_S0 J26
VCCSUS3_3 3D3V_S5
1.849A AF43 VCCME VCCSUS3_3 H28
VCCSUS3_3 H26
AF41 VCCME VCCSUS3_3 G28
1

1
C295 C296 G26
VCCSUS3_3

1
SC10U6D3V3MX-GP SC10U6D3V3MX-GP C301 AF42 F28 C599
SC1U6D3V2KX-GP VCCME VCCSUS3_3 SCD1U10V2KX-5GP
F26
2

2
VCCSUS3_3
V39 E28

2
VCCME VCCSUS3_3

Clock and Miscellaneous


VCCSUS3_3 E26
V41 VCCME VCCSUS3_3 C28
VCCSUS3_3 C26
V42 B27 3D3V_S5
VCCME VCCSUS3_3
VCCSUS3_3 A28
SB 1015 change to 68.1001D.10E Y39 A26 D17
VCCME VCCSUS3_3

2
C313 DY CH751H-40PT-GP
1D05V_S0 SC1U10V2KX-1GP Y41 U23 1D05V_S0 83.R0304.A8F
L9 VCCME VCCSUS3_3 3D3V_S0
2ND = 83.R3004.A8F

2
1 2 +1.05VS_VCCA_A_DPL Y42 V23 5V_S5
IND-10UH-215-GP VCCME VCCIO D3
1mA

1
1

2
C262 C264 F24 +5VALW_PCH_VCC5REFSUS 1 2 R488 CH751H-40PT-GP
SC10U6D3V3MX-GP SC1U6D3V2KX-GP V5REF_SUS 10R2J-2-GP 83.R0304.A8F

1
+VCCRTCEXT V9 C600 2ND = 83.R3004.A8F
2

DCPRTC SCD1U10V2KX-5GP 5V_S0


C C
1

1D5V_S0_1D8V_S0
1mA

1
L10
C212 K49 +5VS_PCH_VCC5REF 1 2 R130
+1.05VS_VCCA_B_DPL SCD1U10V2KX-5GP V5REF 10R2J-2-GP
1 2 AU24

PCI/GPIO/LPC
2

VCCVRM

1
IND-10UH-215-GP C200
1

C273 C271 J38 SCD1U10V2KX-5GP


SC10U6D3V3MX-GP SC1U6D3V2KX-GP VCC3_3
68mA BB51

2
+1.05VS_VCCA_A_DPL VCCADPLLA
BB53 L38
2

VCCADPLLA VCC3_3 3D3V_S0


69mA +1.05VS_VCCA_B_DPL VCC3_3 M36
BD51 VCCADPLLB
BD53 VCCADPLLB VCC3_3 N36

1
C224
AH23 P36 SCD1U10V2KX-5GP
VCCIO VCC3_3
AJ35

2
VCCIO C265
AH35 VCCIO VCC3_3 U35
1D05V_S0 1 2 SCD1U10V2KX-5GP 3D3V_S0
AF34 VCCIO
VCC3_3 AD13
AH34 VCCIO
1

C330 C318 C314 1D05V_S0


SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP +1.05VS_VCCAPLL
AF32 VCCIO 32mA
AK3 1 DY 2
2

VCCSATAPLL L8
V12 DCPSST VCCSATAPLL AK1

1
C221 C222 IND-10UH-215-GP
+VCCSST SC1U10V2KX-1GP DY DY SC1U10V2KX-1GP SB 1015 change to 68.1001D.10E
1D05V_S0

2
1

+1.1VALW_INT_VCCSUS Y22
C215 DCPSUS
VCCIO AH22
1

SCD1U10V2KX-5GP C220
2

1
SCD1U10V2KX-5GP 1D5V_S0_1D8V_S0 C310
P18 AT20 SC1U6D3V2KX-GP
2

VCCSUS3_3 VCCVRM
B B

2
3D3V_S5 U19
SATA

VCCSUS3_3
PCI/GPIO/LPC

163mA VCCIO AH19


U20 VCCSUS3_3
VCCIO AD20
1

U22 VCCSUS3_3
C196 AF22
SCD1U10V2KX-5GP 3D3V_S0 VCCIO
2

VCCIO AD19
V15 VCC3_3 VCCIO AF20
VCCIO AF19
1

C305 V16 AH20


SCD1U10V2KX-5GP VCC3_3 VCCIO
Y16 AB19
2

VCC3_3 VCCIO
VCCIO AB20
1D05V_VTT AB22
VCCIO 1D05V_S0
R230
1mA +1.1VS_PCH_CPU_IO VCCIO AD22
-1 0107
1 2 AT18 V_CPU_IO
0R0603-PAD AA34 PCH_VCC_1_1_20 R156 1 2 0R0402-PAD
CPU

VCCME
1

-1 0112 C278 C292 C293 Y34 PCH_VCC_1_1_21 R146 1 2 0R0402-PAD


SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP VCCME PCH_VCC_1_1_22 R152 0R0402-PAD
AU18 V_CPU_IO VCCME Y35 1 2
AA35 PCH_VCC_1_1_23 R163 1 2 0R0402-PAD
2

VCCME +3VS_+1.5VS_HDA_IO 3D3V_S5


6mA
RTC

A12 L30 R468 1 2


RTC_AUX_S5 VCCRTC VCCSUSHDA
HDA

0R0603-PAD
1

2mA C586 -1 0112


R476 1 2 +1.1VS_PCH_VCCRTC IBEXPEAK-M-GP-NF SC1U6D3V2KX-GP
0R0603-PAD
2
1

-1 0112 C590 C594


SCD1U10V2KX-5GP SCD1U10V2KX-5GP

A A
2

<Core Design>

Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

21_PCH (8/9)-PWR_2
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 21 of 58
5 4 3 2 1
PCH1I
http://hobi-elektronika.net
9 OF 10
AY7 VSS VSS H49
B11 VSS VSS H5
B15 VSS VSS J24
B19 VSS VSS K11
B23 VSS VSS K43
B31 VSS VSS K47
B35 VSS VSS K7
B39 VSS VSS L14
B43 L18
VSS VSS
B47 L2
VSS VSS
B7 L22
D AB16
PCH1H
VSS
8 OF 10 BG12
BB12
VSS
VSS
VSS
VSS
VSS
VSS
L32
L36
D
BB16 L40
VSS VSS
AA19 AK30 BB20 L52
VSS VSS VSS VSS
AA20 AK31 BB24 M12
VSS VSS VSS VSS
AA22 AK32 BB30 M16
VSS VSS VSS VSS
AM19 AK34 BB34 M20
VSS VSS VSS VSS
AA24 AK35 BB38 N38
VSS VSS VSS VSS
AA26 AK38 BB42 M34
VSS VSS VSS VSS
AA28 AK43 BB49 M38
VSS VSS VSS VSS
AA30 AK46 BB5 M42
VSS VSS VSS VSS
AA31 VSS VSS AK49 BC10 VSS VSS M46
AA32 VSS VSS AK5 BC14 VSS VSS M49
AB11 VSS VSS AK8 BC18 VSS VSS M5
AB15 VSS VSS AL2 BC2 VSS VSS M8
AB23 VSS VSS AL52 BC22 VSS VSS N24
AB30 VSS VSS AM11 BC32 VSS VSS P11
AB31 VSS VSS BB44 BC36 VSS VSS AD15
AB32 VSS VSS AD24 BC40 VSS VSS P22
AB39 VSS VSS AM20 BC44 VSS VSS P30
AB43 VSS VSS AM22 BC52 VSS VSS P32
AB47 VSS VSS AM24 BH9 VSS VSS P34
AB5 VSS VSS AM26 BD48 VSS VSS P42
AB8 VSS VSS AM28 BD49 VSS VSS P45
AC2 VSS VSS BA42 BD5 VSS VSS P47
AC52 VSS VSS AM30 BE12 VSS VSS R2
AD11 VSS VSS AM31 BE16 VSS VSS R52
AD12 VSS VSS AM32 BE20 VSS VSS T12
AD16 VSS VSS AM34 BE24 VSS VSS T41
AD23 VSS VSS AM35 BE30 VSS VSS T46
AD30 VSS VSS AM38 BE34 VSS VSS T49
AD31 VSS VSS AM39 BE38 VSS VSS T5

C AD32
AD34
VSS
VSS
VSS
VSS
AM42
AU20
BE42
BE46
VSS
VSS
VSS
VSS
T8
U30 C
AU22 VSS VSS AM46 BE48 VSS VSS U31
AD42 VSS VSS AV22 BE50 VSS VSS U32
AD46 VSS VSS AM49 BE6 VSS VSS U34
AD49 VSS VSS AM7 BE8 VSS VSS P38
AD7 VSS VSS AA50 BF3 VSS VSS V11
AE2 BB10 BF49 P16
VSS VSS VSS VSS
AE4 AN32 BF51 V19
VSS VSS VSS VSS
AF12 AN50 BG18 V20
VSS VSS VSS VSS
Y13 AN52 BG24 V22
VSS VSS VSS VSS
AH49 AP12 BG4 V30
VSS VSS VSS VSS
AU4 AP42 BG50 V31
VSS VSS VSS VSS
AF35 AP46 BH11 V32
VSS VSS VSS VSS
AP13 AP49 BH15 V34
VSS VSS VSS VSS
AN34 AP5 BH19 V35
VSS VSS VSS VSS
AF45 AP8 BH23 V38
VSS VSS VSS VSS
AF46 AR2 BH31 V43
VSS VSS VSS VSS
AF49 AR52 BH35 V45
VSS VSS VSS VSS
AF5 AT11 BH39 V46
VSS VSS VSS VSS
AF8 BA12 BH43 V47
VSS VSS VSS VSS
AG2 AH48 BH47 V49
VSS VSS VSS VSS
AG52 AT32 BH7 V5
VSS VSS VSS VSS
AH11 AT36 C12 V7
VSS VSS VSS VSS
AH15 AT41 C50 V8
VSS VSS VSS VSS
AH16 AT47 D51 W2
VSS VSS VSS VSS
AH24 AT7 E12 W52
VSS VSS VSS VSS
AH32 AV12 E16 Y11
VSS VSS VSS VSS
AV18 AV16 E20 Y12
VSS VSS VSS VSS
AH43 AV20 E24 Y15
VSS VSS VSS VSS
AH47 AV24 E30 Y19
VSS VSS VSS VSS
AH7 AV30 E34 Y23
VSS VSS VSS VSS
AJ19 AV34 E38 Y28
B AJ2
AJ20
VSS
VSS
VSS
VSS
VSS
VSS
AV38
AV42
E42
E46
VSS
VSS
VSS
VSS
VSS
VSS
Y30
Y31
B
AJ22 AV46 E48 Y32
VSS VSS VSS VSS
AJ23 AV49 E6 Y38
VSS VSS VSS VSS
AJ26 AV5 E8 Y43
VSS VSS VSS VSS
AJ28 AV8 F49 Y46
VSS VSS VSS VSS
AJ32 AW14 F5 P49
VSS VSS VSS VSS
AJ34 AW18 G10 Y5
VSS VSS VSS VSS
AT5 AW2 G14 Y6
VSS VSS VSS VSS
AJ4 BF9 G18 Y8
VSS VSS VSS VSS
AK12 AW32 G2 P24
VSS VSS VSS VSS
AM41 AW36 G22 T43
VSS VSS VSS VSS
AN19 AW40 G32 AD51
VSS VSS VSS VSS
AK26 AW52 G36 AT8
VSS VSS VSS VSS
AK22 AY11 G40 AD47
VSS VSS VSS VSS
AK23 AY43 G44 Y47
VSS VSS VSS VSS
AK28 AY47 G52 AT12
VSS VSS VSS VSS
AF39 AM6
IBEXPEAK-M-GP-NF VSS VSS
H16 AT13
VSS VSS
H20 AM5
VSS VSS
H30 AK45
VSS VSS
H34 AK39
VSS VSS
H38 AV14
VSS VSS
H42
VSS

IBEXPEAK-M-GP-NF

A <Core Design>
A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

22_PCH (9/9)-VSS
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 22 of 58
5 4 3 2 1
U51 DIS
DIS
1D8V_S0

DIS
http://hobi-elektronika.net
38 2 3D3V_S0
17 PCH_TXACLK+ ATMDS2+ VDD

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
37 8 C530 C528 C545 RN5
17 PCH_TXACLK- ATMDS2- VDD LCD_EDID_DAT
36 16 2 3
17 PCH_TXAOUT2+ ATMDS1+ VDD LCD_EDID_CLK
35 18 1 4

2
17 PCH_TXAOUT2- ATMDS1- VDD
34 20
17 PCH_TXAOUT1+ ATMDS0+ VDD SRN2K2J-1-GP
33 30
17 PCH_TXAOUT1- ATMDS0- VDD 3D3V_S0
32 40
17 PCH_TXAOUT0+ ATMDSCLK+ VDD
17 PCH_TXAOUT0-
31
ATMDSCLK- VDD
42 DIS
SA 0908: Add for LVDS signal SWAP
29 U17 DIS
54 GPU_TXACLK+ BTMDS2+
D 54
54
GPU_TXACLK-
GPU_TXAOUT2+
28
27
26
BTMDS2-
BTMDS1+
TMDS2+
TMDS2-
3
4
6
LCD_TXACLK+ 24
LCD_TXACLK- 24
3D3V_S0
SB 1015 modify for SEL pin
voltage level issue 55 NV_LCD_EDID_DAT
3
2
B0 A
4
5
LCD_EDID_DAT 24 D
54 GPU_TXAOUT2- BTMDS1- TMDS1+ LCD_TXAOUT2+ 24 GND VCC

2
25 7 LCD_TXAOUT2- 24 1 6
54 GPU_TXAOUT1+ BTMDS0+ TMDS1- R401 17 DAT_DDC_EDID B1 S
24 11 LCD_TXAOUT1+ 24
54 GPU_TXAOUT1- BTMDS0- TMDS0+
23 12 LCD_TXAOUT1- 24 8K2R2J-3-GP
54 GPU_TXAOUT0+ BTMDSCLK+ TMDS0- NC7SB3157P6X-1GP
22 14 LCD_TXAOUT0+ 24 DIS
54 GPU_TXAOUT0- BTMDSCLK- TMDSCLK+
15 LCD_TXAOUT0- 24 73.03157.C0H

1
TMDSCLK- LVDS_SELECT# 2ND = 73.53157.A0J
LVDS_SELECT# 9
SEL U18
VSS
1 DIS
2

D
VSS
10 3 4 LCD_EDID_CLK 24
R400 VSS Q2 55 NV_LCD_EDID_CLK B0 A
VSS
13 DIS 2
GND VCC
5
10KR2J-3-GP 17 2N7002A-7-GP 1 6
VSS dGPU_SELECT# 17 CLK_DDC_EDID B1 S
DIS 19 84.2N702.E31 G
1

VSS
VSS
21 2ND = 84.2N702.D31
39 Pull up on chip side NC7SB3157P6X-1GP EDID_SELECT#_LCD
VSS
41 73.03157.C0H
GND

S
VSS
2ND = 73.53157.A0J
SB 1016 change to 84.2N702.E31 18,24,25 dGPU_SELECT# 1 2
TS3DV421RUAR-GP R33 0R2J-2-GP
43

71.03421.003
71.03412.B0G 19,25 dGPU_EDID 1 2
71.03412.C0G R31 0R2J-2-GP DY

RN57
4 1 LCD_EDID_DAT 24
17 DAT_DDC_EDID
RN4 3 2 LCD_EDID_CLK 24
17 CLK_DDC_EDID
1 8 LCD_TXAOUT1+ 24 SRN0J-6-GP
C 17
17
17
PCH_TXAOUT1+
PCH_TXAOUT1-
PCH_TXAOUT0+
2
3
7
6
LCD_TXAOUT1-
LCD_TXAOUT0+
24
24
UMA C
4 5 LCD_TXAOUT0- 24
17 PCH_TXAOUT0-
SRN0J-7-GP
UMA

RN3
1 8 LCD_TXACLK+ 24
17 PCH_TXACLK+
2 7 LCD_TXACLK- 24
17 PCH_TXACLK-
3 6 LCD_TXAOUT2+ 24
17 PCH_TXAOUT2+
4 5 LCD_TXAOUT2- 24
17 PCH_TXAOUT2-
SRN0J-7-GP
UMA

5V_S0
C25 DIS
3D3V_S0 SCD1U10V2KX-4GP U8 DIS
DIS U12 2 1 16
dGPU_SELECT# VCC
1 4 CRT_BLUE 25,49
S YA
55 NV_BLON_IN 3 4 KBC_BL_ON_IN 33 2
B0 A 53 NV_CRT_BLUE IA0
2 5 3 7 CRT_GREEN 25,49
GND VCC 17 PCH_BLUE IA1 YB
1

17 PCH_BL_ON 1 6 5
B1 S 53 NV_CRT_GREEN IB0
B R30
17 PCH_GREEN
6
IB1 YC
9 CRT_RED 25,49
B
1

100KR2J-1-GP 11
R34 R35 NC7SB3157P6X-1GP 53 NV_CRT_RED IC0
10 12
17 PCH_RED IC1 YD
100KR2J-1-GP 100KR2J-1-GP 73.03157.C0H 14
2

ID0
DY DY 2ND = 73.53157.A0J 13
ID1 OE#
15
8
2

GND
18,24,25 dGPU_SELECT#
PI5C3257QE-GP
73.53257.B0C
2ND = 73.03257.C0B
1 2 KBC_BL_ON_IN
17 PCH_BL_ON
R32 UMA 0R2J-2-GP
RN55
1 8 CRT_BLUE 25,49
17 PCH_BLUE
2 7 CRT_GREEN 25,49
17 PCH_GREEN
3 6
4 5 CRT_RED 25,49
17 PCH_RED
SRN0J-7-GP
UMA

A <Core Design> A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

23_Display MUX
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 23 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
LCD/INVERTER/CCD CONN
LCDVDD

D 42
LCD1
41
CAMERA POWER CCD_PWR
D

1
NP1 C16
1 SCD1U16V2ZY-2GP 1 R395 2
LCD_TXACLK+ 1 2 0R2J-2-GP DY

2
2 DY C514 SC5D6P50V2CN-1GP Q34
3 LCD_TXACLK- 1 2
4 DY C513 SC5D6P50V2CN-1GP 5V_S0 AO3419L-GP
3D3V_S0
5 CCD_PWR CCD_PWR
-1 0114
43 6 LCD_EDID_CLK S D
LCD_EDID_CLK 23

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
7 LCD_EDID_DAT
LCD_EDID_DAT 23

1
8 LCD_TXAOUT0- LCD_TXAOUT0- 23 C511 C510

1
SCD1U10V2KX-4GP
9 LCD_TXAOUT0+ LCD_TXAOUT0+ 23 R398 C515

G
10 100KR2J-1-GP

2
11 LCD_TXAOUT1- LCD_TXAOUT1- 23

2
12 LCD_TXAOUT1+ LCD_TXAOUT1+ 23

2
13 USBPN13 1 2 EC3 DY CAM_ON_T
44 14 LCD_TXAOUT2- LCD_TXAOUT2- 23 SC22P50V2JN-4GP
15 LCD_TXAOUT2+ LCD_TXAOUT2+ 23 USBPP13 1 2 EC4 DY
16 SC22P50V2JN-4GP

D
17 LCD_TXACLK- LCD_TXACLK- 23
18 LCD_TXACLK+ LCD_TXACLK+ 23 Q33
19 2N7002A-7-GP
20 USBPP13 18 33 CAMERA_EN G 84.2N702.E31
45 21 USBPN13 18 2ND = 84.2N702.D31
22 DY
23 LCD_EDID_CLK 1 2 SB 1016 change to 84.2N702.E31

S
24 ECT5 SC33P50V2JN-3GP
25 DY
26 LCD_EDID_DAT 1 2
27 ECT6 SC33P50V2JN-3GP
C 46 28
29 PIN37: Reserve for AUO
C
30 Dynamic Backlight
31 Control pin
32
33 U54 DY 3D3V_S0
34 SR 33ohm at KBC
47 35 BRIGHTNESS_CN 33 BRIGHTNESS 2 DY 1 BRIGHTNESS_DIS 3 4 BRIGHTNESS_CN
B0 A

SC100P50V2JN-3GP
36 BLON_OUT_1 TP2 DCBATOUT R429 33R2J-2-GP 2 5
LCD_AUO_TP TPAD14-GP GND VCC
37 1 F2 17 L_BKLTCTL 2 1 L_BKLTCTL_R 1 6
B1 S

1
38 DCBATOUT_LCD1 2 1 R430 33R2J-2-GP C21
39 POLYSW-1D1A24V-GP
DY
1

40 69.50007.A31 NC7SB3157P6X-1GP

2
NP2 C20 2nd = 69.50007.A41 73.03157.C0H
48 49 SC10U25V6KX-1GP
2

JAE-CON40-GP
18 dGPU_PWM_SELECT# 1 R432 2 dGPU_SELECT#_PWM
-1 0113 0R2J-2-GP DY

33 PWM_SELECT 1 R433 2
0R2J-2-GP DY
18,23,25 dGPU_SELECT# 1 R431 2
0R2J-2-GP DY

3D3V_S0 LCDVDD 3D3V_S0 BRIGHTNESS 1 2 BRIGHTNESS_CN


R428 0R2J-2-GP

B 3
U1 DIS
4 LCDVDD_ON
Layout 40 mil
1
U3

5
SB 1015 brightness control from KBC only B
55 NV_LCDVDD_ON B0 A EN IN#5
2 5 2
GND VCC GND
17 PCH_LCDVDD_ON 1 6 3 4
B1 S OUT IN#4
1

1
C1 C10 C7
NC7SB3157P6X-1GP R3 DY G5285T11U-GP
1

SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
DY DY 73.03157.C0H 100KR2J-1-GP 74.05285.07F
2

2
R10 R2 2ND = 73.53157.A0J

SC100P50V2JN-3GP
100KR2J-1-GP 100KR2J-1-GP 33 BLON_OUT 2 1 BLON_OUT_1
2

1KR2F-3-GP

1
18,23,25 dGPU_SELECT# R25 R24 C26
2

100KR2J-1-GP

2
17 PCH_LCDVDD_ON 1 UMA 2 LCDVDD_ON

2
R4 0R2J-2-GP

A <Core Design> A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

24_LCD & CCD


Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 24 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
SA-0820 Move pi filter to CRT board. 5V_S0
SA-0823 L=>B0 -DIS Hsync & Vsync level shift
H=>B1 -UMA

1
11 18,23,24 dGPU_SELECT#
1 CRT_RED C531 C534
CRT_RED 23,49 SCD1U10V2KX-5GP SCD1U10V2KX-5GP

2
2 CRT_GREEN DIS
CRT_GREEN 23,49 U52
D 3
4
CRT_BLUE
CRT_BLUE 23,49
PER PIN
D
5 CRT_VSYNC1 1 8
CRT_HSYNC1 1OE# VCC
6 53 NV_CRT_HSYNC 2 1A 2OE# 7
7 3 2Y 1Y 6
8 CLK_DDC1_5 5V_CRT_S0 4 5
DAT_DDC1_5 GND 2A
9 For DIS CRT
10
12 SSLVC2G125DP-1GP
C498 73.2G125.A07
CRT1 SCD01U16V2KX-3GP
ACES-CON10-13-GP 53 NV_CRT_VSYNC
20.F0772.010 CRT_VSYNC1_1 1 R405 2CRT_VSYNC1_2 1 R406 2 CRT_VSYNC1
10R2J-2-GP 0R0603-PAD

SB 1024 Add pin to GND (EMI) CRT_HSYNC1_1 1 R396 2CRT_HSYNC1_2 1 R397 2 CRT_HSYNC1
U53 10R2J-2-GP 0R0603-PAD
1 1OE VCC 8
CLK_DDC1_5
CLK_DDC1_5 49 17 PCH_HSYNC 2 1A 2OE 7 -1 0113
DAT_DDC1_5 3 6
DAT_DDC1_5 49 2Y 1Y
4 GND 2A 5
For UMA CRT SSHCT2G126DP-GP
CRT_VSYNC1 73.2G126.ABB
CRT_HSYNC1 CRT_VSYNC1 49
CRT_HSYNC1 49
17 PCH_VSYNC

C C

DDC_CLK & DATA level shift 5V_CRT_S0

5V_S0

D11

1
CH551H-30PT-GP
F1 83.R5003.C8F
3D3V_S0 3D3V_S0 FUSE-1D1A6V-4GP-U 2nd = 83.R5003.G8H
69.50007.691
2nd = 69.50007.771 500mA

2
1

3D3V_S0 5V_CRT_DDC
C23 C22

4
3
SCD1U10V2KX-5GP SCD1U10V2KX-5GP
2

RN54
4
3

PER PIN DY SRN10KJ-5-GP


B B
2
RN53
SRN2K2J-1-GP R383
10KR2J-3-GP

1
2
U9
DIS
1
2

3D3V_S0_DDC
55 NV_CRT_DDCDATA 3 B0 A 4
2 GND VCC 5 Q32
17 PCH_DDCDATA 1 B1 S 6
DDCDATA 4 3 DAT_DDC1_5

NC7SB3157P6X-1GP 5 2
73.03157.C0H
2ND = 73.53157.A0J 6 1
Pull up at chipset side
DMN66D0LDW-7-GP
U10
DIS 84.DMN66.03F
2ND = 84.27002.F3F
3 4 DDCCLK
55 NV_CRT_DDCCLK B0 A
2 GND VCC 5
17 PCH_DDCCLK 1 B1 S 6 SB 1016 change to 84.DMN66.03F CLK_DDC1_5

NC7SB3157P6X-1GP
73.03157.C0H
2ND = 73.53157.A0J dGPU_SELECT#_DDC
RN56

18,23,24 dGPU_SELECT# 1 R18 2 4 1 DDCDATA <Core Design>


A L=>B0 -DIS 0R2J-2-GP
17 PCH_DDCDATA
17 PCH_DDCCLK 3 2 DDCCLK A
H=>B1 -UMA 1 R19 SRN0J-6-GP
19,23 dGPU_EDID
0R2J-2-GP
2
DY UMA
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

25_CRT
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 25 of 58
5 4 3 2 1
3D3V_S0 http://hobi-elektronika.net
3D3V_S0 SA 0910

R144 4K7R2J-2-GP
5V_S0

1
C187 C188 C206 C194

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
HDMI2

2
2
2 1 TDMS_A_DAT
R143

2
4K7R2J-2-GP HDMI_A_HPD_CN 4 3 TDMS_A_CLK
DY DY 6 5
HDMI_TX0- 8 7 HDMI_TX2-

8101_NC35 1
8101_NC34 1
UMA UMA UMA UMA HDMI_TX0+ 10 9 HDMI_TX2+
12 11

D HDMI_TX1-
HDMI_TX1+
14
16
13
15
HDMI_TXC-
HDMI_TXC+ D
MLX-CONN16D-3-GP
20.F0881.016
HDMI_DB

11
15
21
26
33
40
46

35
34
2
U22

VCC
VCC
VCC
VCC
VCC
VCC
VCC

NC#35
NC#34
VCC
38 23 HDMI_TXC-
17 PCH_HDMI_CLK- IN_D1- OUT_D1- HDMI_TXC+
17 PCH_HDMI_CLK+ 39 IN_D1+ OUT_D1+ 22

41 20 HDMI_TX0- RN61 5V_S0


17 PCH_HDMI_DATA0- IN_D2- OUT_D2- HDMI_TX0+ TDMS_A_CLK
17 PCH_HDMI_DATA0+ 42 IN_D2+ OUT_D2+ 19 1 4 2
Recommended Equalization: TDMS_A_DAT 2 3 TDMS_A_CLK_R 3
[PC1,PC0]=01, 4dB 44 17 HDMI_TX1- 1
17 PCH_HDMI_DATA1- IN_D3- OUT_D3- HDMI_TX1+ SRN1K5J-GP D4
17 PCH_HDMI_DATA1+ 45 IN_D3+ OUT_D3+ 16
CH461FPT-GP-U
47 14 HDMI_TX2-
3D3V_S0 17 PCH_HDMI_DATA2- IN_D4- OUT_D4- HDMI_TX2+
17 PCH_HDMI_DATA2+ 48 IN_D4+ OUT_D4+ 13

CHECK
R93 2 UMA 1 4K7R2J-2-GP PC0 3 8 PCH_HDMI_DATA 17
R469 2 4K7R2J-2-GP PC1 PC0 SDA 5V_S0
1 4 PC1 SCL 9 PCH_HDMI_CLK 17
DY 7 HDMI_DETECT_R
HPD
1

2
R470 REXT_HDMI 6
5K1R2F-2-GP 3D3V_S0 REXT HDMI_A_HPD_CN HDMI_A_HPD_CN
8101_OE#
10 RT_EN# HPD_SINK 30
TDMS_A_DAT
3 DY
UMA 25 OE# SDA_SINK 29
2 1 DDC_EN_PS8101 32 28 TDMS_A_CLK 1
2

DDC_EN SCL_SINK D5
C R142 BAV99PT-GP-U C

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
4K7R2J-2-GP
UMA
2

UMA

1
5
12
18
24
27
31
36
37
43
49
R477
499R2F-2-GP
UMA PS8101-GP
CHECK
1

71.P8101.003 5V_S0
2ND = 71.03411.B03
HDMI1
21 23
HDMI_A_HPD_CN 19
49 HDMI_TX0-
49 HDMI_TX0+ 18
49 HDMI_TX1- 17
TDMS_A_DAT 16
49 HDMI_TX1+ TDMS_A_CLK
49 HDMI_TX2- 15
3D3V_S0 TP112 14
49 HDMI_TX2+ TPAD14-GP HDMI_A_CEC
49 HDMI_TXC- 1 13
HDMI_TXC- 12
49 HDMI_TXC+
1

49 TDMS_A_DAT 11
3D3V_S0 R147 HDMI_TXC+ 10
20KR2J-L2-GP 49 TDMS_A_CLK HDMI_TX0- 9
UMA 49 HDMI_A_HPD_CN 8
HDMI_TX0+ 7
2
1

-1 0114 8101_OE# HDMI_TX1- 6


R190 -1 0114 5
G

20KR2J-L2-GP HDMI_TX1+ 4
UMA HDMI_TX2- 3
D

2
2

17 PCH_HDMI_DETECT S D HDMI_DETECT_R Q8

B HDMI_TX2+ 1
B
1

HDMI_A_HPD_CN G UMA 20 22
Q12 UMA R181 2N7002A-7-GP
2N7002A-7-GP 100KR2J-1-GP SKT-HDMI19P-76-GP
SB 1015 change to 84.2N702.E31 UMA 22.10296.241
S

HDMI_ONMB
2

SB 1015 change to 84.2N702.E31


SB 1016 Add 22.10296.241

RN64
1 8 HDMI_TX2-
54 NV_HDMI_DATA2- HDMI_TX2+
54 NV_HDMI_DATA2+ 2 7
3 6 HDMI_TX1- 3D3V_S0
54 NV_HDMI_DATA1- HDMI_TX1+
54 NV_HDMI_DATA1+ 4 5

SRN0J-7-GP
DIS_HDMI Q50
NV_HDMI_DATA_R 1 6 TDMS_A_DAT

RN71 2 5
1 8 HDMI_TX0-
54 NV_HDMI_DATA0- HDMI_TX0+ TDMS_A_CLK NV_HDMI_CLK_R
54 NV_HDMI_DATA0+ 2 7 3 4
3 6 HDMI_TXC-
54 NV_HDMI_CLK- HDMI_TXC+ DMN66D0LDW-7-GP
54 NV_HDMI_CLK+ 4 5
84.DMN66.03F
SRN0J-7-GP 2ND = 84.27002.F3F
DIS_HMDI DIS_HDMI

A 1
DIS_HDMI
2 NV_HDMI_DATA_R
SB 1015 change to 84.DMN66.03F <Core Design> A
54 NV_HDMI_DATA
R480 DIS_HDMI 0R2J-2-GP
NV_HDMI_CLK_R
54 NV_HDMI_CLK 1
R491
2
0R2J-2-GP
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
DIS_HDMI Taipei Hsien 221, Taiwan, R.O.C

33,54 NV_HDMI_DETECT 1 2 HDMI_A_HPD_CN


R164 0R2J-2-GP Title

26_HDMI
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 26 of 58
5 4 3 2 1
3D3V_S0 AUD_3VD 5V_S0 AUD_5VD 5V_S0
http://hobi-elektronika.net
Speaker AUD_5VA SPKR_L- 1 2
-1 0107
SPKR_L-_R
6

4
SPK1

-1 0107 -1 0107 -1 0107 SPEK L SPKR_L+ R418 1 2 0R0402-PAD SPKR_L+_R 3


1 2 1 2 1 2 SPKR_R- R417 1 2 0R0402-PAD SPKR_R-_R 2
R284 C426 C420 R294 C429 C440 C433 R310 SPEK R R416 0R0402-PAD

1
0R0603-PAD C430 0R0603-PAD 0R0603-PAD C447 C442 C449 SPKR_R+ 1 2 SPKR_R+_R 1

1
SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
C452 R415 0R0402-PAD

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SC1U10V2KX-1GP 5

2
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
SC1U10V2KX-1GP EC15 EC14 EC13 EC12

2
ACES-CON4-17-GP
AFTP11 AFTE14P-GP 1 SPKR_L-_R 20.F1621.004

1
AFTP10 AFTE14P-GP 1 SPKR_L+_R
D AFTP13
AFTP14
AFTE14P-GP
AFTE14P-GP
1
1
SPKR_R-_R
SPKR_R+_R D
-1 0113

AUD_3VD AUD_5VA AUD_5VD R289 1 2 AUD_PC_BEEP_C 1 2 AUD_PC_BEEP


14 ACZ_SPKR
10KR2J-3-GP C419

1
C464 MIC_IN_R C441 1 2 SC4D7U6D3V3KX-GP MIC_IN_JACK_R SCD1U10V2KX-5GP

SC2D2U10V3ZY-1GP
AUD_5VA_1

1
MIC_IN_L C436 1 2 SC4D7U6D3V3KX-GP MIC_IN_JACK_L R285 1 2 R286

2
33 KBC_BEEP 10KR2J-3-GP C418 4K7R2J-2-GP
SC100P50V2JN-3GP

2
AUD_CPVEE
1
C423
SCD1U10V2KX-4GP
2
3D3V_S0

25
38

34
39
46

22

21
MIC1

1
9
U38 AFTP62 1
AFTP68 SC 1208 AFTE14P-GP 6

CPVEE
DVDD
DVDD_IO

MIC1_R
AVDD1
AVDD2

PVDD1
PVDD2

MIC1_L
AFTE14P-GP 1 DMIC_CLK_R
AFTE14P-GP 1 DMIC_DATA L27 4
17 AFTP64 DMIC_CLK 1 2 SBY100505T-601Y-N-GP DMIC_CLK_R 3
R318 MIC2_R DMIC_DATA 2

C HP_OUT_R 1 2 75R2J-1-GP HP_OUT_R_AUD 33 HP-OUT_R MIC2_L 16 -1 0114


C

1
SC33P50V2JN-3GP

SC33P50V2JN-3GP
HP_OUT_L 1 2 75R2J-1-GP HP_OUT_L_AUD 32 AFTP156 1 1
HP-OUT_L

C704

C705
R317 15 AFTE14P-GP
LINE2-R
14 5

2
LINE2-L

1
48 C422 ACES-CON4-17-GP
SPDIFO SCD1U10V2KX-4GP 20.F1621.004

2
MIC_IN# R295 2 1 20KR2F-L-GP 30 MIC1_VREF_R
MIC1_VREFO_R MIC1_VREF_L_269VA
28 1 2 MIC1_VREF_L
HP_DET# R293 2 MIC1_VREFO_L
1 39K2R2F-L-GP SENSE_A 13 SENSE_A MIC2_VREFO 29 MIC2_VREFO R320 SB 1024 C422 connect to 3D3V_S0,
1 0R2J-2-GP place close to connector

1
18 TP72 269VA_ASM
SENSE_B TPAD14-GP C466
Alnalog signal LINEOUT1-R
24
23 SC2D2U10V3ZY-1GP

2
LINEOUT1-L

DMIC_CLK 3 MIC1_VREF_R R363 1 2 4K7R2J-2-GP


DMIC_DATA 2
GPIO1/DMIC-CLK
GPIO0/DMIC_DATA
Digital signal SPKL-
SPKL+
41
40
SPKR_L-
SPKR_L+
SA 0905 VA: MIC1_VREF0_L
VB: 2.2UF to GND
R359 1
EXT MIC
44 SPKR_R- MIC1_VREF_L 2 4K7R2J-2-GP
SPKR- SPKR_R+ SB 1015 change
47 45
SPDIFO2/EAPD SPKR+ EMIC1
1
AUD_CBP 36 MIC_IN_JACK_L R352 1 2 1KR2J-1-GP MIC_IN_JACK_L_C 2
CBP
SDATA_OUT

6
MONO-OUT
1

SDATA_IN

C450 35 MIC_IN_JACK_R R367 1 2 1KR2J-1-GP MIC_IN_JACK_R_C 3


CBN
CPVREF
RESET#
BIT-CLK

SC2D2U10V3ZY-1GP 4
JDREF

AVSS1
AVSS2

PVSS1
PVSS2
SYNC

DVSS
VREF
BEEP

MIC_IN# 5
GND
2

PD#

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
AUD_CBN NP1
NP2

1
ALC269Q-VB2-GR-GP C481 EC28 EC26 EC27
12

10
6
11
5
ACZ_SDATAIN_RTL_R 8

31
4
20
19

AUD_VREF 27

26
37

7
49

42
43

SC100P50V3JN-2GP DY AUDIO-JK182-GP-U1
22.10263.321
B B

2
DY DY DY -1 0114
AUD_PC_BEEP SA 0905
14 ACZ_SYNC_AUDIO
C465 ALC269_31 1 2 R316
AUD_JDREF

14 ACZ_BITCLK_AUDIO
1

14 ACZ_RST#_AUDIO 0R2J-2-GP
SC2D2U10V3ZY-1GP

14 ACZ_SDATAOUT_AUDIO 269VA_ASM
2
1

14 ACZ_SDATAIN0 1 2
C421 R287
SC8P250V2CC-GP 22R2J-2-GP VA: GND 1 2 MIC1_VREF_L HP_OUT/ LINE_OUT
2

DY SA 0905 VB: MIC1_VREF0_L R315 SB 1015 change


SC -BOM change for SI 0R2J-2-GP HP1
ALC269_31 1
1

SA 0912 change size HP_OUT_L 1 2 HP_OUT_L_R 2


R339 0R0402-PAD 6
R297 HP_OUT_R 1 2 HP_OUT_R_R 3
20KR2F-L-GP R340 0R0402-PAD 4
-1 0107 HP_DET# 5
2

1
3D3V_S5 AFTP96 AFTE14P-GP 1 HP_OUT_L_R C473 C474 R325 R326 NP1

1
-1 0114 AUD_5VA AFTP97 AFTE14P-GP 1 HP_OUT_R_R C700 NP2

SC22P50V2JN-4GP

SC22P50V2JN-4GP

20KR2F-L-GP

20KR2F-L-GP
AFTP92 AFTE14P-GP 1 HP_DET# SC1KP50V2KX-1GP

2
1 2 AUDIO-JK182-GP-U1

2
R670 AFTP102 AFTE14P-GP 1 MIC_IN_JACK_L_C 22.10263.321
G

2
Q65 1KR2J-1-GP AFTP118 AFTE14P-GP 1 MIC_IN_JACK_R_C
2N7002A-7-GP AFTP87 AFTE14P-GP 1 MIC_IN# -1 0114

S D

D6
33 KBC_MUTE# 1 2 AUD_PD#_2 2

A R282
0R2J-2-GP
1
DY
2 AUD_PD#_1 1
3 AUD_SD#
<Core Design> A
14 ACZ_RST#_AUDIO
R288 DY
0R2J-2-GP BAW56PT-U1-GP
Reserve for anti-pop 83.00056.E11
Wistron Corporation
2ND = 83.00056.I11 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
SB 1015 change to 83.00056.E11
Title

27_AUDIO CODEC ALC269Q-VB


Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 27 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net

SATA Connector ODD Connector


SA-0820

D HDD1
5V_S0 D
-1 0107 23
NP1
R644 1

K
0R2J-2-GP C641 D18

1
1 2 SATA_TXP0_R 1 2SCD01U50V2KX-1GP SATA_TXP0_C 2 SSM24PT-GP C615 TC17 SA-0820
14 SATA_TXP0 SATA_TXN0_R
14 SATA_TXN0 1 2 1 2SCD01U50V2KX-1GP SATA_TXN0_C 3 SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
R645 C640 4 DY R193

2
0R2J-2-GP C639 1 2SCD01U50V2KX-1GP SATA_RXN0_C 5 10KR2J-3-GP

A
14 SATA_RXN0 SATA_RXP0_C ODD_DP
14 SATA_RXP0 1 2 6 1 DY 2
C638 SCD01U50V2KX-1GP 7 ODD_MD

SC 1209 8
SC - BOM change 9 14 SATA_TXP4 C626 1 2 SCD01U50V2KX-1GP SATA_TXP4_C
10 14 SATA_TXN4 C625 1 2 SCD01U50V2KX-1GP SATA_TXN4_C
5V_S0 11 14 SATA_RXP4 C623 1 2 SCD01U50V2KX-1GP SATA_RXP4_C
12 14 SATA_RXN4 C624 1 2 SCD01U50V2KX-1GP SATA_RXN4_C
AFTP162 PWR TRACE 100mil 13
AFTE14P-GP 1 14
15
16
K

17
D19 TC18 C622 18
SC10U10V5ZY-1GP

SCD1U25V3KX-GP
SSM24PT-GP

DY 19
2

20
-1 0114 21
A

22
AFTP170 NP2
AFTE14P-GP
C 1 24
ODD1 C
8
SKT-SATA7P-15P-34-GP NP1
62.10065.071 S1

SATA_TXP4_C S2
SATA_TXN4_C S3
AFTP75 AFTE14P-GP 1 SATA_TXP0_C S4
AFTP74 AFTE14P-GP 1 SATA_TXN0_C SATA_RXN4_C S5
AFTP73 AFTE14P-GP 1 SATA_RXN0_C SATA_RXP4_C S6
AFTP72 AFTE14P-GP 1 SATA_RXP0_C S7
5V_S0
ODD_DP P1
SB 1015 Add AFTE AFTP158 AFTE14P-GP 1 P2
P3
TP103 TPAD14-GP 1 ODD_MD P4
P5
P6
NP2
AFTP166 AFTE14P-GP 1 9

SKT-SATA7P-6P-16-GP
62.10065.D01
SB 1016 change to 62.10065.D01

B B
AFTP163 AFTE14P-GP 1 SATA_TXP4_C
AFTP161 AFTE14P-GP 1 SATA_TXN4_C
AFTP159 AFTE14P-GP 1 SATA_RXP4_C
AFTP160 AFTE14P-GP 1 SATA_RXN4_C

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

28_HDD & ODD


Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 28 of 58
5 4 3 2 1
Close to pin16,pin22,pin36,pin39
1D25V_LAN_S5
http://hobi-elektronika.net 3D3V_LAN_S5
Close to LAN_AR8131
Close to pin8 Close to pin42
U29 MDI0- 1 4 RN45

SC1KP50V2KX-1GP
SCD1U10V2KX-4GP
1D1VA_LAN_S5 1 8 MDI0+ 2 3 SRN49D9F-GP MID0_RC 1 2
A0 VCC C362 SCD1U10V2KX-4GP
2 A1 WP 7

1
C373 C371 3 6 LAN_SCLK MDI1- 1 4 RN44
C382 C379 C365 C414 C367 C399 C413 A2 SCL LAN_SDATA C407 MDI1+
4 GND SDA 5 2 3 SRN49D9F-GP MID1_RC 1 2
1

1
DY SCD1U10V2KX-4GP C361 SCD1U10V2KX-4GP

2
SCD1U10V2KX-4GP

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AT24C02BN-SH-T-GP MDI2+ 2 3
72.24C02.R01 MDI2- 1 4 SRN49D9F-GP MID2_RC 1 2
2

2
2ND = 72.24C02.M01 RN43 8132_DY C360 SCD1U10V2KX-4GP
D MDI3-
MDI3+
1
2
4 RN42
3 SRN49D9F-GP MID3_RC 1 2
8132_DY D
8132_DY C359 SCD1U10V2KX-4GP
8132_DY

Close to pin45.pin46 Close to pin28,pin32


1D1VD_LAN_S5
SB 1015, OBS, change to 68.4R750.20C
for AR8131M apply in the future Close to pin1
C412 C411 C390 C378 1 2 LX LAN_XO
1

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP
L14 X5
SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
LAN_SCLK IND-4D7UH-192-GP LAN_XI 2 1

1
LAN_SDATA C398 C397
2

XTAL-25MHZ-102-GP

1
82.30020.851

2
1

1
2ND = 82.30020.791
DY C396 DY C386

2
SCD1U10V2KX-4GP SCD1U10V2KX-4GP C375 C380

2
30 AVDD_CEN AVDD_CEN SC15P50V2JN-2-GP SC15P50V2JN-2-GP

1
SC 1209
C392
SCD1U10V2KX-4GP

2
Close to pin15 Close to pin5,pin19,pin25
Close to pin6
2D5V_LAN_S5
C C
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C368
1

C366 C374 C372


SC1U10V2KX-1GP
2

1D1VA_LAN_S5 1D25V_LAN_S5

U28
-1 0114
8 VDD11_REG REFCLKN 40 CLK_PCIE_LAN# 15
Close to pin2 2D5V_LAN_S5 11 41
AVDD_REG REFCLKP CLK_PCIE_LAN 15
16 AVVDL RX_N 44 PCIE_TXN1 15
3D3V_LAN_S5 22 43 PCIE_TXP1 15
AVDDL RX_P PCIE_RXDN C409 1
36 AVDDL TX_N 37 2 SCD1U10V2KX-5GP PCIE_RXN1 15
SA 0906 1D1VD_LAN_S5 PCIE_RXDP C410 1
39 AVDDL TX_P 38 2 SCD1U10V2KX-5GP PCIE_RXP1 15
2 1 AVDDL 42 AVDDL
1

C393 C395 R274 0R0402-PAD 14 MDI0- 30


TRXN0
SC10U6D3V3MX-GP

15 VDDHO TRXP0 13 MDI0+ 30


SC1U10V2KX-1GP

Pin42 connect to AVDDL 19 18 MDI1- 30


2

DO NOT SUPPORT Overclocking AVDDH TRXN1


25 AVDDH TRXP1 17 MDI1+ 30
TRXN2 21 MDI2- 30
28 DVDDL TRXP2 20 MDI2+ 30
32 DVDDL TRXN3 24 MDI3- 30
45 DVDD_REG TRXP3 23 MDI3+ 30
46 DVDD_REG WAKE# 4 PCIE_WAKE# 16,31
3D3V_LAN_S5
B LX 1
2
LX
26
B
3D3V_LAN_S5 AVDD_CEN VDD3V LED2
6 VDD17 CLKREQ# 27 LAN_CLKREQ# 15
5 47 LAN_ACT_LED#
R263 VDD25V LED1 10M/100M/1G_LED# 1
1 DY 2 Q22 LED0 48
0R3J-0-U-GP TP68 TPAD14-GP
3D3V_S5 AO3419L-GP 31
-1 0114 SMCLK LAN_RBIAS R253 1
33 SMDATA RBIAS 12 2 2K37R2F-GP
S D 3 LAN_RST R271 2 1 0R0402-PAD PLT_RST# 5,18,31,33,35,51
SCD1U10V2KX-4GP

PERST#
SCD1U16V2ZY-2GP

10 LAN_XI
XTLI
1

1
C387 34 TESTMODE XTLO 9 LAN_XO -1 0107
1

C400 R269 3D3V_LAN_S5 SEL_25M C406


35 7
G

NO_CONN SEL_25_MHZ
1

100KR2J-1-GP C403 SC150P50V2JN-3GP


2

2
R256 4K7R2J-2-GP 2 1 LAN_SCLK 29 DY
2

TWSI_CLK

2
SC1U10V2KX-1GP

2 1 LAN_SDATA 30 49
2

LAN_PWR_ON_T R259 4K7R2J-2-GP TWSI_DATA GND R262


DY 4K7R2J-2-GP
1

C385 AR8131-AL1E-R-GP LAN_ACT_LED# 2 1


SCD1U10V2KX-4GP DY 71.08131.M02 ASM : 48Mhz R277
D

1
CO-LAY 71.08132.M01 (10/100) DY : 25Mhz 4K7R2J-2-GP
2

Q23
2N7002A-7-GP SC 1126
33 LAN_PWR_ON G 84.2N702.E31 SA 0906: Reserve for EEPROM DY
2ND = 84.2N702.D31
S

<Core Design>
A SB ASM by SW require
A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

29_LAN AR8131/8132
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 29 of 58
5 4 3 2 1
1.route on bottom as differential pairs. http://hobi-elektronika.net
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
D 7.Must not cross ground moat,except
RJ-45 moat.
SA 0904 for 8131
LAN Connector D
SA 0906
1 2 AVDD_CEN 29
R252
0R0603-PAD SA 0916

1
SA 0913 CHANGE SIZE C364
SC1U10V2KX-1GP LAN1
9
GIGA Lan Transformer

2
-1 0113 NP1
AFTP70 AFTE14P-GP 1 RJ45_1 1
C354 XF1
SC1KP50V2KX-1GP XRF_TDC 1 24 MCT2 AFTP69 AFTE14P-GP 1 RJ45_2 2
C350 29 MDI3+ 2
1CT:1CT
23 RJ45_7 AFTP67 AFTE14P-GP 1 RJ45_3 3
2

SCD1U10V2KX-4GP AFTP65 AFTE14P-GP 1 RJ45_4 4


AFTP66 AFTE14P-GP 1 RJ45_5 5
AFTP63 AFTE14P-GP 1 RJ45_6 6
1

29 MDI3- 3 22 RJ45_8 AFTP61 AFTE14P-GP 1 RJ45_7 7


4 21 MCT1 AFTP60 AFTE14P-GP 1 RJ45_8 8
5 1CT:1CT
20 RJ45_4 NP2
C353 AFTP71 AFTE14P-GP 1 10
SC1KP50V2KX-1GP SC 1208
C C356 29 MDI2+ RJ45-8P-15-GP C
2

SCD1U10V2KX-4GP 6 19 RJ45_5 62.10044.481


SC 1208 7 18 MCT4
1

8
1CT:1CT
17 RJ45_3

29 MDI2-
C363
SC1KP50V2KX-1GP 9 16 RJ45_6 MCT1
SA 0906 C352 29 MDI1+ 10 15 MCT3 MCT2
2

SCD1U10V2KX-4GP 11
1CT:1CT
14 RJ45_1 MCT4
8132_DY 8132_DY MCT3
SC 1208
1

SA 0916 SWAP

8
7
6
5
12 13 RJ45_2
29 MDI1- RN37
C355 XFORM-24P-15-GP SRN75J-1-GP
SC1KP50V2KX-1GP 68.05009.301
C357 29 MDI0+ 2ND = 68.IH601.301
2

SA 0906 SCD1U10V2KX-4GP

1
2
3
4
8132_DY 8132_DY MCT_R
SC 1208
1

2
C250
B SC1KP2KV6KX-GP B
29 MDI0-

1
SB 1026 change to 78.1022S.22L
SA 0906, change transformer type for vendor suggestion.

<Core Design>

A Wistron Corporation A
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

30_LAN CONN
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 30 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
3D3V_S0
SB 1022 Change name
IOCN1
NP1
71 73
3A 1 2 PCIE_RXN2 15

D 1D5V_S0
3D3V_S5 3
5
4
6
PCIE_RXP2 15 WLAN_MINI1
D
7 8 PCIE_TXP2 15
9 10 PCIE_TXN2 15
1.6A 11 12
13 14 PCIE_TXP4 15
15 16 PCIE_TXN4 15
5V_S5 17 18 NEW CARD
19 20 PCIE_RXP4 15
21 22 PCIE_RXN4 15
Debug card use 23 24
33 E51_RxD 25 26 PCIE_TXN3 15
33 E51_TxD 27 28 PCIE_TXP3 15
16,29 PCIE_WAKE# 29 30 WWAN_MINI2
15 MINI1_CLKREQ# 31 32 PCIE_RXN3 15
5,18,29,33,35,51 PLT_RST# 33 34 PCIE_RXP3 15
33 WIFI_RF_EN 35 36
37 38 CLK_PCIE_MINI1# 15
15 SMB_CLK 39 40 CLK_PCIE_MINI1 15
WLAN_MINI1
WLAN_MINI1 15 SMB_DATA 41 42
43 44 CLK_PCIE_MINI2# 15
34 WLAN_LED# 45 46 CLK_PCIE_MINI2 15
WWAN_MINI2
15 MIN2_CLKREQ# 47 48
34 3G_LED# 49 50 CLK_PCIE_NEW# 15
5,16,33,36,41,42,43,44 PM_SLP_S3# 51 52 CLK_PCIE_NEW 15 NEW CARD
WWAN_MINI2 16,33,36,41,43 PM_SLP_S4# 53 54
15 NEW_CLKREQ# 55 56 USBPP12 18
34 LED_WiMAX# 57 58 USBPN12 18 NEW CARD
33 WWAN_EN 59 60
C Card reader 15 CLK48_Cardreader
61
63
62
64
USBPP3 18
USBPN3 18 WLAN_MINI1 C
65 66
18 USBPN5 67 68 USBPP4 18
WWAN_MINI2 18 USBPP5 69 70 USBPN4 18 Card reader
1 72 74
AFTP86 AFTE14P-GP NP2

FOX-CONN70A-2-GP
20.F1400.070

AFTP107 AFTE14P-GP 1 3D3V_S0


AFTP103 AFTE14P-GP 1 3D3V_S5
AFTP104 AFTE14P-GP 1 1D5V_S0
AFTP99 AFTE14P-GP 1 5V_S5
AFTP194 AFTE14P-GP 1 USBPP4
B AFTP193 AFTE14P-GP
AFTP176 AFTE14P-GP
1
1
USBPN4
CLK48_Cardreader
B
AFTP98 AFTE14P-GP 1 E51_RxD AFTP101 AFTE14P-GP 1 PCIE_TXP4
AFTP93 AFTE14P-GP 1 E51_TxD AFTP100 AFTE14P-GP 1 PCIE_TXN4
AFTP91 AFTE14P-GP 1 PCIE_WAKE# AFTP95 AFTE14P-GP 1 PCIE_RXP4
AFTP84 AFTE14P-GP 1 MINI1_CLKREQ# AFTP94 AFTE14P-GP 1 PCIE_RXN4
AFTP190 AFTE14P-GP 1 CLK_PCIE_MINI1# AFTP174 AFTE14P-GP 1 CLK_PCIE_NEW
AFTP188 AFTE14P-GP 1 CLK_PCIE_MINI1 AFTP173 AFTE14P-GP 1 CLK_PCIE_NEW#
AFTP109 AFTE14P-GP 1 PCIE_RXN2 AFTP80 AFTE14P-GP 1 USBPP12
AFTP108 AFTE14P-GP 1 PCIE_RXP2 AFTP79 AFTE14P-GP 1 USBPN12
AFTP105 AFTE14P-GP 1 PCIE_TXN2 AFTP81 AFTE14P-GP 1 3G_LED#
AFTP106 AFTE14P-GP 1 PCIE_TXP2 AFTP78 AFTE14P-GP 1 PM_SLP_S3#
AFTP185 AFTE14P-GP 1 PLT_RST# AFTP82 AFTE14P-GP 1 PM_SLP_S4#
AFTP184 AFTE14P-GP 1 WIFI_RF_EN AFTP83 AFTE14P-GP 1 NEW_CLKREQ#
AFTP182 AFTE14P-GP 1 SMB_CLK AFTP89 AFTE14P-GP 1 PCIE_TXN3
AFTP181 AFTE14P-GP 1 SMB_DATA AFTP88 AFTE14P-GP 1 PCIE_TXP3
AFTP180 AFTE14P-GP 1 WLAN_LED# AFTP90 AFTE14P-GP 1 PCIE_RXN3
AFTP178 AFTE14P-GP 1 MIN2_CLKREQ# AFTP85 AFTE14P-GP 1 PCIE_RXP3
AFTP187 AFTE14P-GP 1 USBPN3 AFTP192 AFTE14P-GP 1 USBPN5
AFTP189 AFTE14P-GP 1 USBPP3 AFTP191 AFTE14P-GP 1 USBPP5
AFTP177 AFTE14P-GP 1 CLK_PCIE_MINI2# AFTP77 AFTE14P-GP 1 LED_WiMAX#
AFTP179 AFTE14P-GP 1 CLK_PCIE_MINI2 AFTP76 AFTE14P-GP 1 WWAN_EN

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

31_IO CONN
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 31 of 58
5 4 3 2 1
USB3 Connect to USB BD SB 1015 http://hobi-elektronika.net
5V_S5
U11
5V_USB3_S0

change name Least 40 mil


1 GND VOUT 8
5V_USB3_S0 2 7
USB3 VIN VOUT SA 0820
3 VIN VOUT 6
5 33 USB_PWR_EN# 4 EN/EN# FLG# 5 USB_OC#0 18

1
>1A C38
AFTP126 AFTE14P-GP 1 1 SCD1U10V2KX-4GP
RT9711BPF-GP

2
18 USBPN1 2 2ND = 74.00547.A79
18 USBPP1 3
D 4 SB 1015 change to 74.09711.079
D
AFTP9 AFTE14P-GP 1 6

ACES-CON4-17-GP
20.F1621.004 Least 40 mil Least 40 mil
AFTP125 AFTE14P-GP 1 USBPN1 5V_S5 U64 5V_USB1_S0 5V_USB2_S0
AFTP123 AFTE14P-GP 1 USBPP1
1 GND OC1# 8 USB_OC#1 18
2 IN OUT1 7
3 EN1# OUT2 6
33 USB_PWR_EN# 4 EN2# OC2# 5 USB_OC#4 18

1
C699 C694
SC1U10V3ZY-6GP SCD1U10V2KX-5GP SA 0820
TPS2062D-GP

2
USB x 2 Connector
SA 0902 74.02062.079
2ND = 74.00546.07D
5V_USB1_S0 AFTP165 AFTE14P-GP 1 USB_L2-
AFTP167 AFTE14P-GP 1 USB_L2+
SA 0827 40 mil
AFTP164 AFTE14P-GP 1
SCD1U10V2KX-5GP
1

TC6 1 EC19
ST150U6D3VBM-2-GP
80.15715.12L
DY SA 0914 change pin define Bluetooth Power 3D3V_BT_S0
2

2ND = 77.C1571.09L USB1 1 2


8 R27 DY 0R3J-0-U-GP
Q1
C 6
1 3D3V_S0
-1 0114
AO3419L-GP C
18 USBPN2 2 3 USB_L2- 2 S D
USB_L2+ 3

SCD1U10V2KX-4GP
4 C36 R29 C37

1
100KR2J-1-GP
18 USBPP2 1 4 5 SCD1U10V2KX-4GP

G
AFTP168 AFTE14P-GP 1 7 C15

2
L28 SC1U10V3KX-3GP

2
ACM2012-900-2P-T-GP SKT-USB8-3-GP

2
-1 0116 for EMI BT_ON_T

D
Q3
5V_USB2_S0 2N7002A-7-GP
SA 0827 40 mil 33 BLUETOOTH_EN G 84.2N702.E31
AFTP169 AFTE14P-GP 1 2ND = 84.2N702.D31
SCD1U10V2KX-5GP

S
1

TC11 EC20 SB 1015 change to 84.2N702.E31


ST150U6D3VBM-2-GP SA 0916 change pin define
80.15715.12L
2

2ND = 77.C1571.09L DY USB2


8
6
1
SA 0820
1 4 USB_L8- 2
B 18 USBPN8
USB_L8+ 3 AFTP4 AFTE14P-GP 1 USBPP9 B
18 USBPP8 2 3
AFTP175 AFTE14P-GP
4
5
AFTP3
AFTP2
AFTE14P-GP
AFTE14P-GP
1
1
USBPN9
BT_LED BT
1 7
L29
ACM2012-900-2P-T-GP SKT-USB8-3-GP 3D3V_BT_S0 BT1
-1 0116 for EMI 7
AFTP6 AFTE14P-GP 1 1

AFTP171 AFTE14P-GP 1 USB_L8- 2


AFTP172 AFTE14P-GP 1 USB_L8+ 3
18 USBPP9
18 USBPN9 4
34 BT_LED 5
6
AFTP1 AFTE14P-GP 1 8

JST-CON6-17-GP
21.D0220.106

SB 1016 change to 21.D0220.106

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

32_USB & BT
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 32 of 58
5 4 3 2 1
http://hobi-elektronika.net

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP
3D3V_S0 3D3V_S0 3D3V_AUX_S5_KBC_L X6
SA 0827
RN51

1
R557 1 2 E51_RxD 1 8 S5_ENABLE_KBC 3 2
10KR2J-3-GP DY 2 7 C451 DY DY C468 DY
3 6 KBC_PWRBTN#

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
3D3V_AUX_S5

1KBC_XO_R2

2
1

1
R558 1 2 E51_TxD 4 5 KBC_NOVO_BTN# C661 C476 C658 C427 C460

1
10KR2J-3-GP DY C482 C479 4 1
SRN10KJ-6-GP

2
DY

2
R324 1 2 BLUETOOTH_EN RN50
X-32D768KHZ-34GPU R292
4K7R2J-2-GP DY 3D3V_AUX_S5 82.30001.661 10KR2J-3-GP

33KR2J-3-GP
2 3 BAT_SCL U44B 2 OF 2 2 1
R559 1 2 E51_TxD 1 4 BAT_SDA DY R311 R319 DY
10KR2J-3-GP
SRN4K7J-8-GP 3D3V_AUX_S5 1 DY 2 KBC_XO 77 53 KCOL1

2
3D3V_AUX_S5_KBC 3D3V_AUX_S5_KBC_L GPIO0/32KCLKIN KBSOUT0/JENK# KCOL2
1 2 1 2 52
R560 R574 10MR2J-L-GP KBSOUT1/TCK KCOL3
51

D C659 C660 0R0603-PAD 0R0603-PAD KBSOUT2/TMS


50 KCOL4
D

SCD1U16V2ZY-2GP
KBSOUT3/TDI

1
SC1U10V2ZY-GP
-1 0108 -1 0108 KBC_XO KBC_XI 79 49 KCOL5
GPIO2 KBSOUT4/JEN0# KCOL6
DY 27 KBC_MUTE# 30
GPIO55/CLKOUT/IOX_DIN KBSOUT5/TDO
48
SC 1210 47 KCOL7

2
AD_DETECT KBSOUT6/RDY# KCOL8
47 AD_DETECT 63 43

1
3D3V_S0 EC22 GPIO14/TB1 KBSOUT7 KCOL9
16 PM_PWRBTN# 117 KBC 42
R336 SG_DIS# GPIO20/TA2/IOX_DIN KBSOUT8 KCOL10
DY 31
GPIO56/TA1 KBSOUT9/SDP_VIS#
41
1 2 PLT_RST#_1 32 40 KCOL11

SCD1U16V2ZY-2GP
5,18,29,31,35,51 PLT_RST#

2
100R2J-2-GP 27 KBC_BEEP GPIO15/A_PWM KBSOUT10&P80_CLK KCOL12
34 dGPU_LED 118 39
BAT_IN# BRIGHTNESS_R GPIO21/B_PWM KBSOUT11&P80_DAT KCOL13
47 BAT_IN# 24 BRIGHTNESS 2 1 62 38
SC27P50V2JN-2-GP
1

C475 R583 33R2J-2-GP GPIO13/C_PWM KBSOUT12/GPIO64 KCOL14


37
KBSOUT13/GPIO63

102

115
SB 1029 Add for SW requirement KCOL15

80

19
46
76
88
36

4
1 OF 2 U44A KBSOUT14/GPIO62 KCOL16
35
2

KBSOUT15/GPIO61/XOR_OUT KCOL17
13 34

VDD

AVCC

VCC
VCC
VCC
VCC
VCC
GPIO41
26,54 NV_HDMI_DETECT GPIO12/PSDAT3 GPIO60/KBSOUT16 KCOL18
24 CAMERA_EN 12 33
GPIO25/PSCLK3 GPIO57/KBSOUT17
24 PWM_SELECT 11
GPIO27/PSDAT2
31 WWAN_EN 10
GPIO26/PSCLK2 KROW1
34 KBC_NOVO_BTN# 124 104 35 TPDATA 71 54
GPIO10/LPCPD# VREF GPIO35/PSDAT1 KBSIN0 KROW2
7
LRESET#
SA 0916 35 TPCLK 72
GPIO37/PSCLK1 PS/2
KBSIN1
55
2 97 56 KROW3
18 CLK_PCI_KBC
3
LCLK A/D GPIO90/AD0
98
AD_IA 46 KBSIN2
57 KROW4
14,35 LPC_LFRAME# LFRAME# GPIO91/AD1 TP_LED 34 KBSIN3
2

126 99 VGA_SW# 34 58 KROW5


14,35 LPC_LAD0 LAD0 GPIO92/AD2 KBSIN4
C656 127 100 GSENSE_Z 35 35 SPIDI 86 59 KROW6
14,35 LPC_LAD1 LAD1 GPIO93/AD3 F_SDI KBSIN5
SC4D7P50V2CN-1GP 128 108 GSENSE_X 35 35 SPIDO 87 60 KROW7
14,35 LPC_LAD2
1

LAD2 GPIO5/AD4 F_SDO KBSIN6 KROW8


1 LPC 96 GSENSE_Y 35 35 SPICS# 90 FIU 61
DY 14,35 LPC_LAD3
125
LAD3 GPIO4/AD5
92
F_CS0# KBSIN7
14 INT_SERIRQ SERIRQ 35 SPICLK F_SCK
16 PM_CLKRUN# 8
KBRCIN# GPIO11/CLKRUN# ECRST#
19 KBRCIN# 122 85
KA20GATE KBRST#/GPIO86 VCC_POR#
19 KA20GATE 121 101 SUS_PWR_DN_ACK 16
ECSCI#_KBC GPIO85/GA20 GPIO94/DA0 PM_SLP_M# 1
29 105
ECSCI#/GPIO54 GPIO95/DA1 G_SENSOR_ID TP74 TPAD14-GP
23 KBC_BL_ON_IN 9
GPIO65/SMI# D/A GPIO96/DA2
106 SA 0912 RF
19 EC_SWI# 2 1 ECSWI#_KBC 123 107 DISCRETE# NPCE781EA0DX-GP -1 0110
R552 GPIO67/PWUREQ# GPIO97
0R0402-PAD
-1 0108
KBC_SDA1 68 64 PU
THERMAL-----> 15 KBC_SDA1 KBC_SCL1 GPIO74/SDA2 GPIO1/TB2 KBC_PWRBTN#
PM_SLP_S3# 5,16,31,36,41,42,43,44
15 KBC_SCL1 BAT_SDA
67
69
GPIO73/SCL2 SMB GPIO3/AD6
95
93
KBC_PWRBTN# 34
46,47 BAT_SDA GPIO22/SDA1 GPIO6/IOX_DOUT AC_IN# 46
BAT_SCL 70 94 COVER_SW#
BATTERY-----> 46,47 BAT_SCL GPIO17/SCL1 GPIO7/AD7
119 PCB_VER0
GPIO23/SCL3

C 34 SCRLK_LED#
81
GPIO66/G_PWM SP
GPIO24
GPIO30
GPIO31/SDA3
6
109
120 PCB_VER1
WIRELESS_SW# 34
AV_INT 34
Power LED
C
65 PWR_LED 34
GPIO32/D_PWM
66 CHARGE_LED_2 34
GPIO33/H_PWM 46_DETECT
16
GPIO40/F_PWM AD_OFF
36 S0_PWR_GOOD 84 17 AD_OFF 47 SA 0827
BLUETOOTH_EN GPIO77/SPI_DI GPIO42/TCK RN52
32 BLUETOOTH_EN 83 SPI 20 RSMRST#_KBC 16
GPO76/SPI_DO/SHBM GPIO43/TMS ECRST#
31 WIFI_RF_EN 82 GPIO 21 PM_SLP_S4# 16,31,36,41,43 3D3V_AUX_S5 5 4
GPIO75/SPI_SLK GPIO44/TDI COVER_SW#
34 WLAN_TEST_LED 91 22 CHARGE_LED_1 34 6 3
GPIO81 GPIO45/E_PWM KA20GATE C471
23 GSENSE_TST 35 7 2
GPIO46/CIRRXM/TRST#

1
24 3D3V_S0 8 1 KBRCIN# SC1U10V2KX-1GP
GPIO47 LAN_PWR_ON 29
GPIO50/TDO
25 SPI_WP# 35 DY SB DY
E51_TxD 111 26 INDICATE_LED# 34 SRN10KJ-6-GP

2
31 E51_TxD E51_RxD GPO83/SOUT_CR/XORTR# GPIO51
113 27
31 E51_RxD
16 AC_PRESENT
112
GPIO87/CIRRXM/SIN_CR
GPO84/IOX_SCLK/TRIST#
GPIO52/RDY#
GPIO53
28 CHG_ON#
BLON_OUT 24
CHG_ON# 46 11,36 HW_THRMTRIP# B CHECK
73 USB_PWR_EN# 32
GPIO70 65W_90W# Q28
35 GSENSE_ON# 114 74 0814

C
GPIO16 GPIO71 CH3906PT-GP
5,42 VTT_PWRGD 14 75 ME_UNLOCK# 14
S5_ENABLE_KBC GPIO34/CIRRXL GPIO72
36,40 S5_ENABLE
1 2 15
GPIO36 GPO82/IOX_LDSH/TEST#
110 84.03906.H11
R321 2ND = 84.03906.U11
2KR2F-3-GP
SER/IR
VCORF 44
VCORF
1

C428
AGND
SCD1U16V2ZY-2GP

GND
GND
GND
GND
GND
GND
2

NPCE781EA0DX-GP
FOR KBC DEBUG
5
18
45
78
89
103

116

5V_AUX_S5
SC 1210
TPAD14-GP TP75 1 3D3V_AUX_S5 3D3V_AUX_S5 KBC_SCL1
RN48
46_DETECT 1 2 SMBC_THERM 3 2
R355 SMBD_THERM 4 1 3D3V_S0

1
10KR2J-3-GP

10KR2J-3-GP
100KR2J-1-GP
R303 R331 Q27
SRN10KJ-5-GP
DY DY 4 3
3D3V_AUX_S5

B Internal KeyBoard Connector


DY 5 2
SMBC_THERM 11,34,55
B

2
BAT_IN# R304 1 2 KBC_XO 1 R309 2 MODEL_ID0
100KR2J-1-GP 0R2J-2-GP KBC_SDA1 6 1 SMBD_THERM 11,34,55
KBC_XI 1 R323 2 MODEL_ID1
KROW[8..1] 49
0R2J-2-GP DMN66D0LDW-7-GP

1
10KR2J-3-GP

10KR2J-3-GP
AD_OFF R314 2 1 3D3V_S0 84.DMN66.03F
KB1 KCOL[16..1] 49
1KR2J-1-GP DY R305 R332 2ND = 84.27002.F3F SB 1016 change 84.DMN66.03F
20.K0320.030 ACES-CON30-1-GP DY DY
KCOL17_Q 49
KCOL18_Q 49
D9

2
KB_LED_1 49 19 EC_SCI# 1
KB_LED_2 49
3 ECSCI#_KBC
1

2
3
4
5
6
7
8
9
31

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
32

2 3D3V_AUX_S5
SB 1030 Add
KROW2

KROW8
KROW7

KROW5
KROW6

KROW3
KROW4

KROW1

KB_LED_1 R412 1 2 3D3V_S0 BAT54PT-GP


100R2J-2-GP 83.00054.T81

1
10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
KB_LED_2 R414 1 2 3D3V_S0 2ND = 83.00054.Z81
100R2J-2-GP 3D3V_AUX_S5 R641 R301 R578
KCOL10

KCOL13
KCOL14
KCOL15
KCOL12
KCOL11
KCOL16
KCOL1

KCOL6
KCOL2

KCOL3
KCOL5
KCOL8
KCOL9
KCOL7
KCOL4

Q20 DIS_ONLY UMA UMA


3 KCOL17_Q
KCOL17_Q KCOL17 R1
1 PlanarID

2
1

1
3D3V_S0

10KR2J-3-GP

10KR2J-3-GP
KCOL18_Q 2 SA 0827 SG_DIS#

-1 0111
R2
3D3V_AUX_S5
R577 R576 SA: 0,0 65W_90W#
DISCRETE#
G-SENSOR ID
DTC143ZUB-GP
Cover Up Switch

1
EMI SB: 0,1

1
High: ST

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
SB 1024 SWAP 84.00143.G1K R636
SC: 1,0

2
2nd = 84.00143.D1K HALL1 10KR2J-3-GP PCB_VER0 R642 R302 R555
3
R350 Low: ADI ST SG DIS DIS
OUTPUT COVER_SW#_1 1 2 COVER_SW# PCB_VER1 -1: 1,1

2
Q18 2 G_SENSOR_ID

2
VSS
1

1
10KR2J-3-GP

10KR2J-3-GP
3 KCOL18_Q 100R2F-L1-GP-U C480 65W_90W#

1
KCOL18 1 R1 1 SCD22U6D3V2KX-1GP R554 R553
2
VDD R637 DY DY
High: 65W / Low: 90W
2
1

R2 EM-6781-T30-GP C437 10KR2J-3-GP DISCRETE#


74.06781.07B ADI High: UMA / Low: Discrete

2
DTC143ZUB-GP SC1U6D3V2KX-GP
2ND = 74.09132.B7B
2

2
84.00143.G1K SG_DIS#
2nd = 84.00143.D1K High: DIS only / Low: SG (Hybrid)
A SB 1015 AdD
A
<Core Design>

Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

33_KBC_NPCE781E
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 33 of 58

5 4 3 2 1
5 4 3 2 1
SA 0916 Q57
SC -BOM change to WHITE http://hobi-elektronika.net
SC - BOM change
Q63
PWR_LED#_Q
LED1
SC -BOM change to WHITE
SB 1016 change to 3D3V_S5
SC - BOM change
LED6 3 K A PWR_LED#_R 1 2 3D3V_S5
3 TP_LED#_Q K A TP_LED#_R 1 2 1 R1 R632 33R2J-2-GP
3D3V_S0 33 PWR_LED
1 R1 R624 200R2J-L1-GP 2 LED-W-56-GP
33 TP_LED LED-W-56-GP R2
2 83.00191.J70 POWER LED
R2 83.00191.J70
DTC143ZUB-GP
TP LED DTC143ZUB-GP
SB 1016 change to 83.00193.A70
SB 1016 change to 83.00193.A70 84.00143.G1K
84.00143.G1K 2nd = 84.00143.D1K
2nd = 84.00143.D1K
SC -BOM change to WHITE
D D
Q62 LED2 SC - BOM change
SB 1015 change 3 CHARGE_LED2#_Q K A CHARGE_LED2#_R 1 2 3D3V_S5
1 R1 R630 33R2J-2-GP
Power and LED Board 33 CHARGE_LED_2
2 LED-W-56-GP
CHARGER LED2
SB 1021 KBC_PWRBTN# 1 R2 83.00191.J70
-1 0108 KBC_NOVO_BTN# 1 AFTE14P-GP AFTP19 SB 1016 change to 83.00193.A70
3D3V_S0 3D3V_S5 INDICATE_LED# AFTE14P-GP AFTP18 DTC143ZUB-GP
SA 0824 PB1 1
9 SCRLK_LED# 1 AFTE14P-GP AFTP17 84.00143.G1K
KBC_PWRBTN# SATA_LED# 1 AFTE14P-GP AFTP15 2nd = 84.00143.D1K
1 1 AFTP12 1 AFTP54 AFTE14P-GP AFTP20 ORG
AFTE14P-GP AFTE14P-GP Q61 LED3 SC - BOM change
1

2 3 CHARGE_LED1#_Q K A CHARGE_LED1#_R 1 2 3D3V_S5


G73 3 KBC_PWRBTN# 1 R1 R629
KBC_PWRBTN# 33 33 CHARGE_LED_1
4 KBC_NOVO_BTN# 2 LED-O-16-GP-U 39R2J-L-GP
GAP-OPEN
5
KBC_NOVO_BTN# 33
SCRLK_LED# 33
R2 83.00190.Z70 CHARGER LED1
6
2

SATA_LED# 14 DTC143ZUB-GP
7 INDICATE_LED# 33
8 1 84.00143.G1K
AFTP16 1 2nd = 84.00143.D1K

1
10 AFTE14P-GP EC29 EC30 EC31 EC32 EC33
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
ACES-CON8-19-GP SC -BOM change to WHITE
2

2
20.K0320.008 SC - BOM change
SB 1016 change to 20.K0403.008 Q60 LED4
SB 1024 Add 3 W_LED#_Q K A W_LED#_R 1 2 3D3V_S0
-1 0111 -1 0107 ASM for EMI W_LED# 1 R1 R631 33R2J-2-GP
2 LED-W-56-GP
R2
C DTC143ZUB-GP
83.00191.J70 WLAN_LED C
SB 1016 change to 83.00193.A70
84.00143.G1K
2nd = 84.00143.D1K
AV1 3D3V_S0
10 CHECK SMBus voltage plane
8 1 AFTP21 SMBC_THERM 1 AFTP195 SC - BOM change
7 AFTE14P-GP AFTE14P-GP Q59 LED5
6 SMBD_THERM 1 AFTP196 3 dGPU_LED#_Q K A dGPU_LED#_R 1 2 3D3V_S0
SMBC_THERM 11,33,55 AFTE14P-GP R1
5 1 R626 33R2J-2-GP
SMBD_THERM 11,33,55 33 dGPU_LED
4 AV_INT 1 AFTP197 2 LED-Y-71-GP
AV_INT 33 AFTE14P-GP R2
3 83.00270.E70
2 SC 1130 Change net
dGPU_LED
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

DTC143ZUB-GP
1

1
C706

C707

C708

SC -BOM change to WHITE


1 1 84.00143.G1K
AFTP119 2nd = 84.00143.D1K
2

9 AFTE14P-GP
SC 1209
20.K0320.008
ACES-CON8-19-GP
SB 1016 Add 20.K0403.008

-1 0111 D23 3D3V_S0 3D3V_S0


CH521G-30PT-GP
83.R2003.H8F

1
2ND = 83.R2003.08M R568
4K7R2J-2-GP R569
B 3D3V_S0
31 LED_WiMAX# K A 4K7R2J-2-GP B

2
AFTP198 D24 W_LED_2
1

AFTE14P-GP 31 WLAN_LED# 1 Q55


C D21
SB 1015 change name R606 3 W_LED_1 B R1 1 WLAN_LED
100KR2J-1-GP 2 E D26
31 3G_LED#
1

VGASW1 R2 3 W_LED_1# 1
2

1 VGA_SW# 33 PDTC124EU-1-GP

1
2 BAW56PT-U1-GP 2 3 W_LED#
3 R534
1

BAT54CPT-GP 100KR2J-1-GP
CON

B46-DY DY 32 BT_LED 2
NP1 C686 1 AFTP199 83.R2003.E81
NP2 SCD1U10V2KX-4GP AFTE14P-GP 2ND = 83.00054.X81 BAT54CPT-GP
2

2
SW-SLIDE3P-3-GP
62.40018.511 33 WLAN_Test_LED
-1 0109
CN1 3D3V_S5 3D3V_S0
13 CHECK PIN DEFINE
1
3D3V_S0
DY 2
SB 1015 change name AFTP121 3 PWR_LED
1

SW1 AFTE14P-GP 4 CHARGE_LED_2


4 5 CHARGE_LED_1
1 R607 6 W_LED# <Core Design>
A 100KR2J-1-GP 7 dGPU_LED A
1

2 8 TP_LED
2

VGA_SW#
5
3 WIRELESS_SW# 33 9
10 WIRELESS_SW# Wistron Corporation
1 AFTE14P-GP AFTP122 11 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
1

SW-SLIDE3-3-GP 12 Taipei Hsien 221, Taiwan, R.O.C


62.40018.491 DY C687 14
SB 1016 change to SCD1U10V2KX-4GP Title
2

20.F0702.012
62.40018.491
ACES-CON12-6-GP-U1 34_LED_POWERBD CONN
Size Document Number Rev
SC 1130 Reserve for 15" A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 34 of 58
5 4 3 2 1
3D3V_AUX_S5 SA 0827
EC BIOS Flash ROM http://hobi-elektronika.net
Finger printer 5V_S0 5V_FP_S0

1
SB 1024 SWAP SA 0912 change
R117
0R0603-PAD FP1 -1 0111
SC 1209 7

1
EC21 3D3V_AUX_S5

2
1

4
3
DY AFTP53 AFTE14P-GP 1 5V_FP_S0 1

SCD1U16V2ZY-2GP
2 RN76
R639

10KR2J-3-GP
SRN10KJ-5-GP 2

1
DY 3
18 USBPP10 4

2
ER1 -1 0107 18 USBPN10 5

1
2
D SPI_HOLD# U68 128KB 0R0603-PAD
AFTP50 AFTE14P-GP
1 6
D

1
EC6 8
33 SPICS# 1 8 SPI_3D3V_VCC 1 USBPP10 SC2D2U10V3ZY-1GP
ER2 1 SPI_DI CS# VCC SPI_HOLD# AFTP51 AFTE14P-GP USBPN10 SA 0912 EMI
33 SPIDI 2 2 7 1

2
0R0402-PAD SO HOLD# ER3 AFTP52 AFTE14P-GP
33 SPI_WP# SPI_WP# 3 6 SPICLK_1 1 2 0R0402-PAD SPICLK 33 ACES-CON6-13-GP
WP# SCLK SPI_DO ER4
4 5 1 2 0R0402-PAD SPIDO 33 20.K0320.006
GND SI
1

-1 0107 EC23
SC4D7P50V2CN-1GP
1
R640 EC24 EC25

1
10KR2J-3-GP DY MX25L1005CMI-12G-GP SC4D7P50V2CN-1GP SC4D7P50V2CN-1GP SB 1016 change to 20.K0322.006
72.25105.B01 DY DY
2

SB 1029 reserve for 2ND = 72.25010.I01


2

2
SW requirement

3D3V_S5

VCC3M_Q34 1 2 R270 VCC3_ACC


10R3F-GP
System BIOS Flash ROM 3D3V_S0
LB46-DY
G-Sensor

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP
4MB

C
E
U26
Q24

1
14 PCH_SPI_CS#0 1 8 PDTA114EE-3-GP-U
PCH_SPI_MOSO CS# VCC PCH_SPI_HOLD#0 C391 C394

R2
14 SPI_MOSO_R 1 2 2
SO NC#7
7 LB46-DY
R245 33R2J-2-GP PCH_SPI_WP#0 LB46-DY

R1
3 6 PCH_SPI_CLK 14

2
WP# SCK
4 5 PCH_SPI_MOSI 14
GND SI

B
1
C334
3D3V_S0 MX25L3205DM2I-12G-GP SCD1U16V2ZY-2GP LB46-DY
RN39
72.25325.A01 33 GSENSE_ON#

2
3 2 PCH_SPI_HOLD#0 2ND = 72.25Q32.A01

1
4 1 PCH_SPI_WP#0 Place close to EC
C SRN4K7J-8-GP DY R283 GSENSE_Z_R R273 1 2 GSENSE_Z 33
C
100KR2J-1-GP 56KR2J-L1-GP

1
SB 1024 SWAP DY DY

2
C405 C408
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

14

15

2
U30 DY

RES
VDD
2 ANALOG_AGND
TOUCH PAD 33 GSENSE_TST
3
ST
8

1
GND VOUTZ GSENSE_Y_R R281 1 2 GSENSE_Y 33

1
5V_S0 5V_S0 R261 5 10 56KR2J-L1-GP

1
SA 0914 100KR2J-1-GP GND VOUTY
6
GND LB46-DY
LB46-DY R265 7 12 C415 C424
0R0402-PAD GND VOUTX SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2
1

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

EC10 EC7 1 LB46-DY LB46-DY

2
NC#1
1
2

DY -1 0107 11
RN19 NC#11 ANALOG_AGND
4
2

ANALOG_AGND NC#4
SRN10KJ-5-GP 13
SA 0904 NC#13 GSENSE_X_R R279 1 2 GSENSE_X 33
-1 0111 9 16 56KR2J-L1-GP
NC#9 NC#16

1
TPAD1 LB46-DY
4
3

8 C416 C417
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2
RN21 6 LIS34ALTR-GP LB46-DY LB46-DY
33 TPCLK TPCLK 1 4 TP_CLK 5 74.00034.0BZ
33 TPDATA TPDATA 2 3 TP_DATA 4 2ND = 74.00335.0BZ ANALOG_AGND
TP_L 3 LB46-DY
SB 1015 Swap data and clk SRN33J-5-GP-U TP_R 2 STMicro LIS34AL: 74.00034.0BZ
1 ADXL335 : 74.00335.0BZ
7

B ACES-CON6-13-GP B
20.K0320.006
SB 1016 change to 20.K0322.006 SC 1203
GOLDEN FINGER FOR DEBUG BOARD
SA 0904
AFTP55 AFTE14P-GP 1 TP_DATA TP_DATA TPAD2
AFTP56 AFTE14P-GP 1 TP_CLK 7 SB 1202
AFTP57 AFTE14P-GP 1 TP_R TP_CLK -1 0111
AFTP58 AFTE14P-GP 1 TP_L 1 AFTP120 AFTE14P-GP 1
3D3V_S0
EC8 EC9 TP_R 2 1
14,33 LPC_LAD0
2

AFTE14P-GP AFTP116
SC100P50V2JN-3GP

SC100P50V2JN-3GP

TP_L 3 1
14,33 LPC_LAD1 AFTE14P-GP AFTP111
4 14,33 LPC_LAD2 1
5 1 AFTE14P-GP AFTP110
14,33 LPC_LAD3
1

AFTE14P-GP AFTP117
DY DY 6 14,33 LPC_LFRAME# 1
1 AFTE14P-GP AFTP114
5,18,29,31,33,51 PLT_RST# AFTE14P-GP AFTP115
8
18 PCLK_FWH 1
AFTE14P-GP AFTP113
ACES-CON6-13-GP
20.K0320.006 1
AFTP112 AFTE14P-GP
-1 0114
-1 0107

TP_SW_L TP_SW_R

TPS1 TPS2
1 2 2 1 TP_L 1 2 2 1 TP_R

A 5 R667
100R2J-2-GP
5 R668
100R2J-2-GP <Core Design>
A
3 4 LB46-ASM 3 4 LB46-ASM
SW-TACT-5P-2-GP
62.40009.B21
SW-TACT-5P-2-GP
62.40009.B21
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
LB46-ASM LB46-ASM
Taipei Hsien 221, Taiwan, R.O.C

Title

35_BIOS & TP & G-Sensor & FP


Size Document Number Rev
Custom SC
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 35 of 58
5 4 3 2 1
CPU thermal thut down
http://hobi-elektronika.net
Run Power
5V_S0

5A 1 S
U62
D 8
5V_S5

1D05V_VTT C670 2 S D 7
Q56 1 DY 2 3 S D 6
2nd = 84.00610.C31 4 G D 5
DCBATOUT 84.S0610.B31 SCD1U25V3KX-GP

2
NDS0610-NL-GP RUN_POWER_ON AO4468-GP
84.04468.037
R358 1 2 Z_12V S D 2nd = 84.04800.D37
DY 56R2J-4-GP R623 10KR2J-3-GP

K
1

1
QC = 64.49R95.6DL

1
R602 1 C677 R594 D25
D D

G
3D3V_S0

10KR2J-3-GP

SCD22U25V3KX-GP

330KR2J-L1-GP
PM_THRMTRIP-A# 5,19 PDZ9D1B-GP 3D3V_S5
2 83.9R103.C3F U63
2 1 Z_12V_G3 2ND = 83.9R103.F3F 6.5A 1 S D 8

A
2

2
R622 330KR2J-L1-GP 2 S D 7

1
1 DY 2 H_PWRGD_1 B MMBT2222A-3-GP 3 S D 6
5,19 H_PWRGD R357 Q29 R621 G D
1KR2J-1-GP
84.02222.V11 100KR2J-1-GP
4 5
DY

C
1
AO4468-GP
C487 Z_12V_D4 84.04468.037

2
SC2D2U16V3KX-GP 2nd = 84.04800.D37

2
DY
0814
Q58
4 3

Z_12V_D3
D10 5 2 PM_SLP_S3#
PM_SLP_S3# 5,16,31,33,41,42,43,44
33,40 S5_ENABLE 1
6 1
3 HW_THRMTRIP# 11,33 U21
DMN66D0LDW-7-GP 1D5V_S0 AO3400-1-GP-U 1D5V_S3
2 0814 84.DMN66.03F
2ND = 84.27002.F3F S D
BAT54PT-GP 1.65A 84.03400.A37
83.00054.T81 2ND = 84.03400.B37
SB 1016 change to
2ND = 83.00054.Z81

G
84.DMN66.03F
84.03400.B37
Alternate part

SC 1130 for S3 power reduction


C 1D05V_VTT 1D8V_S0 0D75_S0 SC 1211 1D5V_S0 5V_S0 3D3V_S0
SC 1130 for S3 power reduction
3D3V_S5 For Discharge C
2

1
R248 R184 R443 R278 R567 R556
100R2J-2-GP 100R2J-2-GP 22R2J-2-GP 100R2J-2-GP 100R2J-2-GP 100R2J-2-GP R535
DY DY S3_DY DY DY DY 100KR2J-1-GP
S3_DY
1

1D8V_RUNPWR 1

0D75V_RUNPWR 1

1D5V_RUNPWR 1

3D3V_RUNPWR 1

2
SA 0901: implement S3
VTT_RUNPWR

power reduce, ASM

5V_RUNPWR
PM_SLP_S3 PM_SLP_S3 8

D
Q16 Q10 Q26 Q54 Q53 Q52
D

D
DY 2N7002-11-GP DY 2N7002-11-GP Q41 DY 2N7002-11-GP DY 2N7002-11-GP DY 2N7002-11-GP 2N7002A-7-GP
2N7002A-7-GP S3_DY
S3_DY G PM_SLP_S3#
G PM_SLP_S3 G PM_SLP_S3 G PM_SLP_S3 G PM_SLP_S3 G PM_SLP_S3 G
S

S
-1 0114 -1 0114
S

B VCC_GFXCORE VCC_CORE 1D5V_S3 3D3V_S5 B


For Discharge
2

R246 R254 R422


100R2J-2-GP 100R2J-2-GP 100R2J-2-GP R413
DY DY DY 100KR2J-1-GP
DY 3D3V_S5
C685
1

CORE_RUNPWR 1

3D3V_RUNPWR 1

1 DY 2 0R2J-2-GP 2 1
GFX_RUNPWR

16,38 CORE_PWRGD
R582 U69
38,40,41,42,43 ALL_PWRGD 1 2 1 SCD1U10V2KX-5GP
PM_SLP_S4 R581 0R0402-PAD B
5
-1 0107 VCC
33 S0_PWR_GOOD 2
A R605 1
4 2 IMVP_VR_EN 38
Y 0R0402-PAD
3
GND -1 0107
Q17 Q19 Q37 Q38 74LVC1G08GW-1-GP
D

DY 2N7002-11-GP DY 2N7002-11-GP DY 2N7002-11-GP DY 2N7002-11-GP 73.01G08.L04 R604 1 DY 2 PM_PWROK 16


2ND = 73.7SZ08.DAH 0R2J-2-GP

G PM_SLP_S3 G PM_SLP_S3 G G PM_SLP_S4# 16,31,33,41,43 R580


S0_PWR_GOOD 1 DY 2 IMVP_VR_EN
S

0R2J-2-GP

A <Core Design> A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

36_Run PWR
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 36 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net

D D

C C

B B

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

37_BLANK
Size Document Number Rev
A3 SA
LA46 MB
Date: Tuesday, January 26, 2010 Sheet 37 of 58
5 4 3 2 1
http://hobi-elektronika.net
PM_DPRSLPVR 7

ALL_PWRGD 36,40,41,42,43

IMVP_VR_EN 36
3 VR_CLKEN#

D DCBATOUT DCBATOUT_62883 DCBATOUT DCBATOUT_62883


D
G35
H_VID[6..0] 7
1 2
3D3V_S0 DCBATOUT DCBATOUT

H_VID6

H_VID5

H_VID4

H_VID3

H_VID2

H_VID1

H_VID0
GAP-CLOSE-PWR-2U-GP
G36 G37
1 2 1 2

1
TC23 TC24

2 0R2J-2-GP
0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD
GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP DY SE100U25VM-11GP SE100U25VM-11GP
G39 G38

2
1 2 1 2

GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP

2
2

2
SA 0901 R562
1K91R2F-1-GP -1 0126 BOM Change -1 0111

DY
-1 0107

1
R5501
R5431

1
R561

R547

R541

R538

R533

R531

R524

R521

R517
62882_DPRSLPVR
62882_CLK_EN#

62882_VR_ON

62882_VID6

62882_VID5

62882_VID4

62882_VID3

62882_VID2

62882_VID1

62882_VID0
3D3V_S0

40

39

38

37

36

35

34

33

32

31
1

U60
R579

DPRSLPVR

VR_ON
CLK_EN#

VID6

VID5

VID4

VID3

VID2

VID1

VID0
1K91R2F-1-GP
1D05V_VTT
C -1 0107
5V_S5
C
2

16,36 CORE_PWRGD 1 2 62882_PGOOD 1 30 BOOT2 BOOT2 39


PGOOD BOOT2
2

R563 0R0402-PAD
R566 1 2 62882_PSI# 2 29 UGATE2 UGATE2 39
7 PSI# PSI# UGATE2

2
68R2-GP R564 0R0402-PAD
1 2 62882_RBIAS 3 RBIAS PHASE2 28 PHASE2 PHASE2 39
NTC 470K close to H/S MOSFET of Phase1 R565 147KR2F-GP R518
1

5 H_PROCHOT# 4 27 0R0402-PAD
R595 VR_TT# VSSP2

1
1 62882_NTC_R 1 DY 2 62882_NTC LGATE2
R600 DY 2
NTC-470K-1-GP
5
NTC ISL62882HRTZ-T-GP LGATE2
26 LGATE2 39
-1 0107
4K02R2F-GP 1 62882_VW 62882_VCCP
2
DY 6
VW VCCP
25

C676 SCD01U50V2KX-1GP
1 2 62882_COMP 7 24 LGATE1B LGATE1B 39 C644 C645
COMP LGATE1B

1
R575

SC1U10V2KX-1GP

SC1U10V2KX-1GP
8K06R2F-GP 62882_FB 8 23 LGATE1 LGATE1 39
FB LGATE1A

2
1 2 62882_FB2 9 22
FB2 VSSP1
C672 SC1000P50V3JN-GP-U ISEN2 10 21 PHASE1 PHASE1 39
ISEN2 PHASE1

UGATE1
1 C663
Intel support POC (power on current).

BOOT1
ISUM+
ISEN1
SCD22U25V3KX-GP

ISUM-
VSEN

C671

IMON
41
VDD
RTN

GND

VIN
1
R596
DY 2 1 2 2

1
0R2J-2-GP SC10P50V2JN-4GP C646 1D05V_VTT
11

62882_VSEN 12

13

62882_ISUM- 14

15

16

17

18

19

20
VSUM-

SCD22U25V3KX-GP

2
62883_VDD
62882_RTN

62882_FB2 1 2 1 262882_COMP_R
1 2 ISEN1 UGATE1
62883_VIN

UGATE1 39
C657 C680 R586 412KR2F-GP 1 BOOT1 1 2 BOOT1_PHASE1
SC22P50V2JN-4GP SC150P50V2JN-3GP C664 IMVP_IMON R522 2D2R2F-GP IMVP_IMON 7 R514 R520 R523 R530 R532 R537 R540 R544 R591

1
SCD22U25V3KX-GP 2 -1 0107 DCBATOUT_62883

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP
1 R525 2

1
VSUM-

0R0402-PAD DY DY DY DY
B 1 2
5V_S5 R228 C309
SCD033U25V3KX-GP
B

2
9K76R2F-1-GP
C681 1R2F-GP
1

1 262882_FB_VSEN1 2 C648 C647 R539

2
39 ISEN1 ISEN1 R587 H_VID0
SC1U10V2KX-1GP

VSS_SENSE
SCD22U25V3KX-GP

562R2F-GP SC390P50V2KX-GP H_VID1


2

39 ISEN2 ISEN2 1 R588 2 H_VID2


2K7R2F-GP SA 0916 H_VID3
SC 1209 H_VID4
H_VID5
H_VID6
VSUM+ VSUM+ 39 PM_DPRSLPVR
PSI#
1

1
C486 C485
C654 R353 R512 R328 R333 R338 R348 R349 R354 R360 R371 R592

1
SCD22U16V3KX-2-GP

SCD033U16V3KX-GP

SC330P50V2KX-3GP 82D5R2F-1-GP 2K61R2F-1-GP


2

VSUM_CR 2

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP

1KR2J-1-GP
1

R356 DY DY DY DY DY
1VSUM_RR
VSUM_RC 2

2
11KR2F-L-GP

2
1 2
7 VCC_SENSE R549 0R0402-PAD
2
1

C653
SC330P50V2KX-3GP R508
2

C488 R364 NTC-10K-27-GP


2

1 2 SCD01U50V2KX-1GP 0R2J-2-GP
7 VSS_SENSE R545 0R0402-PAD
1

1 2 VSUM- VSUM- 39
2

-1 0107 R365 1K33R2F-GP NTC 10K close to Choke of Phase1


C651
1

SC1000P50V3JN-GP-U SC 1209
1

C492
SCD1U25V3KX-GP
2

A 1
R366
2

0R0402-PAD
A
<Core Design>

-1 0107
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

38_ISL62882_CPU_CORE ( 1 of 2 )
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 38 of 58
5 4 3 2 1
SC 1210
http://hobi-elektronika.net DCBATOUT_62883
SC - BOM change -1 0108

C456 C455 C454 C484 C489 C431

1
SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SCD1U25V3KX-GP
DY DY DY DY
SA 0829

2
6
5
2
1
D
D
D
D
D U37
BSF045N03LQ3G-GP
D
84.45N03.A30
2ND = 84.06721.030

S
-1 0126 BOM Change

3
38 UGATE2 1 R511 2 UGATE2_R VCC_CORE
Iomax=38A
0R0402-PAD L23
38 PHASE2 1 2
L-D36UH-1-GP
OCP>60A
TC10 TC20 TC5

7
6
2
1

1
SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
SA 0916 U33

D
D
D
D
BSB017N03LX3G-GP
84.17N03.030

2
38 BOOT2 1 2B00T2_R 1 2 2ND = 84.06725.030
R519

2
2D2R2F-GP C642 -1 0108

G
S
S
SCD22U25V3KX-GP G22 G20
GAP-CLOSE GAP-CLOSE

5
4
3
1 TP70

1
38 LGATE2 1 R291 2 LGATE2_R TPAD40-GP
0R0402-PAD

PHASE2_R

+VCC_CORE_PHASE2
C 38 ISEN2
ISEN2 1 2 C
R343 10KR2F-2-GP
VSUM+ 1 2
38 VSUM+ R529 3K65R3F-GP
VSUM- 1 2
38 VSUM- R527 1R2F-GP
ISEN1 1 2
38 ISEN1 R342 10KR2F-2-GP
DY

SC 1210 DCBATOUT_62883
SC - BOM change -1 0108
C457 C458 C459 C493 C565 C432
1

SCD1U25V3KX-GP
SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP
SA 0829 DY DY DY DY
2

2
6
5
2
1
D
D
D
D

U36
BSF045N03LQ3G-GP
84.45N03.A30
2ND = 84.06721.030
G

-1 0126 BOM Change


4

1 R513 2 UGATE1_R VCC_CORE


B 38 UGATE1 0R0402-PAD
1
L24
2
-1 0108 B
38 PHASE1 L-D36UH-1-GP -1 0108
7
6
2
1

SA 0916 TC8 TC16


D
D
D
D

U32 DY
ST330U2VDM-4-GP

SE470UF2VDM-GP

BSB017N03LX3G-GP
2

84.17N03.030
2ND = 84.06725.030
2

2
G
S
S
5
4
3

G21 G19
1 TP69 GAP-CLOSE GAP-CLOSE
1 R290 2 LGATE1_R TPAD40-GP
1

38 LGATE1 0R0402-PAD
+VCC_CORE_PHASE1
PHASE1_R

SA 0829
1 TP73
38 LGATE1B TPAD40-GP
ISEN1 1 2
38 ISEN1 R345 10KR2F-2-GP
VSUM+ 1 2
38 VSUM+ R528 3K65R3F-GP
VSUM- 1 2
38 VSUM- R526 1R2F-GP <Core Design>
A 38 ISEN2
ISEN2 1
R344 DY
2
10KR2F-2-GP
A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

39_ISL62882_CPU_CORE ( 2 of 2 )
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 39 of 58
5 4 3 2 1
DCBATOUT DCBATOUT_51123_3D3V
G109
DCBATOUT DCBATOUT_51123_5V
G110
3D3V_PWR
G61
3D3V_S5 http://hobi-elektronika.net 5V_PWR 5V_S5
1 2 1 2 1 2 G53
1 2
GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP
G113 G112 G62 GAP-CLOSE-PWR-2U-GP
1 2 1 2 1 2 G67
1 2
GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP
G115 G114 G63 GAP-CLOSE-PWR-2U-GP
1 2 1 2 1 2 51123_ENTIP2 51123_ENTIP1 G54

D GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP


1 2
D

1
G111 G108 G57 GAP-CLOSE-PWR-2U-GP

1
1 2 1 2 1 2 C477 R337 R341 C478 G64
SC18P50V2JN-1-GP 150KR2F-L-GP 150KR2F-L-GP SC18P50V2JN-1-GP
GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP
DY DY 1 2

2
G58 GAP-CLOSE-PWR-2U-GP

2
1 2 G65
1 2
GAP-CLOSE-PWR-2U-GP
G59 GAP-CLOSE-PWR-2U-GP
1 2 G66
1 2
GAP-CLOSE-PWR-2U-GP
G60 GAP-CLOSE-PWR-2U-GP
1 2 G55
1 2
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
-1 0126 BOM Change DCBATOUT
DCBATOUT_51123_3D3V SC 1210 DCBATOUT_51123_5V
SC - BOM change SC 1210
SC - BOM change
C688 C689 C495
1

1
TC25 C683 C665 SCD01U50V2KX-1GP C690 C691

1
SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

DY DY SA 0829 DY SA 0829 C682 TC26


ST5D6U25VBM-1-GP

SCD1U25V3KX-GP

SC10U25V5KX-GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP
DY DY
2

ST5D6U25VBM-1-GP
SCD1U25V3KX-GP
2

2
D D
8
7
6
5

5
6
7
8
C C

D
D
D
D
D
D
D
D

-1 0112 U66 U67

16
-1 0108 SIS412DN-T1-GE3-GP U45 SIS412DN-T1-GE3-GP -1 0108 -1 0112

VIN
-1 0114
Iomax=6A

G
S
S
S
C490 -1 0107 C491
S
S
S
G

Iomax=6A SCD1U25V3KX-GP -1 0107 SCD1U25V3KX-GP


G S -1 0126 BOM Change OCP=9A
1
2
3
4

4
3
2
1
OCP=9A S G 2 151123_VBST2_R 1 R361 251123_VBST2 9 VBST2
0R0603-PAD VBST1 22 51123_VBST1 1 R362 251123_VBST1_R 1
0R0603-PAD
2
3D3V_PWR 51123_DRVH2 10 DRVH2 21 51123_DRVH1 5V_PWR
L17 DRVH1 L16
1 2 51123_LL2 11 20 51123_LL1 1 2
IND-3D3UH-57GP LL2 LL1 IND-3D3UH-57GP
51123_DRVL2 51123_DRVL1
D 12
DRVL2 DRVL1
19
1

TC14 C496
D
8
7
6
5

5
6
7
8

1
SCD1U10V2KX-5GP

U70 C497 TC13


ST220U6D3VDM-20GP

D
D
D
D
D
D
D
D

SCD1U10V2KX-5GP
7 24 51123_VO1 G56 DY
DY

ST220U6D3VDM-20GP
2

VO2 VO1

1
U71
SIS412DN-T1-GE3-GP

2
GAP-CLOSE-PWR-3-GP
51123_FB2 5 2 51123_FB1 SIS412DN-T1-GE3-GP
VFB2 VFB1
DCBATOUT 1 R376 2
249KR2F-GP

2
G
S
S
S
2 51123_EN 13 51123_PGOOD
S
S
S
G

1 23
R377 100KR2F-L1-GP EN0 PGOOD
G S
1
2
3
4

4
3
2
1
51123_ENTIP2 6 51123_ENTIP1
S G 51123_VREF TRIP2 TRIP1
1

51123_VREF 3 15
SB 1026 delete G68 VREF GND
1

C469 51123_TONSEL 4 25
TONSEL GND
SCD22U6D3V2KX-1GP

Id=7.7A

1
B B
2

Qg=8.5~13nC
1

51123_SKIPSEL 14 18 51123_VCLK 1 TP76 TPAD14-GP DY


1

1
SKIPSEL ENC
R322 Rdson=16.5~21mohm R347
R329 0R2J-2-GP 0R2J-2-GP R346
DY
VREG3

VREG5

6K65R2F-GP SC 1209 30K9R2F-GP

1 2
51125_FB1_R
1 2

2
51125_FB2_R C472 DY SC -BOM change for 5.1V
2

2
DY C470 TPS51123RGER-GP R373 SC18P50V2JN-1-GP
3D3V_AUX_S5_5_51123 8

17

SC18P50V2JN-1-GP 0R0402-PAD

2
3D3V_AUX_S5 5V_AUX_S5
G52
2

G107

1
5V_AUX_S5_51123

1 2 1 2 1 2 ALL_PWRGD 36,38,41,42,43
1

-1 0107 R351 0R2J-2-GP R330


R335 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP 20KR2F-L-GP
10KR2F-2-GP 51123_VREF 2 DY 1 175mA 1 2 PWM_RSMRST# 16
R334 R374 DY 0R2J-2-GP Close to VFB Pin (pin2)

2
0R2J-2-GP
2

SB 1029 Reserve for SW requirement


3D3V_AUX_S5 1 2 S5_ENABLE 33,36
R327
1

1
SC4D7U6D3V5KX-3GP

0R2J-2-GP C666 C667


C483 Vout=2*(1+R1/R2)
SC22U6D3V5MX-2GP
SC10U6D3V5MX-3GP
2

51123_VREF 2 DY 1
R378 GND VREF VREG3 VREG5
0R2J-2-GP
Close to VFB Pin (pin5)
3D3V_AUX_S5 2 1
R379 SKIPSEL AUTOSKIP PWM 00A AUTOSKIP 00A AUTOSKIP
0R2J-2-GP
A 2 DY 1
<Core Design>
A
R375 TONSEL 200k/CH1 245k/CH1 300k/CH1 365k/CH1
0R2J-2-GP 250k/CH2 305k/CH2 375k/CH2 460k/CH2 Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

40_TPS51123_5V/3D3V
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 40 of 58

5 4 3 2 1
5 4 3 2 1
DCBATOUT
G2
DCBATOUT_7141_1D5V http://hobi-elektronika.net
1

GAP-CLOSE-PWR-2U-GP
G3
2

5V_S5
RT8209E for 1D5V DCBATOUT_7141_1D5V
-1 0108
SC 1210
1 2

GAP-CLOSE-PWR-2U-GP C27 C30 C35

SCD1U25V3KX-GP
G4

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP
1 2 SA 0829
C518 R390

2
GAP-CLOSE-PWR-2U-GP SC1U10V2KX-1GP 2D2R3-1-U-GP
D D

5
6
7
8
G5 Iomax=12A

D
D
D
D
1 2 U16

2
GAP-CLOSE-PWR-2U-GP
7141_V5FILT SIR474DP-T1-GE3-GP OCP=18A
R17

1
C504 C526
5V_S5 SC1U10V2KX-1GP 1 2 7141_LL_1 1 2

G
S
S
S
SA 0901

2
3D3R3J-L-GP SCD1U25V3KX-GP

4
3
2
1
1D5V_S3
R22

A
U5
DY D12 4 13 7141_DRVH 1 2 7141_DRVH_R
VDD UGATE 7141_DRVL
B0530WS-7-F-GP 10 VDDP LGATE 9 L20
3D3R3J-L-GP
7141_VFB 5 12 7141_LL 1 2
K

7141_VBST FB PHASE SA 0901 IND-1UH-80-GP


14 BOOT

1
3 1D5V_S3 68.1R01B.10A C4 TC3 TC1
VOUT

1
-1 0107 6 7141_PGOOD C56
PGOOD

5
6
7
8

SC33P50V2JN-3GP

SCD1U10V2KX-5GP

SE220U2VDM-8GP

SE220U2VDM-8GP
1 2 7141_EN_PSV 1 7 R1 DY DY
EN/DEM GND

D
D
D
D
16,31,33,36,43 PM_SLP_S4# R15 7141_TON 3D3V_S0 U15 30KR2F-GP
1 2 2 8

2
0R0402-PAD R14 7141_TRIP TON PGND
11 15 SIR460DP-T1-GE3-GP

2
CS NC#15

1
249KR2F-GP 7141_VFB
1

RT8209EGQW-GP R5

1
C8 DY 74.08209.B73 10KR2F-2-GP

1
S
S
S
SCD1U10V2KX-5GP R23

G
2

6K8R2F-2-GP R7

4
3
2
1
30KR2F-GP
1 2 ALL_PWRGD 36,38,40,42,43 Panasonic 220uF 2V

2
R6

2
0R0402-PAD ESR=15mOhm
-1 0107 Iripple=2.7A
SB 1029 change to
C Freq=300KHz 84.00460.037
Vout=0.75V*(R1+R2)/R2 C

DCBATOUT DCBATOUT_RT8209B_1D05V 5V_S5


RT8209E for 1D05V DCBATOUT_RT8209B_1D05V
SC 1210
1D05V_PWR
G24
1D05V_S0

1 2
G34 -1 0108 SC - BOM change
1 2 GAP-CLOSE-PWR-2U-GP
G25
GAP-CLOSE-PWR-2U-GP C443 C434 C444 1 2

SCD1U25V3KX-GP
G33
2

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP
1 2 C453 GAP-CLOSE-PWR-2U-GP
SC1U10V2KX-1GP R299 SA 0829 G26

2
GAP-CLOSE-PWR-2U-GP 10R3F-GP 1 2
1

5
6
7
8
G32

D
D
D
D
1 2 U39 GAP-CLOSE-PWR-2U-GP
2

RT8209B_V5FILT SI7716ADN-T1-GE3-GP G23


GAP-CLOSE-PWR-2U-GP 1 2
R298
1

G31 C438 C439


1 2 5V_S5 SC1U10V2KX-1GP 1 2 RT8209B_LL_1 1 2 -1 0126 BOM Change GAP-CLOSE-PWR-2U-GP

G
S
S
S
G27
Iomax=8A
2

GAP-CLOSE-PWR-2U-GP 3D3R3J-L-GP SCD1U25V3KX-GP 1 2

4
3
2
1
OCP=12A
A

U42 GAP-CLOSE-PWR-2U-GP
B DY D8
B0530WS-7-F-GP
4
10
VDD
VDDP
UGATE
LGATE
13
9
RT8209B_DRVH
RT8209B_DRVL
L15
1D05V_PWR 1
G28
2
B
RT8209B_VFB 5 12 RT8209B_LL 1 2 GAP-CLOSE-PWR-2U-GP
K

RT8209B_VBST 14 FB PHASE IND-1UH-98-GP G29


BOOT

1
3 1D05V_PWR C445 TC12 1 2
VOUT

1
6 RT8209B_PGOOD R306 C425
PGOOD

5
6
7
8

SC33P50V2JN-3GP

SCD1U10V2KX-5GP

SE330U2VDM-L-GP
1 2 RT8209B_EN_PSV 1 7 30KR2F-GP DY DY GAP-CLOSE-PWR-2U-GP
5,16,31,33,36,42,43,44 PM_SLP_S3# EN/DEM GND

D
D
D
D
R296 1 R300 2 RT8209B_TON 2 8 1 2 G30
ALL_PWRGD 36,38,40,42,43

2
0R0402-PAD 200KR2F-L-GP RT8209B_TRIP 11 TON PGND R313
15 1 2

2
CS NC#15 RT8209B_VFB
-1 0107 0R0402-PAD U43
1

RT8209EGQW-GP -1 0107 BSZ115N03MSC-G-GP GAP-CLOSE-PWR-2U-GP


1

C435 DY R312

1
G
S
S
S
SCD1U10V2KX-5GP SA 0909 R307 DY 10KR2F-2-GP
2

15KR2F-GP R308

4
3
2
1
75KR2F-GP
1

Panasonic330uF 2.5V
2

SB 1029 change to 3D3V_S0

2
64.15025.6DL ESR=9mOhm
Iripple=3A
SB 1029 change to 84.11503.037
Freq=300KHz
Vout=0.75V*(R1+R2)/R2

A <Core Design>
A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

41_RT8209E_1D5V / RT8209E_1D05V
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 41 of 58
5 4 3 2 1
DCBATOUT DCBATOUT_RT8209B_VCCP
http://hobi-elektronika.net +VCCP_PWR 1D05V_VTT

1
G40
2
GAP-CLOSE-PWR-2U-GP
RT8209E for 1D05V_VTT 1
G91
2
GAP-CLOSE-PWR-2U-GP
G41
1 2 1 2

GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP
G43 G93
D 1 2 DCBATOUT_RT8209B_VCCP -1 0108
SC 1210
1 2 D
GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP
G44 G96
1 2 C448 C461 C446 1 2

SCD1U25V3KX-GP
SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP
GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP
G45 G98
D

2
5
6
7
8
1 2 1 2

D
D
D
D
U35
GAP-CLOSE-PWR-2U-GP TPCA8030-H-GP GAP-CLOSE-PWR-2U-GP
G42 G100
1 2 1 2
-1 0126 BOM Change

G
S
S
S
GAP-CLOSE-PWR-2U-GP GAP-CLOSE-PWR-2U-GP
G103
G S

4
3
2
1
Iomax=18A 1 2

R548 OCP=27A GAP-CLOSE-PWR-2U-GP


G104
1 2 +VCCP_PWR 1 2
L25
5V_S5 3D3R3J-L-GP Vout=1.1054(Cal)
1 2 GAP-CLOSE-PWR-2U-GP
L-D36UH-1-GP G90
68.R3610.20A C696 1 2
1

1
C637 TC21 TC9
D
1

5
6
7
8

SC18P50V2JN-1-GP

SCD1U10V2KX-5GP
C652 R618 DY DY GAP-CLOSE-PWR-2U-GP
R570
C C

ST330U2VDM-4-GP

ST330U2VDM-4-GP
D
D
D
D
5V_S5 SC1U10V2KX-1GP 10R3F-GP C655 U34 G94

2
1 2 RT8209B_VCCP_LL_1 1 2 TPCA8028-H-GP R614 1 2
2

1 2

10KR2F-2-GP
RT8209B_VCCP_V5FILT SCD1U25V3KX-GP GAP-CLOSE-PWR-2U-GP
A

C693 3D3R3J-L-GP G95

2
G
S
S
S
DY D22 SC1U10V2KX-1GP RT8209B_VCCP_VFB SA 0829 1 2
B0530WS-7-F-GP G S
2

4
3
2
1

1
U65 SB-BOM change to GAP-CLOSE-PWR-2U-GP
4 13 RT8209B_VCCP_DRVH R615 79.33719.20L G97
K

VDD UGATE RT8209B_VCCP_DRVL 24KR2F-GP


10 9 1 2
VDDP LGATE
RT8209B_VCCP_VFB 5 12 RT8209B_VCCP_LL GAP-CLOSE-PWR-2U-GP

2
RT8209B_VCCP_VBST FB PHASE G99
14
BOOT
36,38,40,41,43 ALL_PWRGD 1 2 3 +VCCP_PWR 1 2
R589 0R2J-2-GP VOUT
6
VCCP_RUN ON 1 PGOOD GAP-CLOSE-PWR-2U-GP
5,16,31,33,36,41,43,44 PM_SLP_S3# 1 2 7
R590 0R2J-2-GP EN/DEM GND
DY 1 R613 2 RT8209B_VCCP_TON 2 8 G101
200KR2F-L-GP RT8209B_VCCP_TRIP 11 TON
CS
PGND
NC#15
15 Vout=0.75*(1+R1/R2) 1 2
1

RT8209EGQW-GP GAP-CLOSE-PWR-2U-GP
R546 G102
5K76R2F-2-GP 1 2

VTT_PWRGD VTT_PWRGD 5,33 GAP-CLOSE-PWR-2U-GP


2

RT8209B_VCCP_VFB 1 DY 2 VTT_SENSE 7
R616 0R2J-2-GP

B B
Freq=360KHz

<Core Design>

A Wistron Corporation
A
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

42_RT8209E_1D05V_VTT
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 42 of 58

5 4 3 2 1
5 4 3 2 1
3D3V_S5
http://hobi-elektronika.net
RT9025 for 1D8V_S0 Iomax=1.1A
5V_S5
G13

1
C280 C281 1 2
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

1
DY C261 GAP-CLOSE-PWR-2U-GP

2
SC1U6D3V2KX-GP G14
1 2

2
GAP-CLOSE-PWR-2U-GP
D G15 D
1 2
1D8V_LDO
Vo(cal.)=1.8069V GAP-CLOSE-PWR-2U-GP 1D8V_S0
G16

9
1 R218 2 9025_EN U24 1 2
5,16,31,33,36,41,42,44 PM_SLP_S3# 0R0402-PAD

GND
4 5 GAP-CLOSE-PWR-2U-GP
VDD NC#5

1
-1 0107 3 6 C232 C225 C226
VIN VOUT

1
2 7 R189 DY DY
EN ADJ

SC100P50V2JN-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
C275 DY 1 8 18KR2F-GP

2
SCD1U10V2KX-5GP PGOOD GND

2
3D3V_S0 RT9025-25PSP-GP
74.09025.03D 9025_ADJ

1
R216 R188
DY 10KR2F-2-GP 14K3R2F-GP
2

2
36,38,40,41,42 ALL_PWRGD 1 R217 2 9025_PGOOD
0R0402-PAD
-1 0107 Vo=0.8*((R1+R2)/R2)
C C

5V_S5 1D5V_S3
Iomax=1.2A
RT9026 for 0D75V_S3

2
C557 C559 DDR_VREF_PWR 0D75_S0

SCD1U10V2KX-5GP
C560 G74
SC1U6D3V2KX-GP SC10U6D3V5MX-3GP 1 2

1
2
GAP-CLOSE-PWR-2U-GP
G75
U55 1 2
-1 0107
10 1 GAP-CLOSE-PWR-2U-GP
9026_S5 VIN VDDQSNS
16,31,33,36,41 PM_SLP_S4# 1 R450 2 9 S5 VLDOIN 2 G76
0R0402-PAD 8 3 1 2
9026_S3 GND VTT
1 S3 2 7 S3 PGND 4
5,16,31,33,36,41,42,44 PM_SLP_S3# GAP-CLOSE-PWR-2U-GP
DDR_VREF_S3 6 VTTREF VTTSNS 5
R451

GND
1

SC 1130 0R2J-2-GP
1

1
B C562 DY
C561
SC1U10V2KX-1GP RT9026PFP-GP
C556 C558
B
2

11
1 2 SCD1U10V2KX-5GP 74.09026.079 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP
2

2
5 CPU_VDDQ_PWRGD R449 S3_DY
0R2J-2-GP
SA 0901: LC require to reserve

<Core Design>

A Wistron Corporation
A
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

43_RT9025_1D8V/ RT9026_0D75
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 43 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
DCBATOUT DCBATOUT_62881

G46
1 2
GFX_VID[6..0] 8
C675 GAP-CLOSE-PWR-2U-GP

2
SCD1U25V3KX-GP G51
DY R598 2 1 GFX_VID6 1 2
1 2 DY GFX_VID5
5,16,31,33,36,41,42,43 PM_SLP_S3# R584 0R2J-2-GP 4K7R2J-2-GP GFX_VID4 GAP-CLOSE-PWR-2U-GP
G50

1
-1 0108 1 2
1 2 GFX_VR_EN_62881 1 2
8 GFX_VR_EN R593 0R0402-PAD R597 0R0402-PAD GAP-CLOSE-PWR-2U-GP
-1 0108 GFX_VID3 G49

D 8 GFX_DPRSLPVR 1
R608
2
0R0402-PAD
GFX_VID2
GFX_VID1
GFX_VID0
1 2

GAP-CLOSE-PWR-2U-GP
D
G48

1
-1 0110 1 2
DY R609
4K7R2J-2-GP GAP-CLOSE-PWR-2U-GP

62881_DPRSLPVR
G47

62881_VR_ON
1 2

2
SA 0826
-1 0108 DCBATOUT_62881 GAP-CLOSE-PWR-2U-GP
3D3V_S0 SC 1210
SA 0829

C463 C467 C566

1
C462

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP
DY

27

26

25

24

23

22
28

SCD1U50V3KX-GP
R611 -1 0108 U61 +VGFXCORE_PWR VCC_GFXCORE

2
5

8
10KR2F-2-GP

VID6

VID5

VID4

VID3

VID2
VR_ON
DPRSLPVR

D
U40 G87
SA 0911 TPCA8021-H-GP 1 2
2

62881_PGOOD
1
CLK_EN# VID1
21
-1 0108
1 R536 2
0R0402-PAD
5V_S0 GFX_I GAP-CLOSE-PWR-2U-GP
G88
2 20 1 2
PGOOD VID0 C649 -1 0126 BOM Change Iomax=15A

S
1 2 62881_RBIAS 3 19 62881_VCCP 1 2 GAP-CLOSE-PWR-2U-GP
RBIAS VCCP
R612 47KR2F-GP OCP>23A G89

1
62881_VW 4 18 62881_LGATE SC1U10V2KX-1GP 1 2
VW LGATE SA 0829
1

62881_COMP 5 ISL62881HRTZ-T-GP 17 GAP-CLOSE-PWR-2U-GP


COMP VSSP
1

R603 G78
8K06R2F-GP C695 62881_FB 6 16 62881_PHASE 1 2 +VGFXCORE_PWR 1 2
SC1KP50V2KX-1GP FB PHASE L26
2

C 62881_VSEN7 15 62881_UGATE IND-D56UH-22-GP GAP-CLOSE-PWR-2U-GP


C
2

VSEN UGATE 68.R5610.10J G79


1 2
1 2

ISUM+

5
6
7
8
ISUM-

BOOT
IMON
R620 29

VDD
RTN
GND

D
D
D
D
VIN
0R2J-2-GP C650 U41 GAP-CLOSE-PWR-2U-GP
1 2 1 262881_VSEN_11 2 SCD22U16V3KX-2-GP TPCA8019-H-GP-U G86
DY 1 R368 2 1 2

10

11

12

13

14

2
C684 R617 C697 0R0402-PAD
SC15P50V2JN-2-GP 17K8R2F-GP SC100P50V2JN-3GP GAP-CLOSE-PWR-2U-GP

G
S
S
S
62881_BOOT 2 62881_BOOT_1

62881_ISUM+
1 G80

62881_ISUM-

62881_VDD
62881_RTN
1 262881_FB_1 1 2 1 2 R542 2D2R2F-GP 1 2

62881_VIN

4
3
2
1
R599
C698 R619 7K32R2F-GP GFX_IMON 8 GAP-CLOSE-PWR-2U-GP
SC100P50V2JN-3GP 820KR2F-GP SB-BOM change to G81

1
64.73215.6DL 1 2

1
R198 C248 SB 1026 delete G105, G106
19K6R2F-GP SCD022U16V2KX-3GP GAP-CLOSE-PWR-2U-GP
SB 1026 change to 78.22321.2FL G82

2
1 2

2
VSS_AXG_SENSE 8
GAP-CLOSE-PWR-2U-GP
DCBATOUT_62881 G83
1 2 1 R370 2 1 2
R372 0R0402-PAD
0R0402-PAD C692 5V_S5 SA 0829 GAP-CLOSE-PWR-2U-GP
SC330P50V2KX-3GP 1 2 G84
-1 0108 R369 1R2F-GP 1 2
1

1 2 C662 1 C494
SC1U10V2KX-1GP SCD22U25V3KX-GP GAP-CLOSE-PWR-2U-GP
1

1
C678 2 G85
2

SC330P50V2KX-3GP C679 TC22 TC19 1 2


SC1KP50V2KX-1GP ST330U2VDM-4-GP ST330U2VDM-4-GP
2

2
1 2 GAP-CLOSE-PWR-2U-GP
R551 2KR2F-3-GP
1

1
SCD22U10V2KX-1GP

1 2 SA 0909
B 8 VCC_AXG_SENSE
B
SCD033U25V2KX-GP

R627 0R0402-PAD R571 C668 R510


1

82D5R2F-1-GP C669 DY R572 2K61R2F-1-GP

1
0R2J-2-GP
1 2 R573
2

2
8 VSS_AXG_SENSE R610 0R0402-PAD 11KR2F-L-GP
-1 0108 62881_ISUM+_3
62881_ISUM+_1

1
1

1
C673 SB-BOM change R509
R628 R625 SCD01U25V2KX-3GP to 78.33322.2FL NTC-10K-9-GP G17 G18
10R3F-GP 10R3F-GP GAP-OPEN-PWR GAP-OPEN-PWR
2

2
1 2
2

R585 2K8R2F-GP

1
C674
SB-BOM change to 64.28015.6DL SA 0911 SCD1U25V3KX-GP

2
VSS_AXG_SENSE_OUTCAP

VCC_AXG_SENSE_OUTCAP

A <Core Design>
A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

44_ISL62881_+VCC_GFXCORE
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 44 of 58

5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_62872_VGA_CORE
http://hobi-elektronika.net
1
G6
2 ISL62872 FOR VGA_CORE_PWR
GAP-CLOSE-PWR-2U-GP
G7
1 2

GAP-CLOSE-PWR-2U-GP 5V_S0
G8
1 2

D GAP-CLOSE-PWR-2U-GP D

2
G9
1 2 R393
2D2R3-1-U-GP DCBATOUT_62872_VGA_CORE
GAP-CLOSE-PWR-2U-GP
SC 1210

1
2
G10
1 2 R385
0R0603-PAD C508 C509 C29 C28 C567
GFX_D

1
GAP-CLOSE-PWR-2U-GP C31

SC1U16V3KX-2GP

SCD1U10V2KX-4GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP
1

SCD1U50V3KX-GP
C503

2
1 2 62872_PVCC
Iomax=15A

8
SC1U16V3KX-2GP

D
U14
TPCA8021-H-GP OCP=23A
62872_AGND

GAP-CLOSE-PWR
62872_LGATE

S
G1 VGA_CORE_S0

20

1
1
U48

LGATE

PVCC
2 19 62872_VCC R408 C520
PGND VCC 62872_BOOT
62872_AGND 3 GND BOOT 18 1 262872_BOOT_R 1 2 SCD22U25V3KX-GP L19
4 17 62872_UGATE 2R3F-GP
MCP_CORE_VID1_R EN UGATE 62872_PHASE
5 VID1 PHASE 16 1 2
MCP_CORE_VID0_R 6 15 IND-D56UH-22-GP
62872_SREF VID0 NC#15 62872_OCSET 68.R5610.10J
7 14
C SREF OCSET
C

1
62872_SET0 8 13 62872_VO TC15 TC2
SET0 VO
SCD068U10V2KX-1GP

PGOOD
62872_SET1 9 12 62872_FB
SET1 FB
1

ST330U2VDM-4-GP

ST330U2VDM-4-GP
SET2

2
1

5
6
7
8
C500 R380

D
D
D
D
20D5R2F-1-GP ISL62872HRUZ-T-GP

11
10
2

3D3V_S0_NV U13
SA 0623 62872_SET2 TPCA8019-H-GP-U
R382

G
S
S
S
1

3D3V_S0_NV 1 2 62872_AGND R394

4
3
2
1
10KR2F-2-GP
R384
10KR2J-3-GP 18K7R2F-GP
2

DIS DGPU_PWROK 19,50,51 SB 1026 delete G11


2

VGA power sequence modify


DIS
1
1

C499 R389
SCD1U25V3KX-GP 31K6R2F-GP R404
1 262872_FB_C
1 2
2

C519
2

SA 0909 SC1KP50V2JN-2GP 100R2F-L1-GP-U 1 2


R409
4K53R2F-1-GP

1 2
1 2 1 2 1 2 C521
R391 R402 R399 SCD1U25V2KX-GP
294KR2F-1-GP 41K2R2F-GP 24K9R2F-L-GP 1 2

B 62872_AGND
R403
4K53R2F-1-GP B
3D3V_S5
SA 0911
3
4

RN2

SRN100KJ-6-GP
66.10436.04L
2
1

For 40nm GPU the Core and GPIO5/6 relationship as below:


U2
4 3 MCP_CORE_VID0_R
GPIO6/VID1 GPIO5/VID0 Core
55 NVVDD_ALTV0 5 2 NVVDD_ALTV1 55 0 0 0.83V
MCP_CORE_VID1_R 6 1 0 1 0.88V
DMN66D0LDW-7-GP 1 0 0.93V
84.DMN66.03F 1 1 1.03V
2ND = 84.27002.F3F
SA 0912 change part
SB 1015 change to 84.DMN66.03F

SB 1031 R380 Change to 64.20R55.6DL


R384 Change to 64.18725.6DL
A R389 Change to 64.31625.6DL
to rise up VGA voltage for NV suggestion. <Core Design>
A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

45_ISL62872_VGA_CORE
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 45 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
AD+
SA 0829 NEAR
U47
8 D S 1
7 D S 2 DCBATOUT BT+
6 D S 3

1
5 D G 4
R387 R407 U49
SI7129DN-T1-GE3-GP 100KR2J-1-GP AD+_TO_SYS 1 2 1 S D 8
2 S D 7
D01R2512F-4-GP AD+ 3 S D 6
D D

2
4 G D 5
AD+_G_2
SI7129DN-T1-GE3-GP

1
2

R388 AD+ C501

1
R381 49K9R2F-L-GP SCD1U25V2ZY-1GP
10KR2F-2-GP

1
G69 G70

2
2

2
AD+_G_1 D13 R386
1

SB 1016 change 1SS400GPT-GP 470KR2J-2-GP


84.DMN66.03F
83.00400.C1F GAP-CLOSE-PWR GAP-CLOSE-PWR

2
2nd = 83.1S400.A2F
Q31
1

DMN66D0LDW-7-GP
84.DMN66.03F AD+

1
DC_IN_D 2ND = 84.27002.F3F
C532
DCBATOUT

SC1U25V5KX-1GP
C512
6

2
C507 -1 0108
2 1 BQ24745_CSSP 2 1 1 2 SC 1210

1
R9 SCD1U50V3KX-GP C9
309KR3F-GP CHG_AGND SCD1U50V3KX-GP SCD1U50V3KX-GP
C516 C517 C17 C18

1
AC_OK U6 CHG_AGND SCD1U25V2ZY-1GP
2

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP

SC4D7U25V5MX-1GP
ICREF

5
6
7
8
BQ24745_DCIN 22 28 U4

2
DCIN CSSP

D
D
D
D
SIS412DN-T1-GE3-GP
BQ24745_ACIN 2 -1 0107 ASM for EMI
ACIN BQ24745_CSSN
CSSN 27
3D3V_AUX_S5 11 26 TP1 D14 C533
VDDSMB ICOUT
C K A 1 2
C

G
S
S
S
25 BQ24745_BST CH520S-30PT-GP SC1U10V3KX-3GP

4
3
2
1
BOOT
1

21 BQ24745_VDDP
R12 AC_OK 1 R20 2 BQ24745_ACOK VDDP 83.R0203.08F
13 ACOK
1

49K9R2F-L-GP C6 0R0402-PAD 2nd = 83.R2003.A8M


1

SCD01U50V2KX-1GP C19 24 24745_HIGH_G BT+


SC1U10V3KX-3GP UGATE
10 L18
2

33,47 BAT_SCL SCL R392


1 2
2

23 BQ24745_LX1 C24 1 2 BT+_R 1 2


PHASE SCD1U50V3KX-GP IND-5D6UH-39-GP
9 68.5R610.10P D01R2512F-4-GP
33,47 BAT_SDA SDA 24745_LOW_G
LGATE 20

5
6
7
8
CHG_AGND

D
D
D
D
C12 C523 C524 C525 C527

1
CHG_AGND 14 19 G72 G71
NC#14 PGND

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
18

2
CSOP

GAP-CLOSE-PWR

GAP-CLOSE-PWR
C33

1
G
S
S
S
CHG_AGND 17 U7
CSON
1 R16 2 BQ24745_IINP 8 2 1 SIS412DN-T1-GE3-GP

4
3
2
1
33 AD_IA 0R0402-PAD SC150P50V2JN-3GP VICM

1
C3 C34
BQ24745_FBO_RC SCD1U50V3KX-GP
1 2 1 2BQ24745_FBO SCD1U25V2ZY-1GP
R13 R8 4K7R2J-2-GP

2
1 2 6 FBO
200KR2F-L-GP BQ24745_EAI 5 16
EAI NC#16
1

BQ24745_EAO 4 CHG_AGND
C11 C2 R11 BQ24745_VREF EAO
3 VREF
SC220P50V2KX-3GP SC2200P50V2KX-2GP 7K5R2F-1-GP BQ24745_CHG_ON 7
2

CE
2 1BQ24745_EAO_RC 2 1 12 15 BATT_SENSE
GND

GND VFB BATT_SENSE 47


1

C502 MAX8731A_CSIP
SC1U10V3KX-3GP
B 1 2 BQ24745RHDR-GP MAX8731A_CSIN
B
2

29

C5
SC56P50V2JN-2GP 74.24745.073 1 C32
SCD1U25V2ZY-1GP
C13 C14
2

1
R26

SC10U25V6KX-1GP

SC10U25V6KX-1GP
1 2
CHG_AGND 0R0402-PAD

2
CHG_AGND
CHG_AGND

SC 1211

BQ24745_VREF Q35
BQ24745_CHG_ON 3 4
1 2 AC_OK
R649 100KR2J-1-GP DY AC_OK 2 5 CHG_ON# 33
1

3D3V_AUX_S5 1 2 CHG_ON# C506


R650 100KR2J-1-GP SCD1U10V2KX-4GP 1 6 AC_IN#
AC_IN# 33
AC_IN# to KBC
2

3D3V_AUX_S5 4 1 AC_IN# C505


BQ24745_CHG_ON DMN66D0LDW-7-GP SC1U10V3KX-3GP
3 2
2ND = 84.27002.F3F
2

84.DMN66.03F
RN20 SRN100KJ-6-GP
66.10436.04L SB 1016 change to
84.DMN66.03F

A <Core Design> A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

46_BQ24745_CHARGER
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 46 of 58

5 4 3 2 1
5 4 3 2 1
1 AFTE14P-GP AFTP139
http://hobi-elektronika.net
AFTE14P-GP AFTP132
Adaptor in to generate DCBATOUT AD+
1
DC1 1 AFTE14P-GP TP4
7 1 AFTE14P-GP TP3 AD_JK
U50
1 1 S D 8
2 S D 7

K
2 3 S D 6

1
D 3 EC11 C522 D15 AD+_2 4 G D 5 D

SCD1U50V3ZY-GP
SCD1U50V3KX-GP
4 R638
5 AD 200KR2F-L-GP P6SBMJ24APT-GP SI7129DN-T1-GE3-GP

2
6

A
R410 C529

1
8 200KR2F-L-GP SC1U50V5ZY-1-GP
AD_DETECT 33
ACES-CON6-3GP Q36

2
R2
20.F0735.006 E

2
AD_OFF#_JK B
1
R1
C568 R648 C
SCD1U50V3ZY-GP

AD AD 34K8R2F-1-GP

1
PDTA124EU-1-GP
2

Q30 R411
1

C 100KR2J-1-GP
B R1
33 AD_OFF
E

2
R2
PDTC124EU-1-GP
84.00124.H1K
SC 1210, BOM change 2ND = 84.00124.M1K

C C
SA 0820 SB 1016 change to 20.81323.007
BATTERY CONNECTOR
AFTP8 AFTE14P-GP 1 BTY1
RN6 9
SRN33J-7-GP 7
6
33 BAT_IN# 4 5 BAT_IN#_1 5
3 6 BATA_SDA_1 4
33,46 BAT_SDA
2 7 BATA_SCL_1 3
33,46 BAT_SCL
1 8 2

BT+ 1
1 8

1
1

1
EC2 EC1 EC5 EC18 EL3 EL1 EL2 EC16 EC17 ALP-CON7-21-GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
DY DY DY 20.81323.007
K

SCD1U50V3ZY-GP
SCD1U50V3ZY-GP

SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U

MLVS0402M04-GP

MLVS0402M04-GP

MLVS0402M04-GP
2

2
D1
MMPZ5232BPT-GP-U
B B
2

2
1 AFTE14P-GP AFTP137
A

-1 0107 ASM for EMI


R28
-1 0107 ASM for EMI 1 2
46 BATT_SENSE 0R0402-PAD

AFTP136 AFTE14P-GP 1 BAT_IN#_1


AFTP7 AFTE14P-GP 1 BATA_SDA_1
AFTP138 AFTE14P-GP 1 BATA_SCL_1

<Core Design>

A Wistron Corporation A
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

47_AD / BATT_CONN
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 47 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
SB H6
HT75X825B9X9R24-S-GP
H7
HT75X825B9X9R24-S-GP
SPRING1
SPRING-15-GP
H3 H5
H1 H2 H4 ZZ.00PAD.C91 ZZ.00PAD.C91
HOLE237R95-GP HOLE237R95-GP HOLE315X315R91-S1-GP HOLE276R178-GP HOLE315X315R91-S1-GP 34.43E25.001
ZZ.00PAD.921 ZZ.00PAD.921 ZZ.00PAD.581 ZZ.00PAD.581

1
1

1
1

1
D -1 0116
SC 1130 Remove H2 ZZ.00PAD.N11 SC 1130 CHECK, H6,H7 change to ZZ.00PAD.C91 SC 1209 D
-1 0110

H8 H10
HT8BE75R24-U-45-GP H9 STF217R128H83-1-GP H11 H12 H13
ZZ.00PAD.951 HT8BE75R24-U-45-GP 34.4Y702.101 HOLE276R178-GP HOLE276R178-GP HOLE276R178-GP
ZZ.00PAD.951 ZZ.00PAD.N11 ZZ.00PAD.N11 ZZ.00PAD.N11
1

1
SB 1016 change to
ZZ.00PAD.951 SB 1016 change to
34.4Y702.101

C C
H14 H15 H21 H22
STF237R117H201-2-GP STF237R117H201-1-GP HT8BE75R24-U-45-GP STF217R128H83-1-GP
H16 H20
34.4GV07.001 34.4GV09.001 H17 H18 H19 ZZ.00PAD.951 34.4Y702.101
HOLE315X315R91-S1-GP HOLE237R95-GP HOLE237R95-GP HOLE237R95-GP STF237R113H63-1-GP
ZZ.00PAD.581 ZZ.00PAD.921 ZZ.00PAD.921 ZZ.00PAD.921 34.4GV08.001
1

1
1

1
SB 1016 change to SB 1016 change to
34.4GV07.001 34.4GV09.001
SB 1016 change to SB 1016 change SB 1016 change to
34.4GV08.001 to ZZ.00PAD.951 34.4Y702.101

H23 GNDPAD1 GNDPAD2 GNDPAD3 GNDPAD4


STF237R117H201-2-GP GNDPADS197X138-NP GNDPADS197X138-NP GNDPADS197X138-NP GNDPADS197X138-NP
34.4GV07.001 ZZ.00PAD.ZZZ ZZ.00PAD.ZZZ ZZ.00PAD.ZZZ ZZ.00PAD.ZZZ
B B
1

1
1

SB 1019 Add GND PAD

SB 1016 Add 34.4GV07.001


SC 1211 For RF
DCBATOUT DCBATOUT DCBATOUT
H25 5V_S0 5V_S5
H24 GNDPADSR236 EC34 EC35 EC36
HOLE315R95-GP
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
1

1
1

C709 C710
SC33P50V2JN-3GP SC33P50V2JN-3GP
2

2
1

2
1

ZZ.00PAD.ZZZ
ZZ.00PAD.911 GNDPADSR236 -1 0107 ASM for EMI
SB 1021 Add GNDPADSR236
SB 1021 Add ZZ.00PAD.911 1D5V_S0 3D3V_S0
<Core Design>
A A
1

EC37 EC38
SC33P50V2JN-3GP SC33P50V2JN-3GP Wistron Corporation
2

21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,


Taipei Hsien 221, Taiwan, R.O.C

-1 0116 Title
48_EMI/Spring/Boss
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 48 of 58
5 4 3 2 1
SB 1016 Add AFTE

Near KB1 Keyboard


http://hobi-elektronika.net
AFTP28 AFTE14P-GP 1 KCOL1 KROW[8..1] 33
AFTP39 AFTE14P-GP 1 KCOL2
AFTP43 AFTE14P-GP 1 KCOL3 KCOL[16..1] 33
AFTP46 AFTE14P-GP 1 KCOL4
AFTP25 AFTE14P-GP 1 KCOL5
AFTP24 AFTE14P-GP 1 KCOL6 AFTP29 AFTE14P-GP 1 KROW1
AFTP41 AFTE14P-GP 1 KCOL7 AFTP30 AFTE14P-GP 1 KROW2
AFTP31 AFTE14P-GP 1 KCOL8 AFTP42 AFTE14P-GP 1 KROW3
D AFTP36
AFTP23
AFTE14P-GP
AFTE14P-GP
1
1
KCOL9
KCOL10
AFTP33
AFTP32
AFTE14P-GP
AFTE14P-GP
1
1
KROW4
KROW5 D
AFTP48 AFTE14P-GP 1 KCOL11 AFTP37 AFTE14P-GP 1 KROW6
AFTP40 AFTE14P-GP 1 KCOL12 AFTP27 AFTE14P-GP 1 KROW7
AFTP44 AFTE14P-GP 1 KCOL13 AFTP38 AFTE14P-GP 1 KROW8
AFTP49 AFTE14P-GP 1 KCOL14 AFTP26 AFTE14P-GP 1 KB_LED_1 33
AFTP47 AFTE14P-GP 1 KCOL15 AFTP22 AFTE14P-GP 1 KB_LED_2 33
AFTP45 AFTE14P-GP 1 KCOL16
AFTP34 AFTE14P-GP 1 KCOL17_Q 33
AFTP35 AFTE14P-GP 1 KCOL18_Q 33

Near FAN1
5V_S0 1 AFTE14P-GP AFTP143

11 FAN_PWM_C 1 AFTE14P-GP AFTP141


11 FAN_TACH 1 AFTE14P-GP AFTP142

1 AFTE14P-GP AFTP140

Near RTC1
C RTC_BAT 1 AFTE14P-GP AFTP186 C
1 AFTE14P-GP AFTP183

Near CRT_CN1
5V_CRT_S0 1 AFTE14P-GP AFTP127

23,25 CRT_RED 1 AFTE14P-GP AFTP135


23,25 CRT_GREEN 1 AFTE14P-GP AFTP134
23,25 CRT_BLUE 1 AFTE14P-GP AFTP133

25 CRT_VSYNC1 1 AFTE14P-GP AFTP129


25 CRT_HSYNC1 1 AFTE14P-GP AFTP128

25 CLK_DDC1_5 1 AFTE14P-GP AFTP131


25 DAT_DDC1_5 1 AFTE14P-GP AFTP130

1 AFTE14P-GP AFTP124

B Near HDMI_CN1 B
5V_S0 1 AFTE14P-GP AFTP154

26 HDMI_TX0- 1 AFTE14P-GP AFTP157


26 HDMI_TX0+ 1 AFTE14P-GP AFTP155
26 HDMI_TX1- 1 AFTE14P-GP AFTP151
26 HDMI_TX1+ 1 AFTE14P-GP AFTP150
26 HDMI_TX2- 1 AFTE14P-GP AFTP146
26 HDMI_TX2+ 1 AFTE14P-GP AFTP149
26 HDMI_TXC- 1 AFTE14P-GP AFTP145
26 HDMI_TXC+ 1 AFTE14P-GP AFTP144
26 TDMS_A_CLK 1 AFTE14P-GP AFTP148
26 TDMS_A_DAT 1 AFTE14P-GP AFTP147
26 HDMI_A_HPD_CN 1 AFTE14P-GP AFTP152

1 AFTE14P-GP AFTP153

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

49_AFTE_TP
Size Document Number Rev
A3 -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 49 of 58
5 4 3 2 1
http://hobi-elektronika.net
+1.5V to FBVDD Transfer +1.05V to +1.05V_NV Transfer
AO4468, SO-8
check layout
Id=11.6A, Qg=9~12nC
Rdson=17.4~22m ohm 1D05V_S0 1D05V_S0_NV
1D5V_S3 FBVDD

+3VS to 1.8V Transfer 8 D


U20
S 1
4.3A SA 0902
8 D
U25
S 1
3.6A

D 7
6
D
D
S
S
2
3 DIS C164
7
6
D
D
S
S
2
3 D

1
5 D G 4 5 D G 4

SC10U6D3V3MX-GP
I=300mA R460 C158 C166

SCD1U16V2KX-3GP
U57 DGPU_PWROK_TO1D8V 1 2 DGPU_PWROK 19,45,51 SC10U6D3V3MX-GP DY AO4468-GP AO4468-GP

2
0R2J-2-GP DIS 84.04468.037 DIS DIS 84.04468.037

2
VIN 1 3D3V_S0_NV DIS 2nd = 84.04800.D37 2nd = 84.04800.D37

1
GND 2 1D8V_S0_NV DY
3 C573
EN
2

4 SCD1U10V2KX-4GP

2
NC#4 C576 C582
VOUT 5
SC1U10V2ZY-GP

SC1U10V2ZY-GP
1

RUN_POWER_ON 2ND = 84.00610.C31


G9091-180T11U-GP DIS DIS 84.S0610.B31
74.09091.G3F 1D8V_S0_NV = IFPA_IOVDD & IFPB_IOVDD, it Q13 NDS0610-NL-GP
DIS should be the latest ramp up rail.
1 2 RUNON_S S D RUNON_R
R643
SC 1208 0R2J-2-GP DIS
NV suggest to use 200K, need check

G
1 2DIS_EN_1D5_RUN_R
R211

1
330KR2J-L1-GP
DIS R212 R199
100KR2J-1-GP 330KR2J-L1-GP
DIS DIS

2
C DIS_EN_1D5_RUN C

D
DIS Q15
2N7002A-7-GP
19,45,51 DGPU_PWROK 1 2 DGPU_PWROK_R G 84.2N702.E31
R227 2ND = 84.2N702.D31
0R2J-2-GP

1
DIS

S
C701 SB 1016 change to 84.2N702.E31
SCD01U16V2KX-3GP

2
DIS

1028 SB add for VGA power on sequence

+3VS to 3.3V_DELAY Transfer SA 0830

VGA_CORE_S0 1D05V_S0_NV FBVDD 1D8V_S0_NV


3.3v (580mA)
3D3V_S0_NV 2

2
VDDR3discharge CKT
R434 R194 R85 R462
Q44 100R2J-2-GP 100R2J-2-GP 100R2J-2-GP 100R2J-2-GP
R461 AO3413-GP DY DY DY DY
B 470R2J-2-GP
B
1

NV_1D05V_RUNPWR 1

1
2 1 D S 3D3V_S0
DIS

NV_1D8V_RUNPWR
NV_VGA_RUNPWR

NV_FBV_RUNPWR
2

DGPU_3D3V_DIS DIS
G

R473
SB 1016 change to 84.2N702.E31 100KR2J-1-GP
D

DIS
Q43 DIS
1

2N7002A-7-GP
84.2N702.E31 G DGPU_3D3V_EN
2ND = 84.2N702.D31
1

C702 1028 SB add for 3D3V_S0 Voltage drop Q39 Q11 Q5 Q46
D

D
S

SCD01U16V2KX-3GP DY 2N7002-11-GP DY 2N7002-11-GP DY 2N7002-11-GP DY 2N7002-11-GP


2

DIS
D

DIS Q47 G DGPU_3D3V_EN G DGPU_3D3V_EN G DGPU_3D3V_EN G DGPU_3D3V_EN


2N7002A-7-GP
3D3V_S0 2 1 DGPU_PWR_EN G 84.2N702.E31
S

S
DIS 2ND = 84.2N702.D31
1

R474 C703
100KR2J-1-GP SC1U6D3V2KX-GP DY
S

SB 1016 change to 84.2N702.E31


D

DIS Q48
2N7002A-7-GP
G 84.2N702.E31 SC 1208
19 DGPU_PWR_EN#
2ND = 84.2N702.D31 NV suggest to ASM 1uF, need check
S

SB 1016 change to
A 84.2N702.E31 <Core Design> A
system turn on 3D3V_S0_NV --> VGA_CORE_S0 Wistron Corporation
DGPU_PWROK --> FBVDD, 1D05V_S0_NV, 1D8V_S0_NV 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

50_NV power
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 50 of 58
5 4 3 2 1
A3? 71.0N11M.C0U
VGA1A
http://hobi-elektronika.net
1 OF 12 1D05V_S0_NV
SA 0820
VGA_CORE_S0
3D3V_S0_NV 1/12 PCI_EXPRESS
Under GPU Near GPU
PEX_IOVDD AC9
PEX_CLKREQ# C135 C132
PEX_IOVDD AD7 Under GPU

1
is OD. AD8 C93 C94 C121 C103
PEX_IOVDD

1
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
R47 AE7 C114 C113 C127 C109 C128 C142
PEX_IOVDD

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
DY 10KR2J-3-GP AF7

2
PEX_IOVDD
AG7 DIS DIS DIS DIS DIS DIS

2
PEX_IOVDD

1
2200mA
15 PEX_CLKREQ PEX_CLKREQ AE9 AB13 DIS DIS DIS DIS DIS DIS
PEX_CLKREQ# PEX_IOVDDQ
AB16
PEX_IOVDDQ
SA 0822 PEX_IOVDDQ
AB17

D TPAD14-GP
TPAD14-GP
TP94
TP18
1
1
N11M_PEX_TSTCLK_OUT
N11M_PEX_TSTCLK_OUT#
AF10
AE10
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
AB7
AB8
AB9
1D05V_S0_NV
D
AC13
PEX_IOVDDQ
AC7
PEX_IOVDDQ
PEX_IOVDDQ
AD6 Under GPU

1
NV_RST# 1 2 PEX_RST# AD9 AE6 C140 C145 C117 C123 C141
PEX_RST# PEX_IOVDDQ

SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP
R62 0R0402-PAD-1-GP AF6 C139 C105 C110 C115
PEX_IOVDDQ

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AG6

2
PEX_IOVDDQ

2
15 CLK_PCIE_PEG AB10
PEX_REFCLK DIS DIS DIS DIS DIS DIS
15 CLK_PCIE_PEG# AC10
PEX_REFCLK# DIS DIS DIS
4 PEG_RXP[15..0] PEG_RXP0
4 PEG_RXN[15..0] DIS
1 2 C116 SCD1U10V2KX-5GP PEX_TXP0 AD10 PEX_TX0
PEG_RXN0 DIS
1 2 C119 SCD1U10V2KX-5GP PEX_TXN0 AD11
PEX_TX0#
4 PEG_TXP[15..0] PEG_TXP0 AE12
4 PEG_TXN[15..0] PEG_TXN0 PEX_RX0
AF12
PEX_RX0#
PEG_RXP1 DIS
1 2 C124 SCD1U10V2KX-5GP PEX_TXP1 AD12 J10
Near GPU
PEX_TX1 VDD

1
PEG_RXN1 DIS
1 2 C120 SCD1U10V2KX-5GP PEX_TXN1 AC12 J12 SA-0820 C130
PEX_TX1# VDD

SC4D7U10V3KX-GP
J13
PEG_TXP1 VDD VGA_CORE_S0
AG12 J9

2
PEG_TXN1 PEX_RX1 VDD
AG13 L9
PEX_RX1# VDD
M11
PEG_RXP2 VDD
DIS
1 2 C108 SCD1U10V2KX-5GP PEX_TXP2 AB11 M17 15690mA DIS
PEG_RXN2 PEX_TX2 VDD
DIS
1 2 C112 SCD1U10V2KX-5GP PEX_TXN2 AB12 PEX_TX2# VDD
M9
N11
PEG_TXP2 VDD
AF13 N12
PEG_TXN2 PEX_RX2 VDD
AE13 N13
PEX_RX2# VDD
N14
PEG_RXP3 VDD
DIS
1 2 C133 SCD1U10V2KX-5GP PEX_TXP3 AD13 N15
PEG_RXN3 PEX_TX3 VDD
DIS
1 2 C129 SCD1U10V2KX-5GP PEX_TXN3 AD14 N16
PEX_TX3# VDD
N17
PEG_TXP3 VDD
AE15 N19
PEG_TXN3 PEX_RX3 VDD
AF15 N9
PEX_RX3# VDD R77
P11
PEG_RXP4 VDD
DIS
1 2 C143 SCD1U10V2KX-5GP PEX_TXP4 AD15 P12 0R2J-2-GP
PEG_RXN4 PEX_TX4 VDD
DIS
1 2 C138 SCD1U10V2KX-5GP PEX_TXN4 AC15 PEX_TX4# VDD
P13 19,45,50 DGPU_PWROK 2 1
P14 DY
C PEG_TXP4
PEG_TXN4
AG15
AG16
PEX_RX4
PEX_RX4#
VDD
VDD
VDD
P15
P16
U19 3D3V_S0_NV
C
VDD
P17 DIS
PEG_RXP5 DIS
1 2 C134 SCD1U10V2KX-5GP PEX_TXP5 AB14 R11 19 DGPU_HOLD_RST# 1
PEG_RXN5 PEX_TX5 VDD B
DIS
1 2 C136 SCD1U10V2KX-5GP PEX_TXN5 AB15 PEX_TX5# VDD
R12
VCC
5
R13 5,18,29,31,33,35 PLT_RST# 2
PEG_TXP5 VDD A NV_RST#
AF16 R14 4
PEG_TXN5 PEX_RX5 VDD Y
AE16 R15 3
PEX_RX5# VDD GND
R16
PEG_RXP6 VDD
DIS
1 2 C144 SCD1U10V2KX-5GP PEX_TXP6 AC16 PEX_TX6 VDD
R17 74LVC1G08GW-1-GP
PEG_RXN6 DIS
1 2 C147 SCD1U10V2KX-5GP PEX_TXN6 AD16 R9 73.01G08.L04
PEX_TX6# VDD
VDD
T11 2ND = 73.7SZ08.DAH
PEG_TXP6 AE18 T17
PEG_TXN6 PEX_RX6 VDD
AF18 T9
PEX_RX6# VDD
U19
PEG_RXP7 VDD
DIS
1 2 C148 SCD1U10V2KX-5GP PEX_TXP7 AD17 U9
PEG_RXN7 PEX_TX7 VDD
DIS
1 2 C151 SCD1U10V2KX-5GP PEX_TXN7 AD18 W10
PEX_TX7# VDD
W12
PEG_TXP7 VDD
AG18 W13
PEG_TXN7 PEX_RX7 VDD
AG19 W18
PEX_RX7# VDD
W19
PEG_RXP8 VDD
DIS
1 2 C153 SCD1U10V2KX-5GP PEX_TXP8 AC18 W9
PEG_RXN8 PEX_TX8 VDD
DIS
1 2 C152 SCD1U10V2KX-5GP PEX_TXN8 AB18
PEX_TX8#
PEG_TXP8 AF19
PEG_TXN8 PEX_RX8 TP77 TP21 TPAD14-GP
AE19 W15 1
PEX_RX8# VDD_SENSE TP78 TP20 TPAD14-GP
W16 1
PEG_RXP9 GND_SENSE
DIS
1 2 C156 SCD1U10V2KX-5GP PEX_TXP9 AB19
PEG_RXN9 PEX_TX9
DIS
1 2 C157 SCD1U10V2KX-5GP PEX_TXN9 AB20 E15 TP79 1 TP22 TPAD14-GP
PEX_TX9# VDD_SENSE TP80 TP19 TPAD14-GP 3D3V_S0_NV
E14 1
PEG_TXP9 GND_SENSE
AE21
PEG_TXN9 PEX_RX9
AF21 A12
PEX_RX9# VDD33
B12
VDD33

1
PEG_RXP10 DIS
1 2 C154 SCD1U10V2KX-5GP PEX_TXP10AD19 C12 120mA SA 0824 C118 C102 C122
PEX_TX10 VDD33

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
PEG_RXN10 DIS
1 2 C155 SCD1U10V2KX-5GP PEX_TXN10AD20 D12
PEX_TX10# VDD33
E12

2
PEG_TXP10 VDD33 Uner GPU
AG21
PEX_RX10 VDD33
F12 DIS DIS DIS
PEG_TXN10 AG22
PEX_RX10#

B PEG_RXP11
PEG_RXN11
DIS
1
DIS
1
2 C159 SCD1U10V2KX-5GP PEX_TXP11AD21
2 C162 SCD1U10V2KX-5GP PEX_TXN11AC21
PEX_TX11
PEX_TX11#
AG9
3D3V_S0_NV
B
PEX_SVDD_3V3
SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
PEG_TXP11 AF22
PEX_RX11
1

1
PEG_TXN11 AE22 120mA C96 C126
PEX_RX11#
PEG_RXP12 DIS
1 2 C172 SCD1U10V2KX-5GP PEX_TXP12AB21 Uner Near
2

2
PEG_RXN12 PEX_TX12
DIS
1 2 C173 SCD1U10V2KX-5GP PEX_TXN12AB22 GPU DIS DIS GPU
PEX_TX12#
PEG_TXP12 AE24 Near GPU
PEG_TXN12 PEX_RX12
AF24
PEX_RX12# 1D05V_S0_NV
PEG_RXP13 DIS
1 2 C163 SCD1U10V2KX-5GP PEX_TXP13AC22 L5 DIS
PEG_RXN13 PEX_TX13
DIS
1 2 C167 SCD1U10V2KX-5GP PEX_TXN13AD22 AF9 PEX_PLLVDD 1 2
PEX_TX13# PEX_PLLVDD HCB1608KF-181-GP
PEG_TXP13 AG24 120mA 68.00214.051
PEX_RX13
1

1
PEG_TXN13 AF25 C104 C106 C111
PEX_RX13#
SC1U6D3V2KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
PEG_RXP14 DIS
1 2 C168 SCD1U10V2KX-5GP PEX_TXP14AD23
2

2
PEG_RXN14 PEX_TX14
DIS
1 2 C169 SCD1U10V2KX-5GP PEX_TXN14AD24 DIS DIS DIS
PEX_TX14#
PEG_TXP14 AG25
PEG_TXN14 PEX_RX14
AG26
PEX_RX14#
PEG_RXP15 DIS
1 2 C170 SCD1U10V2KX-5GP PEX_TXP15AE25
PEG_RXN15 PEX_TX15
DIS
1 2 C171 SCD1U10V2KX-5GP PEX_TXN15AE26
PEX_TX15#
PEG_TXP15 AF27 AG10 PEX_TERMP
PEG_TXN15 PEX_RX15 PEX_TERMP
AE27
PEX_RX15#
1

R81
N11M-GE1-S-A2-GP 2K49R2F-GP
DIS DIS
2

A A
<Core Design>

Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

51_N11M(1/6)_PEG
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 51 of 58
5 4 3 2 1
VGA1B
2/12 FRAME_BUFFER
2 OF 12 http://hobi-elektronika.net
57 FBAD[0..31] FBVDD
FBAD0 D22 1.72A
FBAD1 FBA_D0
E24 FBA_D1 FBVDDQ A13
FBAD2 E22 B13
FBA_D2 FBVDDQ

1
FBAD3 D24 C13 C564 C160 C125 C137 C150 C563 C161
FBA_D3 FBVDDQ

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP

SC4D7U6D3V3KX-GP
FBAD4 D26 D13
FBAD5 FBA_D4 FBVDDQ
D27 D14

2
FBAD6 FBA_D5 FBVDDQ
C27 FBA_D6 FBVDDQ E13
FBAD7 B27 F13
FBAD8 FBA_D7 FBVDDQ
A21 F14
FBAD9 FBA_D8 FBVDDQ
B21
FBA_D9 FBVDDQ
F15 DIS DIS DIS DIS DIS DIS DIS
FBAD10
D FBAD11
FBAD12
C21
C19
C18
FBA_D10
FBA_D11
FBA_D12
FBVDDQ
FBVDDQ
FBVDDQ
F16
F17
F19
D
FBAD13 D18 F22
FBAD14 FBA_D13 FBVDDQ
B18 H23
FBAD15 FBA_D14 FBVDDQ
C16 H26
FBAD16 FBA_D15 FBVDDQ
E21 J15
FBAD17 FBA_D16 FBVDDQ
F21 J16
FBAD18 FBA_D17 FBVDDQ
D20 J18
FBAD19 FBA_D18 FBVDDQ
F20 J19
FBAD20 FBA_D19 FBVDDQ
D17 L19
FBAD21 FBA_D20 FBVDDQ
F18 L23
FBAD22 FBA_D21 FBVDDQ
D16 L26
FBAD23 FBA_D22 FBVDDQ
E16 M19
FBAD24 FBA_D23 FBVDDQ
A22 N22
FBAD25 FBA_D24 FBVDDQ
C24 U22
FBAD26 FBA_D25 FBVDDQ
D21 Y22
FBAD27 FBA_D26 FBVDDQ
B22
FBAD28 FBA_D27
C22
FBAD29 FBA_D28
A25
FBAD30 FBA_D29
B25
FBAD31 FBA_D30
58 FBAD[32..63] A26
FBAD32 FBA_D31
U24
FBAD33 FBA_D32
V24
FBAD34 FBA_D33
V23
FBAD35 FBA_D34
R24
FBAD36 FBA_D35
T23
FBA_D36 FBA_CMD0
F26 FBA_CMD_0 57 SA 0916 SWAP
FBAD37 R23 J24 FBA_CMD_1 57,58
FBAD38 FBA_D37 FBA_CMD1 RN18
P24 F25 FBA_CMD_2 57
FBAD39 FBA_D38 FBA_CMD2 FBA_CMD_16
P22 M23 FBA_CMD_3 57,58 4 5
FBAD40 FBA_D39 FBA_CMD3 FBA_CMD_28
AC24 N27 FBA_CMD_4 57,58 3 6
FBAD41 FBA_D40 FBA_CMD4 FBA_CMD_0
AB23 M27 FBA_CMD_5 57,58 2 7
FBAD42 FBA_D41 FBA_CMD5 FBA_CMD_25
AB24 K26 FBA_CMD_6 57,58 1 8
FBAD43 FBA_D42 FBA_CMD6
W24 J25 FBA_CMD_7 57,58
FBAD44 FBA_D43 FBA_CMD7 SRN10KJ-6-GP
AA22 J27 FBA_CMD_8 57,58
FBAD45 FBA_D44 FBA_CMD8
W23
FBA_D45 FBA_CMD9
G23 FBA_CMD_9 57,58 DIS
FBAD46 W22 G26 FBA_CMD_10 57,58
FBAD47 FBA_D46 FBA_CMD10 FBA_CMD_27
V22 J23 FBA_CMD_11 58 1 2
FBAD48 FBA_D47 FBA_CMD11
AA25 M25 FBA_CMD_12 57,58
FBAD49 FBA_D48 FBA_CMD12 R84 10KR2J-3-GP
W27 K27
C FBAD50
FBAD51
FBAD52
W26
W25
FBA_D49
FBA_D50
FBA_D51
FBA_CMD13
FBA_CMD14
FBA_CMD15
G25
L24 FBA_CMD_151
FBA_CMD_13 57,58
FBA_CMD_14 57,58
TP24 TPAD14-GP
DIS C
AB25 K23 FBA_CMD_16 58
FBAD53 FBA_D52 FBA_CMD16
AB26 K24 FBA_CMD_17 57,58
FBAD54 FBA_D53 FBA_CMD17
AD26 G22 FBA_CMD_18 57,58
FBAD55 FBA_D54 FBA_CMD18
AD27 K25 FBA_CMD_19 57,58
FBAD56 FBA_D55 FBA_CMD19
V25 H22 FBA_CMD_20 57,58
FBAD57 FBA_D56 FBA_CMD20
R25 M26 FBA_CMD_21 57,58
FBAD58 FBA_D57 FBA_CMD21
V26 H24 FBA_CMD_22 57,58
FBAD59 FBA_D58 FBA_CMD22 FBA_CMD_231 TP25 TPAD14-GP
V27 F27
FBAD60 FBA_D59 FBA_CMD23
R26 J26 FBA_CMD_24 57,58
FBAD61 FBA_D60 FBA_CMD24
T25 G24 FBA_CMD_25 57
FBAD62 FBA_D61 FBA_CMD25
N25 G27 FBA_CMD_26 57,58
FBAD63 FBA_D62 FBA_CMD26
N26 M24 FBA_CMD_27 58
FBA_D63 FBA_CMD27
K22 FBA_CMD_28 57,58
FBA_CMD28
J22 FBA_CMD_29 57,58
FBA_CMD29
C26 L22 FBA_CMD_30 57,58
57 FBADQM0 FBA_DQM0 FBA_CMD30
B19
57 FBADQM1 FBA_DQM1
D19
57 FBADQM2 FBA_DQM2
D23
57 FBADQM3 FBA_DQM3 FBA_CLK0
T24 F24 FBA_CLK0 57
58 FBADQM4 FBA_DQM4 FBA_CLK0 FBA_CLK0# FBA_CLK0 and FBA_CLK0_N —+ FBA_D[31:0]
AA23 F23 FBA_CLK0# 57
58 FBADQM5 FBA_DQM5 FBA_CLK0# FBA_CLK1 FBA_CLK1 and FBA_CLK1_N —* FBA_D[63:32]
AB27 N24 FBA_CLK1 58
58 FBADQM6 FBA_DQM6 FBA_CLK1 FBA_CLK1#
T26 N23 FBA_CLK1# 58
58 FBADQM7 FBA_DQM7 FBA_CLK1#

C25
57 FBADQSP0 FBA_DQS_WP0 FBA_DEBUG TP23 TPAD14-GP
A19 M22 1
57 FBADQSP1 FBA_DQS_WP1 FBA_DEBUG/CAS2
E19
57 FBADQSP2 FBA_DQS_WP2
A24
57 FBADQSP3 FBA_DQS_WP3
T22
58 FBADQSP4 FBA_DQS_WP4
AA24
58 FBADQSP5 FBA_DQS_WP5
AA26
58 FBADQSP6 FBA_DQS_WP6
T27
58 FBADQSP7 FBA_DQS_WP7

D25
57 FBADQSN0 FBA_DQS_RN0
A18
57 FBADQSN1 FBA_DQS_RN1
E18
57 FBADQSN2 FBA_DQS_RN2
B 57
58
FBADQSN3
FBADQSN4
B24
R22
Y24
FBA_DQS_RN3
FBA_DQS_RN4
B
58 FBADQSN5 FBA_DQS_RN5
AA27
58 FBADQSN6 FBA_DQS_RN6
R27
58 FBADQSN7 FBA_DQS_RN7 FBVDD

B15 FBCAL_PD_VDDQ 1 2
FB_CAL_PD_VDDQ RT1 40D2R2F-GP To compute the drive strength of
DIS
A15 FBCAL_PU_GND 1 2 the frame buffer pads.
FB_CAL_PU_GND RT2 40D2R2F-GP
DIS
B16 FBCAL_TERM_GND 1 2
FB_CAL_TERM_GND R452 DIS 60D4R2F-GP CHECK
Termination Calibration
R580
N10M use 60.4 ohm 64.60R45.6DL
N10P use 40.2 ohm 64.40R25.6DL
1D05V_S0_NV

R19 FB_PLLAVDD 1 DIS 2


FB_PLLAVDD
CHECK FCM1608KF-221T05-GP
TPAD14-GP TP95 1 FB_VREF A16 T19 L7 68.00217.741
FB_VREF FB_DLLAVDD
1

C146 C149
SC1U6D3V2KX-GP

SC4D7U6D3V3KX-GP

input AC19
FB_PLLAVDD
2

100mA
16~12mils
N11M-GE1-S-A2-GP
DIS DIS DIS

A A
<Core Design>

Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

52_N11M(2/6)_MEM
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 52 of 58
5 4 3 2 1
http://hobi-elektronika.net
VGA1C
3/12 DACA
3 OF 12

3D3V_S0_NV
L3
1 2 120mA DACA_VDD AG2
FCM1608KF-221T05-GP DACA_VDD

1
68.00217.741 C74 C80 C77 C78 C79 C76 C75 DACA_VREF AF1 AD2 3.3V
DACA_VREF DACA_HSYNC NV_CRT_HSYNC 25

SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC4700P50V2KX-1GP

SC470P50V2KX-3GP
DIS DACA_VSYNC AD1 NV_CRT_VSYNC 25

1
C71 DACA_RSET AE1
D D

2
DACA_RSET

SCD1U10V2KX-5GP
AE2 NV_CRT_RED 23

2
DACA_RED

1
DIS DIS DIS DIS DIS DIS DIS R51
124R2F-U-GP AE3 NV_CRT_GREEN 23
DACA_GREEN
DIS DIS
Set Reference AD3
Current DACA_BLUE NV_CRT_BLUE 23

1
N11M-GE1-S-A2-GP R50 R49 R48
DIS 150R2F-1-GP 150R2F-1-GP 150R2F-1-GP
DIS DIS DIS

2
VGA1D 4 OF 12
4/12 DACB

C DACB_VDD
C
W5 DACB_VDD

1
R6 DACB_VREF DACB_HSYNC U6
R68 U4
10KR2J-3-GP DACB_VSYNC
V6 DACB_RSET
DIS
T5

2
DACB_RED

DACB_GREEN T4

DACB_BLUE R4

N11M-GE1-S-A2-GP
DIS

B B

<Core Design>

A Wistron Corporation A
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

53_N11M(3/6)_DAC
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 53 of 58

5 4 3 2 1
5 4 3 2 1
VGA1E
5/12 IFPAB
LVDS
http://hobi-elektronika.net
5 OF 12

V4 GPU_TXAOUT0- 23
VGA1G
Display Port
7/12 IFPD
7 OF 12

IFPA_TXD0#
IFPA_TXD0 V5 GPU_TXAOUT0+ 23
220mA IFPCD_PLLVDD N6
IFPD_RSET IFPD_PLLVDD
M6 IFPD_RSET
1D05V_S0_NV AA4
IFPA_TXD1# GPU_TXAOUT1- 23

1
L6 AA5 GPU_TXAOUT1+ 23
220mA IFPAB_PLLVDD IFPA_TXD1 R67
1 2 AD5 IFPAB_PLLVDD
BLM18PG181SN1D-GP IFPAB_RSET AB6 IFPAB_RSET
A DIS 1KR2F-3-GP

1
68.00143.061 C97 C90 Y4 GPU_TXAOUT2- 23
IFPA_TXD2#

1
SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP
DIS W4 GPU_TXAOUT2+ 23 D4

2
R69 IFPA_TXD2 Set Reference IFPD_AUX_I2CX_SDA#
D3

2
1KR2F-3-GP Current IFPD_AUX_I2CX_SCL
DY
D DIS DIS Set Reference IFPA_TXD3# AB5
AB4
TXAOUT3-
TXAOUT3+
1
1
TP12
TP10
TPAD14-GP
TPAD14-GP B4 D

2
Current IFPA_TXD3 IFPD_L3#
IFPD_L3 B3
DATA
V1 GPU_TXBOUT0- 1 TP85 TPAD14-GP C4
IFPB_TXD4# GPU_TXBOUT0+ 1 TP84 TPAD14-GP IFPD_L2#
IFPB_TXD4 W1 IFPD_L2 C3

IFPD_L1# D5
W2 GPU_TXBOUT1- 1 TP110 TPAD14-GP E4
IFPB_TXD5# GPU_TXBOUT1+ 1 TP7 TPAD14-GP IFPD_L1
IFPB_TXD5 W3
1D8V_S0_NV F4
IFPD_L0#
L22 B IFPD_L0 F5
1 2 IFPAB_IOVDD 150mA V3 AA3 GPU_TXBOUT2- 1 TP6 TPAD14-GP SB 1015 change TP
BLM18PG181SN1D-GP IFPA_IOVDD IFPB_TXD6# GPU_TXBOUT2+ 1 TP111 TPAD14-GP
IFPB_TXD6 AA2
1

68.00143.061 C575 C553 C555 1


C551 V2 IFPB_IOVDD GPIO19 F2
SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
DIS 150mA
AA1 TXBOUT3- 1 TP83 TPAD14-GP
2

IFPB_TXD7# TXBOUT3+ TP82 TPAD14-GP N11M-GE1-S-A2-GP


IFPB_TXD7 AB1 1
DIS
DIS DIS DIS DIS
IFPA_TXC# AD4 GPU_TXACLK- 23
A IFPA_TXC AC4 GPU_TXACLK+ 23
CLOCK Display Port
AB2 GPU_TXBCLK- 1 TP5 TPAD14-GP VGA1H 8 OF 12
IFPB_TXC#
B IFPB_TXC AB3 GPU_TXBCLK+ 1 TP9 TPAD14-GP 8/12 IFPE

N1 IFPEF_PLLVDD D7
IFPAB_HPD GPIO0 IFPE_PLLVDD
F8 IFPE_RSET

1
N11M-GE1-S-A2-GP R65
DIS DIS 10KR2J-3-GP

C Set Reference
C

2
Current G6
IFPE_AUX_I2CY_SDA#
IFPE_AUX_I2CY_SCL F7
Display Port
VGA1F 6 OF 12
3D3V_S0_NV 6/12 IFPC E7
IFPE_L3#
IFPE_L3 E6
L21
1 2 220mA IFPCD_PLLVDD P6 B7
FCM1608KFG-301T05-GP IFPC_RSET IFPC_PLLVDD IFPE_L2#
R5 IFPC_RSET IFPE_L2 B6
1

68.00217.351 C549 C550 C101 C552 C554


1
SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DIS IFPE_L1# A7
R72 A6
2

1KR2F-3-GP IFPE_L1
DIS
IFPE_L0# C6
DIS DIS DIS DIS DIS Set Reference G5 NV_HDMI_DATA D6
NV_HDMI_DATA 26
2

Current IFPC_AUX_I2CW_SDA# NV_HDMI_CLK IFPE_L0


IFPC_AUX_I2CW_SCL G4 NV_HDMI_CLK 26
IFPEF_IOVDD H6 F3
IFPC_L3# NV_HDMI_CLK- IFPE_IOVDD GPIO15
IFPC_L3# J4 1 2 NV_HDMI_CLK- 26

1
H4 IFPC_L3 DIS C62 1 SCD1U10V2KX-5GP
2 NV_HDMI_CLK+ NV_HDMI_CLK+ 26
IFPC_L3
DIS C61 SCD1U10V2KX-5GP R71 N11M-GE1-S-A2-GP
1D05V_S0_NV K4 IFPC_L2# 1 2 NV_HDMI_DATA0- 10KR2J-3-GP DIS
IFPC_L2# NV_HDMI_DATA0- 26
L4 L4 IFPC_L2 DIS C63 1 SCD1U10V2KX-5GP
2 NV_HDMI_DATA0+ DIS
IFPC_L2 NV_HDMI_DATA0+ 26
1 2 285mA IFPCD_IOVDD J6 DIS C64 SCD1U10V2KX-5GP

2
FCM1608KF-221T05-GP IFPC_IOVDD IFPC_L1# NV_HDMI_DATA1-
IFPC_L1# M4 1 2 NV_HDMI_DATA1- 26
1

68.00217.741 C91 C92 C98 C95 M5 IFPC_L1 DIS C66 1 SCD1U10V2KX-5GP


2 NV_HDMI_DATA1+ NV_HDMI_DATA1+ 26
IFPC_L1
SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DIS DIS C65 SCD1U10V2KX-5GP


N4 IFPC_L0# 1 2 NV_HDMI_DATA2-
NV_HDMI_DATA2- 26
2

IFPC_L0# IFPC_L0 NV_HDMI_DATA2+


IFPC_L0 P4 DIS C67 1 SCD1U10V2KX-5GP
2 NV_HDMI_DATA2+ 26
DIS C68 SCD1U10V2KX-5GP
DIS DIS DIS DIS
G1 NV_HDMI_DETECT NV_HDMI_DETECT 26,33
GPIO1

B N11M-GE1-S-A2-GP
DIS
B
SA 0916 SWAP

SA 0825 Add
RN60
NV_HDMI_DATA0+ 1 8 NV_HDMI_R
NV_HDMI_DATA0- 2 7
NV_HDMI_CLK- 3 6
NV_HDMI_CLK+ 4 5
DIS
3D3V_S0_NV SRN499F-GP

RN11
NV_HDMI_DATA1+ 1 8
4
3

NV_HDMI_DATA1- 2 7
RN12 NV_HDMI_DATA2- 3 6 3D3V_S0_NV
SRN4K7J-8-GP NV_HDMI_DATA2+ 4 5
DIS DIS

1
SRN499F-GP
R435
D
1
2

NV_HDMI_DETECT NV_HDMI_DATA 0R2J-2-GP


NV_HDMI_CLK Q40 DIS DIS
1

2N7002A-7-GP
2
1
1

R438 84.2N702.E31 G
100KR2J-1-GP R55 R56 2ND = 84.2N702.D31
DIS 100KR2J-1-GP 100KR2J-1-GP
DY DY
S
2

SB 1016 change to 84.2N702.E31


2
2

A Direct HDMI Connection


<Core Design>
A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

54_N11M(4/6)_IFP
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 54 of 58

5 4 3 2 1
5 4 3 2 1
VGA1I
9/12 I2C_GPIO_THERM_JTAG
9 OF 12 http://hobi-elektronika.net 3D3V_S0_NV

1
D8 R1 NV_CRT_DDCCLK NV_CRT_DDCCLK 25 R446 DIS
THERMDN I2CA_SCL NV_CRT_DDCDATA VGA1K 10 OF 12 10KR2J-3-GP
T3 NV_CRT_DDCDATA 25
input I2CA_SDA VGA I2C-Compatible
D9 10/12 MISC
THERMDP NV_I2CB_SCL
R2

2
JTAG_TCK I2CB_SCL NV_I2CB_SDA
TPAD14-GP TP11 1 AF3 R3 B10 GPU_ROM_CS#
TPAD14-GP TP92 JTAG_TMS JTAG_TCK I2CB_SDA STRAP0 ROM_CS#
1 AF4 C7
TPAD14-GP TP90 JTAG_TDI JTAG_TMS NV_LCD_EDID_CLK STRAP1 STRAP0
1 AG4 A2 NV_LCD_EDID_CLK 23 B9 A10 GPU_ROM_SI
TPAD14-GP TP93 JTAG_TDO JTAG_TDI I2CC_SCL NV_LCD_EDID_DAT STRAP2 STRAP1 ROM_SI
1 AE4 B1 NV_LCD_EDID_DAT 23 A9 C10 GPU_ROM_SO
TPAD14-GP TP8 JTAG_TRST# JTAG_TDO I2CC_SDA STRAP2 ROM_SO
1 AG3 C9 GPU_ROM_SCLK
JTAG_TRST# All Other ROM_SCLK

1
SA 0904 Set reference current

D R58
10KR2J-3-GP
DIS
R57
10KR2J-3-GP
DIS SA 0916 SWAP
3D3V_S0_NV
for multilevel straps
STRAP_3V3 F11
MULTI_STRAP_REF0_GND
I2CH_SCL
I2CH_SDA
A3
A4
HDCP_CLK
HDCP_SDA
Pull up? SDA
1
1 TP89
TP91
TPAD14-GP
TPAD14-GP
D
RN13 STRAP_MIOB F10 is input
2

2 NV_CRT_DDCDATA MULTI_STRAP_REF1_GND
2 3
Debug pin NV_CRT_DDCCLK 1 4 N5
BUFRST#

1
SA 0826
SMBC_Therm_NV T1 C1 NV_LCD_BL_PWM 1 TP81 TPAD14-GP SRN2K2J-1-GP R78 R76
SMBD_Therm_NV I2CS_SCL GPIO2 40K2R2F-GP 40K2R2F-GP
T2
I2CS_SDA GPIO3
M2 NV_LCDVDD_ON 24 DIS
CHECK M3 NV_BLON_IN 23 DIS DIS
Thermal GPIO4 NVVDD_ALTV0
K3 NVVDD_ALTV0 45 N2

2
GPIO5 NVVDD_ALTV1 3D3V_S0_NV NC#N2
K2 NVVDD_ALTV1 45
GPIO6 SA 0916 SWAP
J2
GPIO7 NV_GPIO8 OVERT RN16 PEX_TESTMODE
C2 F9 AD25
GPIO8 NV_GPIO9 ALERT NV_I2CB_SDA NC#F9 TESTMODE
M1 2 3
GPIO9

1
D2 NV_MEM_VREF 1 TP79 TPAD14-GP NV_I2CB_SCL 1 4 F6
GPIO10 GND R458
D1
GPIO11 NV_PWR_LEVEL TP87 TPAD14-GP SRN2K2J-1-GP 10KR2J-3-GP
J3 1 AC6
SA 0822 GPIO12 GND
GPIO13
J1 DIS DIS
K1 NV_PWR_CTRL1 1 TP86 TPAD14-GP N11M-GE1-S-A2-GP

2
TPAD14-GP TP16 N11M_DBG_DATA0 GPIO14 3D3V_S0_NV
1 T6
DBG_DATA0 DIS
TPAD14-GP TP14 1 N11M_DBG_DATA1 W6 G3 NV_FAN_PWM 1 TP80 TPAD14-GP
TPAD14-GP TP13 N11M_DBG_DATA2 DBG_DATA1 GPIO16 RN59
1 Y6 G2
TPAD14-GP TP15 N11M_DBG_DATA3 DBG_DATA2 GPIO17 SA 0826 NV_LCD_EDID_CLK
1 AA6 F1 2 3
TPAD14-GP TP88 N11M_DBG_DATA4 DBG_DATA3 GPIO18 NV_LCD_EDID_DAT
1 N3 1 4
DBG_DATA4
Debug pin SRN2K2J-1-GP
N11M-GE1-S-A2-GP DIS
DIS

R437 DIS 1D05V_S0_NV DIS VGA1L 11 OF 12


NV_GPIO8 2 1 3D3V_S0_NV L2 11/12 XTAL_PLL

C 10KR2J-3-GP
R436
1 2
BLM18PG181SN1D-GP
VIO_PLLVDD 60mA
K5 C

1
NV_GPIO9 C69 C72 C99 C73 PLLVDD
1 2 68.00143.061

SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
10KR2J-3-GP DIS K6
45mA VID_PLLVDD

2
L6
1D05V_S0_NV SP_PLLVDD
DIS DIS DIS DIS DIS
3D3V_S0_NV L1 45mA
1 2 SP_PLLVDD
BLM18PG181SN1D-GP

1
68.00143.061 C59 C100 XTALSSIN D11 E9 XTALOUTBUFF 1 TP17 TPAD14-GP
XTAL_SSIN XTAL_OUTBUFF

SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP
3 OSC_SPREAD 1 2
4
3

1
2

1
RN58 R83 D10 E10 R74
SRN4K7J-8-GP 0R2J-2-GP R82 XTAL_IN XTAL_OUT 10KR2J-3-GP
DIS DIS
DIS DY 10KR2J-3-GP N11M-GE1-S-A2-GP DIS
DIS DIS

2
DIS Q4 when not use if not use, pull down
1
2

2
SMBC_Therm_NV 1 6 spectrum, pull down
SMBC_Therm 11,33,34
2 5
3 VGA_XIN1 1 2 XTALIN XTALOUT
SMBD_Therm 11,33,34
3 4

1
R75
DMN66D0LDW-7-GP 0R2J-2-GP R80
SMBD_Therm_NV 84.DMN66.03F DY 39R2J-L-GP DIS
2ND = 84.27002.F3F

2
1 2
SB 1015 change to 84.DMN66.03F R79 DY 1MR2J-L2-GP

X1 XTALOUT_27
1 2

XTAL-27MHZ-62-GP-U

1
82.30034.501
C107 2ND = 82.30034.831 C131
DeviceID
B STRAP0 USER[0]=1 GPU_ROM_SI for Hynix VRAM for Samsung VRAM Logical Strap Bit Mapping SC12P50V2JN-3GP DIS SC15P50V2JN-2-GP
B

2
USER[1]=1 N11P-LM1(0x0A2B) ? RAM_CFG[0]=0 RAM_CFG[0]=1 Resistor Pull-up Pull-down DIS DIS
USER[2]=1 RAM_CFG[1]=1 RAM_CFG[1]=1 5Kohms 1000 0000
USER[3]=1 N11M-GE1(0x0A75) 1-0101 RAM_CFG[2]=0 RAM_CFG[2]=0 10Kohms 1001 0001 -1 0126 BOM CHANGE
RAM_CFG[3]=0 RAM_CFG[3]=0 15Kohms 1010 0010
20Kohms 1011 0011
25Kohms 1100 0100
30Kohms 1101 0101
STRAP1 3GIO_PADCFG[0]=0 GPU_ROM_SO VGA_DEVICE =1 35Kohms 1110 0110
3GIO_PADCFG[1]=1 SMB_ALT_ADDR =0 45Kohms 1111 0111
3GIO_PADCFG[2]=1 FB_0_BAR_SIZE =0
3GIO_PADCFG[3]=1 XCLK_417 =0

N11M-LP1 N11M-GE1
STRAP2 PCI_DEVID[0]=1 [0] 1 1 GPU_ROM_SCLK PEX_PLL_EN_TERM =0
PCI_DEVID[1]=0 [1] 1 0 SLOT_CLK_CFG =1
PCI_DEVID[2]=1 [2] 0 1 SUB_VENDOR =0 N11M-LP1 N11M-GE1
PCI_DEVID[3]=0 [3] 1 0 PCI_DEVID[4] =1 [4] 0 1

STRAP0 GPU_ROM_SI
STRAP1 GPU_ROM_SO
STRAP2 GPU_ROM_SCLK

3D3V_S0_NV 1 2 R445 1 2 3D3V_S0_NV 1 2 R61 1 2 R60


DY 30KR2F-GP DIS R444 30KR2F-GP DIS 15KR2F-GP DY 15KR2F-GP TABLE
R441
KENDO VIDEO MEMORY
1 2 2 1 2 1 R70 1 2 R73
DIS 34K8R2F-1-GP DY R442 34K8R2F-1-GP DY 10KR2F-2-GP DIS 10KR2F-2-GP SAMSUNG HYNIX
A 1
DIS
2 R440
45K3R2F-L-GP DY
1 2
R439 2KR2J-1-GP
1
DY
2 R447
2KR2J-1-GP
1 2 R448
DIS_S_H 20KR2F-L-GP
0011
20KOHM
0010
15KOHM
A
R448 64.20025.6DL 64.15025.6DL <Core Design>

Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

55_N11M(5/6)_STRAP/ GPIO
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Wednesday, January 27, 2010 Sheet 55 of 58

5 4 3 2 1
5 4 3 2 1
VGA1J 12 OF 12
http://hobi-elektronika.net
12/12 GND_NC

AC11 GND NC#C15 C15


AC14 GND NC#D15 D15
AC17 GND NC#J5 J5
AC2 GND
AC20 GND
AC23 GND
AC26 GND
D AC5
AC8
GND
GND
D
AF11 GND
AF14 GND
AF17 GND
AF2 GND
AF20 GND
AF23 GND
AF26 GND
AF5 GND
AF8 GND
B11 GND
B14 GND
B17 GND
B2 GND
B20 GND
B23 GND
B26 GND
B5 GND
B8 GND
E11 GND
E17 GND
E2 GND
E20 GND
E23 GND
E26 GND
E5 GND
E8 GND
C H2
H5
GND
GND
C
J11 GND
J14 GND
J17 GND
K19 GND
K9 GND
L11 GND
L12 GND
L13 GND
L14 GND
L15 GND
L16 GND
L17 GND
L2 GND
L5 GND
M12 GND
M13 GND
M14 GND
M15 GND
M16 GND
P19 GND
P2 GND
P23 GND
P26 GND
P5 GND
P9 GND
T12
B T13
T14
GND
GND B
GND
T15 GND
T16 GND
U11 GND
U12 GND
U13 GND
U14 GND
U15 GND
U16 GND
U17 GND
U2 GND
U23 GND
U26 GND
U5 GND
V19 GND
V9 GND
W11 GND
W14 GND
W17 GND
Y2 GND
Y23 GND
Y26 GND
Y5 GND

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
N11M-GE1-S-A2-GP Taipei Hsien 221, Taiwan, R.O.C
DIS
Title

56_N11M(6/6)_GND
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 56 of 58
5 4 3 2 1
Mode
http://hobi-elektronika.net
C Command Mapping
SA 0908: layout swap SA 0908: layout swap
FBVDD FBRAM1 FBRAM2
FBAD[0..31] 52 FBVDD FBAD[0..31] 52 FBVDD
K8 E3 FBAD27 K8 E3 FBAD1
VDD DQL0 FBAD29 VDD DQL0 FBAD7
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 FBAD26 N1 F2 FBAD0
D VDD DQL2 VDD DQL2

1
R9 F8 FBAD24 R9 F8 FBAD6 C165
VDD DQL3 FBAD25 VDD DQL3 FBAD3 SC4D7U6D3V3KX-GP
B2 VDD DQL4 H3 B2 VDD DQL4 H3
D9 H8 FBAD30 D9 H8 FBAD4 DIS

2
VDD DQL5 FBAD28 VDD DQL5 FBAD2
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 FBAD31 R1 H7 FBAD5
FBVDD VDD DQL7 FBVDD VDD DQL7
N9 VDD N9 VDD
D7 FBAD12 D7 FBAD19
DQU0 FBAD11 DQU0 FBAD22
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 FBAD15 A1 C8 FBAD17
VDDQ DQU2 VDDQ DQU2

1
C1 C2 FBAD10 C1 C2 FBAD23 C581 C595 C178 C572 C181 C578 C574 C579
VDDQ DQU3 VDDQ DQU3

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
C9 A7 FBAD13 C9 A7 FBAD16
VDDQ DQU4 FBAD8 VDDQ DQU4 FBAD20
D2 A2 D2 A2

2
VDDQ DQU5 FBAD14 VDDQ DQU5 FBAD18
E9 VDDQ DQU6 B8 E9 VDDQ DQU6 B8
F1 A3 FBAD9 F1 A3 FBAD21 DIS DIS DIS DIS DIS DIS DIS DIS
VDDQ DQU7 VDDQ DQU7
DIS H9 VDDQ H9 VDDQ
C189 H2 C7 FBADQSP1 52 H2 C7 FBADQSP2 52
SCD01U50V2KX-1GP VDDQ DQSU VDDQ DQSU
DQSU# B7 FBADQSN1 52 DQSU# B7 FBADQSN2 52
2 1 FBA_VREF12 H1 VREFDQ
FBA_VREF12 H1 VREFDQ
M8 VREFCA DQSL F3 FBADQSP3 52 M8 VREFCA DQSL F3 FBADQSP0 52
2 1 FBA_ZQ0 L8 G3 FBADQSN3 52 2 1FBA_ZQ1 L8 G3 FBADQSN0 52
R467 ZQ DQSL# R87 243R2F-2-GP ZQ DQSL#
DIS

1
DIS 243R2F-2-GP K1 FBA_CMD_25 FBA_CMD_25 52 K1 FBA_CMD_25 FBA_CMD_25 52 C583 C176 C193 C198 C589 C596 C192 C179
ODT ODT

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
52,58 FBA_CMD_7 FBA_CMD_7 N3 52,58 FBA_CMD_7 FBA_CMD_7 N3
FBA_CMD_20 A0 FBA_CMD_20 A0
52,58 FBA_CMD_20 P7 52,58 FBA_CMD_20 P7

2
FBA_CMD_4 A1 FBA_CMD_2 FBA_CMD_4 A1 FBA_CMD_2
52,58 FBA_CMD_4 P3 A2 CS# L2 FBA_CMD_2 52 52,58 FBA_CMD_4 P3 A2 CS# L2 FBA_CMD_2 52
52,58 FBA_CMD_14 FBA_CMD_14 N2 T2 FBA_CMD_28 FBA_CMD_28 52,58 52,58 FBA_CMD_14 FBA_CMD_14 N2 T2 FBA_CMD_28 FBA_CMD_28 52,58 DIS DIS DIS DIS DIS DIS DIS DIS
FBA_CMD_17 A3 RESET# FBA_CMD_17 A3 RESET#
52,58 FBA_CMD_17 P8 A4 52,58 FBA_CMD_17 P8 A4
52,58 FBA_CMD_6 FBA_CMD_6 P2 52,58 FBA_CMD_6 FBA_CMD_6 P2
A5 A5
C 52,58
52,58
FBA_CMD_26
FBA_CMD_3
FBA_CMD_26
FBA_CMD_3
FBA_CMD_1
R8
R2
A6
A7
NC#T7
NC#L9
T7
L9
FBA_CMD_29 FBA_CMD_29 52,58 52,58
52,58
FBA_CMD_26
FBA_CMD_3
FBA_CMD_26
FBA_CMD_3
FBA_CMD_1
R8
R2
A6
A7
NC#T7
NC#L9
T7
L9
FBA_CMD_29 FBA_CMD_29 52,58
C
52,58 FBA_CMD_1 T8 A8 NC#L1 L1 52,58 FBA_CMD_1 T8 A8 NC#L1 L1
52,58 FBA_CMD_10 FBA_CMD_10 R3 J9 52,58 FBA_CMD_10 FBA_CMD_10 R3 J9
FBA_CMD_21 A9 NC#J9 FBA_CMD_21 A9 NC#J9
52,58 FBA_CMD_21 L7 A10/AP NC#J1 J1 52,58 FBA_CMD_21 L7 A10/AP NC#J1 J1
52,58 FBA_CMD_5 FBA_CMD_5 R7 52,58 FBA_CMD_5 FBA_CMD_5 R7
A11 A11

1
52,58 FBA_CMD_22 FBA_CMD_22 N7 52,58 FBA_CMD_22 FBA_CMD_22 N7 C580 C577 C592 C180
A12/BC# A12/BC#

SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP
52,58 FBA_CMD_18 FBA_CMD_18 T3 J8 52,58 FBA_CMD_18 FBA_CMD_18 T3 J8
FBA_CMD_30 A13 VSS FBA_CMD_30 A13 VSS
52,58 FBA_CMD_30 M7 M1 52,58 FBA_CMD_30 M7 M1

2
NC#M7 VSS NC#M7 VSS
VSS M9 VSS M9
VSS
J2
VSS
J2 DIS DIS DIS DIS
52,58 FBA_CMD_12 FBA_CMD_12 M2 P9 52,58 FBA_CMD_12 FBA_CMD_12 M2 P9
FBA_CMD_9 BA0 VSS FBA_CMD_9 BA0 VSS
52,58 FBA_CMD_9 N8 G8 52,58 FBA_CMD_9 N8 G8
FBA_CMD_13 BA1 VSS FBA_CMD_13 BA1 VSS
52,58 FBA_CMD_13 M3 B3 52,58 FBA_CMD_13 M3 B3
BA2 VSS BA2 VSS
T1 T1
VSS R89 243R2F-2-GP VSS
VSS
A9 1 DIS 2 VSS
A9
52 FBA_CLK0 J7 T9 52 FBA_CLK0 J7 T9
CK VSS CK VSS
52 FBA_CLK0# K7 E1 52 FBA_CLK0# K7 E1
CK# VSS CK# VSS
P1 P1
VSS VSS

1
52 FBA_CMD_0 FBA_CMD_0 K9 52 FBA_CMD_0 FBA_CMD_0 K9 C571 C174 C175 C177
CKE CKE

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP
G1 G1
VSSQ VSSQ
F9 F9

2
VSSQ VSSQ
52 FBADQM1 D3 E8 52 FBADQM2 D3 E8
DMU VSSQ DMU VSSQ
52 FBADQM3 E7
DML VSSQ
E2 52 FBADQM0 E7
DML VSSQ
E2 DIS DIS DIS DIS
D8 D8
VSSQ VSSQ
D1 D1
FBA_CMD_19 VSSQ FBA_CMD_19 VSSQ
52,58 FBA_CMD_19 L3 B9 52,58 FBA_CMD_19 L3 B9
FBA_CMD_8 WE# VSSQ FBA_CMD_8 WE# VSSQ
52,58 FBA_CMD_8 K3 B1 52,58 FBA_CMD_8 K3 B1
FBA_CMD_24 CAS# VSSQ FBA_CMD_24 CAS# VSSQ
52,58 FBA_CMD_24 J3 G9 52,58 FBA_CMD_24 J3 G9
B RAS# VSSQ RAS# VSSQ

K4W1G1646E-HC12-GP K4W1G1646E-HC12-GP
72.41164.H0U 72.41164.H0U
DIS DIS FBVDD

1
2nd: 72.51G63.C0U (IC SDRAM H5TQ1G63BFR-12C FBGA) R463
1K05R2F-GP
DIS

2
FBA_VREF12

1
R464 DIS
DIS 1K05R2F-GP C585
SC2D2U6D3V3KX-GP

2
2
SB 1031 change to 78.22520.5BL

<Core Design>
A A
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

57_VRAM(1/2)
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 57 of 58

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
SA 0908: layout swap
SA 0908: layout swap FBRAM4
FBAD[32..63] 52
FBRAM3 FBVDD
FBVDD FBAD[32..63] 52
K8 E3 FBAD51
FBAD56 VDD DQL0 FBAD53
K8 VDD DQL0 E3 K2 VDD DQL1 F7
D K2
N1
VDD
VDD
DQL1
DQL2
F7
F2
FBAD62
FBAD58
N1
R9
VDD
VDD
DQL2
DQL3
F2
F8
FBAD48
FBAD52 D
R9 F8 FBAD63 B2 H3 FBAD50
VDD DQL3 FBAD61 VDD DQL4 FBAD55
B2 VDD DQL4 H3 D9 VDD DQL5 H8
D9 H8 FBAD60 G7 G2 FBAD49
VDD DQL5 FBAD59 VDD DQL6 FBAD54
G7 VDD DQL6 G2 R1 VDD DQL7 H7
R1 H7 FBAD57 FBVDD N9
FBVDD VDD DQL7 VDD FBAD36
N9 VDD DQU0 D7
D7 FBAD43 A8 C3 FBAD39
DQU0 FBAD40 VDDQ DQU1 FBAD34
A8 VDDQ DQU1 C3 A1 VDDQ DQU2 C8
A1 C8 FBAD47 C1 C2 FBAD38
VDDQ DQU2 FBAD44 VDDQ DQU3 FBAD32
C1 VDDQ DQU3 C2 C9 VDDQ DQU4 A7
C9 A7 FBAD46 D2 A2 FBAD35
VDDQ DQU4 FBAD42 VDDQ DQU5 FBAD33
D2 VDDQ DQU5 A2 E9 VDDQ DQU6 B8
E9 B8 FBAD45 F1 A3 FBAD37
VDDQ DQU6 FBAD41 VDDQ DQU7
F1 VDDQ DQU7 A3 H9 VDDQ
DIS H9 VDDQ H2 VDDQ DQSU C7 FBADQSP4 52
H2 VDDQ DQSU C7 FBADQSP5 52 DQSU# B7 FBADQSN4 52
C588 B7 FBADQSN5 52 FBA_VREF34 H1
DQSU# VREFDQ
2 1 FBA_VREF34 H1 VREFDQ M8 VREFCA DQSL F3 FBADQSP6 52
SCD01U50V2KX-1GP M8 F3 FBADQSP7 52 2 R465 1FBA_ZQ3 L8 G3 FBADQSN6 52
VREFCA DQSL ZQ DQSL#
2 1FBA_ZQ2 L8 ZQ DQSL# G3 FBADQSN7 52 243R2F-2-GP
R88 DIS 243R2F-2-GP DIS K1 FBA_CMD_16 FBA_CMD_16 52
FBA_CMD_16 FBA_CMD_22 ODT
K1 N3
C 52,57 FBA_CMD_22 FBA_CMD_22
FBA_CMD_4
N3 A0
ODT FBA_CMD_16 52 52,57
52,57
FBA_CMD_22
FBA_CMD_4 FBA_CMD_4
FBA_CMD_20
P7
A0
A1 FBA_CMD_11
C
52,57 FBA_CMD_4 P7 A1 52,57 FBA_CMD_20 P3 A2 CS# L2 FBA_CMD_11 52
52,57 FBA_CMD_20 FBA_CMD_20 P3 L2 FBA_CMD_11 FBA_CMD_11 52 52,57 FBA_CMD_9 FBA_CMD_9 N2 T2 FBA_CMD_28 FBA_CMD_28 52,57
FBA_CMD_9 A2 CS# FBA_CMD_28 FBA_CMD_6 A3 RESET#
52,57 FBA_CMD_9 N2 A3 RESET# T2 FBA_CMD_28 52,57 52,57 FBA_CMD_6 P8 A4
52,57 FBA_CMD_6 FBA_CMD_6 P8 52,57 FBA_CMD_17 FBA_CMD_17 P2
FBA_CMD_17 A4 FBA_CMD_3 A5 FBA_CMD_18
52,57 FBA_CMD_17 P2 A5 52,57 FBA_CMD_3 R8 A6 NC#T7 T7 FBA_CMD_18 52,57
52,57 FBA_CMD_3 FBA_CMD_3 R8 T7 FBA_CMD_18 FBA_CMD_18 52,57 52,57 FBA_CMD_26 FBA_CMD_26 R2 L9
FBA_CMD_26 A6 NC#T7 FBA_CMD_1 A7 NC#L9
52,57 FBA_CMD_26 R2 A7 NC#L9 L9 52,57 FBA_CMD_1 T8 A8 NC#L1 L1
52,57 FBA_CMD_1 FBA_CMD_1 T8 L1 52,57 FBA_CMD_5 FBA_CMD_5 R3 J9
FBA_CMD_5 A8 NC#L1 FBA_CMD_19 A9 NC#J9
52,57 FBA_CMD_5 R3 A9 NC#J9 J9 52,57 FBA_CMD_19 L7 A10/AP NC#J1 J1
52,57 FBA_CMD_19 FBA_CMD_19 L7 J1 52,57 FBA_CMD_10 FBA_CMD_10 R7
FBA_CMD_10 A10/AP NC#J1 FBA_CMD_7 A11
52,57 FBA_CMD_10 R7 A11 52,57 FBA_CMD_7 N7 A12/BC#
52,57 FBA_CMD_7 FBA_CMD_7 N7 52,57 FBA_CMD_29 FBA_CMD_29 T3 J8
FBA_CMD_29 A12/BC# FBA_CMD_13 A13 VSS
52,57 FBA_CMD_29 T3 A13 VSS J8 52,57 FBA_CMD_13 M7 NC#M7 VSS M1
52,57 FBA_CMD_13 FBA_CMD_13 M7 M1 M9
NC#M7 VSS VSS
VSS M9 VSS J2
J2 52,57 FBA_CMD_12 FBA_CMD_12 M2 P9
FBA_CMD_12 VSS FBA_CMD_14 BA0 VSS
52,57 FBA_CMD_12 M2 BA0 VSS P9 52,57 FBA_CMD_14 N8 BA1 VSS G8
52,57 FBA_CMD_14 FBA_CMD_14 N8 G8 52,57 FBA_CMD_30 FBA_CMD_30 M3 B3
FBA_CMD_30 BA1 VSS BA2 VSS
52,57 FBA_CMD_30 M3 BA2 VSS B3 VSS T1
T1 A9 FBVDD
R86 243R2F-2-GP 1 VSS VSS
DIS 2 VSS A9 52 FBA_CLK1 J7 CK VSS T9
52 FBA_CLK1 J7 T9 52 FBA_CLK1# K7 E1
B CK VSS CK# VSS
B

1
52 FBA_CLK1# K7 E1 P1 R478
CK# VSS FBA_CMD_27 VSS 1K05R2F-GP
VSS P1 52 FBA_CMD_27 K9 CKE
52 FBA_CMD_27 FBA_CMD_27 K9 G1 DIS
CKE VSSQ
VSSQ G1 VSSQ F9
F9 52 FBADQM4 D3 E8

2
VSSQ DMU VSSQ FBA_VREF34
52 FBADQM5 D3 DMU VSSQ E8 52 FBADQM6 E7 DML VSSQ E2
52 FBADQM7 E7 DML VSSQ E2 VSSQ D8

1
VSSQ D8 VSSQ D1

1
D1 52,57 FBA_CMD_21 FBA_CMD_21 L3 B9 R98 DIS
FBA_CMD_21 VSSQ FBA_CMD_8 WE# VSSQ 1K05R2F-GP C584
52,57 FBA_CMD_21 L3 WE# VSSQ B9 52,57 FBA_CMD_8 K3 CAS# VSSQ B1
52,57 FBA_CMD_8 FBA_CMD_8 K3 B1 52,57 FBA_CMD_24 FBA_CMD_24 J3 G9 DIS SC2D2U6D3V3KX-GP

2
FBA_CMD_24 CAS# VSSQ RAS# VSSQ
52,57 FBA_CMD_24 J3 G9

2
RAS# VSSQ
K4W1G1646E-HC12-GP
K4W1G1646E-HC12-GP 72.41164.H0U SB 1031 change to 78.22520.5BL
72.41164.H0U DIS
DIS

<Core Design>

A Wistron Corporation A
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C

Title

58_VRAM(2/2)
Size Document Number Rev
Custom -1
LA46 MB DIS
Date: Tuesday, January 26, 2010 Sheet 58 of 58

5 4 3 2 1

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