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19-2238; Rev 2; 11/03 EVALU BLE
AVA ILA
MAX5904–MAX5909
The MAX5904–MAX5909 dual hot-swap controllers ♦ Safe Hot Swap for +1V to +13.2V Power
provide complete protection for dual-supply systems. Supplies
These devices hot swap two supplies ranging from +1V Requires One Input ≥ 2.7V
to +13.2V, provided one supply is at or above 2.7V, ♦ Low 25mV Default Current-Limit Threshold
allowing the safe insertion and removal of circuit cards
into live backplanes. ♦ Inrush Current Regulated at Startup
The discharged filter capacitors of the circuit card pro- ♦ Circuit Breaker Function
vide low impedance to the live backplane. High inrush ♦ Adjustable Circuit Breaker/Current-Limit
currents from the backplane to the circuit card can burn Threshold
up connectors and components, or momentarily col- ♦ VariableSpeed/BiLevel Circuit-Breaker Response
lapse the backplane power supply leading to a system
reset. The MAX5904 family of hot-swap controllers pre- ♦ Auto-Retry or Latched Fault Management
vents such problems by gradually ramping up the output ♦ On/Off Sequence Programming
voltage and regulating the current to a preset limit when ♦ Status Output Indicates Fault/Safe Condition
the board is plugged in, allowing the system to stabilize
safely. After the startup cycle is completed, two on-chip ♦ Output Undervoltage and Overvoltage Monitoring
comparators provide VariableSpeed/BiLevel™ protec- and/or Protection
tion against short-circuit and overcurrent faults, as well
as immunity against system noise and load transients. In
Ordering Information
the event of a fault condition, the load is disconnected. PART TEMP RANGE PIN-PACKAGE
The MAX5905/MAX5907/MAX5909 must be unlatched
MAX5904ESA* -40°C to +85°C 8 SO
after a fault, and the MAX5904/MAX5906/MAX5908 auto-
matically restart after a fault. MAX5904USA 0°C to +85°C 8 SO
MAX5905ESA* -40°C to +85°C 8 SO
The MAX5904 family offers a variety of options to reduce
component count and design time. All devices integrate MAX5905USA 0°C to +85°C 8 SO
an on-board charge pump to drive the gates of low-cost, MAX5906EEE* -40°C to +85°C 16 QSOP
external N-channel MOSFETs. The devices offer integrat- MAX5906UEE 0°C to +85°C 16 QSOP
ed features like startup current regulation and current
MAX5907EEE* -40°C to +85°C 16 QSOP
glitch protection to eliminate external timing resistors and
capacitors. The MAX5906–MAX5909 provide an open- MAX5907UEE 0°C to +85°C 16 QSOP
drain status output, an adjustable startup timer, an MAX5908EEE* -40°C to +85°C 16 QSOP
adjustable current limit, an uncommitted comparator, MAX5908UEE 0°C to +85°C 16 QSOP
and output undervoltage/overvoltage monitoring.
MAX5909EEE* -40°C to +85°C 16 QSOP
The MAX5904/MAX5905 are available in 8-pin SO pack- MAX5909UEE 0°C to +85°C 16 QSOP
ages. The MAX5906–MAX5909 are available in space-
saving 16-pin QSOP packages. *Contact factory for availability.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
ABSOLUTE MAXIMUM RATINGS
MAX5904–MAX5909
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN_ = +1V to +13.2V provided at least one supply is higher than +2.7V, VON = +2.7V, TA = TMIN to TMAX, unless otherwise noted.
Typical values are at VIN1 = +5V, VIN2 = +3.3V, and TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLIES
IN_ Input Voltage Range VIN_ Other VIN = +2.7V 1.0 13.2 V
Supply Current IIN IIN1 + IIN2 1.2 2.3 mA
CURRENT CONTROL
TA = +25°C 22.5 25 27.5
MAX5904/MAX5905
Slow-Comparator Threshold TA = TMIN to TMAX 20.5 27.5
VSC,TH mV
(VIN - VSENSE) (Note 2) LIM = GND 22.5 25 27.5
MAX5906–MAX5909
RLIM = 300kΩ 80 100 125
Slow-Comparator Response Time 1mV overdrive 3 ms
tSCD
(Note 3) 50mV overdrive 110 µs
VSU,TH VIN_ - VSENSE_; during startup 2 x VSC, TH
Fast-Comparator Threshold mV
VFC,TH VIN_ - VSENSE_; normal operation 4 x VSC, TH
Fast-Comparator Response Time tFCD 10mV overdrive, from overload condition 260 ns
SENSE Input Bias Current IB SEN VSEN_ = VIN_ 0.03 6 µA
MOSFET DRIVER
RTIM = 100kΩ 8 10.8 13.6
Startup Period RTIM = 4kΩ (minimum value) 0.35 0.45 0.55
tSTART ms
(Note 4) TIM floating for MAX5906–MAX5909
5 9 14
fixed for MAX5904/MAX5905
Charging, VGATE = +5V, VIN = +10V
80 100 130 µA
(Note 5)
Weak discharge, during startup when current
Average Gate Current IGATE 100 µA
limit is active or when 0.4V < VON < 0.8V
Strong discharge, triggered by a fault or
3 mA
when VON < 0.4V
Gate Drive Voltage VDRIVE VGATE_ - VIN_, IGATE_ < 1µA 4.8 5.4 5.8 V
ON COMPARATOR
Low to high 0.375 0.4 0.425 V
Fast Pulldown ON Threshold VONFP,TH
Hysteresis 25 mV
2 _______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
ELECTRICAL CHARACTERISTICS (continued)
MAX5904–MAX5909
(VIN_ = +1V to +13.2V provided at least one supply is higher than +2.7V, VON = +2.7V, TA = TMIN to TMAX, unless otherwise noted.
Typical values are at VIN1 = +5V, VIN2 = +3.3V, and TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Low to high 0.80 0.825 0.85 V
Channel 1 ON Threshold VON1,TH
Hysteresis 25 mV
Low to high 1.95 2.025 2.07 V
Channel 2 ON Threshold VON2,TH
Hysteresis 25 mV
ON Propagation Delay tON 10mV overdrive 50 µs
VON < 4.5V 0.03
ON Input Bias Current IBON VIN1 = VIN2 = +13.2V VON > 4.5V 100 µA
VON = 4V 0.03 1
ON Pulse Width Low tUNLATCH To unlatch after a latched fault 100 µs
DIGITAL OUTPUT (PGOOD)
Output Leakage Current VPGOOD = 13.2V 1 µA
Output Voltage Low VOL ISINK = 1mA 0.4 V
PGOOD Delay tPGDLY After tSTART, MON_ = VIN_ 0.75 ms
OUTPUT VOLTAGE MONITORS (MON1, MON2)
Overvoltage 657 687 707
MON_ Trip Threshold VMON_ mV
Undervoltage 513 543 563
MON_ Glitch Filter 20 µs
MON_ Input Bias Current VMON_ = 600mV 0.03 µA
UNDERVOLTAGE LOCKOUT (UVLO)
Startup is initiated when this threshold is reached
2.1 2.4 2.67 V
UVLO Threshold VUVLO by VIN1 or VIN2, VON > 0.8V, VIN_ increasing
Hysteresis 100 mV
UVLO Glitch Filter Reset Time VIN_ = 0V, to unlatch after a fault 100 µs
UVLO to Startup Delay tD,UVLO VIN_ step from 0 to 2.8V 20 37.5 60 ms
SHUTDOWN RESTART
Delay time to restart after a fault shutdown
Auto-Retry Delay tRETRY 64 x tSTART ms
MAX5904/MAX5906/MAX5908
UNCOMMITTED COMPARATOR
Low to high 1.206 1.236 1.266 V
INC+ Trip Threshold Voltage VC,TH
Hysteresis 10 mV
Propagation Delay 10mV overdrive 50 µs
OUTC Voltage Low VOL ISINK = 1mA 0.4 V
INC+ Bias Current VINC+ = 5V 0.02 1 µA
OUTC Leakage Current IOUTC VOUTC = 13.2V 0.02 1 µA
Note 1: Limits are 100% tested at TA = +25°C and +85°C. Limits at 0°C and -40° are guaranteed by characterization and are not produc-
tion tested.
Note 2 The MAX5906–MAX5909 slow-comparator threshold is adjustable. VSC,TH = RLIM x 0.25µA + 25mV (see Typical Operating
Characteristics).
Note 3: The current-limit slow-comparator response time is weighted against the amount of overcurrent; the higher the overcurrent
condition, the faster the response time. See Typical Operating Characteristics.
Note 4: The startup period (tSTART) is the time during which the slow comparator is ignored and the device acts as a current limiter
by regulating the sense current with the fast comparator. See the Startup Period section.
_______________________________________________________________________________________ 3
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
MAX5904–MAX5909
MAX5904 toc02
MAX5904 toc03
VON = VIN1
VINY = VON = 2.7V 1.8
1.8 1.8
1.6 1.6 1.6 IIN1 + IIN2
A
1.4 IINX + IINY 1.4 1.4
C
1.2 1.2 1.2
IIN (mA)
IIN (mA)
IIN (mA)
B 1.0
1.0 1.0
IINX
0.8 0.8 0.8 IIN1
0.6 0.6 0.6
IINY VINY = 5.0V
0.4 0.4 0.4 IIN2
A) VON = 3.3V
0.2 0.2 B) VON = 1.5V 0.2
C) VON = 0V
0 0 0
0 2 4 6 8 10 12 14 0 2 4 6 8 10 12 14 -40 -15 10 35 60 85
VINX (V) VINX (V) TEMPERATURE (°C)
GATE DRIVE VOLTAGE vs. GATE CHARGE CURRENT GATE CHARGE CURRENT
INPUT VOLTAGE vs. GATE VOLTAGE vs. TEMPERATURE
6 200 200
MAX5904 toc04
MAX5904 toc05
MAX5904 toc06
180 VON = VINY = 2.7V 180
5 160 160 VINX = 13.2V
GATE CHARGE CURRENT (µA)
GATE WEAK DISCHARGE CURRENT GATE WEAK DISCHARGE CURRENT GATE STRONG DISCHARGE CURRENT
vs. GATE VOLTAGE vs. TEMPERATURE vs. GATE VOLTAGE
200 200 6
MAX5904 toc07
MAX5904 toc08
MAX5904 toc09
VON = 0V
180 VON = 0.6V 180 VON = 0.6V
VINX = 13.2V
GATE DISCHARGE CURRENT (mA)
GATE DISCHARGE CURRENT (µA)
4 _______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
MAX5904–MAX5909
Typical Operating Characteristics (continued)
(Typical Operating Circuits, Q1 = Q2 = Fairchild FDB7090L, VIN1 = +5V, VIN2 = +3.3V, TA = +25°C, unless otherwise noted. Channels
1 and 2 are identical in performance. Where characteristics are interchangeable, channels 1 and 2 are referred to as X and Y.)
MAX5904 toc12
MAX5904 toc10
MAX5904 toc11
SLOW-COMP. THRESHOLD
GATE DISCHARGE CURRENT (mA)
5
VINX = 13.2V
TURN-OFF TIME (ms) 1
VINX = 5V
1 0.001
0 0.0001 0.1
-40 -15 10 35 60 85 0 25 50 75 100 125 150 175 200 20 25 30 35 40 45 50 55 60 65 70 75 80
TEMPERATURE (°C) VIN - VSENSE (mV) VIN - VSENSE (mV)
MAX5904 toc14
100 50 VPGOOD
0V tSCD 5V/div
80 40 0V
VSC, TH (mV)
tSTART (ms)
26mV STEP
VSENSE - VIN
60 30 100mV/div
40 20 VGATE
5V/div
20 10 0V
0 0
0 100 200 300 400 0 100 200 300 400 500 600 1ms/div
RLIM (kΩ) RTIM (kΩ) VIN = 5.0V
VON
2V/div
0V VPGOOD VPGOOD
tFCD 5V/div 2V/div
0V
125mV STEP IOUT
5A/div
VSENSE - VIN
100mV/div
VOUT
VGATE 5V/div
5V/div
VGATE
0V 5V/div
400ns/div 1ms/div
VIN = 5.0V VIN = 5.0V, RSENSE = 10mΩ,
RTIM = 27kΩ, CBOARD = 1000µF
_______________________________________________________________________________________ 5
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
MAX5904–MAX5909
STARTUP WAVEFORMS
SLOW TURN-ON AUTO-RETRY DELAY
MAX5904 toc18 MAX5904 toc19
VON
2V/div
VPGOOD VGATE
2V/div 5V/div
IOUT
5A/div
VOUT
VOUT 5V/div
5V/div
IOUT
VGATE 5A/div
5V/div
1ms/div 40ms/div
VIN = 5.0V, RSENSE = 10mΩ, RTIM = 47kΩ, VIN = 5.0V, RSENSE = 10mΩ, RTIM = 47kΩ,
CBOARD = 1000µF, CGATE = 22nF CBOARD = 1000µF, RBOARD = 1.4Ω
Pin Description
PIN
MAX5904/ MAX5906– NAME FUNCTION
MAX5905 MAX5909
Open-Drain Status Output. High impedance when startup is complete and no faults
— 1 PGOOD
are detected. Actively held low during startup and when a fault is detected.
Startup Timer Setting. Connect a resistor from TIM to GND to set the startup period.
— 2 TIM
Leave TIM unconnected for the default startup period of 9ms.
Channel 1 Supply Input. Connect to a supply voltage from 1V to 13.2V. Connect a
1 3 IN1
0.1µF ceramic bypass capacitor from IN1 to GND to filter high-frequency noise.
2 4 SENSE1 Channel 1 Current-Sense Input. Connect RSENSE1 from IN1 to SENSE1.
3 5 GATE1 Channel 1 Gate-Drive Output. Connect to gate of external N-channel MOSFET.
4 6 GND Ground
Channel 1 Current-Limit Setting. Connect a resistor from LIM1 to GND to set
— 7 LIM1
current-trip level. Connect to GND for the default 25mV threshold.
6 _______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Pin Description (continued)
MAX5904–MAX5909
PIN
MAX5904/ MAX5906– NAME FUNCTION
MAX5905 MAX5909
Channel 2 Current-Limit Setting. Connect a resistor from LIM2 to GND to set
— 10 LIM2
current-trip level. Connect to GND for the default 25mV threshold.
5 11 ON On Comparator Input
6 12 GATE2 Channel 2 Gate-Drive Output. Connect to gate of external N-channel MOSFET.
7 13 SENSE2 Channel 2 Current-Sense Input. Connect RSENSE2 from IN2 to SENSE2.
Channel 2 Supply Input. Connect to a supply voltage from 1V to 13.2V. Connect a
8 14 IN2
0.1µF ceramic bypass capacitor from IN2 to GND to filter high-frequency noise.
— 15 INC+ Uncommitted Comparator Noninverting Input
Uncommitted Comparator Open-Drain Output. Actively held low when VINC+ is less
— 16 OUTC
than 1.236V.
_______________________________________________________________________________________ 7
MAX5904–MAX5909
8
RLIM1 RLIM2
LIM1 LIM2
IN1 IN2
Sequencers
RSENSE1 RSENSE2
GATE1 GATE2
CHARGE CURRENT CONTROL CURRENT CONTROL CHARGE
Q1 AND DEVICE CONTROL AND Q2
PUMP LOGIC PUMP
STARTUP LOGIC STARTUP LOGIC
OUT1 SLOW DISCHARGE SLOW DISCHARGE OUT2
FAST DISCHARGE FAST DISCHARGE
2.025V
3mA 100µA 100µA 3mA
687mV 687mV
0.825V
MON1 MON2
0.4V
543mV TO STARTUP TO STARTUP 543mV
LOGIC BLOCKS LOGIC BLOCKS
MAX5906
1.236V MAX5907
N STARTUP N CHARGE PUMP MAX5908
OSCILLATOR OSCILLATOR MAX5909
RTIM
_______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Fast Comparator Startup Period
MAX5904–MAX5909
During the startup period the fast comparator regulates
ON
the gate voltage to ensure that the voltage across the
sense resistor does not exceed VSU,TH. The startup
PGOOD
fast-comparator threshold voltage (VSU,TH) is scaled to
tSTART + tPGDLY two times the slow-comparator threshold (VSC,TH).
VGATE
Fast Comparator Normal Operation
In normal operation, if the load current reaches the fast-
4.8V TO 5.8V
comparator threshold, a fault is generated, PGOOD is
pulled low, and the MOSFET gates are discharged with
VOUT a strong 3mA pulldown current. This happens in the
VTH event of a serious current overload or a dead short. The
VGATE fast-comparator threshold voltage (VFC,TH) is scaled to
VOUT
four times the slow-comparator threshold (VSC,TH). This
VSU,TH CBOARD = LARGE comparator has a fast response time of 260ns (Figure 9).
RSENSE
CBOARD = 0
Undervoltage Lockout (UVLO)
The undervoltage lockout prevents the MAX5904–
ILOAD
MAX5909 from turning on the external MOSFETs until
tON
one input voltage exceeds the UVLO threshold (2.4V)
for tD,UVLO. The MAX5904–MAX5909 use power from
Figure 2. Startup Waveforms the higher input voltage rail for the charge pumps. This
allows for more efficient charge-pump operation. The
UVLO protects the external MOSFETs from an insuffi-
PGOOD is pulled low, the MAX5905/MAX5907/ cient gate drive voltage. tD,UVLO ensures that the board
MAX5909 stay latched off and the MAX5904/MAX5906/ is fully inserted into the backplane and that the input
MAX5908 automatically restart. voltages are stable. Any input voltage transient on both
supplies below the UVLO threshold will reinitiate the
Slow Comparator Startup Period
tD,UVLO and the startup period.
The slow comparator is disabled during the startup
period while the external MOSFETs are turning on. Latched and Auto-Retry Fault Management
Disabling the slow comparator allows the device to The MAX5905/MAX5907/MAX5909 latch the external
ignore the higher-than-normal inrush current charging MOSFETs off when a fault is detected. Toggling ON
the board capacitors when a card is first plugged into a below 0.4V or one of the supply voltages below the
live backplane. UVLO threshold for at least 100µs clears the fault latch
and reinitiates the startup period. Similarly, the
Slow Comparator Normal Operation
MAX5904/MAX5906/MAX5908 turn the external
After the startup period is complete the slow compara-
MOSFETs off when a fault is detected then automatical-
tor is enabled and the device enters normal operation.
ly restart after the auto-retry delay that is internally set
The comparator threshold voltage (VSC,TH) is fixed at
to 64 times tSTART. During the auto-retry delay, toggling
25mV for the MAX5904/MAX5905 and is adjustable
ON below 0.4V does not clear the fault. The auto-retry
from 25mV to 100mV for the MAX5906–MAX5909. The
can be overridden causing the startup period to begin
slow comparator response time decreases to a mini-
immediately by toggling one of the supply voltages
mum of 110µs with a large overdrive voltage (Figure 9).
below the UVLO threshold.
Response time is 3ms for a 1mV overdrive. The variable
speed response time allows the MAX5904–MAX5909 to Output Voltage Monitor
ignore low-amplitude momentary glitches, thus increas- The MAX5905–MAX5909 monitor the output voltages
ing system noise immunity. After an extended overcur- with the MON1 and MON2 window comparator inputs.
rent condition, a fault is generated, PGOOD is pulled These voltage monitors are enabled after the startup
low, and the MOSFET gates are discharged with a period. Once enabled, the voltage monitor detects a
strong 3mA pulldown current. fault if V MON _ is less than 543mV or greater than
687mV. If an output voltage fault is detected PGOOD
pulls low. When the MAX5906/MAX5907 detect an out-
_______________________________________________________________________________________ 9
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Timing Diagrams
MAX5904–MAX5909
VON
VON_,TH
VGATE_
VOUT_
INTERNAL SIGNAL
tSTART
INTERNAL SIGNAL
tPGDLY
PGOOD
Figure 3. Power-Up with ON Pin Control (At Least One VIN_ is > VUVLO)
10 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Timing Diagrams (continued)
MAX5904–MAX5909
OVERCURRENT CONDITION
(VIN_ - VSENSE_ ≥ VSC_TH AND
VIN_ - VSENSE_ < VFC_TH)
tSCD IOUT
VGATE_
VOUT_
PGOOD
SHORT-CIRCUIT CONDITION
(VIN_ - VSENSE_ ≥ VFC_TH)
tFCD IOUT
VGATE_
VOUT_
PGOOD
______________________________________________________________________________________ 11
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Timing Diagrams (continued)
MAX5904–MAX5909
VGATE_
VOUT_
PGOOD
VOUT_
PGOOD
12 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Timing Diagrams (continued)
MAX5904–MAX5909
VIN_
VUVLO
VGATE_
VOUT_
tD,UVLO
INTERNAL SIGNAL
tSTART
INTERNAL SIGNAL
tPGDLY
PGOOD
Figure 8. Power-Up with Undervoltage Lockout Delay (VON = 2.7V, the Other VIN_ is Below VUVLO)
______________________________________________________________________________________ 13
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
put voltage fault on either MON1 or MON2, the fault is Using the MAX5905/MAX5907/MAX5909 in latched
MAX5904–MAX5909
latched and both external MOSFET gates are dis- mode allows the use of MOSFETs with lower power rat-
charged at 3mA. When the MAX5908/MAX5909 detect ings. A MOSFET typically withstands single-shot pulses
an output voltage fault the external MOSFET gates are with higher dissipation than the specified package rat-
not affected. The MAX5908/MAX5909 PGOOD goes ing. Table 3 lists some recommended manufacturers
high impedance when the output voltage fault is and components.
removed. The voltage monitors do not react to output
glitches of less than 20µs. A capacitor from MON_ to Sense Resistor
GND increases the effective glitch filter time. Connect The slow-comparator threshold voltage is set at 25mV
MON1 to IN1 and MON2 to IN2 to disable the output for the MAX5904/MAX5905 and is adjustable from
voltage monitors. 25mV to 100mV for the MAX5906–MAX5909. Select a
sense resistor that causes a drop equal to the slow-
Status Output (PGOOD) comparator threshold voltage at a current level above
The status output is an open-drain output that pulls low the maximum normal operating current. Typically, set
in response to one of the following conditions: the overload current at 1.2 to 1.5 times the nominal load
• Forced off (ON < 0.8V) current. The fast-comparator threshold is four times the
slow-comparator threshold in normal operating mode.
• Overcurrent fault Choose the sense resistor power rating to be greater
• Output voltage fault than (IOVERLOAD)2 x VSC,TH.
PGOOD goes high impedance 0.75ms after the device Slow-Comparator Threshold, RLIM
enters normal operation and no faults are present The slow-comparator threshold voltage of the
(Table 1). MAX5904/MAX5905 is fixed at 25mV and adjustable
Applications Information from 25mV to 100mV for the MAX5906–MAX5909.
Component Selection The adjustable slow-comparator threshold of the
MAX5906–MAX5909 allows designers to fine-tune the
N-Channel MOSFET current-limit threshold for use with standard value
Select the external MOSFETs according to the applica- sense resistors. Low slow-comparator thresholds allow
tion’s current levels. Table 2 lists some recommended for increased efficiency by reducing the power dissipat-
components. The MOSFET’s on-resistance (RDS(ON)) ed by the sense resistor. Furthermore, the low 25mV
should be chosen low enough to have a minimum volt- slow-comparator threshold is beneficial when operating
age drop at full load to limit the MOSFET power dissipa- with supply rails down to 1V because it allows a small
tion. High RDS(ON) causes output ripple if there is a percentage of the overall output voltage to be used for
pulsating load. Determine the device power rating to current sensing. The VariableSpeed/BiLevel fault pro-
accommodate a short-circuit condition on the board at tection feature offers inherent system immunity against
startup and when the device is in automatic-retry mode load transients and noise. This allows the slow-com-
(see MOSFET Thermal Considerations). parator threshold to be set close to the maximum nor-
mal operating level without experiencing nuisance
X = don’t care
14 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
There are two ways of completing the startup
MAX5904–MAX5909
Table 2. Recommended N-Channel
sequence. Case A describes a startup sequence that
MOSFETs slowly turns on the MOSFETs by limiting the gate
PART NUMBER MANUFACTURER DESCRIPTION charge. Case B uses the current-limiting feature and
IRF7413 11mΩ, 8 SO, 30V turns on the MOSFETs as fast as possible while still
International preventing a high inrush current. The output voltage
IRF7401 22mΩ, 8 SO, 20V
Rectifier ramp-up time (tON) is determined by the longer of the
IRL3502S 6mΩ, D2PAK, 20V two timings, case A and case B. Set the MAX5906–
MMSF3300 20mΩ, 8 SO, 30V MAX5909 startup timer tSTART to be longer than tON to
MMSF5N02H Motorola 30mΩ, 8 SO, 20V guarantee enough time for the output voltage to settle.
MTB60N05H 14mΩ, D2PAK, 50V Case A: Slow Turn-ON (without current limit)
FDS6670A 10mΩ, 8SO, 30V There are two ways to turn on the MOSFETs without
NDS8426A Fairchild 13.5mΩ, 8 SO, 20V reaching the fast-comparator current limit:
FDB8030L 4.5mΩ, D2PAK, 30V If the board capacitance (C BOARD) is small, the
inrush current is low.
If the gate capacitance is high, the MOSFETs turn
faults. Typically, set the overload current at 1.2 to 1.5
on slowly.
times the nominal load current. To adjust the slow-com-
parator threshold calculate RLIM as follows: In both cases, the turn-on time is determined only by the
charge required to enhance the MOSFET. The small
V − 25mV gate-charging current of 100µA effectively limits the out-
RLIM = TH put voltage dV/dt. Connecting an external capacitor
0.25µA between GATE and GND extends turn-on time. The time
required to charge/discharge a MOSFET is as follows:
where VTH is the desired slow-comparator threshold
voltage.
CGATE × ∆VGATE + QGATE
t=
Setting the Startup Period, RTIM IGATE
The startup period (tSTART) of the MAX5904/MAX5905 is
fixed at 9ms, and adjustable from 0.4ms to 50ms for the where:
MAX5906–MAX5909. The adjustable startup period of C GATE is the external gate to ground capacitance
the MAX5906–MAX5909 systems can be customized for (Figure 4)
MOSFET gate capacitance and board capacitance
(CBOARD). The startup period is adjusted with the resis- ∆VGATE is the change in gate voltage
tance connected from TIM to GND (RTIM). RTIM must be QGATE is the MOSFET total gate charge
between 4kΩ and 500kΩ. The MAX5906–MAX5909 start- IGATE is the gate charging/discharging current
up period has a default value of 9ms when TIM is left
floating. Calculate RTIM with the following equation: In this case, the inrush current depends on the MOSFET
gate-to-drain capacitance (Crss) plus any additional
t START capacitance from gate to GND (CGATE), and on any
RTIM = load current (ILOAD) present during the startup period.
128 × 800pF
______________________________________________________________________________________ 15
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
MAX5904–MAX5909
Example: Charging and Discharging times using the The maximum inrush current in this case is:
Fairchild FDB7030L MOSFET
If VIN1 = 5V then GATE1 charges up to 10.4V (VIN1 + VSU,TH
IINRUSH =
VDRIVE), therefore ∆VGATE = 10.4V. The manufacturer’s RSENSE
data sheet specifies that the FDB7030L has approxi-
mately 60nC of gate charge and Crss = 600pF. The Figures 2–8 show the waveforms and timing diagrams
MAX5904–MAX5909 have a 100µA gate-charging cur- for a startup transient with current regulation. (See
rent and a 100µA weak discharging current or 3mA Typical Operating Characteristics.) When operating
strong discharging current. under this condition, an external gate capacitor is not
CBOARD = 6µF and the load does not draw any current required.
during the startup period.
ON Comparator
With no gate capacitor the inrush current, charge, and The ON comparator controls the on/off function of the
discharge times are: MAX5904–MAX5909. ON is the input to a precision
three-level voltage comparator that allows individual
control over channel 1 and channel 2. Drive ON high
6µF (> 2.025V) to enable channel 1 and channel 2. Pull ON
IINRUSH = × 100µA + 0 = 1A
600pF + 0 low (<0.4V) to disable both channels. To enable chan-
0 × 10.4V + 60nC nel 1 only, VON must be between the channel 1 ON
t CHARGE = = 0.6ms threshold (0.825V) and the channel 2 ON threshold
100µA (2.025V). The device can be turned off slowly, reducing
0 × 10.4V + 60nC inductive kickback, by forcing ON between 0.4V and
tDISCHARGE _ SLOW = = 0.6ms
100µA 0.825V until the gates are discharged. The ON com-
parator is ideal for power sequencing (Figure 11).
0 × 10.4V + 60nC
tDISCHARGE _ FAST = = 0.02ms
3mA Uncommitted Comparator
The MAX5906–MAX5909 feature an uncommitted com-
With a 22nF gate capacitor the inrush current, charge, parator that increases system flexibility. This compara-
and discharge times are: tor can be used for voltage monitoring, or for
generating a power-on reset signal for on-card micro-
6µF processors (Figure 12).
IINRUSH = × 100µA + 0 = 26.5mA
600pF + 22nF The uncommitted comparator output (OUTC) is open
22nF × 10.4V + 60nC drain and is pulled low when the comparator input volt-
t CHARGE = = 2.89ms
100µA age (VINC+) is below its threshold voltage (1.236V).
OUTC is high impedance when VINC+ is greater than
22nF × 10.4V + 60nC
tDISCHARGE _ SLOW = = 2.89ms 1.236V.
100µA
22nF × 10.4V + 60nC Using the MAX5904–MAX5909 on the
tDISCHARGE _ FAST = = 0.096ms Backplane
3mA Using the MAX5904–MAX5909 on the backplane allows
multiple cards with different input capacitance to be
Case B: Fast Turn-On (with current limit) inserted into the same slot even if the card does not
In applications where the board capacitance (CBOARD) have on-board hot-swap protection. The startup period
is high, the inrush current causes a voltage drop across can be triggered if IN is connected to ON through a
R SENSE that exceeds the startup fast-comparator trace on the card (Figure 13).
threshold. The fast comparator regulates the voltage
across the sense resistor to VSU,TH. This effectively Input Transients
regulates the inrush current during startup. In this case, The voltage at IN1 or IN2 must be above the UVLO dur-
the current charging CBOARD can be considered con- ing inrush and fault conditions. When a short-circuit
stant and the turn-on time is: condition occurs on the board, the fast comparator trips
16 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
time resulting in a high di/dt. The backplane delivering
MAX5904–MAX5909
the power to the external card must have low induc-
tance to minimize voltage transients caused by this
high di/dt.
SLOW
COMPARATOR
MOSFET Thermal Considerations
3ms During normal operation, the external MOSFETs dissi-
pate little power. The MOSFET RDS(ON) is low when the
MOSFET is fully enhanced. The power dissipated in
normal operation is PD = ILOAD2 x RDS(ON). The most
TURN-OFF TIME
FAST
COMPARATOR
power dissipation occurs during the turn-on and turn-
off transients when the MOSFETs are in their linear
regions. Take into consideration the worst-case sce-
nario of a continuous short-circuit fault, consider these
110µs two cases:
260ns
1) The single turn-on with the device latched after a
fault (MAX5905/MAX5907/MAX5909)
2) The continuous automatic retry after a fault
VSC,TH VFC,TH (MAX5904/MAX5906/MAX5908)
(4 x VSC,TH)
MOSFET manufacturers typically include the package
SENSE VOLTAGE (VIN - VSENSE)
thermal resistance from junction to ambient (RθJA) and
thermal resistance from junction to case (RθJC) which
Figure 9. VariableSpeed/BiLevel Response
determine the startup time and the retry duty cycle (d =
tSTART / tRETRY). Calculate the required transient ther-
mal resistance with the following equation:
RSENSE
VOUT
VIN T −T
Z θJA(MAX ) ≤ JMAX A
CBOARD VIN × ISTART
RPULLUP where ISTART = VSU,TH / RSENSE
CGATE
IN SENSE GATE Layout Considerations
To take full tracking advantage of the switch response
time to an output fault condition, it is important to keep
MAX5906
PGOOD
MAX5907 all traces as short as possible and to maximize the
MAX5908 high-current trace dimensions to reduce the effect of
MAX5909
ON
undesirable parasitic inductance. Place the MAX5904–
MAX5909 close to the card’s connector. Use a ground
GND plane to minimize impedance and inductance.
Minimize the current-sense resistor trace length
(<10mm), and ensure accurate current sensing with
Figure 10. Operating with an External Gate Capacitor Kelvin connections (Figure 14).
When the output is short circuited, the voltage drop
across the external MOSFET becomes large. Hence,
causing the external MOSFET gates to be discharged the power dissipation across the switch increases, as
at 3mA. The main system power supply must be able to does the die temperature. An efficient way to achieve
sustain a temporary fault current, without dropping good power dissipation on a surface-mount package is
below the UVLO threshold of 2.4V, until the external to lay out two copper pads directly under the MOSFET
MOSFET is completely off. If the main system power package on both sides of the board. Connect the two
supply collapses below UVLO, the MAX5904–MAX5909 pads to the ground plane through vias, and use
will force the device to restart once the supply has enlarged copper mounting pads on the top side of the
recovered. The MOSFET is turned off in a very short board. See MAX5908 EV Kit.
______________________________________________________________________________________ 17
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
MAX5904–MAX5909
RSENSE1
Q1
V1 OUT1
CBOARD1
C1 MAX5904
MAX5905
GND GND
V2 OUT2
RSENSE2 Q2
CBOARD2
VEN
t1 = -R1C1 ln (V EN - VON1, TH
VEN
)
VON2, TH VON
VON1, TH
V1 t2 = -R1C1 ln (V EN - VON2, TH
VEN
)
V2
TDELAY
Chip Information
TRANSISTOR COUNT: 3230
PROCESS: BiCMOS
18 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
MAX5904–MAX5909
VIN HIGH-CURRENT PATH
MAX590_
MON1 8 9 MON2
QSOP
Selector Guide
OUTPUT UNDERVOLTAGE/OVERVOLTAGE
PART FAULT MANAGEMENT
PROTECTION/MONITOR
MAX5904ESA/MAX5904USA — Auto-Retry
MAX5905ESA/MAX5905USA — Latched
MAX5906EEE/MAX5906UEE Protection Auto-Retry
MAX5907EEE/MAX5907UEE Protection Latched
MAX5908EEE/MAX5908UEE Monitor Auto-Retry
MAX5909EEE/MAX5909UEE Monitor Latched
______________________________________________________________________________________ 19
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Typical Operating Circuits
MAX5904–MAX5909
0.1µF CBOARD1
MAX5904
GND MAX5905
GND
IN2 SENSE2 GATE2
0.1µF
V2 OUT2
RSENSE2 Q2
CBOARD2
ON ON MON1
STAT PGOOD
* TIM OUTC
UNCOMMITTED
MAX5906 COMPARATOR
* LIM1 MAX5907 INC+
MAX5908
* LIM2 MAX5909
0.1µF
V2 OUT2
RSENSE2 Q2
CBOARD2
*OPTIONAL
20 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Package Information
MAX5904–MAX5909
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
SOICN .EPS
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.053 0.069 1.35 1.75
N A1 0.004 0.010 0.10 0.25
B 0.014 0.019 0.35 0.49
C 0.007 0.010 0.19 0.25
e 0.050 BSC 1.27 BSC
E 0.150 0.157 3.80 4.00
E H H 0.228 0.244 5.80 6.20
L 0.016 0.050 0.40 1.27
VARIATIONS:
1
INCHES MILLIMETERS
TOP VIEW DIM MIN MAX MIN MAX N MS012
D 0.189 0.197 4.80 5.00 8 AA
D 0.337 0.344 8.55 8.75 14 AB
D 0.386 0.394 9.80 10.00 16 AC
A C
e B A1 0 -8
L
FRONT VIEW SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
______________________________________________________________________________________ 21
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Package Information (continued)
MAX5904–MAX5909
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
QSOP.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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