Acer Aspire E5 574 E5 574G E5 574T

5 4 3 2 1
01
BOM
D Zoro_SL (ZRW) SKL ULT SYSTEM BLOCK DIAGRAM IV@ : iGPU D
EV@ : Optimus
GT@ : N16S-GT / GC6
Dual Channel DDR III VRAM GM@ : N16V-GM / WO GC6
DDR3L-SODIMM CHA 1066/1333/1600 MHZ GPU DDR3 DR@ : For Dual Rank ( VRAM 8 pcs)
P12 SKY LAKE ULT 15W PCIE1-4
N16S-GT P18~P19 KBL@ : Keyboard backlight
N16V-GM TPM@ : TPM
MCP 1356pins PCI-E x4
TX/RX TPM_N@: For TPM 2.0
DDR3L-SODIMM CHB IMC
DC+GT3e X'TAL 27MHz
TPM_l@ : For TPM 1.2
P13
42 mm X 24 mm
CLK 8M@ : 8M FLASH ROM
SATA0 P14~P19 4M@ : 4M FLASH ROM
SATA - HDD EDP GS@ :G-SENSOR
P25 SATA eDP Conn. P21 TDI@ : TOUCH PAD I2C
eDP
SATA ODD SATA1 TSU@ : TOUCH SCREEN USB
P25 TSI@ : TOUCH SCREEN I2C
DDI2
GT3@ : GT3 CPU
ITE6516
VGA Conn. P21 NAC@ : Non IOAC
P20 IOAC@ : For IOAC
DP
C C
DDI1
PS8201 HDMI Conn. P22
Cardreader USB2-8 Integrated PCH P22
CONN. 2in 1 RTS5170 USB3-1 & USB3-2
P28 (cardreader) P28
USB3.0/2.0
USB2-7 USB2-1 & USB2-2 USB3 Port MB side
CCD(Camera) CN13 -> USB3 port 2 ( up )
P21 CN16 -> USB3 port 1 ( down )
USB2.0 P28
USB2-6 CLK
Touch Screen
P21
PCI-E x1 PCIE-6
USB2-5
Blue Tooth MINI CARD
P26 WLAN+BT
I/O board X'TAL P26
USB2-4 32.768KHz
USB2 IO*1 I/O Board Conn. PCIE-5

RTL8111H RJ45
P28 P23
X'TAL 24MHz
DMIC_CLK0
10/100/1G P23
DMIC_DATA0
CLK
P6 BATTERY RTC
P2~P10 I2C_0 X'TAL 25MHz
B Azalia IHDA
B
SPI
LPC
SPI ROM
8M+4M P7
EC
Int. D-MIC ALC255 TPM(option)
D-MIC BQ24780RUYR G5316RZ1D Thermal Protection
AUDIO CODEC IT8987 P25 Batery Charger P30 +1.35VSUS P35 P40
P24 P24 P29
Discharger
TPS51225 MDV1528Q UP1658RQKF

+3V/+5V P31 +5V_S5/+3V_S5/+3V/+5V P31 +VGPU_CORE P41
RT8237CZQW ISL95859HRTZ-T RT8068AZQW

+1V_S5 P32 +VCORE/VCCSA/VCCGT P38 P42
+1.05V_GFX/+3V_GFX
+1.5V_GFX
K/B HALL
Universal HP Speaker*2 LED BL Touch PAD Fan Driver NB681GD-Z
P24 P24 P27
K/B Con. SENSOR (Fan signal)
P27 Con. P27 P27 P17 P27 +VCCOPC/+VCCEOPIOP33
A A
Quanta Computer Inc.

PROJECT : ZRW
sualaptop365.edu.vn Size
P7
Document Number
Block Diagram
Rev
3A
Date: Monday, July 20, 2015 Sheet 1 of 48

5 4 3 2 1
5 4 3 2 1
Skylake ULT (DISPLAY,eDP) 02

SKL_ULT
U35A
D D
(22) INT_HDMITX2N E55 C47 EDP_TXN0 EDP_TXN0 (21)
F55 DDI1_TXN[0] EDP_TXN[0] C46 EDP_TXP0
(22) INT_HDMITX2P
E58 DDI1_TXP[0] EDP_TXP[0] D46 EDP_TXN1
EDP_TXP0 (21) eDP Panel +3V
HDMI
(22) INT_HDMITX1N DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 (21)
(22) INT_HDMITX1P F58 C45 EDP_TXP1 EDP_TXP1 (21)
F53 DDI1_TXP[1] EDP_TXP[1] A45
(22) INT_HDMITX0N DDI1_TXN[2] EDP_TXN[2]
(22) INT_HDMITX0P G53 B45 CRT_AUXN R533 *100K_4
F56 DDI1_TXP[2] EDP_TXP[2] A47
(22) INT_HDMICLK- DDI1_TXN[3] EDP_TXN[3]
(22) INT_HDMICLK+ G56 B47 CRT_AUXP R532 *100K_4
DDI1_TXP[3] EDP_TXP[3]
C50 E45 EDP_AUXN
(20) CRT_TXN0 DDI2_TXN[0] DDI EDP EDP_AUXN EDP_AUXN (21)
D50 F45 EDP_AUXP
CRT
(20) CRT_TXP0 DDI2_TXP[0] EDP_AUXP EDP_AUXP (21)
(20) CRT_TXN1 C52
D52 DDI2_TXN[1] B52 DP_UTIL R546 *0_4 PCH_BRIGHT
(20) CRT_TXP1 DDI2_TXP[1] EDP_DISP_UTIL
A50 R553 *0_4
B50 DDI2_TXN[2] G50
ITE FAE suggest CAP DDI2_TXP[2] DDI1_AUXN
should be at PCH side. D51 F50 +3V
C51 DDI2_TXN[3] DDI1_AUXP E48 CRT_AUX#_C C671 *short_4
DDI2_TXP[3] DDI2_AUXN CRT_AUXN (20)
F48 CRT_AUX_C C670 *short_4 CRT_AUXP (20)
DDI2_AUXP G46 CRT_CLK R577 2.2K_4
DISPLAY SIDEBANDS DDI3_AUXN F46 CRT_DATA R152 2.2K_4
(22) HDMI_DDCCLK_SW HDMI_DDCCLK_SW L13
GPP_E18/DDPB_CTRLCLK +3V_S5
DDI3_AUXP Rev:D change to shortpad KBSMI# R780 20K/F_4
(22) HDMI_DDCDATA_SW HDMI_DDCDATA_SW L12 +3V_S5 L9 INT_HDMI_HPD INT_HDMI_HPD (22) EC_SCI# R781 20K/F_4
GPP_E19/DDPB_CTRLDATA +3V_S5 GPP_E13/DDPB_HPD0 L7 CRT_HPD
N7
+3V_S5 GPP_E14/DDPC_HPD1 L6
CRT_HPD (20)
CRT_CLK R567 *short_4
CRT_DATA N8 GPP_E20/DDPC_CTRLCLK +3V_S5 +3V_S5 GPP_E15/DDPD_HPD2 N9 R571 *short_4
KBSMI# (29) Rev:D add
GPP_E21/DDPC_CTRLDATA +3V_S5 +3V_S5 GPP_E16/DDPE_HPD3 EC_SCI# (29)
L10 EDP_HPD EDP_HPD (21)
N11 +3V_S5 GPP_E17/EDP_HPD
N12 GPP_E22/DDPD_CTRLCLK +3V_S5 R12
(25) PCH_ODD_EN PCH_BLON PCH_BLON (21)
GPP_E23/DDPD_CTRLDATA +3V_S5 EDP_BKLTEN R11 PCH_BRIGHT
EDP_BKLTCTL PCH_BRIGHT (21)
24.9/F_4 R154 EDP_RCOMP E52 U13 PCH_VDDEN
+VCCIO EDP_RCOMP EDP_VDDEN EDP_VDD_EN (21)
1 OF 20
eDP_RCOMP CRT_HPD R564 100K_4
SKL_ULT/BGA
REV = 1 ? EDP_HPD R563 100K_4
Trace length < 100 mils
Trace width = 20 mils
C C
Trace spacing = 25 mils
+1V_VCCST 100k pull-down on PCH side
1K_4 R529 CPU_THRMTRIP# H_PECI (50ohm)

Route on microstrip only
49.9/F_4 R788 CATERR#
Spacing >18 mils SKL_ULT
U35D
Trace Length: 0.4~6.125 iches
Rev:E Stuff only for C2 build Debug
CATERR# D63
Ramp will remove (29) H_PECI TP65
H_PECI A54 CATERR#
H_PROCHOT# R531 499/F_4 H_PROCHOT#_R C65 PECI
(29,30,36) H_PROCHOT# PROCHOT# JTAG
THRMTRIP# R530 100/F_4 CPU_THRMTRIP# C63
Avoid 125Mhz A65 THERMTRIP# B61 XDP_TCK0
SKTOCC# PROC_TCK D60 XDP_TDI_CPU
CPU MISC PROC_TDI
XDP_BPM#0 C55 A61 XDP_TDO_CPU
+VCCIO TP89 BPM#[0] PROC_TDO
BPM#[0:7] XDP_BPM#1 D55 C60 XDP_TMS_CPU
TP90 BPM#[1] PROC_TMS
XDP_BPM#2 B54 B59 XDP_TRST#
Trace Length 1~6 inches TP64
XDP_BPM#3 C56 BPM#[2] PROC_TRST# MP remove(Intel)
R465 1K_4 H_PROCHOT#
Length match < 300 mils TP62 BPM#[3] B56 XDP_TCK1 PCH JTAG
A6 PCH_JTAG_TCK D59 XDP_TDI
GPP_E3/CPU_GP0 +3V_S5 PCH_JTAG_TDI JTAG_TCK,JTAG_TMS +1V_VCCST
A7 +3V_S5 A56 PCH _JTAG_TDO R539 *short_4 XDP_TDO
DGPU_PW_CTRL# BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO C59 XDP_TMS
Trace Length < 9000mils Change to +1V_VCCST 11/6
(4) DGPU_PW_CTRL# GPP_B3/CPU_GP2 +3V_S5 PCH_JTAG_TMS
AY5 +3V_S5 C61
GPP_B4/CPU_GP3 PCH_TRST# A59 PCH_TRST# R549 *short_4 XDP_TRST#
JTAGX TCK,TMS
SM_RCOMP[0:2] R635 49.9/F_4 AT16 Trace Length < 9000mils
R646 49.9/F_4 AU16 PROC_POPIRCOMP PCH_JTAGX R517 *short_4 XDP_TCK0 XDP_TDO_CPU R559 51_4
Trace length < 500 mils PCH_OPIRCOMP
R158 49.9/F_4 H66 XDP_TMS R514 51_4
Trace width = 12~15 mils R162 49.9/F_4 H65 OPCE_RCOMP XDP_TDI R515 51_4
Trace spacing = 20 mils OPC_RCOMP Rev:D change to shortpad PCH _JTAG_TDO R538 51_4
PCH_JTAGX R513 *1K_4
4 OF 20
SKL_ULT/BGA
B REV = 1 ? B
XDP_TRST# R535 *51_4

XDP_TCK0 R558 51_4
XDP_TDO R795 0_4 XDP_TDO_CPU XDP_TCK1 R537 *51_4
H_PWRGOOD (50ohm) PCH_TRST# R534 51_4
XDP_TDI R796 0_4 XDP_TDI_CPU Trace Length: 1~11.25 inches
XDP_TMS R797 0_4 XDP_TMS_CPU 2/16
,XDP_TCK1,XDP_TMS
If use Intel DCI USB 3.0 fixture need to short don't need pull up or pull down
1. XDP_TDO <--> XDP_TDO_CPU
2. XDP_TDI <--> XDP_TDI_CPU Rev:F add 5/29 XDP_TCK0 R558 Stuff
3. XDP_TMS <--> XDP_TMS_CPU
+1V_VCCST
CPU thermal trip

3
IMVP_PWRGD_3V 2 Q31
U33 +1V_VCCST +3V FDV301N
1 5
1
NC VCC
1
R485 +1V_VCCST
2 C628 10K_4 R74
(36) IMVP_PWRGD A 0.1u/16V_4 1K_4
A A
2
3 4 R488
GND Y IMVP_PWRGD_3V (8)
2
*1K_4
74AUP1G07GW
THRMTRIP# 1 3
SYS_SHDN# (31,40)
Q5 MMBT3904-7-F
R478 *0_4

PROJECT : ZRW
sualaptop365.edu.vn
Size Document Number Rev
3A
Skylake 1/4 (DDI/eDP)
5 4 3 2 1
5 4 3 2 1
Change Data and DQS to interleave.

03
SKL ULT (DDR3L) ?
SKL ULT (DDR3L)
SKL_ULT ?
U35B SKL_ULT
U35C
D AU53 D
DDR0_CKN[0] M_A_CLK0# (12)
(12) M_A_DQ0 M_A_DQ0 AL71 AT53 M_A_CLK0 (12)
M_A_DQ1 AL68 DDR0_DQ[0] DDR0_CKP[0] AU55 M_B_DQ0 AF65 AN45
(12) M_A_DQ1 DDR0_DQ[1] DDR0_CKN[1] M_A_CLK1# (12) (13) M_B_DQ0 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] M_B_CLK0# (13)
(12) M_A_DQ2 M_A_DQ2 AN68 AT55 M_A_CLK1 (12) (13) M_B_DQ1 M_B_DQ1 AF64 AN46 M_B_CLK1# (13)
M_A_DQ3 AN69 DDR0_DQ[2] DDR0_CKP[1] M_B_DQ2 AK65 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] AP45
(12) M_A_DQ3 DDR0_DQ[3] (13) M_B_DQ2 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] M_B_CLK0 (13)
(12) M_A_DQ4 M_A_DQ4 AL70 BA56 M_A_CKE0 (12) (13) M_B_DQ3 M_B_DQ3 AK64 AP46 M_B_CLK1 (13)
M_A_DQ5 AL69 DDR0_DQ[4] DDR0_CKE[0] BB56 M_B_DQ4 AF66 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1]
(12) M_A_DQ5 DDR0_DQ[5] DDR0_CKE[1] M_A_CKE1 (12) (13) M_B_DQ4 DDR1_DQ[4]/DDR0_DQ[20]
(12) M_A_DQ6 M_A_DQ6 AN70 AW56 (13) M_B_DQ5 M_B_DQ5 AF67 AN56 M_B_CKE0 (13)
M_A_DQ7 AN71 DDR0_DQ[6] DDR0_CKE[2] AY56 M_B_DQ6 AK67 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] AP55
(12) M_A_DQ7 DDR0_DQ[7] DDR0_CKE[3] (13) M_B_DQ6 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] M_B_CKE1 (13)
(12) M_A_DQ8 M_A_DQ8 AR70 (13) M_B_DQ7 M_B_DQ7 AK66 AN55
M_A_DQ9 AR68 DDR0_DQ[8] AU45 M_B_DQ8 AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] AP53
(12) M_A_DQ9 DDR0_DQ[9] DDR0_CS#[0] M_A_CS#0 (12) (13) M_B_DQ8 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
(12) M_A_DQ10 M_A_DQ10 AU71 AU43 M_A_CS#1 (12) (13) M_B_DQ9 M_B_DQ9 AF68
M_A_DQ11 AU68 DDR0_DQ[10] DDR0_CS#[1] AT45 M_A_ODT0 M_B_DQ10 AH71 DDR1_DQ[9]/DDR0_DQ[25] BB42
(12) M_A_DQ11 DDR0_DQ[11] DDR0_ODT[0] M_A_ODT0_DIMM (12) (13) M_B_DQ10 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] M_B_CS#0 (13)
(12) M_A_DQ12 M_A_DQ12 AR71 AT43 M_A_ODT1 M_A_ODT1_DIMM (12) (13) M_B_DQ11 M_B_DQ11 AH68 AY42 M_B_CS#1 (13)
M_A_DQ13 AR69 DDR0_DQ[12] DDR0_ODT[1] M_B_DQ12 AF71 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] BA42 M_B_ODT0
(12) M_A_DQ13 DDR0_DQ[13] (13) M_B_DQ12 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] M_B_ODT0_DIMM (13)
(12) M_A_DQ14 M_A_DQ14 AU70 BA51 M_A_A5 (13) M_B_DQ13 M_B_DQ13 AF69 AW42 M_B_ODT1 M_B_ODT1_DIMM (13)
M_A_DQ15 AU69 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] BB54 M_A_A9 M_B_DQ14 AH70 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1]
(12) M_A_DQ15 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] (13) M_B_DQ14 DDR1_DQ[14]/DDR0_DQ[30]
(12) M_A_DQ16 M_A_DQ16 BB65 BA52 M_A_A6 (13) M_B_DQ15 M_B_DQ15 AH69 AY48 M_B_A5
M_A_DQ17 AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 M_A_A8 M_B_DQ16 AT66 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AP50 M_B_A9
(12) M_A_DQ17 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] (13) M_B_DQ16 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
(12) M_A_DQ18 M_A_DQ18 AW63 AW52M_A_A7 (13) M_B_DQ17 M_B_DQ17 AU66 BA48 M_B_A6
M_A_DQ19 AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AY55 M_B_DQ18 AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BB48 M_B_A8
(12) M_A_DQ19 DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BS#2 (12) (13) M_B_DQ18 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
(12) M_A_DQ20 M_A_DQ20 BA65 AW54M_A_A12 (13) M_B_DQ19 M_B_DQ19 AN65 AP48 M_B_A7
M_A_DQ21 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 M_A_A11 M_B_DQ20 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AP52
(12) M_A_DQ21 DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] (13) M_B_DQ20 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BS#2 (13)
(12) M_A_DQ22 M_A_DQ22 BA63 BA55 M_A_A15 (13) M_B_DQ21 M_B_DQ21 AP66 AN50 M_B_A12
M_A_DQ23 BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# AY54 M_A_A14 M_B_DQ22 AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AN48 M_B_A11
(12) M_A_DQ23 DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] (13) M_B_DQ22 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
(12) M_A_DQ24 M_A_DQ24 BA61 (13) M_B_DQ23 M_B_DQ23 AU65 AN53 M_B_A15
M_A_DQ25 AW61 DDR0_DQ[24]/DDR0_DQ[40] AU46 M_A_A13 M_B_DQ24 AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# AN52 M_B_A14
(12) M_A_DQ25 DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] (13) M_B_DQ24 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
(12) M_A_DQ26 M_A_DQ26 BB59 AU48 M_A_CAS# (12) (13) M_B_DQ25 M_B_DQ25 AU61
M_A_DQ27 AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] AT46 M_B_DQ26 AP60 DDR1_DQ[25]/DDR0_DQ[57] BA43 M_B_A13
(12) M_A_DQ27 DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_WE# (12) (13) M_B_DQ26 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
(12) M_A_DQ28 M_A_DQ28 BB61 AU50 M_A_RAS# (12) (13) M_B_DQ27 M_B_DQ27 AN60 AY43 M_B_CAS# (13)
M_A_DQ29 AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AU52 M_B_DQ28 AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY44
(12) M_A_DQ29 DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] M_A_BS#0 (12) (13) M_B_DQ28 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_WE# (13)
(12) M_A_DQ30 M_A_DQ30 BA59 AY51 M_A_A2 (13) M_B_DQ29 M_B_DQ29 AP61 AW44 M_B_RAS# (13)
C M_A_DQ31 AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AT48 M_B_DQ30 AT60 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44 C
(12) M_A_DQ31 DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BS#1 (12) (13) M_B_DQ30 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BS#0 (13)
(12) M_A_DQ32 M_A_DQ32 AY39 AT50 M_A_A10 (13) M_B_DQ31 M_B_DQ31 AU60 AY47 M_B_A2
M_A_DQ33 AW39 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] BB50 M_A_A1 M_B_DQ32 AU40 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BA44
(12) M_A_DQ33 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] (13) M_B_DQ32 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BS#1 (13)
(12) M_A_DQ34 M_A_DQ34 AY37 AY50 M_A_A0 (13) M_B_DQ33 M_B_DQ33 AT40 AW46M_B_A10
M_A_DQ35 AW37 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] BA50 M_A_A3 M_B_DQ34 AT37 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AY46 M_B_A1
(12) M_A_DQ35 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] (13) M_B_DQ34 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
(12) M_A_DQ36 M_A_DQ36 BB39 BB52 M_A_A4 (13) M_B_DQ35 M_B_DQ35 AU37 BA46 M_B_A0
M_A_DQ37 BA39 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_B_DQ36 AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] BB46 M_B_A3
(12) M_A_DQ37 DDR0_DQ[37]/DDR1_DQ[5] (13) M_B_DQ36 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3]
(12) M_A_DQ38 M_A_DQ38 BA37 AM70 M_A_DQS#0 M_A_DQS#0 (12) (13) M_B_DQ37 M_B_DQ37 AP40 BA47 M_B_A4
M_A_DQ39 BB37 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] AM69 M_A_DQS0 M_B_DQ38 AP37 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4]
(12) M_A_DQ39 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] M_A_DQS0 (12) (13) M_B_DQ38 DDR1_DQ[38]/DDR1_DQ[22]
(12) M_A_DQ40 M_A_DQ40 AY35 AT69 M_A_DQS#1 M_A_DQS#1 (12) (13) M_B_DQ39 M_B_DQ39 AR37 AH66 M_B_DQS#0 M_B_DQS#0 (13)
M_A_DQ41 AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] AT70 M_A_DQS1 M_B_DQ40 AT33 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] AH65 M_B_DQS0
(12) M_A_DQ41 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] M_A_DQS1 (12) (13) M_B_DQ40 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] M_B_DQS0 (13)
(12) M_A_DQ42 M_A_DQ42 AY33 BA64 M_A_DQS#2 M_A_DQS#2 (12) (13) M_B_DQ41 M_B_DQ41 AU33 AG69 M_B_DQS#1 M_B_DQS#1 (13)
M_A_DQ43 AW33 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 M_A_DQS2 M_B_DQ42 AU30 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] AG70 M_B_DQS1
(12) M_A_DQ43 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] M_A_DQS2 (12) (13) M_B_DQ42 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] M_B_DQS1 (13)
(12) M_A_DQ44 M_A_DQ44 BB35 AY60 M_A_DQS#3 M_A_DQS#3 (12) (13) M_B_DQ43 M_B_DQ43 AT30 AR66 M_B_DQS#2 M_B_DQS#2 (13)
M_A_DQ45 BA35 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 M_A_DQS3 M_B_DQ44 AR33 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] AR65 M_B_DQS2
(12) M_A_DQ46 M_A_DQ46 BA33 BA38 M_A_DQS#4 M_A_DQS#4 (12) (13) M_B_DQ45 M_B_DQ45 AP33 AR61 M_B_DQS#3 M_B_DQS#3 (13)
M_A_DQ47 BB33 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] AY38 M_A_DQS4 M_B_DQ46 AR30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] AR60 M_B_DQS3
(12) M_A_DQ48 M_A_DQ48 AY31 AY34 M_A_DQS#5 M_A_DQS#5 (12) (13) M_B_DQ47 M_B_DQ47 AP30 AT38 M_B_DQS#4 M_B_DQS#4 (13)
M_A_DQ49 AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 M_A_DQS5 M_B_DQ48 AU27 DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] AR38 M_B_DQS4
(12) M_A_DQ49 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] M_A_DQS5 (12) (13) M_B_DQ48 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] M_B_DQS4 (13)
(12) M_A_DQ50 M_A_DQ50 AY29 BA30 M_A_DQS#6 M_A_DQS#6 (12) (13) M_B_DQ49 M_B_DQ49 AT27 AT32 M_B_DQS#5 M_B_DQS#5 (13)
M_A_DQ51 AW29 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 M_A_DQS6 M_B_DQ50 AT25 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] AR32 M_B_DQS5
(12) M_A_DQ51 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] M_A_DQS6 (12) (13) M_B_DQ50 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] M_B_DQS5 (13)
(12) M_A_DQ52 M_A_DQ52 BB31 AY26 M_A_DQS#7 M_A_DQS#7 (12) (13) M_B_DQ51 M_B_DQ51 AU25 AR25 M_B_DQS#6 M_B_DQS#6 (13)
M_A_DQ53 BA31 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 M_A_DQS7 M_B_DQ52 AP27 DDR1_DQ[51] DDR1_DQSN[6] AR27 M_B_DQS6
(12) M_A_DQ53 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] M_A_DQS7 (12) (13) M_B_DQ52 DDR1_DQ[52] DDR1_DQSP[6] M_B_DQS6 (13)
(12) M_A_DQ54 M_A_DQ54 BA29 (13) M_B_DQ53 M_B_DQ53 AN27 AR22 M_B_DQS#7 M_B_DQS#7 (13)
M_A_DQ55 BB29 DDR0_DQ[54]/DDR1_DQ[38] AW50 DDR0_ALERT# M_B_DQ54 AN25 DDR1_DQ[53] DDR1_DQSN[7] AR21 M_B_DQS7
(12) M_A_DQ55 DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# (13) M_B_DQ54 DDR1_DQ[54] DDR1_DQSP[7] M_B_DQS7 (13)
(12) M_A_DQ56 M_A_DQ56 AY27 AT52 TP_DDR0_PARITY# (13) M_B_DQ55 M_B_DQ55 AP25
DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR TP21 DDR1_DQ[55]
(12) M_A_DQ57 M_A_DQ57 AW27 (13) M_B_DQ56 M_B_DQ56 AT22 AN43 DDR1_ALERT#
M_A_DQ58 AY25 DDR0_DQ[57]/DDR1_DQ[41] AY67 M_B_DQ57 AU22 DDR1_DQ[56] DDR1_ALERT# AP43 TP_DDR1_PARITY#
(12) M_A_DQ58 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA +VREF_CA_CPU (13) M_B_DQ57 DDR1_DQ[57] DDR1_PAR TP18
(12) M_A_DQ59 M_A_DQ59 AW25 AY68 +VREFDQ_SA_M3 (13) M_B_DQ58 M_B_DQ58 AU21 AT13 CPU_DRAMRST#
M_A_DQ60 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR CH - A
DDR0_VREF_DQ BA67 M_B_DQ59 AT21 DDR1_DQ[58] DRAM_RESET# AR18 SM_RCOMP_0
(12) M_A_DQ60 DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ +VREFDQ_SB_M3 (13) M_B_DQ59 DDR1_DQ[59] DDR_RCOMP[0]
(12) M_A_DQ61 M_A_DQ61 BA27 (13) M_B_DQ60 M_B_DQ60 AN22 AT18 SM_RCOMP_1
M_A_DQ62 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_VTT_CTRL M_B_DQ61 AP22 DDR1_DQ[60] DDR_RCOMP[1] AU18 SM_RCOMP_2
B
(12) M_A_DQ62 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL +3V_S5 (13) M_B_DQ61 DDR1_DQ[61] DDR_RCOMP[2] B
(12) M_A_DQ63 M_A_DQ63 BB25 (13) M_B_DQ62 M_B_DQ62 AP21
DDR0_DQ[63]/DDR1_DQ[47] M_B_DQ63 AN21 DDR1_DQ[62] DDR CH - B
2 OF 20 +1.35VSUS (13) M_B_DQ63 DDR1_DQ[63]
SKL_ULT/BGA 3 OF 20
REV = 1 ?
SKL_ULT/BGA
R682 REV = 1 ?
2
*100K_4
M_B_A[15:0]
M_B_A[15:0] (13)
M_A_A[15:0]
M_A_A[15:0] (12)
R621 *10K_4 1 3 DDR_VTTT_PG_CTRL (35)
DDR0_ALERT#
Q35 DDR1_ALERT#
*DTC144EU
REV:E connect to GND

Stuff Q54 for both UMA and GPU in DDR_VTT_CNTL
DRAM COMP
SM_RCOMP_0 120/F_4 R685

DRAMRST SM_RCOMP_1 80.6/F_4 R678
+1.35VSUS
1 SM_RCOMP_2 100/F_4 R681
A R679 A
470_4
CPU DRAM
2
CPU_DRAMRST# R670 *short_4 DDR3_DRAMRST# (12,13)
1
C750
*0.1u/16V_4
2
PROJECT : ZRW
3A
Skylake 2/3 (DDR3 I/F)
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
H_PECI (50ohm)
SKL ULT (SIDEBAND ) GPIO 04
Route on microstrip only SKL_ULT
Spacing >18 mils U35F
Trace Length: 0.4~6.125 iches Add GPU Power Control Siganls LPSS ISH
H_PWRGOOD (50ohm) AN8 +3V_S5

(41) VGPU_EN GPP_B15/GSPI0_CS# P2
Trace Length: 1~11.25 inches (14) DGPU_HOLD_RST# AP7 +3V_S5 +3V_S5 GPP_D9
GPP_B16/GSPI0_CLK P3
AP8 +3V_S5 +3V_S5 GPP_D10
(42) DGPU_PWR_EN GPP_B17/GSPI0_MISO P4
GSPI0_MOSI AR7 +3V_S5 +3V_S5 GPP_D11
D GPP_B18/GSPI0_MOSI P1 D
+3V_S5 GPP_D12
AM5 +3V_S5
(16) DGPU_PWROK GPP_B19/GSPI1_CS# M4
(15,17) GC6_FB_EN AN7 +3V_S5 +3V_S5 GPP_D5/ISH_I2C0_SDA
GPP_B20/GSPI1_CLK N3
AP5 +3V_S5 +3V_S5 GPP_D6/ISH_I2C0_SCL
+3V_S5 (17) DGPU_EVENT# GPP_B21/GSPI1_MISO
GSPI1_MOSI AN5 +3V_S5
GPP_B22/GSPI1_MOSI N1
+3V_S5 GPP_D7/ISH_I2C1_SDA N2
AB1 +3V_S5 +3V_S5 GPP_D8/ISH_I2C1_SCL
(27) ACCEL_INTA GPP_C8/UART0_RXD
2.2K_4 R167 I2C0_SDA Touch PAD (25) ODD_PRSNT# AB2 +3V_S5
GPP_C9/UART0_TXD AD11
2.2K_4 R166 I2C0_SCL TPD_INT#_D W4 +3V_S5 +1.8V_S5 GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_C10/UART0_RTS# AD12
*2.2K_4 R165 I2C1_SDA (21) TP_INT_PCH AB3 +3V_S5 +1.8V_S5 GPP_F11/I2C5_SCL/ISH_I2C2_SCL
*2.2K_4 R169 I2C1_SCL GPP_C11/UART0_CTS#
Touch Screen UART2_RXD AD1
GPP_C20/UART2_RXD +3V_S5 U1 Reserve UART FFC connector for Win 7 debug
UART2_TXD AD2 +3V_S5 +3V_S5 GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_C21/UART2_TXD U2 +3V_S5
PU 2.2K for touch pad I2C bus(400 KHz) UART2 for RMT UART2_RTS# AD3 +3V_S5 +3V_S5 GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_C22/UART2_RTS# U3
UART2_CTS# AD4 +3V_S5 +3V_S5 GPP_D15/ISH_UART0_RTS#
GPP_C23/UART2_CTS# U4
+3V_S5 GPP_D16/ISH_UART0_CTS#/SML0BALERT#
+3V GPU Control PU/PD I2C0_SDA U7
AC1
UART2_RXD R275 *49.9K/F_4
(27) I2C0_SDA GPP_C16/I2C0_SDA
+3V_S5 +3V_S5 GPP_C12/UART1_RXD/ISH_UART1_RXD AC2
Touch PAD I2C0_SCL U6 +3V_S5 +3V_S5 GPP_C13/UART1_TXD/ISH_UART1_TXD UART2_TXD R280 *49.9K/F_4
(27) I2C0_SCL GPP_C17/I2C0_SCL AC3
+3V_S5 GPP_C14/UART1_RTS#/ISH_UART1_RTS# UART2_RTS# R283 *49.9K/F_4
AB4
*EV@10K_4 R220 VGPU_EN *IV@10K_4 R196 I2C1_SDA U8 +3V_S5 +3V_S5 GPP_C15/UART1_CTS#/ISH_UART1_CTS# UART2_CTS# R290 *49.9K/F_4
(21) I2C1_SDA GPP_C18/I2C1_SDA
Touch Screen I2C1_SCL U9 +3V_S5
(21) I2C1_SCL GPP_C19/I2C1_SCL AY8
*10K_4 R257 DGPU_PWR_EN *100K_4 R256 +3V_S5 GPP_A18/ISH_GP0 BA8
AH9 +1.8V_S5 +3V_S5 GPP_A19/ISH_GP1
GPP_F4/I2C2_SDA BB7 +5V
*10K_4 R204 GC6_FB_EN *10K_4 R199 AH10 +1.8V_S5 +3V_S5 GPP_A20/ISH_GP2
GPP_F5/I2C2_SCL BA7
+3V_S5 GPP_A21/ISH_GP3 AY7
1A-1 20131015 For GC6 NV DG GC6_FB_EN PD. AH11 +1.8V_S5 +3V_S5 GPP_A22/ISH_GP4 CN3
GPP_F6/I2C3_SDA AW7
AH12 +1.8V_S5 +3V_S5 GPP_A23/ISH_GP5
+3V GPP_F7/I2C3_SCL AP13
+3V_S5 GPP_A12/BM_BUSY#/ISH_GP6
1
AF11 +1.8V_S5 UART2_RXD
AF12 GPP_F8/I2C4_SDA UART2_TXD 2
GPP_F9/I2C4_SCL +1.8V_S5 3 7
R208 10K_4 DGPU_HOLD_RST# UART2_RTS#
UART2_CTS# 4 8
6 OF 20 5
SKL_ULT/BGA 6
REV = 1 ?
DGPU_PW_CTRL#
high UMA Only *UART Function
C C
GPU power is control by PCH U35G SKL_ULT
low GPIO (Discrete, SG or Optimize)
HDA C742 *10p/50V_4 AUDIO
+3V R667 33_4 HDA_SYNC_R BA22

(24) PCH_AZ_CODEC_SYNC HDA_SYNC/I2S0_SFRM
R644 33_4 HDA_BCLK_R AY22
(2) DGPU_PW_CTRL# (24) PCH_AZ_CODEC_BITCLK HDA_BLK/I2S0_SCLK
(24) PCH_AZ_CODEC_SDOUT R645 33_4 HDA_SDO_R BB22 SDIO/SDXC
BA21 HDA_SDO/I2S0_TXD
(24) PCH_AZ_CODEC_SDIN0 HDA_SDI0/I2S0_RXD
R127 EV@100K_4 DGPU_PW_CTRL# R115 IV@1K_4 AY21 +3V_S5 AB11
DGPU_PWROK R110 *10K_4 R660 33_4 HDA_RST#_R AW22 HDA_SDI1/I2S1_RXD SD GPI GPP_G0/SD_CMD AB13
(24) PCH_AZ_CODEC_RST# HDA_RST#/I2S1_SCLK
+3V_S5 SD GPI GPP_G1/SD_DATA0
J5 +3V_S5 AB12
AY20 GPP_D23/I2S_MCLK +3V_S5 SD GPI GPP_G2/SD_DATA1 W12
DGPU_PWROK PD on GPU side I2S1_SFRM
+3V_S5 SD GPI GPP_G3/SD_DATA2
C739 AW20 +3V_S5 W11
*10p/50V_4 I2S1_TXD SD GPI GPP_G4/SD_DATA3 W10
+3V_S5 SD GPI GPP_G5/SD_CD#
AK7 +1.8V_S5 +3V_S5 W8
AK6 GPP_F1/I2S2_SFRM SD GPI GPP_G6/SD_CLK W7
GPP_F0/I2S2_SCLK +1.8V_S5 +3V_S5 SD GPI GPP_G7/SD_WP
DGPU_PW_CTRL# VGA H/W Setup
Reserve connect to DMIC (acer request 1/14) AK9 +1.8V_S5
Signal Menu AK10 GPP_F2/I2S2_TXD BA9
GPP_F3/I2S2_RXD +1.8V_S5 +3V_S5 GPP_A17/SD_PWR_EN#/ISH_GP7 BB9
UMA Only 1 UMA Hidden UMA boot +3V_S5 GPP_A16/SD_1P8_SEL
R769 *33_4 DMIC_CLK0_R H5 AB7 200/F_4 R174
(24) DMIC_CLK0_L GPP_D19/DMIC_CLK0 +3V_S5 SD_RCOMP
(24) DMIC_DATA0_L R770 *33_4 DMIC_DATA0_R D7
SG/Optimise 0 GPU Hidden GPU boot GPP_D20/DMIC_DATA0 +3V_S5
D8 AF13
Strapping C8 GPP_D17/DMIC_CLK1 +3V_S5 +1.8V_S5 GPP_F23
SPKR R624 *20K_4 GPP_D18/DMIC_DATA1 +3V_S5
(24) SPKR SPKR AW5
545659-103 GPP_B14/SPKR +3V_S5
Skylake-U Strapping Table SKL_ULT/BGA

REV = 1
7 OF 20
Touchpad INT +3V_S5
?
Pin Name Strap description Sampled Configuration note TPD_INT#_D TDI@100K_4 R177
0 = *Disable Top Swap (iPD 20K) R625 *1K_4 SPKR
B GPP_B14 (SPKR) Top-Block Swap override PCH_PWROK +3V B
1 = Enable Top Swap Mode
0 = *Disable No Reboot (iPD 20K) GSPI0_MOSI +3V
GPP_B18 No reboot PCH_PWROK +3V R619 *1K_4
(GSPI0_MOSI) 1 = Enable No Reboot Mode S5 S5
2
0 = *Disable Intel ME Cryp to TLS(iPD 20K) R160 *10K_4 1 3 TPD_INT#_D
GPP_C2 TLS Confidentiality RSMRST# +3V_S5 SMBALERT# (7) (27,29) TPD_INT#
(SMBALERT#) 1 = Enable Intel ME Cryp to TLS Q20
0 = *SPI (iPD 20K) TDI@2N7002K
GPP_B22 Boot BIOS Strap Bit (BBS) PCH_PWROK +3V R207 *1K_4 GSPI1_MOSI
1 = LPC R164 *0_4
(GSPI1_MOSI)
0 = *LPC is selected for EC (iPD 20K)
GPP_C5 eSPI or LPC RSMRST# +3V_S5 R586 *1K_4 SML0ALERT# (7)
(SML0ALERT#) 1 = eSPI selected for EC
SPI0_MOSI Reserved RSMRST# (iPU 15 ~ 40K)
SPI0_MISO Reserved RSMRST# (iPU 15 ~ 40K)
GPP_B23
(SML1ALERT# Reserved RSMRST# (iPD 20K)
/PCHHOT#)
SPI0_IO2 Reserved RSMRST# (iPU 15 ~ 40K)
A SPI0_IO3 Reserved RSMRST# (iPU 15 ~ 40K) A
0 = *Enable security in the Flash

HDA_SDO / Flash Descriptor Security
Description (iPD 20K) change location to near CPU to prevent impact HDA_SDO signal
I2S_TXD0 Override / Intel ME Debug Mode PCH_PWROK
1 = Disable Flash Descriptor Security (Override) HDA_SDO_R R737 1K_4
ME_WR# (29)
GPP_E19 0 = *Port B is not detected (iPD 20K)

Display Port B Detected PCH_PWROK
(DDPB_CTRLDATA)
1 =Port B is detected Quanta Computer Inc.
0 = *Port C is not detected (iPD 20K) PROJECT : ZRW
GPP_E21
sualaptop365.edu.vn
Display Port C Detected PCH_PWROK 1 =Port C is detected Size Document Number Rev
(DDPC_CTRLDATA) 3A
Skylake 6/7 (PEG/DMI/FDI)
5 4 3 2 1
5 4 3 2 1
+VCCCORE
SKL_ULT ? +VCCCORE
U35L
Backside cap
05
CPU POWER 1 OF 4
A30
A34 VCC_A30 VCC_G32
G32
G33
Primary side cap
C184 A39 VCC_A34 S0 VCC VCC_G33 G35
C243 C233 C226 C203 C219 C224 C236 C255 C251 A44 VCC_A39 0.55V~1.5V VCC_G35 G37 C666 C645 C144 C650 C659 C150
1U/6.3V_2 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 AK33 VCC_A44 VCC_G37 G38
VCC_AK33 2+2 peak 24A VCC_G38
47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8
AK35 2+2 TPY 17A G40
AK37 VCC_AK35 VCC_G40 G42
Backside cap AK38
AK40
VCC_AK37
VCC_AK38 2+3e peak 24A
VCC_G42
VCC_J30
J30
J33
Primary side cap
VCC_AK40 2+3e TPY 17A VCC_J33
AL33 J37
C214 C245 AL37 VCC_AL33 VCC_J37 J40 C679 C667 C674 C664 C673 C675 C663 C678
C676 C258 C259 C647 C651 C657 C257 AL40 VCC_AL37 VCC_J40 K33 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4
1U/6.3V_2 1U/6.3V_2 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AM32 VCC_AL40 VCC_K33 K35
AM33 VCC_AM32 VCC_K35 K37
AM35 VCC_AM33 VCC_K37 K38
D
Backside cap AM37
AM38
VCC_AM35
VCC_AM37
VCC_K38
VCC_K40
K40
K42 R96
+VCCCORE
100/F_4 100 ohm Near CPU D
G30 VCC_AM38 VCC_K42 K43
VCC_G30 VCC_K43 VCORE_SENSE (36)
C189 C252 C222 C235 VCORESS_SENSE (36)
C273 C272 C282 C289 TP12 K32 E32 +1V_VCCST
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 RSVD_K32 VCC_SENSE E33 R98 100/F_4 SVID Layout note: need routing together
TP20 AK32 VSS_SENSE and ALERT need between CLK and DATA.
RSVD_AK32 B63 H_CPU_SVIDART#
Backside cap +VCCOPC
AB62
P62 VCCOPC_AB62S0 1.0V 3A
VIDALERT#
VIDSCK
A63
D64
H_CPU_SVIDCLK
H_CPU_SVIDDAT R138 C814 C815 C816 C817 C818 C819
For 2+3e CPU V62 VCCOPC_P62 VIDSOUT 100/F_4 1000P/50V_4 *1000P/50V_4 *1000P/50V_4 *1000P/50V_4 *1000P/50V_4 *1000P/50V_4
C212 C196 C201 C262 C215 C227 VCCOPC_V62 G20
VCCSTG_G20 +VCCSTG
C246 +1.8V_PRIM +1.8V_PRIM H63
1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 VCC_OPC_1P8_H63 C174
1U/6.3V_2 R172 GT3@100/F_4 G61
Sx H_CPU_SVIDDAT
+VCCOPC VCC_OPC_1P8_G61 1.8V 50mA 1U/6.3V_4
H_CPU_SVIDDAT (36)
Backside cap (33) +VCCOPC_SRC R634

R636
GT3@0_4
GT3@0_4
AC63
AE63 VCCOPC_SENSE Place PU resistor
(33) 681_AGND VSSOPC_SENSE GT3 CPU close to CPU +1V_VCCST
REV:F add 1000p
C181 C228 C269 C237 C209 C285 R176 GT3@100/F_4 AE62
C200 AG62 VCCEOPIO
1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 VCCEOPIO S0 1.0V 3A
Place PU resistor
1U/6.3V_2 +VCCEOPIO
AL63 close to CPU R134
AJ62 VCCEOPIO_SENSE 54.9/F_4
For 2+3e CPU VSSEOPIO_SENSE
100 ohm near CPU H_CPU_SVIDART# R552 220_4 VR_SVID_ALERT#_VCORE (36)
12 OF 20
+VCCEOPIO Backside cap +VCCOPC_SRC

681_AGND
R633
R632
GT3@0_4
GT3@0_4
SKL_ULT/BGA
REV =1 ?
SKL_ULT ? +VCCGT
U35M H_CPU_SVIDCLK
C708 C709 For 2+3e CPU H_CPU_SVIDCLK (36)
GT3@10u/6.3V_4 GT3@10u/6.3V_4 CPU POWER 2 OF 4
A48 VCCGT
N70
N71
Primary side cap
A53 VCCGT VCCGT R63
1.0V_CPU 3A
Backside cap +VCCOPC
A58
A62
VCCGT
VCCGT S0 VCCGT
VCCGT
VCCGT
R64
R65
C199 C190 C702 C690 C248 C697 C696
A66 VCCGT 0.55~1.5V VCCGT R66

47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8
+1.8V_PRIM
Backside cap C682
C688 C684 C681 C685 C683 C689 AA63
AA64
VCCGT
VCCGT 2+2 peak 31A
VCCGT
VCCGT
R67
R68 Primary side cap
VCCGT 2+2 TPY 15A VCCGT
C687 C686 GT3@1U/6.3V_2
GT3@10u/6.3V_4 GT3@1U/6.3V_2
GT3@1U/6.3V_2
GT3@1U/6.3V_2
GT3@1U/6.3V_2
GT3@1U/6.3V_2 AA66 R69
GT3@10u/6.3V_4 GT3@10u/6.3V_4 For 2+3e CPU AA67 VCCGT
2+3e peak 56A
VCCGT R70
AA69 VCCGT VCCGT R71 C693 C705 C178 C706 C171 C707 C210
VCCGT 2+3e TPY 17A VCCGT
AA70 T62 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 47u/6.3V_6
For 2+3e CPU AA71 VCCGT VCCGT U65
C
R565 AC64 VCCGT VCCGT U68 C
+1.8V_S5 GT3@0_6 +1.8V_PRIM +VCCGT

AC65
AC66
VCCGT
VCCGT
VCCGT
VCCGT
U71
W63
Primary side cap E3A C210 change to 47u/6.3v_6
Backside cap AC67
AC68
VCCGT
VCCGT
VCCGT
VCCGT
W64
W65
AC69 VCCGT VCCGT W66 C692 C704 C202 C694 C691 C703
AC70 VCCGT VCCGT W67 22u/6.3V_6 22u/6.3V_6 47u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
C186 C185 C155 C158 C232 C218 C151 C161 C223 C148 AC71 VCCGT VCCGT W68
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 J43 VCCGT VCCGT W69
J45 VCCGT VCCGT W70
VCCGT VCCGT E3A C202 change to 47u/6.3v_6
J46 W71
J48 VCCGT VCCGT Y62
Backside cap J50
J52
VCCGT
VCCGT
VCCGT +VCCGT
Primary side cap
C197 C194 C193 C188 C241 C240 C239 C198 C204 C206 J53 VCCGT S0 VCCGTX AK42
J55 VCCGT 0.55~1.5V VCCGTX_AK42 AK43
1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 J56 VCCGT VCCGTX_AK43 AK45
VCCGT 2+2 X VCCGTX_AK45
J58 AK46 C303 C310 C277 C302 C307 C274 C275 C276
J60 VCCGT VCCGTX_AK46 AK48 GT3@22u/6.3V_6
GT3@22u/6.3V_6
22u/6.3V_6 GT3@22u/6.3V_6
GT3@22u/6.3V_6
22u/6.3V_6 22u/6.3V_6 GT3@22u/6.3V_6
VCCGT 2+3e peak 6A VCCGTX_AK48
K48 2+3e TPY 4A VCCGTX_AK50 AK50
K50 VCCGT AK52
C205 C195 K52 VCCGT VCCGTX_AK52 AK53
VCCGT VCCGTX_AK53 REV:F Stuff C277,C274,C275
K53 AK55
1U/6.3V_2 1U/6.3V_2 K55 VCCGT VCCGTX_AK55 AK56
K56 VCCGT VCCGTX_AK56 AK58 For 2+3e CPU
K58 VCCGT VCCGTX_AK58 AK60
K60 VCCGT VCCGTX_AK60 AK70
L62 VCCGT VCCGTX_AK70 AL43
L63 VCCGT VCCGTX_AL43 AL46
L64
L65
VCCGT
VCCGT
VCCGTX_AL46
VCCGTX_AL50
AL50
AL53
Backside cap
L68 VCCGT VCCGTX_AL60 AM48 C291 C279 C281 C324 C316 C280 C290 C317
L69 VCCGT VCCGTX_AM48 AM50 GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
L70 VCCGT VCCGTX_AM50 AM52
+VCCGT L71 VCCGT VCCGTX_AM52 AM53
M62 VCCGT VCCGTX_AM53 AM56
N63 VCCGT VCCGTX_AM56 AM58
N64 VCCGT VCCGTX_AM58 AU58
R155 N66 VCCGT VCCGTX_AU58 AU63
100/F_4 N67 VCCGT VCCGTX_AU63 BB57
100 ohm Near CPU VCCGT VCCGTX_BB57
N69 BB66
VCCGT VCCGTX_BB66
B B
(36) VCCGT_SENSE J70 AK62 TP86
J69 VCCGT_SENSE VCCGTX_SENSE AL61
(36) VSSGT_SENSE VSSGT_SENSE VSSGTX_SENSE TP87
R161 13 OF 20
SKL_ULT/BGA
100/F_4 REV = 1 ?
+1.35VSUS ?
U35N SKL_ULT
+VCCIO
S0
Backside cap AU23
S3
CPU POWER 3 OF 4
0.85V/0.95V AK28 Backside cap Imax 3(A)
AU28 VDDQ_AU23 DDR3L VCCIO AK30
VDDQ_AU28 1.35V 3.0A VCCIO
AU35 AL30
C313 C308 C311 C312 AU42 VDDQ_AU35 VCCIO AL42 C266 C297 C264 C298
C318 C328 BB23 VDDQ_AU42 2A VCCIO AM28 C284 C283
10u/6.3V_4 10u/6.3V_4 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 BB32 VDDQ_BB23 VCCIO AM30 10u/6.3V_4 10u/6.3V_4 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2
BB41 VDDQ_BB32 VCCIO AM42
BB47 VDDQ_BB41 VCCIO
Primary side cap

BB51 VDDQ_BB47
VDDQ_BB51 S0 1.15V VCCSA
AK23
AK25
Primary side cap
2+2 peak 5A VCCSA
2+2 TPY 4A G23
AM40 VCCSA G25 C701 C710 C700 C711
VDDQC 2+3e peak 5.1A VCCSA
2+3e TPY 5A G27
A18 VCCSA G28 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
C326 C323 C325 C327 VCCST S3 1.0V 120mA VCCSA J22
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 A22 VCCSA J23 +VCCSA
VCCSTG_A221.0V 40mA VCCSA J27
+VDDQC
AL23 S0
VCCPLL_OC
VCCSA
VCCSA
K23
K25
Backside cap
R194 *short_4 K20 S0 1.0V 260mA VCCSA K27
1 2 K21 VCCPLL_K20 VCCSA K28 C254 C238 C247 C229 C221 C263 C288
+1.35VSUS VCCPLL_K21 VCCSA K30 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4
Backside cap C299
C286
+1V_VCCST S3 1.0V 120mA VCCSA
AM23 TP17
1U/6.3V_2 10u/6.3V_4 VCCIO_SENSE AM22 TP14
C677
VSSIO_SENSE
H21
Backside cap
R550 *short_6 +VCCSTG VSSSA_SENSE H20 C207 C278 C216 C242 C260 C267 C249
+1V_SUS VCCSA_SENSE
Rev:F change to Shortpad 1U/6.3V_4 R109 100/F_4
1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2
Primary side cap SKL_ULT/BGA
14 OF 20
VSASS_SENSE (36)
C176 REV = 1 ? VSA_SENSE (36)
A R135 *short_6 A
+VCCIO
Backside cap
1U/6.3V_4 +VCCSA Primary side cap
Rev:F change to Shortpad +VCCPLL R122 100/F_4
C114 C643 C641 C165 C642 C157
+1V_SUS R112 *short_6 100 ohm near CPU 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4
Rev:F change to Shortpad C172
Primary side cap 1U/6.3V_4

PROJECT : ZRW
sualaptop365.edu.vn
3A
Skylake 12/13/14 (POWER)
5 4 3 2 1
5 4 3 2 1
Skylake ULT (GPU, SATA , ODD, CLK ,USB2&3)
U35H SKL_ULT
?
06
SSIC / USB3
PCIE/USB3/SATA
H8
USB3_1_RXN G8
USB3_RXN0
USB3_RXP0
(28)
(28)
PCH PU/PD +3V_S5
H13 USB3_1_RXP C13
(14) PEG_RX#0
G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN D13
USB3_TXN0 (28) MB USB3.0 CN16 ( Charger IC ) Down
(14) PEG_RX0 PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_TXP0 (28)
(14) PEG_TX#0 C653 EV@0.22u/10V_4 C_PEG_TX#0 B17
D
C652 EV@0.22u/10V_4 C_PEG_TX0 A17 PCIE1_TXN/USB3_5_TXN J6 USB_OC0# R541 10K_4
D
(14) PEG_TX0 PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN USB3_RXN1 (28)
H6 USB_OC1# R540 10K_4
USB3_2_RXP/SSIC_1_RXP USB3_RXP1 (28)
(14) PEG_RX#1 G11 B13 USB3_TXN1 (28) MB USB3.0 CN13 -> Up USB_OC2# R543 10K_4
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN A13 USB_OC3# R542 10K_4
(14) PEG_RX1 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB3_TXP1 (28)
(14) PEG_TX#1 C656 EV@0.22u/10V_4 C_PEG_TX#1 D16
C655 EV@0.22u/10V_4 C_PEG_TX1 C16 PCIE2_TXN/USB3_6_TXN J10
dGPU PEG*4 (14) PEG_TX1 PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN H10
H16 USB3_3_RXP/SSIC_2_RXP B15
(14) PEG_RX#2 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN +3V
G16 A15
(14) PEG_RX2 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP
(14) PEG_TX#2 C661 EV@0.22u/10V_4 C_PEG_TX#2 D17
C662 EV@0.22u/10V_4 C_PEG_TX2 C17 PCIE3_TXN E10
(14) PEG_TX2 PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15 SATA_DEVSLP0 R573 *10K_4
(14) PEG_RX#3 1A-1
F15 PCIE4_RXN USB3_4_TXN D15 SATA_DEVSLP1 R574 *10K_4
(14) PEG_RX3 PCIE4_RXP USB3_4_TXP
(14) PEG_TX#3 C654 EV@0.22u/10V_4 C_PEG_TX#3 B19 SATA_DEVSLP2 R575 *10K_4
C660 EV@0.22u/10V_4 C_PEG_TX3 A19 PCIE4_TXN AB9 PIRQA# R631 *10K_4
(14) PEG_TX3 PCIE4_TXP USB2N_1 USBP0- (28)
AB10 MB USB3.0 CN16 ( Charger IC ) Down
USB2P_1 USBP0+ (28)
(23) PCIE_RX5-_LAN F16
E16 PCIE5_RXN AD6 SATAGP1 R569 *10K_4
(23) PCIE_RX5+_LAN PCIE5_RXP USB2N_2 USBP1- (28)
LAN (23) PCIE_TX5-_LAN C668 0.1u/16V_4 PCIE_TX5- C19 AD7 USBP1+ (28) MB USB3.0 CN13 -> Up SATAGP2 R566 *10K_4
C669 0.1u/16V_4 PCIE_TX5+ D19 PCIE5_TXN USB2P_2
(23) PCIE_TX5+_LAN PCIE5_TXP AH3
G18 USB2N_3 AJ3
(26) PCIE_RX6-_WLAN PCIE6_RXN USB2P_3
F18
(26) PCIE_RX6+_WLAN PCIE6_RXP
WIFI (26) PCIE_TX6-_WLAN C648 0.1u/16V_4 PCIE_TX6- D20 AD9
PCIE6_TXN USB2N_4 USBP3- (28)
C649 0.1u/16V_4 PCIE_TX6+ C20 AD10 DB USB2.0
(26) PCIE_TX6+_WLAN PCIE6_TXP USB2P_4 USBP3+ (28) +3V_S5
Add SSD ID 1/14
F20 AJ1 USBP4- (26)
(25) SATA_RXN0 E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2
(25) SATA_RXP0 PCIE7_RXP/SATA0_RXP USB2P_5 USBP4+ (26) BT Hight is SSD , Low is ODD
HDD B21 USB2
(25) SATA_TXN0 PCIE7_TXN/SATA0_TXN
A21 AF6
(25) SATA_TXP0 PCIE7_TXP/SATA0_TXP USB2N_6 AF7 USBP5- (21)
USBP5+ (21) Touch Screen (25) SSD_ID R568 10K_4 SATAGP0 R570 100K_4
G21 USB2P_6
(25) SATA_RXN1 F21 PCIE8_RXN/SATA1A_RXN AH1
(25) SATA_RXP1 PCIE8_RXP/SATA1A_RXP USB2N_7 USBP6- (21)
ODD D21 AH2 USBP6+ (21) CCD
(25) SATA_TXN1 PCIE8_TXN/SATA1A_TXN USB2P_7
C21
(25) SATA_TXP1 PCIE8_TXP/SATA1A_TXP AF8
USB2N_8 USBP7- (28)
C E22 AF9 USBP7+ (28) Card reader C
E23 PCIE9_RXN USB2P_8
B23 PCIE9_RXP AG1
A23 PCIE9_TXN USB2N_9 AG2
PCIE9_TXP USB2P_9 Skylake-U userd 24 MHz (50 Ohm ESR) XTAL
F25 AH7
E25 PCIE10_RXN USB2N_10 AH8
PCIE10_RXP USB2P_10 USBCOMP
D23 C665 10P/50V_4
C23 PCIE10_TXN AB6 USBCOMP R178 113/F_4
Impedance = 50 ohm
PCIE10_TXP USB2_COMP Trace length < 500 mils 24MHz: BG624000078
AG3 USB2_ID R587 1K_4
USB2_ID
3
4
R562 100/F_4 PCIE_RCOMPN F5 AG4 R778 1K_4 Trace spacing = 15 mils 38.4MHz : ?
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE Y4
PCIE_RCOMPP +3V_S5 A9 USB_OC0# R536
XDP_PRDY# D56 GPP_E9/USB2_OC0# C9 USB_OC1#
USB_OC0# (28) MB U3 24MHz
+3V_S5 USB_OC1# (28) MB U3 1M_4
TP91 D61 PROC_PRDY# GPP_E10/USB2_OC1# D9
XDP_PREQ# +3V_S5 USB_OC2# USB_OC2# (28) DB U2
TP92
1
2
PIRQA# BB11 PROC_PREQ# GPP_E11/USB2_OC2# B9 USB_OC3# XTAL24_IN
GPP_A7/PIRQA#
+3V_S5 +3V_S5 GPP_E12/USB2_OC3# XTAL24_OUT C658 10P/50V_4
E28 +3V_S5 J1 SATA_DEVSLP0 DEVSLP0 (25)
E27 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 J2 SATA_DEVSLP1
D24 PCIE11_RXP/SATA1B_RXP +3V_S5 GPP_E5/DEVSLP1 J3 SATA_DEVSLP2
C24 PCIE11_TXN/SATA1B_TXN +3V_S5 GPP_E6/DEVSLP2
E30 PCIE11_TXP/SATA1B_TXP H2 SATAGP0
F30 PCIE12_RXN/SATA2_RXN +3V_S5 GPP_E0/SATAXPCIE0/SATAGP0 H3 SATAGP1 Note: Change Y4 to 38.4 MHz(ESR 30 ohm) for Cannonlake U
A25 PCIE12_RXP/SATA2_RXP +3V_S5 GPP_E1/SATAXPCIE1/SATAGP1 G4 SATAGP2
B25 PCIE12_TXN/SATA2_TXN +3V_S5 GPP_E2/SATAXPCIE2/SATAGP2
PCIE12_TXP/SATA2_TXP H1
+3V_S5 GPP_E8/SATALED#
CH01006JB08 -> 10p
8 OF 20 RTC Clock 32.768KHz (RTC) CH01506JB06 -> 15p
SKL_ULT/BGA CH-6806TB01 -> 6.8p
REV = 1 ?
C351 6.8p/50V_4 RTC_X1
1
Trace length < 1000 mils
Y2 R255
32.768KHZ 10M_4 BG332768453 -> SEG
U35J SKL_ULT ?
B B
C362 6.8p/50V_4 RTC_X2 BG332768104 -> TXC
2
CLOCK SIGNALS
N16S VGA
D42
(14) CLK_PCIE_VGA# CLKOUT_PCIE_N0
(14) CLK_PCIE_VGA C42
R235 CLK_PCIE_REQ0# AR10 CLKOUT_PCIE_P0
(14) CLK_PEGA_REQ# GPP_B5/SRCCLKREQ0# +3V_S5
*short_4
B42
A42 CLKOUT_PCIE_N1 F43 CLK_PCIE_XDPN
CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N TP93
CLK_PCIE_REQ1# AT7 E43 CLK_PCIE_XDPP
TP22 GPP_B6/SRCCLKREQ1# +3V_S5 CLKOUT_ITPXDP_P TP94 RTC Circuitry (RTC)
D41 BA17 SUSCLK
CLKOUT_PCIE_N2 +3V_S5 GPD8/SUSCLK SUSCLK (26) +3VPCU
C41 1B-1
CLK_PCIE_REQ2# AT8 CLKOUT_PCIE_P2 E37 XTAL24_IN
TP25 GPP_B7/SRCCLKREQ2# XTAL24_IN
+3V_S5 E35 XTAL24_OUT On SKL voltage at VCCRTC does not exceed 3.2V
D40 XTAL24_OUT
C40 CLKOUT_PCIE_N3 E42 XCLK_BIASREF R512 2.7K/F_4
CLKOUT_PCIE_P3 XCLK_BIASREF +1V_S5
TP73 CLK_PCIE_REQ3# AT10 R768 *60.4/F_4 R304
GPP_B8/SRCCLKREQ3# +3V_S5 AM18 RTC_X1
RTCX1 1.5K/F_4
+3V_RTC
+3V_RTC
B40 AM20 RTC_X2
LAN
(23) CLK_PCIE_LANN
A40 CLKOUT_PCIE_N4 RTCX2 D7
(23) CLK_PCIE_LANP CLKOUT_PCIE_P4 Reserve PD 60 ohm in E42
R229 CLK_PCIE_REQ4# AU8 AN18 SRTC_RST# +3V_RTC_2 R299
(23) CLK_PCIE_LAN_REQ#
*short_4 GPP_B9/SRCCLKREQ4# +3V_S5 SRTCRST# AM16 RTC_RST#
ball for Cannonlake U RTC_RST#
RTCRST# RTC_RST# (11)
E40 R308 1K_4 +3V_RTC_1
WLAN
(26) CLK_PCIE_WLANN CLKOUT_PCIE_N5 VCCRTC_2
1
(26) CLK_PCIE_WLANP E38 20K/F_4
R224 CLK_PCIE_REQ5# AU7 CLKOUT_PCIE_P5 R301 BAT54C
(26) PCIE_CLKREQ_WLAN#
*short_4 GPP_B10/SRCCLKREQ5# +3V_S5 1V power plane 45.3K/F_4 C380 J1
+3V_RTC_[0:2] 1u/6.3V_4 *JUMP
0.71 checklist p14
2
Rev:D change to shortpad R300
1
10 OF 20 BT1 SRTC_RST#
SKL_ULT/BGA
REV = 1 ?
20K/F_4
BAT_CONN
2
C381 C382
+3V Rev:D add for EC reset RTC 1u/6.3V_4 1u/6.3V_4
A SRTC_RST# RTC_RST# A
1A-2 2013/10/16 Chage +3V_RTC_0 to VCCTC_2.
CLK_PCIE_REQ0# R234 10K_4
3

CLK_PCIE_REQ2# R227 10K_4 1. AHL03003057 DBV CR2032
CLK_PCIE_REQ4# R228 10K_4 2 EC_RTCRST 2 2. AHL03003003 VDE CR2032
(29) EC_RTCRST
PQ6059 PQ6060
*2N7002K *2N7002K
R786
1
100K_4 Rev:E Reserve only Rev:E Reserve only

PROJECT : ZRW
sualaptop365.edu.vn
3A
Skylake 9/10 (PEG/USB/CLK)
5 4 3 2 1
5 4 3 2 1
U35E
SPI - FLASH
SKL_ULT
?
SMBUS, SMLINK Strapping

07
PCH_SPI_CLK AV2 +3V_S5 R7 PCH_MBCLK0_R
PCH_SPI_SO AW3 SPI0_CLK GPP_C0/SMBCLK R8 PCH_MBDAT0_R
PCH_SPI_SI AV3 SPI0_MISO +3V_S5 GPP_C1/SMBDATA R10 SMBALERT#
SPI0_MOSI +3V_S5 GPP_C2/SMBALERT# SMBALERT# (4)
PCH_SPI_IO2 AW2
PCH_SPI_IO3 AU4 SPI0_IO2 +3V_S5 R9 VGA_MBCLK
D
PCH_SPI_CS0# AU3 SPI0_IO3 +3V_S5 GPP_C3/SML0CLK W2 VGA_MBDATA +3V
D
PCH_SPI_CS1# AU2 SPI0_CS0# +3V_S5 GPP_C4/SML0DATA W1 SML0ALERT#

SPI0_CS1# GPP_C5/SML0ALERT# SML0ALERT# (4)
AU1 +3V_S5
SPI0_CS2# W3 SMB_ME1_CLK CLKRUN# R630 8.2K/F_4
+3V_S5 GPP_C6/SML1CLK V3 SMB_ME1_DAT IRQ_SERIRQ R629 10K_4
SPI - TOUCH +3V_S5 GPP_C7/SML1DATA AM7 SML1ALERT# EC_RCIN# R639 10K_4
+3V_S5 GPP_B23/SML1ALERT#/PCHHOT# SMB1ALERT# (27)
M2 +3V_S5
M3 GPP_D1/SPI1_CLK +3V_S5
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
+3V_S5 Rev:D change to shortpad
V1 +3V_S5 eSPI change to 15 ohm ckl v0.71 p.24
V2 GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3 +3V_S5 +3V_S5
M1 LPC AY13 R659 *short_4
GPP_D0/SPI1_CS# +3V_S5 +3V_S5 GPP_A1/LAD0/ESPI_IO0 BA13 R640 *short_4
LPC_LAD0 (25,26,29)
+3V_S5 GPP_A2/LAD1/ESPI_IO1 BB13 R653 *short_4
LPC_LAD1 (25,26,29) SMBus
C LINK +3V_S5 GPP_A3/LAD2/ESPI_IO2 LPC_LAD2 (25,26,29)
AY12 R668 *short_4
G3 +3V_S5 GPP_A4/LAD3/ESPI_IO3 BA12 LPC_LAD3 (25,26,29)
TP68 CL_CLK LPC_LFRAME# (25,26,29) PCH_MBCLK0_R 2.2K_4 R578
TP66 CL_DAT G2 CL_CLK GPP_A5/LFRAME#/ESPI_CS#
+3V_S5GPP_A14/SUS_STAT#/ESPI_RESET# BA11 R748 *0_4 PCH_MBDAT0_R 2.2K_4 R580
For M.2 wifi module must CL_DATA ESPI_RST# (29)
TP67 CL_RST# G1 +3V_S5 C806 0.1u/16V_4 VGA_MBDATA 2.2K_4 R585
CL_RST# VGA_MBCLK 2.2K_4 R582
eSPI change to 15 ohm
Rev:D change to shortpad AW9 R623 22/J_4 CLK_PCI_EC (29)
R652 *short_4 EC_RCIN# AW13 +3V_S5 GPP_A9/CLKOUT_LPC0/ESPI_CLK AY9
(29) SIO_RCIN# GPP_A0/RCIN# +3V_S5 +3V_S5 GPP_A10/CLKOUT_LPC1 +3V_S5
AW11 R626 22/J_4 PCLK_TPM (25)
IRQ_SERIRQ AY11 +3V_S5 GPP_A8/CLKRUN# R627 22/J_4
(25,29) IRQ_SERIRQ GPP_A6/SERIRQ +3V_S5 CLKRUN#
CLK_PCI_LPC (26)
CLKRUN# (25,29)
SML1ALERT# *150K_4 R205
5 OF 20
SKL_ULT/BGA
? 2/10 add C806 for EMI request ,
REV = 1
R748 no stuiff from EC site
move at CPU site Termination Resistor Requirement for PCH PCHHOT# Pin
Reserve PU 150K resister
PCH SPI ROM(8M+4M)
Rev:D change to shortpad
15ohm CS01502JB12
C C
SPI ROM Vender Size Quanta P/N Vender P/N 33ohm CS03302JB29
+3V_S5 R700 *short_6 +3V_PCH_ME +3V
+3V_PCH_ME
WND 8M AKE3EFP0N07 W25Q64FVSSIQ D2B change to 2.2k
Skylake
GGD AKE2EZN0Q00 GD25B64CSIGR U41 C754 0.1u/16V_4
3.3V 8M 1A-13 PCH_SPI_CS0# 1 8
CS# VCC R576 R572
PCH_SPI_SO
PCH_SPI_SO_EC
R650
R588
8M4M@15_4
8M@15_4
SPI_SO_8M 2
IO1/DO IO3/HOLD#
7 SPI_HOLD_IO3_ME R698 1K_4 SMBus(PCH) Q32
2.2K_4 2.2K_4
3 6 SPI_CLK_8M R684 8M4M@15_4 PCH_SPI_CLK S5 5 S0

IO2/WP# CLK
5 SPI_SI_8M R691 8M4M@15_4 PCH_SPI_SI PCH_MBDAT0_R 3 4 CLK_SDATA (12,13,27)
4 IO0/DI
GND
C747 2
W25Q64FV -- 8MB *22p/50V_4
PCH_SPI_CLK_EC R687 8M@15_4 PCH_MBCLK0_R 6 1 CLK_SCLK (12,13,27)
PCH_SPI_SI_EC R654 8M@15_4
+3V_PCH_ME R649 1K_4 SPI_WP_IO2_ME PCH_XDP_WLAN/S5 2N7002DW DDR_TP/S0

R596 *4M@33_4 SPI_WP_IO2_EC
3.3K is original and for no PCH_SPI_IO2 R589 8M4M@15_4 SPI_WP_IO2_ME
support fast read function R238 *4M@33_4 SPI_HOLD_IO3_EC reserve for SPI fast read SMBus(EC)
PCH_SPI_IO3 R239 8M4M@15_4 SPI_HOLD_IO3_ME
+3V_PCH_ME
R689 *4M@33_4 PCH_SPI_CLK_R U39
(29) PCH_SPI_CLK_EC
(29) PCH_SPI_SI_EC R641 *4M@33_4 PCH_SPI_SI_R PCH_SPI_CS1# 1 8
R594 *4M@33_4 PCH_SPI_SO_R PCH_SPI_CLK R669 *4M@33_4 6 CE# VDD
(29) PCH_SPI_SO_EC SCK
PCH_SPI_SI R658 *4M@33_4 5
PCH_SPI_SO R604 *4M@33_4 2 SI 7SPI_HOLD_IO3_EC R232 *1K_4
SO HOLD# 2ND_MBCLK R171 *short_4 SMB_ME1_CLK
(17,29) 2ND_MBCLK
B (29) SPI_CS0#_UR_ME R602 8M@0_4 PCH_SPI_CS0# C745 *22p/50V_4 3 4 (17,29) 2ND_MBDATA 2ND_MBDATA R175 *short_4 SMB_ME1_DAT B
R603 *4M@0_4 PCH_SPI_CS1# PCH_SPI_CLK_R WP# VSS C741
PCH_SPI_SI_R *4M@ROM-4M_EC *4M@0.1u/16V_4
only 0ohm option PCH_SPI_SO_R
+3V_PCH_ME EC/S5
+3V_PCH_ME R597 *1K_4 SPI_WP_IO2_EC
R591 10K_4 SPI_CS0#_UR_ME
1A-3 2013/10/16 Add U34 flash 4M ROM reserve for ZQ0D.
A A

PROJECT : ZRW
3A
Skylake 5 (SATA/HDA/SPI)
5 sualaptop365.edu.vn 4 3 2
Date: Monday, July 20, 2015
1
Sheet 7 of 48
5 4 3 2 1
(11)
(29)
SYS_RESET#
RSMRST# R655
PCI_PLTRST#
SYS_RESET#
*short_4 PCH_RSMRST#
U35K SKL_ULT
SYSTEM POWER MANAGEMENT

?
AT11
SUS0#
SUSB#
(29)
(11,29,31)
08
R554 10K_4 +3V_S5 GPP_B12/SLP_S0# AP15 SUSB# +3V
SUSC# (11,29)
+VCCIO Rev:D change to shortpad AN10
GPP_B13/PLTRST# +3V_S5
+3V_S5 GPD4/SLP_S3#
GPD5/SLP_S4#
BA16 SUSC# PCH_SLP_S5# (11)
11/12 Reserve PU 10K B5 +3V_S5 AY16 PCH_SLP_S5#
VCCST_PWRGD AY17 SYS_RESET# GPD10/SLP_S5# PCH_VRALERT# R211 10K_4
RSMRST# +3V_S5 PCH_SLP_SUS# (29)
AN15 PCH_SLP_SUS# SYS_RESET# R561 10K_4
R544 *10K_4 PROC_PWRGD PROC_PWRGD A68
I SLP_SUS# AW15 PCH_SLP_LAN#
PROCPWRGD I SLP_LAN# TP30
SYS_PWROK R556 *short_4 B65
VCCST_PWRGD +3V_S5 GPD9/SLP_WLAN#
BB17 PCH_SLP_WLAN#
TP23 Rev:D change to shortpad
R643 *0_4 AN16 PCH_SLP_A# PCH_SLP_A# (11)
D
SYS_PWROK_R B6 +3V_S5 GPD6/SLP_A# *short_4 R677
D
SYS_PWROK DNBSWON# (29) +3V_S5
Rev:D change to shortpad EC_PWROK_R BA20 BA15 PCH_PWRBTN#
DPWROK_R BB20 PCH_PWROK +3V_S5 GPD3/PWRBTN# AY15 PCH_ACPRESENT *short_4 R676
DSW_PWROK +3V_S5 GPD1/ACPRESENT ACPRESENT (29)
AU13 PCH_BATLOW# PCH_ACPRESENT R651 8.2K/F_4
(29) PCH_SUSPWRACK_R +3V_S5 GPD0/BATLOW# TP74
R622 *0_4 PCH_SUSPWRACK AR13 PCH_BATLOW# R628 8.2K/F_4
GPP_A13/SUSWARN#/SUSPWRDNACK +3V_S5 TP29
(29) PCH_SUSACK# R617 *0_4 SUSACK#_R AP11
GPP_A15/SUSACK# +3V_S5 AU11 R249 1M_4 PCIE_LAN_WAKE# R250 10K_4
+3V_S5 GPP_A11/PME# +3V_RTC
(23,26) PCIE_LAN_WAKE# PCIE_LAN_WAKE# BB15 AP16 INTRUDER#
AM15 WAKE# INTRUDER# MPHY_EXT_PWR R195 *1K_4
TP84 AW17 GPD2/LAN_WAKE# +3V_S5 AM10 MPHY_EXT_PWR Rev:F add
AT15 GPD11/LANPHYPC +3V_S5 +3V_S5 GPP_B11/EXT_PWR_GATE# AM11 PCH_VRALERT#
GPD7/RSVD +3V_S5 GPP_B2/VRALERT# TP19 PCH_RSMRST# R642 10K_4
+3V_S5
PCH_PWROK R648 10K_4
11 OF 20 SYS_PWROK_R R555 10K_4
SKL_ULT/BGA
REV = 1 ? DPWROK_C R675 100K_4
U35I
SKL_ULT ?
CSI-2
A36 C37 +3V_S5

B36 CSI2_DN0 CSI2_CLKN0 D37
CSI2_DP0 CSI2_CLKP0 REV:E tPLT15(max 200us)
C38 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
->SLP_S4# assertion to
C36 CSI2_DP1 CSI2_CLKP1 C29 VDDQ(+1.35VSUS) ramp C811 *0.1u/16V_4
D36 CSI2_DN2 CSI2_CLKN2 D29 down start(SUSON)
A38 CSI2_DP2 CSI2_CLKP2 B26
CSI2_DN3 CSI2_CLKN3
5
B38 A26
CSI2_DP3 CSI2_CLKP3 2 SUSC#
C31 E13 R145 100/F_4 SUSON 4
D31 CSI2_DN4 CSI2_COMP B7 (32,35) SUSON 1 SUSON_EC
CSI2_DP4 +3V_S5 GPP_D4/FLASHTRIG SUSON_EC (29)
C33 TP63
Board ID +1.8V_S5 D33 CSI2_DN5 U48
3
A31 CSI2_DP5 EMMC
*TC7SH08FU
B31 CSI2_DN6 AP2 RAM_ID1
C R610 10K_4 RAM_ID1 R611 *10K_4 A33 CSI2_DP6 +1.8V_S5 GPP_F13/EMMC_DATA0 AP1 RAM_ID2 C
R612 10K_4 RAM_ID2 R613 *10K_4 B33 CSI2_DN7 +1.8V_S5 GPP_F14/EMMC_DATA1 AP3 RAM_ID3
R614 10K_4 RAM_ID3 R615 *10K_4 CSI2_DP7 +1.8V_S5 GPP_F15/EMMC_DATA2 AN3 Board_ID0
R595 10K_4 Board_ID0 R600 *10K_4 A29 +1.8V_S5 GPP_F16/EMMC_DATA3 AN1 Board_ID1 R790 0_4
CSI2_DN8 +1.8V_S5 GPP_F17/EMMC_DATA4 REV:F Stuff R790
R598 10K_4 Board_ID1 R599 *10K_4 B29 AN2 Board_ID2
R605 10K_4 Board_ID2 R608 *10K_4 C28 CSI2_DP8 +1.8V_S5 GPP_F18/EMMC_DATA5 AM4 Board_ID3
R592 10K_4 Board_ID3 R590 *10K_4 D28 CSI2_DN9 +1.8V_S5 GPP_F19/EMMC_DATA6 AM1 Board_ID4
CSI2_DP9 +1.8V_S5 GPP_F20/EMMC_DATA7 Board_ID4 (21)
Board_ID4 R593 10K_4 A27
B27 CSI2_DN10 AM2 Board_ID5
R606 10K_4 Board_ID5 R607 *10K_4 C27 CSI2_DP10 +1.8V_S5 GPP_F21/EMMC_RCLK AM3 Board_ID6
R764 10K_4 Board_ID6 R765 *10K_4 D27 CSI2_DN11 +1.8V_S5 GPP_F22/EMMC_CLK AP4 Board_ID7
R766 10K_4 Board_ID7 R767 *10K_4 CSI2_DP11 +1.8V_S5 GPP_F12/EMMC_CMD
AT1 200/F_4 R616
EMMC_RCOMP
9 OF 20 +3V_S5
SKL_ULT/BGA +3V_S5
REV = 1 ?
REV:E tPLT17(max REV:E tPLT18(max 200 us)
C812 *0.1u/16V_4
200us) ->SLP_S3# C813 *0.1u/16V_4
->SLP_S3# assertion to
Low High Low High assertion to IMVP VCCIO VR(MAIND for +1V_S5
5
VR_ON(VRON) deassertion to +VCCIO) disabled
5
2 SUSB#
BOARD_ID0 VRAM 2GB VRAM 4GB BOARD_ID5 Realtek CPU DSP 2 SUSB# 4
Audio codec 4 (35,40) MAINON 1 MAINON_EC
(33,36) VRON MAINON_EC (29)
1 VRON_EC VRON_EC (29)
BOARD_ID1 Non IOAC IOAC BOARD_ID6 Reserved Reserve U49
3
U50 *TC7SH08FU
(Default)
3
*TC7SH08FU
BOARD_ID2 No G-sensor G-sensor BOARD_ID7 Reserved Reserve

(Default) REV:F Stuff R791 R791 0_4
REV:F Stuff R792 R792 0_4
BOARD_ID3 No TPM TPM
BOARD_ID4 No touch panel touch panel

B Power Sequence Non Deep Sx
B

(29) PCH_PWROK R647 *short_4 EC_PWROK_R
EC_PWROK R131 *0_4 SYS_PWROK_R
For platforms not supporting Deep B2A

Sx, connect directly to RSMRST# S0->S5 & S0->S3
No Deep Sx Rev:D change to shortpad Power of sequence 1us
DPWROK_R R661 *short_4 PCH_RSMRST# SUSB# -> VCCST_PWRGD
VCCST PWRGD CRB is via +1.05V PG +3V_S5
DPWROK_R R674 *0_4 DPWROK_C (29)
+3V_S5 U6 C808 0.1u/16V_4
+1V_VCCST
5 1
VCC NC
5
C164 2 SUSB#
R85 0.1u/16V_4 2 VCCST_PWRGD_EN_L 4
A 1VCCST_PWRGD_EN
1K_4
VCCST_PWRGD VCCST_PWRGD_R 4 3 U47
3
Y GND TC7SH08FU
R89 60.4/F_4
C136 74AUP1G07GW
+3V_S5 *0.1u/16V_4
+3V
SYSPWOK Shortpad change
R777 *0_4
PLTRST# Buffer C168 *0.1u/16V_4
to 60.4 ohm. 11/6
C332 0.1u/16V_4
R103 *0_4 PCH_PWROK
5
VCCST_PWRGD_EN R102 0_4 HWPG HWPG (29)

2 2 EC_PWROK
4 SYS_PWROK 4
EC_PWROK (29) Rev:D change netmane for HWPG
PLTRST# (14,23,25,26,29) 1A-6 2013/10/21 Del APWORK.
A PCI_PLTRST# 1 1 IMVP_PWRGD_3V (2) A
U14 U8
3
TC7SH08FU R214 *TC7SH08FU R130

100K_4 *10K_4
R113 *0_4
R560 *short_4
Rev:D change to shortpad Quanta Computer Inc.

PROJECT : ZRW
sualaptop365.edu.vn
3A
Skylake 9/11 (PWROK/Board_ID)
5 4 3 2 1
5 4 3 2 1
U35S SKL_ULT
?
VCCPRIM_1P0 & VCCPRIM_CORE Short GPIO Group Power Plane 09
?
Rev:D change to shortpad SKL_ULT
U35O C292 *1U/6.3V_4
RESERVED SIGNALS-1 Rev:F Remove Short Jumper for all +1V_S5 C268 1U/6.3V_4
CPU POWER 4 OF 4
C230 1U/6.3V_4
E68 BB68 AB19 C265 *1U/6.3V_4 Rev:D change to shortpad
CFG[0] RSVD_TP_BB68 +1V_S5 VCCPRIM_1P0
D B67 BB69 AB20 AK15 +VCCPGPPA *short_6 R198 D
D65 CFG[1] RSVD_TP_BB69 C217 1U/6.3V_4 P18 VCCPRIM_1P0 1.0V 696mA VCCPGPPA AG15 +VCCPGPPB *short_6 R185
+3V_S5
D67 CFG[2] AK13 VCCPRIM_1P0 S5 VCCPGPPB Y16 +VCCPGPPC *short_6 R182
+3V_S5
CFG[3] RSVD_TP_AK13 TP95 44mA VCCPGPPC +3V_S5
CFG4 E70 AK12 AF18 S5 Y15 +VCCPGPPD *short_6 R187
CFG[4] RSVD_TP_AK12 +1V_S5 VCCPRIM_CORE VCCPGPPD +3V_S5
C68 Rev:F reserve TP C698 1U/6.3V_4 AF19 T16 +VCCPGPPE *short_6 R179
D68 CFG[5] BB2 V20 VCCPRIM_CORE 1.0V 2.574A VCCPGPPE AF16 +VCCPGPPF *short_6 R192
+3V_S5
CFG[6] RSVD_BB2 VCCPRIM_CORE S5 33mA VCCPGPPF +1.8V_S5
C67 BA3 Rev:F Stuff C699 C699 47u/6.3V_8 V21 41mA AD15 +VCCPGPPG *short_6 R188
CFG[7] RSVD_BA3 VCCPRIM_CORE VCCPGPPG +3V_S5
F71 C256 1U/6.3V_4
G69 CFG[8] 1U/6.3V_4 C712 +VCCDSW_1P0 AL1 75mA with AJ21 pin V19 +VCCPRIM_3P3 C270 *1U/6.3V_4
F70 CFG[9] AU5 DCPDSW _1P0 1.0V VCCPRIM_3P3_V19
G68 CFG[10] TP5 AT5 K17 T1 +VCCPRIM_1P0
H70 CFG[11] TP6 +1V_S5
C695 1U/6.3V_4 C793 1U/6.3V_4 L1 VCCMPHYAON_1P0 1.0V 1.0V VCCPRIM_1P0_T1 C250 1U/6.3V_4
+1V_S5
CFG[12] VCCMPHYAON_1P0 22mA
G71 6mA 1.8V AA1 +VCCATS_1P8 *short_6 R180
H69 CFG[13] D5 N15
S5 VCCATS_1P8 *short_6 R240
+1.8V_S5
CFG[14] RSVD_D5 +1V_S5 VCCMPHYGT_1P0_N15 +3V_S5
G70 D4 C191 1U/6.3V_4 N16 <1mA AK17 +VCCPRTCPRIM_3P3 C348 0.1U/16V_4
CFG[15] RSVD_D4 B2 N17 VCCMPHYGT_1P0_N16 1.0V VCCRTCPRIM_3P3 C349 1U/6.3V_4
E63 RSVD_B2 C2 C182 47u/6.3V_8 P15 VCCMPHYGT_1P0_N17 AK19 +VCCPRTC *short_6 R252
CFG[16] RSVD_C2 VCCMPHYGT_1P0_P15 1.258A VCCRTC_AK19 +3V_RTC
F63 P16 3.0V+ BB14 C322 1U/6.3V_4
CFG[17] B3 VCCMPHYGT_1P0_P16 VCCRTC_BB14 C352 0.1U/16V_4
E66 RSVD_B3 A3 K15
RTC BB10 DCPRTC C732 0.1U/16V_4
F66 CFG[18] RSVD_A3 C179 1U/6.3V_4 L15 VCCAMPHYPLL_1P0 DCPRTC
CFG[19] AW 1 VCCAMPHYPLL_1P0 1.0V A14
RSVD_AW 1 VCCCLK1 +1V_S5
R156 49.9/F_4 CFG_RCOMP E60 V15
CFG_RCOMP E1
+1V_S5 VCCAPLL_1P0 1.0V 26mA 1.0V K19
R153 1.5K/F_4 E8 RSVD_E1 E2 AB17
S5 VCCCLK2 C680 *1U/6.3V_4
+1V_S5 ITP_PMODE RSVD_E2 +1V_S5 VCCPRIM_1P0_AB17 135mA
C225 *1U/6.3V_4 Y18 L21
AY2 BA4 VCCPRIM_1P0_Y18 1.0V 696mA VCCCLK3
AY1 RSVD_AY2 RSVD_BA4 BB4 R210 *0_6 +VCCPDSW_3P3 AD17
S5 S5 N20
RSVD_AY1 RSVD_BB4 +3VPCU VCCDSW _3P3_AD17 VCCCLK4
R212 *short_6 AD18 3.3V S5
+3V_S5 VCCDSW _3P3_AD18
D1 A4 *0.1U/16V_4 C314 AJ17 118mA L19
C D3 RSVD_D1 RSVD_A4 C4 R789 0_6 VCCDSW _3P3_AJ17 VCCCLK5 C
RSVD_D3 RSVD_C4 +3V
R683 *0_6 +VCCHDA AJ19 1.5V 30mA A10
+1.5V VCCHDA VCCCLK6
K46 BB5 C748 1U/6.3V_4 C672 1U/6.3V_4
K45 RSVD_K46 TP4 R193 *short_6 +VCCPSPI AJ16 AN11 V0P85A_VID0
RSVD_K45 A69
+3V_S5 VCCSPI 3.3V 11mA S5 GPP_B0/CORE_VID0 AN13 V0P85A_VID1 TP31
AL25 RSVD_A69 B69 AF20
+3V GPP_B1/CORE_VID1 TP16
AL27 RSVD_AL25 RSVD_B69 AF21 VCCSRAM_1P0
RSVD_AL27 AY3 R759 *short_4
+1V_S5
T19 VCCSRAM_1P0 1.0V
RSVD_AY3 VCCSRAM_1P0 642mA
C71 C192 1U/6.3V_4 T20
B70 RSVD_C71 D71 VCCSRAM_1P0
RSVD_B70 RSVD_D71 C70 R186 *short_6 +VCCPRIM_3P3 AJ21
F60 RSVD_C70 Rev:D change to +3V_S5
C261 1U/6.3V_4 VCCPRIM_3P3_AJ21 3.3V 75mA S5
RSVD_F60 C54 AK20
RSVD_C54 shortpad +1V_S5 VCCPRIM_1P0_AK20 1.0V 696mA S5
A52 D54
RSVD_A52 RSVD_D54 N18
BA70 AY4 +1V_S5 VCCAPLLEBB
C173 1U/6.3V_4 1.0V 33mA
BA68 RSVD_TP_BA70 TP1 BB3
RSVD_TP_BA68 TP2 15 OF 20
J71 AY71 SKL_ULT/BGA
R760 *short_4
J68 RSVD_J71 VSS_AY71 AR56 REV = 1 ?
R762 *GT3@0_4 LPM_ZVM_N (33)
RSVD_J68 ZVM#
F65 AW 71
G65 VSS_F65 RSVD_TP_AW 71 AW 70
VSS_G65 RSVD_TP_AW 70 For 2+3e CPU No Stuff
F61 AP56
E61 RSVD_F61 MSM# C64 R761 100K_4 TP88
RSVD_E61 PROC_SELECT#
19 OF 20
+1V_VCCST
B SKL_ULT/BGA B
REV = 1 ?
Pin Name Strap description Configuration Note

1 = *Normal Operation; No stall (iPU 3K)
CFG[0] Stall reset sequence after PCU PLL lock until de-asserted
0 = Stall
CFG[1] Reserved Configuration lane
1 = *Normal Operation(iPU 3K)

CFG[2] PCI Express* Static x16 Lane Numbering Reversal H & S processor used only
0 = Lan number reversed
CFG[3] Reserved Configuration lane
1 = Disabled (iPU 3K) CFG4

CFG[4] eDP enable R548 1K_4
0 = *Enabled
00 = 1x8, 2x4 PCI Express*

01 = reserved
CFG[6:5] PCI Express* Bifunction H & S processor used only
A 10 = 2x8 PCI Express* A
11 = 1x16 PCI Express*

1 = *PEG Train immediatedly follow
CFG[7] PEG Training RESET# de-assertion (iPU 3K)
H & S processor used only
0 = PEG wait for BIOS for training
CFG[19:8] Reserved Configuration lane PROJECT : ZRW
3A
Skylake PCH-LP 15/19 (POWER)
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
Skylake ULT (GND) 10

? SKL_ULT ? ?
SKL_ULT U35P SKL_ULT ? U35Q U35R U35T SKL_ULT
D D
GND 1 OF 3 GND 2 OF 3 GND 3 OF 3 SPARE
A5 AL65 AT63 BA49 F8 L18 AW69 F6

A67 VSS VSS AL66 AT68 VSS VSS BA53 G10 VSS VSS L2 AW68 RSVD_AW69 RSVD_F6 E3
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20 +1.8V_S5 AU56 RSVD_AW68 RSVD_E3 C11
AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS VSS L4 AW48 RSVD_AU56 RSVD_C11 B11
AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS VSS L8 C7 RSVD_AW48 RSVD_B11 A11
AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10 R775 *0_4 U12 RSVD_C7 RSVD_A11 D12
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13 U11 RSVD_U12 RSVD_D12 C12
AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19 H11 RSVD_U11 RSVD_C12 F52
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21 RSVD_H11 RSVD_F52
AB18 VSS VSS AM55 AV68 VSS VSS BB30 G58 VSS VSS N6 C794
AB21 VSS VSS AM60 AV69 VSS VSS BB34 G6 VSS VSS N65
VSS VSS VSS VSS VSS VSS 20 OF 20
AB8 AM61 AV70 BB38 G60 N68 *1U/6.3V_4
VSS VSS VSS VSS VSS VSS SKL_ULT/BGA
AD13 AM68 AV71 BB43 G63 P17 REV = 1 ?
AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS VSS R6
AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
AE64 VSS VSS AN32 AW23 VSS VSS C1 J25 VSS VSS T17
C
Reserve 1uF no stuff in CPU U11,U12 ball C
AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21 support Cannonlake-U PCH
AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS VSS T4
AE69 VSS VSS AN40 AW34 VSS VSS D14 J42 VSS VSS U10
AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
AG21 VSS VSS AP58 AW60 VSS VSS D58 K71 VSS VSS Y17
AG71 VSS VSS AP63 AW62 VSS VSS D6 L11 VSS VSS Y19
AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
AH63 VSS VSS AR11 AW8 VSS VSS D69 VSS VSS
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15
AJ15 VSS VSS AR20 B14 VSS VSS E18 18 OF 20
B SKL_ULT/BGA B
AJ18 VSS VSS AR23 B18 VSS VSS E21
VSS VSS VSS VSS REV = 1 ?
AJ20 AR28 B22 E46
AJ4 VSS VSS AR35 B30 VSS VSS E50
AK11 VSS VSS AR42 B34 VSS VSS E53
AK27 VSS VSS AR5 B58 VSS VSS F1
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL52 VSS VSS AT4 F68 VSS VSS F40
A AL58 VSS VSS AT56 VSS VSS BA41 A
AL64 VSS VSS AT58 VSS
VSS VSS
16 OF 20
17 OF 20
SKL_ULT/BGA SKL_ULT/BGA
REV = 1 ? REV = 1 ? PROJECT : ZRW
3A
Skylake 10/17/18 (GND)
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
11
D D
C C
B B
APS1 R289 *0_6 APS3 R272 *0_6 APS7
Intel APS Fixture use

+3V_S5
CN2
1 APS1 R291 *0_6
1 2 R282 *0_4
2 3 APS3 R278 *0_6 SUSB# (8,29,31)
3 +3VPCU
4 R279 *0_4
4 5 R274 *0_4 PCH_SLP_S5# (8)
5 6 R273 *0_4 SUSC# (8,29)
6 7 APS7 R271 *0_6 PCH_SLP_A# (8)
7 +3VPCU
8
8 9 R268 *0_4
9 10 RTC_RST# (6)
10 11 R265 *0_4
11 12 NBSWON# (27,29)
12 13 R267 *0_4 SYS_RESET#
A 13 14 SYS_RESET# (8) A
14 15
15 16
16 17
17
18
18 Quanta Computer Inc.
*ACES_88511-180N
PROJECT :ZRW
3A
CPU/PCH XDP
5
sualaptop365.edu.vn 4 3 2
Date: Monday, July 20, 2015 Sheet
1
11 of 48
5 4 3 2 1
+1.35VSUS
12
(3) M_A_A[15:0] JDIM2A JDIM2B
M_A_A0 98 5 75 44
A0 DQ0 M_A_DQ0 (3) VDD1 VSS16
M_A_A1 97 7 M_A_DQ4 (3) 76 48
M_A_A2 96 A1 DQ1 15 81 VDD2 VSS17 49
M_A_A3 95 17 M_A_DQ7 (3) 82 54
M_A_A4 92 A3 DQ3 4 87 VDD4 VSS19 55
M_A_A5 91 6 88 60
M_A_A6 90 16 M_A_DQ3 (3) 93 61
M_A_A7 86 A6 DQ6 18 94 VDD7 VSS22 65
M_A_A8 89 21 99 66
M_A_A9 85 A8 DQ8 23
M_A_DQ12 (3) 2.48A 100 VDD9 VSS24 71
M_A_A10 107 33 105 72
A10/AP DQ10 M_A_DQ10 (3) VDD11 VSS26
PC2100 DDR3 SDRAM SO-DIMM

D M_A_A11 84 35 M_A_DQ14 (3) 106 127 D
M_A_A12 83 A11 DQ11 22 111 VDD12 VSS27 128
A12/BC# DQ12 M_A_DQ9 (3) VDD13 VSS28
M_A_A13 119 24 M_A_DQ13 (3) 112 133
M_A_A14 80 A13 DQ13 34 117 VDD14 VSS29 134
A14 DQ14 M_A_DQ15 (3) VDD15 VSS30
M_A_A15 78 36 M_A_DQ11 (3) 118 138
A15 DQ15 39 123 VDD16 VSS31 139

DQ16 M_A_DQ17 (3) VDD17 VSS32
109 41 M_A_DQ21 (3) 124 144
(3) M_A_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_A_DQ22 (3) 145
(3) M_A_BS#1 BA1 DQ18 VSS34
79 53 M_A_DQ18 (3) 199 150
(3) M_A_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 151
(3) M_A_CS#0 S0# DQ20 M_A_DQ20 (3) VSS36
121 42 M_A_DQ16 (3) 77 155
(3) M_A_CS#1 S1# DQ21 NC1 VSS37
101 50 M_A_DQ23 (3) 122 156
(3) M_A_CLK0 CK0 DQ22 NC2 VSS38
103 52 M_A_DQ19 (3) R347 *10K_4 125 161
(3) M_A_CLK0# CK0# DQ23 +3V NCTEST VSS39
102 57 M_A_DQ28 (3) 162
(3) M_A_CLK1 104 CK1 DQ24 59 198 VSS40 167
M_A_DQ24 (3) PM_EXTTS#0
(3) M_A_CLK1# CK1# DQ25 EVENT# VSS41
73 67 M_A_DQ30 (3) 30 168
(3) M_A_CKE0 CKE0 DQ26 (3,13) DDR3_DRAMRST# RESET# VSS42
74 69 M_A_DQ31 (3) C465 *0.1u/16V_4 172
(3) M_A_CKE1 CKE1 DQ27 VSS43
115 56 M_A_DQ25 (3) 173
(3) M_A_CAS# CAS# DQ28 VSS44
110 58 M_A_DQ29 (3) +SMDDR_VREF_DQ0 +SMDDR_VREF_DQ0 1 178
(3) M_A_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_A_DQ27 (3) 126 179
(3) M_A_WE# WE# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
R332 10K_4 DIMM0_SA0 197 70 M_A_DQ26 (3) 184
R335 10K_4 DIMM0_SA1 201 SA0 DQ31 129 VSS47 185
SA1 DQ32 M_A_DQ36 (3) VSS48
202 131 M_A_DQ33 (3) 2 189
(7,13,27) CLK_SCLK 200 SCL DQ33 141 3 VSS1 VSS49 190
(7,13,27) CLK_SDATA SDA DQ34 M_A_DQ38 (3) VSS2 VSS50
143 8 195
(204P)
DQ35 M_A_DQ39 (3) VSS3 VSS51
116 130 M_A_DQ32 (3) 9 196
(3) M_A_ODT0_DIMM ODT0 DQ36 VSS4 VSS52
120 132 M_A_DQ37 (3) 13
(3) M_A_ODT1_DIMM ODT1 DQ37 VSS5
140 14
DQ38 M_A_DQ34 (3) VSS6
C 1A-8 2013/10/23 Change DIMM1_SA0/SA1 11 142 M_A_DQ35 (3) 19 C
to DIMM0_SA0/SA1. 28 DM0 DQ39 147 20 VSS7
DM1 DQ40 M_A_DQ44 (3) VSS8
46 149 M_A_DQ45 (3) 25
(204P)
63 DM2 DQ41 157 26 VSS9 203
DM3 DQ42 M_A_DQ46 (3) VSS10 VTT1 +VDDQ_VTT
136 159 31 204
DM4 DQ43 M_A_DQ47 (3) VSS11 VTT2
153 146 M_A_DQ40 (3) 32
170 DM5 DQ44 148 37 VSS12 205
DM6 DQ45 M_A_DQ41 (3) VSS13 GND
187 158 M_A_DQ42 (3) 38 206
DM7 DQ46 160 43 VSS14 GND
DQ47 M_A_DQ43 (3) VSS15
M_A_DQS0 12 163
DQS0 DQ48 M_A_DQ48 (3)
M_A_DQS1 29 165 M_A_DQ52 (3)
M_A_DQS2 47 DQS1 DQ49 175 DDR3-DIMM1_H=4.0_STD
M_A_DQS3 64 177 M_A_DQ54 (3)
M_A_DQS4 137 DQS3 DQ51 164
M_A_DQS5 154 166
M_A_DQS6 171 174 M_A_DQ51 (3)
M_A_DQS7 188 DQS6 DQ54 176
(3) M_A_DQS[7:0]
M_A_DQS#0 10 DQS7 DQ55 181
M_A_DQ50 (3) M1 solution
DQS#0 DQ56 M_A_DQ59 (3) +1.35VSUS
M_A_DQS#1 27 183 M_A_DQ58 (3)
M_A_DQS#2 45 DQS#1 DQ57 191
DQS#2 DQ58 M_A_DQ56 (3)
M_A_DQS#3 62 193 M_A_DQ57 (3)
M_A_DQS#4 135 DQS#3 DQ59 180
M_A_DQS#5 152 DQS#4
DQS#5
DQ60
DQ61
182
M_A_DQ62
M_A_DQ63
(3)
(3) R358 Vref_CA
M_A_DQS#6 169 192 M_A_DQ60 (3) 1.8K/F_4
M_A_DQS#7 186 DQS#6 DQ62 194 +SMDDR_VREF_DIMM
(3) M_A_DQS#[7:0] DQS#7 DQ63 M_A_DQ61 (3)
+VREF_CA_CPU R362 *Short_6 R363 2/F_6

1A-2 2013/10/16 Chage net name M_B_DQS#[7:0] to DDR3-DIMM1_H=4.0_STD
2
M_A_DQS#[7:0].
B M3 solution C478 R346 C479
B
0.022u/16V_4 1.8K/F_4 470p/50V_4
1
+1.35VSUS Place these Caps near SO-DIMM R357
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ0 24.9/F_4
C471 C432 C445 C446 C447
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4
C470 + C486 C480 C473 C441 C443

330u/2V_7343
10u/6.3V_6 0.1u/16V_4 0.1u/16V_4
C472 C430 C444 C466 C464 2.2u/6.3V_6 2.2u/6.3V_6

M1 solution
10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 +1.35VSUS
+3V +VDDQ_VTT
R330 Vref_DQ
1.8K/F_4
+SMDDR_VREF_DQ0
C468 C434 C467 C442 C449 C463 C455
C439 C448 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 +VREFDQ_SA_M3 R327 *Short_6 R328 2/F_6
2.2u/6.3V_6 0.1u/16V_4 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6
2
M3 solution C427 R331 C440
0.022u/16V_4 1.8K/F_4 470p/50V_4
1
A A
R325
24.9/F_4
SA1 SA0 Quanta Computer Inc.

CHA 0 0
PROJECT : ZRW
CHB 1 0 3A
DDR3 MEMORY SO-DIMM A
5
1
12 of 48
5 4 3 2 1
(3) M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
98
97
96
95
JDIM1A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
17
M_B_DQ12
M_B_DQ8
M_B_DQ11
M_B_DQ10
(3)
(3)
(3)
(3)
+1.35VSUS
75
76
81
82
JDIM1B
VDD1
VDD2
VDD3
VSS16
VSS17
VSS18
44
48
49
54
13
M_B_A4 92 A3 DQ3 4 87 VDD4 VSS19 55
A4 DQ4 M_B_DQ9 (3) VDD5 VSS20
M_B_A5 91 6 M_B_DQ13 (3) 88 60
M_B_A6 90 A5 DQ5 16 93 VDD6 VSS21 61
M_B_A7 86 18 M_B_DQ14 (3) 94 65
M_B_A8 89 A7 DQ7 21 99 VDD8 VSS23 66
D
M_B_A9 85 A8 DQ8 23
M_B_DQ4 (3) 2.48A 100 VDD9 VSS24 71
D
M_B_A10 107 33 M_B_DQ3 (3) 105 72
M_B_A11 84 A10/AP DQ10 35 106 VDD11 VSS26 127

M_B_A12 83 22 M_B_DQ5 (3) 111 128
M_B_A13 119 A12/BC# DQ12 24 112 VDD13 VSS28 133
M_B_A14 80 34 M_B_DQ2 (3) 117 134
M_B_A15 78 A14 DQ14 36 118 VDD15 VSS30 138
39 123 139

DQ16 M_B_DQ17 (3) VDD17 VSS32
109 41 M_B_DQ16 (3) 124 144
(3) M_B_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_B_DQ18 (3) 145
(3) M_B_BS#1 BA1 DQ18 VSS34
79 53 M_B_DQ19 (3) 199 150
(3) M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_B_DQ21 (3) 151
(3) M_B_CS#0 S0# DQ20 VSS36
121 42 M_B_DQ20 (3) 77 155
(3) M_B_CS#1 S1# DQ21 NC1 VSS37
101 50 M_B_DQ22 (3) 122 156
(3) M_B_CLK0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ23 (3) R324 *10K_4 125 161
(3) M_B_CLK0# CK0# DQ23 +3V NCTEST VSS39
102 57 M_B_DQ24 (3) 162
(3) M_B_CLK1 CK1 DQ24 VSS40
104 59 M_B_DQ25 (3) PM_EXTTS#1 198 167
(3) M_B_CLK1# CK1# DQ25 EVENT# VSS41
73 67 M_B_DQ30 (3) 30 168
(3) M_B_CKE0 CKE0 DQ26 (3,12) DDR3_DRAMRST# RESET# VSS42
74 69 M_B_DQ31 (3) C415 *0.1u/16V_4 172
(3) M_B_CKE1 CKE1 DQ27 VSS43
115 56 M_B_DQ28 (3) 173
(3) M_B_CAS# CAS# DQ28 VSS44
110 58 M_B_DQ29 (3) +SMDDR_VREF_DQ1 +SMDDR_VREF_DQ1 1 178
(3) M_B_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_B_DQ26 (3) 126 179
(3) M_B_WE# WE# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
R323 10K_4 DIMM1_SA0 197 70 M_B_DQ27 (3) 184
R305 10K_4 DIMM1_SA1 201 SA0 DQ31 129 VSS47 185
+3V SA1 DQ32 M_B_DQ36 (3) VSS48
202 131 M_B_DQ37 (3) 2 189
(7,12,27) CLK_SCLK 200 SCL DQ33 141 3 VSS1 VSS49 190
(7,12,27) CLK_SDATA SDA DQ34 M_B_DQ39 (3) VSS2 VSS50
143 M_B_DQ35 (3) 8 195
(204P)
C DQ35 VSS3 VSS51 C
116 130 M_B_DQ32 (3) 9 196
(3) M_B_ODT0_DIMM ODT0 DQ36 VSS4 VSS52
120 132 M_B_DQ33 (3) 13
(3) M_B_ODT1_DIMM ODT1 DQ37 VSS5
140 M_B_DQ34 (3) 14
11 DQ38 142 19 VSS6
DM0 DQ39 M_B_DQ38 (3) VSS7
28 147 M_B_DQ44 (3) 20
46 DM1 DQ40 149 25 VSS8
DM2 (204P) DQ41 M_B_DQ45 (3) VSS9
63 157 M_B_DQ42 (3) 26 203 +VDDQ_VTT
136 DM3 DQ42 159 31 VSS10 VTT1 204
DM4 DQ43 M_B_DQ43 (3) VSS11 VTT2
153 146 M_B_DQ41 (3) 32
170 DM5 DQ44 148 37 VSS12 205
DM6 DQ45 M_B_DQ40 (3) VSS13 GND
187 158 M_B_DQ46 (3) 38 206
DM7 DQ46 160 43 VSS14 GND
DQ47 M_B_DQ47 (3) VSS15
M_B_DQS1 12 163 M_B_DQ48 (3)
M_B_DQS0 29 DQS0 DQ48 165
DQS1 DQ49 M_B_DQ52 (3)
M_B_DQS2 47 175 M_B_DQ55 (3) DDR3-DIMM1_H=4.0_RVS
M_B_DQS3 64 DQS2 DQ50 177
M_B_DQS4 137 164 M_B_DQ49 (3)
M_B_DQS5 154 DQS4 DQ52 166
M_B_DQS6 171 174
M_B_DQS7 188 DQS6 DQ54 176
M_B_DQ50 (3) M1 solution
(3) M_B_DQS[7:0] DQS7 DQ55 M_B_DQ51 (3) +1.35VSUS
M_B_DQS#1 10 181 M_B_DQ57 (3)
M_B_DQS#0 27 DQS#0 DQ56 183
DQS#1 DQ57 M_B_DQ56 (3)
M_B_DQS#2 45 191 M_B_DQ58 (3)
M_B_DQS#3 62 DQS#2 DQ58 193
M_B_DQS#4 135 DQS#3 DQ59 180
M_B_DQ62
M_B_DQ61
(3)
(3) R309 Vref_DQ
M_B_DQS#5 152 DQS#4 DQ60 182 1.8K/F_4
DQS#5 DQ61 M_B_DQ60 (3) +SMDDR_VREF_DQ1
B M_B_DQS#6 169 192 M_B_DQ63 (3) B
M_B_DQS#7 186 DQS#6 DQ62 194
(3) M_B_DQS#[7:0] DQS#7 DQ63 M_B_DQ59 (3)
+VREFDQ_SB_M3 R302 *Short_6 R307 2/F_6
2
1A-22013/10/16 Swap M_B_DQS2/M_B_DQS3 and swap DDR3-DIMM1_H=4.0_RVS
M_B_DQS#2/M_B_DQS#3. M3 solution C397 R310 C391
0.022u/16V_4 1.8K/F_4 470p/50V_4
1
R313
+1.35VSUS Place these Caps near SO-DIMM 24.9/F_4
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ1
C418 C401 C402 C400 C416
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4
C419 + C433 C422 C423 C393 C392

330u/2V_7343
10u/6.3V_6 0.1u/16V_4 0.1u/16V_4
SA1 SA0
C420 C404 C421 C403 C399 2.2u/6.3V_6 2.2u/6.3V_6
10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4
CHA 0 0
+3V +VDDQ_VTT
CHB 1 0
A C429 C396 C426 C395 C394 C417 C414 A

C388 C390 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
2.2u/6.3V_6 0.1u/16V_4 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6

PROJECT : ZRW
sualaptop365.edu.vn Date:
DDRIII Memory SO-DIMM B
Monday, July 20, 2015 Sheet 13 of 48
3A
5 4 3 2 1
1 2 3 4 5 6 7 8
14
+1.05V_GFX
U34A
Near GPU 1/14 PCI_EXPRESS
C605 EV@22U/6.3VS_6
C72 EV@22U/6.3VS_6 NVDD = 32.22 ~ 26.66 A +VGPU_CORE
C78 EV@4.7U/10V_6 PEX_WAKE AB6 C134 *0.1U/16V_4
C111 EV@4.7U/10V_6 Under GPU U34E
C63 EV@4.7U/10V_6 AA22 PEX_IOVDD 11/14 NVVDD
AB23 PEX_IOVDD PEX_RST AC7 VGA_RST# R86 EV@0_4 C88 EV@1U/6.3V_4 K10 VDD
PEGX_RST# (17)
AC24 C128 EV@1U/6.3V_4 K12
C97 EV@1U/6.3V_4 AD25
PEX_IOVDD
PEX_IOVDD PEX_CLKREQ AC6 PEX_CLKREQ# R91 EV@10K/F_4 +3V_GFX C125 EV@1U/6.3V_4 K14
VDD
VDD U34C VDD33 = 56mA
A C91 EV@1U/6.3V_4 AE26 PEX_IOVDD C130 EV@1U/6.3V_4 K16 VDD 14/14 XVDD/VDD33 A
AE27 PEX_IOVDD PEX_REFCLK AE8 C113 EV@4.7U/10V_6 K18 VDD
CLK_PCIE_VGA (6)
Under GPU PEX_REFCLK AD8 C86 EV@4.7U/10V_6 L11 VDD AD10 NC VDD33 G10
CLK_PCIE_VGA# (6) +3V_GFX
C118 EV@4.7U/10V_6 L13 VDD AD7 NC VDD33 G12
AC9 PEG_RXP0_C C632 EV@0.22U/10V_4 C112 EV@4.7U/10V_6 L15 B19 C117 EV@0.1U/16V_4
Under GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A PEX_TX0
PEX_TX0 AB9 PEG_RXN0_C C638 EV@0.22U/10V_4
PEG_RX0 (6)
C120 EV@4.7U/10V_6 L17
VDD
VDD
NC
PEG_RX#0 (6) M10
C93 EV@4.7U/10V_6 VDD
PEX_RX0 AG6 C109 EV@4.7U/10V_6 M12 VDD F11 3V3AUX_NC C145 EV@4.7U/10V_6
Near GPU
+1.05V_GFX PEG_TX0 (6) TP5
C64 EV@22U/6.3VS_6 AA10 PEX_IOVDDQ PEX_RX0 AG7 C116 EV@4.7U/10V_6 M14 VDD C1381 2 EV@1U/10V_6
PEG_TX#0 (6)
C87 *22U/6.3VS_6 AA12 PEX_IOVDDQ C126 EV@4.7U/10V_6 M16 VDD V5 FERMI_RSVD1_NC
C65 *10U/10V_6 AA13 PEX_IOVDDQ PEX_TX1 AB10 PEG_RXP1_C C627 EV@0.22U/10V_4 C123 EV@4.7U/10V_6 M18 VDD V6 FERMI_RSVD2_NC
PEG_RX1 (6)
C90 EV@4.7U/10V_6 AA16 PEX_IOVDDQ PEX_TX1 AC10 PEG_RXN1_C C629 EV@0.22U/10V_4 N11 VDD VDD33 G8
PEG_RX#1 (6) +3V_MAIN
C602 EV@4.7U/10V_6 AA18 PEX_IOVDDQ N13 VDD VDD33 G9
AA19 PEX_IOVDDQ PEX_RX1 AF7 2 1 N15 VDD
PEG_TX1 (6)
Near GPU AA20 AE7 C85 N17
+
PEX_IOVDDQ PEX_RX1 PEG_TX#1 (6) VDD
AA21 PEX_IOVDDQ EV@330u_2.5V_3528 P10 VDD CONFIGURABLE C143 EV@4.7U/10V_6
AB22 PEX_IOVDDQ PEX_TX2 AD11 PEG_RXP2_C C626 EV@0.22U/10V_4 P12 VDD POWER CHANNELS C1371 2 EV@1U/10V_6
AC23 AC11 PEG_RXN2_C C610 PEG_RX2 (6) P14
PEX_IOVDDQ PEX_TX2 EV@0.22U/10V_4 VDD * nc on substrate
AD24 PEG_RX#2 (6) P16
Under GPU PEX_IOVDDQ VDD
C119 EV@1U/6.3V_4 AE25 PEX_IOVDDQ PEX_RX2 AE9 P18 VDD G1 XPWR_G1 C124 EV@0.1U/16V_4
PEG_TX2 (6)
C121 EV@1U/6.3V_4 AF26 PEX_IOVDDQ PEX_RX2 AF9 R11 VDD G2 XPWR_G2 C127 EV@0.1U/16V_4
PEG_TX#2 (6)
AF27 PEX_IOVDDQ C159 EV@22U/6.3V_8 R13 VDD G3 XPWR_G3
PEX_TX3 AC12 PEG_RXP3_C C609 EV@0.22U/10V_4 C153 EV@47u/6.3V_8 R15 VDD G4 XPWR_G4 Under GPU
AB12 PEG_RXN3_C C607 PEG_RX3 (6) R17 G5
PEX_TX3 EV@0.22U/10V_4 VDD XPWR_G5
PEG_RX#3 (6)
C160 EV@4.7U/6.3VS_6 T10 VDD G6 XPWR_G6
PEX_RX3 AG9 C140 EV@4.7U/6.3VS_6 T12 VDD G7 XPWR_G7
PEG_TX3 (6)
PEX_RX3 AG10 C146 EV@4.7U/6.3VS_6 T14 VDD
PEG_TX#3 (6)
C149 EV@4.7U/6.3VS_6 T16
PEX_PLL_HVDD + PEX_TX4 AB13 C163 EV@4.7U/6.3VS_6 T18
VDD
VDD V1 XPWR_V1
B
PEX_SVDD_3V3 = 143mA PEX_TX4 AC13 U11
U13
VDD V2 XPWR_V2
B
Near GPU VDD
PEX_RX4 AF10 U15 VDD
+3V_GFX PEX_RX4 AE10 U17 VDD
V10 VDD
PEX_TX5 AD14 V12 VDD W1 XPWR_W1
AA8 PEX_PLL_HVDD PEX_TX5 AC14 +3V V14 VDD W2 XPWR_W2
C131 EV@0.1U/16V_4 AA9 PEX_PLL_HVDD V16 VDD W3 XPWR_W3
C135 EV@4.7U/10V_6 PEX_RX5 AE12 V18 VDD W4 XPWR_W4
C132 EV@4.7U/10V_6 PEX_RX5 AF12
Near GPU AB8 PEX_SVDD_3V3
PEX_TX6 AC15 bga595-nvidia-n13p-gv2-s-a2 bga595-nvidia-n13p-gv2-s-a2 COMMON
AB15 C180 COMMON

PEX_TX6
U10 EV@0.1U/16V_4
PEX_RX6 AG12 EV@MC74VHC1G08DFT2G
5
PEX_RX6 AG13
2
PEX_TX7 AB16
(8,23,25,26,29) PLTRST#
4 SYS_PEX_RST R143 EV@0_4 SYS_PEX_RST_MON# Power up
AC16 1
PEX_TX7 (4) DGPU_HOLD_RST#
sequence
+VGPU_CORE PEX_RX7 AF13
3
100 ohm near GPU AE13
PEX_RX7
R142
ALL 3.3V
PEX_TX8 AD17 GT@100K/F_4 +3VGFX & +3V3_AON
NC
NC PEX_TX8 AC17
R123
EV@100_4 PEX_RX8 AE15
NC
NC PEX_RX8 AF15
SYS_PEX_RST_MON# (17)
F2 VDD_SENSE NC PEX_TX9 AC18 NVVDD t>0
(41) VGA_VCCSENSE PEX_TX9 AB18 +3V
NC +VGACORE
C C
F1 GND_SENSE PEX_RX9 AG15
NC
(41) VGA_VSSSENSE PEX_RX9 AG16
NC
AB19
NC PEX_TX10
AC19 C175
PEX_VDD
PEX_TX10
R124
NC
U7 GT@0.1U/16V_4 +1.05V_GFX
EV@100_4 AF16 GT@MC74VHC1G08DFT2G
NC PEX_RX10 t>=0
5
NC PEX_RX10 AE16
SYS_PEX_RST_MON# 2
AD20 4 PEGX_RST#
NC PEX_TX11
AC20 1
FBVDDQ
NC PEX_TX11 N16V stuff it, not support GC6 2.0 +1.5V_GFX Power down
AE18
NC PEX_RX11
sequence
3
PEX_RX11 AF18 SYS_PEX_RST R132 GM@0_4
NC
R114
PEX_TX12 AC21 EV@100K/F_4
NC
PEX_TX12 AB21 GPU_PEX_RST_HOLD#
NC (17) GPU_PEX_RST_HOLD#
R481 *200/F_4 PEX_TSTCLK AF22 PEX_TSTCLK_OUT NC PEX_RX12 AG18
PEX_TSTCLK# AE22 PEX_TSTCLK_OUT PEX_RX12 AG19
NC
CX300T30001 Change to 0ohm
R72 EV@0_6 PEX_TX13 AD23
+1.05V_GFX NC
NC PEX_TX13 AE23
Near GPU
EV@4.7U/10V_6 C80 PEX_PLLVDD AA14 PEX_PLLVDD PEX_RX13 AF19
NC
EV@1U/6.3V_4 C96 AA15 PEX_PLLVDD PEX_RX13 AE19 +3V_GFX
NC
EV@0.1U/16V_4 C92 NC PEX_TX14 AF24

Under GPU PEX_TX14 AE24
NC
D Follow Z09 to isolate CLK_REQ# D
PEX_PLLVDD = 130mA NC PEX_RX14 AE21
2
PEX_RX14 AF21
NC
EV@10K/F_4 R79 TESTMODE AD9 TESTMODE
PEX_TX15 AG24 PEX_CLKREQ# 1 3
NC CLK_PEGA_REQ# (6)
NC PEX_TX15 AG25
Q10 PU at page 9
NC PEX_RX15 AG21
AG22
EV@2N7002K Quanta Computer Inc.
NC PEX_RX15
GF117 GF119 R92 *0_4 PROJECT : ZRW

EV@2.49K/F_4 R473 PEX_TERMP AF25 PEX_TERMP Size Document Number Rev
3A
N16S-GT (PCIE I/F) /NVDD
bga595-nvidia-n13p-gv2-s-a2 COMMON Date: Monday, July 20, 2015 Sheet 14 of 48
1 2 3 4 5 6 7 8
sualaptop365.edu.vn
1 2 3 4 5 6 7 8
U34B
15
2/14 FBA VMA_DQ[63:0]
VMA_DQ[63:0] (18,19)
R525 PS_FB_CLAMP F3
EV@10K/F_4 NC GF119 FBA_D0 E18 VMA_DQ0
FBA_D1 F18 VMA_DQ1
FB_CLAMP FBA_D2 E16 VMA_DQ2
GF117
F17 VMA_DQ3
FBA_D3
FBA_D4 D20 VMA_DQ4 FBVDDQ + FBVDD = 3.116A U34F
FBA_D5 D21 VMA_DQ5 13/14 GND
FBA_D6 F20 VMA_DQ6 +1.5V_GFX U34D A2 GND GND M13
FBA_D7 E21 VMA_DQ7 12/14 FBVDDQ AB17 GND GND M15
FBA_D8 E15 VMA_DQ8 AB20 GND GND M17
FBA_D9 D15 VMA_DQ9 C71 EV@0.1U/16V_4 B26 FBVDDQ AB24 GND GND N10
FBA_ODT_L FBA_CMD0 R60 EV@10K/F_4 FBA_D10 F15 VMA_DQ10 C82 EV@0.1U/16V_4 C25 FBVDDQ AC2 GND GND N12
FBA_D11 F13 VMA_DQ11 E23 FBVDDQ AC22 GND GND N14
A FBA_CKE_L FBA_CMD3 R59 EV@10K/F_4 FBA_D12 C13 VMA_DQ12 E26 FBVDDQ AC26 GND GND N16 A
FBA_D13 B13 VMA_DQ13 C95 1 2 EV@1U/10V_6 F14 FBVDDQ AC5 GND GND N18
FBA_ODT_H FBA_CMD16 R47 EV@10K/F_4 FBA_D14 E13 VMA_DQ14 C74 1 2 EV@1U/10V_6 F21 FBVDDQ AC8 GND GND P11
FBA_D15 D13 VMA_DQ15 C73 EV@4.7U/10V_6 G13 FBVDDQ AD12 GND GND P13
FBA_CKE_H FBA_CMD19 R43 EV@10K/F_4 FBA_D16 B15 VMA_DQ16 C69 EV@4.7U/10V_6 G14 FBVDDQ AD13 GND GND P15
FBA_D17 C16 VMA_DQ17 C84 EV@10U/6.3V_6 G15 FBVDDQ A26 GND GND P17
FBA_RST# FBA_CMD20 R453 EV@10K/F_4 FBA_D18 A13 VMA_DQ18 C83 EV@22U/6.3V_8 G16 FBVDDQ AD15 GND GND P2
FBA_D19 A15 VMA_DQ19 G18 FBVDDQ AD16 GND GND P23
FBA_D20 B18 VMA_DQ20 G19 FBVDDQ AD18 GND GND P26
FBA_D21 A18 VMA_DQ21 G20 FBVDDQ AD19 GND GND P5
FBA_D22 A19 VMA_DQ22 G21 FBVDDQ AD21 GND GND R10
FBA_D23 C19 VMA_DQ23 H24 FBVDDQ AD22 GND GND R12
FBA_D24 B24 VMA_DQ24 H26 FBVDDQ AE11 GND GND R14
FBA_D25 C23 VMA_DQ25 J21 FBVDDQ AE14 GND GND R16
FBA_D26 A25 VMA_DQ26 K21 FBVDDQ AE17 GND GND R18
FBA_D27 A24 VMA_DQ27 L22 FBVDDQ AE20 GND GND T11
FBA_D28 A21 VMA_DQ28 L24 FBVDDQ AB11 GND GND T13
FBA_D29 B21 VMA_DQ29 L26 FBVDDQ AF1 GND GND T15
FBA_D30 C20 VMA_DQ30 M21 FBVDDQ AF11 GND GND T17
FBA_D31 C21 VMA_DQ31 N21 FBVDDQ AF14 GND GND U10
FBA_D32 R22 VMA_DQ32 R21 FBVDDQ AF17 GND GND U12
C27 FBA_CMD0 FBA_D33 R24 VMA_DQ33 T21 FBVDDQ AF20 GND GND U14
(18,19) FBA_CMD0
C26 FBA_CMD1 FBA_D34 T22 VMA_DQ34 V21 FBVDDQ AF23 GND GND U16
(19) FBA_CMD1
E24 FBA_CMD2 FBA_D35 R23 VMA_DQ35 W 21 FBVDDQ AF5 GND GND U18
(18) FBA_CMD2
F24 FBA_CMD3 FBA_D36 N25 VMA_DQ36 AF8 GND GND U2
(18,19) FBA_CMD3
D27 FBA_CMD4 FBA_D37 N26 VMA_DQ37 AG2 GND GND U23
(18,19) FBA_CMD4
D26 FBA_CMD5 FBA_D38 N23 VMA_DQ38 AG26 GND GND U26
(18,19) FBA_CMD5
F25 FBA_CMD6 FBA_D39 N24 VMA_DQ39 AB14 GND GND U5
(18,19) FBA_CMD6
F26 FBA_CMD7 FBA_D40 V23 VMA_DQ40 B1 GND GND V11
(18,19) FBA_CMD7
F23 FBA_CMD8 FBA_D41 V22 VMA_DQ41 B11 GND GND V13
(18,19) FBA_CMD8
B G22 FBA_CMD9 FBA_D42 T23 VMA_DQ42 B14 GND GND V15 B
(18,19) FBA_CMD9
G23 FBA_CMD10 FBA_D43 U22 VMA_DQ43 B17 GND GND V17
(18,19) FBA_CMD10
G24 FBA_CMD11 FBA_D44 Y24 VMA_DQ44 B20 GND GND Y2
(18,19) FBA_CMD11
F27 FBA_CMD12 FBA_D45 AA24 VMA_DQ45 B23 GND GND Y23
(18,19) FBA_CMD12
G25 FBA_CMD13 FBA_D46 Y22 VMA_DQ46 B27 GND GND Y26
(18,19) FBA_CMD13
G27 FBA_CMD14 FBA_D47 AA23 VMA_DQ47 B5 GND GND Y5
(18,19) FBA_CMD14
G26 FBA_CMD15 FBA_D48 AD27 VMA_DQ48 B8 GND
(18,19) FBA_CMD15
M24 FBA_CMD16 FBA_D49 AB25 VMA_DQ49 E11 GND
(18,19) FBA_CMD16
M23 FBA_CMD17 FBA_D50 AD26 VMA_DQ50 E14 GND
(19) FBA_CMD17
K24 FBA_CMD18 FBA_D51 AC25 VMA_DQ51 E17 GND
(18) FBA_CMD18
K23 FBA_CMD19 FBA_D52 AA27 VMA_DQ52 E2 GND
(18,19) FBA_CMD19
M27 FBA_CMD20 FBA_D53 AA26 VMA_DQ53 E20 GND
(18,19) FBA_CMD20
M26 FBA_CMD21 FBA_D54 W 26 VMA_DQ54 E22 GND
(18,19) FBA_CMD21
M25 FBA_CMD22 FBA_D55 Y25 VMA_DQ55 E25 GND
(18,19) FBA_CMD22
K26 FBA_CMD23 FBA_D56 R26 VMA_DQ56 E5 GND
(18,19) FBA_CMD23
K22 FBA_CMD24 FBA_D57 T25 VMA_DQ57 E8 GND
(18,19) FBA_CMD24
J23 FBA_CMD25 FBA_D58 N27 VMA_DQ58 H2 GND
(18,19) FBA_CMD25
J25 FBA_CMD26 FBA_D59 R27 VMA_DQ59 H23 GND
(18,19) FBA_CMD26
J24 FBA_CMD27 FBA_D60 V26 VMA_DQ60 H25 GND
(18) FBA_CMD27
K27 FBA_CMD28 FBA_D61 V27 VMA_DQ61 FB_CAL_PD_VDDQ D22 FB_CAL_PD_VDDQ R84 EV@40.2/F_4 +1.5V_GFX H5 GND
(18,19) FBA_CMD28
K25 FBA_CMD29 FBA_D62 W 27 VMA_DQ62 K11 GND
(18,19) FBA_CMD29 VMA_DM[7:0] (18,19)
J27 FBA_CMD30 FBA_D63 W 25 VMA_DQ63 K13 GND
(19) FBA_CMD30
J26 FBA_CMD31 FB_CAL_PU_GND C24 FB_CAL_PU_GND R73 EV@42.2/F_4 K15 GND
K17 GND
FBA_DQM0 D19 VMA_DM0 L10 GND
FBA_DQM1 D14 VMA_DM1 FB_CALTERM_GND B25 FB_CAL_TERM_GND R71 EV@51.1/F_4 L12 GND
FBA_DQM2 C17 VMA_DM2 L14 GND
FBA_DQM3 C22 VMA_DM3 L16 GND
P24 VMA_DM4 bga595-nvidia-n13p-gv2-s-a2 L18
FBA_DQM4 GND
FBA_DQM5 W 24 VMA_DM5 COMMON L2 GND
+1.5V_GFX
C
FBA_DQM6 AA25 VMA_DM6 L23 GND C
R80 *60.4_4 F22 FBA_DEBUG0 FBA_DQM7 U25 VMA_DM7 L25 GND
R87 *60.4_4 J22 FBA_DEBUG1 L5 GND GND AA7
M11 GND GND AB7
VMA_WDQS[7:0] (18,19)
FBA_DQS_WP0 E19 VMA_WDQS0
FBA_DQS_WP1 C15 VMA_WDQS1
D24 FBA_CLK0 FBA_DQS_WP2 B16 VMA_WDQS2
(18,19) VMA_CLK0
D25 FBA_CLK0 FBA_DQS_WP3 B22 VMA_WDQS3 bga595-nvidia-n13p-gv2-s-a2 COMMON
(18,19) VMA_CLK0#
N22 FBA_CLK1 FBA_DQS_WP4 R25 VMA_WDQS4
(18,19) VMA_CLK1
M22 FBA_CLK1 FBA_DQS_WP5 W 23 VMA_WDQS5
(18,19) VMA_CLK1#
FBA_DQS_WP6 AB26 VMA_WDQS6
T26 VMA_WDQS7 +1.5V_GFX
FBA_DQS_WP7 For support GC6 1.0
VMA_RDQS[7:0] (18,19) +3V
D18 FBA_WCK01 FBA_DQS_RN0 F19 VMA_RDQS0
For support GC6 2.0
C18 FBA_WCK01 FBA_DQS_RN1 C14 VMA_RDQS1
D17 FBA_WCK23 FBA_DQS_RN2 A16 VMA_RDQS2 EV@100/F_4 R458 FBA_CMD4 EV@100/F_4 R459
D16 FBA_WCK23 FBA_DQS_RN3 A22 VMA_RDQS3 EV@100/F_4 R461 FBA_CMD5 EV@100/F_4 R462 C177
T24 FBA_WCK45 FBA_DQS_RN4 P25 VMA_RDQS4 EV@100/F_4 R45 FBA_CMD6 EV@100/F_4 R46 R140 *0_4 GT@0.1U/16V_4
(17,29) EC_FB_CLAMP
5
U24 FBA_WCK45 FBA_DQS_RN5 W 22 VMA_RDQS5 EV@100/F_4 R50 FBA_CMD7 EV@100/F_4 R51
V24 FBA_WCK67 FBA_DQS_RN6 AB27 VMA_RDQS6 EV@100/F_4 R445 FBA_CMD8 EV@100/F_4 R446 R139 2
GT@0_4 GT@NL17SZ32DFT2G
(4,17) GC6_FB_EN
V25 FBA_WCK67 FBA_DQS_RN7 T27 VMA_RDQS7 EV@100/F_4 R41 FBA_CMD9 EV@100/F_4 R42 4
1 FBVDDQ_EN (42)
FB_PLLAVDD = 55mA EV@100/F_4 R22 FBA_CMD10 EV@100/F_4 R23 (41) GPU_PWR_GD
EV@100/F_4 R62 FBA_CMD11 EV@100/F_4 R61
EV@BLM15PX330SN1DEV_4 EV@100/F_4 R455 FBA_CMD12 EV@100/F_4 R456 U9
3
L1 +FB_PLLAVDD F16 FB_PLLAVDD EV@100/F_4 R24 FBA_CMD13 EV@100/F_4 R25
+1.05V_GFX
EV@100/F_4 R451 FBA_CMD14 EV@100/F_4 R452 R126
C79 EV@22U/6.3VS_6 P22 FB_PLLAVDD EV@100/F_4 R64 FBA_CMD15 EV@100/F_4 R63 EV@100K/F_4
C76 EV@0.1U/16V_4 EV@100/F_4 R21 FBA_CMD21 EV@100/F_4 R20 R137 GM@0_4
C89 EV@0.1U/16V_4 H22 FB_DLLAVDD GF119 EV@100/F_4 R30 FBA_CMD22 EV@100/F_4 R29
D C77 EV@0.1U/16V_4 EV@100/F_4 R18 FBA_CMD23 EV@100/F_4 R17 D
EV@100/F_4 R40 FBA_CMD24 EV@100/F_4 R39
FB_PLLAVDD GF117 FBA_CMD25
EV@100/F_4 R55 EV@100/F_4 R56 N16V stuff it, not support GC6 2.0
EV@100/F_4 R27 FBA_CMD26 EV@100/F_4 R26
EV@100/F_4 R31 FBA_CMD27 EV@100/F_4 R32
FB_DLLAVDD = 15mA EV@100/F_4 R54 FBA_CMD28 EV@100/F_4 R57
EV@100/F_4 R49 FBA_CMD29 EV@100/F_4 R48
D23
EV@100/F_4 R35 FBA_CMD30 EV@100/F_4 R36 Quanta Computer Inc.
FB_VREF_PROBE TP2
INT PROJECT : ZRW
bga595-nvidia-n13p-gv2-s-a2 COMMON Size Document Number Rev
3A
N16S-GT (MEMORY/GND)
1 2 3 4 5 6 7 8
sualaptop365.edu.vn
1 2 3 4 5 6 7 8
U34G U34J
4/14 IFPAB
7/14 IFPEF U34K
16
GF117 GF119 GF119 3/14 DACA
AC4 GF117
NC IFPA_TXC
AC3 DVI-DL DVI-SL/HDMI DP GF119 GF117
NC IFPA_TXC GF117 GF119
GF119 GF117 IFPE_AUX J3 W5 DACA_VDD I2CA_SCL B7 I2CA_SCL R521 EV@1.8K_4
GF119 GF117 NC I2CY_SDA I2CY_SDA TP61 NC NC
AA6 IFPAB_RSET NC NC I2CY_SCL I2CY_SCL IFPE_AUX J2 NC I2CA_SDA A7 I2CA_SDA R502 EV@1.8K_4
IFPA_TXD0 Y3 J7 IFPEF_PLLVDD AE2 DACA_VREF
NC TP11 NC TP49 TSEN_VREF
IFPA_TXD0 Y4
NC
IFPE_L3 J1 AF2 DACA_RSET DACA_HSYNC AE3
NC TXC TXC NC NC
V7 IFPAB_PLLVDD IFPE_L3 K1 DACA_VSYNC AE4
TP60 NC NC TXC TXC NC
NC IFPA_TXD1 AA2 K7 IFPEF_PLLVDD NC
W7 IFPAB_PLLVDD IFPA_TXD1 AA3 TP55 IFPE_L2 K3
TP56 NC NC NC TXD0 TXD0
A
IFPE_L2 K2 DACA_RED AG3 A
NC TXD0 TXD0 NC
IFPA_TXD2 AA1 K6 IFPEF_RSET IFPE_L1 M3 DACA_GREEN AF4

NC NC NC TXD1 TXD1 NC
NC IFPA_TXD2 AB1 IFPE_L1 M2
NC TXD1 TXD1
DACA_BLUE AF3
NC
IFPE_L0 M1
AA5 NC TXD2 TXD2 N1
NC IFPA_TXD3 NC TXD2 TXD2 IFPE_L0
IFPA_TXD3 AA4
NC
IFPE bga595-nvidia-n13p-gv2-s-a2 COMMON
IFPB_TXC AB4 3V MAIN POWER

NC
IFPB_TXC AB5
NC
NC HPD_E HPD_E GPIO18 C2
GF119 GF117 +3V_GFX +3V_GFX
W6 AB2 3/11 GC6 timing issue from
TP53 IFPA_IOVDD NC NC IFPB_TXD4
AB3
GC6 Power control 200K change to 100K
NC IFPB_TXD4
Y6 GF119 GF117
TP57 IFPB_IOVDD NC
H6 IFPE_IOVDD NC
NC IFPB_TXD5 AD2 TP52 GF119 +3V_GFX R117 C167 60mil
IFPB_TXD5 AD3 J6 IFPF_IOVDD GF117 GT@10K_4
NC TP51 NC
1
DVI-DL DVI-SL/HDMI DP
GT@0.022U/25V_4
NC IFPF_AUX H4 R97
I2CZ_SDA
IFPB_TXD6 AD1 NC I2CZ_SCL IFPF_AUX H3 GM@0_8
NC
NC IFPB_TXD6 AE1 R118 R116 GT@100K_4 2 Q11
EV@10K_4 GT@AO3413
NC TXC IFPF_L3 J5
3
IFPB_TXD7 AD5 NC TXC IFPF_L3 J4 60mil
NC +3V_MAIN
IFPB_TXD7 AD4
NC
3
NC TXD3 TXD0 IFPF_L2 K5 C166
NC IFPF_L2 K4 2
B
TXD3 TXD0 (17) +3V_MAIN_EN B
GT@0.022U/25V_4
NC TXD4 TXD1 IFPF_L1 L4 Q17 N16V stuff not support GC6 2.0.
IFPF NC TXD4 TXD1 IFPF_L1 L3 GT@2N7002K 1A-7
NC GPIO14 B3
1
IFPAB NC
NC
TXD5
TXD5
TXD2
TXD2
IFPF_L0
IFPF_L0
M5
M4
bga595-nvidia-n13p-gv2-s-a2 COMMON +3V_GFX
U34H
5/14 IFPC
IFPC NC HPD_F GPIO19 F7 +3V
GF119 GF117 R90
T6 IFPC_RSET GF117 GF119 EV@1.5K/F_4
NC
DVI/HDMI DP R81 3V_MAIN_PWGD

3V_MAIN_PWGD (41,42)
EV@4.7K_4
3
M7 N5 bga595-nvidia-n13p-gv2-s-a2 COMMON
TP9 IFPC_PLLVDD NC NC I2CW_SDA IFPC_AUX
N7 IFPC_PLLVDD NC I2CW_SCL IFPC_AUX N4 R88
TP50 NC
2 *100K/F_4
3
N3
PLLVDD = 38mA 2
NC TXC IFPC_L3 +3V_MAIN R104 EV@4.7K_4
NC IFPC_L3 N2 EV@BLM15PX330SN1D_4 C147 Q6
TXC
1
L2 NV_PLLVDD Q8 EV@1000p/50V_4 EV@DTC144EU
+1.05V_GFX
1
IFPC_L2 R3 C133 EV@0.1U/16V_4 C162 EV@MMBT3904-7-F
NC TXD0
IFPC_L2 R2 C154 EV@22U/6.3VS_6 *1000p/50V_4 +1.05V_GFX and GPU core power EN
NC TXD0
TXD1 IFPC_L1 R1
NC
NC TXD1 IFPC_L1 T1 SP_PLLVDD = 17mA U34M
IFPC_L0 T3 EV@HCB1005KF-181T15(180,1500MA) 9/14 XTAL_PLL
NC TXD2
C
IFPC_L0 T2 L3 SP_PLLVDD C
NC TXD2 +1.05V_GFX
C129 EV@0.1U/16V_4 L6 PLLVDD
C156 EV@0.1U/16V_4 M6 SP_PLLVDD
C152 EV@4.7U/10V_6
P6 IFPC_IOVDD NC GPIO15 C3 C142 EV@22U/6.3VS_6 N6 VID_PLLVDD
TP59 NC GF119
bga595-nvidia-n13p-gv2-s-a2 COMMON
NC GF117
VID_PLLVDD = 41mA
U34I
6/14 IFPD R524 EV@10K/F_4 XTAL_SSIN A10 XTALSSIN XTALOUTBUFF C10 BXTALOUT R504 EV@10K/F_4
GF119 GF117
U6 IFPD_RSET
GF117 GF119 27M_XTAL_IN_R C11 XTALIN XTALOUT B10 27M_XTAL_OUT
DB-->SI change 10/25
NC
DVI/HDMI DP bga595-nvidia-n13p-gv2-s-a2 COMMON
Use G-CLK
T7 IFPD_PLLVDD IFPD_AUX P4
DB-->SI change 10/25
TP54 NC NC I2CX_SDA
NC I2CX_SCL IFPD_AUX P3 Use G-CLK
R7 IFPD_PLLVDD C639
TP8 NC +3V_GFX
IFPD_L3 R5
NC TXC
4
3
IFPD_L3 R4 EV@10P/50V_4
NC TXC
DGPU_PGOK-1 27M_XTAL_IN_R Y3
IFPD_L2 T5 +3V R108 27M_XTAL_OUT EV@27MHZ +-10PPM
NC TXD0
IFPD_L2 T4 EV@4.7K_4
NC TXD0
C644
1
2
TXD1 IFPD_L1 U4
NC
IFPD NC TXD1 IFPD_L1 U3 R82
DGPU_PWROK (4)
EV@4.7K_4 EV@10P/50V_4
D
IFPD_L0 V4 D
NC TXD2
3
IFPD_L0 V3
NC TXD2
2 Q12 R105
3
EV@100K/F_4
R6 IFPD_IOVDD GPIO17 D4 R83 DGPU_POK2 2
EV@4.7K_4 Q7 EV@DTC144EUA
TP10 GF119 NC (42) HWPG_1.5VGFX
EV@METR3904-G
1
NC GF117 C141
1
C139 EV@1000P/50V_4
*1000P/50V_4
PROJECT : ZRW
bga595-nvidia-n13p-gv2-s-a2 COMMON 3A
N16S-GT (DISPLAY)
1 2 3 4 5 6 7 8
sualaptop365.edu.vn
1 2 3 4 5 6 7 8
U34L
TP7
TP6
E10
F10
10/14 MISC2
VMON_IN0
VMON_IN1 ROM_CS D12 ROM_CS R93 *10K/F_4 +3V_GFX
N16S-GT/N16V-GM Straping table
+3V_MAIN
R507
GM 920M 45.3k pull up
GT 940M 49.9K pull up
+3V_GFX 17
ROM_SI B12 ROM_SI
ROM_SO A12 ROM_SO
STRAP0 D1 STRAP0 ROM_SCLK C12 ROM_SCLK R496 R494 R495 R507 R499 R508 R506 R500
STRAP1 D2 STRAP1 *SP@4.99K/F_4 GM@4.99K/F_4 GM@4.99K/F_4 SP@49.9K/F_4 *10K/F_4 GM@10K/F_4 *10K/F_4 *10K/F_4
STRAP2 E4 STRAP2
STRAP3 E3 STRAP3 ROM_SI STRAP0
STRAP4 D3 STRAP4 ROM_SO STRAP1
ROM_SCLK STRAP2
GF119 STRAP3
A GF117 A
STRAP4
R509 *10K/F_4 C1 STRAP5_NC
+3V_GFX NC
2
BUFRST D11
R493 R491 R492
R510 EV@40.2K/F_4 F6 MULTISTRAP_REF0_GND PGOOD D10 SP@30.1K/F_4 GT@4.99K/F_4 GT@4.99K/F_4 R527 R519 R528 R526 R520
*24.9K/F_4 GM@45.3K/F_4 *15K/F_4 GM@4.99K/F_4 GM@45.3K/F_4
GF119
1
GF117
R95 EV@10K/F_4 +3V_GFX
F4 MULTISTRAP_REF1_GND NC
CEC E9 SYS_PEX_RST_MON#
F5 SYS_PEX_RST_MON# (14)
MULTISTRAP_REF2_GND NC
+3V_MAIN
bga595-nvidia-n13p-gv2-s-a2 COMMON
Q13
5
Dual
2ND_MBDATA 3 4 GPUT_DATA_L
U34N
(7,29) 2ND_MBDATA
8/14 MISC1 R101 EV@2.2K_4 +3V_GFX
I2CS_SCL D9 GPUT_CLK_L 2 R100 EV@2.2K_4 +3V_GFX
I2CS_SDA D8 GPUT_DATA_L
2ND_MBCLK 6 1 GPUT_CLK_L
(7,29) 2ND_MBCLK
I2CC_SCL A9 DGPU_EDIDCLK R505 EV@2.2K_4
I2CC_SDA B9 DGPU_EDIDDATA R523 EV@2.2K_4
EV@2N7002DW
N16S-GT DID=0x1347 [940M]
Dual
ROM_SCLK = Stuff 4.99K pull down
TP4 THERM- E12 THERMDN GF117 GF119 ROM_SO = Stuff 4.99K pull down
NC I2CB_SCL C9 N12E_SCL R522 EV@2.2K_4
TP3 THERM+ F12 THERMDP I2CB_SDA C8 N12E_SDA R503 EV@2.2K_4 For GC6 1.0 STRAP0 = Stuff 49.9K pull up
NC EC_FB_CLAMP (15,29) STRAP1 = NC
GC6_FB_EN (4,15) For GC6 2.0 STRAP2 = NC
TP47 JTAG_TCK AE5 JTAG_TCK R120 EV@0_4 STRAP3 = NC
TP48 JTAG_TMS AD6 JTAG_TMS
TP46 JTAG_TDI AE6 +3V_GFX
STRAP4 = NC
JTAG_TDI
TP45 JTAG_TDO AF6 JTAG_TDO 1 3 R129 *0_4 ROM_SI = VRAM Configuration follow below table
JTAG_TRST# AG4 JTAG_TRST GPIO0 C6 FB_CLAMP_MON R128 EV@0_4
GPIO1 B2 Q14 R121
GPIO2 D6 *2N7002K EV@10K/F_4 R107 GT@0_4 R99
N16V-GM DID=0x1299 [920M]
2
B C7 *10K/F_4 B
GPIO3
GPIO4 F9 +3V_GFX For GC6 1.0
GPIO5 A3 +3V_MAIN_EN R125 *0_4 ROM_SCLK = Stuff 4.99K pull up
+3V_MAIN_EN (16) FB_CLAMP_REQ# (29)
GPIO6 A4 GPU_EVENT# 1 3 R106 GT@0_4
B6 DGPU_EVENT# (4) ROM_SO = Stuff 4.99K pull up.
GPIO7
OVERT A6 VGA_OVT# Q15 For GC6 2.0 STRAP0 = Stuff 45.3k pull up. (EDID Panel)
GPIO9 F8 ALERT *2N7002K STRAP1 = Stuff 45.3k pull down.(Gen3 support)
2
GPIO10 C5 STRAP2 = Stuff 10k pull up.(DID 0x1299)
GPIO11 E7 N16S (GC2.0) -> GPIO0 un-stuff Q14 and R129 STRAP3 = Stuff 4.99k pull down.(No display out)
PWM-VID (41)
GPIO12 D7 GPIO12_ACIN GPIO6 un-stuff Q15 \ R99 and R125
B4
STRAP4 = Stuff 45.3k pull down. (Gen3/max speed)
GPIO13 DGPU_PSI (41)
N16S (GC1.0) -> GPIO0 stuff Q14 and R129, un-stuff R120 \ R128 ROM_SI = VRAM Configuration follow below table
0926 Del +3V_GFX GPIO6 stuff Q15 and R125, un-stuff R107,R106.
GF117 GF119
NC GPIO16 D5 GPU_GPIO16 TP58 Note: GC6 2.0 is supported by N16x GPU in the GB2B
NC GPIO20 E6
GPIO21 C4 GPU_PEX_RST_HOLD# ,GB4B-128,and GB3B-256 packages.
NC GPU_PEX_RST_HOLD# (14)
bga595-nvidia-n13p-gv2-s-a2 COMMON Logical Strap Bit Mapping

PU-VDD PD
Resistor P/N
(14) PEGX_RST#
GPIO ASSIGNMENTS 4.99K---> CS24992FB26 4.99K 1000 0000
10K ---> CS31002FB26
N16S-GT/N16V-GM Straping table 10K 1001 0001
2
15K ---> CS31502FB24

GPIO I/O PIN USAGE 20K ---> CS32002FB29 15K 1010 0010
VGA_OVT# 1 3 ROM_SI N16S-GT [ 940M ]
DGPU_OTP# (29)
2G Hynix 128Mx16 -->34.8K PD 24.9K --->CS32492FB16 20K 1011 0011
0 IN FB_CLAMP_MON FB Clamp monitor (GC6 1.0) 30.1K --->CS33012FB18
Q16 2G Micron 128Mx16 -->45.3K PD
EV@2N7002K 0 OUT GC6_FB_EN GC6 FB Enable (GC6 2.0) 2G Samsumg 128Mx16 -->4.99K PU 34.8K---> CS33482FB22 24.9K 1100 0100
5 OUT +3V_MAIN_EN Enable GC6 +3V_MAIN
4G Hynix 256Mx16 -->30.1K PU Single Rank 45.3K ---> CS34532FB18 GM 30.1K 1101 0101
GPIO12 AC detect 4G Hynix 256Mx16 -->24.9K PU Dual Rank 49.9K ---> CS34992FB10 GT
AC high 6 OUT FB_CLAMP_REQ# Active low FB Clamp toggle request (GC6 1.0) 4G Micron 256Mx16 -->10K PD 34.8K 1110 0110
DC low
C +3V_GFX 6 IN DGPU_EVENT# DGPU EVENT from CPU (GC6 2.0)
4G Samsumg 256Mx16 -->15K PD 45.3K 1111 0111 C
dGPU_OPP# = EC control
Reserve 0 ohm between 8 OUT VGA_OVT# ACTIVE LOW THERMAL OVER TEMP ROM_SI N16V-GM [ 920M Single RAM]
GPU_THROTTING# and GPIO12_ACIN 2G Hynix 128Mx16 -->20K PD ROM_SO ROM_SCLK STRAP0
2
EV@2N7002K 9 OUT ALERT ACTIVE LOW THERMAL ALERT

Q9 2G Micron 128Mx16 -->30.1K PD N16S-GT --> 4.99K PD N16S-GT --> 4.99K PD N16S-GT --> 49.9K PU
(30) GPU_THROTTING#
R758 GPIO12_ACIN 1 3
DGPU_OPP# (29) 11 OUT PWR_VID GPU CORE_VDD PWM Control signal 2G Samsumg 128Mx16 -->34.8K PD N16V-GM --> 4.99K PU N16V-GM --> 4.99K PU N16V-GM --> 45.3K PU
*EV@0_4
4G Micron 256Mx16 -->10K PD
12 IN PWR_LEVEL AC Power detect or power supply overdraw input
4G Hynix 256Mx16 -->10K PU
+3V_GFX
13 OUT PSI Phase Shedding 4G Samsumg 256Mx16 -->24.9K PD
EV@10K/F_4 R94 GPIO12_ACIN

N16S-GM/-GT/-LP VRAM Configuration Table ROM_SI
N16V-GM strap0~3 table
EV@10K/F_4 R518 DGPU_PSI RAMCFG
[3:0] DESCRIPTION 1.5V DDR3 Vendor Vendor P/N ROM_SI STN B/S Configuration STRAP0 = Stuff 45.3k pull up. (EDID Panel)
EV@100K/F_4 R111 VGA_OVT#
256Mx16 STRAP1 = Stuff 45.3k pull down.(Gen3 support)
ALERT
0101 0x5 DDR3L 256Mx16, 64bit, 4Gb,1000MHz HYNIX C-die H5TC4G63CFR-N0C PD 30.1K ohm AKD5PZDTW03 Single Rank 2GB
EV@10K/F_4 R511
STRAP2 = Stuff 10k pull up.(DID 0x1299)
1100 0xC DDR3L 256Mx16, 64bit, 4Gb,1000MHz HYNIX C-die H5TC4G63CFR-N0C PU 24.9K ohm AKD5PZDTW03 Dual Rank 4GB
EV@10K/F_4 R501 GPU_PEX_RST_HOLD# 0001 0x1 DDR3L 256Mx16, 64bit, 4Gb,1000MHz Micron E-die MT41J256M16HA-093G:E PD 10K ohm AKD5PZSTL05 Single Rank Dual Rank STRAP3 = Stuff 4.99k pull down.(No display out)
GPU_EVENT#
0010 0x2 DDR3L 256Mx16, 64bit, 4Gb,1000MHz SAMSUNG D-die K4W4G1646D-BC1A PD 15K ohm AKD5PGWT504 Single Rank Dual Rank STRAP4 = Stuff 45.3k pull down. (Gen3/max speed)
EV@10K/F_4 R516
0100 0x4 DDR3L 256Mx16, 64bit, 4Gb,1000MHz SAMSUNG E-die K4W4G1646E-BC1A PD 24.9K ohm AKD5PGDT504 Single Rank 2GB
1101 0xD DDR3L 256Mx16, 64bit, 4Gb,1000MHz SAMSUNG E-die K4W4G1646E-BC1A PU 30.1K ohm AKD5PGDT504 Dual Rank 4GB
*10K/F_4 R498 JTAG_TMS
*10K/F_4 R489 JTAG_TDI

N16V-GM/GL VRAM Configuration Table ROM_SI
EV@10K/F_4 R490 JTAG_TRST#
D D
JTAG_TCK
RAMCFG
*10K/F_4 R497 DESCRIPTION 1.5V DDR3 Vendor Vendor P/N ROM_SI STN B/S Configuration
[3:0]
256Mx16
0001 0x1 DDR3L 256Mx16, 64bit, 4Gb,1000MHz Micron E-die MT41J256M16HA-093G:E PD 10K ohm AKD5PZSTL05
Single Rank or
1001 0x9 DDR3L 256Mx16, 64bit, 4Gb,1000MHz HYNIX C-die H5TC4G63CFR-N0C PU 10K ohm AKD5PZDTW03 Single Rank stuffing
0100 0x4 DDR3L 256Mx16, 64bit, 4Gb,1000MHz SAMSUNG D-die K4W4G1646D-BC1A PD 24.9K ohm AKD5PGWT504 for Dual Rank
1010 0xA DDR3L 256Mx16, 64bit, 4Gb,1000MHz SAMSUNG E-die K4W4G1646E-BC1A PU 15K ohm AKD5PGDT504
sualaptop365.edu.vn
PROJECT : ZRW
N16S-GT (GPIO/STRAPS) 3A

1 2 3 4 5 6 7 8
5 4 3 2 1
HYU 256Mx16, H5TC4G63CFR-N0C QBC PN：---TOP B/S PN : AKD5PZDTW03

MIC 256Mx16, MT41J256M16HA-093G:E QBC PN：---TOP B/S PN : AKD5PZSTL05
SAM 256Mx16, K4W4G1646D-BC1A QBC PN：---TOP B/S PN : AKD5PGWT504
18
U32 U31 U29 U28
VREFC_VMA1 M8 E3 VREFC_VMA1 M8 E3 VREFC_VMA3 M8 E3 VREFC_VMA3 M8 E3

(19) VREFC_VMA1 VREFCA DQL0 VMA_DQ11 (15,19) VREFCA DQL0 VMA_DQ4 (15,19) (19) VREFC_VMA3 VREFCA DQL0 VMA_DQ32 (15,19) VREFCA DQL0 VMA_DQ44 (15,19)
VREFD_VMA1 H1 F7 VREFD_VMA1 H1 F7 VREFD_VMA3 H1 F7 VREFD_VMA3 H1 F7
D
(19) VREFD_VMA1 VREFDQ DQL1 VMA_DQ12 (15,19) VREFDQ DQL1 VMA_DQ1 (15,19) (19) VREFD_VMA3 VREFDQ DQL1 VMA_DQ39 (15,19) VREFDQ DQL1 VMA_DQ43 (15,19) D
F2 F2 F2 F2
DQL2 VMA_DQ10 (15,19) DQL2 VMA_DQ5 (15,19) DQL2 VMA_DQ34 (15,19) DQL2 VMA_DQ45 (15,19)
N3 F8 FBA_CMD7 N3 F8 FBA_CMD7 N3 F8 FBA_CMD7 N3 F8
(15,19) FBA_CMD7 A0 DQL3 VMA_DQ15 (15,19) A0 DQL3 VMA_DQ0 (15,19) A0 DQL3 VMA_DQ38 (15,19) A0 DQL3 VMA_DQ40 (15,19)
P7 H3 FBA_CMD10 P7 H3 FBA_CMD10 P7 H3 FBA_CMD10 P7 H3
N2 G2 FBA_CMD6 N2 G2 FBA_CMD6 N2 G2 FBA_CMD6 N2 G2
P2 FBA_CMD26 P2 FBA_CMD26 P2 FBA_CMD26 P2
(15,19) FBA_CMD26 A5 A5 A5 A5
R8 FBA_CMD5 R8 FBA_CMD5 R8 FBA_CMD5 R8
(15,19) FBA_CMD5 A6 A6 A6 A6
R2 D7 FBA_CMD21 R2 D7 FBA_CMD21 R2 D7 FBA_CMD21 R2 D7
(15,19) FBA_CMD21 A7 DQU0 VMA_DQ17 (15,19) A7 DQU0 VMA_DQ24 (15,19) A7 DQU0 VMA_DQ57 (15,19) A7 DQU0 VMA_DQ52 (15,19)
T8 C3 FBA_CMD8 T8 C3 FBA_CMD8 T8 C3 FBA_CMD8 T8 C3
R3 C8 FBA_CMD4 R3 C8 FBA_CMD4 R3 C8 FBA_CMD4 R3 C8
L7 C2 FBA_CMD25 L7 C2 FBA_CMD25 L7 C2 FBA_CMD25 L7 C2
(15,19) FBA_CMD25 A10/AP DQU3 VMA_DQ23 (15,19) A10/AP DQU3 VMA_DQ30 (15,19) A10/AP DQU3 VMA_DQ63 (15,19) A10/AP DQU3 VMA_DQ50 (15,19)
R7 A7 FBA_CMD23 R7 A7 FBA_CMD23 R7 A7 FBA_CMD23 R7 A7
N7 A2 FBA_CMD9 N7 A2 FBA_CMD9 N7 A2 FBA_CMD9 N7 A2
(15,19) FBA_CMD9 A12/BC DQU5 VMA_DQ22 (15,19) A12/BC DQU5 VMA_DQ28 (15,19) A12/BC DQU5 VMA_DQ60 (15,19) A12/BC DQU5 VMA_DQ48 (15,19)
T3 B8 FBA_CMD12 T3 B8 FBA_CMD12 T3 B8 FBA_CMD12 T3 B8
T7 A3 FBA_CMD14 T7 A3 FBA_CMD14 T7 A3 FBA_CMD14 T7 A3
M7 M7 M7 M7
A15 A15 A15 A15
M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2

(15,19) FBA_CMD29 BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 +1.5V_GFX
N8 D9 FBA_CMD13 N8 D9 FBA_CMD13 N8 D9 FBA_CMD13 N8 D9
(15,19) FBA_CMD13 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
M3 G7 EV@4.7U/10V_6 C601 FBA_CMD27 M3 G7 EV@4.7U/10V_6 C630 FBA_CMD27 M3 G7 EV@4.7U/10V_6 C631 FBA_CMD27 M3 G7 EV@4.7U/10V_6 C574
(15) FBA_CMD27 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
K2 K2 K2 K2
VDD#K2 K8 EV@0.1U/16V_4 C635 VDD#K2 K8 EV@0.1U/16V_4 C616 VDD#K2 K8 EV@0.1U/16V_4 C608 VDD#K2 K8 EV@0.1U/16V_4 C594
VDD#K8 N1 EV@0.1U/16V_4 C619 VDD#K8 N1 EV@0.1U/16V_4 C613 VDD#K8 N1 EV@0.1U/16V_4 C81 VDD#K8 N1 EV@0.1U/16V_4 C48
J7 VDD#N1 N9 VMA_CLK0 J7 VDD#N1 N9 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
(15,19) VMA_CLK0 CK VDD#N9 CK VDD#N9 (15,19) VMA_CLK1 CK VDD#N9 CK VDD#N9
K7 R1 GND VMA_CLK0# K7 R1 GND K7 R1 GND VMA_CLK1# K7 R1 GND
(15,19) VMA_CLK0# CK VDD#R1 CK VDD#R1 (15,19) VMA_CLK1# CK VDD#R1 CK VDD#R1
K9 R9 FBA_CMD3 K9 R9 K9 R9 FBA_CMD19 K9 R9
(15,19) FBA_CMD3 CKE VDD#R9 CKE VDD#R9 (15,19) FBA_CMD19 CKE VDD#R9 CKE VDD#R9
C K1 A1 FBA_CMD0 K1 A1 K1 A1 FBA_CMD16 K1 A1 C
(15,19) FBA_CMD0 ODT VDDQ#A1 +1.5V_GFX ODT VDDQ#A1 +1.5V_GFX (15,19) FBA_CMD16 ODT VDDQ#A1 +1.5V_GFX ODT VDDQ#A1 +1.5V_GFX
L2 A8 FBA_CMD2 L2 A8 L2 A8 FBA_CMD18 L2 A8
(15) FBA_CMD2 CS VDDQ#A8 CS VDDQ#A8 (15) FBA_CMD18 CS VDDQ#A8 CS VDDQ#A8
J3 C1 EV@4.7U/10V_6 C52 FBA_CMD11 J3 C1 EV@4.7U/10V_6 C40 FBA_CMD11 J3 C1 EV@4.7U/10V_6 C584 FBA_CMD11 J3 C1 EV@4.7U/10V_6 C54
(15,19) FBA_CMD11 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9
(15,19) FBA_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 EV@0.1U/16V_4 C621 FBA_CMD28 L3 D2 EV@0.1U/16V_4 C62 FBA_CMD28 L3 D2 EV@0.1U/16V_4 C634 FBA_CMD28 L3 D2 EV@0.1U/16V_4 C562
(15,19) FBA_CMD28 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 EV@0.1U/16V_4 C620 E9 EV@0.1U/16V_4 C70 E9 EV@0.1U/16V_4 C583 E9 EV@0.1U/16V_4 C15
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
F3 VDDQ#F1 H2 GND F3 VDDQ#F1 H2 GND F3 VDDQ#F1 H2 GND F3 VDDQ#F1 H2 GND
(15,19) VMA_WDQS1 DQSL VDDQ#H2 (15,19) VMA_WDQS0 DQSL VDDQ#H2 (15,19) VMA_WDQS4 DQSL VDDQ#H2 (15,19) VMA_WDQS5 DQSL VDDQ#H2
G3 H9 G3 H9 G3 H9 G3 H9
(15,19) VMA_RDQS1 DQSL VDDQ#H9 (15,19) VMA_RDQS0 DQSL VDDQ#H9 (15,19) VMA_RDQS4 DQSL VDDQ#H9 (15,19) VMA_RDQS5 DQSL VDDQ#H9
E7 A9 E7 A9 E7 A9 E7 A9
(15,19) VMA_DM1 DML VSS#A9 (15,19) VMA_DM0 DML VSS#A9 (15,19) VMA_DM4 DML VSS#A9 (15,19) VMA_DM5 DML VSS#A9
D3 B3 D3 B3 D3 B3 D3 B3
(15,19) VMA_DM2 DMU VSS#B3 (15,19) VMA_DM3 DMU VSS#B3 (15,19) VMA_DM7 DMU VSS#B3 (15,19) VMA_DM6 DMU VSS#B3
E1 E1 E1 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
C7 VSS#G8 J2 C7 VSS#G8 J2 C7 VSS#G8 J2 C7 VSS#G8 J2
(15,19) VMA_WDQS2 DQSU VSS#J2 (15,19) VMA_WDQS3 DQSU VSS#J2 (15,19) VMA_WDQS7 DQSU VSS#J2 (15,19) VMA_WDQS6 DQSU VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
(15,19) VMA_RDQS2 DQSU VSS#J8 (15,19) VMA_RDQS3 DQSU VSS#J8 (15,19) VMA_RDQS7 DQSU VSS#J8 (15,19) VMA_RDQS6 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9
(15,19) FBA_CMD20 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
FBA_ZQ0 L8 VSS#T1 T9 FBA_ZQ1 L8 VSS#T1 T9 FBA_ZQ4 L8 VSS#T1 T9 FBA_ZQ5 L8 VSS#T1 T9
GND ZQ VSS#T9 GND ZQ VSS#T9 GND ZQ VSS#T9 GND ZQ VSS#T9
EV@243_4 R487 EV@243_4 R486 EV@243_4 R464 EV@243_4 R471
B1 GND B1 GND B1 GND B1 GND
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
B J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 B
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
EV@VRAM _DDR3_SAMSUNG_256MX16 EV@VRAM _DDR3_SAMSUNG_256MX16 EV@VRAM _DDR3_SAMSUNG_256MX16 EV@VRAM _DDR3_SAMSUNG_256MX16
162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402) 162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402)
CS11622FB15 RES CHIP 162 1/16W +-1%(0402) CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
+1.5V_GFX
C592 EV@1U/6.3V_4 +1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX

C623 EV@1U/6.3V_4 FOR EMI Request
C611 EV@1U/6.3V_4
C636 EV@1U/6.3V_4 C582 EV@10U/6.3V_6 +1.5V_GFX
R466 R76 R33 R472 +1.5V_GFX
C625 EV@10U/6.3V_6 EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4
C568 EV@10U/6.3V_6
C603 EV@10U/6.3V_6 C46 *120P/50V_4 +1.5V_GFX
A +1.5V_GFX VREFC_VMA1 VREFD_VMA1 VREFC_VMA3 VREFD_VMA3 C17 *120P/50V_4 +1.5V_GFX C47 EV@10U/6.3V_6 A
C558 EV@0.1U/16V_4 C67 *120P/50V_4
C43 EV@0.1U/16V_4 VMA_CLK0 VMA_CLK1 C586 *120P/50V_4 C570 EV@1U/6.3V_4 C615 EV@1U/6.3V_4 C559 EV@10U/6.3V_6
C622 EV@1U/6.3V_4 C104 EV@0.1U/16V_4 R469 R77 R34 R467 C564 *120P/50V_4 C98 EV@1U/6.3V_4 C561 EV@1U/6.3V_4
C38 EV@1U/6.3V_4 EV@1.33K/F_4 C590 EV@1.33K/F_4 C115 R75 EV@1.33K/F_4 C37 EV@1.33K/F_4 C599 R68 C606 *120P/50V_4 C579 EV@1U/6.3V_4 C563 EV@1U/6.3V_4 C595 EV@0.1U/16V_4
C617 EV@1U/6.3V_4 C101 EV@0.1U/16V_4 EV@0.01U/25V_4 EV@0.01U/25V_4 EV@162_4 EV@0.01U/25V_4 EV@0.01U/25V_4 EV@162_4 C105 *120P/50V_4 C573 EV@1U/6.3V_4 C572 EV@1U/6.3V_4 C624 EV@0.1U/16V_4
C571 EV@1U/6.3V_4 C612 EV@0.1U/16V_4 C585 *120P/50V_4 C588 EV@0.1U/16V_4
C598 EV@0.1U/16V_4 VMA_CLK0# VMA_CLK1#
C566 EV@0.1U/16V_4
C565 EV@0.1U/16V_4
C567 EV@0.1U/16V_4
PROJECT : ZRW
3A
DDR3L - RANK0
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
HYU 256Mx16, H5TC4G63CFR-N0C QBC PN：---TOP B/S PN : AKD5PZDTW03

MIC 256Mx16, MT41J256M16HA-093G:E QBC PN：---TOP B/S PN : AKD5PZSTL05
19
SAM 256Mx16, K4W4G1646D-BC1A QBC PN：---TOP B/S PN : AKD5PGWT504
U2
U4 U3
U5 VREFC_VMA3 M8 E3
VREFCA DQL0 VMA_DQ43 (15,18)
VREFC_VMA1 M8 E3 VREFC_VMA3 M8 E3 VREFD_VMA3 H1 F7
VREFCA DQL0 VMA_DQ1 (15,18) (18) VREFC_VMA3 VREFCA DQL0 VMA_DQ39 (15,18) VREFDQ DQL1 VMA_DQ44 (15,18)
VREFC_VMA1 M8 E3 VREFD_VMA1 H1 F7 VREFD_VMA3 H1 F7 F2
D
(18) VREFC_VMA1 VREFCA DQL0 VMA_DQ12 (15,18) VREFDQ DQL1 VMA_DQ4 (15,18) (18) VREFD_VMA3 VREFDQ DQL1 VMA_DQ32 (15,18) DQL2 VMA_DQ40 (15,18) D
VREFD_VMA1 H1 F7 F2 F2 FBA_CMD9 N3 F8
(18) VREFD_VMA1 VREFDQ DQL1 VMA_DQ11 (15,18) DQL2 VMA_DQ0 (15,18) DQL2 VMA_DQ38 (15,18) A0 DQL3 VMA_DQ45 (15,18)
F2 FBA_CMD9 N3 F8 FBA_CMD9 N3 F8 FBA_CMD24 P7 H3
DQL2 VMA_DQ15 (15,18) A0 DQL3 VMA_DQ5 (15,18) A0 DQL3 VMA_DQ34 (15,18) A1 DQL4 VMA_DQ41 (15,18)
N3 F8 FBA_CMD24 P7 H3 FBA_CMD24 P7 H3 FBA_CMD10 P3 H8
P7 H3 FBA_CMD10 P3 H8 FBA_CMD10 P3 H8 FBA_CMD13 N2 G2
P3 H8 FBA_CMD13 N2 G2 FBA_CMD13 N2 G2 FBA_CMD26 P8 H7
N2 G2 FBA_CMD26 P8 H7 FBA_CMD26 P8 H7 FBA_CMD22 P2
(15,18) FBA_CMD13 A3 DQL6 VMA_DQ14 (15,18) A4 DQL7 VMA_DQ6 (15,18) A4 DQL7 VMA_DQ33 (15,18) A5
P8 H7 FBA_CMD22 P2 FBA_CMD22 P2 FBA_CMD21 R8
(15,18) FBA_CMD26 A4 DQL7 VMA_DQ8 (15,18) A5 A5 A6
P2 FBA_CMD21 R8 FBA_CMD21 R8 FBA_CMD5 R2 D7
(15,18) FBA_CMD22 A5 A6 A6 A7 DQU0 VMA_DQ51 (15,18)
R8 FBA_CMD5 R2 D7 FBA_CMD5 R2 D7 FBA_CMD8 T8 C3
(15,18) FBA_CMD21 A6 A7 DQU0 VMA_DQ25 (15,18) A7 DQU0 VMA_DQ62 (15,18) A8 DQU1 VMA_DQ52 (15,18)
R2 D7 FBA_CMD8 T8 C3 FBA_CMD8 T8 C3 FBA_CMD23 R3 C8
T8 C3 FBA_CMD23 R3 C8 FBA_CMD23 R3 C8 FBA_CMD28 L7 C2
(15,18) FBA_CMD8 A8 DQU1 VMA_DQ17 (15,18) A9 DQU2 VMA_DQ30 (15,18) A9 DQU2 VMA_DQ63 (15,18) A10/AP DQU3 VMA_DQ54 (15,18)
R3 C8 FBA_CMD28 L7 C2 FBA_CMD28 L7 C2 FBA_CMD4 R7 A7
(15,18) FBA_CMD23 A9 DQU2 VMA_DQ21 (15,18) A10/AP DQU3 VMA_DQ24 (15,18) A10/AP DQU3 VMA_DQ59 (15,18) A11 DQU4 VMA_DQ49 (15,18)
L7 C2 FBA_CMD4 R7 A7 FBA_CMD4 R7 A7 FBA_CMD7 N7 A2
(15,18) FBA_CMD28 A10/AP DQU3 VMA_DQ18 (15,18) A11 DQU4 VMA_DQ31 (15,18) A11 DQU4 VMA_DQ61 (15,18) A12/BC DQU5 VMA_DQ55 (15,18)
R7 A7 FBA_CMD7 N7 A2 FBA_CMD7 N7 A2 FBA_CMD14 T3 B8
(15,18) FBA_CMD4 A11 DQU4 VMA_DQ20 (15,18) A12/BC DQU5 VMA_DQ27 (15,18) A12/BC DQU5 VMA_DQ56 (15,18) A13 DQU6 VMA_DQ48 (15,18)
N7 A2 FBA_CMD14 T3 B8 FBA_CMD14 T3 B8 FBA_CMD12 T7 A3
(15,18) FBA_CMD7 A12/BC DQU5 VMA_DQ16 (15,18) A13 DQU6 VMA_DQ28 (15,18) A13 DQU6 VMA_DQ60 (15,18) A14 DQU7 VMA_DQ53 (15,18)
T3 B8 FBA_CMD12 T7 A3 FBA_CMD12 T7 A3 M7
(15,18) FBA_CMD14 A13 DQU6 VMA_DQ22 (15,18) A14 DQU7 VMA_DQ29 (15,18) A14 DQU7 VMA_DQ58 (15,18) A15
T7 A3 M7 M7
(15,18) FBA_CMD12 A14 DQU7 VMA_DQ19 (15,18) A15 A15
M7
A15 FBA_CMD29 M2 B2
BA0 VDD#B2 +1.5V_GFX
FBA_CMD29 M2 B2 FBA_CMD29 M2 B2 FBA_CMD6 N8 D9
BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 +1.5V_GFX BA1 VDD#D9
M2 B2 FBA_CMD6 N8 D9 FBA_CMD6 N8 D9 FBA_CMD30 M3 G7 DR@4.7U/10V_6 C32
(15,18) FBA_CMD29 BA0 VDD#B2 +1.5V_GFX BA1 VDD#D9 BA1 VDD#D9 BA2 VDD#G7
N8 D9 FBA_CMD30 M3 G7 DR@4.7U/10V_6 C587 FBA_CMD30 M3 G7 DR@4.7U/10V_6 C75 K2
(15,18) FBA_CMD6 BA1 VDD#D9 BA2 VDD#G7 BA2 VDD#G7 VDD#K2
M3 G7 DR@4.7U/10V_6 C110 K2 K2 K8 DR@0.1U/16V_4 C576
(15) FBA_CMD30 BA2 VDD#G7 VDD#K2 VDD#K2 VDD#K8
K2 K8 DR@0.1U/16V_4 C11 K8 DR@0.1U/16V_4 C122 N1 DR@0.1U/16V_4 C31
VDD#K2 K8 DR@0.1U/16V_4 C557 VDD#K8 N1 DR@0.1U/16V_4 C56 VDD#K8 N1 DR@0.1U/16V_4 C58 VMA_CLK1 J7 VDD#N1 N9
VDD#K8 N1 DR@0.1U/16V_4 C597 VMA_CLK0 J7 VDD#N1 N9 J7 VDD#N1 N9 VMA_CLK1# K7 CK VDD#N9 R1 GND
VDD#N1 CK VDD#N9 (15,18) VMA_CLK1 CK VDD#N9 CK VDD#R1
J7 N9 VMA_CLK0# K7 R1 GND K7 R1 GND FBA_CMD19 K9 R9
(15,18) VMA_CLK0 CK VDD#N9 CK VDD#R1 (15,18) VMA_CLK1# CK VDD#R1 CKE VDD#R9
K7 R1 GND FBA_CMD3 K9 R9 K9 R9
(15,18) VMA_CLK0# CK VDD#R1 CKE VDD#R9 (15,18) FBA_CMD19 CKE VDD#R9
K9 R9
(15,18) FBA_CMD3 CKE VDD#R9 FBA_CMD16 K1 A1
C ODT VDDQ#A1 +1.5V_GFX C
FBA_CMD0 K1 A1 K1 A1 FBA_CMD17 L2 A8
ODT VDDQ#A1 +1.5V_GFX (15,18) FBA_CMD16 ODT VDDQ#A1 +1.5V_GFX CS VDDQ#A8
K1 A1 FBA_CMD1 L2 A8 L2 A8 FBA_CMD11 J3 C1 DR@4.7U/10V_6 C55
(15,18) FBA_CMD0 ODT VDDQ#A1 +1.5V_GFX CS VDDQ#A8 (15) FBA_CMD17 CS VDDQ#A8 RAS VDDQ#C1
L2 A8 FBA_CMD11 J3 C1 DR@4.7U/10V_6 C36 FBA_CMD11 J3 C1 DR@4.7U/10V_6 C94 FBA_CMD15 K3 C9
(15) FBA_CMD1 CS VDDQ#A8 RAS VDDQ#C1 RAS VDDQ#C1 CAS VDDQ#C9
J3 C1 DR@4.7U/10V_6 C560 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD25 L3 D2 DR@0.1U/16V_4 C637
(15,18) FBA_CMD11 RAS VDDQ#C1 CAS VDDQ#C9 CAS VDDQ#C9 WE VDDQ#D2
K3 C9 FBA_CMD25 L3 D2 DR@0.1U/16V_4 C575 FBA_CMD25 L3 D2 DR@0.1U/16V_4 C66 E9 DR@0.1U/16V_4 C23
(15,18) FBA_CMD15 CAS VDDQ#C9 WE VDDQ#D2 WE VDDQ#D2 VDDQ#E9
L3 D2 DR@0.1U/16V_4 C57 E9 DR@0.1U/16V_4 C100 E9 DR@0.1U/16V_4 C44 F1
(15,18) FBA_CMD25 WE VDDQ#D2 VDDQ#E9 VDDQ#E9 VDDQ#F1
E9 DR@0.1U/16V_4 C618 F1 F1 F3 H2 GND
VDDQ#E9 VDDQ#F1 VDDQ#F1 (15,18) VMA_WDQS5 DQSL VDDQ#H2
F1 F3 H2 GND F3 H2 GND G3 H9
VDDQ#F1 (15,18) VMA_WDQS0 DQSL VDDQ#H2 (15,18) VMA_WDQS4 DQSL VDDQ#H2 (15,18) VMA_RDQS5 DQSL VDDQ#H9
F3 H2 GND G3 H9 G3 H9
(15,18) VMA_WDQS1 DQSL VDDQ#H2 (15,18) VMA_RDQS0 DQSL VDDQ#H9 (15,18) VMA_RDQS4 DQSL VDDQ#H9
G3 H9
(15,18) VMA_RDQS1 DQSL VDDQ#H9 E7 A9
(15,18) VMA_DM5 DML VSS#A9
E7 A9 E7 A9 D3 B3
(15,18) VMA_DM0 DML VSS#A9 (15,18) VMA_DM4 DML VSS#A9 (15,18) VMA_DM6 DMU VSS#B3
E7 A9 D3 B3 D3 B3 E1
(15,18) VMA_DM1 DML VSS#A9 (15,18) VMA_DM3 DMU VSS#B3 (15,18) VMA_DM7 DMU VSS#B3 VSS#E1
D3 B3 E1 E1 G8
(15,18) VMA_DM2 DMU VSS#B3 VSS#E1 VSS#E1 VSS#G8
E1 G8 G8 C7 J2
VSS#E1 VSS#G8 VSS#G8 (15,18) VMA_WDQS6 DQSU VSS#J2
G8 C7 J2 C7 J2 B7 J8
VSS#G8 (15,18) VMA_WDQS3 DQSU VSS#J2 (15,18) VMA_WDQS7 DQSU VSS#J2 (15,18) VMA_RDQS6 DQSU VSS#J8
C7 J2 B7 J8 B7 J8 M1
(15,18) VMA_WDQS2 DQSU VSS#J2 (15,18) VMA_RDQS3 DQSU VSS#J8 (15,18) VMA_RDQS7 DQSU VSS#J8 VSS#M1
B7 J8 M1 M1 M9
(15,18) VMA_RDQS2 DQSU VSS#J8 VSS#M1 VSS#M1 VSS#M9
M1 M9 M9 P1
VSS#M1 M9 VSS#M9 P1 VSS#M9 P1 FBA_CMD20 T2 VSS#P1 P9
VSS#M9 P1 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 RESET VSS#P9 T1
T2 VSS#P1 P9 RESET VSS#P9 T1 RESET VSS#P9 T1 FBA_ZQ7 L8 VSS#T1 T9
(15,18) FBA_CMD20 RESET VSS#P9 VSS#T1 VSS#T1 GND ZQ VSS#T9
T1 FBA_ZQ3 L8 T9 FBA_ZQ6 L8 T9
VSS#T1 GND ZQ VSS#T9 GND ZQ VSS#T9
FBA_ZQ2 L8 T9 DR@243_4 R44
GND ZQ VSS#T9 DR@243_4 R70 DR@243_4 R69 B1 GND
DR@243_4 R78 B1 GND B1 GND VSSQ#B1 B9
B1 GND VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B9 D1
VSSQ#B1 B9 VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#D1 D8
VSSQ#B9 D1 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D8 E2
VSSQ#D1 D8 VSSQ#D8 E2 VSSQ#D8 E2 J1 VSSQ#E2 E8
B VSSQ#D8 E2 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 L1 NC#J1 VSSQ#E8 F9 B
J1 VSSQ#E2 E8 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1
L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 L9 NC#J9 VSSQ#G1 G9
J9 NC#L1 VSSQ#F9 G1 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9
L9 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 96-BALL
NC#L9 VSSQ#G9 96-BALL 96-BALL SDRAM DDR3
96-BALL SDRAM DDR3 SDRAM DDR3 DR@VRAM _DDR3_SAMSUNG_256MX16
SDRAM DDR3 DR@VRAM _DDR3_SAMSUNG_256MX16 DR@VRAM _DDR3_SAMSUNG_256MX16
DR@VRAM _DDR3_SAMSUNG_256MX16
+1.5V_GFX
+1.5V_GFX
C50 DR@10U/6.3V_6
A C59 DR@10U/6.3V_6 C596 DR@10U/6.3V_6 A
C26 DR@10U/6.3V_6 C21 DR@10U/6.3V_6

+1.5V_GFX
+1.5V_GFX C51 DR@0.1U/16V_4 C49 DR@10U/6.3V_6
C53 DR@0.1U/16V_4 +1.5V_GFX
C39 DR@1U/6.3V_4 C61 DR@1U/6.3V_4 C107 DR@0.1U/16V_4 +1.5V_GFX C19 DR@0.1U/16V_4
C24
C106
DR@1U/6.3V_4
DR@1U/6.3V_4
C99
C633
DR@1U/6.3V_4
DR@1U/6.3V_4 C103 DR@0.1U/16V_4 C593 DR@1U/6.3V_4 C600 DR@1U/6.3V_4
C18
C28
DR@0.1U/16V_4
DR@0.1U/16V_4
C102 DR@1U/6.3V_4 C108 DR@1U/6.3V_4 C614 DR@0.1U/16V_4 C20 DR@1U/6.3V_4 C60 DR@1U/6.3V_4
C604 DR@0.1U/16V_4 C569 DR@1U/6.3V_4 C42 DR@1U/6.3V_4 C45 DR@0.1U/16V_4
PROJECT : ZRW
C22 DR@1U/6.3V_4 C14 DR@1U/6.3V_4 C68 DR@0.1U/16V_4 Size Document Number Rev
C25 DR@0.1U/16V_4 3A
DDR3L - RANK1
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
DP TO VGA
20
+3V IVDDO
RX_IVDD 20mils
20mils
L4 80ohm@100MHz RX_IVDD33 R637 *short_6
D D
C717 C738
0.1u/16V_4 0.1u/16V_4
30 mils
C309 C306 15mils
0.1u/16V_4 *0.1u/16V_4
C342
10u/6.3V_6
IVDDO Pin32 is Regulator Power output 1.8V

IVDDO
IT6515 : AL006515001
IT6516 : AL006516001
+5V change to CRTVDD5 prevent leakage when
system off and monitor on. 12/16
10
40
29
30
32
11
20
37
39
U13 IT6515 stuff 0 ohm
IT6516 un-stuff 0 ohm CRTVDD5
IVDDO
IVDD33
IVDD33
OVDD
OVDD
IVDD
IVDD
IVDD
IVDD
(2) CRT_HPD CRT_HPD 33
HPD
20mils
38 5VMCU R203 *0_6
C335 0.1u/16V_4 CRT_TXP0_C 22 MCUVDDH
C (2) CRT_TXP0 RX0P C
C331 0.1u/16V_4 CRT_TXN0_C 23
(2) CRT_TXN0 RX0N
C329 0.1u/16V_4 CRT_TXP1_C 25
(2) CRT_TXP1 RX1P
C315 0.1u/16V_4 CRT_TXN1_C 26
(2) CRT_TXN1 RX1N
24 URDBG
URDBG TP24
12
ISPSCL 13
CRT_AUXP C341 0.1u/16V_4 CRT_AUXP_C 19 ISPSDA
(2) CRT_AUXP RXAUXP
CRT_AUXN C343 0.1u/16V_4 CRT_AUXN_C 18 17 DDCCLK_R R225 22/J_4 DDCCLK (21)
(2) CRT_AUXN RXAUXN VGADDCCLK 16 DDCDAT_R R226 22/J_4 DDCDAT (21)
VGADDCSDA IVDDO
15 1 VSYNC VSYNC (21)
14 DCAUXP VSYNC 2 HSYNC
+3V DCAUXN HSYNC HSYNC (21) 20mils
IVDDO DAC_VDDC 80ohm@100MHz L21
0929 modify
C729
10mils
L20 80ohm@100MHz RX_AVCC 21 6 0.1u/16V_4 C734
0.1u/16V_4 C736 27 AVCC VDDC 4.7u/10V_6
AVCC
30mils 20mils 10mils
C715
10u/6.3V_6
*0.1u/16V_4 C727 IT6515FN
9 CRT_RED CRT_RED (21)
IORP
8 CRT_GRE CRT_GRE (21)

IOGP
7 CRT_BLU CRT_BLU (21)

B IOBP B
34
RSVD TP15
10mils 3 VGA_RST R206 200/F_4

RX_AVCC 28 RSET
0.1u/16V_4 C722 ASPVCC
5 DAC_VDDC DAC_VDDC
VDDA
20mils
4 C725
*2.2K_4 R200 36 COMP
+5V PCSDA
*2.2K_4 R201 35 0.1u/16V_4
PCSCL
IT6515 stuff
IT6516 un-stuff
PWD
GND
IT6515FN_QFN-40
31
41 all stage need confirm 6515 or 6516

R202
*10K_4
A A
(2,4,6,7,8,9,12,13,14,15,16,21,22,23,24,25,27,28,31,32,35,36,40,41,42) +3V
(4,21,22,24,25,27,31,40) +5V

PROJECT : ZRW
sualaptop365.edu.vn
3A
DP to VGA iT6165
5 4 3 2 1
5 4 3 2 1
CRT CRTVDD5
21
Q21 C304 *0.1u/16V_4
+5V 3 1
IN OUT 2
GND CRTVDD5 CN7
16
AP2331SA-7
+5V
1C-1 2014/01/10 Remove U29 and add U40 and U41. 6
L7 BLM18BB470_6 CRT_R1 1 11 CRT_11 TP75
(20) CRT_RED 7
C720 L6 BLM18BB470_6 CRT_G1 2 12 DDCDAT DDCDAT (20)
(20) CRT_GRE
8
U40 0.1u/16V_4 L5 BLM18BB470_6 CRT_B1 3 13 CRTHSYNC
(20) CRT_BLU
9
1 5 4 14 CRTVSYNC
OE# VCC C337 C334 C320 C319 C333 C336 10
D D
R222 R219 R213 5 15 DDCCLK DDCCLK (20)
HSYNC 2 4 CRTHSYNC 75/F_4 75/F_4 75/F_4 5.6p/16V_4 5.6p/16V_4 5.6p/16V_4 5.6p/16V_4 5.6p/16V_4 5.6p/16V_4
(20) HSYNC A Y
CRT CONN
17
3 DDCDAT 2.2K_4 R620 CRTVDD5
GND +5V DDCCLK 2.2K_4 R601
M74VHC1GT125DF2G U36
CRTHSYNC 1 10 CRTHSYNC C305 *0.22u/6.3V_4
C713 CRTVDD5 2 1 10 9 CRTVDD5
3 2 9 C300 *220p/50V_4
U37 0.1u/16V_4 CRTVSYNC 4 GND_3/8 7 CRTVSYNC
DDCCLK 5 4 7 6 DDCCLK C301 0.1u/16V_4 CRTVDD5
Power trace tracking
1 5 5 6
OE# VCC (2,4,6,7,8,9,12,13,14,15,16,20,22,23,24,25,26,27,28,29,31,32,33,35,36,40,41,42) +3V
*RClamp0524P C716 10p/50V_4 CRTVSYNC (4,20,22,24,25,27,31,40) +5V
(6,9,11,23,24,25,26,27,29,30,31,41,42) +3VPCU
VSYNC 2 4 CRTVSYNC U38 C718 10p/50V_4 CRTHSYNC
(20) VSYNC A Y (30,31,32,33,35,36,37,38,40,41,42) VIN
CRT_R1 1 10 CRT_R1
CRT_G1 2 1 10 9 CRT_G1 C714 *10p/50V_4 DDCCLK
3 3 2 9
GND DDCDAT 4 GND_3/8 7 DDCDAT C724 *10p/50V_4 DDCDAT
CRT_B1 5 4 7 6 CRT_B1
M74VHC1GT125DF2G 5 6
*RClamp0524P
LCD CONNECTOR LCD Power

VIN TP_PWR CCD_PWR
+3V
C7 C9 C577 C578 C27 C16

C41 U1 LCDVCC
4.7u/25V_8 1000p/50V_4 0.1u/16V_4 0.1u/10V_4_X7R
C 1000p/50V_4 1000p/50V_4 1u/6.3V_4 6 1 LCDVCC C
IN OUT
4 2 C33 C29 C35 C34 C30
IN GND
R37 EDP_VDD_EN_R
*short_4 3 5 *0.1u/16V_4 *2.2u/10V_8 0.1u/16V_4 0.01u/50V_4 22u/6.3V_8
(2) EDP_VDD_EN ON/OFF GND
+3V 1A-5 VIN

Rev:D change to shortpad G5243AT11U
CN5 R38
MAX 1.5A R15 *short_8
G_5
R447 *100K_4 EDP_AUX_C R448 *100K_4 R14 *short_8 V_BLIGHT
R450 *100K_4 EDP_AUX#_C R449 *100K_4 40 100K_4
TP_RST# R444 *TSI@10K_4 39
Rev:D change to shortpad 38
LCDVCC C580 C581 37
*1u/6.3V_4 *1u/6.3V_4 36
R28 *short_8 LCDVCC_R 35
R11 *short_6 CCD_PWR 34
2013/12/12 change eDP pin define +3V 33
32
colayout FHD Panel for A2 stage R16 *short_6 TP_PWR 31 G_4 Touch screen level shift I2C(reserve) +3V
+5V 30
+3V R19 *0_4 TP_RST#
29
PCH_BRIGHT 28
Prevent ESD/EOS Layout near device (2) PCH_BRIGHT 27
BL_ON
R457 33_4 EDP_HPD_R 26
(2) EDP_HPD 25 R10 *TSI@0_4 R9 R12
EDP_AUX C4 .1U/16V_4 EDP_AUX_C 24 *TSI@10K_4 *TSI@10K_4 S0
(2) EDP_AUXP 23
C804 EDP_AUX# C2 .1U/16V_4 EDP_AUX#_C
(2) EDP_AUXN 22 Q2
180P/50V_4 TPD->100kHz,TS=400Khz
EDP_TXP1 C10 .1U/16V_4 EDP_TXP1_C 21
(2) EDP_TXP1 20 S5 Intel design guide suggestion
EDP_TXN1 C8 .1U/16V_4 EDP_TXN1_C +3V 6 1 I2C1_SDA_C
eDP FHD (2) EDP_TXN1 19 MCP PIN 10u.
18 Per inch 3u TS=3x5inch
EDP_TXP0 C13 .1U/16V_4 EDP_TXP0_C 2 400kHz10~100u =2.4~0.4k.
(2) EDP_TXP0 17
EDP_TXN0 C12 .1U/16V_4 EDP_TXN0_C (4) I2C1_SDA
(2) EDP_TXN0 16 100Khz 10~100u=9k~1k.
15 (4) I2C1_SCL
Touch Panel-I2C I2C1_SCL_C R6 *TSI@0_4 (6) USBP6+ R2 *short_4 USBP6+_R 3 4 I2C1_SCL_C
B
I2C1_SDA_C R5 *TSI@0_4 R1 *short_4 USBP6-_R 14 B
CCD-USB (6) USBP6- 13 5
USBP5+ R4 TSU@0_4 12
(6) USBP5+ 11
Touch Panel-USB (6) USBP5- USBP5- R3 TSU@0_4
10 G_1 *TSI@2N7002DW
9 R13 *TSI@0_4
TS_EN R442 *short_4 TS_EN_R 7
(29) TS_EN 6
5
4
R441 33_4 BOARD_ID4_TOUCH_S 3 +3VPCU
(8) Board_ID4 2
TP_INT
1
G_0
S5 C803 50398-04071-001
180P/50V_4
R53
Prevent ESD/EOS Layout near device *100K_4
+3V LID# LID# (29)

LID591#,EC intrnal PU
TS_EN R443 *0_4 TP_INT
D1
R52 R58 1N4148WS
1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT,
for issue debug. 10K_4 10K_4
BL_ON
BL#
+3V
Hall Sensor (HSR) (2) PCH_BLON
R67 *short_4 PCH_BLON_R
3
(29) PCH_BLON_EC R66 *short_4 R65
+3VPCU 2
EC_FPBACK# (29)
100K_4
Touch Panel interrupt R7 Q4
*TSI@10K_4 Rev:D R435 *100K_4 Q3 DTC144EUA
1
2
change to Rev:D change to shortpad 2N7002DW

A shortpad A
1
3 1 TP_INT R434
(4) TP_INT_PCH
D28 *short_6
Q1 *VPORT_6
S5 *TSI@2N7002K S0
1 2 1 2 LID#
2
R8 *TSI@0_4 1B-3 2013/12/10 change Q3.3 from +3V to +3VPCU.

D23
C556 *VPORT_6
4.7U/10V_6
3
MR1
1
AH9249NTR-G1
1st:AL009249000 -- BCD
PROJECT : ZRW
sualaptop365.edu.vn
2nd:AL009132001 -- ANC 3A
CRT/LVDS/CAMERA/LID
5 4 3 2 1
5 4 3 2 1
HDMI
<HDM>
22
From PCH
U18
2/16 FAE confirmed stuff +5V
D C411 0.1u/16V_4 INT_HDMITX2P_C_R 1 30 INT_HDMITX2P_C D
(2) INT_HDMITX2P IN_D2+ OUT_D2+
C408 0.1u/16V_4 INT_HDMITX2N_C_R 2 29 INT_HDMITX2N_C 2.2K_4 R316 RB501V-40 D31
(2) INT_HDMITX2N IN_D2- OUT_D2- HDMI_DDCCLK_MB 1 2
C407 0.1u/16V_4 INT_HDMITX1P_C_R 4 27 INT_HDMITX1P_C
C406 0.1u/16V_4 INT_HDMITX1N_C_R 5 26 INT_HDMITX1N_C 2.2K_4 R317 RB501V-40 D30
(2) INT_HDMITX1N IN_D1- OUT_D1- HDMI_DDCDATA_MB 1 2
C405 0.1u/16V_4 INT_HDMITX0P_C_R 6 25 INT_HDMITX0P_C
C398 0.1u/16V_4 INT_HDMITX0N_C_R 7 24 INT_HDMITX0N_C
(2) INT_HDMITX0N IN_D0- OUT_D0-
C389 0.1u/16V_4 INT_HDMICLK+_C_R 9 22 INT_HDMICLK+_C
(2) INT_HDMICLK+ IN_CLK+ OUT_CLK+
C387 0.1u/16V_4 INT_HDMICLK-_C_R 10 21 INT_HDMICLK-_C
(2) INT_HDMICLK- IN_CLK- OUT_CLK-
(2) HDMI_DDCCLK_SW
HDMI_DDCCLK_SW
HDMI_DDCDATA_SW
38
39 SCL_SRC SCL_SINK
32
33
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB
HDMI connector
(2) HDMI_DDCDATA_SW SDA_SRC SDA_SINK
HDMI_MB_HPD_R 3 28 HDMI_MB_HPD +3V CN12
HPD_SRC HPD_SINK 20
36 11 INT_HDMITX2P_C 1 SHELL1
R306 *0_4 8 PD# VCC33[1] 37 2 D2+
+3V I2C_STL_EN VCC33[2] D2 Shield
HDMI4K2K_PRE 16 +1.5V INT_HDMITX2N_C 3
+3V HDMI4K2K_ISET 34 PRE INT_HDMITX1P_C 4 D2-
2/16 FAE confirmed don't stuff ISET 260mA (30mils) D1+
20 5
VCCTX15[1] 31 INT_HDMITX1N_C 6 D1 Shield
R322 *2.2K_4 HDMI_DDCCLK_SW HDMI4K2K_DDCBUF 14 VCCTX15[2] 12 INT_HDMITX0P_C 7 D1-
HDMI4K2K_EN 13 DDCBUF/SDA_CTL VCCRX15[1] 40 8 D0+
R319 *2.2K_4 HDMI_DDCDATA_SW DCIN_EN/SCL_CTL VCCRX15[2] 19 INT_HDMITX0N_C 9 D0 Shield 23
HDMI4K2K_EQ 17 VCCTA15[1] INT_HDMICLK+_C 10 D0- GND
HDMI4K2K_CFG 23 EQ/I2C_ADDR0 15 11 CK+ 22
CFG/I2C_ADDR1 GND1] 35 INT_HDMICLK-_C 12 CK Shield GND
R294 4.99K_4 18 GND[2] 13 CK-
REXT 14 CE Remote
41 +5V HDMI_DDCCLK_MB 15 NC
HDMI-detect GND_PAD[1]
GND_PAD[2]
42
43 Q26
HDMI_DDCDATA_MB 16
17
DDC CLK
DDC DATA
+3V +3V GND_PAD[3] 44 3 1 HDMI_5V 18 GND
GND_PAD[4] 45 IN OUT 2 19 +5V
C GND_PAD[5] GND HP DET C
46 HDMI_MB_HPD R721 0_4 HP_DET_CN 21
GND_PAD[6] 47 AP2331SA-7 C383 D6 SHELL2
GND_PAD[7]
1
48 *220p/50V_4 *AZ5125-01J HDMI connector
R722 GND_PAD[8] 49
S0 S0 GND_PAD[9] DDS AL002331000
2
*1M_4 50 R720
GND_PAD[10] 20K_4
(2) INT_HDMI_HPD 1 3 HDMI_MB_HPD_R
2
PS8201ATQFN40GTR2-A0
Q41
2N7002K AL008201003 PS8201ATQFN40GTR2-A0 REV:E Change
R718 *0_4
+1.5V
+3V
EMI C773 C384 C385 C410 C474 C409

C386 C413
INT_HDMITX2P_C 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.01u/50V_4 0.01u/50V_4
0.1u/16V_4 0.01u/50V_4
R315 *120/F_4 C3B
B2A
INT_HDMITX2N_C
INT_HDMITX1P_C
R314 *120/F_4 +3V +3V +3V +3V +3V +3V
INT_HDMITX1N_C
R293 R321 R292 R311 R297 R298
INT_HDMITX0P_C
R312 *120/F_4 *4.7K_4 *4.7K_4 *4.7K_4 *4.7K_4 4.7K_4 *4.7K_4

B B
INT_HDMITX0N_C HDMI4K2K_PRE
HDMI4K2K_ISET
INT_HDMICLK+_C HDMI4K2K_EQ
HDMI4K2K_CFG
R303 *120/F_4 HDMI4K2K_DDCBUF
HDMI4K2K_EN
INT_HDMICLK-_C
R296 R320 R295
*4.7K_4 *4.7K_4 *4.7K_4
Pre ISET EQ CFG DDCBUF DCIN_EN

NC(Low) 0 dB default 12.4 dB HDMI ID disable default default,AC coupling input
active DDC buffer with
1(High) 1.6 dB +13% 4.3 dB HDMI ID enable default threshold DC coupling input
active DDC buffer without
M 2.5 dB -13% 8.6 dB N/A internal pull up resistor N/A
Pre Output pre-emphasis setting
Pin PS8401A PS8201A
ISET TMDS output swing adjustment
Power trace tracking 12 VDDRX NC
EQ Receiver equalization setting
15 GND NC
CFG Configuration pin
A (2,4,6,7,8,9,12,13,14,15,16,20,21,23,24,25,26,27,28,29,31,32,33,35,36,40,41,42) +3V 34 ISET NC A
(4,20,21,24,25,27,31,40) +5V DDCBUF enable active DDC buffer
37 VDD33 NC
DCIN_EN DC coupling enable

PROJECT : ZRW
sualaptop365.edu.vn
3A
HDMI (PS8201 4k*2k)
5 4 3 2 1
5 4 3 2 1
Giga LAN (LAN)
XTAL2 C358 12p/50V_4

LANVCC
40 mils (Iout=1A)
23
1
2
C354 C370 C365 C361
Y1
0.1u/16V_4 0.1u/16V_4 4.7U/6.3V_6 4.7U/6.3V_6
25MHZ +-30PPM
3
4
D D
XTAL1
VDD10 C359 12p/50V_4 For RTL8111H
R701 2.49K/F_4 RSET TP26 Place 0.1uF,4.7uF CAP close to each VDD33 pin-- 11, 32
10 mils TP28
LANVCC TP27
32
31
30
29
28
27
26
25
U15 RTL8111H (LDO mode) close to each VDD10 pin-- 3, 8, 22, 30 close to each VDD10 pin-- 22
AVDD33
RSET
AVDD10
CKXTAL2
CKXTAL1
LED0
LED1
LED2
REGOUT (reserve)
33 +3V Rev:D change to shortpad VDD10
GND
40 mils (Iout=1A) 40 mils (Iout=1A)
R246 *short_8
R711
1K_4
MDI_0+ 1 24 REGOUT C363 C760 C762 C757 C355 C758 C761
MDI_0- 2 MDIP0 REGOUT 23 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 *1U/6.3V_4 *0.1u/16V_4
MDIN0 VDDREG LANVCC
VDD10
3 22 VDD10
MDI_1+ 4 AVDD10 DVDD10 21 PCIE_LAN_WAKE#_R
MDI_1- 5 MDIP1 LANW AKEB 20 ISOLATEB R264 NAC@0_4
MDIN1 ISOLATEB PLTRST# (8,14,25,26,29)
MDI_2+ 6 RTL8111H-CG 19 PERSTB R263 IOAC@0_4 IOAC_RST# (26,29) R261
MDI_2- 7 MDIP2(NC) PERSTB 18 PCIE_RX5-_LAN_C C372 0.1u/16V_4 *15K_4
MDIN2(NC) HSON PCIE_RX5-_LAN (6)
VDD10
8 17 PCIE_RX5+_LAN_C C375 0.1u/16V_4
AVDD10 HSOP PCIE_RX5+_LAN (6)
REFCLK_N
MDIN3(NC)
REFCLK_P
MDIP3(NC)
Consider VCC33 may be connected to Main

CLKREQB
AVDD33
C Power or chipset/bios's GPO, the pull-low C

HSIN
resistor R14 can be NC only when Main Power

HSIP
or chipset/bios's GPO can ensure to drive the

ISOLATEB pin to a voltage level < 0.8V at the
9
10
11
12
13
14
15
16
system state S3~S5.

If the ISOLATEB pin can not be well-controlled to
a voltage level < 0.8V at S3~S5, the pull-low
CLK_PCIE_LANN (6) resistor R14 is needed to make sure the LAN
CLK_PCIE_LANP (6)
MDI_3+
PCIE_TX5-_LAN (6)
chip is well isolated.
MDI_3-
PCIE_TX5+_LAN (6)
LANVCC
PCIE_REQ_LAN#_R
Layout:All termination
Leakage circuit (MPC) Tramsformer signal should have 30 RJ45 Connector
+3V +3V mil trace
CN11
U42
+3V 1 24 LAN_MCT0
R281 R277 MDI_0+ 2 TCT1 MCT1 23 LAN_MX0+
CLK_PCIE_REQ4# have PU 10k. MDI_0- 3 TD1+ MX1+ 22 LAN_MX0-
*10K/F_4 10K/F_4 TD1- MX1-
2
MAIN POWER(3V_S0)
4 21 LAN_MCT1
B
3 1 PCIE_REQ_LAN#_R MDI_1+ 5 TCT2 MCT2 20 LAN_MX1+ B
S0 (6) CLK_PCIE_LAN_REQ#
MDI_1- 6 TD2+ MX2+ 19 LAN_MX1-
Q25 TD2- MX2- LAN_MX0+ 1
2N7002K 7 18 LAN_MCT2 LAN_MX0- 2
R276 *0/J_4 MDI_2+ 8 TCT3 MCT3 17 LAN_MX2+ LAN_MX1+ 3
MDI_2- 9 TD3+ MX3+ 16 LAN_MX2- LAN_MX2+ 4
LANVCC TD3- MX3- LAN_MX2- 5
10 15 LAN_MCT3 LAN_MX1- 6
MDI_3+ 11 TCT4 MCT4 14 LAN_MX3+ LAN_MX3+ 7 9
GND
MDI_3- 12 TD4+ MX4+ 13 LAN_MX3- LAN_MX3- 8 10
TD4- MX4-
75/F_6
75/F_6
75/F_6
75/F_6
R702 TRANSFORMER
25
IOAC@10K/F_4
C364
2
EC_PCU LANVCC 0.01U/50V/X7R_4

LAN_RJ45
R269
R262
R258
R251
R713 NAC@0_4 3 1 PCIE_LAN_WAKE#_R
(8,26) PCIE_LAN_WAKE#
R715 IOAC@0_4 Q39
(29) IOAC_LAN_WAKE#
IOAC@2N7002K
TERM9
R709 NAC@0/J_4
Reserve IOAC No Stuff
Q24 IOAC@AO3413 LANVCC +3V_S5
4/20 REV:D add TP85 ~TP100 for AZ chip ICT/ATE Capacitor test
+3VPCU 1 3+3V_LANR248 R247 NAC@0_8 C746

1000P/3KV_1808
C369 IOAC@0_8
A R260 C366 C367 C350 C377 A
2
*IOAC@0.1U/16V_4 *IOAC@100K/J_4 10u/6.3V_6 0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4
(29) IOAC_LANPWR# R259

IOAC@10K_4 C368
*IOAC@1000p/50V_4
PROJECT : ZRW
3A
LAN(RTL8111H)
5
1
23 of 48
5 4 3 2 1
Codec(ADO) DC-DET circuit(ADO) Rev:D change to shortpad
24
R338 *short_6
+5V
HP-R2 +15V
3 1 PVDD
HP-L2
+5V C456 Q28
LINE1-VREFO-L R345 *10u/6.3V_4 *AO3404
2
*1M_6
LINE1-VREFO-R
MIC2-VREFO
R343
3
*100K_4
CODEC_VREF C535 2.2U/6.3V_4 ADOGND
DC-DET R344 *0_4 2 Q27
INT_AMIC-VREFO C534 10u/6.3V_4 *DTC144EU
D ADOGND +5VA D
C527
C528
C530
R397 100K_4
1
10u/6.3V_4
2.2u/6.3V_4
2.2u/6.3V_4
C536
C532
0.1u/16V_4 10u/6.3V_4
+AZA_VDD
Place next to pin 26
D-Mic (MIC) Single
PU: only SPM0437HD4H
DUAL_EN:PU
36
35
34
33
32
31
30
29
28
27
26
25
+1.5VA
U23 +3V
PD: SPM0437HD4H & NSM0407DT Shared
ADOGND +3V
Single_GND:PD Dual
Reserve connect to CPU [ acer request 1/14 ]
CPVEE
HP-OUT-L
LINE1-VREFO-L
MIC2-VREFO
LDO1-CAP
AVDD1
AVSS1
CPVDD
CBN
HP-OUT-R
LINE1-VREFO-R
VREF
C520 PU & PD : NC
C524 C356 10u/6.3V_4
10u/6.3V_4 0.1u/16V_4 (4) DMIC_DATA0_L R771 *0_4 C353 0.1u/16V_4
ADOGND 37 24 C360 10p/50V_4 R285 R286
CBP LINE2-L R772 *0_4
(4) DMIC_CLK0_L *SP@0_4 *0_4
38 23 U17
ADOGND AVSS2 LINE2-R 6 1
Place next to pin 40 C529 10u/6.3V_4 39 22 LINE1-L VDD GND/EN
LDO2-CAP LINE1-L DMIC_DAT_L R254 0_4 DMIC_DAT_L2 5 2 DMIC_CS R288 *0_4
40 21 LINE1-R Rev:D change to shortpad DATA CS
Analog AVDD2 LINE1-R DMIC_CLK_L R266 0_4 DMIC_CLK_L2 4 3
L13 +5V_PVDD 41 20 R388 *short_6 CLK GND R284 R287
Digital PVDD PVDD1 NC +3VPCU
D2
D3
C357
C374
PBY160808T-600Y-N(60,3A) analog digital SPM0437HD4H-B SP@0_4 SP@0_4
1
L_SPK+ 42 19 C519 10u/6.3V_4
SPK-L+ MIC-CAP ADOGND
C510 C509 Single DMIC
L_SPK- 43
SPK-L-
ALC255 MIC2-R/SLEEVE
18 SLEEVE trace width of SLEEVE & RING2 +3V
TVS/6pF_4
TVS/6pF_4
*10p/50V_4
*10p/50V_4
10u/6.3V_4 0.1u/16V_4
are required at least 40mil and DUAL MAIN
2
R_SPK- 44 17 RING2 C373 *10u/6.3V_4
SPK-R- MIC2-L/RING2 its length should be asshort as possible C371 *0.1u/16V_4
R_SPK+ 45 16 CO-LAYOUT C376 *10p/50V_4
Low is power down SPK-R+ MONO-OUT
amplifier output 46 15 U16
PVDD2 SPDIFO/FRONT JD 6 1
GPIO0/DMIC-DATA
VDD GND/EN +3V

PD# 47 14
GPIO1/DMIC-CLK
Placement near Audio Codec
C C501 C500 PDB MIC2/LIN2 JD DMIC_DAT_L1 5 2 C
48 13 SENSEA R383 200K_4 HP_JD# DATA CS
TP34 SPDIF-OUT SDATA-OUT HP/LINE1 JD
LDO3-CAP
10u/6.3V_4 0.1u/16V_4 R270 *0_4 DMIC_CLK_L1 4 3
SDATA-IN
DVDD-IO
CLK GND
PCBEEP
RESETB
BIT-CLK
R378 100K_4 +3V
DVDD
SYNC
C379
D5
C378
D4
49
DVSS
*NSM0410DT
DGND
1
Analog
DUAL SECOND
Digital
1
10
11
12
*TVS/6pF_4
*TVS/6pF_4
*10p/50V_4
*10p/50V_4
2
2
DMIC_DAT
DMIC_CLK
C481
1.Single DMIC
DC-DET

Change 47K to 22K for PCBEEP NSM0407DT (AL472376000) <- Main source
1.6Vrms SPM0437HD4H (AL000437000)
R350
+3V R367 *short_6 +AZA_VDD

10u/6.3V_4
PCBEEP C476 0.1u/16V_4 BEEP_1 R352 22K_4 D9 1N4148WS

SPKR (4)
2.Dual DMIC
NSM0410DT (W/ Fortemedia algorithm)
C477 R354 D10 1N4148WS
PCBEEP_EC (29) Main MIC CS need connect to second MIC DATA
0_4
C485 C484 100p/50V_4 4.7K_4

0.1u/16V_4 10u/6.3V_4
+3V +1.5V
CPU 3.3V
Rev:D change to shortpad Rev:E change connect to +3V
DMIC_DAT_L R371 *short_4
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_SYNC
(4)
(4)
R365 0_4
Universal Audio Jack HEADPHONE/MIC/LINE combo (ADO)
Tied at one point only under DMIC_CLK_L R370 22_4 DVDD_IO R366 *0_4
the codec or near the codec Rev:E change to 0402
R394 *0_4 C488 ACZ_SDIN R359 33_4 C492 C489
PCH_AZ_CODEC_SDIN0 (4)
R393 *0_4 10p/50V_4
R399 *0_4 PCH_AZ_CODEC_BITCLK (4) 0.1u/16V_4 10u/6.3V_4
R400 *0_4
R375 *0_4 C493 *22p/50V_4 MIC2-VREFO R407 2.2K/J_4
R750 *SHORT_4 R420& R422 change to 62 ohm -> 3/11
C537 *1000p/50V_4 PCH_AZ_CODEC_SDOUT (4) Place next to pin 9 R424 2.2K/J_4
SLEEVE SLEEVE_R
Combo Jack
C538 *0.1u/16V_4 R408 *short_4
B
CN21 B
RING2 R425 *short_4 RING2_R 4
ADOGND 3
HP-L2 R422 62/F_4 HP-L3 1
Cap need near AVDD1 and AVDD2
power source input HP-R2 R420 62/F_4 HP-R3 2
5
HP_JD# 6 7
1
R423 R417 2SJ3080-077111F
LINE1-L C552 4.7U/6.3V_6 *10K/J_4 *10K/J_4 C547 C554 C553 C550 D21 D22 D33
*AZ5125-01H.R7G
LINE1-VREFO-L R421 4.7K_4 100p/50V_4 100p/50V_4 100p/50V_4 100p/50V_4
2
ADOGND
LINE1-VREFO-R R418 4.7K_4 AZ5725-01F
AZ5725-01F
LINE1-R C549 4.7U/6.3V_6 ADOGND
Codec PWR 5V(ADO) Mute(ADO) ADOGND
+AZA_VDD +1.5V change to BC005725Z00 and stuff
R372
1K_4
2
DIGITAL ANALOG
PD# D15 *RB500V-40 3 1 PCH_AZ_CODEC_RST#
L16 HCB2012KF220T60/6A/22ohm_8
+5V +5VA R369
3
U25
IN OUT
4
*10K/J_4 C494
*1u/10V_4
Q29
*PJA138K Codec PWR 1.5V(ADO)
2 D16 RB500V-40
GND AMP_MUTE# (29)
C523 C526
1 5 R395 *29.4K/F_4
SHDN SET *10u/6.3V_6 *0.1u/16V_4 +1.5VA
*G923-330T1UF
C525 C515 R390 DIGITAL ANALOG
A *10K/F_4 A
*0.1u/16V_4 *10u/6.3V_6 ADOGND
Internal Speaker +1.5V L18 HCB1608KF-121T30_3A
R401 *0_4
40mil for each signal 4 ohm : 40mil for each signal C541
ADOGND 1003 change 0603type CN18 1U/6.3V_4

R_SPK+ R419 *short_6 R_SPK+_1
R_SPK- R414 *short_6 R_SPK-_1 4 6
L_SPK- R406 *short_6 L_SPK-_1 3 5
L_SPK+ L_SPK+_1 2
C730, C787 close U37 pin3 and L65 R404 *short_6
1
SPK_CONN_4P Quanta Computer Inc.
C551 C548 C546 C545
*68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4 PROJECT : ZRW
1B-2 2013/12/04 Change PN and footprint. Size Document Number Rev
sualaptop365.edu.vn
3A
1B-5 2013/12/17 Change CN14 pin define ALC255/HP/SPK
5 4 3 2 1
5 4 3 2 1
2.5" SATA HDD (HDD)

CN14
23
SATA ODD Connector
25
GND23 CN9
1 14
GND1 2 SATA_TXP0_C C522 0.01u/50V_4 GND14
RXP SATA_TXP0 (6)
3 SATA_TXN0_C C513 0.01u/50V_4 SATA_TXN0 (6) 1
RXN 4 GND1 2 SATA_TXP1_C C751 0.01u/50V_4
GND2 RXP SATA_TXP1 (6)
5 SATA_RXN0_C C507 0.01u/50V_4 3 SATA_TXN1_C C749 0.01u/50V_4 SATA_TXN1 (6)
TXN 6 SATA_RXN0 (6) RXN 4
SATA_RXP0_C C504 0.01u/50V_4
D TXP 7 SATA_RXP0 (6) GND2 5 SATA_RXN1_C D
C744 0.01u/50V_4
GND3 TXN 6 SATA_RXP1_C SATA_RXN1 (6)
C743 0.01u/50V_4
TXP 7 SATA_RXP1 (6)
C802 180P/50V_4
8 GND3 SSD_ID (6)
R217 33_4
3.3V 9 ODD_PRSNT# (4)
DEVSLP0_R R351 *0_4 DEVSLP0 (6) R216 10K_4 +3V Prevent ESD/EOS Layout near device
3.3V 10 8 ODD_PRSNT#_C
3.3V
Rev:D change to shortpad DP
C330 *15p/50V_4
11 9 +5VODD R657 *short_8 +5V_ODD
GND 12 +5V 10
GND +5V Rev:D change to shortpad
13 1B-4 +5V 11 C726 C721 C733 C730 C737 C740
+
GND 14 MD 12
5V 15 +5V_HDD 60mil R339 *short_8 GND 13 0.01u/50V_4 0.01u/50V_4 *0.1u/16V_4 *0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528
5V 16 GND
5V 17 C437 C436 C435 C453 C438 C457 15
GND 18 + GND15
RSVD 19 0.01u/50V_4 0.01u/50V_4 *0.1u/16V_4 *0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528 6030D-13G20
GND 20 EC_ODD_EJ (29)
12V 21
12V 22 1A-8
12V R209 10K_4 +3V
24
GND24
HDD CONN R326 *0_4 ACCEL_INT2 (27) Connect to G-sensor INT2
ODD Power (SATA) +3VPCU

+15V +5V
Q34
IOAC@AO6402A +5V_ODD
+5V
1
6
C C
R695 5 4 R672 NAC@0_8
IOAC@100K 2
1 R673
Reserve IOAC Power No Stuff IOAC@22_8
2
R686
3
ODD_EN_Q 2 1
MOD_EN_5V
IOAC@100K
3
(29) ODD_POWER R704 IOAC@0_4 ODD_EN
ODD_EN_Q 2
1
(2) PCH_ODD_EN R703 *IOAC@0_4

C752 Q36
R692 IOAC@0.1u/25V_6 IOAC@DMN601K-7
2
*IOAC@100K
1
2
IOAC@2N7002DW
Q37
SPAD1 SPAD2 SPAD3 SPAD4 SPAD5 SPAD6 SPAD7 SPAD8 SPAD9 SPAD10 SPAD11 SPAD12
4
*spad-zrz-1np *spad-zrz-1np *spad-zrz-1np *spad-zrz-1np *spad-zrz-1np *spad-zrz-1np *spad-zrz-1np *spad-zrz-1np *spad-zrz-1np *spad-zrz-1np *spad-zrz-1np *spad-zrz-1np
1
HOLE19 HOLE17 HOLE2 HOLE18 HOLE12 HOLE5 HOLE9
SP@ BOM周周周NPCT650 *H-TC315BC354D134P2 *O-ZRTA-5 *H-TC315BC354D134P2 *H-TC315BC354D134P2 *H-TC315BC354D134P2 *H-ZRW-1 *O-ZRTA-2
B A,B,C P/N:AL009655K01(SLB9655TT1.2- FW4.31) B

RAMP P/N: AL000650K01 (NPCT650AAAWX)
TPM NPCT650 (TPM)
1
+3V3_TPM_VSB
+3V +3V3_TPM SLB9655 STUFF +3V
+3V_S5
AL000650K01 :NPCT650AAAWX R745 *shortTPM@0_6 R723 TPM_I@0_6 HOLE11 HOLE4 HOLE1 HOLE22 HOLE20 HOLE21 HOLE3
C776 TPM@10u/6.3V_6 R725 TPM_N@0_6 *O-ZRTA-3 *O-ZRTA-4 *H-TC315BC354D217P2 H-C236D142P2 EV@MBZRQ001010 EV@MBZRQ001010 *h-tc256ic201bc236d161p2
AL009655K01 : SNI SLB9655TT1.2 C775 TPM@0.1u/16V_4
C774 TPM@0.1u/16V_4 C767 TPM@10u/6.3V_6
C768 TPM@0.1u/16V_4 C766 TPM@0.1u/16V_4
TPMM 1.2 AL009655K01
1
1
TPMM 2.0 AL000650K01
24
19
10
U44
VDD3
VDD2
VDD1
VSB
SLB9655 STUFF +3V3_TPM

WLAN NUT For GPU sku
LPC_LAD3 17 7 TPM_PP R724 *4.7K_4
(7,26,29) LPC_LAD3 LAD3 PP
LPC_LAD2 20 6 GPX R728 TPM_I@0_4 HOLE7 HOLE6 HOLE16 HOLE14 HOLE8 HOLE10
(7,26,29) LPC_LAD2 LAD2/SPI_IRQ GPX/GPIO2
LPC_LAD1 23 2 *h-tc256ic201bc236d161p2 *h-tc256ic201bc236d161p2 *H-C118D118 *H-O138X114D138X114N *h-o112x120d112x120n
*h-o152x93d152x93n
(7,26,29) LPC_LAD1 LAD1/MOSI GPIO1
LPC_LAD0 26
(7,26,29) LPC_LAD0 LAD0/MISO
LPC_LFRAME# 22 1
(7,26,29) LPC_LFRAME# LFRAME/SCS GPIO0/XOR_OUT
IRQ_SERIRQ 27 9 TPM_BADD R729 *10K_4
(7,29) IRQ_SERIRQ SERIRQ GPIO3/BADD
PCLK_TPM 21 8
(7) PCLK_TPM LCLK/SCLK TEST
1
1
CLKRUN# R743 TPM_N@0_4 TPM_CLKRUN# 15 3 R726 TPM_LRESET#
(7,29) CLKRUN# CLKRUN/GPIO04 NC1
PLTRST# R742 *short_4 TPM_LRESET# 16 12 TPM_I@0_4
(8,14,23,26,29) PLTRST# LRESET/SPI_RST NC2
LPCPD 28 13 SLB9655 STUFF
LPCPD NC3 14 HOLE23
SLB9655 Un-STUFF NC4 *H-C256D134P2 Add Layout
house provide
GND1
GND2
GND3
GND4
BADD SELECTION
A Rev:D change to shortpad 0 EEh - EFh A
3/4 EMI request add 33p near TPM IC 1 7Eh - 7Fh footprint
TPM@NPCT650
C807
4
11
18
25
1/14 HOLE23 add *H-C256D134P2
1
CLKRUN# '1' - pin is left open. HOLE13 HOLE15
'0' - pin is pulled down.
+3V3_TPM +3V3_TPM *O-ZRZ-7 *O-ZRZ-8 Add Layout
TPM@33P/50V_4
LPCPD R744 *4.7K_4 GPX R727 TPM_I@4.7K_4
house provide
footprint
SLB9655 STUFF Quanta Computer Inc.
11/20 HOLE22 change
1
to *O-ZRZ-8 PROJECT : ZRW

3A
sualaptop365.edu.vn
HDD/ODD/TPM NPCT650
5 4 3 2 1
5 4 3 2 1
NGFF_M.2 WiFi & BT (NGF)

26
+3VPCU (6,9,11,21,23,24,25,27,30,31,41,42)
+1.5V (9,22,24,40)
+3V (2,4,6,7,8,9,12,13,14,15,16,21,22,23,24,25,27,28,31,32,35,36,40,41,42)
CN10
Leakage circuit (MPC)
+WL_VDD +WL_VDD
1
NGFF 2 +3V +WL_VDD +WL_VDD
USBP4+ 3 GND 3.3Vaux 4 C340 10u/6.3V_6 +3V
(6) USBP4+ USB_D+ 3.3Vaux
D USBP4- 5 6 C755 0.1u/16V_4 D
(6) USBP4- USB_D- LED#1
7 8 C753 0.1u/16V_4
9 GND PCM_CLK 10 C735 0.1u/16V_4
SDIO CLK(O) PCM_SYNC R245 R242
11 12 C731 0.1u/16V_4 APU Internal PU 2N7002DW R241
13 SDIO CMDIO) PCM_IN 14 APU External nu-PU 4.7K/J_4 4.7K/J_4
*10K_4
15 SDIO DAT0(IO) PCM_OUT 16 5
SDIO DAT1(IO) LED#2 IOAC S0
17 18
19 SDIO DAT2(IO) GND 20 WLAN_CLKREQ# 4 3
21 SDIO DAT3(IO) UART Wake 22 S0 PCIE_CLKREQ_WLAN# (6)
23 SDIO Wake(I) UART Rx 24
25 SDIO Reset Key 5 26 2
KEY1 Key 6 IOAC
27 28 EC_PCU
29 KEY2 Key 7 30 WLAN_WAKE_R# 1 6
31 KEY3 Key 8 32 S0 IOAC_WLAN_WAKE# (29)
33 KEY4 UART Tx 34 Q23
PCIE_TX6+_WLAN 35 GND UART CTS 36
(6) PCIE_TX6+_WLAN PETp0 UART RTS
PCIE_TX6-_WLAN 37 38 R243 *0/J_4 R244
(6) PCIE_TX6-_WLAN PETn0 Clink RESET
39 40 R253 *0/J_4
GND CLink DATA PCIE_LAN_WAKE# (8,23)
PCIE_RX6+_WLAN 41 42
(6) PCIE_RX6+_WLAN PERp0 CLink CLK
PCIE_RX6-_WLAN 43 44 WIFI_SUSCLK IOAC No Stuff *0_4
(6) PCIE_RX6-_WLAN
45 PERn0 COEX3 46 S0
CLK_PCIE_WLANP 47 GND COEX2 48 R680 IOAC@0_4 WIFI card reset (non-IOAC)
(6) CLK_PCIE_WLANP REFCLKP0 COEX1 IOAC_RST# (23,29)
(6) CLK_PCIE_WLANN CLK_PCIE_WLANN 49 50 WIFI card reset (IOAC)
51 REFCLKN0 SUSCLK(32KHz) 52 WLAN_RST# R671 NAC@0_4 PLTRST# Debug card reset
GND PERST0# PLTRST# (8,14,23,25,29)
WLAN_CLKREQ# 53 54 BT_EN BT_EN (29)
WLAN_WAKE_R# 55 CLKREQ0# W_DISABLE#2 56 RF_EN
PEWake0# W_DISABLE#1 RF_EN (29)
57 58
59 GND NFC I2C SM DATA 60
C PETp1 NFC I2C SM CLK C
61 62
63 PETn1 NFC I2C IRQ 64 LPC_LAD0_C R688 *short_4 LPC_LAD0
GND NFC Reset# LPC_LAD0 (7,25,29)
65 66 LPC_LAD1_C R690 *short_4 LPC_LAD1
PERp1 RESERVED3 LPC_LAD1 (7,25,29)
PERn1 RESERVED4 LPC_LAD2 (7,25,29)
GND RESERVED5 LPC_LAD3 (7,25,29)
(7) CLK_PCI_LPC CLK_PCI_LPC R694 *0_4 CLK_PCI_LPC_C 71 72
73 Reserved1 3.3Vaux 74 +WL_VDD
(7,25,29) LPC_LFRAME# LPC_LFRAME# R699 *0_4 LPC_LFRAME#_C
Reserved2 3.3Vaux
75
GND
For Debud Card use WLAN_NGFF CONN(Type 2230)
Stuff
Q22 IOAC@AO3413 +WL_VDD +3V
+3VPCU 1 3+3V_WLAN R221 R237 NAC@0_8

Low Mini card +3V power enable C345 IOAC@0_8
R231 C347 C346 C338 C339
2
*IOAC@0.1U/16V_4 *10u/6.3V_6 *0.1u/16V_4 **0.1u/16V_4 **0.1u/16V_4
High Mini card +3V power disable *IOAC@100K/J_4
(29) IOAC_WLANPWR# IOAC_WLANPWR#

B R230 B
IOAC@10K_4 C344
*IOAC@1000p/50V_4
Reserve only for Intel module no need to stuff by default 11/24 Reserve IOAC No Stuff
Reserver +1.5v for WIFI module

U43 +3V_S5 +WL_VDD Q38 *IOAC@AO3413
+3V_S5 R716 **10K_4 1 5 +1.5V 1 3+3V_WLAN

NC VCC
1
R714 C759
(6) SUSCLK SUSCLK 2 C763 *10K_4 R712 2
A *0.1u/16V_4 **IOAC@0.1U/16V_4
2
**IOAC@100K/J_4
3 4 WIFI_SUSCLK
GND Y IOAC_WLANPWR#
R710
*74AUP1G07GW *IOAC@10K_4 C756
**IOAC@1000p/50V_4
A
No Stuff A

PROJECT : ZRW
sualaptop365.edu.vn Date:
Mini-Card/WL/3G/SIM
3A
5 4 3 2 1
5 4 3 2 1

TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay) 1C-2 2014/01/13 Change TP power rail from +3V_S51C-4 2014/01/15 reserve TP power rail +3V_S5.
KEYBOARD (KBC)
27
to +3V_SUS.
R752 *short_6 1C1-1 2014/02/17 Add Q47 for PTP
CN20 Rev:D change to shortpad power EN and soft up R694\C713.
1 MX0 TPD->100kHz,TS=400Khz R402 *short_4 *AO3413 and C712\C686.
MX0 (29) <EMI> +3V_S5
2 MX1 Intel design guide suggestion +3V_S5 L19 *short_6 1 3
MX1 (29)
3 MX2 MX4 1 2 MCP PIN 10u.
MX2 (29)
4 MX3 MX5 3 4 CP5 Per inch 3u TS=3x5inch C781 Q42 C790 + C783
MX3 (29)
5 MX4 MX6 5 6 *220P_8P4R
400kHz10~100u =2.4~0.4k. R416 R415
MX4 (29)
2
6 MX5 MX7 7 8 0.1u/16V_4 0.22u/25V_6 0.1u/16V_4
7 MX6
MX5 (29)
MY3 1 2
100Khz 10~100u=9k~1k. 10K_4 10K_4
MX6 (29) TP CN
8 MX7 MY2 3 4 CP1 R754 *0_4 C786 *1000p/50V_4 50mil
MX7 (29) (29) PTP_PWR_EN#
9 MY17 MY1 5 6 *220P_8P4R +TPVDD 8 10
D MY17 (29) D
10 MY16 MY0 7 8 R411 *short_4 TPCLK_R 7 9
MY16 (29) (29) TPCLK
11 MY15 MY7 1 2 R412 *short_4 TPDATA_R 6
MY15 (29) (29) TPDATA
12 MY14 MY6 3 4 CP2 5
MY14 (29)
13 MY13 MY5 5 6 *220P_8P4R +TPVDD I2C_TP_SDA_R 4
14 MY12
MY13 (29)
MY4 7 8 R405 *TDI@0_4 Rev:D change to shortpad I2C_TP_SCL_R 3
MY12 (29)
15 MY11 MY11 1 2 TPD_INT# 2
MY11 (29) TDI@2N7002DW
16 MY10 MY10 3 4 CP3 2.2K_4 R409 C787 C788 TPD_EN 1
MY10 (29)
17 MY9 MY9 5 6 *220P_8P4R *0.1u/16V_4 *0.1u/16V_4
18
19
MY8
MY7
MY9
MY8
(29)
(29)
MY8
MX0
7
1
8
2
S5 1 6 S5 2.2K_4 R410 CN17
MY7 (29)
20 MY6 MX1 3 4 CP6 (4) I2C0_SDA 2 I2C_TP_SDA_R
MY6 (29)
21 MY5 MX2 5 6 *220P_8P4R (4) I2C0_SCL I2C_TP_SCL_R
MY5 (29) (29) TPD_EN
22 MY4 MX3 7 8
MY4 (29)
23 MY3 MY15 1 2 4 3
MY3 (29)
24 MY2 MY14 3 4 CP4 1A-5 2013/10/18 Change CN21 Pin8 for
MY2 (29) (4,29) TPD_INT#
25 MY1 MY13 5 6 *220P_8P4R 5 I2C/PS2 TPD idendify.
MY1 (29)
26 MY0 MY12 7 8
MY0 (29) Q43
27 2013/10/29 Change CN21 power rail to S5
28 R403 *TDI@0_4 change Q42 direction and net name,
R776 33_4
NBSWON# (11,29) +3V 1A-12 reseve PS2 PU to +3V.
29
30 +3VPCU
1
KB CONN C805
D34
*VPORT_6
180P/50V_4 RP1
10
*10K_10P8R
1 MX3
CPU FAN (THM)
Prevent ESD/EOS MX4 9 2
2
Layout near MX6 8 3 MX2

MX5 7 4 MX0 +3V
device 6 5 MX1
C MX7 C
+3V
R609
R218
+5V 10K_4
KB_BL LED (KBC) *10K_4
2
C321
+5V +5V (29) FANSIG
2.2U_6
U12 30mils CN8
1
C187 KBL@2.2u/6.3V_6 2 3 TH_FAN_POWER
R148 VINVO 5 1
1
1 GND 6 2
(7) SMB1ALERT#
2
KBL@10K_4 Q18 /FON GND 7 C723 C728 C719 3
4 GND 8 FAN_3P
KBL@AO3413 (29) CPUFAN#
2 VSET GND 2.2U_6 .01U/50V_4 *.01U/50V_4
1
G991P11U
3
20mil 20mil FANPWR = 1.6*VSET

3
2 +5V_KB R119 *shortKBL@0_4 +5V_KB_R 1A-1 2013/10/15 change pin define and add pwm IC U17.
(29) KB_BL_LED
Q19 C169 C170 1A-4 2013/10/17 Change U17 to G991P11U and PU U17 pin1.
KBL@DTC144EU CN6
1
KBL@4.7u/10V_6 KBL@0.01u/50V_4 1A-9 2013/10/24 Add alert on U17.1 for CPU themal tempture.
4
3 6
2 5
1A-13 2013/10/31CN15 Pin2/3 swap.
B 1 B
KBL@KB_backlight
1A-7 2013/10/22 change CN25 pin define for spec.

R436 *1M_4
1A-8 2013/10/23 change CN25 footprint.
+3VPCU BlBe71B5 ohm CS07152BB15 -B 5/18 Rev E
POWER LED(UIF) R426 *1M_4 +3V Amber 130 ohm CS11302BB15 -B 5/18 Rev E
R427 *1M_4 +3VPCU
G-sensor(ACS) Rev:D change to shortpad

Power LED
D26 1 2 *5.5V/25V/410P_4
*shortGS@0_6 R318 +G_SEN_PW

Blue
LED1 Rev:D change to shortpad
+3V
R432 71.5/F_4 2 3 R438 *short_4 +3VPCU
(29) PWRLED#
U19
C428 C412 1 2 R433 130/F_4 1
Vdd_IO NC (29) SUSLED# +3VPCU
GS@0.1U/16V_4 14 3 R440 *0_4 +3V_S5
GS@10u/6.3V_6 VDD NC LED_AMBER/BLUE
1 Amber
2
D27 *5.5V/25V/410P_4 C555
10 39P/50V_4
GS@RB500V-40 D8 ACCEL_INTA_R 11 RESERVED 15
to CPU (4) ACCEL_INTA INT1 RESERVED
to SATA HDD GS@RB500V-40 D35 ACCEL_INT2_R 9 R428 *1M_4 +3VPCU
(25) ACCEL_INT2 INT2
Rev:D change to shortpad R337 *shortGS@0_4 7 R429 *1M_4 for ESD
CLK_SDATA R336 G_MBDATA_R 6
*shortGS@0_4 SA0 5
(7,12,13)
(7,12,13)
CLK_SDATA
CLK_SCLK CLK_SCLK R329 *shortGS@0_4
G_MBCLK_R 4 SDA
SCL
GND
GND
12 Battery D24 1 2 *5.5V/25V/410P_4
13
A
ACCEL_INTA +G_SEN_PW 8 GND 16 Blue
LED2 Rev:D change to shortpad
A
+G_SEN_PW CS GND R430 71.5/F_4 2 3 R437 *short_4 +3VPCU
(29) BATLED0#
G_MBDATA_R C454 *33P/50V_4
GS@LIS3DHTR R431 130/F_4 1
(29) BATLED1#
C425 G_MBCLK_R C431 *33P/50V_4 R439 *0_4 +3V_S5
*22P/50V_4 LED_AMBER/BLUE
R334 *4.7K_4 G_MBDATA_R Amber

1 2
+G_SEN_PW D25 *5.5V/25V/410P_4
R333 *4.7K_4 G_MBCLK_R
PROJECT : ZRW
KB/TP/FAN 3A

5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
USB Charger to 3.0 (UBC) USBPWR0
+5VPCU
80 mils (Iout=2A)
C483
1
U22
IN OUT
ILIM_LO
12
15
16
ILIM_LO
ILIM_HI
(RILIM_LO 1.2A)
80 mils (Iout=2A)
SDP
CTL1
1
CTL2
1
CTL3
1
ILIM_SEL
0
28
+
1U/10V_4 ILIM_HI C497 C496
(RILIM_HI 2.3A) R376 C487
9
STATUS 17
R377
39K/F_4
100u/6.3V_1206
470P/50V_4 0.1u/16V_4 CDP 1 1 1 1
GND_PAD 20K/F_4
13
(6) USB_OC0# 4 FAULT 14
(29) USB_BC_ON ILIM_SEL GND DCP 0 1 1 X
5 11 USBP0-_C iPAD charging current is about 2.1A so set on 2.3A
D (29) USB_CHARGE_ON EN DM_IN 1.2A current limit of USB 3.0 SDP mode D
R364 100K_4 10 USBP0+_C
6 DP_IN
(29) USB_CLT1 CTL1
+5VPCU R360 10K_4 CTL2 7 2
8 CTL2 DM_OUT 3 USBP0- (6)
R356 10K_4 CTL3
CTL3 DP_OUT USBP0+ (6)
TPS2544RTER RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:
1. ILIM_SEL is always set high
2. Load Detection - Port Power Management is not used
GMT:AL003703000(G3703) 3. Mouse / Keyboard wake function is not used
If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use
TI:AL002544001(TPS2544) RILIM_LO < 80.6 kΩ.
Silergy: AL055544000 (SLGC55544VTR) The following equation programs the typical current limit:
(1) IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}
RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.

USB 3.0 Connector (UB3)
USBP0-_C R385 *short_4 USBP0-_R
USBP0+_C R386 *short_4 USBP0+_R
USBPWR0
CN16 USBPWR0
USB3.0 CONN
1 U24
2 1 VBUS
USB3_TXP0_R 1
2 D- I/O 1
C518 *1.6P/50V_4 3 10 USB3_TXN0_R
4 3 D+ 2 I/O 6
R392 *short_4 USB3_RXN0_R 5 4 GND VDD 9
(6) USB3_RXN0 5 SSRX- GND_2
R387 *short_4 USB3_RXP0_R 6 C502 3
(6) USB3_RXP0 7 6 SSRX+ NC_1 8
0.1u/16V_4
C517 *1.6P/50V_4 8 7 GND USBP0-_R 4 NC_2
9 8 SSTX- I/O 2 7 USBP0+_R
9 SSTX+ USB3_RXP0_R 5 I/O 5
13
12
11
10
GND_1
I/O 3 6 USB3_RXN0_R
C C
I/O 4
13
12
11
10
11
C499 0.1u/16V_4 USB3_TXN0_C R384 *short_4 USB3_TXN0_R
(6) USB3_TXN0
C498 0.1u/16V_4 USB3_TXP0_C R381 *short_4 USB3_TXP0_R
(6) USB3_TXP0
USB30_ESD_AZ1065-06F.R7G
C511 C505 USB protection diodes for ESD.

*1.6P/50V_4 *1.6P/50V_4
as close as possible to USB connector pins.
R342 *short_4 USBP1-_R

(6) USBP1-
R348 *short_4 USBP1+_R
+5V_S5 (6) USBP1+ USBPWR1
USBPWR1
CN13 U21
USB3.0 CONN USB3_TXN1_R 1
1 I/O 1 10 USB3_TXP1_R
C424 USBPWR1 1 VBUS I/O 6
U20 2 2
3 2 D- VDD 9
1u/6.3V_4 Close USB3.0 C475 *1.6P/50V_4
5 1 4 3 D+ C462 3 GND_2
IN OUT R355 *short_4 USB3_RXN1_R 5 4 GND 0.1u/16V_4 NC_1 8
2 (6) USB3_RXN1 6 5 SSRX- 4 NC_2
R353 *short_4 USB3_RXP1_R USBP1-_R
GND (6) USB3_RXP1 6 SSRX+ I/O 2
7 7 USBP1+_R
USBON# 4 3 C451 C450 C452 C469 *1.6P/50V_4 8 7 GND USB3_RXP1_R 5 I/O 5
GND_1
(29) USBON# /EN /OC 8 SSTX- I/O 3
470P/50V_4 0.1u/16V_4 100U/6.3V_1206 9 6 USB3_RXN1_R
9 SSTX+ I/O 4
13
12
11
10
G524B2T11U
13
12
11
10
11
(6) USB_OC1#
B Enable: Low Active /2.5A B

USB30_ESD_AZ1065-06F.R7G
BCD:AL002822000 C461 0.1u/16V_4 USB3_TXN1_C R341 *short_4 USB3_TXN1_R
(6) USB3_TXN1
GMT:AL000524007 (6) USB3_TXP1
C459 0.1u/16V_4 USB3_TXP1_C R340 *short_4 USB3_TXP1_R USB protection diodes for ESD.
as close as possible to USB connector pins.
C460 C458
*1.6P/50V_4 *1.6P/50V_4
+5V_S5
USB2.0 DB (UB2) Card Reader (CRD)
USBPWR2
1u/6.3V_4 U46
C779 TP35
TP37 TP39
5 1
IN OUT
SD_D2/MS_D5
SD_D3/MS_D4
2 C782 CN4
GND C792 C791 C789 C544 1u/10V_4
USBON# 4 3 470P/50V_4 0.1u/16V_4 10U/6.3V_6 100U/6.3V_1206 SD_WP/MS_D1 11
/EN /OC WP
XD_D7
SD_CDZ 10 16
SP14
SP11
SD_D2/MS_D5 reserve for EMI 9 CD NC 17
V18
G524B2T11U SD_D1/MS_D7 8 DATA2 NC
USB_OC2# SD_D0/MS_D6 7 DATA1
(6) USB_OC2# 6 DATA0
24
23
22
21
20
19
U26 SD_CLK R413 *short_4 SD_CLK_R 5 VSS2
Enable: Low Active /2.5A V18 VCC_XD reserve for EMI 4 CLK
XD_D7
SP14
SP13
SP12
SP11
BCD:AL002822000 +3V Rev:D change to shortpad 3 VDD
GMT:AL000524007 R398 6.2K/F_4 RREF 1 18 SD_CMD SD_CMD 2 VSS1
GND
GND
GND
GND
2 RREF SP10 17 GPIO0 TP41 SD_D3/MS_D4 1 CMD
(6) USBP7- DM GPIO0 CD/DATA3
3 RTS5170 SP9 16 SP9 TP42
(6) USBP7+ DP
R391 *short_6 +3V_CR 4 15 SD_CLK SD-CARD
12
13
14
15
USBPWR2 VCC_XD 5 3V3_IN SP8 14 SP7 TP40
SDREG 6 CARD_3V3 SP7 13 SD_CDZ C542
A A
SDREG SP6
XD_CD#
CN22 C543
C531 C539 C540 4.7u/6.3V_6 0.1u/16V_4
SP1
SP2
SP3
SP4
SP5
1 4.7U/6.3V_6 0.1u/16V_4 1u/10V_4

2 25 GND
R755 *0_4 3
7
SD_WP/MS_D1 8
9
SD_D1/MS_D7 10
SD_D0/MS_D6 11
12
4
R787 *0_4
5
R396 C533
6 *0_4 0.1u/16V_4
(6) USBP3- 7
XD_CD#
(6) USBP3+ 8
9 11 Quanta Computer Inc.
SP2
SP5
10 12
USB2.0 DB
PROJECT : ZRW
sualaptop365.edu.vn
3A
TP43TP36 TP38 USB3/Charger/CR/USB2 DB
5 4 3 2 1
5 4 3 2 1
EC(KBC)
29
L12 +A3VPCU
BLM15AG121SN1D(120,500MA)_4 +3VPCU_ECPLL L22 +3VPCU_EC
C495 11/11 FAE BLM15AG121SN1D(120,500MA)_4 +3VPCU
0.1u/16V_4 suggestion C772 (For PLL Power)
pin106 +3V_RTC
ECAGND change to 0.1u/16V_4 S5_ON R741 10K_4
+3VPCU_EC
R747 2.2_6 12 mils NBSWON# R730 10K_4
1 2 +3VPCU_EC ACPRESENT (8)
+3VPCU SUS0# (8)
BT_EN
BT_EN (26)
C514 C771 C770 C777 C780 C508 C769 +3V_GFX
+3VPCU_EC and +3V_RTC PCH_SLP_SUS# (8)
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 FB_CLAMP_REQ#
minimum trace width 12mils. FB_CLAMP_REQ# (17) DGPU_OTP# R740 EV@10K_4
EC_RTCRST (6) Prevent ESD/EOS Layout near device
DGPU_OPP# R382 EV@10K_4
USBON# (28)
R361 *2.2_6 R190 33_4 FB_CLAMP_REQ# R379 EV@10K_4
TPD_EN (27)
D 1 2 +3V_EC D
+3V USB_BC_ON (28)
+3V_S5 1 2 USB_CHARGE_ON (28)
R779 2.2_6 C482 C796
CLKRUN# (7,25)
180P/50V_4
(7,25,26) LPC_LAD0
0.1u/16V_4 MAINON_EC R389 100K_4
(7,25,26) LPC_LAD1
114
121
106
127
U45
11
26
50
92
74
84
83
82
19
20
99
98
97
96
93
(7,25,26) LPC_LAD2
3
SUSON_EC R739 100K_4
(7,25,26) LPC_LAD3 10 110 MBCLK
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY(PLL)
EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1
L80HLAT/BAO/GPE0
L80LLAT/GPE7
GPH7
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/ID0/GPH0
VCC
VSTBY_FSPI
AVCC
LAD0/GPM0(3) SMCLK0/GPB3 MBCLK (30)
9 111 MBDATA VRON_EC R463 100K_4
LAD1/GPM1(3) SMDAT0/GPB4 MBDATA (30)
LAD2/GPM2(3) SM BUS SMCLK1/GPC1
115 2ND_MBCLK 2ND_MBCLK (7,17)
+3VPCU 7 116 2ND_MBDATA PCH_SPI_SI_EC R735 *10K_4
(7) ESPI_RST# LAD3/GPM3(3) SMDAT1/GPC2 2ND_MBDATA (7,17)
R749 *short_4 PLTRST#_EC 22 117 EC_PECR_R R738 43_4 H_PECI (2)
(8,14,23,25,26) PLTRST# 13 LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) 118 R460 33_4 PCH_SPI_SO_EC R736 *10K_4
(7) CLK_PCI_EC 6 LPCCLK/GPM4(3) SMDAT2/PECIRQT#/GPF7(3) LID# (21)
(7,25,26) LPC_LFRAME# LFRAME#/GPM5(3) C801 180P/50V_4
PROCHOT_EC 17
LPCPD#/GPE6
2
Prevent ESD/EOS Layout near device

D12 126 PS/2
R368 SDMK0340L-7-F
(7,25) IRQ_SERIRQ
TP77 5
15
GA20/GPB5(3)
SERIRQ/GPM6(3) PS2CLK0/CEC/TMB0/GPF0
85
86
IOAC_RST# (23,26)
SM BUS PU(KBC)
100K_4 LPC
(2) KBSMI# 23 ECSMI#/GPD4(3) PS2DAT0/TMB1/GPF1 89 EC_FPBACK# (21)
(2) EC_SCI# TPCLK (27)
1
WRST# 14 ECSCI#/GPD3 PS2CLK2/GPF4 90

WRST# GPIO PS2DAT2/GPF5 TPDATA (27)
4 +3VPCU
(7) SIO_RCIN# KBRST#/GPB6(3)
16
C491
1u/6.3V_4
(26) IOAC_WLAN_WAKE# PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
IT8987E/CX PWM0/GPA0
PWM1/GPA1
24
25 PWRLED#
BATLED1#
(27)
(27) Battery module
MBCLK
MBDATA
R731
R732
4.7K_4
4.7K_4
(27)
(8)
KB_BL_LED
DNBSWON#
113
123 CRX0/GPC0
CTX0/TMA0/GPB2(3) CIR
LQFP PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
28
29
30
31
SUSLED#
SUSLED#
BATLED0#
MAINON_EC
(27)
(27)
(8)
+3V_S5
PWM5/GPA5 USB_CLT1 (28)
CLK_PCI_EC Pin 80 EC_APWROK reserve TP
PWM 2ND_MBCLK R733 2.2K_4
TP33 80 UMA& VGA SKU 2ND_MBDATA R734 2.2K_4
119 DAC4/DCD0#/GPJ4(3) 47
R373
(8,11,31) SUSB#
33 DSR0#/GPG6 TACH0A/GPD6(3) 48
FANSIG (27) Need Stuff
(8) EC_PWROK GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) PCH_SUSACK# (8)
88
(21) PCH_BLON_EC 81 PS2DAT1/RTS0#/GPF3 120
*22_4
(27) CPUFAN# DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) SUSON_EC (8)
87 124
(23) IOAC_LAN_WAKE# PS2CLK1/DTR0#/GPF2 TMRI1/GPC6(3) DGPU_OTP# (17)
C 109 C
(4) ME_WR# TXD/SOUT0/GPB1
108
(24) AMP_MUTE# RXD/SIN0/GPB0
C490
*10p/50V_4 71 107 NBSWON#
(25) ODD_POWER ADC5/DCD1#/GPI5(3) PWRSW/GPE4 NBSWON# (11,27)
72 UART port 18
(30) ACIN ADC6/DSR1#/GPI6(3) RI1#/GPD0(3) SUSC# (8,11)
73 WAKE UP 21 HWPG
(30) TEMP_MBAT 35 ADC7/CTS1#/GPI7(3) RI2#/GPD1 HWPG (8) H_PROCHOT# (2,30,36)
(26) IOAC_WLANPWR# RTS1#/GPE5
3
34
(24) PCBEEP_EC 122 PWM7/RIG1#/GPA7 112
TP78 Q30
95 DTR1#/SBUSY/GPG1/ID7 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 RSMRST# (8)
Prevent ESD/EOS Layout near device (23) IOAC_LANPWR# CTX1/SOUT1/GPH2/SMDAT3/ID2
R746 33_4 EC_ODD_EJ_R 94 Prevent ESD/EOS Layout near device PROCHOT_EC 2
(25) EC_ODD_EJ CRX1/SIN1/SMCLK3/GPH1/ID1
105 R774 33_4
(7) PCH_SPI_CLK_EC 101 FSCK/GPG7 RF_EN (26)
C799 180P/50V_4 R380 2N7002K
(7) SPI_CS0#_UR_ME FSCE#/GPG3
102 EXTERNAL SERIAL FLASH ICMNT
(7) PCH_SPI_SI_EC ICMNT (30)
1
103 FMOSI/GPG4 66 C798 100K_4
(7) PCH_SPI_SO_EC FMISO/GPG5 ADC0/GPI0(3) 67 C516 10u/6.3V_6 ECAGND 180P/50V_4
56 ADC1/GPI1(3) 68
(27) MY16 57 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) 69 DGPU_OPP# (17)
(27) MY17 KSO17/SMISO/GPC5(3) ADC3/GPI3(3) VRON_EC (8)
R751 33_4 TS_EN_C 32 70
(21) TS_EN PWM6/SSCK/GPA6 ADC4/GPI4(3) IDCHG (30)
S5_ON 100 A/D D/A
(31,40) S5_ON SSCE0#/GPG2
C800 180P/50V_4 125 SPI ENABLE
(27) PTP_PWR_EN# SSCE1#/GPG0 76
Prevent ESD/EOS Layout near device TACH2/GPJ0(3) DPWROK_C (8)
36 77
(27) MY0 KSO0/PD0 GPJ1(3) EC_FB_CLAMP (15,17)
37 78
(27) MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(3) PCH_PWROK (8)
38 79
(27) MY2 KSO2/PD2 DAC3/TACH1B/GPJ3(3) PCH_SUSPWRACK_R (8)
39
(27) MY3 40 KSO3/PD3 +3V
(27)
(27)
MY4
MY5
41
42
KSO4/PD4
KSO5/PD5
HWPG(KBC)
(27) MY6 KSO6/PD6 KBMX DDR=1.5V, D1 DNP and D2 POP
43
(27) MY7
44 KSO7/PD7 DDR=1.35V, D1 POP and D2 DNP R374
(27) MY8 45 KSO8/ACK# 10K_4
(27) MY9 KSO9/BUSY
46
(27) MY10 KSO10/PE
51 2 +1V_S5_ON D18 RB500V-40 HWPG
(27) MY11 KSO11/ERR# GPJ7 +1V_S5_ON (32) (40) HWPG_1.5V
KSI3/SLIN#
KSI1/AFD#
52 128
KSI0/STB#
KSI2/INIT#
CLOCK R349 33_4

(27) MY12 53 KSO12/SLCT GPJ6 TPD_INT# (4,27)
D11 *RB500V-40
VCORE
(27) MY13 54 KSO13 (40) HWPG_1.8VS5

AVSS
Prevent ESD/EOS Layout near device

KSI4
KSI5
KSI6
KSI7
(27) MY14 KSO14

VSS
VSS
VSS
VSS
VSS
B 55 C797 D20 *RB500V-40 B

(27) MY15 KSO15 (35) HWPG_VDDR
180P/50V_4
IT8987/CX SM BUS ARRANGEMENT TABLE D17 *RB500V-40
(32) HWPG_1VS5
58
59
60
61
62
63
64
65
27
49
91
104
ECAGND 75
12
SM Bus 1 Battery D19 *RB500V-40

(31) SYS_HWPG
(27) MX0
C778 D14 *RB500V-40
(27) MX1 AJ089870F02 IT8987E/CX SM Bus 2 PCH/VGA
(33) HWPG_+VCCOPC
(27) MX2
0.1u/16V_4
(27) MX3
R782
R783
R784
R785
EC_GND
(27) MX4
(27) MX5 SM Bus 3
L11
(27) MX6
0_4
*0_4
*0_4
*0_4
(27) MX7
BLM15AG121SN1D(120,500MA)_4 SM Bus 4
Rev:D Add
+3VPCU
Reserve switch for test Reset SW (FSW) R756 *0_4 +3V_RTC
(MP remove)
R753 R757 *0_4
10K_4
+3VPCU Reserve no stuff
(6,9,11,21,23,24,25,27,30,31,41,42) +3VPCU
+3V_RTC (14,16,17,42) +3V_GFX
SW2 R717
(2,4,6,7,8,9,12,13,14,15,16,21,22,23,24,25,27,28,31,32,35,36,40,41,42) +3V
POWER_SW *10K_4
(3,4,6,7,8,9,11,23,25,26,27,31,40,41) +3V_S5
NBSWON# 1 3
2 4 WRST#
1
(30) BI
C785 R719
5
C764
0.1u/16V_4 100K_4
*0.1u/16V_4
3
Vgs = 1.5V
2
2 BI_GATE
Vgs = 1.5V
1
SW1
5
A
PJA138K C765 A
3
4
POWER_SW
1
Q40 *0.1u/25V_6 6
2
Q56
5 *PJ4N3KDW
4
1
1
2

PROJECT : ZRW
sualaptop365.edu.vn
3A
KBC IT8587
5 4 3 2 1
5 4 3 2 1
PJ2
VA
1
PD8
SV1040
VA1 PQ22
AON6414AL
3
VA2 PR213
0.01/F_0612 VIN
PQ1
AON6414AL
3
30
3 5 2 1 2 5 2
1 2 1 1
2 PR209
3
P4SMAFJ20A
47n/50V_6
*short_4
4
*0.01u/50V_4
PC136
24780_ACN
0.1u/50V_6
4
PD3
PC13
Power conn PC141 PC140
PC1
D 0.1u/50V_6 2200p/50V_6 D
24780_ACP
2
PC128 PC124 PC133 PR210
0.1u/50V_6 2200p/50V_6 1n/50V_4 *short_4
PR165 PR166
4.02K/F_4 4.02K/F_4
Rev:D change to shortpad PR185
*short_6
24780_ACP
24780_ACN PR186 10/F_6
PC115 PC5 PC2

1u/25V_6 0.1u/50V_6 0.1u/50V_6
24780_CMSRC
1
PR5 3 18 24780_BATDRV
ACN
ACP
20_1206 CMSRC BATDRV
17 24780_BATSRC VIN
BATSRC
C 24780_ACDRV 4 REGN6V C
PR168 ACDRV
REGN6V 866K/F_4 24780_VCC 28
VCC 24 24780_REGN
PC116 REGN PC122
0.47u/25V_6 2.2u/10V_6 PC117 PC118
2200p/50V_6 10u/25V_8
PR1 PR3 PR173 Rev:D change to shortpad
100K/F_4 133K/F_4 *short_6
5
24780_ACDET 6 25 24780_BST
ACDET BTST PC119
PR167 *short_4 5 47n/50V_6
(29) ACIN ACOK
MBDATA PR177 *short_4 11 26 24780_DH 4
SDA HIDRV PQ20 PR169
PR4 MBCLK PR178 *short_4 12 AON7410 0.01/F_0612 BAT-V
100K/F_4 SCL PU5 PL1
3
2
1
ICMNT PR170 *short_4 7 BQ24780SRUYR 6.8uH_7X7X3
(29) ICMNT IADP 27 24780_LX 1 2 BAT-V
PR171 *short_4 8 PHASE
(29) IDCHG IDCHG
5
Rev:E change PMON PR172 *short_4 9
(36) PMON PMON
100P/50V_4
100P/50V_4
*100P/50V_4
PC7
PC6
PC3
PR2 Rev:D change to shortpad
PR342 Rev:D change to shortpad *4.7_6
UMA-> PR342 CS33832FB08 38.3K 1/16W +-1% (0402) For 78W 31.6K/F_4
no stBff 23 24780_DL 4 PR176 PR175
LDODRV PQ21 *short_4
Dis -> PR342 CS33162FB14 31.6K 1/16W +-1% (0402) For 95W *short_4
AON7410
24780_BM# 16
+3VPCU
3
2
1
PR16 10K_4 TB_STAT PC130 24780_SRP PC121 PC120 PC127
PC126 24780_CMPOUT 14 0.1u/25V_4 PC4 2200p/50V_6 10U/25V_8 10U/25V_8
0.1u/50V_6 PR179 *10K_4 CMPOUT 20 PR183 10/F_6 24780_SRP *680p/50V_6 24780_SRN
B 24780_ILIM 21 SRP B
ILIM PC131
PROCHOT
PC125 PR14 24780_CMPIN 13 0.1u/25V_4
BATPRES
*100p/50V_4 316K/F_4 CMPIN
19 PR184 10/F_6 24780_SRN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PAD
SRN
BAT-V PC132
35
36
37
38
10
15
22
29
30
31
32
33
34
0.1u/25V_4
PR15 PR11
BI (29)
100K/F_4 100K_4
50458-00801-V01
PR10 *0_4
9 8
7
6 PR8 100_4 TEMP_MBAT
5 TEMP_MBAT (29) Power charger circBit reserve 2N7002 for GPU throtting
*0_4
PR12 *short_4
4 PC123
3 0.01u/50V_4
2 +3VPCU GPU_THROTTING# (17)
PR9 1M_4
10 1
PR13
3
PJ1
Rev:D change to shortpad TEMP_MBAT
24780_CMPOUT 2
PR6 PR7 PQ40
100_4 100_4 *EV@2N7002K
REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
1
H_PROCHOT#
MBCLK (29)
H_PROCHOT# (2,29,36) =0.793V for 3.965A current limit
A A
MBDATA (29) PR174
ILIM=0.793V
*100K_4 Rsr = 0.01ohm
1
PC8 PC9
*47p/50V_4 *47p/50V_4
+VCCIO
2
PD1 PD2
PDZ5.6B PDZ5.6B Check with HW side PROJECT : ZRW
P.36 VCC_CORE have PU to +1V Size Document Number Rev
3A
Charger (BQ24780RUYR)
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
(2,40) SYS_SHDN#
SYS_SHDN#
+3VPCU VL 3V_LDO
PR6130
*short_6
Rev:D change to
shortpad
31
PR6280
10K/F_4
(29) SYS_HWPG
VIN VIN
10u/6.3V_6
0.1u/25V_4
4.7u/6.3V_6
SYS_SHDN#
1
+
D PC6212 PC6220 PC6218 PC6214 PC6216 D
33u/25V_6x4.5 10u/25V_8 2200p/50V_4 Rev:D change to PR6278 PR6283 PR6284 2200p/50V_4 10u/25V_8
2
shortpad *short_4 *short_4 *100K/F_4
PC6219
PC6100
51225_VIN
PC6098
+5VPCU
5
PQ6054 +3VPCU
+3VPCU
5
PQ6056 AON7410
+5VPCU AON7410 3.3 Volt +/- 5%
5 Volt +/- 5%
13
12
TDC : 5.2A
3
4
TDC : 7.9A 4
PEAK : 6.9A
VIN
VREG5
VREG3
PEAK : 10.5A 7 6 SYS_SHDN# OCP : 9A
3
2
1
PGOOD EN2
OCP : 12A Width : 220mil
1
2
3
51225_EN1 20 10 51225_DH2
Width : 320mil EN1 DRVH2 PR6286 PC6213
PL6013 51225_DH1 16 9 51225_VBST2 PL6012
2.2uH_7X7X3 PC6215 PR6287 DRVH1 VBST2 2.2uH_7X7X3
51225_VBST1 17 8 51225_SW2 1/F_6 0.1u/50V_6
VBST1 PU6010 SW2
0.1u/50V_6 1/F_6 51225_SW1 18 TPS51225RUKR 11 51225_DL2
SW1 DRVL2
5
PR6281 51225_DL1 15 4 51225_FB2 PR6279
15.8K/F_4 DRVL1 VFB2 6.49K/F_4
51225_FB1 2 21 PR6289
+ PR6288 4 VFB1 GND 4 *4.7_6 +
PC6227 PC6226 *4.7_6 14 22 PC6225 PC6224
220u/6.3V_6X4.2 0.1u/50V_6 VO1 GND 0.1u/50V_6 220u/6.3V_6X4.2
VCLK
GND
GND
GND
GND
CS1
CS2
PQ6055 PQ6053
1
2
3
3
2
1
AON7752 AON7752 PC6222
PR6120 *680p/50V_6 PR6121
19
26
25
24
23
10K/F_4 PC6221 10K/F_4
*680p/50V_6
C C
51225_CS1
51225_CS2
51225_VCLK
PR6125
120K/F_4
100K/F_4
*short_6
2
PC6099 OCP:9A
0.1u/50V_6 L(ripple current)
PD6004 Rev:D change to
1PS302 3
shortpad =(9-3.3)*3.3/(2.2u*0.355M*9)
OCP:12A PR6285 ~2.676A
1 *short_6
L(ripple current) Iocp=9-(2.676/2)=7.661A
PR6124
PR6122
PC6097
=(9-5)*5/(2.2u*0.3M*9) 0.1u/50V_6 Rev:D change to Vth=(7.661A*14.5mOhm)+1mV=112.098mV
=3.367A 2 shortpad R(Ilim)=(112.098mV*8)/10uA
Iocp=12-(3.367/2)=10.316A PD6008
=89.68K
Vth=(10.316A*14.5mOhm)+1mV=150.589mV 1PS302 3 PC6211
R(Ilim)=(150.589mV*8)/10uA 1
0.1u/50V_6
~120.47K +5VPCU
+15V_ALWP B2A
+15V
PR6275
S0->S5 & S0->S3
22_8 PC6209 Power off sequence under 200us PR6290
0.1u/50V_6 SUSB# -> VCCIO *10K/F_4
MAIND
Rev:E Reserve only no stuff
3
B MAIND B
MAIND (32,40)
(8,11,29) SUSB# 2 2
PQ6057 PQ6058
*2N7002K *2N7002K
1
VIN +3V_S5 +5V_S5 +15V VIN +5VPCU
+5VPCU +3VPCU +3VPCU

PR336 PR338 PR339 PR334 PR335
5
1M_6 22_8 22_8 1M_6 *1M_6

5
3
S5D 4
PQ34
3
MDV1528Q
MAIND 4 MAIND 4 S5D 2
3
2
1
2 PQ38 PQ18
(29,40) S5_ON
2 2 2 MDV1528Q MDV1528Q
PQ37
+5V_S5
3
2
1
3
2
1
PR337 PQ36 PQ39 PQ33 AO3404
1
1
PQ35 1M_6 2N7002K 2N7002K 2N7002K
DTC144EU PC282
TDC : 3.38A +5V +3V +3V_S5
1
*2.2n/50V_4
PEAK : 4.5A
Width : 140mil TDC : 3.6A TDC : 2.05A TDC : 0.19A
A A
PEAK : 4.8A PEAK : 2.74A PEAK : 0.25A
Width : 160mil Width : 100mil Width : 20mil
+5V
Rev E Add
C809 C810 Quanta Computer Inc.

0.01u/50V_4 0.01u/50V_4
PROJECT : ZRW
Date:
Document Number
SYSTEM 5V/3V (NB680 & NB679)
Rev
3A
5 4 3 2 1
5 4 3 2 1
32
VIN
D D
+5VPCU
+3V
PC194 PC203 PC202

1u/10V_4 PQ30 2200p/50V_6 10u/25V_8
PR257 AON6978
100K/F_4
2
D1
D1
D1
V5IN
51211V_DRVH
1 9 PR258 PC196 +1V_S5
(29) HWPG_1VS5 PGOOD DRVH *short_60.1u/50V_6
51211V_EN 3 10 51211V_VBST 1 G1 PL11
(29) +1V_S5_ON EN VBST
PR254 *short_4 0.68uH_7X7X3
51211V_TRIP 2 PU12 8 51211V_SW S1/D2 951211V_SW
PR74 93.1K/F_4 TRIP RT8237CZQW SW
51211V_TST 5 6 51211V_DRVL
PR71 470K/F_4 TST DRVL 8 G2 Rev:F Change 4.7K
12 11
PR72 GND GND PR76 PR251
GND
GND
GND
GND
*100K/F_4 *4.7_6 4.7K/F_4
FB
S2
S2
S2
C + C
+1V_S5
13
14
15
16
7
6
5
51211V_FB
PC213
0.1u/50V_6
PC212
330u/2.5V_6X4.2
1.0 Volt +/- 5%
PC62 TDC : 11.32A
*680p/50V_6 PR66
OCP=A
10K/F_4
PEAK : 15.09A
L ripple current
=(19-1.05)*1.05/(2.2u*290k*19) OCP : 18A
=1.555A Width : 460mil
Vtrip=10-(1.555/2)*14mohm VFB=0.7V
=115.12mV
Rlimit=115.12mV/10uA*8=92.09Kohm
VIN +1V_SUS +15V VIN +1V_S5 +1V_S5

B B
TDC : 2.36A
PR141 PR139 PR143 PR142 PEAK : 3.14A
5
1M_6 22_8 1M_6 *1M_6
Width : 100mil
3
SUSD 2 MAIND 4
(31,40) MAIND
PQ26
3
MDV1528Q
PQ23
3
2
1
2 AO3404
(8,35) SUSON
1
2 2
+1V_SUS
PR140 PQ7 PQ8
+VCCIO
1
PQ6 1M_6 2N7002K 2N7002K

DTC144EU PC101
TDC : 0.18A
1
*2.2n/50V_4 PC6230
22u/6.3V_6 PEAK : 0.24A PC6231
*22u/6.3V_6
Width : 20mil
Rev:F add
A
Rev:F add A

PROJECT : ZRW
3A
+1V_S5 (RT8237CZQW)
5
1
32 of 48
5 4 3 2 1
+3V_S5
PR292
GT3@0_4
+VCCOPC Power only for 2+3e CPU 33
D D
PC230 +VCCOPC
JP16
GT3@0.001/F_3720
GT3@1u/10V_4 TDC : 4.5A
PEAK : 6A
10
1 2 +VCCOPC_VIN 1
Width : 200mil
3V3
VIN VIN
GT3@10u/25V_8
GT3@10u/25V_8
GT3@2200P/50V_4
GT3@0.1U/25V_4
PC99
PC228
PC100
PC229
PR291 PC231 GT3@0.1u/50V_6
9 +VCCOPC_VBST
BST
GT3@0_6 PL13
GT3@0.68uH_7X7X3
8 +VCCOPC_SW R793 GT3@0_8
SW +VCCOPC
PR136 GT3@0_4 +VCCOPC_EN 5
(8,36) VRON EN R794 GT3@0_8
+3V_S5 +VCCEOPIO
+VCCOPC_MODE 7 PU14 12 PR344 GT3@10/F_4
GT3@0.1u/16V_4
*100K/F_4
GT3@22uF/6.3V_6
GT3@22uF/6.3V_6
GT3@22uF/6.3V_6
MODE GT3@NB681GD-Z
VOUT
PR135
PC226
PC222
PC225
PC223
GT3@100K/F_4
C C
PR289
R697 2 +VCCOPC_SRC (5)
GT3@10K_4 PGND
PR280 *GT3@0_4 PR288 GT3@0_4 +VCCOPC_LP# 6 3 VCCOPC_VID1_C PR286 GT3@0_4 VCCOPC_VID1

(9) LPM_ZVM_N LP# C1
4 VCCOPC_VID0_C PR287 GT3@0_4 VCCOPC_VID0
C0
AGND
PR290 GT3@0_4 13
(29) HWPG_+VCCOPC PG
PR294 +3V_S5
GT3@100K/F_4
11
PR293
GT3@0_6
R705 R708
GT3@10K_4 *10K_4
+3V 681_AGND (5)
B B
VCCOPC_VID0
VCCOPC_VID1
Mode VR Rail LP# C1 C0 Vo

R706 R707
*10K_4 GT3@10K_4
0 ohm VCCIO 0 X X 0V
Floating PRIMCORE 1 0 0 0.8V(MSM)
100K EDRAM/EOPIO 1 0 1 0.95V

VCCEDRAM
150K Other 1 1 0 1.0V
1 1 1 1.05V
A A
(5) +VCCOPC
(21,30,31,32,35,36,40,41,42) VIN
(2,4,6,7,8,9,12,13,14,15,16,21,22,23,24,25,27,28,31,32,35,36,40,41,42) +3V PROJECT : ZRW
(3,4,6,7,8,9,11,23,25,26,27,31,40,41) +3V_S5
3A
+VCCOPC (NB681GD-Z)
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
34
D D
C C
B B
A A

PROJECT : ZRW
2A
+VCCEOPIO (NB681GD-Z)
Date: Thursday, June 25, 2015 Sheet 34 of 48
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
TDC : 0.53A
35
+VDDQ_VTT
PEAK : 0.7A
Width : 40mil
PC234 PC236
10u/6.3V_6 10u/6.3V_6
D TDC : 0.38A D
PEAK : 0.5A +VDDQ
Width : 20mil
Close to IC
Greater than or equal 40mil
PC237
0.22u/10V_4
+5VPCU
+3V
PC235 PC242
22
21
10u/6.3V_6 1u/10V_4
2
PR295 51216_VIN
VIN
100K/F_4
PAD
PAD
VTTGND
VLDOIN
VTTSNS
VTTREF
VTT
+1.35V_SUS
5
20 12
PQ32
AON7410
1.35 Volt +/- 5%
C
(29) HWPG_VDDR PGOOD V5IN PC248 PC245 TDC : 5.11A C
PR301 51216_S3 17 14 51216_DRVH 4
2200p/50V_4 10u/25V_8
PEAK : 6.81A
(8,40) MAINON S3 DRVH
*short_4 PR308 PC243 OCP : 8A
2/F_6 0.1u/50V_6
PR305 51216_S5 16 15 51216_VBST Width : 220mil
(8,32) SUSON
3
2
1
*short_4 S5 PU15 VBST
G5316RZ1D PL15
PR296 51216_MODE 19 13 51216_SW 51216_SW +1.35VSUS
200K/F_4 MODE SW 1uH_7X7X3
5
PR299 51216_TRIP 18 11 51216_DRVL
TRIP DRVL +1.35VSUS (3,5,12,13)
100K/F_4
VDDQSNS
PR313
26 10 4 *4.7_6
PAD PGND
REFIN
GND
PAD
PAD
PAD
REF
+
PQ31 PC268 PC275
3
2
1
VREF=1.8V AON7752 PC250 0.1u/50V_6 330u/2.5V_6X4.2
6
25
24
23
7
*680p/50V_6
51216_REFIN
51216_REF
PR149
B PC238 *short_6 B
0.1u/16V_4 RDSon=mohm
PR297
51216_S3 PR303 51216_S5 10K/F_4 Rev:D change to shortpad Close to output cap
*0_4
PR300 PC239
30.1K/F_4 0.01u/50V_4 Mode Frequency Discharge mode
no stuff
PR298 *0_4 51216_S3 200K 400K Tracking Discharge
(3) DDR_VTTT_PG_CTRL
100K 300K Tracking Discharge

OCP=10A
L ripple current
=(19-1.35)*1.35/(2.2u*400k*19) DDR=1.35V
A =1.425A PR84=10K/F_4 S3 S5 +1.35VSUS REF VTT A
Vtrip=10-(1.425/2)*2.2mohm PR86=30.1K/F_4
=20.432mV
Rlimit=20.432mV/10uA*8=16.35Kohm S0 1 1 ON ON ON Quanta Computer Inc.
S3 (mainon off) 0 1 ON ON OFF PROJECT : ZRW
S4/S5 0 0 OFF OFF OFF 3A
DDR 1.35V (G5316RZ1D)
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
GT2 : PR198 CS38062FB14 80.6K

GT3 : PR198 CS39092FB11 90.9K SVID near PU1
+1V_VCCST
+5V_S5
GT2 : PR198 CS38062FB14 80.6K
GT2 : PR194 CS21912FB13 1.91K
GT3 : PR198 CS39092FB11 90.9K
GT3 : PR194 CS22552FB01 2.55K
36
1000P/50V_4
GT2 : PR203 CS37872FB15 78.7k GT3 : PR203 CS38872FB18 88.7k
PC6228
PR198 80.6K/F_4
REV:F add 1000p PR341 PR340 VIN
GT2 : PR192 CS12742FB02 274 ohm GT3 : PR192 CS15622FB16 562 ohm
100/F_4
45.3/F_4 GT2 : PR202 CS39092FB11 90.9K GT3 : PR202 CS41002FB28 100K
IMVP8 Vcore Controller
1/F_6
PC22 330P/50V_4 Close to PR40 10_4 ISL95857_SDA
PR212 *short_8
D (5) H_CPU_SVIDDAT GT2 : PR201 CS21372FB19 1.37K GT3 : PR201 CS21212FB18 1.21K D
VCCGT MOS Rev:D change to shortpad
PR227
(5) VR_SVID_ALERT#_VCORE GT2 : PR207 CS41622FB11 162k GT3 : PR207 CS41002JB20 100k
PR225 10K/F_4 PR35 49.9/F_4 ISL95857_SCLK
PR204
470K_4_4700NTC
(5) H_CPU_SVIDCLK
Rev:D change
to shortpad
Rail A（1 phase）：VCORE
PR226 27.4K/F_4
PC21 33P/50V_4
+3V +VCCIO
Rail B（2 phase）：VCCGT
GT2 : PR194 CS21912FB13 1.91K
PC129 PR195
Rail C（1 phase）：VCCSA
PR197
PR200
GT3 : PR194 CS22552FB01 2.55K
10K/F_4
*10K/F_4
2/3 FAE suggestion change to 0 ohm
8200P/50V_4 1.69K/F_4 PC40 PR48
PR32 *short_4
ISL95857_VR_HOT
(2,29,30) H_PROCHOT#
1K/F_4
2K/F_4
0.1u/25V_4
0.1u/25V_4
63.4K/F_4
78.7K/F_4
PR24
PR23
PR30 *short_4
ISL95857_VR_READY
PR206
PR203
PC35
PC32
*2200p/50V_4 *1K/F_4
ISL95857_PROG1
ISL95857_PROG2
(2) IMVP_PWRGD
ISL95857_VCC
+VCCGT
ISL95857_VIN
Close to
1.91K/F_4
PR194
PR220 VCCSA Choke
PR28 *short_4
ISL95857_VR_EN ISUMN_C (38)
(8,33) VRON
PC11
330P/25V_4
1000P/50V_4
PR187
PC16
PC15
499/F_4
*10_4
PR196
Double check if it's total power Rev:D change
*10K/F_4
no stuff *0.01U/50V_4 PR242
(30) PMON to shortpad GT2 : PR203 CS37872FB15 78.7k
40
39
38
37
36
35
34
33
32
31
10K/F_4_3435NTC
GT3 : PR203 CS38872FB18 88.7k
1
0.1u/25V_4
0.01u/50V_4
VCC
VIN
VR_HOT#
ALERT#
PROG1
PROG2
VR_ENABLE
VR_READY
SCLK
SDA
2
PC43
PC39
+3V Rev:D change
(5) VCCGT_SENSE PR191 *short_4 PR25 PC38 PR219
to shortpad
PC12 *short_4 Rail C 0.047U/10V_4 11K/F_4
1
(5) VSSGT_SENSE PR181 *short_4 *0.01U/50V_4
2
Rev:D change ISL95857_PSYS 1 30 ISL95857_PWM_C PR47 *short_4 PR218
to shortpad PSYS PWM_C PWM_C (38) 2.61K/F_4
C
Rev:D change ISL95857_IMON_B 2 29 ISL95857_FCCM_C PR46 *short_4 C
to shortpad IMON_B FCCM_C FCCM_C (38)
2
ISL95857_NTC_B 3 28 ISL95857_ISUMN_C
NTC_B ISUMN_C
no stuff PR180 PC10 ISL95857_COMP_B 4 27 ISUMP_C (38)
*10_4 COMP_B ISUMP_C
PU1
ISL95857_FB_B 5 26 ISL95857_RTN_C
0.01U/50V_4 FB_B RTN_C
ISL95859HRTZ-T
ISL95857_RTN_B 6 25 ISL95857_FB_C
RTN_B FB_C
7 24 ISL95857_COMP_C
(37) ISUMP_B ISUMP_B COMP_C
ISL95857_ISUMN_B 8 23 ISL95857_IMON_C
PR45
499/F_4
ISUMN_B IMON_C
PR216
2K/F_4
2.05K/F_4
9 22 ISL95857_PWM_A
33P/50V_4
330P/50V_4
*2K/F_4
ISEN1_B PWM_A
2
2.61K/F_4
10 21 +VCCSA
PR193
PR44
ISL95857_FCCM_A
ISEN2_B FCCM_A
PC46
2
PR21 PC19
1500P/50V_4
0.15u/10V_4
33nF/25V_4
ISUMN_A
ISUMP_A
PWM1_B
PWM2_B
COMP_A
FCCM_B
1
IMON_A
162K_4
41
PR22
PC20
PC42
PC134
PR207
11K/F_4
NTC_A
RTN_A
1
EP
FB_A
PR51
8200P/50V_4
Rev:D change
*1K/F_4 *2200P/50V_4 Rail A *0.01U/50V_4
*680P/50V_4
to shortpad *10_4 no stuff
2
PC36
PC37
PR217
1
PR241
PC139
PC41
11
12
13
14
15
16
17
18
19
20
10K/F_4_3435NTC PR43 *short_4
Close to PWM_A (37)
VCCGT Choke PR42 *short_4
ISL95857_ISUMN_A
ISL95857_PWM1_B
ISL95857_PWM2_B
ISL95857_COMP_A
FCCM_A (37)
ISL95857_FCCM_B
PR192
ISL95857_IMON_A
ISL95857_NTC_A
ISL95857_RTN_A
PR50 *short_4
ISL95857_FB_A
(37) ISUMN_B VSA_SENSE (5)
PC44
274/F_4 GT2 : PR207 CS41622FB11 162k *0.01U/50V_4 PR52 *short_4 VSASS_SENSE (5)
PC34 PR41
GT3 : PR207 CS41002JB20 100k
Rev:D change
PC14 *2200p/50V_4 *1K/F_4 to shortpad
0.1U/25V_4 PC18
ISEN1_B (37) PC45
0.022U/25V_4 Close to PR49
B PR211 Vcore Choke *10_4 no stuff B
ISUMN_A (37)
PC17 0.01U/50V_4
0.022U/25V_4 ISEN2_B (37) 249/F_4
PR243
0.1u/25V_4
GT2 : PR192 CS12742FB02 274 ohm PR26 *short_4
PC33
(37) FCCM_B 10K/F_4_3435NTC
GT3 : PR192 CS15622FB16 562 ohm
1
PR27 *short_4
0.1u/25V_4
(37) PWM1_B
2
PC31
PR208
(37) PWM2_B PR29 *short_4 PC30 11K/F_4
1
0.022u/25V_4
1
PR205
2
Rev:D change 2.61K/F_4
to shortpad
Rail B
470K_4_4700NTC
2
PR36
499/F_4
2K/F_4
ISUMP_A (37)
Skylake-U U23e 15W/28W
PR34
27.4K/F_4
1.37K/F_4
2.87K/F_4
PR199
(1+2+1+1 Phase)
330P/50V_4
+VCCCORE
PC25
1000P/50V_4
PR235
PR236
PR201
PC26
90.9K/F_4
PR202
33P/50V_4
3300P/50V_4
680P/50V_4
VCORE VCCGT VCCSA VCCGTU *0.01u/50V_4 PR31
*10_4 no stuff
PC23
10K/F_4
Close to
Icc TDC PL2：23A Icc TDC PL2：35A Icc TDC PL2：5A Icc TDC PL2：5A VCORE MOS
PR33 *short_4
Icc Max：29A Icc Max：57A Icc Max：5A Icc Max：7A VCORE_SENSE (5)
PR224
PC24
PC135
PC28
PC27 PR38 *short_4
*0.01u/50V_4 VCORESS_SENSE (5)
A
OCP：35A OCP：A OCP：6A OCP：A Rev:D change A
to shortpad
Fsw：MHz Fsw：MHz Fsw：MHz Fsw：750KHz GT2 : PR201 CS21372FB19 1.37K PC29
PR39
GT3 : PR201 CS21212FB18 1.21K CQ1A *10_4 no stuff
VCORE L/L： VCCGT L/L： VCCSA L/L： VCCGTU L/L： GT2 : PR202 CS39092FB11 90.9K 0.01u/50V_4
GT3 : PR202 CS41002FB28 100K
R_DC_LL：2.1mV/A R_DC_LL：2mV/A R_DC_LL：10.3mV/A R_DC_LL：6mV/A
R_AC_LL：2.1mV/A R_AC_LL：2mV/A R_AC_LL：10.3mV/A R_AC_LL：6mV/A PROJECT : ZRW
3A
CPU_CORE (ISL95857HRTZ-T)
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
VCORE
VIN
37
Rev:D change
10u/25V_8
10u/25V_8
2200P/50V_6
0.1U/50V_6
to shortpad
VCORE
PC52
PC51
PC155
PC154
PR55
1 2
+5V_S5
Icc TDC PL2：23A
*short_6
4.7U/10V_6
PU8 AOZ5029QI-5
6 Icc Max：29A
PC149
23 VIN 22
24 PVCC VIN
D
VCC
Rev:D change +VCCCORE OCP：35A D
to shortpad
Rail A GH
4
3 Fsw：800KHz
PR237 *short_4 1 BOOT PR231 *short_6
(36) PWM_A PWM PC144
PR238 *short_4 2 0.1u/25V_6
(36) FCCM_A FCCM PL4 VCORE L/L：
5 0.15uH_7X7X4
VSWH 13 PHASE_A 1 2 DCR=0.66mOhm
Rev:D change
to shortpad
VSWH R_DC_LL：2.1mV/A
PGND
PGND
19
4
GL 20
GL PR60 + +
2.2/F_6 R_AC_LL：2.1mV/A
330u/2V_7343
330u/2V_7343
21
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
PC59
PC161
PC164
PC168
PC162
PC58
1000P/50V_4
(36) ISUMP_A PR215 3.65K/F_6
(36) ISUMN_A
PR214 1/F_6
VCCGT Rev:D change

to shortpad
C C
PR53
+5V_S5 1 2
VIN
*short_6
4.7U/10V_6
PU6 AOZ5029QI-5
PC146
VCCGT
33U/25V_6x4.5
33U/25V_6x4.5
1
1
6
10u/25V_8
10u/25V_8
2200P/50V_6
0.1U/50V_6
23 VIN 22 + +
PC47
PC48
PC148
PC150
PC6229
PC138
24 PVCC VIN
VCC
Rail B Icc TDC PL2：35A
2
+VCCGT
4
GH 3
(36) PWM1_B
PR228 *short_4 1
PWM
BOOT PR223 *short_6 Icc Max：57A
PC142
PR229 *short_4 2 Rev:D change 0.1u/25V_6
(36) FCCM_B FCCM
to shortpad PL2 OCP：A
5 0.24UH_7X7X4
Rev:D change VSWH 13 PHASE_B1 1 2 DCR=1mOhm
to shortpad VSWH Fsw：MHz
PGND
PGND
19
330u/2V_7343
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
3
4
GL 20 PR57 +
PC159
PC170
PC172
PC163
GL 2.2/F_6
VCCGT L/L：
21
R_DC_LL：2mV/A
PC55
1000P/50V_4
R_AC_LL：2mV/A
(36) ISUMP_B PR20 3.65K/F_6
ISEN1_B PR19 100K/F_6

2/3 FAE suggestion
(36) ISUMN_B PR18 *100K/F_4

PR17 1/F_6 ISEN2_B (36)
B B
Rev:D change
to shortpad
VIN
PR54
+5V_S5 1 2
*short_6
4.7U/10V_6
PU7 AOZ5029QI-5
PC147
10u/25V_8
10u/25V_8
2200P/50V_6
0.1U/50V_6
6
PC49
PC50
PC152
PC153
23 VIN 22
24 PVCC VIN
VCC
+VCCGT
Rail B GH
4
3
PR233 *short_4 1 BOOT PR230 *short_6
(36) PWM2_B PWM PC143
FCCM_B PR234 *short_4 2 Rev:D change 0.1u/25V_6
FCCM PL3
to shortpad
5 0.24UH_7X7X4
Rev:D change
VSWH
VSWH
13 PHASE_B2 1 2 DCR=1mOhm
PGND
PGND
to shortpad 19
330u/2V_7343
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
3
GL 20 +
PC160
PC166
PC167
PC158
GL PR58
2.2/F_6
21
PC56
1000P/50V_4
ISUMP_B PR190 3.65K/F_6
ISEN2_B PR189 100K/F_6
A 2/3 FAE suggestion A
ISUMN_B PR188 *100K/F_4

PR182 1/F_6 ISEN1_B (36)
(5,36) +VCCCORE
(21,30,31,32,35,36,40,41,42) VIN
(5,36)
(28,31,36,41)
+VCCGT
+5V_S5
PROJECT : ZRW
sualaptop365.edu.vn
3A
VCORE/VCCGT (ISL95857HRTZ-T)
5 4 3 2 1
5 4 3 2 1
VCCSA
D
38 D
Rev:D change
to shortpad
PR56
1 2
+5V_S5
VIN
*short_6
4.7U/10V_6
PC151
PU9 AOZ5029QI-5
6
10u/25V_8
10u/25V_8
2200P/50V_6
0.1U/50V_6
VIN
PC54
PC53
PC157
PC156
23 22
24 PVCC VIN
VCC
Rail C 4
VCCSA
GH 3
C BOOT C
PR239 *short_4 1 PR232 *short_6 +VCCSA
(36) PWM_C PWM PC145 Icc TDC PL2：5A
PR240 *short_4 2 Rev:D change 0.1u/25V_6
(36) FCCM_C FCCM PL5
5
to shortpad
0.47uH_7X7x3 Icc Max：5A
Rev:D change VSWH
VSWH
13 PHASE_C 1 2 DCR=4.2mOhm
to shortpad
OCP：6A
PGND
PGND
19
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
3
4
GL
PC171
PC169
PC165
20
GL PR59
21 2.2/F_6 Fsw：800KHz
9
PC57 VCCSA L/L：

1000P/50V_4
B
R_DC_LL：10.3mV/A B
R_AC_LL：10.3mV/A
(36) ISUMP_C PR222 3.65K/F_6
(36) ISUMN_C
PR221 1/F_6
(5,36) +VCCSA
(21,30,31,32,35,36,40,41,42) VIN
A (28,31,36,41) +5V_S5
Quanta Computer Inc. A
PROJECT : ZRW
3A
VCCSA (ISL95857HRTZ-T)
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
39
D D
C C
B B
A A

PROJECT : ZRW
2A
+VCCGTX (ISL95853HRZ-T)
Date: Thursday, June 25, 2015 Sheet 39 of 48
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
40
Rev:D change +1.8V_S5
to shortpad 1.8Volt +/- 5% Rev:D change +1.5V
to shortpad 1.5Volt +/- 5%
D PR244 *short_4 TDC : 0.08A D
+3V_S5
PEAK : 0.06A +3V_S5 PR333 *short_4 TDC : 0.45A
PC173
Width : 20mil PC278
PEAK : 0.6A
4.7U/6.3V_6 Width : 20mil
4.7U/6.3V_6
+1.8V_S5
Rev:D change +1.5V
Rev:D change
4
to shortpad PU10
4
to shortpad PU19
VIN
(29) HWPG_1.8VS5 PL6
PR245 *short_4 5 3 APW8824_1.8V
VIN
PG LX (29) HWPG_1.5V PL16
2.2uH/1.85A_2.5X2X1.2 PR332 *short_4 5 3 8002LX1.05V
PG LX 2.2uH/1.85A_2.5X2X1.2
PR249 10K_4 1 2 PR246 *short_4

(29,31) S5_ON EN GND 1 2
PR326 10K_4 PR328 *short_4
(8,35) MAINON EN GND
PC184 PC183 PC175
FB
Rev:D change
0.1u/16V_4
10U/6.3V_6
PC174 PC259 PC261 PC265
*10U/6.3V_6
FB
to shortpad Rev:D change
10U/6.3V_6
0.1U/16V_4
0.47uF/4V_4
APW8824 PC271
*10U/6.3V_6
6
to shortpad
0.47uF/4V_4
R1 APW8824
6
PR247 R1
PR330
30K/F_4
22.6K/F_4
PR248
R2 15K/F_4 PR331
R2 15K/F_4
Vo=(0.6(R1+R2)/R2)
Vo=(0.6(R1+R2)/R2)
C C
Rev:C change to 220 ohm

PR153 Change to
220 ohm for bo bo
VIN sound issue.
VIN +3V +5V +VCCIO +15V
Thermal protection
PD4 PR151 PR137 PR153 PR138 PR148
DA2J10100L 1M_4 22_8 220_8 22_8 1M_4
Need fine tune
for thermal protect point MAINON_ON_G MAIND
MAIND (31,32)
Note placement position
3
3
TEMP=85C
PR152 PR150
1M_6 MAINON 2 PQ11 1M_4 2 2 2 2
1
DTC144EU PC103
PQ12 PQ4 PQ10 PQ5 PQ3 2200p/50V_4
AO3409 2N7002K 2N7002K 2N7002K 2N7002K
1
2 PR147 Rev:D Stuff
1
*100K/F_6
3
S5_ON 2
B B
PQ13 PR154 Rev:D change
1
DTC144EU *short_6 to shortpad
VL VL
SYS_SHDN# (2,31)
PR144 PC104 PR155

PR146 200K/F_4 0.1u/50V_6 200K_6
3
1.47K/F_4
8
PR262
10K/F_4_3435NTC 2.469V 3
+ 1 2
LM393_PIN2 2
- PQ14
3
PU4A 2N7002K
4
AS393MTR-E1 PC102
1
0.1u/50V_6
S5_ON 2
PR145
PQ9 200K/F_4
2N7002K
1
A 5 A
+ 7
6
-
PU4B
AS393MTR-E1

For EC control thermal protection (output 3.3V)
PROJECT : ZRW
sualaptop365.edu.vn
3A
+1.8V/+1.5V/Thermal Protect
5 4 3 2 1
5 4 3 2 1
+5V_S5
41
PR99 Rev:D change
*shortEV@0_6 to shortpad
VIN
D D
EV@10u/25V_8
EV@10u/25V_8
EV@2200p/50V_4
EV@0.1u/50V_6
EV@33U/25V_6x4.5
1
PR108
18 1658R-PVCC
PC67
PC73
PC69
PC68
PC210
PR269 EV@6.81K/F_4 PR274 EV@12.4K/F_4 EV@2.2/F_6 +
1
1658R-EN 1658R-VREF 1658R-BOOT1
PC79
2
EV@1U/10V_4
2
PC219 *EV@0.01U/50V_4 PC82
5
PR267 1 2 EV@0.22u/25V_6
EV@100K/F_4 PU3
PR273 1 1658R-BOOT1
PVCC
VIN 1658R-OCS/CB 9 BOOT1 1658R-UGATE1 4 PQ25
PR272 *EV@1/F_4 OCS/CB 2 1658R-UGATE1 EV@AON6414AL
PR111 *EV@0_4 *EV@499K/F_4 UGATE1
(4) VGPU_EN
1
2
3
20 1658R-PHASE1 PL7
PR343 *shortEV@0_4 1658R-EN 3 PHASE1 EV@0.24uH_7X7X3
(16,42) 3V_MAIN_PWGD EN 19
DCR=1.1m ohm
1658R-LGATE1 1658R-PHASE1 +VGPU_CORE
Rev:D change to shortpad LGATE1
DGPU_PSI PR116 *shortEV@0_4 1658R-PSI 4
(17) DGPU_PSI
5
PSI PR65
EV@UP1658RQKF EV@2.2/F_6
PWM-VID PR123 *shortEV@0_4 1658R-VID 5 15 1658R-BOOT2 +
EV@330u/2V_7343
(17) PWM-VID VID BOOT2 1658R-LGATE1 4
EV@0.1u/16V_4
EV@10u/6.3V_8
14
PC177
PC180
PC189
1658R-UGATE2
1 2 1658R-VREF 8 UGATE2
1
2
3
PC93 EV@1U/10V_4 VREF 16 1658R-PHASE2 PQ24 PC64
PHASE2 EV@AON6752 EV@1000p/50V_6
1658R-REFADJ 6 17 1658R-LGATE2 PR266 EV@10K_4
REFADJ LGATE2 1 2 +3V
7
C
+3V_S5 +3VPCU R1 PR127 REFIN 13 1658R-PG PR110 *shortEV@0_4
C
PR126 EV@20K/F_4
R2 PGOOD GPU_PWR_GD (15)
1658R-REFIN
*E@0.01U/50V_4
PC92
EV@20K/F_4 12 1658R-COMP Rev:D change to
COMP
EV@4700P/25V_4
shortpad
GND
PR124 PR125 10
FB
1
FBRTN VIN
PC89
*EV@10K_4 *EV@10K_4
1
PR107
11
21
DGPU_PSI PR131 EV@2.2/F_6
EV@22P/50V_4
C R3
2
1658R-FBRTN
PC96 EV@2K/F_4 1658R-BOOT2
2
PC214
EV@2700P/50V_4
EV@10u/25V_8
EV@10u/25V_8
EV@2200p/50V_4
EV@16K/F_6
EV@0.1u/50V_6
1658R-FB
PR122
PC208
PC72
PC207
PC205
PR120 PC81
5
*EV@0_4 EV@0.22u/25V_6
1658R-UGATE2 4
PR132
EV@18.2K/F_4
R4
1
2
3
Phase Number of Operation PQ29 PL8
*EV@22P/50V_4
1
EV@AON6414AL EV@0.24uH_7X7X3 DCR=1.1m ohm
*shortEV@0_4
*shortEV@0_4
PC94
PR129
PR128
PR130 1658R-PHASE2 +VGPU_CORE
*EV@5.1K/F_4
2
5
PR134 PR67
PWM-SVID : Config B *shortEV@0_4
R5 +
EV@330u/2.5V_6X4.2
EV@2.2/F_6 +
Rev:D change to
EV@330u/2V_7343
Check PWM-SVID by SKU
3
Rev:D change to 1658R-LGATE2 4
EV@0.1u/16V_4
EV@10u/6.3V_8
shortpad
PC60
PC178
PC181
PC185
shortpad
1
2
3
B B
2 PQ27 PC66
PQ2 EV@AON6752 EV@1000p/50V_6
*EV@2N7002K
1
Standby PC95
1
Function *EV@1U/10V_4
2
+VGPU_CORE
Rev:D change to PR64 N16S-GT(23W)

*EV@100_4
shortpad
PR61 *shortEV@0_4 +VGPU_CORE
(14) VGA_VCCSENSE Countinue current:26A
(14) VGA_VSSSENSE Peak current:51A
PR62 *shortEV@0_4
OCP:A
PR63
*EV@100_4
FSW:300KHz
L/L=0mV/A
A
Parallel A

PROJECT : ZRW
3A
+VGPU_CORE(UP1642PQAG)
5 4 3 2 1
sualaptop365.edu.vn
5 4 3 2 1
(14,15,16) +1.05V_GFX
42
(14,16,17,29) +3V_GFX
+1.05V_GFX
TDC : 1.57A
PEAK : 2.09A
D
Width : 80mil D
+3V
PR304
*EV@100K/F_4 PC241 PR306
PR302 +1.05V_GFX
TP76 *EV@0_4 *EV@2200P/50V_4 *EV@2.2_6
HWPG_1.05VGFX 554PG_0.95V PU16 Rev:D change
PL14 to shortpad
4 1 554LX_0.95V
PG NC EV@1uH_7X7X3 554FB_0.95V_S
EV@0.1U/16V_4
EV@22U/6.3V_6
9 2 PR311
+3VPCU PVIN LX
PC233
PC232
PC244 *shortEV@0_4
10 3 *EV@22P/50V_4 PR310
PVIN LX EV@7.5K/F_4
7 554NC_0.95V PC247
R1
NC *EV@68P/50V_4
PR312
554SVIN_0.95V 8 6 554FB_0.95V
EV@10_6 SVIN FB
EV@10U/6.3V_6
EV@0.01U/50V_4
11 5 554EN_0.95V
EV@1U/6.3V_4
GND EN
PC246
PC249
PR307 PR309
R2 Vo=0.6*(R1+R2)/R2
PC252
*shortEV@0_4 EV@10K/F_4
EV@RT8068AZQW PC240
*EV@0.1u/16V_4
Rev:D change
to shortpad
3V_MAIN_PWGD
3V_MAIN_PWGD (16,41)
check ok 10/21
C C
VIN +3V_GFX +15V +3VPCU
PR159 PR164 PR161
3
EV@1M_4 EV@22_8 EV@1M_4
Rev:D change DGPU_D 2

check ok 10/21 to shortpad
3
3
3
PR160 PQ19
*shortEV@0_4 PR157 EV@AO3404
+3V_GFX
1
2 EV@1M_4 2 2 +3V_GFX
(4) DGPU_PWR_EN PC113 TDC : 0.05A
1
PQ17 PQ16 *EV@2.2n/50V_4

PQ15 EV@2N7002K EV@2N7002K PEAK : 0.06A
1
PC109 PR158 EV@PDTC143TT

Width : 20mil
1
*EV@1u/10V_4 EV@100K_4
2
Note: HWPG_1.5VGFX need PU 100k to MPS NB671 pin11

VIN
B B
+1.5V_GFX_VCC
EV@10u/25V_8
EV@10u/25V_8
EV@2200p/50V_6
EV@0.1u/50V_6
EV@0.1u/50V_6
PC200
PC204
PC211
PC209
PR75 PR250 PC206

PR255 *EV@499K/F_4 EV@1/F_6
EV@100K/F_4 1.5VGFX_BST 1.5VGFX_BST1
10
(16) HWPG_1.5VGFX
1
PC191 +1.5V_GFX
EV@0.1u/50V_6 PL9
VIN
BST
EV@3.3uH_7X7X3
1.5VGFX_EN 13 8 1.5VGFX_SW
EN SW1
EV@0.1u/50V_6
EV@22u/6.3V_8
EV@22u/6.3V_8
EV@22u/6.3V_8
EV@22u/6.3V_8
PR346
EV@200K/F_4 1.5VGFX_PG 4 9
PR252 *shortEV@0_4 PG SW2
3 15
LP# PU11 SW3 PR68 +1.5V_GFX
Rev:D change
to shortpad
5
NC1
EV@NB671GQ-Z
SW4
16 *4.7_6 1.5 Volt +/- 5%
6
NC2 VOUT
7 TDC : 4.62A
PR260
FBVDDQ_EN
*shortEV@0_4
(15) FBVDDQ_EN PR73 *shortEV@0_4 14 2 PEAK : 6.16A

AGND PGND
Width : 200mil
PC176
PC187
PC186
PC179
PC182
PC65
VCC
PC193 *680p/50V_6
FB
EV@0.1u/16V_4
11
12
PC199 Rev:D change

*EV@0.1U/16V_4 to shortpad
Rev:D change
to shortpad
+1.5V_GFX_VCC PC195 1.5VGFX_FB
PR69 EV@1u/6.3V_4
*shortEV@0_6 PR259
A
VREF=0.604V EV@82K/F_4
A
PR256
EV@54.9K/F_4

PROJECT : ZRW
Date:
Document Number
+1.5V_GFX/+1.05V_GFX/+3V_GFX
Rev
3A
5 4 3 2 1
1 2 3 4 5 6 7 8
VGA power up sequence

43
+3VPCU
SKYLAKE
PCH +3V_MAIN
MOSFET +3V_GFX
DGPU_PWR_EN
GPP_B17 MOSFET
A A
3V_MAIN_EN (GPU GPIO5)
3V_MAIN_PWGD
PG All 3.3V
t>0
NVVDD
PXE_VDD
+1.05V
+1.05V_S5 t>0
FBVDDQ
MOSFET +1.05V_GFX N15x Power on sequance

3V_MAIN_PWGD Notes: -All 3.3V includes all rails powered at 3.3V
-PEX_VDD 1.05V inculdes all rails that are shared
PWM-VID (GPU GPIO11)
VIN
B
+VGPU_CORE B
3V_MAIN_PWGD VIN +1.5V_GFX

PWM
PWM
VGPU_PWRGD
OR FBVDDQ_EN HWPG_1.5VGFX
Gate DGPU_PWROK
VGPU_PWRGD
EC_FB_CLAMP(EC)
GC6_FB_EN (GPU GPIO0 )
C C
GPP_B19
VGA Reset
PLTRST#
PEGX_RST#
PCH DGPU_HOLD_RST#
PEX_RST timing
D D
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS Quanta Computer Inc.

PROJECT : ZRW
3A
GPU PWR CRL
1 2 3 4 5 6 7 8
sualaptop365.edu.vn
5 4 3 2 1
Battery Mode
Non Deep Sx
3
+3VPCU
VIN 1
+5VPCU
VL
3
1
VIN BAT-V
44
5V_LDO 3V/5V 2
11 2 VR
3 +5VPCU +5V_S5
+15V
CHARGER Battery
EN2
EN1
D
+3VPCU S5 PWR +3V_S5 10 4 D
3
3
S5_ON 8 NBSWON# +3VPCU or +3V_S5
1 VIN Delay DSW power well 10ms DSW PWR

+1V_S5
PWR 6 DPWROK DPWROK
VCCPRIM PWR
DDR VDDQ +1.35VSUS 18 BTN 13 RSMRST# +1V_S5
RSMRST#
VR 7 14 ACPRESENT VCCMPHY PWR
+VDDQ 19 EC ACPRESENT +1.8V_S5
30 DNBSWON#
15 PWRBTN#
HWPG SUSC# 16 SPI PWR
+VDDQ_VTT 23 SLP_S4# V1_MPHY
SUSB# 20 SLP_S3#
HSIO PWR
PCH_SUSACK# SUSACK V1_MPHY
HWPG_VDDR 24
PG PCH_SUSPWARN# SUSWRAN
PLL PWR
S5
S3
PCH_SLP_SUS# SLP_SUS# +1V_S5
31a
VCCST_PWRGD PCH
DDR_VTTT_PG_CTRL VCCST_PWRGD CORE PWR
C
21 31b PCH_PWROK
+1V_S5 C
MAINON
22 31C EC_PWROK PCH_PWROK VCCSRAM PWR
PCH_CLK +1.5V
35
SUSON PLTRST# HDA PWR
VRON
SUSON
S5_ON
MAINON
EC_PWROK
+1V_S5_ON
PLTRST#
17 38 VCCPGPPA PWR +3V_S5
+3VPCU 24 HWPG_VDDR IMVP_PWRGD VCCPGPPB PWR
3 36 SYS_PWROK VCCPGPPC PWR
SYS_PWROK VCCPGPPD PWR
26 HWPG_1V_S5 EC_PWROK VCCPGPPE PWR
+1.5V 12 31C
VCCPGPPG PWR
VCCPGPPF PWR
1.5V +1.8V_S5
HWPG_1.5V 31C 32b 21 17 9 8
VR
PLTRST#
29 29 38
HWPG_1.5V
PG
EN
+VCCIN
MAINON CORE PWR

21 +1.35VSUS
RESET#
CPU
VDDQ PWR
+1V_VCCST
RUN PWR +1VSUS
+1V_VCCST PROCPWRGD
B
3 +5VPCU +5V 28 VCCST PWR B
MOS1
SM_PG_CNTL1
VCCST_PWRGD
0 ohm
3 +3VPCU +3V 27
VR_READY
MOS2
VR_EN
EC_PWROK 10K ohm
SVID
9 +1V_S5 +VCCIO 31C
MOS3 29
G
HWPG_1VS5
1 VIN 12
MAINON 33
VRON
DDR_PG_CTRL
21 +VCC_CORE
IMVP_PWRGD
VCCST_PWRGD_EN
SVID
PCH_PWROK VCCST_PWRGD_EN
IMVP +VCCSA 33 31b
VIN
1 9 VR +VCCGT
33 SYS_PWROK
+1V_S5 36
+1V_S5
VR 34 HWPG+1ms
12 IMVP_PWRGD 37 22 34 32a
HWPG_1VS5 PG
EN
PG
EN
A A
8 SVID VRON 32a

+1V_S5
37
CPU Quanta Computer Inc.

PROJECT : ZRW
sualaptop365.edu.vn
3A
Power Sequence
5 4 3 2 1
5 4 3 2 1
Skylake U Non-Deep Sx Platform

45 43
Power on sequence
D D
C C
B B
A A

PROJECT : ZRW
sualaptop365.edu.vn
3A
Power on Sequence
5 4 3 2 1
5 4 3 2 1
實實實defult
虛實實reserve
SYS_HWPG S5D
MDV1528Q +5V_S5
PWRGD
VGPU_PWRGD
46
VIN Vin
VGPU Core Vout
+VGPU_CORE
up1658
5V_LDO PWRGD
+5VPCU MDV1528Q +5V EN
D
PWR EN1 5V S5_Vout
D
3V_MAIN_PWGD
TPS51225
MAIND
3V_LDO 3V
EN1
HWPG_1.5VGFX
Vin S3_Vout +3VPCU AO3404 +3V_S5
VIN PWRGD
S5D
VIN Vin
+1.5V_GFX Vout
NB671GQ-Z
+1.5V_GFX
EN
MDV1528Q +3V FBVDDQ_EN
MAIND
IMVP_PWRGD
RT8068AZQW +1.05V_GFX
PWRGD
VIN Vin
C C
3V_MAIN_PWGD
VIN Vin
+VCC_CORE Vout
ISL95857HRTZ-T AOZ5029QI
+VCCCORE
AO3404 +3V_GFX EN
VRON
dGPU_PWR_EN
SVID PWM_A
PCH FCCM_A
HWPG_1VS5
IMVP_PWRGD
MDV1528Q +VCCIO
PWRGD VIN
PWRGD Vin
VIN +1.0V_S5 MAIND
Vin Vout +1V_S5 VIN +VCCSA
RT8237CZQW Vin Vout +VCCSA
EN
EN
+1V_S5_ON AO3404 +1V_SUS VRON
EC
SUSON SVID PWM_C
B B
FCCM_C
0 ohm
EC IMVP_PWRGD
TPS22965DSGR V1_MPHY
PWRGD
VIN Vin
MPHY_EXT_PWR
PCH VIN Vin
+VCCGT Vout
+VCCGT
EN
HWPG_VDDR VRON
SVID PWM1_B
FCCM_B
SUSON PWRGD
EC S5 EN
+1.35VSUS
S5_Vout HWPG_1.5V
+1.35VSUS +VDDQ_VTT
G5316RZ1D HWPG_1.8VS5
MAINON PWRGD
EC
S3 EN +3V_S5 +1.5V
A A
Vin S3_Vout +VDDQ Vin Vout +1.5V
DDR_VTTT_PG_CTRL PWRGD APW8824
+3V_S5 +1.8V_S5 EN
PCH Vin Vout +1.8V_S5
APW8824 MAINON
EN
VIN S5_ON
PROJECT : ZRW
3A
SKL PCH PWR CONTROL
5 4 3 2 1
sualaptop365.edu.vn
1 2 3 4 5 6 7 8
+3V_S5 +3V 47
SDRAM
2.2K 2.2K 2.2K 2.2K
+3V
R7 SMB_PCH_CLK CLK_SCLK
A 2N7002DW A
R8 SMB_PCH_DAT Level shift CLK_SDATA G-Sensor
XDP
Skylake U
+3V_S5
2.2K 2.2K
B B
R9 VGA_MBCLK
W2 VGA_MBDATA
+3V_S5
*2.2K *2.2K
+3V_S5
W3 SMB_ME1_CLK
*2N7002DW
V3 SMB_ME1_DAT Level shift
+3V_S5 +3V_GFX
C 0 0 C
2.2K 2.2K 2.2K 2.2K
+3V_MAIN
115 2ND_MBCLK
2N7002DW GFX_SCL
Level shift VGA
116 2ND_MBDATA GFX_SDA
EC
+3VPCU
IT8987CX
D D
4.7K 4.7K
110 MBCLK
111 MBDATA CHARGER

PROJECT : ZRW
sualaptop365.edu.vn
3A
SMBUS Block Diagram
1 2 3 4 5 6 7 8
5 4 3 2 1
Model Date CHANGE LIST

ZRW REV:A 1/20 1. FIRST RELEASED
2/4 1. PU3#3 enable pin from VGPU_EN change to 3V_MAIN_PWGD control , add PR343 0ohm. (page 41)
2. U35#U11 #U12 connect to +1.8V_S5 for support Cannonlake-U PCH. (page 10)
3. U46#3 from net USB_OC1# change connect to USB_OC2# PCH. (page 28)
4. Add R776 33 0hm and C805 180 pf in NBSWON#. (page 27)
5. Change LAN WAKE# pin from CPU LAN_WAKE# to WAKE#(ball BB15) to support CPPM(PCIE LTR&OBFF&L1 off) (page 08)
D ZRW REV:B 6. add PR344 between PU14#12 & JP13. for GT3 CPU (page 33) D
7. add PR345 between PU13#12 & JP12 for GT3 CPU (page 34)
1. net ACCEL_INTA from U35#AD1 change to U35#AB1 [ UART0_RX ]
2/12 net TP_INT_PCH from U35#AD2 change to U35#AB3 [ UART0_CTS# ] (page 04)
2. CN3 all pin from UART1 change connect to UART2 (page 04)
3. R587 from 0 ohm change to 1k pull down for USB2_ID (page 06)
4. add C806 for EMI request R748 0 ohm no stuff from EC site move at CPU site (page 07)
5. R293 stuff 4.7k , R294 from 4.99k change to 5.49k (page22)
6. XDP_TCK0,XDP_TCK1,XDP_TMS,XDP_TDI don't need pull up or pull down NO Stuff R515 , R558, R514, R537. (page 02)
2/12 1. p.40 PR153 from 22 ohm change to 220 ohm for S3/S4/S5 bo bo sound issue.
3/4 1. p.15 & p.16 L1 & L2 footprint from 0603 change to 0402
2. p.6 Delete UART1 4 pcs TP
3. p.25 EMI request add C807 33p for CLKRUN#
4. p.31 +3vpcu & +5vpcu from MPS NB679 change to TPS51225
5. p.24 R420 & R422 vendor suggest from 56 ohm change to 62 ohm [ CS06202JB15 ]
1. p.2 Stuff 10k ohm_4 of R780 & R781. [ KBSMI# & EC_SCI# ] Pull up to +3V.
ZRW REV:C1
4/30 2. P.29 U45 EC pin 70 connect to p.30 PU5#8 IDCHG net
3. P.29 U45 EC pin 95 connect to net IOAC_LANPWR#
C
4. P.06 Add PQ6059 & PQ6060 for EC_RTCRST control reset RTC SRTC_RST# & RTC_RST# C
1. p.09 removed MPHY_EXT_PWR control power function. [ Removed U11, R195, R197,C208,C253 ]
5/7 2. p.07 R576 & R572 from value 4.7k change to 2.2k
1. p.36 & p37 change new PU6,PU7,PU8,PU9 footprint AOZ5029QI-5 & partnumber AL005029001
ZRW REV:C2 5/8
2. p.28 Delete L8,L9,L10,L14,L15,17 EMI Choke footprint
5/25 1. p.09 R762 [LPM_ZVM_N] & R763 [ MSM# ] No Stuff for GT3
2. p.09 add R789 0 ohm for VCCHDA
p.24 R365 stuff 0 ohm connect to +3V , R363 0 ohm no stuff connect to +1.5v
3. p.34 delete +VCCEOPIO circuit
4. p.05 delete R141 , R133 , R547 for SVID data,Alert#,clk
5. p.39 delete VCCGTX circuit
6. p.37 delete PR77 & PR88 for VCCGT connect to VCCGTX
5/28 1. p.03 Delete R656 & R189. DDR0_ALERT# & DDR1_ALERT# connect to GND
2. p.09 Delete R763 0 ohm for net MSM#.
1. p.05 Add C814 1000p/50v_4 connect +1V_VCCST and near R138 SVID.
ZRW REV:C3 6/18 2. p.36 Add PC6228 1000p/50v_4 connect +1V_VCCST and near RR341 SVID.
3. p.02 Add R795 , R796 , R797 0ohm for DCI USB 3.0 test fixture
4. p.11 delete XDP function connector U27 , U30 , CN1
5. p.09 Remove short Jumper for all +1V_S5.
B
1. R163 , R159 ,R581, R146 ,R149 , R157 , R173 , R151 , R170 , R136 B
2. R545 , R144 , R150 , R147 , R551 , R557, R584 [ VCCCLK1~6 ]

3. R168 [ +1_S5 -> V1_MPHY ]
6. p.36 remove PR37 Shortpad for SVID_ALERT#
7. p.07 Delete Q33 , R579 ,R583 for SMBus(EC)
1. p.02 Delete TP82 and Net [ SKTOCC# ]

6/23 2. p.05 reserve 5 pcs 1000 pF capacitor in +1V_VCCST [ C815,C816,C817,C818,C819 ] , no stuff by default
3. p.09 Reserve test point TP95 for CPU AK13 ball
4. p.32 add PC6230 22u/6.3v_6 in connect to PQ23.1 [+1V_SUS]
A A

PROJECT MODEL : ZWA APPROVED BY: DATE:
PROJECT : ZRW DOC NO.
sualaptop365.edu.vn
3A
Change list PART NUMBER: DRAWING BY: REVISON:
5 4 3 2 1

Acer Aspire E5 574 E5 574G E5 574T

Transféré par

Informations du document

Titre original

Copyright

Formats disponibles

Partager ce document

Partager ou intégrer le document

Options de partage

Avez-vous trouvé ce document utile ?

Ce contenu est-il inapproprié ?

Droits d'auteur :

Formats disponibles

Acer Aspire E5 574 E5 574G E5 574T

Transféré par

Droits d'auteur :

Formats disponibles

5 4 3 2 1

USB2 IO*1 I/O Board Conn. PCIE-5

TPS51225 MDV1528Q UP1658RQKF

RT8237CZQW ISL95859HRTZ-T RT8068AZQW

Quanta Computer Inc.

Date: Monday, July 20, 2015 Sheet 1 of 48

Skylake ULT (DISPLAY,eDP) 02

+1V_VCCST 100k pull-down on PCH side

1K_4 R529 CPU_THRMTRIP# H_PECI (50ohm)

XDP_TRST# R535 *51_4

CPU thermal trip

U33 +1V_VCCST +3V FDV301N

Quanta Computer Inc.

Change Data and DQS to interleave.

REV:E connect to GND

SM_RCOMP_0 120/F_4 R685

CPU_DRAMRST# R670 *short_4 DDR3_DRAMRST# (12,13)

H_PWRGOOD (50ohm) AN8 +3V_S5

+3V R667 33_4 HDA_SYNC_R BA22

Skylake-U Strapping Table SKL_ULT/BGA

SPI0_MOSI Reserved RSMRST# (iPU 15 ~ 40K)

SPI0_MISO Reserved RSMRST# (iPU 15 ~ 40K)

SPI0_IO2 Reserved RSMRST# (iPU 15 ~ 40K)

A SPI0_IO3 Reserved RSMRST# (iPU 15 ~ 40K) A

0 = *Enable security in the Flash

GPP_E19 0 = *Port B is not detected (iPD 20K)

Backside cap (33) +VCCOPC_SRC R634

+VCCEOPIO Backside cap +VCCOPC_SRC

A66 VCCGT 0.55~1.5V VCCGT R66

+1.8V_S5 GT3@0_6 +1.8V_PRIM +VCCGT

Primary side cap

Rev:F change to Shortpad C172

Primary side cap 1U/6.3V_4

Quanta Computer Inc.

Skylake ULT (GPU, SATA , ODD, CLK ,USB2&3)

(26) CLK_PCIE_WLANN CLKOUT_PCIE_N5 VCCRTC_2

CLK_PCIE_REQ1# R215 10K_4

100K_4 Rev:E Reserve only Rev:E Reserve only

SMBUS, SMLINK Strapping

PCH_SPI_CS1# AU2 SPI0_CS0# +3V_S5 GPP_C4/SML0DATA W1 SML0ALERT#

3 6 SPI_CLK_8M R684 8M4M@15_4 PCH_SPI_CLK S5 5 S0

+3V_PCH_ME R649 1K_4 SPI_WP_IO2_ME PCH_XDP_WLAN/S5 2N7002DW DDR_TP/S0

1A-3 2013/10/16 Add U34 flash 4M ROM reserve for ZQ0D.

Quanta Computer Inc.

SYSTEM POWER MANAGEMENT

A36 C37 +3V_S5

BOARD_ID2 No G-sensor G-sensor BOARD_ID7 Reserved Reserve

BOARD_ID4 No touch panel touch panel

Rev:D change to shortpad

EC_PWROK R131 *0_4 SYS_PWROK_R

For platforms not supporting Deep B2A

VCCST_PWRGD VCCST_PWRGD_R 4 3 U47

VCCST_PWRGD_EN R102 0_4 HWPG HWPG (29)

TC7SH08FU R214 *TC7SH08FU R130

Rev:D change to shortpad Quanta Computer Inc.

Pin Name Strap description Configuration Note

CFG[1] Reserved Configuration lane

1 = *Normal Operation(iPU 3K)

CFG[3] Reserved Configuration lane

1 = Disabled (iPU 3K) CFG4

00 = 1x8, 2x4 PCI Express*

11 = 1x16 PCI Express*

Skylake ULT (GND) 10

APS1 R289 0_6 APS3 R272 0_6 APS7

R312 120/F_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4

4.7K_4 4.7K_4 *4.7K_4

IOAC@0.1U/16V_4 IOAC@100K/J_4 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4