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8051 microcontroller is based on the Harvard architecture, that means it has separate program
and separate data memory. Program memory is the ROM in original 8051, and EPROM or flash
in higher versions of 8051. Program memory space in 8051 is a total of 64KB ROM space which
include internal 4KB ROM and external 60KB. The data memory space of 8051 is 128 Byte
RAM and 128 Byte SFR area. The Memory Classes of 8051 include program memory
(internal and external) and data memory (internal and external) and a complete explanation
is given below:
1. Program Memory:
It has an internal program of 4K size and if needed an external memory can be added (by
interfacing ) of size 60K maximum. So in total 64K size memory is available for 8051 micro
controller. By default, the External Access (EA) pin should be connected Vcc so that
instructions are fetched from internal memory initially. When the limit of internal memory (4K)
is crossed, control will automatically move to external memory to fetch remaining instructions. If
the programmer wants to fetch instruction from external memory only (bypassing the internal
memory), then he must connect External Access (EA) pin to ground (GND).
The 8051 has 128 bytes of on-chip RAM with addresses 00 – 7FH. They are used for (a) register
banks (addresses 00 – 1FH), (b) bit-addressable RAM space (addresses 20 – 2FH), and (c) the
scratch pad (addresses 30 – 7FH).
Another 128 bytes of on-chip RAM with addresses 80 – FFH are designated as Special Function
Registers (SFRs). Again, the SFRs are accessed by direct addressing mode as we saw earlier in
this chapter.
In addition to the above two features, the 8052 has another 128 bytes of on-chip RAM with
addresses 80 – FFH. This extra 128 bytes of on-chip RAM is often called upper memory to
distinguish it from the lower 128 bytes of 00 – 7FH. The only problem is, the address space 80 –
FFH is the same address space assigned to the SFRs. In other words, they are physically two
separate memories, but they have the same addresses. This parallel address space in the 8052
forces us to use two different addressing modes to access them as described next.
In both (8051 and 8052) the SFR is accessed using direct addressing whereas the upper 128 Byte
of memory is accessed using indirect addressing. The following example shows it how to use
this area:
MOV 90H, #55H ; accessing the SFR location i.e. port P1
MOV PI, #55H ; same as above
MOV @RO , A ; Access upper location (above 7F) pointed by R0 or R1
MOV @R1, A
Internal Data Memory organization: in the classic 8051, this is the on-chip RAM space with a
maximum of 256 Bytes containing register banks, BIT space, direct addressable DATA space,
and indirect addressable IDATA space. This region should be used for frequently used variables.
Figure 3.2: Internal RAM of 8051/8052 microcontroller
Special Function Registers
SFRs are accessed as if they were normal Internal RAM. The only difference is that Internal
RAM is from address 00h through 7Fh whereas SFR registers exist in the address range of 80h
through FFh. It is to be noted that in the original 8051 only 21 locations are occupied and are
usable by the programmer, read accesses to other than these addresses will in general return
random data, and write accesses will have an indeterminate effect. The figure below shows the
SFR of 8051/8052 microcontroller.
Figure 3.3: Special Function Register (SFR) of 8051/8052
External Data Memory: in classic 8051 devices, this area, called XDATA, is off-chip RAM
with a space of up to 64KB.