`timescale 1ns / 1ps

//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 16:44:54 11/17/2018
// Design Name:
// Module Name: matrix_mul
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module matrix_mul(
input clk,rst,
input [3:0] b,
output reg[3:0] y
);
parameter row=2;
parameter column=2;
reg [7:0]m[0:row][0:column];
reg [7:0]n[0:row][0:column];
reg [15:0]o[0:row][0:column];
reg [31:0]r,s,k;
integer i,q,j,count;
always@(posedge clk)
begin
if(rst==1)
begin

i<=0;
j<=0;
r<=0;
y<=15'd0;
s<=0;
q<=0;
k<=0;
count<=0;
end
else
begin
if(q<=2&&r==0)
begin
q<=q+1;

if(q==2&&r==0)
begin
q<=0;
if(j<=2&&r==0)
begin
j<=j+1;
m[i][j]<=b;
 n[i][j]<=b;

if(j==2&&r==0)
begin
j<=0;
if(i<=2&&r==0)
begin
i<=i+1;
if(i==2&&r==0)
begin
i<=3;
j<=3;
q<=3;
r<=r+1;
end
end

end
end
end
end
else
begin
if(r==1)
begin
q<=0;
i<=0;
j<=0;
r<=r+1;
end

if(q<=2&&r==2)
begin
q<=q+1;
s<=s+(m[i][q]*n[q][j]);
count<=count+1;
if(q==2)
begin
q<=0;

if(j<=2&&r==2)

begin
j<=j+1;
if(j==2)
begin
j<=0;

if(i<=2&&r==2)
begin
i<=i+1;
if(i==2)
begin
i<=3;
j<=3;
q<=3;

end
end
 end
end
end
end

end
end
end
endmodule