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Introduction to
Push-Pull and Cascaded
Power Converter
Topologies
Bob Bell
Principal Applications Engineer
Good Morning !
Welcome to National Semiconductor’s continuing series of ON-Line
Seminars
Today our topic is an introduction to a family of DC-DC power
converters referred to as “Cascaded”
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Outline:
Buck Regulator Family Lines
Push-Pull Topology Introduction
Push-Pull Controller
Cascaded Push-Pull Topologies
Cascaded Controller
Cascaded Half-Bridge Topology Introduction
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L
Vin
Vi n
Np Ns Vo Np Ns Vo
Na ux
Forward Converter Flyback Converter
Shown on this chart is the power stage arrangements for some of the
most popular power converter topologies which use a single primary
switching element. The Buck and Boost are the simplest and apply to
non-isolated power converters.
The Forwards and Flyback topology are used in isolated converters
where it is desirable to electrically isolate the Primary and Secondary
grounds.
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Vin
L
Ns Vo
Np
Ns
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IL
D*Ts
Ts
Q1
I(Q1)
L1 VOUT
D1
C1
I(D1)
VOUT = D * VIN
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Buck Converter
Characteristics
• Non-Isolated Grounds
• Voltage Step-down Only
• Single Output Only
• Very High Efficiency
• Low Output Ripple Current
• High Input Ripple Current
• High Side (Isolated) Gate Drive Required
• Large Achievable Duty Cycle Range
• Wide Regulation Range (due to above)
{Read Chart}
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Forward Converter
D1 L1
+
Vout
+
Np Nr Ns D2 C1 R
Vin
-
D3
Vout = Vin x D x Ns
Q1 I(L1) Np
1 2 3 4
Same transfer function as a
I(D1) =
Buck converter with an
I(Q1) x Np/Ns added turns ratio term
1 2 3 4
I(D2)
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Forward Diode D1
Current
Freewheel
Diode D2
Current
Vin =48V
Vout =3.3V
Iout = 5A
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This slide shows each of the rectifier diode currents which sum together
to form the inductor current.
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Forward Converter
Characteristics
• A Forward Converter is a Buck type converter
with an added isolation transformer
• Grounds are isolated
• Voltage Step-down or Step-up
• Multiple Outputs Possible
• Low Output Ripple Current
• High Input Ripple Current
• Simple Gate Drive
• Limited Achievable Duty Cycle Range
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{Read Chart}
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Push-Pull Topology
D1 L
+
Vout
+
np ns C R
np ns
Vin
Vg D2
Q2 Q1
PUSH PULL
Q1 Vout = Vin x D x Ns x 2
Q2 Np
D
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Vin = 48V
Output Vout =3.3V
Inductor
Iout = 5A
Current I(L1)
Push Primary
Switch V DS(Q1)
Pull Primary
Switch V DS(Q2)
12
Shown here are oscilloscope waveforms for the Drain voltages of the
two primary switches and the output inductor current.
When a given primary is active the Drain voltage is zero and the
alternate switches Drain is 2X the input voltage. This is due to the
transformer voltage bring “reflected” from the active primary to in-active
primary.
When neither switch is active then both Drain voltages are at the input
voltage.
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Vin = 48V
Vout =3.3V
Output Diode
Iout = 5A
Current I(D1)
Output Diode
Current I(D2)
13
Shown here is the current for each of the two output diodes.
These two current sum to form the output inductor current shown on the
previous slide.
Note that as discussed previously when neither of the primary switches
are active, the output inductor current has a negative slope and flows
half in each of the two secondary diodes.
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BSAT
BSAT
Operation in Operation in
Quadrant 1 only Quadrants 1 & 3
BR
MAGNETIC FIELD
MAGNETIC FIELD INTENSITY
INTENSITY H (OERSTED)
H (OERSTED)
Shown here are the transformer BH curves for the Forward and the
Push-Pull topology.
The “X” axis represents Magnetic Field Intensity which is proportional to
the Ampere*Turns.
The “Y axis represents Flux Density which is proportional to the Core
area and the Volt * Seconds for the winding that is active.
The slope is proportional to the primary magnetizing inductance.
The Forward converter operates in a single quadrant of the BH curve,
moving up the curve when the switch is active and resetting during the
OFF time.
The Push-Pull converter operates in two quadrants of the BH curve,
see-sawing back and forth as the each primary is activated.
This important fact allows the maximum power capability of a Pus h-Pull
transformer to be twice that of a Forward transformer.
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Push-Pull Characteristics
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{Read Chart}
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Features CLK
regulator OUT1
J
• CM control, internal slope 45uA K
comp. S Vcc
• Set frequency with single 5V
0 SLOPECOMP
RAMP R
resistor COMP GENERATOR
OUT2
– 100k – 600kHz 1.25V
5K
PWM
100K
• Synchronizable Oscillator VFB RTN
1.4V
• Error amp 50K
LOGIC
• Programmable soft-start
• Dual mode over -current CS
2K
protection 0.5V
• Direct opto-coupler interface
• Integrated 1.5A gate drivers 0.625V
• Fixed output driver deadtime CLK
• Thermal shutdown
SS 10uA
Packages: MSOP10, SS / SD
LLP10 (4mm x 4mm)
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0.45V SHUTDOWN
COMPARATOR
© 2003 National Semiconductor Corporation
<Read Features>
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Performance:
Input Range: 36 to 75V
Output Voltage: 3.3V
Output Current: 0 to 10A
Board Size: 2.3 x 2.3 x 0.45
Load Regulation: 1%
Line Regulation: 0.1%
Current Limit
<Read Performance>
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Output:
3.3V @ 10A
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Performance:
Input Range: 36 to 75V
Output Voltage: 27V
Output Current: 0 to 30A
Board Size: 6 x 4 x 2
Load Regulation: 1%
Line Regulation: 0.1%
Line UVLO, Current Limit
Output OV Protection
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<Read Performance>
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The schematic although more complicated then the 33W design, all of
the same basic blocks exist.
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BUCK
PUSH
CONTROL
CONTROLLER OSCILLATOR
FEEDBACK PULL
Buck Control Output is Push-Pull Outputs operate Buck Stage: Vpp = Vin * D
pulse-width modulated to continuously, alternating at Push-Pull Stage: Vout = Vpp / N
regulate Vout 50% duty cycle Overall: Vout = Vin x D/N
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The Push-Pull stage is said to be “Voltage Fed” since the Vpp node
contains the output capacitor from the Buck Stage.
The Push-Pull switches actually operate slightly less than 50% duty
cycle such that there is no overlap during the switching transitions.
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Cascaded Voltage-Fed
Converter Benefits
• A Voltage -Fed Push-Pull Converter is a Buck
type converter consisting of a Buck Regulation
stage followed by (cascaded by) a Push-Pull
Isolation Stage
• The Push-Pull Stage FET voltage stresses are
reduced to Vout x N x 2 over all line conditions
• The output rectification can be easily optimized
due to reduced and fixed voltage stresses
• The output rectification is further optimized
since the power is equally shared between the
rectifiers over all load and line conditions
• Favorable topology for wide input ranges
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Vcc
Vcc HB
HI HO
Vin HD
HS BUCK OUT CAP
REMOVED
LI LO
LD
LM5101
LM5041 Vss
PUSH
FEEDBACK
PULL
FB
• Push and Pull outputs operate continuously, alternating with a s light overlap.
• Output voltage is controlled by the Buck stage which operates at 2X the Push-Pull frequency.
• Continuous output current from the Push-Pull stage requires minimal filtering.
• High Efficiency achieved with low Push-Pull switching losses and matched Sync rectifier loading
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Cascaded Current-Fed
Converter Benefits
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Trace 1:
Push_Pull SWPUSHV DS
Vin = 60V
Trace 2: Vout =2.5V
Push_Pull SWPULL V DS Iout = 20A
Trace 3:
Buck Stage Switching
Node
25
Shown here are scope plots of the Push-Pull stage drain voltages and
the voltage at the common junction of the Buck stage switches.
Note that the Buck stage operates at twice the frequency of either the
Push or Pull switch.
Also note the overlap of the of the Push-Pull stage.
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Ch 1,2
Push-Pull VDS
Ch 3,4
Push-Pull ID S
Vin = 48V
Vout =2.5V
Iout = 20A
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Shown here are scope plots of the Push-Pull Drain voltages and Push-
Pull switch currents.
On the next slide we will take a more detailed look at the switching
transitions of these waveforms
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Ch 1,2
Push-Pull VDS
Ch 3,4
Push-Pull ID S
Vin = 48V
Vout =2.5V
Iout = 20A
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Filter Inductor
15% Primary
Switching
15%
Estimate for typical 3.3V Output, 35 – 80V Input
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Comparison of Rectifier
Stresses
Example: 3.3V output, 35-80V input
Voltage Stresses
Rectifier Voltage for Example
Topology Stresses Conditions Example: Assumptions
Forward Vin x (Ns/Np) 20V High Line with XFR Ratio 4:1
Push-Pull Vin x (Ns/Np) x 2 26.7V High Line with XFR Ratio 6:1
Cascaded PP Vout x 2 6.6V All Line conditions XFR Ratio 6:1
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On the top chart voltage stresses are compared. As you can see for the
Forward and the Push-Pull the voltage stresses are proportional to the
input voltage. At high line the calculated stresses are mush higher then
the Cascaded topology whose rectifier stresses are only proportional to
Vout.
All of the compared topologies have two secondary rectifiers. The lower
chart compares the ratio of ON times for each topology. The Pus h-Pull
and the Cascade have balanced loading on the two secondary rectifiers.
The loading ratio on the rectifiers for a Forward topology vary in
proportion to the input voltage.
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Ch 1
Sync1 VDS
Ch 2
Sync2 VDS
Vin = 48V
Vout =2.5V
Iout = 20A
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This scope plot shows the drain voltage waveforms the two
synchronous rectifiers in a 2.5 Volt output. Excluding the switching
spike, the voltage stress is as expected 5 volts.
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<Read Features>
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CS
2K 0.5V
R Q Vcc
CLK + LEB
0.6V OSC PUSH
DRIVER
SS 10uA CLK
DEADTIME
SS DIVIDE OR
OSCILLATOR Vcc
BY 2 OVERLAP
CONTROL
ENABLE
PULL
DRIVER
0.45V
SHUTDOWN
Rt / SYNC TIME 32
COMPARATOR
© 2003 National Semiconductor Corporation
Shown here is the block diagram for the LM5041 cascaded controller.
Note on the right are the 4 switch control outputs. Gate drivers are
included within the device for the Push and Pull outputs. A resistor
connected to the TIME pin is used to set either overlap or deadtime of
the Push-Pull outputs. Connecting the resistor to ground sets overlap
time. Connecting the resistor to REF sets deadtime.
The Buck stage outputs are logic level controls which work with
National’s new LM5100 family of Buck Stage Gate drivers.
The bias, control and protection circuits used in this controller are very
similar to the LM5030 controller, which is current mode control.
A unique LM5041 feature is a line under voltage lockout (UVLO) with
adjustable hysteresis.
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Performance:
Input Range: 36 to 75V
Output Voltage: 2.5V
Output Current: 0 to 50A
Board Size: 2.3 x 3.0 x 0.5
Load Regulation: 1%
Line Regulation: 0.1%
Line UVLO, Current Limit
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100V Chipset
LM5041 Cascaded Controller &
LM5101 Synchronous Buck Driver
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Cascaded Half-Bridge
Concept
Half-Bridge Vout
Stage
T1
Buck
Stage
Vin L1
33 - 76V
VDD
VDD
Vcc
Vin HD T1
LD
LM5100
LM5102
LM5041
PUSH
PULL
FB
FEED
BACK
35
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Cascaded Half-Bridge
Characteristics
• A Cascaded Half-Bridge Converter is a Buck type
converter consisting of a Buck Regulation stage
followed by (cascaded by) a Half-Bridge Isolation
Stage.
• The isolation stage is Voltage-Fed.
• Voltage splitter capacitors and a small output stage
inductor are required.
• Dead time is required for Half-Bridge switches
• The Half-Bridge Stage FET stresses are reduced, to
Vout x N. (2x less than the Push-Pull)
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Buck T1
Stage
Vin L1
33 - 76V
VDD VDD
VDD
Vcc
Vin HD T1
LD
LM5102 LM5100 LM5100
LM5041
PUSH
PULL
COMP
FEED
BACK
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Cascaded Full-Bridge
Characteristics
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Vcc Vcc
Q2 Q2
LEVEL LEVEL
HI SHIFT HI SHIFT
Vcc Vcc
Q1 Q1
LI LI
High side gate drivers are necessary to drive the Gate of the Buck
Switch.
An effective way to do this is with a “Bootstrapping” technique.
On the left illustration, when a low side switch is ON, charge flows from
Vcc to charge up a high side bootstrap capacitor. The charge on this
capacitor is now available to drive the high side gate as shown on the
right illustration.
National Semiconductor has developed a family of dual gate drivers with
level shifter designed specifically for Buck and Bridge configurations.
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The first two devices I would like to introduce are the LM5100 and the
LM5101.
The devices independently control both a high side and a low side gate.
The LM5100 has CMOS level inputs, while the LM5101 has TTL level
input thresholds.
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RT1 RT2
41
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HI
K x RT1
HO
LM5102
LI
Adjustable Leading
Edge Delay K x RT2
LO
42
For the LM5102 each output has independently adjustable leading edge
delays set by resistors R1 and R2. The delays have the effect o n the
outputs to create dead-time. This feature is very useful to prevent
excessive shoot-through currents on switching transitions.
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IN
RT
K x RT TPROP
HO
TPROP K x RT
LO 43
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Summary:
New 100V controllers and drivers enable
higher performance power converters with a
minimum of external components:
LM5030 Push Pull Controller
LM5041 Cascade Controller
LM510X Gate Drivers
Questions or Comments?
http://www.national.com/appinfo/power/hv.html
http://power.national.com 44
All of the devices described today are available for immediate sampling.
44