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SRI GANESH COLLEGE OF ENGINEERING AND TECHNOLOGY

Model Exam, March 2016.


Sixth Semester
Electronics and Communication Engineering
ECT63 DIGITAL SIGNAL PROCESSING
Time: 2.30 HOURS Maximum: 75 Marks
Date: 30– 03 – 2016
PART A – (10 x 2 = 20 marks)
All questions carry equal marks

1. What is Recursive?
2. What are the different types of window techniques?
3. Define sampling and quantizer.
4. List the different types of Realization of IIR.
5. Define warping.
6. What is 1s compliment?
7. What is meant by autocorrelation?
8. What are different methods to design IIR filter?
9. List the on-chip peripherals in 5X.
10. What are the different types of DSP Processor are available?

PART B – (5 x 11 = 55 marks)
All questions carry equal marks
11. Explain in detail about the steps involved in design the Butterworth fillter (11)
(Or)
12. Design the digital IIR filter for H(s)=10/s2+7s+10 using impulse invariance method for
T=0.2 sec (11)

13. Design a filter with Hd(ejὠ)= e-j3ὠ,-π/4≤ὠ≤π/4


0, π/4≤ὠ≤π for N=7 using hamming, barlett &
Blackmann windows (11)
(Or)
14. Determine the filter coefficients h(n) obtained by sampling
Hd (ejὠ) = e-j (N-1) ὠ/2, 0≤ὠ≤π/2
0, π/2≤ὠ≤π for N=7 (11)

15. Obtain the direct form I, II & cascade form realization for the system y(n)=
0.1y(n-1)+0.2y(n-2)+3x(n)+3.6x(n-1)+0.6x(n-2) (11)
(Or)
16. (a)Difference between IIR & FIR filter (5)
(b)The input to the system y(n)=0.5y(n-1)+x(n) is applied to an ADC. What is the
power produced by quantization noise at the output of the filter if the input is
quantized to 8 & 16 bits (6)

17. (a)Explain the QMF Filters in detail (5)


(b)Discuss in detail about the AR & ARMA Model with necessary diagrams (6)

(Or)
18. Design and explain the Decimation & Interpolation by integer factors (11)

19. (a)Explain the VonNeumann architecture (6)


(b)Write a short notes about the Harvard architecture with block diagram (5)
(Or)

20. Explain the architecture of TMS320C50 with necessary diagrams (11)


SRI GANESH COLLEGE OF ENGINEERING AND TECHNOLOGY
Model Exam, March 2016.
Sixth Semester
Electronics and Communication Engineering
ECT63 DIGITAL SIGNAL PROCESSING
Time: 2.30 HOURS Maximum: 75 Marks
Date: 30– 03 – 2016
PART A – (10 x 2 = 20 marks)
All questions carry equal marks

1. What is Recursive?
2. What are the different types of window techniques?
3. Define sampling and quantizer.
4. List the different types of Realization of IIR.
5. Define warping.
6. What is 1s compliment?
7. What is meant by autocorrelation?
8. What are different methods to design IIR filter?
9. List the on-chip peripherals in 5X.
10. What are the different types of DSP Processor are available?

PART B – (5 x 11 = 55 marks)
All questions carry equal marks
11. Explain in detail about the steps involved in design the Butterworth fillter (11)
(Or)
12. Design the digital IIR filter for H(s)=10/s2+7s+10 using impulse invariance method for
T=0.2 sec (11)

13. Design a filter with Hd(ejὠ)= e-j3ὠ,-π/4≤ὠ≤π/4


0, π/4≤ὠ≤π for N=7 using hamming, barlett &
Blackmann windows (11)
(Or)
14. Determine the filter coefficients h(n) obtained by sampling
Hd (ejὠ) = e-j (N-1) ὠ/2, 0≤ὠ≤π/2
0, π/2≤ὠ≤π for N=7 (11)

15. Obtain the direct form I, II & cascade form realization for the system y(n)=
0.1y(n-1)+0.2y(n-2)+3x(n)+3.6x(n-1)+0.6x(n-2) (11)
(Or)
16. (a)Difference between IIR & FIR filter (5)
(b)The input to the system y(n)=0.5y(n-1)+x(n) is applied to an ADC. What is the
power produced by quantization noise at the output of the filter if the input is
quantized to 8 & 16 bits (6)

17. (a)Explain the QMF Filters in detail (5)


(b)Discuss in detail about the AR & ARMA Model with necessary diagrams (6)

(Or)
18. Design and explain the Decimation & Interpolation by integer factors (11)

19. (a)Explain the VonNeumann architecture (6)


(b)Write a short notes about the Harvard architecture with block diagram (5)
(Or)

20. Explain the architecture of TMS320C50 with necessary diagrams (11)