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// PWMService.

c
/*----------------------------- Include Files -----------------------------*/
/* include header files for this service
*/
// Events and Services framework Headers

#include "ES_Configure.h"
#include "ES_Framework.h"
#include "ES_DeferRecall.h"
#include "ES_ShortTimer.h"
#include "ADService.h"
#include "PWMService.h"

// the common headers for C99 types


#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#include "termio.h"

// the headers to access the GPIO subsystem


#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "inc/hw_gpio.h"
#include "inc/hw_sysctl.h"
#include "inc/hw_pwm.h"
#include "inc/hw_timer.h"

// the headers to access the TivaWare Library


#include "driverlib/sysctl.h"
#include "driverlib/pin_map.h"
#include "driverlib/gpio.h"
#include "driverlib/timer.h"
#include "driverlib/interrupt.h"

#include "BITDEFS.H"

// readability defines
#define ALL_BITS (0xff << 2)

#include "ADMulti.h"

/*----------------------------- Module Defines ----------------------------*/


// these times assume a 1.000mS/tick timing

uint8_t duty;
uint8_t Frequency;
#define PERIOD_IN_USPB6 20000
#define PERIOD_IN_USPB7 20000
#define PERIOD_IN_USPB4 250
#define PERIOD_IN_USPB5 250
#define PERIOD_IN_USPC4 250
#define PERIOD_IN_USPD0 20000
#define PWM_TICKS_PER_MS 1250 //changed from 250
#define BITS_PER_NIBBLE 4
#define GenA_NormalPB6 (PWM_0_GENA_ACTCMPAU_ONE | PWM_0_GENA_ACTCMPAD_ZERO)
#define GenB_NormalPB7 (PWM_0_GENB_ACTCMPBU_ONE | PWM_0_GENB_ACTCMPBD_ZERO)
#define GenA_NormalPB4 (PWM_1_GENA_ACTCMPAU_ONE | PWM_1_GENA_ACTCMPAD_ZERO)
#define GenB_NormalPB5 (PWM_1_GENB_ACTCMPBU_ONE | PWM_1_GENB_ACTCMPBD_ZERO)
#define GenA_NormalPC4 (PWM_3_GENA_ACTCMPAU_ONE | PWM_3_GENA_ACTCMPAD_ZERO)
#define GenA_NormalPD0 (PWM_0_GENA_ACTCMPAU_ONE | PWM_0_GENA_ACTCMPAD_ZERO)
#define GenA_NormalPE4 (PWM_1_GENA_ACTCMPAU_ONE | PWM_1_GENA_ACTCMPAD_ZERO)

/*---------------------------- Module Functions ---------------------------*/


/* prototypes for private functions for this service.They should be functions
relevant to the behavior of this service
*/
// global functions
void SetDuty(uint8_t duty);
void PWMInit(void);
void RestoreDCPB6(void);
void RestoreDCPB7(void);
void RestoreDCPB4(void);
void RestoreDCPB5(void);
void RestoreDCPC4(void);
void RestoreDCPD0(void);
void RestoreDCPE4(void);
//void SetFrequency(uint16_t period_in_us);

/*---------------------------- Module Variables ---------------------------*/


// with the introduction of Gen2, we need a module level Priority variable
static uint8_t MyPriority;
static uint32_t PeriodPE4 = 500;
/*------------------------------ Module Code ------------------------------*/

bool InitPWMService(uint8_t Priority)


{ //printf ("none");
ES_Event_t ThisEvent;

MyPriority = Priority;

PWMInit();
//will be defined in separate fucntion
ThisEvent.EventType = ES_INIT;
// printf("\n\r adservice initialised ");
if (ES_PostToService(MyPriority, ThisEvent) == true)
{
return true;
}
else
{
return false;
}
}

// set duty takes value from AD service and inserts the value in compare A

bool PostPWMService(ES_Event_t ThisEvent)


{
// printf("\r\nposted to ad service \r\n");
return ES_PostToService(MyPriority, ThisEvent);
}

ES_Event_t RunPWMService(ES_Event_t ThisEvent)


{
ES_Event_t ReturnEvent;
ReturnEvent.EventType = ES_NO_EVENT;

if (ThisEvent.EventType == ES_NEW_KEY)
{
SetFrequency(750);
printf("changed frequency is %d", Frequency);
}
return ReturnEvent;
}

void PWMInit(void)
{
//ENABLE CLOCK TO PWM MODULEo and Module1
HWREG(SYSCTL_RCGCPWM) |= SYSCTL_RCGCPWM_R0;
HWREG(SYSCTL_RCGCPWM) |= SYSCTL_RCGCPWM_R1;

//NABLE CLOCK TO PORT B, PORT C and PORT D and PORT E


HWREG(SYSCTL_RCGCGPIO) |= SYSCTL_RCGCGPIO_R1;
HWREG(SYSCTL_RCGCGPIO) |= SYSCTL_RCGCGPIO_R2;
HWREG(SYSCTL_RCGCGPIO) |= SYSCTL_RCGCGPIO_R3;
HWREG(SYSCTL_RCGCGPIO) |= SYSCTL_RCGCGPIO_R4;

while ((HWREG(SYSCTL_PRGPIO) & BIT1HI) != BIT1HI)


{
// busy wait
}
while ((HWREG(SYSCTL_PRGPIO) & BIT2HI) != BIT2HI)
{}
while ((HWREG(SYSCTL_PRGPIO) & BIT3HI) != BIT3HI)
{}
while ((HWREG(SYSCTL_PRGPIO) & BIT4HI) != BIT4HI)
{}

// SET THE SYSTEM CLOCK AT 32 BIT


HWREG(SYSCTL_RCC) = (HWREG(SYSCTL_RCC) & ~SYSCTL_RCC_PWMDIV_M) |
(SYSCTL_RCC_USEPWMDIV | SYSCTL_RCC_PWMDIV_32);

//MAKE SURE THAT THE CLOCK IS ACTIVE


while ((HWREG(SYSCTL_PRPWM) & SYSCTL_PRPWM_R0) != SYSCTL_PRPWM_R0) // for module0
{
;
}
while ((HWREG(SYSCTL_PRPWM) & SYSCTL_PRPWM_R1) != SYSCTL_PRPWM_R1) // for
module1
{
;
}
// DISABLE THE PWM WHILE INITIALIZING
HWREG(PWM0_BASE + PWM_O_0_CTL) = 0; // Gen0 module0
HWREG(PWM0_BASE + PWM_O_1_CTL) = 0; // Gen1 module0
HWREG(PWM0_BASE + PWM_O_3_CTL) = 0; // Gen3 module0
HWREG(PWM1_BASE + PWM_O_0_CTL) = 0; // Gen0 module1
HWREG(PWM1_BASE + PWM_O_1_CTL) = 0; // Gen1 module1

//PWM GENERATOR TO GO TO 1 ON RISING COMPARE VALUE AND TO 0 ON FALLING COMPARE VALUE


//GenA_Normal= (PWM_0_GENA_ACTCMPAU_ONE | PWM_0_GENA_ACTCMPAD_ZERO);
HWREG(PWM0_BASE + PWM_O_0_GENA) = (PWM_0_GENA_ACTCMPAU_ONE |
PWM_0_GENA_ACTCMPAD_ZERO);
HWREG(PWM0_BASE + PWM_O_1_GENA) = (PWM_1_GENA_ACTCMPAU_ONE |
PWM_1_GENA_ACTCMPAD_ZERO);
HWREG(PWM0_BASE + PWM_O_3_GENA) = (PWM_3_GENA_ACTCMPAU_ONE |
PWM_3_GENA_ACTCMPAD_ZERO);
HWREG(PWM1_BASE + PWM_O_0_GENA) = (PWM_0_GENA_ACTCMPAU_ONE |
PWM_0_GENA_ACTCMPAD_ZERO);
HWREG(PWM1_BASE + PWM_O_1_GENA) = (PWM_1_GENA_ACTCMPAU_ONE |
PWM_1_GENA_ACTCMPAD_ZERO);

//GenB_Normal=(PWM_0_GENb_ACTCMPAU_ONE | PWM_0_GENB_ACTCMPAD_ZERO); // not


required for this lab as only one PWM is needed
HWREG(PWM0_BASE + PWM_O_0_GENB) = (PWM_0_GENB_ACTCMPBU_ONE |
PWM_0_GENB_ACTCMPBD_ZERO);
HWREG(PWM0_BASE + PWM_O_0_GENB) = (PWM_0_GENB_ACTCMPBU_ONE |
PWM_0_GENB_ACTCMPBD_ZERO);

//SET THE PWM PERIOD AS PER FREQUENCY


HWREG(PWM0_BASE + PWM_O_0_LOAD) = ((PERIOD_IN_USPB6 * PWM_TICKS_PER_MS / 1000))
>> 1; // for drive motors 300/1250
HWREG(PWM0_BASE + PWM_O_1_LOAD) = ((PERIOD_IN_USPB4 * PWM_TICKS_PER_MS / 1000))
>> 1; // for servomotors: gate 25000/1250
HWREG(PWM0_BASE + PWM_O_3_LOAD) = ((PERIOD_IN_USPC4 * PWM_TICKS_PER_MS / 1000))
>> 1; // for fan motor 300/1250
HWREG(PWM1_BASE + PWM_O_0_LOAD) = ((PERIOD_IN_USPD0 * PWM_TICKS_PER_MS / 1000))
>> 1; // for servomotor: ball mechanism 25000/1250
HWREG(PWM1_BASE + PWM_O_1_LOAD) = ((PeriodPE4 * PWM_TICKS_PER_MS / 1000)) >> 1;
// for IR: default set to 500us; separate function for setting frequency 625/1250

//will be defined in separate function


//SetDuty (duty); // setting duty for all as 50%
/*HWREG(PWM0_BASE + PWM_O_0_CMPA) = HWREG(PWM0_BASE + PWM_O_0_LOAD) >> 1;
HWREG(PWM0_BASE + PWM_O_0_CMPB) = HWREG(PWM0_BASE + PWM_O_0_LOAD) >> 1;
HWREG(PWM0_BASE + PWM_O_1_CMPA) = HWREG(PWM0_BASE + PWM_O_1_LOAD) >> 1;
HWREG(PWM0_BASE + PWM_O_1_CMPB) = HWREG(PWM0_BASE + PWM_O_1_LOAD) >> 1;
HWREG(PWM0_BASE + PWM_O_3_CMPA) = HWREG(PWM0_BASE + PWM_O_3_LOAD) >> 1;
HWREG(PWM1_BASE + PWM_O_0_CMPA) = HWREG(PWM1_BASE + PWM_O_0_LOAD) >> 1;
HWREG(PWM1_BASE + PWM_O_1_CMPA) = HWREG(PWM1_BASE + PWM_O_1_LOAD) >> 1;*/

// enable the PWM outputs


HWREG(PWM0_BASE + PWM_O_ENABLE) |= (PWM_ENABLE_PWM0EN);
HWREG(PWM0_BASE + PWM_O_ENABLE) |= (PWM_ENABLE_PWM1EN);
HWREG(PWM0_BASE + PWM_O_ENABLE) |= (PWM_ENABLE_PWM2EN);
HWREG(PWM0_BASE + PWM_O_ENABLE) |= (PWM_ENABLE_PWM3EN);
HWREG(PWM0_BASE + PWM_O_ENABLE) |= (PWM_ENABLE_PWM6EN);
HWREG(PWM1_BASE + PWM_O_ENABLE) |= (PWM_ENABLE_PWM0EN);
HWREG(PWM1_BASE + PWM_O_ENABLE) |= (PWM_ENABLE_PWM2EN);

// CONFIGURE PORTB PINS AS PWM OUTPUTS BY SELECTING ALTERNATE FUNCTION


HWREG(GPIO_PORTB_BASE + GPIO_O_AFSEL) |= (BIT6HI | BIT7HI);
HWREG(GPIO_PORTB_BASE + GPIO_O_AFSEL) |= (BIT4HI | BIT5HI);
HWREG(GPIO_PORTC_BASE + GPIO_O_AFSEL) |= BIT4HI;
HWREG(GPIO_PORTD_BASE + GPIO_O_AFSEL) |= BIT0HI;
HWREG(GPIO_PORTE_BASE + GPIO_O_AFSEL) |= BIT4HI;

//CHOOSE TO MAP PWM TO THOSE PINS


HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL) = (HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL) &
0xf0ffffff) + (4 << (6 * BITS_PER_NIBBLE)); // PB6
HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL) = (HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL) &
0x0fffffff) + (4 << (7 * BITS_PER_NIBBLE)); // PB7
HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL) = (HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL) &
0xfff0ffff) + (4 << (4 * BITS_PER_NIBBLE)); // PB4
HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL) = (HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL) &
0xff0fffff) + (4 << (5 * BITS_PER_NIBBLE)); // PB5
HWREG(GPIO_PORTC_BASE + GPIO_O_PCTL) = (HWREG(GPIO_PORTC_BASE + GPIO_O_PCTL) &
0xfff0ffff) + (4 << (4 * BITS_PER_NIBBLE)); // PC4
HWREG(GPIO_PORTD_BASE + GPIO_O_PCTL) = (HWREG(GPIO_PORTD_BASE + GPIO_O_PCTL) &
0xfffffff0) + (5 << (0 * BITS_PER_NIBBLE)); // PD0
HWREG(GPIO_PORTE_BASE + GPIO_O_PCTL) = (HWREG(GPIO_PORTE_BASE + GPIO_O_PCTL) &
0xfff0ffff) + (5 << (4 * BITS_PER_NIBBLE)); // PE4

//enable pins on port B,C,D,E for digital enable


HWREG(GPIO_PORTB_BASE + GPIO_O_DEN) |= (BIT6HI);
HWREG(GPIO_PORTB_BASE + GPIO_O_DEN) |= (BIT7HI);
HWREG(GPIO_PORTB_BASE + GPIO_O_DEN) |= (BIT4HI);
HWREG(GPIO_PORTB_BASE + GPIO_O_DEN) |= (BIT5HI);
HWREG(GPIO_PORTC_BASE + GPIO_O_DEN) |= (BIT4HI);
HWREG(GPIO_PORTD_BASE + GPIO_O_DEN) |= (BIT0HI);
HWREG(GPIO_PORTE_BASE + GPIO_O_DEN) |= (BIT4HI);

// SET THE DIRECTION ON PB6


HWREG(GPIO_PORTB_BASE + GPIO_O_DIR) |= (BIT6HI);
HWREG(GPIO_PORTB_BASE + GPIO_O_DIR) |= (BIT7HI);
HWREG(GPIO_PORTB_BASE + GPIO_O_DIR) |= (BIT4HI);
HWREG(GPIO_PORTB_BASE + GPIO_O_DIR) |= (BIT5HI);
HWREG(GPIO_PORTC_BASE + GPIO_O_DIR) |= (BIT4HI);
HWREG(GPIO_PORTD_BASE + GPIO_O_DIR) |= (BIT0HI);
HWREG(GPIO_PORTE_BASE + GPIO_O_DIR) |= (BIT4HI);

// set the up/DoWn count mode and enable the pwm generator. Both gererator updates
synchronised

HWREG(PWM0_BASE + PWM_O_0_CTL) = (PWM_0_CTL_MODE | PWM_0_CTL_ENABLE |


PWM_0_CTL_GENAUPD_LS | PWM_0_CTL_GENBUPD_LS);
HWREG(PWM0_BASE + PWM_O_1_CTL) = (PWM_1_CTL_MODE | PWM_1_CTL_ENABLE |
PWM_1_CTL_GENAUPD_LS | PWM_1_CTL_GENBUPD_LS);
HWREG(PWM0_BASE + PWM_O_3_CTL) = (PWM_3_CTL_MODE | PWM_3_CTL_ENABLE |
PWM_3_CTL_GENAUPD_LS);
HWREG(PWM1_BASE + PWM_O_0_CTL) = (PWM_0_CTL_MODE | PWM_0_CTL_ENABLE |
PWM_0_CTL_GENAUPD_LS);
HWREG(PWM1_BASE + PWM_O_1_CTL) = (PWM_1_CTL_MODE | PWM_1_CTL_ENABLE |
PWM_1_CTL_GENAUPD_LS);
SetDutyPB4(0);
SetDutyPB5(0);
SetDutyPB6(5);
SetDutyPB7(5);
SetDutyPC4(0);
SetDutyPD0(100);
SetFrequency(1000);
SetDutyPE4(50);
}

void SetDutyPB6(uint8_t duty)


{
if (duty == 100)
{
HWREG(PWM0_BASE + PWM_O_0_GENA) = PWM_0_GENA_ACTZERO_ONE;
}
else if (duty == 0)
{
HWREG(PWM0_BASE + PWM_O_0_GENA) = PWM_0_GENA_ACTZERO_ZERO;
}
else
{
// printf("\r\n duty is %d", duty);
RestoreDCPB6();
HWREG(PWM0_BASE + PWM_O_0_CMPA) = ((PERIOD_IN_USPB6 * PWM_TICKS_PER_MS / 1000)
>> 1) / 100 * (100 - duty); // value of duty comes from ADservice
//printf("\n\r incorrect= %u\n",(PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1 *
(100-duty)/100);
//printf("\n\r correct= %u\n",((PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1)/100 *
(100-duty));
}
}

void SetDutyPB7(uint8_t duty)


{
if (duty == 100)
{
HWREG(PWM0_BASE + PWM_O_0_GENB) = PWM_0_GENB_ACTZERO_ONE;
}
else if (duty == 0)
{
HWREG(PWM0_BASE + PWM_O_0_GENB) = PWM_0_GENB_ACTZERO_ZERO;
}
else
{
// printf("\r\n duty is %d", duty);
RestoreDCPB7();
HWREG(PWM0_BASE + PWM_O_0_CMPB) = ((PERIOD_IN_USPB6 * PWM_TICKS_PER_MS / 1000)
>> 1) / 100 * (100 - duty); // value of duty comes from ADservice
//printf("\n\r incorrect= %u\n",(PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1 *
(100-duty)/100);
//printf("\n\r correct= %u\n",((PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1)/100 *
(100-duty));
}
}

void SetDutyPB4(uint8_t duty)


{
//printf("\n\r PB4 Duty is %d", duty);
if (duty == 100)
{
HWREG(PWM0_BASE + PWM_O_1_GENA) = PWM_1_GENA_ACTZERO_ONE;
}
else if (duty == 0)
{
HWREG(PWM0_BASE + PWM_O_1_GENA) = PWM_1_GENA_ACTZERO_ZERO;
}
else
{
//printf("\r\n duty is %d", duty);
RestoreDCPB4();
HWREG(PWM0_BASE + PWM_O_1_CMPA) = ((PERIOD_IN_USPB4 * PWM_TICKS_PER_MS / 1000)
>> 1) / 100 * (100 - duty); // value of duty comes from ADservice
//printf("\n\r incorrect= %u\n",(PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1 *
(100-duty)/100);
//printf("\n\r correct= %u\n",((PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1)/100 *
(100-duty));
}
}

void SetDutyPB5(uint8_t duty)


{
// printf("\n\r PB5 Duty is %d", duty);
if (duty == 100)
{
HWREG(PWM0_BASE + PWM_O_1_GENB) = PWM_1_GENB_ACTZERO_ONE;
}
else if (duty == 0)
{
HWREG(PWM0_BASE + PWM_O_1_GENB) = PWM_1_GENB_ACTZERO_ZERO;
}
else
{
//printf("\r\n duty is %d", duty);
RestoreDCPB5();
HWREG(PWM0_BASE + PWM_O_1_CMPB) = ((PERIOD_IN_USPB4 * PWM_TICKS_PER_MS / 1000)
>> 1) / 100 * (100 - duty); // value of duty comes from ADservice
//printf("\n\r incorrect= %u\n",(PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1 *
(100-duty)/100);
//printf("\n\r correct= %u\n",((PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1)/100 *
(100-duty));
}
}

void SetDutyPC4(uint8_t duty)


{
if (duty == 100)
{
HWREG(PWM0_BASE + PWM_O_3_GENA) = PWM_3_GENA_ACTZERO_ONE;
}
else if (duty == 0)
{
HWREG(PWM0_BASE + PWM_O_3_GENA) = PWM_3_GENA_ACTZERO_ZERO;
}
else
{
//printf("\r\n duty is %d", duty);
RestoreDCPC4();
HWREG(PWM0_BASE + PWM_O_3_CMPA) = ((PERIOD_IN_USPC4 * PWM_TICKS_PER_MS / 1000)
>> 1) / 100 * (100 - duty); // value of duty comes from ADservice
//printf("\n\r incorrect= %u\n",(PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1 *
(100-duty)/100);
//printf("\n\r correct= %u\n",((PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1)/100 *
(100-duty));
}
}

void SetDutyPD0(uint8_t duty)


{
if (duty == 100)
{
HWREG(PWM1_BASE + PWM_O_0_GENA) = PWM_0_GENA_ACTZERO_ONE;
}
else if (duty == 0)
{
HWREG(PWM1_BASE + PWM_O_0_GENA) = PWM_0_GENA_ACTZERO_ZERO;
}
else
{
//printf("\r\n duty is %d", duty);
RestoreDCPD0();
HWREG(PWM1_BASE + PWM_O_0_CMPA) = ((PERIOD_IN_USPD0 * PWM_TICKS_PER_MS / 1000)
>> 1) / 100 * (100 - duty); // value of duty comes from ADservice
//printf("\n\r incorrect= %u\n",(PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1 *
(100-duty)/100);
//printf("\n\r correct= %u\n",((PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1)/100 *
(100-duty));
}
}

void SetDutyPE4(uint8_t duty)


{
if (duty == 100)
{
HWREG(PWM1_BASE + PWM_O_1_GENA) = PWM_1_GENA_ACTZERO_ONE;
}
else if (duty == 0)
{
HWREG(PWM1_BASE + PWM_O_1_GENA) = PWM_1_GENA_ACTZERO_ZERO;
}
else
{
//printf("\r\n duty is %d", duty);
RestoreDCPE4();
HWREG(PWM1_BASE + PWM_O_1_CMPA) = ((PeriodPE4 * PWM_TICKS_PER_MS / 1000) >> 1)
/ 100 * (100 - duty); // value of duty comes from ADservice
//printf("\n\r incorrect= %u\n",(PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1 *
(100-duty)/100);
//printf("\n\r correct= %u\n",((PERIOD_IN_MS * PWM_TICKS_PER_MS)>>1)/100 *
(100-duty));
}
}

void RestoreDCPB6(void)
{
HWREG(PWM0_BASE + PWM_O_0_GENA) = GenA_NormalPB6;
}

void RestoreDCPB7(void)
{
HWREG(PWM0_BASE + PWM_O_0_GENB) = GenB_NormalPB7;
}

void RestoreDCPB4(void)
{
HWREG(PWM0_BASE + PWM_O_1_GENA) = GenA_NormalPB4;
}

void RestoreDCPB5(void)
{
HWREG(PWM0_BASE + PWM_O_1_GENB) = GenB_NormalPB5;
}

void RestoreDCPC4(void)
{
HWREG(PWM0_BASE + PWM_O_3_GENA) = GenA_NormalPC4;
}

void RestoreDCPD0(void)
{
HWREG(PWM1_BASE + PWM_O_0_GENA) = GenA_NormalPD0;
}

void RestoreDCPE4(void)
{
HWREG(PWM1_BASE + PWM_O_1_GENA) = GenA_NormalPE4;
}

void SetFrequency(uint16_t period_in_us)


{
PeriodPE4 = period_in_us;
HWREG(PWM1_BASE + PWM_O_1_LOAD) = ((PeriodPE4 * PWM_TICKS_PER_MS / 1000)) >> 1;
//Frequency= ((PERIOD_IN_MS * period_in_us)) >> 1;
}

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