ABSTRACT

RFID is a technology similar to that of bar code scanning. An RFID system consists of
tags, which use radio frequency signals to transmit its location information to a reader, which
usually sends this information to a server that processes it according to the needs of the
application. This paper presents a system that can track buses across a city by placing RFID tags
in the buses and the readers in every alternative bus stop. The local server for the city recieves
the location information, and alerts the forthcoming bus stops in the route of the bus, of the bus’
number, route and expected time of arrival, which are then displayed at the stop. This system
thus describes is a cost effective and easy to implement scheme for tracking buses in real time.
 CHAPTER 1

INTRODUCTION

RADIO-FREQUENCY IDENTIFICATION (RFID)

Radio-frequency identification (RFID) is an automatic identification method, relying on

remotely retrieving data using devices called transponders or RFID tags. The technology requires
some extent of cooperation of an RFID reader and an RFID tag. An object called RFID tag that
can be applied to a product, person or animal for the purpose of identification and tracking using
radio waves. Some tags can be read from meters away and beyond the line of sight of the reader.
The RFID has come up as emerging technology which started evolving in World War II. A RFID
system has several components which include tags, antennas and readers. This set up can be used
either in high frequency or ultra-high frequency. In 1946, Leon Theremin invented a toll for the
Soviet Union which retransmitted radio waves with some audio information attached to it.
Though it was not an identification device it can be considered a predecessor to the RFID
technology. The IFF transponder was used by United Kingdom in 1939 which was then used for
identifying planes as an ally plane or enemy plane as early in 19th century in World War II. The
transponder of this kind is still used in today’s aircrafts wherein the transmission and receiving
of waves is used. The patent from Mario Cardullo’s in 1973 which talks about a passive radio
transponder attached to a memory was the true ancestor of modern RFID.

BUS TRACKING AND DISPLAY

This is a system which aims to provide real time bus tracking and display of the estimated
time of arrival of buses at various stops. Currently, when a person has no way of knowing at
what time their expected bus will arrive at their stop. He has to wait till the bus arrives, and if it
had just left, has to wait till another one arrives. A solution to this is proposed here, with the hel
of RFID technology. RFID works as a combination of a reader, which can read information from
tags. Readers can be passive RFID systems, where the reader and reader antenna send a radio
signal to the tag, and tag then uses the transmitted signal to power on, and reflects energy back to
the reader. These can operate either in low, high or ultra-high frequencies, with low covering
frequency covering 30 KHz to 300 KHz, high frequency covering 3 to 30 MHz and the ultra-
high frequency covering 30 MHz to 3 GHz respectively. For this system, the ultra-high
frequency readers will be efficient, since they work anywhere in the 5 to 12m range. RFID tags
can either be transponders or beacons, where a transponder replies with the stored message only
when the reader sends a signal, and a beacon keeps relaying the message it has stored constantly
and is equipped with its own power source. It can also be programmed to relay information at
fixed intervals of time, depending on the individual application needs.
 CHAPTER 2

LITERATURE REVIEW

Other than supply chain management, which has the largest application scope for RFID
technology, it is being studied and implemented in the transportation sector as well [1].
Opportunities for RFID technology in this sector, standards and basic architecture of such an
implementation has been discussed in [2] and [3]. Chawla, V. [4] discusses the use of passive
RFID tags for location identification in RFID based transportation systems. These passive tags
send location or other embedded information to the reader once it comes within its range, and
thus the reader notes and sends the location to the computer that processes the information. Jan-
Dong Tseng [5] discusses such an implementation for tracking all vehicles that pass through toll
gates so that they can be tracked and identified automatically upon arrival within the particular
range of nine meters. But this requires the vehicle to be tracked to be move at a certain
moderated speed. Since this work aims atproviding as system for bus tracking, we look closely at
the already provided system for it, in R.Vivek ET. Al. [6]. Here, a reverse RFID based bus
tracking system is proposed, wherein the tags are placed along the roads at fixed intervals and
the readers are placed in the buses. This too would lead to the similar hassle of buses moving at a
higher speed than the detectable limit. Also, it would not prove to be feasible since readers would
have to be placed in thousands of buses, with the cost of the readers being high. This work also
examines the advantage of RFID technology over GPS and other similar technologies in the bus
tracking application. It argues that GPS works effectively only in the scenarios where there is a
direct line of sight between the reader and the satellite, thus hindering the system performance in
case of weather changes and other unavoidable phenomena. In another similar work, B. A.
Hatem et. Al. in [7] propose a solution combining RFID and WSN (Wireless Sensor Networks),
where the reading range of an RFID reader is incremented with the help of a WSN network, to
improve detecting the tags in vehicles from a wider distance. Implementing this technology over
a wide area would lead to generation of huge volumes of stream data, the storage and handling of
which has been theorized in [8] and [9]. Data processing techniques for the same, which includes
data querying and retrieval, have been described in [10]. Due to non-availability of prior
information about the buses arrival schedule, in the morning people waits on bus stops. The
buses are overloaded for most of the times which often results in some kind of fault occurrence
in buses and people get late further. [11] The time required to travel by bus is linked with some
parameters like traffic, accidents and snow. In fact, buses are stuck in traffic and the scheduled of
buses are hampered by such situations. Because of this the management of the bus schedule is a
hard task. Most of the bus station used paperworks or fixed schedules. Supervisors are hired at
super station to control the entrance and the exit of buses. They prepare the trip schedules and
sheets containing the schedules manually which is inaccurate and time consuming. Subsequently,
transport departments have no visibility on real time information about bus timings, which
results in un-utilization of resources. So, all these results in dissatisfaction and inconvenience to
millions of people. Therefore, accurate and timely transit travel time information is so important.
This technology can be used to help the administrator to monitor the buses, the traffic while
increasing the satisfaction of the users [12] Well-known examples of identification technologies
include Closed-Circuit Television (CCTV) and Global Positioning System (GPS). CCTV can be
deployed at each entrance gate and image processing techniques can be utilized to identify the
arrival of buses, where image recognition was performed to detect the bus in traffic. Output from
these tests has shown poor performance intracking based detection (~20% precision). During the
past, GPS integrated to Geographic Information Systems (GIS) was used to monitor buses
traffic. GPS receiver communicates with at least 4 satellites before giving the position of the bus.
It gives very good results; however, line of sight between the receiver and the satellites is
required otherwise the GPS signal is going to be weaker and attenuated. This is a main limitation
of this technology especially when it comes to monitor bus traffic inside an underground bus
station. Due to the limitation of these technologies, RFID can be used to track public transport
service. This technology can be effectively applied for real-time tracking and identification.
RFID was developed in the 1940s by the US department of defence (DoD) which used
transponders to differentiate between friendly and enemy aircrafts. Since this time, RFID
technology has been evolving to change the way people live and work. Use of RFID in different
areas is been explored in many previous researches, from toll collection, agriculture, access
control, supply chain, logistics, healthcare, and library. RFID technology can response to our
tracking needs that’s why we used RFID in our design to identify buses entering and leaving the
bus station.
 CHAPTER 3

SYSTEM STUDY

FEASIBILITY STUDY

The feasibility of the project is analyzed in this phase and business proposal is put
forth with a very general plan for the project and some cost estimates. During system analysis the
feasibility study of the proposed system is to be carried out. This is to ensure that the proposed
system is not a burden to the company. For feasibility analysis, some understanding of the major
requirements for the system is essential.
Three key considerations involved in the feasibility analysis are

 ECONOMICAL FEASIBILITY
 TECHNICAL FEASIBILITY
 SOCIAL FEASIBILITY

ECONOMICAL FEASIBILITY

This study is carried out to check the economic impact that the system will have on the
organization. The amount of fund that the company can pour into the research and development
of the system is limited. The expenditures must be justified. Thus the developed system as well
within the budget and this was achieved because most of the technologies used are freely
available. Only the customized products had to be purchased.

TECHNICAL FEASIBILITY
This study is carried out to check the technical feasibility, that is, the technical
requirements of the system. Any system developed must not have a high demand on the available
technical resources. This will lead to high demands on the available technical resources. This
will lead to high demands being placed on the client. The developed system must have a modest
requirement, as only minimal or null changes are required for implementing this system.
SOCIAL FEASIBILITY

The aspect of study is to check the level of acceptance of the system by the user. This
includes the process of training the user to use the system efficiently. The user must not feel
threatened by the system, instead must accept it as a necessity. The level of acceptance by the
users solely depends on the methods that are employed to educate the user about the system and
to make him familiar with it. His level of confidence must be raised so that he is also able to
make some constructive criticism, which is welcomed, as he is the final user of the system.
 CHAPTER 4

SYSTEM ANALYSIS

PROPOSED WORK

This requires identification of all the bus routes and their storage in a database, and a
suitable encoding scheme that costs less but efficiently indicates the correct route without any
discrepancies. The individual bus routes in the system are thus encoded into units consisting of a
character followed by one or two digits. The mechanism for this has been derived from a similar
implementation in [11]. The architecture of the proposed system is illustrated in Figure 1.It
requires passive RFID tags holding the bus code to be placed in all the buses and low frequency
RFID readers to be placed in bus stops which are approximately 20 km apart from one another.
Any stops within two bus stops having RFID readers are left out, as the time of arrival of buses
at these stops are predicted by approximation. Once a bus comes within reading range of a reader
at any stop X, the bus code is read from the tag and is passed to the system placed in the stop.
This information is then sent to the central server that is responsible for identifying the bus’
route, the subsequent stops that are within 20 km of X, and the earliest time at which it would
arrive at the immediately next stop. Once all this is known, it alerts those subsequent stops about
the bus number, time and destination of the bus considered. Once a stop, say Y, receives the
incoming alert, it presents the same on an LED display. This information is removed once the
bus reaches Y (or the closest reader to Y, in case Y is an intermediate stop without a reader).

SYSTEM REQUIREMENT

RFID :
Automate Distribution:

Reduce cost (man power, shipping mistakes)

Increase sales (keep shelves full)

DoD Total Asset Visibility Initiative.

Radio frequency identification (RFID) is a generic term that is used to describe a system
that transmits the identity (in the form of a unique serial number) of an object or person
wirelessly, using radio waves. It's grouped under the broad category of automatic identification
technologies.

RFID is in use all around us. If you have ever chipped your pet with an ID tag, used
EZPass through a toll booth, or paid for gas using SpeedPass, you've used RFID. In addition,
RFID is increasingly used with biometric technologies for security.
Unlike ubiquitous UPC bar-code technology, RFID technology does not require contact or
line of sight for communication. RFID data can be read through the human body, clothing and
non-metallic materials.

Components

A basic RFID system consists of three components:

An antenna or coil

A transceiver (with decoder)

A transponder (RF tag) electronically programmed with unique information.

 The antenna emits radio signals to activate the tag and to read and write data to it.

The reader emits radio waves in ranges of anywhere from one inch to 100 feet or more,
depending upon its power output and the radio frequency used. When an RFID tag passes
through the electromagnetic zone, it detects the reader's activation signal.

The reader decodes the data encoded in the tag's integrated circuit (silicon chip) and the
data is passed to the host computer for processing.

The purpose of an RFID system is to enable data to be transmitted by a portable device,

called a tag, which is read by an RFID reader and processed according to the needs of a
particular application. The data transmitted by the tag may provide identification or location
information, or specifics about the product tagged, such as price, color, date of purchase, etc.
RFID technology has been used by thousands of companies for a decade or more.

RFID quickly gained attention because of its ability to track moving objects. As the
technology is refined, more pervasive - and invasive - uses for RFID tags are in the works.

A typical RFID tag consists of a microchip attached to a radio antenna mounted on a

substrate. The chip can store as much as 2 kilobytes of data.
To retrieve the data stored on an RFID tag, you need a reader. A typical reader is a
device that has one or more antennas that emit radio waves and receive signals back from the tag.
The reader then passes the information in digital form to a computer system.

Current and Potential Uses of RFID .

Asset Tracking :

It's no surprise that asset tracking is one of the most common uses of RFID. Companies
can put RFID tags on assets that are lost or stolen often, that are underutilized or that are just
hard to locate at the time they are needed. Just about every type of RFID system is used for asset
management. NYK Logistics, a third-party logistics provider based in Secaucus, N.J., needed to
track containers at its Long Beach, Calif., distribution center. It chose a real-time locating system
that uses active RFID beacons to locate container to within 10 feet.

Manufacturing:

RFID has been used in manufacturing plants for more than a decade. It's used to track parts
and work in process and to reduce defects, increase throughput and manage the production of
different versions of the same product.

Supply Chain Management :

RFID technology has been used in closed loop supply chains or to automate parts of the
supply chain within a company's control for years.
As standards emerge, companies are increasingly turning to RFID to track Shipments
among supply chain partners.

Retailing :

Retailers such as Best Buy, Metro, Target, Tesco and Wal-Mart are in the forefront of
RFID adoption. These retailers are currently focused on improving supply chain efficiency and
making sure product is on the shelf when customers want to buy it.

Payment Systems :

RFID is all the rage in the supply chain world, but the technology is also catching on as a
convenient payment mechanism. One of the most popular uses of RFID today is to pay for road
tolls without stopping. These active systems have caught on in many countries, and quick service
restaurants are experimenting with using the same active RFID tags to pay for meals at drive-
through windows.

Security and Access Control:

 RFID has long been used as an electronic key to control who has access to office
buildings or areas within office buildings. The first access control systems used low-frequency
RFID tags. Recently, vendors have introduced 13.56 MHz systems that offer longer read range.

The advantage of RFID is it is convenient (an employee can hold up a badge to

unlock a door, rather than looking for a key or swiping a magnetic stripe card) and because there
is no contact between the card and reader, there is less wear and tear, and therefore less
maintenance.

As RFID technology evolves and becomes less expensive and more robust, it's likely
that companies and RFID vendors will develop many new applications to solve common and
unique business problems.

RFID is not necessarily "better" than bar codes. The two are different technologies and
have different applications, which sometimes overlap. The big difference between the two is bar
codes are line-of-sight technology. That is, a scanner has to "see" the bar code to read it, which
means people usually have to orient the bar code toward a scanner for it to be read. Radio
frequency identification, by contrast, doesn't require line of sight. RFID tags can be read as long
as they are within range of a reader.

Bar codes have other shortcomings as well. If a label is ripped or soiled or has fallen
off, there is no way to scan the item, and standard bar codes identify only the manufacturer and
product, not the unique item. The bar code on one milk carton is the same as every other, making
it impossible to identify which one might pass its expiration date first.

Most countries have assigned the 125 kHz or 134 kHz area of the radio spectrum for low-
frequency systems, and 13.56 MHz is used around the world for high-frequency systems. But
UHF RFID systems have only been around since the mid-1990s, and countries have not agreed
on a single area of the UHF spectrum for RFID. Europe uses 868 MHz for UHF, while the U.S.
uses 915 MHz. Until recently, Japan did not allow any use of the UHF spectrum for RFID, but it
is looking to open up the 960 MHz area for RFID.

Many other devices use the UHF spectrum, so it will take years for all governments to
agree on a single UHF band for RFID. Governments also regulate the power of the readers to
limit interference with other devices. Some groups, such as the Global Commerce Initiative, are
trying to encourage governments to agree on frequencies and output. Tag and reader makers are
also trying to develop systems that can work at more than one frequency, in order to get around
the problem.

Different frequencies have different characteristics that make them more useful for
different applications. For instance, low-frequency tags use less power and are better able to
penetrate non-metallic substances. They are ideal for scanning objects with high-water content,
such as fruit, but their read range is limited to less than a foot (0.33 meter).

High-frequency tags work better on objects made of metal and can work around goods
with high water content. They have a maximum read range of about three feet (1 meter). UHF
frequencies typically offer better range and can transfer data faster than low- and high-
frequencies. But they use more power and are less likely to pass through materials. And because
they tend to be more "directed," they require a clear path between the tag and reader.

UHF tags might be better for scanning boxes of goods as they pass through a dock door
into a warehouse. It is best to work with a knowledgeable consultant, integrator or vendor that
can help you choose the right frequency for your application.

An RFID system consists of a tag made up of a microchip with an antenna, and an

interrogator or reader with an antenna. The reader sends out electromagnetic waves. The tag
antenna is tuned to receive these waves. A passive RFID tag draws power from the field created
by the reader and uses it to power the microchip's circuits. The chip then modulates the waves
that the tag sends back to the reader, which converts the new waves into digital data. For more
information on the components of a complete system used in businesses, see Getting Started.

RFID technology can deliver benefits in many areas, from tracking work in process to
speeding up throughput in a warehouse. As the technology becomes standardized, it will be used
more and more to track goods in the supply chain. The aim is to reduce administrative error,
labor costs associated with scanning bar codes, internal theft, errors in shipping goods and
overall inventory levels.
 Thousands of companies around the world use RFID today to improve internal
efficiencies. Club Car, a maker of golf carts uses RFID to improve efficiency on its production
line. Paramount Farms—one of the world's largest suppliers of pistachios—uses RFID to manage
its harvest more efficiently. NYK Logistics uses RFID to improve the throughput of containers at
its busy Long Beach, Calif., distribution center. And many other companies are using RFID for a
wide variety of applications.

RFID stands for Radio Frequency Identification.

An RFID system requires a RFID reader and a RFID tag:

 A reader, including an antenna -Device that is used to read and/or write data to RFID
tags.

 A tag-Transponder that carries data transmits to a reader. Tag with the data in it can
identify an item in manufacture, goods in transit, location, vehicle, an animal or
individual.

 The communication-RFID uses a defined radio frequency to transmit and receive data
from tags. The data travels through radio waves.

Frequency:
The frequency bands are divided into three:

Low Frequency (LF) – 100-500 KHz.

High Frequency (HF) – 13.56 MHz.
Ultra High Frequency (UHF) – 850 MHz – 5.8 GHz .

Short and Medium range RFID security solutions use low and high frequency bands.

Typical applications in India include:

 Access Control

 Smart Card

 Inventory Management

 Animal Identification

Long range RFID solutions use ultra high frequency bands. Few security applications that use
ultra high frequency in India are:

 Long-range Access Control

 Toll Collection

 Expensive Equipments & Items

 Customer Location for Luxury Applications

(from Aimglobal 2000)
 (from Aimglobal 2000)

Classification of Tags:

Active:

 Contain a battery

 Longer range possible (10-15 feet or more)

 Expensive (e.g., Apple has one for over $25)

Semi-passive:

 Contain a dormant battery

 Intermediate range

 Mid-range price (over $1)

Passive:

 Draw energy from an electromagnetic field

FREQUENCY BANDS AND APPLICATIONS:

Frequency Band Characteristics Typical Applications

Low Short to medium read range Access control

100-500 kHz Inexpensive Animal identification
low reading speed Inventory control
Car immobilizer

Intermediate Short to medium read range Access control

10-15 MHz potentially inexpensive Smart cards
 medium reading speed

High Long read range Railroad car monitoring

850-950 MHz High reading speed Toll collection systems
2.4-5.8 GHz Line of sight required
Expensive

Cheapest to produce (30 to 50 cents)

OTHER APPLICATION OF RFID:

Corporate/campus cards E.g., cafeteria vending, parking, etc.

Hazardous materials Avoids the need for physical contact

Luggage tagging E.g., baggage tagging and boarding passes

Time and attendance management To identify in- and out- times

RFID system components:

Ethernet

RFID
Reader

RFID Tag RF Antenna Network Workstation

RFID applications:

 Manufacturing and Processing

Inventory and production process monitoring

Warehouse order fulfillment

 Supply Chain Management

Inventory tracking systems

Logistics management

 Retail

Inventory control and customer insight

Auto checkout with reverse logistics

 Security

Access control

Counterfeiting and Theft control/prevention

 Location Tracking

Traffic movement control and parking management

Wildlife/Livestock monitoring and tracking

Antenna fields: Inductive coupling:

Antenna fields: Propagation coupling:

Transceive RFID
r Tag
Tag antenna
Reader
(
f
antenna
r
o
Operational frequencies: m

A
i
m
g
l
o
b
a
l

2
0
0
0
)
 UHF Microwave
Frequency LF HF
868 - 915 2.45 GHz &
Ranges 125 KHz 13.56 MHz
MHz 5.8 GHz
Typical Max
Shortest Short Medium Longest
Read Range 1”-12” 2”-24” 1’-10’ 1’-15’
(Passive Tags)
Active tags with
Generally passive Active tags with
integral battery
Generally passive tags only, using integral battery or
Tag Power tags only, using inductive or
or passive tags
passive tags using
Source using capacitive
inductive coupling capacitive capacitive storage,
storage,
coupling E-field coupling
E-field coupling
Data Rate Slower Moderate Fast Faster
Ability to read
near Better Moderate Poor Worse
metal or wet
surfaces
Access Control &
Security
Identifying widgets Highway toll Tags
Library books supply chain
through Identification of
Laundry tracking
manufacturing private vehicle
Applications processes or in
identification Highway toll
fleets in/out of a
Access Control Tags
harsh environments yard or facility
Employee IDs
Ranch animal Asset tracking
identification
Employee IDs

GSM MODEM:
 Model of gsm modem

• Sim300 - gsm/gprs engine.

• Works on frequencies egsm 900 mhz, dcs 1800 mhz and pcs 1900 mhz.
• Sim300 features gprs multi-slot class 10/ class 8 (optional) and supports the gprs
coding schemes.

Feautures of gsm kit:

This gsm modem is a highly flexible plug and play quad band gsm modem for
direct and as integration to rs232.

• Supports features like voice, data/fax, sms, gprs and integrated tcp/ip stack.
• Control via at commands.
• Use ac – dc power adaptor with following ratings · dc voltage : 12v /1a.
• Current consumption in normal operation 250ma, can rise up to 1amp while
transmission.

Introduction:

This document describes the hardware interface of the simcom sim300 module that
connects to the specific application and the air interface. As sim300 can be integrated
with a wide range of applications, all functional components of sim300 are described in
great detail. This document can help you quickly understand sim300 interface
specifications, electrical and mechanical details. With the help of this document and other
sim300 application notes, user guide, you can use sim300 module to design and set-up
mobile applications quickly
Product concept :

Designed for global market, sim300 is a tri-band gsm/gprs engine that works on
frequencies egsm 900 mhz, dcs 1800 mhz and pcs1900 mhz. Sim300 provides gprs multi-
slot class 10 capability and support the gprs coding schemes cs-1, cs-2, cs-3 and cs-4.

With a tiny configuration of 40mm x 33mm x 2.85 mm , sim300 can fit almost all the
space requirement in your application, such as smart phone, pda phone and other mobile
device.
The physical interface to the mobile application is made through a 60 pins board-to-board
connector, which provides all hardware interfaces between the module and customers’
boards except the rf antenna interface.
  The keypad and spi lcd interface will give you the flexibility to develop
customized applications.

 Two serial ports can help you easily develop your applications.

Two audio channels include two microphones inputs and two speaker outputs. This
can be easily configured by at command.

Sim300 provide rf antenna interface with two alternatives: antenna connector and antenna
pad. The antenna connector is murata mm9329-2700. And customer’s antenna can be
soldered to the antenna pad. The sim300 is designed with power saving technique, the
current consumption to as low as 2.5ma in sleep mode. The sim300 is integrated with the
tcp/ip protocol，extended tcp/ip at commands are developed for customers to use the
tcp/ip protocol easily, which is very useful for those data transfer applications.

Sim300 key features at a glance:

Application interface:

All hardware interfaces except rf interface that connects sim300 to the customers’
cellular application platform is through a 60-pin 0.5mm pitch board-to-board connector.
Sub-interfaces included in this board-to-board connector are described in detail in
following chapters:

• Power supply
• Dual serial interface
• Two analog audio interfaces
• Sim interface

Electrical and mechanical characteristics of the board-to-board connector are specified.

There we also order information for mating connectors.
Power supply:

The power supply of sim300 is from a single voltage source of vbat= 3.4v...4.5v.
In some case, the ripple in a transmit burst may cause voltage drops when current
consumption rises to typical peaks of 2a, so the power supply must be able to provide
sufficient current up to 2a. For the vbat input, a local bypass capacitor is recommended.
A capacitor (about 100μf, low esr) is recommended. Multi-layer ceramic chip
(mlcc) capacitors can provide the best combination of low esr and small size but may not
be cost effective. A lower cost choice may be a 100 μf tantalum capacitor (low esr) with a
small (1 μf to 10μf) ceramic in parallel, which is illustrated as following figure. And the
capacitors should put as closer as possible to the sim300 vbat pins. The following figure
is the recommended circuit.

The following figure is the vbat voltage ripple wave at the maximum power transmit
phase, the test condition is vbat=4.0v, vbat maximum output current =2a, ca=100 μf

tantalum capacitor (esr=0.7ω) and cb=4.7μf

Power supply pins on the board-to-board connector:

Eight vbat pins of the board-to-board connector are dedicated to connect the
supply voltage; four gnd pins are recommended for grounding. Backup can be used to
back up the rtc.

Minimizing power losses:

Please pay special attention to the supply power when you are designing your
applications. Please make sure that the input voltage will never drops below 3.4v even in
a transmit burst during which the current consumption may rise up to 2a. If the power
voltage drops below 3.4v, the module may be switched off. Using the board-to-board
connector will be the best way to reduce the voltage drops. You should also take the
resistance of the power supply lines on the host board or of battery pack into account.

Monitoring power supply:

To monitor the supply voltage, you can use the “at+cbc” command which include
three parameters: voltage percent and voltage value (in mv). It returns the battery voltage
1-100 percent of capacity and actual value measured at vbat and gnd.
The voltage is continuously measured at intervals depending on the operating mode. The
displayed voltage (in mv) is averaged over the last measuring period before the at+cbc
command was executed.

Power up and power down scenarios Turn on sim300:

Sim300 can be turned on by various ways, which are described in following

• Via pwrkey pin: starts normal operating mode

• Via rtc interrupt: starts alarm modes

Turn on sim300 using the pwrkey pin (power on):

You can turn on the sim300 by driving the pwrkey to a low level voltage
For period time. The power on scenarios illustrate as following figure.

Turn on sim300 using the rtc (alarm mode):

Alarm mode is a power-on approach by using the rtc. The alert function of rtc
makes the sim300 wake up while the module is power off. In alarm mode, sim300 will
not register to gsm network and the software protocol stack is close. Thus the parts of at
commands related with sim card and protocol stack will not accessible, and the others can
be used as well as in normal mode. Use the at+calarm command to set the alarm time.
The rtc remains the alarm time if sim300 was power down by “at+cpowd=1” or by
pwrkey pin. Once the alarm time expires and executed, sim300 goes into the alarm mode.
In this case, sim300 will send out an unsolicited result code (urc):

Rdy alarm mode:

During alarm mode, using at+cfun command to query the status of software
protocol stack; it will return 0 which indicates that the protocol stack is closed. Then after
90s, sim300 will power down automatically. However, during alarm mode, if the
software protocol is started by at+cfun=1, 1 command, the process of automatic power
down will not available. In alarm mode, driving the pwrkey to a low level voltage for a
period will cause sim300 to power down

Turn off sim300:

Following procedure can be used to turn off the sim300:

• Normal power down procedure: turn off sim300 using the pwrkey pin
• Normal power down procedure: turn off sim300 using at command
• Under-voltage automatic shutdown: takes effect if under-voltage is detected
• Over-temperature automatic shutdown: takes effect if over-temperature is detected

Turn off sim300 using the pwrkey pin (power down) :

You can turn off the sim300 by driving the pwrkey to a low level voltage for period time.
The power down scenarios illustrate as following figure. This procedure will let the
module to log off from the network and allow the software to enter into a secure state and
save data before completely disconnect the power supply. Before the completion of the
switching off procedure the module will send out result code:
Power down:

After this moment, no any at commands can be executed. Module enters the power down
mode, only the rtc is still active. Power down can also be indicated by vdd_ext pin, which
is a low level voltage in this mode.

Turn off sim300 using at command :

You can use an at command “at+cpowd=1” to turn off the module. This command will
let the module to log off from the network and allow the software to enter into a secure
state and safe data before completely disconnect the power supply.

Power down:

After this moment, no any at commands can be executed. Module enters the power down
mode, only the rtc is still active. Power down can also be indicated by vdd_ext pin, which
is a low level voltage in this mode
Under-voltage automatic shutdown:

Software will constantly monitors the voltage applied on the vbat, if the measured battery
voltage is no more than 3.5v, the following urc will be presented:

Power low warning:

If the measured battery voltage is no more than 3.4v, the following urc will be presented:

Power low down:

After this moment, no further more at commands can be executed. The module will log
off from network and enters power down mode, only the rtc is still active. Pow
Restart sim300 using the pwrkey pin :

You can restart sim300 by driving the pwrkey to a low level voltage for period time,
same as turn on sim300 using the pwrkey pin. Before restart the sim300, you need delay
at least 500ms from detecting the vdd_ext low level on. The restart scenarios illustrate as
the following figure.
Power saving :

There are two methods to achieve sim300 module extreme low power. “at+cfun” is used
to set module into minimum functionality mode and /dtr hardware interface signal can be
used to set system to be sleep mode (or slow clocking mode).

Minimum functionality mode :

Minimum functionality mode reduces the functionality of the module to a minimum and,
thus, minimizes the current consumption to the lowest level. This mode is set with the
“at+cfun” command which provides the choice of the functionality levels
<fun>=0，1，4

0: minimum functionality;

1: full functionality (default);

4: disable phone both transmit and receive rf circuits;

If sim300 has been set to minimum functionality by “at+cfun=0”, then the rf function
and sim card function will be closed, in this case, the serial ports is still accessible, but all
at commands need rf function or sim card function will not accessible. If sim300 has
disable all rf function by “at+cfun=4”, then rf function will be closed, the serial ports is
still active in this case but all at commands need rf function will not accessible. When
sim300 is in minimum functionality or has been disable all rf functionality by
“at+cfun=4”, it can return to full functionality by “at+cfun=1”.

Sleep mode (slow clocking mode) :

 Through dtr signal control sim300 module to enter or exit the sleep mode in
customer applications. When dtr is in high level, at the same time there is no on air or
audio activity is required and no hardware interrupt (such as gpio interrupt or data on
serial port), sim300 will enter sleep mode automatically. In this mode, sim300 can still
receive paging or sms from network. In sleep mode, the serial port is not accessible.

Wake up sim300 from sleep mode :

When sim300 is sleep mode, the following method can wake up the module. Enable dtr
pin to wake up sim300; If dtr pin is pull down to a low level this signal will wake up
sim300 from power saving mode. The serial port will be active after dtr change to low
level about 20m
 Receive a voice or data call from network to wake up sim300;
 Receive a sms from network to wake up sim300
 Rtc alarm expired to wake up sim300;
ATMEGA MICRO CONTROLLER

PIN DIAGRAM:
FEATURES:

 High-performance, Low-power AVR, 8-bit Microcontroller

 Advanced RISC Architecture
 Nonvolatile Program and Data Memories
 Two 8-bit Timer/Counters with Separate Prescaler, one Compare Mode
 Byte-oriented Two-wire Serial Interface
 Programmable Serial USART
 Master/Slave SPI Serial Interface
 Programmable Watchdog Timer with Separate On-chip Oscillator
 On-chip Analog Comparator
 Power-on Reset and Programmable Brown-out Detection
 Internal Calibrated RC Oscillator
 External and Internal Interrupt Sources
 I/O and Packages
 23 Programmable I/O Lines
 28-lead PDIP, 32-lead TQFP, and 32-pad MLF
  Operating Voltages
 2.7 - 5.5V (ATmega16L)
 4.5 - 5.5V (ATmega16)
 Speed Grades
 0 - 8 MHz (ATmega16L)
 0 - 16 MHz (ATmega16)
 Power Consumption at 4 Mhz, 3V, 25°C
 Active: 3.6 Ma
 Idle Mode: 1.0 mA
 Power-down Mode: 0.5

DESCRIPTION:
The ATmega16 is a low-power CMOS 8-bit microcontroller based on the
AVR RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega16 achieves throughputs approaching 1 MIPS per MHz, allowing the system
designed to optimize power consumption versus processing speed. The AVR core
combines a rich instruction set with 32 general-purpose working registers. All the 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two
independent registers to be accessed in one single instruction executed in one clock cycle.
The resulting architecture is more code efficient while achieving throughputs up to ten
times faster than conventional CISC microcontrollers.
The device is manufactured using Atmel’s high-density non-volatile memory
technology. The Flash Program memory can be reprogrammed In-System through an SPI
serial interface, by a conventional non-volatile memory programmer, or by an On-chip
boot program running on the AVR core. The boot program can use any interface to
download the application program in the Application Flash memory. Software in the
Boot Flash Section will continue to run while the Application Flash Section is updated,
providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-
System Self- Programmable Flash on a monolithic chip, the Atmel ATmega16 is a
powerful microcontroller that provides a highly flexible and cost-effective solution to
many embedded control applications. The ATmega16 AVR is supported with a full suite
of program and system development tools, including C compilers, macro assemblers,
program debugger/simulators, In-Circuit Emulators, and evaluation kits.

PIN DESCRIPTIONS:
VCC: Digital supply voltage.
GND
AVCC: AVCC is the supply voltage pin for the A/D Converter, Port C (3-0) and ADC
(7-6). It should be externally connected to VCC, even if the ADC is not used.
If the ADC is used, it should be connected to VCC through a low-pass filter. Note that
Port C (5-4) use digital supply voltage, VCC.
AREF: AREF is the analog reference pin for the A/D Converter.
Port B: (PB7 – PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected
for each bit). The Port B output buffers have symmetrical drive characteristics with both
high sink and source capability.

As inputs, Port B pins that are externally pulled low will source current if the pull-
up resistors are activated. The Port B pins are tri-stated when a reset condition becomes
active, even if the clock is not running.

Port C: (PC5 - PC0)

Port C is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port C output buffers have symmetrical drive characteristics with both high sink
and source capability.
 As inputs, Port C pins that are externally pulled low will source current if the pull-
up resistors are activated. The Port C pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Port D: (PD7- PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected
for each bit). The Port D output buffers have symmetrical drive characteristics with both
high sink and source capability.
As inputs, Port D pins that are externally pulled low will source current if the pull-
up resistors are activated. The Port D pins are tri-stated when a reset condition becomes
active even if the clock is not running.
PC6/RESET:
If the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin. Note that the
electrical characteristics of PC6 differ from those of the other pins of Port C PC6 is used
as a Reset input.
RESET (Reset input). A low level on this pin for longer than the minimum pulse length
will generate a reset, even if the clock is not running.
AVR CPU CORE:
Introduction:
This section discusses the AVR core architecture in general. The main function of
the CPU core is to ensure correct program execution. The CPU must therefore be able to
access memories, perform calculations, control peripherals, and handle interrupts.
 FUNCTIONAL BLOCK DIAGRAM OF MICROCONTROLLER
ATMEGA16:

Architectural Overview:
Block Diagram of the AVR MCU Architecture is shown in above figure in order
to maximize performance and parallelism, the AVR uses Harvard architect with separate
memories and buses for program and data. Instructions in the Program memory are
executed with a single level pipelining. While one instruction is being executed, the next
instruction is pre-fetched from the Program memory. This concept enables instructions to
be executed in every clock cycle
The Program memory is in System Reprogrammable Flash memory. The fast-
access Register File contains 32 x 8-bit general purpose working registers with a single
clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU)
operation. In a typical ALU operation, two operands are output from the Register File,
the operation is executed, and the result is stored back in the Register File – in one clock
cycle.
 Arithmetic Logic Unit – ALU:
The high-performance AVR ALU operates in direct connection with all the 32
general purpose-working registers. Within a single clock cycle, arithmetic operations
between general-purpose registers or between a register and an immediate are executed.
The ALU operations are divided into three main categories – arithmetic, logical,
and bit-functions. Some implementations of the architecture also provide a powerful
multiplier supporting both signed/unsigned multiplication and fractional format. See the
“Instruction Set” section for a detailed description.
 Status Register:
The Status Register contains information about the result of the most recently
executed arithmetic instruction. This information can be used for altering program flow
in order to perform conditional operations. Note that the Status Register is updated after
all ALU operations, as specified in the Instruction Set Reference.
This will in many cases remove the need for using the dedicated compare instructions,
resulting in faster and more compact code.
The Status Register is not automatically stored when entering an interrupt routine and
restored when returning from an interrupt. This must be handled by software.
The AVR Status Register – SREG – is defined as:
  Bit 7 – I: Global Interrupt Enable

The Global Interrupt Enable bit must be set for the interrupts to be enabled. The
individual interrupt enable control is then performed in separate control registers. If the
Global Interrupt Enable Register is cleared, none of the interrupts are enabled
independent of the individual interrupt enable settings. The I-bit is cleared by hardware
after an interrupt has occurred, and is set by the RETI instruction to enable subsequent
interrupts. The I-bit can also be set and cleared by the application with the SEI and CLI
instructions, as described in the Instruction Set Reference.

 Bit 6 – T: Bit Copy Storage

Bit Copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit as source
or destination for the operated bit. A bit from a register in the Register File can be copied
into T by the BST instruction, and a bit in T can be copied into a bit in a register in the
Register File by the BLD instruction.
 Bit 5 – H: Half Carry Flag
The Half Carry Flag H indicates a Half Carry in some arithmetic operations. Half
Carry is useful in BCD arithmetic. See the “Instruction Set Description” for detailed
information.

 Bit 4 – S: Sign Bit, S = N ⊕ V

The S-bit is always an exclusive or between the Negative Flag N and the Two’s
Complement Overflow Flag V. See the “Instruction Set Description” for detailed
information.
 Bit 3 – V: Two’s Complement Overflow Flag
The Two’s Complement Overflow Flag V supports two’s complement arithmetic’s.
See the “Instruction Set Description” for detailed information.
 Bit 2 – N: Negative Flag
 The Negative Flag N indicates a negative result in an arithmetic or logic operation.
See the “Instruction Set Description” for detailed information.

 Bit 1 – Z: Zero Flag

The Zero Flag Z indicates a zero result in an arithmetic or logic operation. See the
“Instruction Set Description” for detailed information.
 Bit 0 – C: Carry Flag
The Carry Flag C indicates a Carry in an arithmetic or logic operation. Set
Description” for detailed information.
GENERAL PURPOSE REGISTER FILE:
The Register File is optimized for the AVR Enhanced RISC instruction set. In
order to achieve the required performance and flexibility, the following input/output
schemes are Supported by the Register File:

 One 8-bit output operand and one 8-bit result input.

 Two 8-bit output operands and one 8-bit result input.
 Two 8-bit output operands and one 16-bit result input.
 One 16-bit output operand and one 16-bit result input.
 The X-register, Y-register and Z-register:
The registers R26, R31 has some added functions to their general-purpose usage.
These registers are 16-bit address pointers for indirect addressing of the Data Space.
 Stack Pointer:
The Stack is mainly used for storing temporary data, for storing local variables and
for storing return addresses after interrupts and subroutine calls. The Stack Pointer
Register always points to the top of the Stack. Note that the Stack is implemented as
growing from higher memory locations to lower memory locations. This implies that a
Stack PUSH command decreases the Stack Pointer. The Stack Pointer points to the data
SRAM Stack area where the Subroutine and Interrupt Stacks are located. This stack space
in the data SRAM must be defined by the program before any subroutine calls are
executed or interrupts are enabled. The Stack Pointer must be set to point above 0x60.
The Stack Pointer is decremented by one when data is pushed onto the Stack with the
PUSH instruction, and it is decremented by two when the return address is pushed onto
the Stack with subroutine call or interrupt. The Stack Pointer is incremented by one when
data is popped from the Stack with the POP instruction, and it is incremented by two
when address is popped from the Stack with return from subroutine RET or return from
interrupt RETI. The AVR Stack Pointer is implemented as two 8-bit registers in the I/O
space. The number of bits actually used is implementation dependent. Note that the data
space in some implementations of the AVR architecture is so small that only SPL is
needed. In this case, the SPH Register will not be present.

 Instruction Execution Timing:

This section describes the general access timing concepts for instruction
execution. The AVR CPU is driven by the CPU clock CPU, directly generated from the
selected clock source for the chip. No internal clock division is used.
 Reset and Interrupt Handling:
The AVR provides several different interrupt sources. These interrupts and the
separate Reset Vector each have a separate Program Vector in the Program memory
space. All interrupts are assigned individual enable bits which must be written logic one
together with the Global Interrupt Enable bit in the Status Register in order to enable the
interrupt. Depending on the Program Counter value, interrupts may be automatically
disabled when Boot Lock Bits BLB02 or BLB12 are programmed.
 Interrupt Response Time:
The interrupt execution response for all the enabled AVR interrupts is four-clock
cycles minimum. After four clock cycles, the Program Vector address for the actual
interrupt handling routine is executed. During this 4-clock cycle period, the Program
Counter is pushed onto the Stack. The Vector is normally a jump to the interrupt routine,
and this jump takes three clock cycles. If an interrupt occurs during execution of a multi-
cycle instruction, this instruction is completed before the interrupt is served. If an
interrupt occurs when the MCU is in sleep mode, the interrupt execution response time is
increased by four clock cycles. This increase comes in addition to the start-up time from
the selected sleep mode.

 AVR ATmega16 Memories:

This section describes the different memories in the ATmega16. The AVR
architecture has two main memory spaces, the Data memory and the Program Memory
space. In addition, the ATmega16 features an EEPROM Memory for data storage. All
three memory spaces are linear and regular.
TYPES OF MEMORIES:
In-System Reprogrammable Flash Program Memory:
The ATmega16 contains 8K bytes On-chip In-System Reprogrammable Flash
memory for program storage. Since all AVR instructions are 16- or 32-bits wide, the
Flash is organized as 4K x 16 bits. For software security, the Flash Program memory
space is divided into two sections, Boot Program section and Application Program
section. The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega16 Program Counter (PC) is 12 bits wide, thus addressing the 4K Program
memory locations. The operation of Boot Program section and associated Boot Lock Bits
for software protection are described in detail in “Boot Loader Support – Read-While-
Write Self-Programming” on page 206. “Memory Programming” on page 219 contains a
detailed description on Flash Programming in SPI- or Parallel Programming mode.
Constant tables can be allocated within the entire Program memory address space (see the
LPM – Load Program memory instruction description).
DATA MEMORY:
The lower 1120 Data memory locations address the Register File, the I/O
Memory, and the internal data SRAM. The first 96 locations address the Register File and
I/O Memory, and the next 1024 locations address the internal data SRAM. The five
different addressing modes for the Data memory cover: Direct, Indirect with
Displacement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In
the Register File, registers R26 to R31 feature the indirect addressing pointer registers.
EEPROM Data Memory:
The ATmega16 contains 512 bytes of data EEPROM memory. It is organized as a
separate data space, in which single bytes can be read and written. The EEPROM has an
endurance of at least 100,000 write/erase cycles. The access between the EEPROM and
the CPU is described below, specifying the EEPROM Address Registers, the EEPROM
Data Register, and the EEPROM Control Register.
EEPROM Read/Write Access:
The EEPROM Access Registers are accessible in the I/O space.
I/O Memory:
The I/O space definition of the ATmega16 is shown in figure. All ATmega16 I/Os
and peripherals are placed in the I/O space. The I/O locations are accessed by the IN and
OUT instructions, transferring data between the 32 general-purpose working registers and
the I/O space. I/O Registers within the address range 0x00 - 0x1F are directly bit-
accessible using the SBI and CBI instructions. In these registers, the value of single bits
can be checked by using the SBIS and SBIC instructions. Refer to the instruction set
section for more details.
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 -
0x3F must be used. When addressing I/O Registers as data space using LD and ST
instructions, 0x20 must be added to these addresses. For compatibility with future
devices, reserved bits should be written to zero if accessed. The following figure is the
vbat voltage ripple wave at the maximum power transmit phase, the test condition is
vbat=4.0v, vbat maximum output current =2a, ca=100 μf tantalum capacitor (esr=0.7ω)

and cb=4.7μf.

Power supply pins on the board-to-board connector

Eight vbat pins of the board-to-board connector are dedicated to connect the
supply voltage; four ground pins are recommended for grounding. Backup can be used to
back up the RTC.

MINIMIZING POWER LOSSES

Please pay special attention to the supply power when you are designing your
applications. Please make sure that the input voltage will never drops below 3.4v even in
a transmit burst during which the current consumption may rise up to 2a. If the power
voltage drops below 3.4v, the module may be switched off. Using the board-to-board
connector will be the best way to reduce the voltage drops. You should also take the
resistance of the power supply lines on the host board or of battery pack into account.

MONITORING POWER SUPPLY

To monitor the supply voltage, you can use the “at+cbc” command which include
three parameters: voltage percent and voltage value (in mv). It returns the battery voltage
1-100 percent of capacity and actual value measured at vbat and gnd. The voltage is
continuously measured at intervals depending on the operating mode. The displayed
voltage (in mv) is averaged over the last measuring period before the at+cbc command
was executed.
POWER UP AND POWER DOWN SCENARIOS TURN ON SIM300
Sim300 can be turned on by various ways, which are described in following
 Via pwr key pin: starts normal operating mode
 Via rtc interrupt: starts alarm modes

Turn on sim300 using the pwr key pin (power on)

You can turn on the sim300 by driving the pwrkey to a low level voltage .For period
time. The power on scenarios illustrate as following figure.

Turn on sim300 using the rtc (alarm mode)

Alarm mode is a power-on approach by using the rtc. The alert function of rtc
makes the sim300 wake up while the module is power off. In alarm mode, sim300 will
not register to gsm network and the software protocol stack is close. Thus the parts of at
commands related with sim card and protocol stack will not accessible, and the others can
be used as well as in normal mode. Use the at+calarm command to set the alarm time.
The rtc remains the alarm time if sim300 was power down by “at+cpowd=1” or by pwr
key pin. Once the alarm time expires and executed, sim300 goes into the alarm mode. In
this case, sim300 will send out an unsolicited result code (urc):
READY ALARM MODE
During the alarm mode, using at+cfun commands to query the status of software
protocol stack; it will return 0 which indicates that the protocol stack is closed. Then after
the 90s, sim300 will power down automatically. However, during alarm mode, if the
software protocol is started by at+cfun=1, 1 command, the process of automatic power
down will not avail. In alarm mode, driving the pwr key to a low level voltage for a
period will cause sim300 to power down.
TURN OFF SIM300:
 Following procedure can be used to turn off the sim300:
 Normal power down procedure: turn off sim300 using the pwr key pin
 Normal power down procedure: turn off sim300 using at command
 Under-voltage automatic shutdown: takes effect if under-voltage is detected
 Over-temperature automatic shutdown: takes effect if an over - temperature is
detected
TURN OFF SIM300 USING THE PWR KEY PIN (POWER DOWN)
You can turn off the sim300 by driving the pwr key to a low level voltage for
period time. The power down scenarios illustrate as following figure. This procedure will
let the module to log off from the network and allow the software to enter into a secure
state and save data before completely disconnect the power supply. Before the
completion of the switching off procedure the module will send out result code.

POWER DOWN
After this moment, no any at commands can be executed. Module enters the power
down mode, only the rtc is still active. Power down can also be indicated by vdd_ext pin,
which is a low level voltage in this mode.
TURN OFF SIM300 USING AT COMMAND
You can use an command “at+cpowd=1” to turn off the module. This command
will let the module to log off from the network and allow the software to enter into a
secure state and safe data before completely disconnect the power supply.

POWER DOWN
After this moment, no any at commands can be executed. Module enters the power
down mode, only the rtc is still active. Power down can also be indicated by vdd_ext pin,
which is a low level voltage in this mode.
UNDER-VOLTAGE AUTOMATIC SHUTDOWN
Software will constantly monitors the voltage applied on the vbat, if the measured
battery voltage is no more than 3.5v, the following urc will be presented:

POWER LOW WARNING

If the measured battery voltage is no more than 3.4v, the following urc will be
presented
POWER LOW DOWN
After this moment, no further more at commands can be executed. The module
will log off from the network and enters the power down mode, only the rtc is still active.

RESTART SIM300 USING THE POWER KEY PIN

You can restart sim300 by driving the power key to a low level voltage for period
time, same as turn on sim300 using the power key pin. Before restarting the sim300, you
need delay at least 500ms from detecting the vdd_ext low level on.

POWER SAVING
There are two methods to achieve sim300 module extreme low power. “at+cfun”
is used to set module into minimum functionality mode and /dtr hardware interface signal
can be used to set system to be sleep mode (or slow clocking mode).

MINIMUM FUNCTIONALITY MODE

Minimum functionality mode reduces the functionality of the module to a
minimum and, thus, minimizes the current consumption to the lowest level. This mode is
set with the “at+cfun” command which provides the choice of the functionality levels
<fun>=0，1，4 0: minimum functionality; 1: full functionality (default); 4: disable
phone both transmit and receive rf circuits; If sim300 has been set to minimum
functionality by “at+cfun=0”, then the rf function and sim card function will be closed, in
this case, the serial ports is still accessible, but all at commands need rf function or sim
card function will not accessible. If sim300 has disable all rf function by “at+cfun=4”,
then rf function will be closed, the serial ports is still active in this case but all at
commands need rf function will not accessible. When sim300 is in minimum
functionality or has been disable all rf functionality by “at+cfun=4”, it can return to full
functionality by “at+cfun=1”.
Sleep Mode (Slow Clocking Mode)
Through dtr signal control sim300 module to enter or exit the sleep mode in
customer applications. When dtr is in high level, at the same time there is no on air or
audio activity is required and no hardware interrupt (such as gpio interrupt or data on
serial port), sim300 will enter sleep mode automatically. In this mode, sim300 can still
receive paging or sms from network. In sleep mode, the serial port is not accessible.
Wake up sim300 from sleep mode
1. When sim300 is sleep mode, the following method can wake up the module.
Enable DTR pin to wake up sim300;
2. If dtr pin is pull down to a low level，this signal will wake up sim300 from power
saving mode. The serial port will be active after dtr change to low level about
20ms.
3. Receive a voice or data call from network to wake up sim300;
4. Receive a sms from network to wake up sim300
5. RTC alarm expired to wake up sim300
 CHAPTER 5

SYSTEM IMPLEMENTATION

Several components are used in our tracking system. For identification, every vehicle has
been provided with 8 bit RF transmitter. Different 8 bit words are transmitted by buses of
different routes. The buses of same route may have same transmitting code if there are large
numbers of public vehicles to be tracked in large cities. We have used the microcontroller unit
which integrates RFID receiver and GSM unit placed at every bus stop. Every bus stop has 8 bit
RF receiver along with GSM modem installed to send and receive data. Whenever any bus
comes within the range of about 100 feet of the bus stop, the receiver receives the 8 bit word sent
by the transmitter in a bus, which is kept continuously on. Thus information routing is done
using the microcontroller unit which integrates RFID receiver and GSM unit placed at every bus.
The microcontroller units used at different bus stops are programmed such that they contain
GSM number of the modems placed at further bus stops. The communication between
microcontroller and modem is done using USART (Universal Synchronous Asynchronous
Receiver and Transmitter). The interfacing of RF receiver data with GSM modem is done using
microcontroller unit. The eight bits signal received at receiver are then sent to microcontroller
which decodes it and depending on the bits received sends the AT commands to the GSM
modem required for forwarding vehicle location information to central server and next stops. The
algorithm used for various microcontroller operations is as follows
 METHODOLOGY

I. Bus route mapping

In order to effeciently identify individual bus from the huge volume of buses, the bus
routes are first segmented into 4 regions: North, west, south and central. Individual bus routes are
then identified by bumbers 1 through to the maximum number of routes that encompasses that
region. Fig. 2 illustrates this separation of routes. But there will be multiple instances of the same
bus number. To identify each one individually, a character is appended in each route number. For
eg., N1, C21 and S16 are instances of bus routes (which are referred to as “bus classes”) and
N1a, C21r, S16bb are instances of individual buses of these classes.

Fig.2 Route creation

II. Database creation

A database to map the bus number received from the tag to the route is created. The fields
will include all the bus stops in that bus class and the corresponding distances between
subsequent stops. So the data table will look like Table 1. Table 1. Bus route information It is to
be noted that those stops where the display boards are placed are alone considered as valid points
to be entered in the database, and the rest are ignored, as there is no need to estimate time of
arrival at those stops.

III. Server time estimation

 The bus starts at the first stop and the reader at that terminal collects the bus number from
the tag. It sends the bus number and location identifier to the server .The server receives the
information and stores it in a temporary data table that is flushed every three to four hours.
Therefore, whenever a bus number and location is received, the server checks whether it is
already being tracked. If it is entered into the table, then the number of stops covered column is
updated. If it is a new one, then it is entered as a new row. Thus the temporary table will look
like Table 2. The server then calculates the estimated time of arrival of that particular bus at the
next stop by getting the distance. A pre-defined speed of the bus is set, which is modified
according to the time of the day. Table 2. Temporary table This modification depends on the
predicted congestion on the roads. If the time of the day is predicted to be busy, like the 8 am to
10 am period, then speed is reduced by 5 or 6 km/hr, and the reverse is done for free periods of
the day.

IV. Bus Device Module:

Driver is the one who starts the bus and its location broadcasting by logging in to the device.
The Module transmits the current bus GPS location to the server after every half minute. Driver
also give intimation if bus fails, by pressing the button on screen of android device and the
device send 3 information details to the server:

a. The location where bus has broken down.

b. The Bus number which has broken down.

c. The Driver name is driving the bus.

 CHAPTER 6

SYSTEM TESTING

The purpose of testing is to discover errors. Testing is the process of trying to discover
every conceivable fault or weakness in a work product. It provides a way to check the
functionality of components, sub assemblies, assemblies and/or a finished product It is the
process of exercising software with the intent of ensuring that the Software system meets its
requirements and user expectations and does not fail in an unacceptable manner. There are
various types of test. Each test type addresses a specific testing requirement.

TYPES OF TESTS

6.1 Unit testing

Unit testing involves the design of test cases that validate that the internal program logic
is functioning properly, and that program inputs produce valid outputs. All decision branches and
internal code flow should be validated. It is the testing of individual software units of the
application .it is done after the completion of an individual unit before integration. This is a
structural testing, that relies on knowledge of its construction and is invasive. Unit tests perform
basic tests at component level and test a specific business process, application, and/or system
configuration. Unit tests ensure that each unique path of a business process performs accurately
to the documented specifications and contains clearly defined inputs and expected results.

6.2 Integration testing

Integration tests are designed to test integrated software components to determine if they
actually run as one program. Testing is event driven and is more concerned with the basic
outcome of screens or fields. Integration tests demonstrate that although the components were
individually satisfaction, as shown by successfully unit testing, the combination of components is
correct and consistent. Integration testing is specifically aimed at exposing the problems that
arise from the combination of components.
6.3 Functional testing

Functional tests provide systematic demonstrations that functions tested are available as
specified by the business and technical requirements, system documentation, and user manuals.

Functional testing is centered on the following items:

Valid Input : identified classes of valid input must be accepted.

Invalid Input : identified classes of invalid input must be rejected.

Functions : identified functions must be exercised.

Output : identified classes of application outputs must be exercised.

Systems/Procedures : interfacing systems or procedures must be invoked.

Organization and preparation of functional tests is focused on requirements, key

functions, or special test cases. In addition, systematic coverage pertaining to identify Business
process flows; data fields, predefined processes, and successive processes must be considered for
testing. Before functional testing is complete, additional tests are identified and the effective
value of current tests is determined.

6.4 System Testing

System testing ensures that the entire integrated software system meets requirements. It
tests a configuration to ensure known and predictable results. An example of system testing is the
configuration oriented system integration test. System testing is based on process descriptions
and flows, emphasizing pre-driven process links and integration points.

6.5 White Box Testing

White Box Testing is a testing in which in which the software tester has knowledge of the
inner workings, structure and language of the software, or at least its purpose. It is purpose. It is
used to test areas that cannot be reached from a black box level.
6.6 Black Box Testing

Black Box Testing is testing the software without any knowledge of the inner workings,
structure or language of the module being tested. Black box tests, as most other kinds of tests,
must be written from a definitive source document, such as specification or requirements
document, such as specification or requirements document. It is a testing in which the software
under test is treated, as a black box .you cannot “see” into it.

6.7 Unit Testing:

Unit testing is usually conducted as part of a combined code and unit test phase of the
software lifecycle, although it is not uncommon for coding and unit testing to be conducted as
two distinct phases.

Test strategy and approach

Field testing will be performed manually and functional tests will be written in detail.

Test objectives

All field entries must work properly.

Pages must be activated from the identified link.

The entry screen, messages and responses must not be delayed.

Features to be tested

Verify that the entries are of the correct format

No duplicate entries should be allowed

All links should take the user to the correct page.

6.8 Integration Testing

 Software integration testing is the incremental integration testing of two or more
integrated software components on a single platform to produce failures caused by interface
defects. The task of the integration test is to check that components or software applications, e.g.
components in a software system or – one step up – software applications at the company level –
interact without error.

Test Results:

All the test cases mentioned above passed successfully. No defects encountered.

6.9 Acceptance Testing

User Acceptance Testing is a critical phase of any project and requires significant
participation by the end user. It also ensures that the system meets the functional requirements.

Test Results: All the test cases mentioned above passed successfully. No defects encountered.
 CHAPTER 7

CONCLUSION

Design and development of a low cost transportation management system based on

integration of RFID and GSM data is described. The system makes use of various modules
which are wirelessly linked with GSM modems. SMS service of GSM network very cost
effective so it is used for the transfer of data between the modules. This service provides the user
with the information about location of desired buses so that the user can adjust his schedule
accordingly. This technology outdates the need of waiting at the Bus-Stop thus saving a lot of
time. Displays are used at Bus-Stop to let passengers know the expected time to arrive and bus
locations coming towards that stop. The system made such that it can also handle the emergency
situations e.g., tire of bus is punctured, in case some kind of technical or non-technical fault in
bus, the operator at bus terminal is informed and the departure time between the buses is
reduced. It is believed that by the implementation of this system, problems such as un-utilization
of buses and waiting time at the bus station will be reduced. So, both bus station administrators
and passenger will benefit from the system as real time information is provided.

FUTURE SCOPE

An automatic route guider display can be installed in buses to better update the
alternative route in case of serious road congestions. We can connect RFID reader wirelessly to
the host application. There are many wireless technologies that can be used such as Bluetooth
(802.15.3) and ZigBee (802.15.4) to extend the range of an RFID reader. Fare collecting system
can also be automated by providing another mobile service to which all the passengers using
public transport are subscribed.
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