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16th
Assignment Submission
Wednesday January
Number 05 Date
2019
Question # 1
For large value of VDS the depletion layer becomes wider, causing the
resistance to increases. What will be its effect on drain current? Also draw its
graph.
Question # 3
What is meant by biasing? Explain and draw circuit diagram of JFET biasing
for VGS >0.
Question # 4
06.01.2019