1. What is Microprocessor? Give the power supply & clock frequency of 8085?

Ans:A microprocessor is a multipurpose, programmable logic device that reads binary

instructions from a storage device called memory accepts binary data as input and processes data
according to those instructions and provides result as output. The power supply of 8085 is +5V
and clock frequency in 3MHz.

2. List few applications of microprocessor-based system.

Ans: It is used:

i. For measurements, display and control of current, voltage, temperature, pressure, etc.
ii For traffic control and industrial tool control.
iii. For speed control of machines.

3. What are the functions of an accumulator?

Ans:The accumulator is the register associated with the ALU operations and sometimes I/O
operations. It is an integral part of ALU. It holds one of data to be processed by ALU. It also
temporarily stores the result of the operation performed by the ALU.

4. List the 16 – bit registers of 8085 microprocessor.

Ans:Stack pointer (SP) and Program counter (PC).

5. List the allowed register pairs of 8085.

Ans:

 B-C register pair

 D-E register pair
 H-L register pair

6. Mention the purpose of SID and SOD lines

Ans: SID (Serial input data line): It is an input line through which the microprocessor accepts
serial data.
SOD (Serial output data line): It is an output line through which the microprocessor sends
output serial data.

7. What is an Opcode?

Ans: The part of the instruction that specifies the operation to be performed is called the
operation code or opcode.
8. What is the function of IO/M signal in the 8085?

Ans: It is a status signal. It is used to differentiate between memory locations and I/O operations.
When this signal is low (IO/M = 0) it denotes the memory related operations. When this signal is
high (IO/M = 1) it denotes an I/O operation.

9. What is an Operand?

Ans: The data on which the operation is to be performed is called as an Operand.

10. How many operations are there in the instruction set of 8085 microprocessor?

Ans: There are 74 operations in the 8085 microprocessor.

11. List out the five categories of the 8085 instructions. Give examples of the instructions
for each group.

Ans:

 Data transfer group – MOV, MVI, LXI.

 Arithmetic group – ADD, SUB, INR.
 Logical group –ANA, XRA, CMP.
 Branch group – JMP, JNZ, CALL.
 Stack I/O and Machine control group – PUSH, POP, IN, HLT.

12. Explain the difference between a JMP instruction and CALL instruction.

Ans: A JMP instruction permanently changes the program counter. A CALL instruction leaves
information on the stack so that the original program execution sequence can be resumed.

13. Explain the purpose of the I/O instructions IN and OUT.

Ans: The IN instruction is used to move data from an I/O port into the accumulator. The OUT
instruction is used to move data from the accumulator to an I/O port. The IN & OUT instructions
are used only on microprocessor, which use a separate address space for interfacing.

14. What is the difference between the shift and rotate instructions?

Ans: A rotate instruction is a closed loop instruction. That is, the data moved out at one end is
put back in at the other end. The shift instruction loses the data that is moved out of the last bit
locations.

15. How many address lines in a 4096 x 8 EPROM CHIP?

Ans: 12 address lines.

16. What are the Control signals used for DMA operation?

Ans:-HOLD & HLDA.

17. What is meant by Wait State?

Ans:-This state is used by slow peripheral devices. The peripheral devices can transfer the data
to or from the microprocessor by using READY input line. The microprocessor remains in wait
state as long as READY line is low. During the wait state, the contents of the address,
address/data and control buses are held constant.

18. List the four instructions which control the interrupt structure of the 8085
microprocessor.

Ans:-

 DI ( Disable Interrupts )
 EI ( Enable Interrupts )
 RIM ( Read Interrupt Masks )
 SIM ( Set Interrupt Masks )

19. What is meant by polling?

Ans:-Polling or device polling is a process which identifies the device that has interrupted the
microprocessor.

20. What is meant by interrupt?

Ans:-Interrupt is an external signal that causes a microprocessor to jump to a specific subroutine.

21. Explain priority interrupts of 8085.

Ans:-The 8085 microprocessor has five interrupt inputs. They are TRAP, RST 7.5, RST 6.5,
RST 5.5, and INTR. These interrupts have a fixed priority of interrupt service. If two or more
interrupts go high at the same time, the 8085 will service them on priority basis. The TRAP has
the highest priority followed by RST 7.5, RST 6.5, RST 5.5. The priority of interrupts in 8085 is
shown in the table.

TRAP 1
RST 7.5 2
RST 6.5 3
RST 5.5 4
INTR 5
22. What is a microcomputer?

Ans:-A computer that is designed using a microprocessor as its CPU is called microcomputer.

23. What is the signal classification of 8085

Ans:-All the signals of 8085 can be classified into 6 groups

 Address bus
 Data bus
 Control and status signals
 Power supply and frequency signals
 Externally initiated signals
 Serial I/O ports

24. What are operations performed on data in 8085

Ans:- The various operations performed are

 Store 8-bit data

 Perform arithmetic and logical operations
 Test for conditions
 Sequence the execution of instructions
 Store data temporarily during execution in the defined R/W memory locations
called the stack

25. Steps involved to fetch a byte in 8085

Ans:-

i. The PC places the 16-bit memory address on the address bus

ii. The control unit sends the control signal RD to enable the memory chip
iii. The byte from the memory location is placed on the data bus
iv. The byte is placed in the instruction decoder of the microprocessor and the task is carried out
according to the instruction

26. How many interrupts does 8085 have, mention them

Ans:-The 8085 has 5 interrupt signals; they are INTR, RST7.5, RST6.5, RST5.5 and TRAP
27. Basic concepts in memory interfacing

Ans:-The primary function of memory interfacing is that the microprocessor should be able to
read from and write into a given register of a memory chip. To perform these operations the
microprocessor should

 Be able to select the chip

 Identify the register
 Enable the appropriate buffer

28. Define instruction cycle, machine cycle and T-state

Ans:-Instruction cycle is defined, as the time required completing the execution of an

instruction. Machine cycle is defined as the time required completing one operation of accessing
memory, I/O or acknowledging an external request. Tcycle is defined as one subdivision of the
operation performed in one clock period

29. What is an instruction?

Ans:-An instruction is a binary pattern entered through an input device to command the
microprocessor to perform that specific function

30. What is the use of ALE

Ans:-The ALE is used to latch the lower order address so that it can be available in T2 and T3
and used for identifying the memory address. During T1 the ALE goes high, the latch is
transparent ie, the output changes according to the input data, so the output of the latch is the
lower order address. When ALE goes low the lower order address is latched until the next ALE.

31. How many machine cycles does 8085 have, mention them

Ans:The 8085 have seven machine cycles. They are

 Opcode fetch
 Memory read
 Memory write
 I/O read
 I/O write
 Interrupt acknowledge
 Bus idle

32. Explain the signals HOLD, READY and SID

Ans:HOLD indicates that a peripheral such as DMA controller is requesting the use of address
bus, data bus and control bus. READY is used to delay the microprocessor read or write cycles
until a slow responding peripheral is ready to send or accept data.SID is used to accept serial data
bit by bit
33. Mention the categories of instruction and give two examples for each category.

Ans:The instructions of 8085 can be categorized into the following five categories

 Data transfer Instructions -MOV Rd,Rs STA 16-bit

 Arithmetic Instructions -ADD R DCR M
 Logical Instructions -XRI 8-bit RAR
 Branching Instructions -JNZ CALL 16-bit
 Machine control Instructions -HLT NOP

34. Explain LDA, STA and DAA instructions

Ans: LDA copies the data byte into accumulator from the memory location specified by the 16-
bit address. STA copies the data byte from the accumulator in the memory location specified by
16-bit address. DAA changes the contents of the accumulator from binary to 4-bit BCD digits.

35. Explain the different instruction formats with examples

Ans: The instruction set is grouped into the following formats

 One byte instruction -MOV C,A

 Two byte instruction -MVI A,39H
 Three byte instruction -JMP 2345H

36. What is the use of addressing modes, mention the different types

Ans: The various formats of specifying the operands are called addressing modes, it is used to
access the operands or data. The different types are as follows

 Immediate addressing
 Register addressing
 Direct addressing
 Indirect addressing
 Implicit addressing

37. What is the use of bi-directional buffers?

Ans: It is used to increase the driving capacity of the data bus. The data bus of a microcomputer
system is bi-directional, so it requires a buffer that allows the data to flow in both directions.
38. Give the register organization of 8085

Ans:

Temp.
W(8)
Reg
Temp.
Z(8)
Reg
B(8) Register
C(8) Register
D(8) Register
E(8) Register
H(8) Register
L(8) Register
Stack Pointer (16)
Program
(16)
Counter

39. Define stack and explain stack related instructions

Ans:The stack is a group of memory locations in the R/W memory that is used for the temporary
storage of binary information during the execution of the program. The stack related instructions
are PUSH & POP

40. Why do we use XRA A instruction

Ans:The XRA A instruction is used to clear the contents of the Accumulator and store the value
00H.

41. Compare CALL and PUSH instructions

Ans:

CALL PUSH
1.When CALL is executed the 1.PUSH The
microprocessor automatically programmer uses the
stores the 16-bit address of the instruction to save the
instruction next to CALL on contents of the register
the stack. pair on the stack

2.When CALL is executed the 2. When PUSH is

stack pointer is decremented executed the stack
by two pointer is decremented
by two

42. What is Microcontroller and Microcomputer

Ans:Microcontroller is a device that includes microprocessor; memory and I/O signal lines on a
single chip, fabricated using VLSI technology. Microcomputer is a computer that is designed
using microprocessor as its CPU. It includes microprocessor, memory and I/O.

43. Define Flags

Ans:The flags are used to reflect the data conditions in the accumulator. The 8085 flags are S-
Sign flag, Z-Zero flag, AC-Auxiliary carry flag, P-Parity flag, CYCarry flag, D7 D6 D5 D4 D3
D2 D1 D0

44. How does the microprocessor differentiate between data and instruction?

Ans:When the first m/c code of an instruction is fetched and decoded in the instruction register,
the microprocessor recognizes the number of bytes required to fetch the entire instruction. For
example MVI A, Data, the second byte is always considered as data. If the data byte is omitted
by mistake whatever is in that memory location will be considered as data & the byte after the
“data” will be
treated as the next instruction.

45. Compare RET and POP

Ans:

RET POP
1.POP transfers the contents of
1.RET transfers the
the top two locations of the
contents of the top two
stack to the specified register
locations of the stack to the
pair
PC
2. When POP is executed the SP
2.When RET is executed
is incremented by two
the SP is incremented by
two
3.No conditional POP
instructions
3.Has 8 conditional
RETURN instructions
46. What is assembler?

Ans:The assembler translates the assembly language program text which is given as input to the
assembler to their binary equivalents known as object code. The time required to translate the
assembly code to object code is called access time. The assembler checks for syntax errors &
displays them before giving the object code.

47. What is loader?

Ans:The loader copies the program into the computer‟s main memory at load time and begins
the program execution at execution time.

48. What is linker?

Ans:A linker is a program used to join together several object files into one large object file. For
large programs it is more efficient to divide the large program modules into smaller modules.
Each module is individually written, tested & debugged. When all the modules work they are
linked together to form a large functioning program.

49. What is interrupt service routine?

Ans:Interrupt means to break the sequence of operation. While the CPU is executing a program
an interrupt breaks the normal sequence of execution of instructions & diverts its execution to
some other program. This program to which the control is transferred is called the interrupt
service routine.
50.What are the various programmed data transfer methods?

Ans: i) Synchronous data transfer

ii) Asynchronous data transfer
iii) Interrupt driven data transfer

51. What is synchronous data transfer?

Ans:It is a data method which is used when the I/O device and the microprocessor match in
speed. To transfer a data to or from the device, the user program issues a suitable instruction
addressing the device. The data transfer is completed at the end of the execution of this
instruction.

52. What is asynchronous data transfer?

Ans:It is a data transfer method which is used when the speed of an I/O device does not match
with the speed of the microprocessor. Asynchronous data transfer is also called as Handshaking.

53. What are the basic modes of operation of 8255?

Ans: There are two basic modes of operation of 8255, They are:

1. I/O mode
2. BSR mode.

In I/O mode, the 8255 ports work as programmable I/O ports, while In BSR mode only port C
(PC0-PC7) can be used to set or reset its individual port bits. Under the IO mode of operation,
further there are three modes of operation of 8255, So as to support different types of
applications, viz. mode 0, mode 1 and mode 2.

 Mode 0 - Basic I/O mode

 Mode 1 - Strobed I/O mode
 Mode 2 - Strobed bi-directional I/O.

54. Write the features of mode 0 in 8255?

Ans:1. Two 8-bit ports (port A and port B) and two 4-bit ports (port C upper and lower) are
available. The two 4-bit ports can be combined used as a third 8-bit port.
2. Any port can be used as an input or output port.
3.Output ports are latched. Input ports are not latched.
4. A maximum of four ports are available so that overall 16 I/O configurations are possible.

55. What are the features used mode 1 in 8255?

Ans:Two groups – group A and group B are available for strobed data transfer.

1. Each group contains one 8-bit data I/O port and one 4-bit control/data port.
2. The 8-bit data port can be either used as input or output port. The inputs and outputs both are
latched.
3. Out of 8-bit port C, PC0-PC2 is used to generate control signals for port B and PC3=PC5 are
used to generate control signals for port A. The lines PC6, PC7 may be used as independent data
lines.

56. What are the signals used in input control signal & output control signal?

Ans: Input control signal

 STB (Strobe input)

 IBF (Input buffer full)
 INTR(Interrupt request)

Output control signal

 OBF (Output buffer full)

 ACK (Acknowledge input)
 INTR(Interrupt request)
57. What are the features used mode 2 in 8255?

Ans:The single 8-bit port in-group A is available.

1. The 8-bit port is bi-directional and additionally a 5-bit control port is available.
2. Three I/O lines are available at port C, viz PC2-PC0.
3. Inputs and outputs are both latched.
4. The 5-bit control port C (PC3=PC7) is used for generating/accepting handshake signals for the
8-bit data transfer on port A.

58. What are the modes of operations used in 8253?

Ans:Each of the three counters of 8253 can be operated in one of the following six modes of
operation.

1.Mode0(Interrupt on terminal count)

2.Mode1(Programmable monoshot)
3.Mode2(Rate generator)
4.Mode3(Square wave generator)
5.Mode4(Software triggered strobe)
6. Mode 5 (Hardware triggered strobe)

59. What are the different types of write operations used in 8253?

Ans:There are two types of write operations in 8253

(1) Writing a control word register

(2) Writing a count value into a count register

The control word register accepts data from the data buffer and initializes the counters, as
required. The control word register contents are used for

(a) Initializing the operating modes (mode 0-mode4)

(b) Selection of counters (counter 0- counter 2)
(c) Choosing binary /BCD counters
(d) Loading of the counter registers.

The mode control register is a write only register and the CPU cannot read its contents.

60. Give the different types of command words used in 8259a?

Ans: The command words of 8259A are classified in two groups

1. Initialization command words (ICWs)

2. Operation command words (OCWs)
61. Give the operating modes of 8259a?

Ans:

(a)Fully Nested Mode

(b) End of Interrupt (EOI)
(c) Automatic Rotation
(d) Automatic EOI Mode
(e) Specific Rotation
(f) Special Mask Mode
(g) Edge and level Triggered Mode
(h) Reading 8259 Status
(i) Poll command
(j) Special Fully Nested Mode
(k) Buffered mode
(l) Cascade mode

62. Define scan counter?

Ans: The scan counter has two modes to scan the key matrix and refresh the display. In the
encoded mode, the counter provides binary count that is to be externally decoded to provide the
scan lines for keyboard and display. In the decoded scan mode, the counter internally decodes
the least significant 2 bits and provides a decoded 1 out of 4 scan on SL0-SL3.The keyboard and
display both are in the same mode at a time.

63. What is the output modes used in 8279?

Ans: 8279 provides two output modes for selecting the display options.

1.Display Scan

In this mode, 8279 provides 8 or 16 character-multiplexed displays those can be organized as

dual 4-bit or single 8-bit display units.

2.Display Entry

8279 allows options for data entry on the displays. The display data is entered for display from
the right side or from the left side.

64. What are the modes used in keyboard modes?

Ans: 1. Scanned Keyboard mode with 2 Key Lockout.

2. Scanned Keyboard with N-key Rollover.
3. Scanned Keyboard special Error Mode.
4. Sensor Matrix Mode.
65. What are the modes used in display modes?

Ans:1. Left Entry mode

In the left entry mode, the data is entered from the left side of the display unit.

2. Right Entry Mode.

In the right entry mode, the first entry to be displayed is entered on the rightmost display.

66. What is the use of modem control unit in 8251?

Ans: The modem control unit handles the modem handshake signals to coordinate the
communication between the modem and the USART.

67. Give the register organization of 8257?

Ans: The 8257 perform the DMA operation over four independent DMA channels. Each of the
four channels of 8257 has a pair of two 16-bit registers. DMA address register and terminal
count register. Also, there are two common registers for all the channels; namely, mode set
registers and status register. Thus there are a total of ten registers. The CPU selects one of these
ten registers using address lines A0- A3.

68. What is the function of DMA address register?

Ans: Each DMA channel has one DMA address register. The function of this register is to store
the address of the starting memory location, which will be accessed by the DMA channel. Thus
the starting address of the memory block that will be accessed by the device is first loaded in the
DMA address register of the channel. Naturally, the device that wants to transfer data over a
DMA channel, will access the block of memory with the starting address stored in the DMA
Address Register.

69. What is the use of terminal count register?

Ans: Each of the four DMA channels of 8257 has one terminal count register. This 16-bit
register is used for ascertaining that the data transfer through a DMA channel ceases or stops
after the required number of DMA cycles.

70. What is the function of mode set register in 8257?

Ans: The mode set register is used for programming the 8257 as per the requirements of the
system. The function of the mode set register is to enable the DMA channels individually and
also to set the various modes of operation.
71. What is interfacing?

Ans: An interface is a shared boundary between the devices which involves sharing
information. Interfacing is the process of making two different systems communicate with each
other.

72. List the operation modes of 8255

Ans: a) I.O Mode

i. Mode 0-Simple Input/Output.

ii. Mode 1-Strobed Input/Output (Handshake mode)
iii. Mode 2-Strobed bidirectional mode

b) Bit Set/Reset Mode.

73. What is a control word?

Ans: It is a word stored in a register (control register) used to control the operation of a
program digital device.

74. What is the purpose of control word written to control register in 8255?

Ans: The control words written to control register specify an I/O function for each I.O port. The
bit D7 of the control word determines either the I/O function of the BSR function.

75.What is the size of ports in 8255?

Ans:

 Port-A : 8-bits
 Port-B : 8-bits
 Port-CU : 4-bits
 Port-CL : 4-bits
76. Distinguish between the memories mapped I/O peripheral I/O?

Ans:

Memory Mapped I/O Peripheral MappedI/O

16-bit device address 8-bit device address
Data transfer between any
Data is transfer only between
general-purpose register
accumulator and I.O port
and I/O port.
The memory map (64K) is The I/O map is independent of the
shared between I/O device memory map; 256 input device and
and system memory. 256 output device can be connected
More hardware is required Less hardware is required to
to decode 16-bit address decode 8-bit address
Arithmetic or logic Arithmetic or logical operation
operation can be directly cannot be directly performed with
performed with I/O data I/O data

77. What is memory mapping?

Ans: The assignment of memory addresses to various registers in a memory chip is called as
memory mapping.

78. What is I/O mapping?

Ans:The assignment of addresses to various I/O devices in the memory chip is called as I/O
mapping.

79. What is an USART?

Ans:USART stands for universal synchronous/Asynchronous Receiver/Transmitter. It is a

programmable communication interface that can communicate by using either synchronous or
asynchronous serial data.

80.What is the use of 8251 chip?

8251 chip is mainly used as the asynchronous serial interface between the processor and the
external equipment.

81. What is 8279?

Ans:The 8279 is a programmable Keyboard/Display interface.

82. List the major components of the keyboard/Display interface.

a. Keyboard section
b. Scan section
c. Display section
d. CPU interface section

83. What is Key bouncing?

Ans: Mechanical switches are used as keys in most of the keyboards. When a key is pressed the
contact bounce back and forth and settle down only after a small time delay (about 20ms). Even
though a key is actuated once, it will appear to have been actuated several times. This problem is
called Key Bouncing.

84.Define HRQ?

Ans: The hold request output requests the access of the system bus. In non- cascaded 8257
systems, this is connected with HOLD pin of CPU. In cascade mode, this pin of a slave is
connected with a DRQ input line of the master 8257, while that of the master is connected with
HOLD input of the CPU.

85. What is the use of stepper motor?

Ans:A stepper motor is a device used to obtain an accurate position control of rotating shafts. A
stepper motor employs rotation of its shaft in terms of steps, rather than continuous rotation as in
case of AC or DC motor.

86. What is TXD?

Ans: TXD- Transmitter Data Output This output pin carries serial stream of the transmitted data
bits along with other information like start bit, stop bits and priority bit.

87. What is RXD?

Ans: RXD- Receive Data Input This input pin of 8251A receives a composite stream of the data
to be received by 8251A.

88. What is meant by key bouncing?

Ans:Microprocessor must wait until the key reach to a steady state; this is known as Key bounce.

89. What is swapping?

The procedure of fetching the chosen program segments or data from the secondary storage into
the physical memory is called „swapping‟.
90. Write the function of crossbar switch?

Ans: The crossbar switch provides the inter connection paths between the memory module and
the processor. Each node of the crossbar represents a bus switch. All these nodes may be
controlled by one of these processors or by a separate one altogether.

91. What is a data amplifier?

Ans: Transceivers are the bi-directional buffers are some times they are called as data amplifiers.
They are required to separate the valid data from the time multiplexed address data signal. They
are controlled by 2 signals i.e DEN & DT/R.

92. What is status flag bit?

Ans: The flag register reflects the results of logical and arithmetic instructions. The flag register
digits D0, D2, D4, D6, D7 and D11 are modified according to the result of the execution of
logical and arithmetic instruction. These are called as status flag bits.

93. What is a control flag?

Ans: The bits D8 and D9 namely, trap flag (TF) and interrupt flag (IF) bits, are used for
controlling machine operation and thus they are called control flags.

94. What is instruction pipelining?

Ans: Major function of the bus unit is to fetch instruction bytes from the memory. In fact, the
instructions are fetched in advance and stored in a queue to enable faster execution of the
instructions. This concept is known as instruction pipelining.

95. Compare Microprocessor and Microcontroller.

Ans:

Microprocessor Microcontroller
Microcontroller contains the
Microprocessor contains
circuitry
ALU,general purpose
of microprocessor and in addition
registers,stack pointer,
it
program counter, clock timing
has built- in ROM, RAM, I/O
circuit and interrupt circuit.
devices, timers and counters.
It has many instructions to It has one or two instructions to
move data between memory move
and CPU. data between memory and CPU.
It has one or two bit handling It has many bit handling
instructions. instructions.
Access times for memory and Less access times for built-in
I/O memory
devices are more. and I/O devices.
Microcontroller based system
requires
Microprocessor based system
less hardware reducing PCB size
requires more hardware.
and
increasing the reliability.
 DATA TRANSFER INSTRUCTIONS
Explanation of
Opcode Operand Description
Instruction
This instruction copies the contents of the source
Rd, Rs register into the destination register; the contents of the
Copy from source register are not altered. If one of the operands is
MOV M, Rs source(Rs) to a memory location, its location is specified by the
destination(Rd) contents of the HL registers.
Rd, M
Example: MOV B, C or MOV B, M
The 8-bit data is stored in the destination register or
memory. If the operand is a memory location, its
Rd, data
Move immediate 8- location is specified by the contents of the HL
MVI
bit registers.
M, data
Example: MVI B, 57H or MVI M, 57H
The contents of a memory location, specified by a 16-
bit address in the operand, are copied to the
16-bit
LDA Load accumulator accumulator. The contents of the source are not altered.
address
Example: LDA 2034H
The contents of the designated register pair point to a
memory location. This instruction copies the contents
of that memory location into the accumulator. The
B/D Reg. Load accumulator
LDAX contents of either the register pair or the memory
pair indirect
location are not altered.

Example: LDAX B
The instruction loads 16-bit data in the register pair
Reg. pair, Load register pair designated in the operand.
LXI
16-bit data immediate
Example: LXI H, 2034H or LXI H, XYZ
The instruction copies the contents of the memory
location pointed out by the 16-bit address into register
L and copies the contents of the next memory location
16-bit Load H and L
LHLD into register H. The contents of source memory
address registers direct
locations are not altered.

Example: LHLD 2040H

STA 16-bit 16-bit address The contents of the accumulator are copied into the
address memory location specified by the operand. This is a 3-
byte instruction, the second byte specifies the low-
order address and the third byte specifies the high-
order address.

Example: STA 4350H

The contents of the accumulator are copied into the
memory location specified by the contents of the
Store accumulator operand (register pair). The contents of the
STAX Reg. pair
indirect accumulator are not altered.

Example: STAX B
The contents of register L are stored into the memory
location specified by the 16-bit address in the operand
and the contents of H register are stored into the next
memory location by incrementing the operand. The
16-bit Store H and L contents of registers HL are not altered. This is a 3-
SHLD
address registers direct byte instruction, the second byte specifies the low-
order address and the third byte specifies the high-
order address.

Example: SHLD 2470H

The contents of register H are exchanged with the
contents of register D, and the contents of register L
Exchange H and L
XCHG none are exchanged with the contents of register E.
with D and E
Example: XCHG
The instruction loads the contents of the H and L
registers into
the stack pointer register, the contents of the H register
Copy H and L provide the high-order address and the contents of the
SPHL none registers to the stack L register provide the low-order address. The contents
pointer of the H
and L registers are not altered.

Example: SPHL
The contents of the L register are exchanged with the
stack location pointed out by the contents of the stack
pointer register. The contents of the H register are
Exchange H and L exchanged with the next stack location (SP+1);
XTHL none
with top of stack however, the contents of the stack pointer register are
not altered.

Example: XTHL
 The contents of the register pair designated in the
operand are copied onto the stack in the following
sequence. The stack pointer register is decremented
and the contents of the highorder register (B, D, H, A)
Push register pair
PUSH Reg. pair are copied into that location. The stack pointer register
onto stack
is decremented again and the contents of the low-order
register (C, E, L, flags) are copied to that location.

Example: PUSH B or PUSH A

The contents of the memory location pointed out by the
stack pointer register are copied to the low-order
register (C, E, L, status flags) of the operand. The stack
pointer is incremented by 1 and the contents of that
Pop off stack to
POP Reg. pair memory location are copied to the high-order register
register pair
(B, D, H, A) of the operand. The stack pointer register
is again incremented by 1.

Example: POP H or POP A

Output data from The contents of the accumulator are copied into the
8-bit port accumulator to a I/O port specified by the operand.
OUT
address port with 8-bit
address Example: OUT F8H
Input data to The contents of the input port designated in the
8-bit port accumulator from a operand are read and loaded into the accumulator.
IN
address port with 8-bit
address Example: IN 8CH
 ARITHMETIC INSTRUCTIONS
Explanation of
Opcode Operand Description
Instruction
The contents of the operand (register or memory) are
added to the contents of the accumulator and the result is
stored in the accumulator. If the operand is a memory
R Add register or
location, its location is specified by the contents of the
ADD memory, to
HL registers. All flags are modified to reflect the result of
M accumulator
the addition.

Example: ADD B or ADD M

The contents of the operand (register or memory) and M
the Carry flag are added to the contents of the
accumulator and the result is stored in the accumulator. If
R Add register to
the operand is a memory location, its location is specified
ADC accumulator with
by the contents of the HL registers. All flags are modified
M carry
to reflect the result of the addition.

Example: ADC B or ADC M

The 8-bit data (operand) is added to the contents of the
accumulator and the result is stored in the accumulator.
Add immediate to
ADI 8-bit data All flags are modified to reflect the result of the addition.
accumulator
Example: ADI 45H
The 8-bit data (operand) and the Carry flag are added to
the contents of the accumulator and the result is stored in
Add immediate to
the accumulator. All flags are modified to reflect the
ACI 8-bit data accumulator with
result of the addition.
carry
Example: ACI 45H
The instruction loads 16-bit data in the register pair
Reg. pair, Load register pair designated in the operand.
LXI
16-bit data immediate
Example: LXI H, 2034H or LXI H, XYZ
The 16-bit contents of the specified register pair are
added to the contents of the HL register and the sum is
Add register pair stored in the HL register. The contents of the source
DAD Reg. pair to H and L register pair are not altered. If the result is larger than 16
registers bits, the CY flag is set. No other flags are affected.

Example: DAD H
SUB R Subtract register The contents of the operand (register or memory ) are
or memory from subtracted from the contents of the accumulator, and the
M accumulator result is stored in the accumulator. If the operand is a
memory location, its location is specified by the contents
of the HL registers. All flags are modified to reflect the
result of the subtraction.

Example: SUB B or SUB M

The contents of the operand (register or memory ) and M
the Borrow flag are subtracted from the contents of the
accumulator and the result is placed in the accumulator. If
R Subtract source
the operand is a memory location, its location is specified
SBB and borrow from
by the contents of the HL registers. All flags are modified
M accumulator
to reflect the result of the subtraction.

Example: SBB B or SBB M

The 8-bit data (operand) is subtracted from the contents
of the accumulator and the result is stored in the
Subtract
accumulator. All flags are modified to reflect the result of
SUI 8-bit data immediate from
the subtraction.
accumulator
Example: SUI 45H
The contents of register H are exchanged with the
Subtract
contents of register D, and the contents of register L are
immediate from
SBI 8-bit data exchanged with the contents of register E.
accumulator with
borrow
Example: XCHG
The contents of the designated register or memory) are
incremented by 1 and the result is stored in the same
R
Increment register place. If the operand is a memory location, its location is
INR
or memory by 1 specified by the contents of the HL registers.
M
Example: INR B or INR M
The contents of the designated register pair are
incremented by 1 and the result is stored in the same
Increment register
INX R place.
pair by 1
Example: INX H
The contents of the designated register or memory are M
decremented by 1 and the result is stored in the same
R Decrement
place. If the operand is a memory location, its location is
DCR register or
specified by the contents of the HL registers.
M memory by 1
Example: DCR B or DCR M
 The contents of the designated register pair are
Decrement decremented by 1 and the result is stored in the same
DCX R
register pair by 1 place.

Example: DCX H
The contents of the accumulator are changed from a
binary value to two 4-bit binary coded decimal (BCD)
digits. This is the only instruction that uses the auxiliary
flag to perform the binary to BCD conversion, and the
conversion procedure is described below. S, Z, AC, P,
CY flags are altered to reflect the results of the operation.

Decimal adjust If the value of the low-order 4-bits in the accumulator is

DAA none
accumulator greater than 9 or if AC flag is set, the instruction adds 6 to
the low-order four bits.

If the value of the high-order 4-bits in the accumulator is

greater than 9 or if the Carry flag is set, the instruction
adds 6 to the high-order four bits.

Example: DAA
 BRANCHING INSTRUCTIONS
Explanation of
Opcode Operand Description
Instruction
The program sequence is
transferred to the memory location
specified by the 16-bit address
16-bit Jump
JMP given in the operand.
address unconditionally
Example: JMP 2034H or JMP
XYZ
Flag
Opcode Description
Status
JC Jump on Carry CY = 1
Jump on no
JNC CY = 0 The program sequence is
Carry
transferred to the memory location
Jump on specified by the 16-bit address
JP S=0
positive 16-bit Jump given in the operand based on the
JM Jump on minus S = 1 address conditionally specified flag of the PSW as
JZ Jump on zero Z=1 described below.
JNZ Jump on no zero Z = 0 Example: JZ 2034H or JZ XYZ
Jump on parity
JPE P=1
even
Jump on parity
JPO P=0
odd

Flag
Opcode Description
Status
CC Call on Carry CY = 1 The program sequence is
Call on no transferred to the memory location
CNC CY = 0 specified by the 16-bit address
Carry
given in the operand. Before the
CP Call on positive S = 0 transfer, the address of the next
16-bit Unconditional
CM Call on minus S=1 instruction after CALL (the
address subroutine call
CZ Call on zero Z=1 contents of the program counter) is
pushed onto the stack.
CNZ Call on no zero Z=0
Call on parity Example: CALL 2034H or
CPE P=1
even CALL XYZ
Call on parity
CPO P=0
odd
 The program sequence is
transferred from the subroutine to
the calling program. The two bytes
Return from
from the top of the stack are copied
RET none subroutine
into the program counter,and
unconditionally
program execution begins at the
new address.

Example: RET
Flag
Opcode Description
Status
RC Return on Carry CY = 1
Return on no The program sequence is
RNC CY = 0 transferred from the subroutine to
Carry
the calling program based on the
Return on specified flag of the PSW as
RP S=0
positive Return from described below. The two bytes
RM Return on minus S = 1 none subroutine from the top of the stack are copied
RZ Return on zero Z=1 conditionally into the program counter, and
program execution begins at the
Return on no new address.
RNZ Z=0
zero
Return on parity Example: RZ
RPE P=1
even
Return on parity
RPO P=0
odd
The contents of registers H and L
are copied into the program
counter. The contents of H are
Load program
placed as the high-order byte and
PCHL none counter with HL
the contents of L as the low-order
contents
byte.

Example: PCHL
The RST instruction is equivalent
to a 1-byte call instruction to one
of eight memory locations
RST depending upon the number. The
0-7 Restart instructions are generally used in
conjunction with interrupts and
inserted using external hardware.
However these can be used as
software instructions in a program
to transfer program execution to
one of the eight locations. The
addresses are:

Restart
Instruction
Address
RST 0 0000H
RST1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H

The 8085 has four additional

interrupts and these interrupts
generate RST instructions
internally and thus do not require
any external hardware. These
instructions and their Restart
addresses are:

Restart
Interrupt
Address
TRAP 0024H
RST 5.5 002CH
RST 6.5 0034H
RST 7.5 003CH
 LOGICAL INSTRUCTIONS
Explanation of
Opcode Operand Description
Instruction
The contents of the operand (register or memory) are M
compared with the contents of the accumulator. Both
contents are preserved . The result of the comparison is
shown by setting the flags of the PSW as follows:
R Compare register
CMP or memory with
if (A) < (reg/mem): carry flag is set
M accumulator
if (A) = (reg/mem): zero flag is set
if (A) > (reg/mem): carry and zero flags are reset

Example: CMP B or CMP M

The second byte (8-bit data) is compared with the contents
of the accumulator. The values being compared remain
unchanged. The result of the comparison is shown by
setting the flags of the PSW as follows:
Compare
8-bit
CPI immediate with
data if (A) < data: carry flag is set
accumulator
if (A) = data: zero flag is set
if (A) > data: carry and zero flags are reset

Example: CPI 89H

The contents of the accumulator are logically ANDed with
M the contents of the operand (register or memory), and
Logical AND the result is placed in the accumulator. If the operand is a
R
register or memory location, its address is specified by the contents of
ANA
memory with HL registers. S, Z, P are modified to reflect the result of the
M
accumulator operation. CY is reset. AC is set.

Example: ANA B or ANA M

The contents of the accumulator are logically ANDed with

the
Logical AND 8-bit data (operand) and the result is placed in the
8-bit
ANI immediate with accumulator. S, Z, P are modified to reflect the result of the
data
accumulator operation. CY is reset. AC is set.

Example: ANI 86H

XRA R Exclusive OR The contents of the accumulator are Exclusive ORed with
register or M the contents of the operand (register or memory), and
M memory with the result is placed in the accumulator. If the operand is a
accumulator memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.

Example: XRA B or XRA M

The contents of the accumulator are Exclusive ORed with
the 8-bit data (operand) and the result is placed in the
Exclusive OR
8-bit accumulator. S, Z, P are modified to reflect the result of the
XRI immediate with
data operation. CY and AC are reset.
accumulator
Example: XRI 86H
The contents of the accumulator are logically ORed with M
the contents of the operand (register or memory), and the
Logical OR result is placed in the accumulator. If the operand is a
R
register or memory location, its address is specified by the contents of
ORA
memory with HL registers. S, Z, P are modified to reflect the result of the
M
accumulator operation. CY and AC are reset.

Example: ORA B or ORA M

The contents of the accumulator are logically ORed with
the 8-bit data (operand) and the result is placed in the
Logical OR
8-bit accumulator. S, Z, P are modified to reflect the result of the
ORI immediate with
data operation. CY and AC are reset.
accumulator
Example: ORI 86H
Each binary bit of the accumulator is rotated left by one
position. Bit D7 is placed in the position of D0 as well as in
Rotate the Carry flag. CY is modified according to bit D7. S, Z, P,
RLC none
accumulator left AC are not affected.

Example: RLC
Each binary bit of the accumulator is rotated right by one
position. Bit D0 is placed in the position of D7 as well as in
Rotate the Carry flag. CY is modified according to bit D0. S, Z, P,
RRC none
accumulator right AC are not affected.

Example: RRC
 Rotate Each binary bit of the accumulator is rotated left by one
RAL none accumulator left position through the Carry flag. Bit D7 is placed in the
through carry Carry flag, and the Carry flag is placed in the least
significant position D0. CY is modified according to bit
D7. S, Z, P, AC are not affected.

Example: RAL
Each binary bit of the accumulator is rotated right by one
position through the Carry flag. Bit D0 is placed in the
Rotate Carry flag, and the Carry flag is placed in the most
RAR none accumulator right significant position D7. CY is modified according to bit
through carry D0. S, Z, P, AC are not affected.

Example: RAR
The contents of the accumulator are complemented. No
Complement flags are affected.
CMA none
accumulator
Example: CMA
The Carry flag is complemented. No other flags are
Complement affected.
CMC none
carry
Example: CMC
Set Carry
STC none Set Carry
Example: STC
 CONTROL INSTRUCTIONS
Explanation
Opcode Operand of Description
Instruction
No operation is performed. The instruction is fetched and decoded.
No However no operation is executed.
NOP none
operation
Example: NOP
The CPU finishes executing the current instruction and halts any further
Halt and
execution. An interrupt or reset is necessary to exit from the halt state.
HLT none enter wait
state
Example: HLT
The interrupt enable flip-flop is reset and all the interrupts except the
Disable TRAP are disabled. No flags are affected.
DI none
interrupts
Example: DI
The interrupt enable flip-flop is set and all interrupts are enabled. No flags
are affected. After a system reset or the acknowledgement of an interrupt,
the interrupt enable flipflop is reset, thus disabling the interrupts. This
Enable
EI none instruction is
interrupts
necessary to reenable the interrupts (except TRAP).

Example: EI
This is a multipurpose instruction used to read the status of interrupts 7.5,
6.5, 5.5 and read serial data input bit. The instruction loads eight bits in
the accumulator with the following interpretations.

Example: RIM
Read
RIM none interrupt
mask
 This is a multipurpose instruction and used to implement the 8085
interrupts 7.5, 6.5, 5.5, and serial data output. The instruction interprets
SIM None Set interrupt the accumulator contents as follows.
mask
Example: SIM