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ANALOG ELECTRONICS

By

Design Engineer, PhD (Pursuing), M. Tech (VLSI Design),

Center For Development of Lecturer

Advance Computing Amity University Campus, Lucknow

(CDAC) Uttar Pradesh

Mohali, Punjab

(An Imprint of Laxmi Publications Pvt. Ltd.)

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(An Imprint

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RANCHI

BANGALORE e CHENNAIBOSTON

e (USA) ● NAIROBI

COCHIN (KENYA)

e GUWAHATI e HYDERABAD

JALANDHAR e KOLKATA e LUCKNOW e MUMBAI e RANCHI

· NEW DELHI • BOSTON, USA

ANALOG ELECTRONICS

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Typeset at Shubham Composer, Delhi

First Edition: 2007, New Edition : 2016

ISBN : 978-81-318-0245-8

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CONTENTS

1.1 Introduction 1

1.2 Hybrid Parameter (For Low Frequency) 2

1.3- Introduction : Hybrid-7t Model 15

1.4 Frequency Response of an Amplifier 24

1.5 High Frequency Hybrid-7t Model 34

Summary 37

Solved Numerical Problems 39

Tutorial Exercise 44

Numerical Problems 44

2. LARGE SIGNAL (POWER) AMPLIFIERS 45-86

2.1 Introduction 45

2.2 Difference between Voltage Amplifier~d Power Amplifier 46

2.3 Single Ended Transistor Power Amplifier (Large Signal Amplifier) 48

2.4 Classification of Power Amplifier 50

2.5 Class A Direct Coupled Amplifier With Resistive Load 53

2.6 Transformer Coupled Class A Amplifier 55

2.7 Class-A Push-Pull Amplifier 58

2.8 Class.-B Amplifier 61

2.9 Class-C Amplifier 62

2.10 Class-B Push Pull Amplifier 63

2.11 Complementary Symmetry Push-Pull Amplifier 66

2.12 Class-AB Operation and Cross-Over Distortion 67

2.13 Thermal Runaway 68

2.14 Power Consideration and Heat-Sinks 70

Summary 71

Solved Numerical Problems 73

Tutorial Exercise 84

Numerical Problems 84

3. MULTISTAGE AMPLIFIER AND TUNED AMPLIFIER 87-131

3.1 Introduction 87

3.2 Cascade Amplifier 88

3.3 Amplifier Coupling 90

3.4 Different Coupling Used in Multistage Amplifier 91

3.5 Effect of Coupling Capacitor on Low Frequency Response 107

3.6 Emitter Follower 107

3.7 Source Follower 108

(v)

VI Contents

3.9 Bootstrapping 113

3.10 Tuned Amplifier 115

Summary 124

Solved Numerical Problems 126

Tutorial Exercise 130

Numerical Problems 131

4. FEEDBACK IN AMPLIFIER 132-167

4.1 Introduction 132

4.2 Basic Concept of Feedback 132

4.3 Types of Feedback 136

4.4 Principle of Feedback in Amplifiers 144

4.5 Single Loop Feedback Amplifier (Principle) 145

4.6 Effects of Feedback Circuits 148

4.7 Linear Analysis of a Transistor Circuit (Miller Theorem and its Dual) 152

Summary 155

Solved Numerical Problems 156

Tutorial Exercise 166

Numerical Problems 167

5. OSCILLATORS 168-200

5.1 Introduction 168

5.2 Oscillatory Circuit 171

5.3 Conditions for Oscillations (Bark Hausen Criterion) 173

5.4 RC Oscillators 174

5.5 Hartley and Colpitt;; Oscillator 182

5.6 Crystal Oscillator 189

5.7 Frequency Stability of Oscillator 193

Summary 193

Solved Numerical Problems 194

Tutorial Exercise 199

Numerical Problems 199

6. REGULATED POWER SUPPLIES 201-271

6.1 Introduction 201

6.2 Rectifier Circuits 203

6.3 Different Ratings of Diode 217

6.4 Filters 217

6.5 Bleeder Resistance 227

6.6 Voltage Regulation 228

6.7 Current Limiting Circuits 242

6.8 Load Regulation 243

Summary 244

Solved Numerical Problems 245

Tutorial Exercise 271

INDEX 277

MA:f yut.- K. K. (}/ui,

AV.fM (hid)

{)ire<:br yeltVtU

AHdtjl UIUWritJ' ~

l~~

Arri.ttvet- Pnfor4~; Pr4JMr4r

¥ 4f Ei¢n~ c~t u~. ~ ¥ ~ ~ TecluuJ~.f)'

N~ Ilf.ditllk { ~.!.)'! y~~~U NA/tAi; {)t~r Ultivtn~ AHUitrar

/~

fOREWORD

Mr. Ashish Dixit is a well-known author of the books on Electronics. His books are widely

read by students of B.Tech. and B.E. programs as well as by the candidates appearing in career

oriented competitive examinations. The present book entitled" Analog Electronics" written by him

and Mr. Balwinder Singh also caters to all the requirements of students completely. The subject

matter has been presented to the readers in a lucid and easy to understand manner. Great care

has been taken to cover all the topics in detail and to uncover the subject matter of each and every

topic completely. A number of solved problems is another attractive feature of this book. No effort

has been spared to make this book an excellent one. I am sure that students of electronics will

found this book very useful.

I wish the readers as well as the authors best of luck and success.

Dy. Director

Amity School of Engineering (ASE)

Amity University, Lucknow Campus.

FOREWORD

I have briefly seen the complete manuscript of this book "Analog Electronics" and found

~t this is best applicable for the students of B.E./B.Tech. in developing the basics of the

fundamentals of the Analog Electronics that plays an important role in developing the basics of

the core of Electronics/Electrical Engineering. The presentation of the subject has ·been done in

such a nice way that the students will find it more lucid and easy to grasp the subject in totality.

This "Analog Electronics" book will also play a dominant role in developing the skills and

.knowledge of the students for their upcoming career oriented examinations. In conclusion, it has

been observed that the overall benefit of this book is that the author has taken the utmost care

in covering almost all of the topics and solved problems related ·to the subject.

Head of Department (HOD)

Amity School of Engineering (ASE)

Amity University, Lucknow Campus

Lucknow

FoREWORD

Since the invention of the transistor, fifty years ago, Analog Electronics as a field has come

to govern our lives. This book has brought out the development in this field in a systematic

manner. Right from transistors, amplifiers, feedback concept to oscillators and regulated power

supplies; the author has covered the topics in an exhaustive manner. This book is excellent for

a beginner / undergraduate student and shall be helpful to students wapting to have a conc:eptual

grasp on the subject.

I recommend the book for undergraduate students especially under the PTU colleges and

other Punjab Universities, as it is written as per their syllabus.

I congratulate the young authors Balwinder Singh & Ashish Dixit for this excellent book. The

effort is all the more commendable as both are teaching the subject for a number of years and the

book is a product of feedback from students.

I expect the book to be further fine tuned with the feedback from readers, which I am sure

the author shall incorporate in the next edition.

Dean Academics

Guru Nanak Dev Engin~ring College

Ludhiana

PREFACE

We feel immense pleasure in bringing this book Analog Electronics to you, although number

of books on this subject "Analog Electronics" are available in the market but they either lack in

the proper subject treatment or the solved examples are difficult to understand. The purpose of

writing this book is to present the subject matters in a most concise, compact and lucid manner.

The book comprises of the six chapters, each chapter contains the adequate text supported

by self explanatory figures, large numbers of solved examples, proper reasons basic concepts and

summary at the end of the each chapter.

While preparing manuscript, we constantly kept in mind the requirements of all the students,

regarding the latest as well as changing trend of examination, the contents of this book are

adequate, simple language and easy to understand in order to explain the topics in very simple

way, analytical and mathematical approach is provided whenever is necessary. We hope the book

will meet the requirement of students, for whom it has been designed.

We would like to thanks all our friends likes Vijay Thakur, Paramjeet Singh (USA), Mr. Neeraj

Sharma, Amit Garg (SCL, Mohali), Renu Bala, Harkamal Preet Singh, Anupamdeep Sharma,

Sumit Jain, Sachin Gupta, Megha Singla, Rajeev, Tarvinder Kaur, Umesh Pandey, Pawan Yadav,

Shivender Singh, Neha Mittal, Eila Gupta, Siddharath Sidhu, Anupam for their encouragement

during the preparation of the book.

Although every care has been taken in printing the book, yet the every factor of human error

can' t be ruled out. Any errors, omissions and suggested for the improvement of this book, brought

to our notice will be thankfully acknowledged and incorporated in next edition.

-Authors

Note of Thanks

The authors are very thankful to the following friends for their adequate guidance and encouragement

during preparing the manuscript of the book "Analog Electronics"

Mr. S.S. Gill, AP ECE GNDEC, Ludhiana

Mrs Mamta Khosla Sr. Lecturer ECE NIT, Jalandhar

Harjeet Singh, Lecturer, ECE BGIMT, Sangrur

Sarbjeet Singh, Lecturer Baba Kuma Singh lET, Amritsar

Neeraj Sharma UIET, Chandigarh

Mr. Gurpkirpal Singh, Lecturer, ECE S.S.IET, Badhni

Mr. Sharique Mohamad AP CT Institutes, Jalandhar

Kamal Kumar, Lecturer, ECE BGIMT, Sangrur

Surinder Singh Sodhi GZSCET, Bathinda

Kamalpreet Kaur, E&I Lecturer, ECE lET, Baddal Ropar

Harish Jindal, Lecturer, ECE lET, Bad~al Ropar

Prabhjot Kaur, HOD, ECE lET, Baddal Ropar

Sukhwinder Singh, Lecturer, ECE Ambala Engg. College, Ambala

Surinder Singh, Lecturer, ECE Lovely Institute of Tech., Jalandhar

Munish Rattan, Lecturer, ECE GNDEC, Ludhiana

Balwinder Dhadiwal, Lecturer, ECE GNDEC, Ludhiana

Amarpal Singh (HOD) BCET, Gurdasspur

Pawandeep Kaur, Lecturer, ECE Ludhiana CET, Ludhiana

Aarti Bansal, Lecturer, ECE SBBSIET, Padhiana, Jalandhar

Surbhi Nanda, Lecturer, ECE SBBSIET, Padhiana, Jalandhar

Manjit Kaur, Lecturer, ECE SBBSIET, Padhiana, Jalandhar

Yadwinder Singh, Lecturer, ECE YCoET, Talwandi Saboo

Manpreet Singh, Lecturer, ECE YCoET, Talwandi Saboo

Manjit Singh, Lecturer, ECE GNDU Regional campus, Jalandhar

Dhanjit Singh, Lecturer, ECE GNDU, Amritsar

Ravinder Singh, Lecturer, ECE GNDU, Amritsar

Neha Watrana, Lecturer, ECE Chitkara lET, Chandigarh

Mr. Bhavya, Lecturer, ECE NIT, Jalandhar

Manmohan Singh, Lecturer, ECE NIT, Harnirpur

Parminder Singh, Lecturer, ,ECE NIT, Harnirpur

Khamesh Kumar, Lecturer, ECE Bansthali Uni ersi , Rajsthan

Rakesh Sharma Lovely Institute of Tech., Jalandhar

At the end of this unit you will be able to learn about the

Hybrid model (for low frequency)

Calculation of h-parameters for different transistor configurations

Hybrid pi-conductance in terms low frequency h-parameters

High frequency hybrid -model

High frequency T-model

Different hybrid -conductances

Frequency response of a common emitter

Common emitter short-circuit current gain

Common emitter current gain obtained with hybrid pi-model

Cut-off frequency

Gain bandwidth product (fT)

High frequency current gain with resistive load

Calculation for the cut-off frequency

High frequency transistor differ from the low frequency transistor with reference to the

operating frequency. It means high frequency transistor operates at very high frequency

nearly in the GHz range. The most obvious generality we can make about the fabrication of

high frequency transistors is that the physical size of device must be kept small. The base

width must be narrow to reduce the transit time and the emitter and collector areas must be

small to reduce junction capacitance.

At the starting of this unit we will first discuss the hybrid model for transistor at low

frequencies. At low frequencies it is assumed that the transistor responds instantly to the

variations in input signal (i.e., voltage or current). Finally, we will discuss high frequency

equivalent circuit for different possible configuration. It should be always kept in mind that,

at high frequency, the situation is entirely different because the mechanism of transport of

charge carriers from the input to the output i.e., diffusion. Taking into the consideration of

diffusion mechanism, we will develop a high frequency model for transistor. Before going to

the entire topics in detail, first we will discuss hybrid parameter under low frequency of

operation, after that hybrid -model for high frequency of operation in detail.

Any linear circuit having input and output terminals can be analysed by four parameters

(one measured in ohm, one in mho and two dimensionless) called hybrid parameter or h-

parameter. Hybrid means “mixed” because these parameters have mixed dimensions

(units). The hybrid parameters provide mathematical approach to the analysis of transistor

circuit. Here linear circuit means a circuit in which resistances, inductances and capacitances

remain fixed when voltage across them changes. The characteristics of amplifier can be

specified easily in terms of h-parameters. These hybrid parameters are very popular and

widely used because they give accurate results and can be measured easily. We know that

transistor is a three terminal device. If one of terminal is common between input and output

terminals as shown in Figure 1.1. There are two variables first is voltage V and second is

current I. These four variables are related by the following equation.

I1 I2

+ +

V1 Linear V2

Circuit

– –

Figure 1.1

i2 = h21 i1 + h22 v2 ...(1.2)

Here the parameters h11, h12, h21 and h22 are called the hybrid parameters or h-parameters.

These parameters are related to the four variables of two port system. The value of these

parameters can be calculated by putting 2 = 0 (i.e., output terminals short circuited) and

i1 = 0 (i.e., input terminals open circuited).

For short circuit of the output terminals, we have v2 = 0, then from equation (1.1),

v1 = h11 i1 + h12. 0

or v1 = h11 i1

v1

or h11 =

i1

where h11 is input impedance with output short circuited.

From equation (1.2),

i2 = h21 i1 + h22 . 0

or i2 = h21 i1

i2

or h21 =

i1

h21 is forward current gain with output short circuited.

When input terminal is open, i.e., i1 = 0, then from equation (1.1),

v1 = h11 . 0 + h12 v2

or v1 = h12 v2

1

h21 =

2

h12 is the reverse voltage gain with input is circuited open.

From equation (1.1), i2 = h21 . 0 + h22 . v2

or i2 = h22 v2

i

or h22 = 2

v2

h22 is the output admittance with input is open circuited.

All the four hybrid parameters are given at a glance

v1

h11 = is input impedance with output shorted and have unit ohm. This parameter can

i2

be represented by hi.

i2

h21 = is forward current gain with output shorted and have no unit. Forward current

i1

gain is the ratio of output current to the input current and can be represented by hf.

v1

h12 = is the reverse voltage ratio with input open and have no unit. Reverse voltage

v2

gain the ratio of input voltage to output voltage and can be represented by hr.

i2

h22 = is the output admittance with input open and have a unit ohm–1 or mho and can

v2

be represented by ho.

Hence, these parameters consist of constants having different units and are measured with

both short and open circuited terminals. Thus, the parameters are hybrid and hence the name

hybrid parameters is justified.

The following table summaries h-parameters and their meaning.

1. h11 Input impedance Output short circuited

2. h21 Forward current gain Output short circuited

3. h12 Reverse voltage gain Input open

4. h22 Output admittance Input open

The numerical subscript notation for h-parameters (h11, h21, h12, h22) is used in general

circuit analysis. This nomenclature has been modified for a transistor to indicate the nature of

parameter and the transistor configuration used. The h-parameter of a transistor are repre-

sented by the following notation :

(i) The first letter in double subscript notation indicates the nature of parameter.

(ii) The second letter in the double subscript notation indicates the circuit arrangement (i.e.,

CB, CE or CC) used.

The following table shows the h-parameter representation for three types of configuration.

1. h11 hi hie hib hic

2. h21 hf hfe hfb hfc

3. h12 hr hre hrb hrc

4. h22 ho hoe hob hoc

Note that first letter i, r, f and o indicates input impedance reverse voltage gain, forward

current gain and output admittance respectively. The second letters b, e and c indicate CB,

CE and CC arrangement respectively.

As we know there are three types of the transistor configurations namely CE, CB and CC.

Each configuration have separate hybrid (h-parameter) equivalent circuit. But first of all we

will develop a general h-parameter equivalent circuit and with the help of this equivalent

circuit we can obtain the equivalent circuit of any type of configuration for small signal, low

frequency hybrid model of a transistor.

The h-parameter equations are

v1 = h11 . i1 + h12 v2

i2 = h21 . i1 + h22 v2

The above equations can be written in other form which are given below:

v1 = hi . i1 + hr v2 ...(1.3)

i2 = hf . i1 + ho v2 ...(1.4)

Since each term of equation (1.3) has the units X volt so we

i1 hi

will use Kirchoff’s voltage law (KVL) to find a circuit that suit +

with this equation shown in Figure 1.2. Vi hr . v2

–

In equation (1.4), each term has the units IX kirchoff’s current

law (KCL) to find a circuit that suit with this equation shown in

Figure 1.2

Figure 1.3.

The general hybrid equivalent circuit shown in Figure 1.4 can be obtain by combining

Figure 1.2 and Figure 1.3.

i2 1 hie ii i2 2

+ +

+

hf i1 ho V2 Vi hr v2 hfe ii ho V2

–

–

– 1 2

Figure 1.3 Figure 1.4

As we have discussed that in common emitter configuration, a suffix ‘e’ is added to the

h-parameters. In this configuration, input voltage is vbe (base voltage) and input current is ib

(base current) while the output voltage and output current are vce and ic. Therefore, for

common emitter configuration, the h-parameter equations are :

be = hie . ib + hre . ce

ic = hfe . ib + hoe . ie

From the above two equations, the h-parameters equivalent circuit for common emitter

configuration is shown in Figure 1.5.

B ib hie ic C

+

+

Vbe hre vce hfe ib hoe Vce

–

–

E E

Figure 1.5 Hybrid equivalent circuit for common emitter configuration.

In the common base configuration, a suffix ‘b’ is added to the h-parameters. In this

configuration input voltage is veb and input current is ie while output voltage and current are

vcb and ic. Therefore, the h-parameter equations for common base configuration will be:

eb= hib . ie + hrb . cb

ic = hfb . ie + hob . cb

From the above two equation the h-parameter equivalent circuit for common base con-

figuration is shown in Figure 1.6.

E ie hib ic C

+ +

+

Vbe hrb vcb hfb ib hob Vcb

–

– –

B B

Figure 1.6 Hybrid equivalent circuit for common Base configuration.

In the common collector configuration a suffix ‘c’ is added to the h-parameters. In this

configuration input voltage and input current are vbc and ib and the output voltage and output

current are vec and ie. Therefore, the hybrid parameter equations are

bc = hic . ib + hrc . ec

ie = hfc . ib + hoc . ec

From the above two equations, the h-parameter equivalent circuit for common collector

configuration shown in Figure 1.7.

B ib hic ie E

+ +

+

Vbc hrc vec ib hfc ie hoc Vec

–

– –

C C

Figure 1.7 Hybrid equivalent circuit for common collector configuration.

Figure 1.8 shows the circuit of a general amplifier. In this circuit, we can connect the

transistor in any one of three configurations, CE, CB or CC. The hybrid equivalent circuit

of general amplifier is shown in Figure 1.9. To get the hybrid equivalent circuit, we replace

the transistor by its small signal hybrid model.

R s 1 i1 i2

2

iL

+ Two port

Vs V1 network V2

– (transistor) RL

1 2

Figure 1.8 General amplifier circuit.

Rs 1 i1 hi i2 2

IL

+ +

Vs V1 hr V2 hf i1 ho V2 RL

– –

1 2

Figure 1.9 Hybrid equivalent circuit of general amplifier.

Now we shall derive the expressions for the current gain, voltage gain, power gain, input

resistance, output resistance in terms of h-parameter. The h-parameter equations are :

1 = hi i 1 + hr 2

i 2 = hf i 1 + ho 2

(i) Current gain : The current gain is defined as the ratio of the output current to the input

current

L i2

Ai = or Ai = – ( iL = – i2) ...(1.5)

i1 i1

From Figure 1.9, it is clear that

V 2 = iL R L = – i 2 R L

Putting the value of V2 in equation (1.4)

i2 = hf i1 + ho (– i2 RL)

or hf i1 = (1 + ho RL) i2 ...(1.6)

i2 hf

or i1 = 1 h R

0 L

From equations (1.5) and (1.6),

i2 hf

Ai = – =–

i1 1 ho R L

hf

Ai = – ...(1.7)

1 ho R L

(ii) Input resistance : The input resistance Ri is defined as the resistance we see looking

into the amplifier terminals 1 and 1 therefore,

V1

Ri =

i1

Putting the value V2 = – i2 RL in equation (1.3),

V1 = hi i1 + hr (– i2 RL)

or

V1 i

= hi – hr 2

FG IJ R RS 1

Ri

UV ...(1.8)

i1 i1 H K L

T i1 W

i2

But – = Ai

i1

Then equation (1.8) can be written as

Ri = hi + hr Ai RL

But from equation (1.7)

hf

Ai =

1 ho R L

hr h f R L

Therefore, Ri = hi –

1 ho R L

hr h f

or Ri = hi –

1

ho

RL

1

But = YL = load admittance

RL

hr h f

Ri = hi – ...(1.9)

bY L ho g

(iii) Voltage gain : The ratio of output voltage (v2) to input voltage (v1) is known as

voltage gain and represented by A v,

v2

i.e., Av = ...(1.10)

v1

but, 2 = – i2 RL ...

i2 R L

Therefore, A =– ...(1.11)

v1

i2

But current gain Ai = –

i1

i2 = – i1 A i ...(1.12)

Then equation (1.11), can be written as

i1 A i R L

Av =

1

Av = A i

FG i IJ R

1

( v1 = i1 Ri)

Hi K

2

L

RL

Av = A i ...(1.13)

Ri

From equation (1.7) and (1.13),

A =

FG hf IJ R L

...(1.14)

H 1 ho R L KR i

hf RL

Av = ...(1.15)

hi dh hi o hr h f R L i

Then equation (1.15) can be written as

hf RL

Av = – where, hi ho – hr hf = h ...(1.16)

hi hR L

Negative sign always shows that the output voltage is 180° out of phase with respect to the

input voltage.

(iv) Power gain : Power gain is the product of voltage gain and current gain,

Ap = –

hf RL FG hf IJ

bh i hR L g H1 ho R L K

h 2f R L

Ap = + ...(1.17)

bh i gb

h R L 1 ho R L g

(v) Output resistance : In order to calculate the output resistance, source voltage reduces

to zero and load resistance to infinity (i.e., open circuit) and driving the output terminals by

a voltage generator V2. The arrangement to calculate the output resistance shown in Figure

1.10.

Rs 1 i1 hi i2 2

+ +

Vs = 0 hr V2 h f i1 ho V2

– –

1 2

Figure 1.10 Hybrid equivalent circuit to calculate output resistance.

V2

Ro =

i2

But from equation (1.4),i2 = hf i1 + ho V2

V2

Ro = ...(1.18)

h f i1 ho V2

On applying KVL to the input section of the circuit, then

R s i 1 + hr V 2 + hi i 1 = 0

i1 (Rs + hi) + hr V2 = 0

hr V2

or i1 = ...(1.19)

b

R s hi g

From equations (1.18) and (1.19)

V2

Ro =

hf

FG hr V2 IJ ho V2

H R s hi K

Ro =

V2 R s b hi g =

bR s hi g

h f hr V2 ho V2 bR s hi g h f hr b

ho R s hi g

Ro =

bR s hi g

dh h o i h f hr i ho R s

But ho hi – hf hr = h

then, Ro =

bR s hi g ...(1.20)

h ho R s

Special Case : If source resistance Rs is zero then,

hi

Ro = ...(1.21)

h

(vi) Overall voltage gain : The ratio of output voltage v2 Rs 1

to the source voltage vs is known as overall voltage gain of

the transistor amplifier and represented by A vs.

Mathematically,

+

vs V2 Zi

2 2 1 –

Throughout Avs = = .

s 1 s

1

Avs = Av ...(1.22)

s 1

To calculate the value of Avs, we will draw the equivalent Figure 1.11

input section shown in Figure 1.11.

Zis

1 =

Zi Rs

1 Zi

or =

s Zi Rs

Then equation (1.22) can be written as

Avs = Av

FG Z IJ i

...(1.23)

HZ R K i s

Rs = 0

Therefore, Avs = Av

(vii) Overall current gain : The ratio of output current (iL) to the current delivered by the

source (is) is known as the overall current gain and represented by A is, i.e., overall current

gain

iL i

Ais = =– 2 ( iL = – i2)

is is

i2 i1

=–

i1 is

Ais = – Ai .

i1 i

2

FG Ai

IJ ...(1.24)

is i1 H K

i1 Rs

or =

is R s Zi

Now, equation (1.24) can be written as

Ais = – Ai

FG R IJ s

...(1.25)

HR Z K

s i

Therefore, Ais = – Ai.

Example 1. A common base transistor has the following values of h-parameters. hib = 28 ,

hfb = – 0.98, hrb = 5 10–4 and hob = 0.34 10–6 S. Find the values of current gain, input

resistance, voltage gain and output resistance. The load resistance is 1.2 k . The source

resistance is zero.

Sol. (i) The current gain,

h fb

Ai = –

1 hob . R L

Ai = –

0.98a f

1 0.34 10 6 1200

Ai = 0.98. Ans.

(ii) The input gain

Ri = hib + hrb . Ai . RL

Ri = 28 + 5 10–4 0.98 1200

Ri = 23 + 0.6

Ri = 28.6 . Ans.

(iii) The voltage gain

Ai RL 0.98 1200

Av = =

Ri 28.6

Av = 41. Ans.

(iv) The output gain,

R s hib hib

Ro = ,

R s . hib h h

where h = hib . hob – hrb . hfb

Putting all the values, we have

h = 28 0.34 10–6 – 5 10–4 (0.98)

h = 5 10–4

hib 28

Thus, Ro = = 4

h 5 10

Ro = 5.6 104 ohm

Ro = 56 k . Ans.

Example 2. For a common emitter transistor, define = hFE and

dc = hfe. Derive the

relationship between hFE and hfe. For what condition is = hFE.

Sol. We know that for a transistor collector current IC, base current IB and leakage current

ICBO are related by

IC = (1 + ) ICBO + IB

or IC = ICBO + ICBO + IB

or IC – ICBO = (IB + ICBO)

IC I CBO I – I CBO

= = C

IB b I CBO g

I B I CBO

where is the large signal current gain.

We know that,

IC

DC current gain for common emitter dc = = hFE.

IB

‘hFE’ is most useful to determine whether a transistor is in saturation or not. In general, the

base current (and hence the collector current). Under these conditions the large signal and the

dc betas are approximately equal.

The small signal CE forward short circuit current gain

IC

hfe = = when VCE constant

IB

Differentiating equation (1) w.r.t. IC

1=

FG I IJ bI

B

I CBO g

HIK C

B

IC

F 1 I bI g hFE

1= GH h JK

fe

B I CBO

IC

( = hfe)

hFE

hfe =

1 bI B I CBO g hFE

IC

This is the required relation between hfe and hFE.

Example 3. consider CE n-p-n transistor amplifier with load RL = 15 k and a source

resistance RS = 1000 . The h-parameters are

hie = 1.1 103 , hfe = 50, hre = 2 10–4, hoe = 25 –1

.

Calculate the value of

(i) Current gain, (ii) Voltage gain, (iii) Power gain, (iv) Input resistance, (v) Output

resistance.

Sol. (i) Current gain is given by

h fe 50

Ai = – = – 6

1 hoe . R L 1 25 10 15 103

50 50

=– 3 = –

1 375 10 1 0.375

Ai = – 36.36

We know that Ri = hie + hre Aie RL

Ri = 1.1 103 + 2.5 10–4 (– 36.36) 15 103

= 963.65

Current gain with source resistance

RS 36.36 1000 36360

(Ais) = Ai . =– = –

R ie RS 963.65 1000 1963.65

(Ais) = – 18.51

(ii) Voltage gain

RL

A v = Ai

R ie

RL

Av = Aie [ Rie = hie + hre Aie . RL]

b hie hre A ie R L g

36.36 15 10 3

Av = –

. 10 3

11 2.5 10 4 36.36 a f 15 10 3

545.4 10 3

=–

. 10 3 1363.5 10

11 1

545.4 10 3 545.4 10 3

=– =– = – 565.97

1100 136.35 963.65

Voltage gain with source resistance

R ie A hie hre A i R L

(Avs) = Avs =

bR ie RS g R ie R S

=

565.97 . 10 3

11 2.5 10 4

a36.36f 15 10 3

. 10 3

11 2.5 10 4

a 36.36 f 15 10 3 1000

565.97 963.65

=

963.65 1000

(Avs) = – 277.74

(iii) Power gain without source resistance

A p = Av . A i

= (– 565.97) (36.36)

= 20.578 103

Power gain with source resistance

(Aps) = (Avs) (Ais)

= (– 277) (– 18.51)

= 5127.27

(iv) Input resistance

Rie = hie + hre Aie . RL

Rie = 1.1 103 + 2.5 10–4 (36.36) 15 103

Rie = 1.1 103 – 136.35

Rie = 1100 – 136.35

Rie = 963.65

(v) Output resistance

R S hie

Roe =

b g

hoe R S hie h fe hre

. 10 3

1000 11

Roe =

25 10 6

d

1000 11 i

. 10 3 50 2.5 10 4

2100

= 6

25 10 2.1 10 3 125 10 4

2100 2100

= =

52.5 10 3 12.5 10 3 40 10 3

Example 4. A CE amplifier has the following h-parameters :

hie = 1.1 k ohm, hre = 0.25 10–3, hfe = 50, hoe = 25 micro mho.

If the load resistance is 1 k and source resistance is also 1 k , find :

(i) Current gain (ii) Voltage gain

h fe 50

Sol. We know that : Ai = =

1 hoe Z L 1 25 10 6 1 10 3

Ai = – 48.78

hre h fe

Zin = hie –

1

hoe

ZL

0.25 10 3 50

. 10 3

= 11

1

25 10 6

1 10 3

Zin = 1088 ohm.

Ai RS 48.78 1 10 3

Current gain, Ais = =

Z in R S 1088 1 10 3

Ais = – 23.36

Ai Z L 48.78 1 10 3

Voltage gain, Avs = =

Z in R S 1088 1 10 3

Avs = – 23.36.

Example 5. A CB transistor amplifier uses a voltage source of internal resistance

Rs = 1300 and the load resistance is RL = 1000 . The h-parameters are hib = 22 ,

hrb = 3 10–4, hfb = – 0.98 and hob = 0.5 A/V. Calculate the following :

(i) Current gain (ii) Input impedance (iii) Voltage gain

(iv) Overall voltage gain (v) Overall current gain

Sol. (i) Current gain

Ai = –

a f

0.98

1 0.5 10 6 1000

Ai = 0.98. Ans.

(ii) Input impedance

Ri = hib + hrb . Ai RL

Ri = 22 + (3 10–4) 0.98 1000

Ri = 22.3 . Ans.

(iii) Voltage gain

Ai RL 0.98 1000

Av = =

Ri 22.3

Av = 43.946. Ans.

(iv) Overall voltage gain

A . Ri

Avs =

Ri Rs

43.946 22.3 979.9958

= =

22.3 1300 1322.3

Avs = 0.7411297. Ans.

(v) Overall current gain

Ai . R s

Ais =

Ri Rs

0.98 1300 117

Ais = =

22.3 1300 1222.3

Ais = 0.963. Ans.

Earlier we have discussed hybrid model for transistor at low frequencies. At low frequencies,

it is assumed that the transistor responds instantly to the variations in input signal (i.e.,

voltage or current). However, at high frequency, the situation is entirely different because

the mechanism of the transport of the charge carriers from the input to the output i.e.,

diffusion. Taking into the consideration the diffusion mechanism, we can develop a high

frequency model for the transistor.

In other words, at high frequencies, the capacitive effects of the transistor junctions and

the delay in response of the transistor caused by the process of diffusion of carriers must be

taken into account in determining the high frequency model of a transistor.

Let us illustrate all these effects with the help of an amplifier circuit shown in Figure 1.12.

+Vcc

R1 Rc

Cc

Cbc

Cs

Cce

+

Rs Cwo RL

Cbe

+ R2 Cwe CE

Signal Vs

–

Figure. 1.12

therefore let us develop a CE model suitable for high frequencies. Figure 1.13 shows the

high frequency model or hybrid- model or Giacoetto common emitter transistor model.

This circuit is quite simple and analysis of circuits using this model is not too difficult and

provide results which are in excellent agreement with experiment at all frequencies for which

the transistor gives reasonable amplification. Furthermore, the resistive components in this

circuit may be derived from the low frequency h-parameters. All parameters (i.e., resistances

and capacitances) in the model are assumed frequency invariant (resistances and capacitance

do not vary with frequency). Parameters may vary with the quiescent operating point, but

under given bias conditions, they are reasonably constant for small signal variations. For high

frequency analysis, the transistor is replaced by this high frequency hybrid- model and

voltage gain, current gain input impedance etc., are determined.

C

rb c = 1/gb c

Cb c rb c

rbb B

B C B

rb

rce = rb e

rb e Vb e gm Vb e

Cb e 1

—

gce

E E

(a) E

(b)

(b) Diagram showing virtual base B and ohmic base

spreading resistance rbb .

Explanation of Different High Frequency Parameters Associated with hybrid-

model Parameters

(a) Base spreading resistance (rbb ): The base spreading resistance between the actual base B

and virtual base B . It represents the bulk resistance of the base. Its typical value is 100 .

(b) Resistance rb e : This is the resistance between the virtual base B and the emitter terminal

E. The typical value of rb e is 1 k .

In fact, input resistance from base to emitter with the output shorted is simply rbb + rb e

and this is the same as hie. Therefore, hie = rbb + rb e.

(c) Resistance rb c : This is the resistance between the virtual base B and the collector terminal

C. It has a large value. Its typical value is (4 – 6) M .

(d) The diffusion capacitance (Cb e) : This is the capacitance of the normally forward biased

base-emitter junction. It has a typical value of 100 pF.

(e) The transition capacitance (Cb c) : This is the transistor capacitance of the normally

reverse biased collector-base junction. It has a typical value of 3 pF.

(f) The resistance (rce) : It represents output resistance with a typical value of 80 k . Since

rce >> RL, if a load RL is connected, rce can be neglected.

(g) Controlled current source (gm Vb e) : It represents the coupling between the junctions. Its

value is proportional to the base current (Ib) . gm is the transconductance of the transistor.

The transconductance represents the small change in collector current about the operating

point produced by the small changes in base emitter voltage.

Hybrid- Parameter Values : The typical magnitudes for the elements of the hybrid-

model at room temperature and for IC = 1.3 mA are given below :

(i) gm = 50 mA/V

(ii) rbb = 100

(iii) rb e = 1 K

(iv) rb c = 4 M

(v) rce = 80 K

(vi) Cb c = 3 pF

(vii) Cb e = 100 pF

Note : Relationship Between Low Frequency h-Parameters and High Frequency Parameters :

IC

(i) gm =

VT

T

where VT = with T in °K.

11,600

At room temperature (300°K), VT = 0.026 V so, we have

gm =

b

I C in m A g

26 m V b g

h fe

(ii) rb e =

gm

(iii) rbb = hie – rb e

1 r

(iv) rb c = = be

gb c hre

1

(v) gce = = hoe – (1 + hfe) gb c.

rce

C

T-model is a alternative of small-signal hybrid- model. Although ic

the hybrid- model can be used to carry out small signal analysis of

all transistor circuits, but there are some situations in which an alterna- gm vbe

tive model shown in Figure 1.14 is much more convenient. The model B

of Figure 1.14 represents the BJT as a voltage controlled current ib +

source with the control voltage vbe. vbe re

i b = ie – i c – ie

be

or ib = – gm vbe E

re

Figure 1.14

be

or ib = (1 – gm re) ...(1.26)

re

From equation (1.26), we see clearly that the model yields the correct expressions for ic

and ie.

In this article, let us demonstrate that all the resistive components in the hybrid- model can

be obtained from the h-parameters in the CE configuration.

(i) Transistor transconductance gm : Figure 1.15 shows a p-n-p transistor in the CE

configuration with the collector shorted to the emitter for time-varying signals. In the active

region, the collector current is given by

IC = ICO – 0 IE

Now, since the short-circuit current gain given in Figure 1.1.3 is gm Vb e the transconductance

gm is defined by :

Ic

rbb

Q

–

Vcc

+

IC IE

gm = =– 0

Vb e VCE constant

Vb e

IE

or gm = 0 ...(1.27)

VE

In the above expression, we have assumed that 0 is independent of VE. If the emitter

diode resistance is re, then

VE

re = ...(1.27a)

IE

Thus, using equation 1.27 (a), we have

0

gm = ...(1.28)

re

VT

Recall that the dynamic resistance of a forward-biased diode is given by re = , where,

IE

k.T

VT =

q

k.T

i.e., re = ...(1.29)

IE . q

Now, using equations, (1.27) and (1.28) we obtain

0 IE .q I

gm = = 0 E

k.T VT

In the above expression replacing 0 IE by ICO – IC, we get

I CO I C

gm = ...(1.30)

VT

Further, for a p-n-p transistor, IC is negative. For an n-p-n transistor, IC is positive, but

the foregoing analysis (with V E = Vb e) leads to gm = (IC – ICO)/VT.

This means that for either type of transistor, gm is positive.

Since | IC | >> | ICO |, then gm is given by

IC

gm ...(1.31)

VT

T

where VT = .

11,600

It may be noted that gm is directly proportional to current and inversely proportional to

temperature. At room temperature, we have

gm =

IC amAf

26 mV

For IC = 1.3 mA, gm = 0.05 mho = 50 mA/V.

For IC = 10 mA, gm 384.6 mA/V.

These values are much larger than the transconductances obtained with FETs.

(ii) The input conductance gb e : Figure 1.16 (a) shows the hybrid- model valid at low

frequencies, where all the capacitances are negligible.

However, Figure 1.16 (b) represents the same transistor, using the h-parameter equivalent

circuit.

lb rbb rb c lc

B

B C

Vb e rb e gmVb e rce

E E

(a)

lb hie lc

B C

+

hreVce hfelb hoe

–

E E

(b)

Figure 1.16 (a) The hybrid model at low frequencies.

(b) The h-parameter model at low frequencies.

Hence, Ib flows into rb e and so

Vb e Ib r b e

The short-circuit collector current is given by

IC = gm Vb e

or IC gm Ib rb e ...(1.32)

We know that the short-circuit current gain hfe is defined as

IC

hfe = = gm rb e

Ib VCE

h fe

or rb e =

gm

Substituting the value of gm, we get

h fe VT

rb e =

IC

gm

or gb e =

h fe

It may be noted that over the range of currents for which hfe remains fairly constant, rb e is

directly proportional to temperature and inversely proportional to current.

(iii) The feedback conductance gb c : With the input open-circuited, hre is defined as the

reverse voltage gain, or from Figure 1.16 (a) with Ib = 0, we have

Vb e

hfe =

Vce

rbe

=

rb e rb c

or rb e (1 – hre) = hre rb c

Now, hre << 1, then to a good approximation, we have

rb e = hre rb c

or gb c = hre . gb e ...(1.33)

(iv) The base-spreading resistance rbb : The input resistance with the output shorted is

hie. Under these conditions, rb e is in parallel with rb c. Using equation we have,

rb e || rb c rb e

Therefore, we write

hie = rbb + rb e ...(1.34)

or rbb = hie – rb e ...(1.35)

(v) The output conductance gce : With the input open-circuited, this conductance is

defined as hoe.

For Ib = 0, we have

Vce Vce

Ic = gm Vb e ...(1.36)

rce rb c rb e

With Ib = 0, from equation (1.33), we have

Vb e = hre Vce and from equation (1.36), we have

Ic

hoe =

Vce

1 1

Now, = gm hre ...(1.37)

rce rb c

gb c

hoe = gce + gb c + gb e hfe

gb e

Simplifying, we get

gce = hoe – (1 + hfe) gb c ...(1.38)

If we take hfe >>|, the above equation may be put in the following form (Using equation

(1.33))

gce hoe – gm hre ...(1.39)

As a matter of fact, if the CE h-parameters at low frequencies are known at a given collector

current IC, the conductances or resistances in the hybrid- circuit are calculable from the following

five equations in the order given :

IC h fe h fe VT gm

(i) gm = (ii) rb e = = or gb e =

VT gm IC h fe

rb e h

(iii) rbb = hie – rb e (iv) rb c = or gb c = re

hre rb e

1

(v) gce = hoe – (1 + hfe) gb c =

rce

The hybrid- model for a transistor shown in Figure 1.13 (a) includes two capacitances. The

collector junction capacitance Cb c is the measured CB output capacitance with the input open

(IE = 0), and is usually specified by manufactures as Cbb . Since in the active region,

the collector junction is reversed biased, then Cb c is the transition capacitance and varies as

VCB–n, where n is 1/2 or 1/3 for an abrupt or graded junction, respectively.

The capacitance Cb e represents the sum of the emitter diffusion capacitance CDe and the

emitter junction capacitance CTe. For a forward biased emitter junction, CDe is usually much

larger than CTe, and therefore, we have

Cb e = CDe + CTe CDe ...(1.40)

We can show that

gm

Cb e ...(1.41)

2 fT

Experimentaly, Cb e is determined from a measurement of fT, the frequency at which the

CE short-circuit current gain drops to unity, which we will discuss later.

Example 6. A BJT has following low frequency h-parameter as Ic = 5 mA, hie = 1k ,

hre = 10–4, hfe = 100, hoe = 4 10–5 mho. Calculate the resistive parameters of the hybrid–

equivalent model.

Sol. We know that

(i) Substituting all the values, we get

I c in mA

gm =

26

5

gm = = 0.192 mho

26

(ii) Substituting all the values, we get

h fe

rb e =

gm

100

rb e = = 520.8

0.912

(iii) Substituting all the values, we get

rbb = hie – rb e

= 1000 – 520.8 = 479.17

(iv) Substituting all the values, we get

rb e

rb c =

hre

479.17

rb c = = 5.17 M .

10 4

(v) Substituting all the values, we get

gce = hoe – (1 + hfe) gb c

gce = 4 10 5

a1 100 f 4.79

1

10 6

Solving, we get gce = 1.89 10–5 mho

1

Therefore, rce = 1/gce = 5

= 52.87 k

1.89 10

Example 7. A BJT has hie = 6 k and hfe = 224 at Ic = 1 mA, with fT = 80 MHz and

Cb c = 12 pF. Determine : (i) gm, (ii) rbe, (iii) rbb and (iv) Cbe at room temperature given that

collector current is 1 mA.

Sol. gm =

I c mAa f

26

Substituting all the values, we get

1

= = 38.46 mmho

26

h fe

rb e =

gm

Substituting all the values, we get

224

rb e = 3

= 5.824 k = hie – rb e

38.46 10

Substituting all the values, we get

= 6000 – 5824 = 176

gm

Cb e = – Cb c

2 fT

Substituting all the values, we get

38.46 10 3 12 12 12

or Cb e = 12 10 76.5 10 12 10

2 80 10 6

Solving, we get Cb e = 64.5 pF.

If the input voltage of an amplifier is kept constant but its frequency is varied, it is found that

the amplifier gain :

(i) remains practically constant over a sizeable range of mid-frequencies.

(ii) decreases at low as well as at high frequencies.

A typical frequency versus gain curve (frequency response) of an RC coupled amplifier is

shown in Figure 1.17.

AV

AVm

A 3dB B

0.707 AVm

Cass band

Gain

f

0 f1 Frequency f2

(i) mid-frequency range.

(ii) lower cut-off frequency, f1.

(iii) upper cut-off frequency, f2.

Let us consider a single-stage CE transistor amplifier, or the last stage of a cascade. The load

resistor RL on this stage is the collector-circuit resistor, so that

RC = RL

In this section, let us assume that RL = 0, whereas the circuit with RL = 0 is analyzed in

the next article.

To obtain the frequency response of the transistor amplifier, we shall use the hybrid-

model as shown in Figure 1.18.

gb c

B rbb B C

+ +

Cb e IL

gm

Vbe gb e Cb e gce 1/rb e RL Vce

Vb e

– –

E E

with a resistive load RL.

The approximate equivalent circuit from which to calculate the short-circuit current gain

has been shown in Figure 1.19. Here, a current source furnishes a sinusoidal input current of

magnitude Ii, and the load current is IL.

We have neglected gb c, which should appear across terminals B C, because gb c >> gb e.

Further, gce disappears, because it is in shunt with a short-circuit. An additional approxima-

tion is also involved, in that we have neglected the current delivered directly to the output

through gb c and Cb c.

Ii

B C

gm

gb e Cb e + Cb c gmVb e IL

hfe

E E

Figure 1.19 Approximate equivalent circuit for the calculation

of the short-circuit CE current gain.

IL = – gm V b e ...(1.42)

Ii

where Vb e = ...(1.43)

gb e j b

Cb e Cb c g

The current amplification under short-circuited conditions is given by

IL

Ai =

Ii

gm

or, Ai = ...(1.44)

gb e j b Cb e Cb c g

Now, using the result given in ‘summary’, we have

h fe

Ai =

i d

j f f i

h fe

or | Ai | =

LM1 d f f i OP 2 1/ 2

N Q

g be

where, f = ...(1.45)

2 bC C g

be bc

1 gm

or f = .

h fe 2 bC be Cb c g

1

or f = ...(1.46)

2 rb e b Cb e Cb c g

1

Note : At f = f , | Ai | is equal to = 0.707 of its low-frequency value hfe. The frequency

2

range upto f is referred to as the bandwidth of the circuit. f is the frequency at which a transistor’s

CE short-circuit current gain drops 3-dB from its value at lower (mid) frequencies. Further, f

represents the maximum attainable bandwidth for the current gain of a CE amplifier with a given

transistor.

A CB amplifier has much higher 3-dB frequency than a CE amplifier. The short-circuit

current gain for CB amplifier which can be derived from the approximate high frequency

circuit of the CB amplifier with output shorted is given by :

IL h fb

| Ai | = = ...(1.47)

Ii

1

FfI

jG J

Hf K

1 h fe

where, f = ...(1.48)

d

2 rb e 1 h fb C b e i 2 rb e C b e

Now, substituting equation (1.46) in equation (1.48), we get

f =

b

h fe f C b e Cb c g ...(1.49)

Cb e

f is the (alpha) cut-off frequency at which the CB short-circuit small signal forward-

current transfer ratio (Ai) drops 3-dB from its value at low frequencies ( 1 kHz). Figure

1.20 shows the variation of Ai with frequency for CE and CB amplifiers and f and f .

A

100

(Common-emitter)

hfe

0.707 hfe Gain-bandwidth

Cut off

product

10

hfb1 Cut-off

0.707 hfb

(Common-base)

0.1

2 3 4 5 6 7 8 Frequency

10 10 10 10 10 10 10

in Hz

f fT f

We know that fT which is defined as the frequency at which the short-circuit common-emitter

current gain attains unit magnitude.

We know that the magnitude of CE short-circuit current gain is given by

h fe

| Ai | = ...(1.50)

LM1 d f / f i OP 2 1/ 2

N Q

g be1 g m

where, f = = . ...(1.51)

2 bC C g

be h 2 bC bc fe be Cb c g

Here, let us substitute

at f = fT, | Ai | = 1 in equation (1.50) then,

h fe

1= 1 LM e f / f j PO 2 1/ 2

or h 2fe = 1 + (fT / f )

2

N QT

Ff I 2

GH f JK

T

>> 1

Ff I 2

therefore, h 2fe GH f JK

T

or fT hfe f ...(1.52)

Now, using equation (1.52), we get

1 gm

fT hfe . .

h fe 2 bC be Cb c g

gm

or fT ...(1.53)

2 Cb e Cb c b g

Further, since Cb e >> Cb c, therefore, we shall have

gm

fT 2 C ...(1.54)

be

h fe

Hence, from expression, Ai =

1 d i

j f/f

h fe

we get Ai ...(1.55)

1 b

jh fe f / fT g

This equation shows the dependence of transistor’s short-circuit gain on the transistor’s

gain at low frequencies “hfe” and the high frequency characteristics “fT”.

fTMHz

VCE = 5V Ai (dB) = 20 log |Ai| 3 dB

400

T = 25ºC = 20 log hfe

300

200 6 dB/octava =

20 dB/decade

100

10 100

Ic (log scale), mA Log f Log fT log f

Now, let us note few points from the above Figures 1.21 and 1.22

(i) The parameter fT is an important high frequency characteristic of a transistor. Like other

transistor parameters, its value depends, upon the operating conditions of the device.

Typically, the dependence of fT on collector current is as shown in Figure 1.21.

(ii) Since fT hfe . f , this parameter may be given a second interpretation.

It represents the short-circuit current-gain-bandwidth product. This means that for the CE

configuration with the output shorted, fT is the product of the low-frequency current gain

and the upper 3-dB frequency.

(iii) From equation 1.54, it may be noted that there is a sense in which gain may be sacrificed

for bandwidth and vice-versa. Thus, if two transistors are available with equal fT, the

transistor with lower hfe will have a corresponding larger bandwidth.

(iv) In Figure 1.22 Ai expressed in decibels (i.e., 20 log | Ai |) is plotted against frequency on

a logarithmic frequency scale.

when f << f , Ai = – hfe and Ai (dB) approaches asymptotically the horizontal line A i (dB)

= 20 log hfe.

when f >> f ,

| Ai | hfe f / f = fT / f.

So that Ai (dB) = 20 log fT – 20 log f

Accordingly, Ai (dB) = 0 dB at f = fT

Also for f >> f

the plot approaches as an asymptote a straight line passing through the point (fT, 0) and

having a slope which causes a decrease in A i (dB) of 6-dB per octave (f is multiplied by

a factor of 2, and 20 log2 = 6-dB), or 20-dB per decade.

Further, the intersection of the two asymptotes occurs at the “corner” frequency f = f ,

where Ai is down by 3-dB. Hence, f is also known as the 3-dB frequency.

Example 8. A BJT has gm = 38 mmhos, rb e = 5.9 k , hie = 6 k , rbb = 100 , Cb c =

12 pF, Cb e = 63 pF and hfe = 224 at 1 kHz. Calculate and cut-off frequencies and fT.

Sol. We know that

h fe

f

2 rb e C b e

Substituting all the values, we get

224

f = = 95.9 MHz

2 5.9 10 3 63 10 12

1

Again, we have f =

2 rb e C b eb Cb c g

1

We know that f =

2 5.9 10 3

d63 10 12

12 10 12

i = 0.359 MHz

gm

Further, we know that fT =

2 bC be Cb c g

Substituting all the values, we get

38 10 3

fT =

2 d 63 10 12 12 10 12

i = 80.63 MHz

With a resistive load connected in the output, the high frequency equivalent circuit of a CE

transistor amplifier has been shown in Figure 1.23.

By using Miller’s theorem the circuit of Figure 1.24 can be modified as described below :

rbb Cb o

B C

B

+

rb e Vb e Cb e gm Vb e RL VCE

–

E

E

Figure 1.23 High frequency equivalent circuit with resistive load.

Miller’s theorem

Miller’s theorem states that if an impedance Z is connected between the input and output

terminals of a network which provides a voltage gain. A i an equivalent circuit that gives the

Z

same effect can be drawn by removing Z and connecting as impedance Zi = across the

1 A

ZA

input and Zo = across the output as shown in Figure 1.24.

A 1

Z

+ + + +

Z ZA

V1 V2 V1 V2

1– A A –1

– – – –

VCE gm Vb e R L

A= =

Vb e Vb e

or A = – gm R L

or 1 – A = 1 – (– gm RL) = 1 + gm RL

Since the impedance at the input gets decreased by a factor of (1 – A), therefore, the

capacitance will be increased by a factor of (1 – A) or 1 + gm RL.

The capacitance that is to be included in the output circuit will not make any significant

change in the performance and may be neglected. This results in the modified equivalent

circuit of Figure 1.25.

The total input capacitance between B and E is

rbb Cb c

B C

B

+

Cb c (1 + gm.R.)

rb e Vb e Cb e gmVb e RLVCE

–

E

E

Figure 1.25 Modified equivalent circuit.

C = Cb e + (1 + gm RL) Cb c ...(1.56)

If the effect of source resistance Rs is also taken into account, the upper 3-dB frequency f2 is

given by

1

f2 = ...(1.57)

2 R C

where R = (Rs + rbb ) || rb e

=

bR s g

rbb rb e

=

bR s g

rbb rb e

Rs rbb rb e Rs hie

and C is the total input capacitance given by

C = Cb e + (1 + gm RL) Cb c

If the effect of biasing resistors R1 and R2 are also taken into account, then

R =

bR s g

rbb rb e

Rs hie

where R s = Rs || RB

and RB = R1 || R2.

Thus, the source and biasing resistors have a strong influence in determining the upper 3-

dB frequency f2.

Example 9. A BJT has the following parameters at an operating. Current of I c = 2.6 mA

fT = 500 MHz, rb e = 1 k , rbb = 100 , Cc = 3F. Find the values of gm . Ce ; and for the

BJT.

Sol. We know that,

I c in mA

(i) gm = mho

26

Substituting all the values, we get

2.6

= = 0.1 mho

26

(ii) Also, hfe = gm rb e

= 0.1 1 103 = 100.

gm

(iii) Again, We know that Cb e = – Cb c

2 fT

Substituting all the values, we get

0.1 12

= 3 10 Farad

2 500 10 6

or Cb e =

FG 0.1 1012 IJ

3 pF

H2 500 10 6 K

or Cb e = 31.82 – 3 = 28.82 pF. Ans.

Example 10. A BJT has the following CE h-parameters

hie = 1100 , hre = 2.5 10–4, hfe = 50, hoe = 2.5 10–5 mho

(i) Determine the h-parameters for the CC and CB configurations.

(ii) Assuming base-spreading resistance value as 100 estimate the resistance hybrid-

parameters.

Sol. (i) From table, we have the CC h-parameters of the BJT expressed as under :

hic = hie = 1100

hrc = 1 – hre = 1 – 2.5 10–4 1.

hfc = – (1 + hfe) = – (1 + 50) = – 51, and

hoc = hoe = 2.5 105 mho.

Similarly, the CB h-parameters of the BJT are expressed the following relations :

hie 1100

hIb = = = 21.57

1 h fe 1 50

hie hoe

Also, hrb = – hre

1 h fe

5

1100 2.5 10 4

hrb = 2.5 10

1 50

Simplifying, we get hrb = 53.92 10–5 – 2.5 10–5

hrb = 28.92 10–5 = 2.9 10–4

5

hoe 2.5 10

Again, hob = =

1 h fe 1 50

= 0.5 10–6 mho.

(ii) The hybrid- parameters of the BJT can be obtained by using following formula of

conversion i.e.,

rb e = hie – rbb = 1100 – 100 = 1000 =1k

hie rbb 1100 100

rb e = = (400 104) =4M

hre 2.5 10 4

h fe 50

We know that gm = = 0.05 mho

hie rbb 1100 100

1 h fe hre

Also, = hoe –

rce hie rbb

Substituting all the values, we get

4

1 5 50 2.5 10

= 2.5 10

rce 1100 100

1

or = 2.5 10–5 – 1.25 10–5 = 1.25 10–5 mho

rce

1 1

or = 5

= 0.8 105 =80 k . Ans.

rce 1.25 10

Example 11. For a BJT, hie = 500 , hfe = 100 mA, VCE = 10 V, and room temperature

of 27°C. The BJT has fT = 50 MHz and Cb c = 3F. Calculate all the parameters of the

hybrid- model of the BJT. (Given Ic = 10 mA)

Sol. We know that

I c in mA

(i) gm = , mho

26

Substituting all the values, we get

10

gm = = 0.385 mho.

26

h fe 100

(ii) and rb e = = = 260

gm 0.385

hie rbb rb e

(iii) Also, rb c = =

hre hre

Substituting all the values, we get

260

= = 2.6 M

10 4

1 h fe hre 5 100 10 4

(iv) = hoe – =4 10

ro hie rbb 260

1

Solving, we get = 0.154 10–5 mho

ro

or ro = 6.5 105 = 650 k .

(v) Now Cb c = measured CB output capacitance with the input open (IE = O), specified by

the manufacturer = 3pF.

(vi) Again, Cb e =

FG g m

Cb c

IJ

H2 f T K

Substituting all the values, we get

0.385

Cb e = ‘– 3’ = 1224 pF – 3pF

2 50 10 6

Solving, we get Cb e = 1221 pF.

Example 12. Given the following parameters for a given transistor at Ic = 10 mA, VCE =

10 V and the room temperature : hfe = 100 ; hie = 500 ; | Ai | = 10 at 10 MHz, and

Cc = 3pF. Find F , FT, Ce, rb e and rbb .

IC 10 m A

Sol. We know that,gm = = = 384.6 mS

VT 0.026

h fe 100

Also, rb e = = 3 = 260 . Ans.

gm 384.6 10

We know that rbb = hie – rb e = 500 – 260 = 240 . Ans.

FT = | Ai | f = 10 10 = 100 MHz. Ans.

fT fT 100

We know that, f = = = = 1 MHz. Ans.

hie 100

gm 384.6 10 3 12

Cb e = Cb c = 3 10 = 609 pF. Ans.

2 fT 2 100 10 6

Example 13. A BJT is found to have fT = 500 MHz, hfe = 100, rbb = 100 , rb e = 900

and Cb c = 5 pF. It is used as a CE amplifier with Rs = 1 k and RL = 500 . Determine for

the amplifier.

Vo

(i) Mid band voltage gain AVs = and (ii) The upper 3-db cut-off frequency f .

Vs

Sol. We know that

h fe

Since gm =

rb e

Substituting all the values, we get

100 1

gm = S

900 9

Midband voltage gain will be given by

Vce g V R 1

AV = = m b e L = – gm R L = 500 = – 55.55

Vb e Vb e 9

(i) Midband voltage gain taking RS into account

A V rb e 55.55 900

AVs = = = – 25. Ans.

R s rbb rb e 1000 100 900

(ii) Upper 3-db cut-off frequency,

fT 500

fB = = = 5 MHz. Ans.

h fe 100

The model discussed up to were hybrid- and T model excluding capacitive effects. Now we

will discuss the hybrid- model of BJT, including capacitive effects, as shown in Figure 1.26

specifically, there are two capacitances namely.

(i) the emitter-base capacitance, C = Cde + Cje and

(ii) the collector-base capacitance, C .

Typically, C is in the range of a fraction of Pf (picofarad) to a few Pf, and C is in the range

of a few Pf to a few tenth of Pf. It may be noted from the Figure 1.26 that we have omitted

the resistance r because, even at moderate frequencies, the reactance C is much smaller

than r , we have, however, added a resistor rx to model.

rx B C

C

+

r V C gmV ro

–

Figure 1.26

The resistance of the silicon material of the base region between the base terminal B and a

fictitious internal, or intrinsic, base terminal B . Typically, rx is a few tenth of ohms, and its

value depends on the current level in a rather complicated manner. Since r >> rx, so effect

of rx is negligible at low frequencies. However at high frequencies effect of rx can’t be

neglected, because rx play an important role in determining the frequency response of

transistor circuit. It follows that an accurate determination of rx should be made from a high

frequency measurement.

The transistor data sheets do not usually specify the value of C . Rather, the behaviour of

or hfe versus frequency is normally given. In order to C determine and C we shall derive an

expression for hfe as a function of frequency in terms of the hybrid- components. For this

purpose consider the circuit shown in Figure 1.27 in which the collector is shorted to the

emitter, the short-circuit collector current Ic is

Ic = (gm – sC ) V ...(1.58)

Ib sC V Ic = (gm – sC )V

B

r C C

+

Vb V r C gmV ro

–

E E

Figure 1.27

between B and E :

V = Ib (r || C || C ) ...(1.59)

Thus, hfe can be obtained by combining equations (1.58) and (1.59)

Ic gm s C

hfe = =

Ib 1

r

s C C d i

At the frequencies for which this model is valid, gm >> C , resulting in

gm . r

hfe

1 d

s C C ir

0

Thus, hfe ( gm r = 0) ...(1.60)

1 d

s C C ir

where 0 is the low-frequency value of . Thus hfe has a single pole response with a 3-dB

frequency at = , where

1

= ...(1.61)

dC C ir

Figure 1.28 shows a Bode plot for [hfe] from the – 6dB/octave slope it follows that the

frequency at which | hfe | drops to unity, which is called the unity-gain bandwidth T is

given by

T = 0

gm

Thus, T =

C C

gm

and fT = ...(1.62)

2 dC C i

The unity-gain bandwidth fT is usually specified on the data sheets of the transistor. In

some cases fT is given as a function of IC and VCE. To see how fT changes with IC, recall that

gm is directly proportional to ic but only part of C (the diffusion capacitance Cde) is directly

proportional to IC. It follows that fT decreases at low currents as shown in Figure 1.28.

However, the decrease in fT at high currents, also shown in Figure 1.29 cannot be explained

by this argument ; rather it due to the same phenomenon that 0 causes to decrease at high

currents. In the region where fT is almost constant, C is dominated by the diffusion part.

|hfe| (dB)

fT

3-dB

o

-6 dB/octave

0 dB

w wT w(loq scale) Ic

Figure 1.28 Bode plot for | hfe |. Figure 1.29 Variation of fT with IC.

Typically, fT is in the range of 100 MHz. The value of fT can be used in equation (1.62) to

determine C + C . The capacitance C is usually determined separately by measuring the

capacitance between base and collector at the desired reverse-bias voltage.

1. General H–Parameter equations.

V1 = h11i1 + h12 V2

i2 = h21i1 + h22V2

No. h-Parameter

Vi

1. h11 = Input Output short hi hie hib hic

i1 impedance Circuited

V1

2. h21 = Forward Output short hf hfe hfb hfe

V2 current Circuited

gain

i2

3. h12 = Reverse Input open hr hre hrb hre

i1 voltage circuited

gain

i2

4. h22 = Output Input open ho hoe hob hoe

V2 admittance circuited

hf

(i) Current gain : Ai =

1 h0 R L

hr h f

Ri = hi

(ii) Input Resistance :

bY L h0 g

hf RL

(iii) Voltage gain : Av = where hiho – hrhf = h

hi hR L

h 2f R L

(iv) Power gain : Ap = +

bh i hR L 1 h0 R L gb g

(v) Output Resistance : Ro =

bR s hi g

h h0 R s

FG Z IJ i

(vi) Overall voltage gain : Avs = Av

HZ R K i s

=–A G

F R IJ s

(vii) Overall current gain : Ais

HR Z K i

s i

Vbe

ib = (1 – gmre)

re

5. hybrid- conductances.

(i) Transistor trans-conductance gm

I Ic

gm = co

VT

(ii) gm is directly proportional to current and inversely proportional to temperature.

(iii) At room temperature.

gm =

Ic amAf

26

(iv) The i/P conductance (gb e)

gm

gb e =

h fe

(v) The feed back conductance (gb c)

gb c = hre gb e

(vi) The base-spreading resistance (rbb )

rbb = hie – rb e

(vii) The output conductance (gce)

gce = hoe – gmhre

6. The Hybrid- copacitances-

Cb e = CDe + CTe CDe

gm

or Cb e

2 fT

7. When the input voltage of an amplifier is kept constant but it’s frequency is varied.

The amplifier gain-

(i) Remains practically constant over a sizeable range of mid-frequencies.

(ii) Decreases at low as well as at high frequencies.

8. The maximum attainable band width for the current gain of a CE Ampr.

1

f =

2 rb e Cb e Cb c c h

9. -cut off frequency

f =

h fe f cC be Cb c h

Cb e

10. fT hfe f

11. Unity gain band width

gm

fT =

2 C d C i

Problem 1. Find Ic and VcE for the following figure of Si transistor.

9V

200 K 1K

hic = 2K, hfe = 100

hoe = 0, hre = 0

100 K 1K

Figure N (1.1)

Sol. (i)

9V

1K

R

V 1K

Figure N (1.2)

200 100

R= = 66.6 K

300

9 100

V= = 3V

300

V = Rib + VBE + 1 k ib (hfe + 1)

3 – 0.7 = ib (66.67 + 101)

2.3

ib = = 13 Amp.

167.67

ic = ib 100 = 1.3 mA Ans.

(ii) Vcc = icRc + VCE + Reib (hfe + 1)

9 = 1.3 + VCE + 1.301

VCE = (9 – 2.6) = 6.4 V Ans.

Problem 2. A CE amplifier has RL = 10 k ohms. Given hie = 1 k ohm, hfe = 50,

hre = 0, 1/hoe = 40 k. The voltage gain AV is.

Sol. We know that voltage gain in the case of CE amplifier

ZL

Av = A i Where Ai = current gain

Zi

ZL = RL = 10 k

Zi = input impedance

h fe

Ai =

1 hoe Z L

50

or Ai = –

10 10 3

1

40 10 3

50

Ai = = – 40

1 2.5

h fe. hre 1 1

Zi = hie where YL = = =1 10–4

YL hoe ZL 10 10 3

50 0

or Zi = 1 103

4 1 3

10 10

40

Zi = (10)3 = 103

10 10 3

40

Now, Av =

10 3

Av = – 400 Ans.

Problem 3. In the common emitter amplifier with RL = 4000, given hfe = 100,

1

hoe = , hie = 1000, the current gain |Ai|, is given by

36 10 3

Sol.

h fe 100 100

|Ai| = = =

1 hoe .R L 400 1

1 3 1

36 10 9

|Ai| = 90 Ans.

F 1I 10–3,

Problem 4. In an emitter follower with RL = 10 k, given hfe = 99, hoe =

H 40 K

hie = 1 k the values of current gain and input resistance are given by.

h fe

Sol. Ai =

1 hoe .R L

99

|Ai| =

1 3

1 10 10 10 3

40

99

=

10

1

40

|Ai| = 79.2

|Ai| 80

Ri = hie + Ai hre RL

Ri = 1 k + 80 1 10 k

Ri 800 k Ans.

Problem 5. The transistor in the amplifier shown has following parameters : hfe = 100,

hie = 2 k , hre = 0, hoe= 0.05 m mhos, C is very large. The output impedance is

9 VCC

58 K 5K

C

10 K 1K C

Figure N (1.3)

h fe . hre

Sol. Y0 = hoc –

hie Rs

where Rs = source Resistance

100 0

Y0 = 0.05 10–3

2 10 3 R s

Y0 = 0.05 10–3

1 1

Z0 = = 3

Yo 0.05 10

Z0 = 20 k

Problem 6. For the emitter follower with Rs = 0.5 k and RL = 5 k . Calculate

Ai, Ri, Av. Assume hfe = 51, hie = 1 k , hoe = 25 micro amp/volt.

Sol.

1 h fe 1 51

(i) The current gain Ai = =

1 hoe .R L 1 25 10 6 5 10 3

Ai = 46.222 Ans.

(ii) Input resistance

Ri = hie + hre AiRL

Ri = hie + 1 Ai RL = hie + AiRL

Ri = 1 103 + 46.22 5 103 = (1 + 231.11)103

Ri = 232.11 103

Ri = 232.11 k

Vo A .R

(iii) Av = = i L

Vi Ri

46.22 5

Av =

232.11

Av = 0.9956 Ans.

Problem 7. A BJT is found to have fT = 500 MHz. hfe = 100, rbb = 100 , rb e = 900

and Cb c = 5 PF. It is used as a CE amplifier with Rs = 1 k and RL = 500 . Determine

for the amplifier

Vo

(i) mid-band voltage gain Avs =

Vs

(ii) The upper 3-db cut-off frequency f .

h fe

Sol. Since gm =

rb e

substituting values,

100

gm =

900

1

gm = s

9

mid-band voltage gain will be

Vce

Av =

Vb e

gm Vb e R L

Av =

Vb e

A v = – gm R L

1

Av =

9

Av = – 55.55

A v rb e

(i) Avs =

R s rbb rb e

55.55 900

Avs =

1000 100 900

Avs = – 25 Ans.

(ii) upper 3-db cut-off frequency

f 500

f = T = = 5 MHz Ans.

h fe 100

Problem 8. A BJT has the following Parameters at an operating current of I c = 2.3 mA,

fT = 500 MHz, rb e = 1.5 k , rbb = 100 , Cc = 3F, Find the values of gm, Ce, and for the

BJT.

Sol. (i) gm =

a f

I c mA

mhos

26

2.3

= = 0.088 mho.

26

(ii) = hfe = gm rb e

= 0.088 1.5 103

= 132

gm

(iii) Cb e = Cb e

2 fT

0.088

Cb e = –3 10–12 farad

2 500 10 6

Cb e =

FG 0.088 10 12

IJ

3 PF

H 2 500 10 6

K

Cb e = 28.011 – 3

Cb e = 25.01 PF Ans.

Problem 9. Given the following parameters for a given transistor at Ic = 10 mA,

VcE = 10 v and the room temperature : hfe = 100, hie = 500 , |Ai| = 10 at 10 MHz and

Cc = 3 PF. Find f , fT, Ce, rb e

Ic 10 mA

Sol. gm = = = 384.6 ms

VT 0.026

h fe 100

rb e = =

gm 384.6 10 3

rb e = 260 Ans.

rbb = hie – rb e

rbb = 500 – 260

rbb = 240

fT = |Ai| f

fT = 10 10

fT = 100 MHz. Ans.

fT fT

f = =

hie

100

f = = 1 MHz Ans.

100

g

Ce = m – C b e

2 fT

384.6 10 3

Ce = –3 10–12

2 100 10 3

Ce = 609 PF Ans.

1. Define hybrid Parameter’s and calculate the h-parameters for the given two-part system.

I1 I2

+ +

V1 Linear V2

Circuit

– –

2. Draw the hybrid equivalent ckt of CB, CC and CE configuration and write their h-parameter

equation.

3. Why the name hybrid parameter was given to a set of parameters of BJT. Find out the expression

of current gain and voltage gain using h-parameter of a transistor amplifier.

4. Explain the high frequency parameters of hybrid- model.

5. Draw the small signal hybrid model at high frequency. Explain the complete mode prove that

hfe = gmrb e.

6. (a) Explain hybrid capacitances.

(b) Define f , fT and derive the relationship between f and fT.

7. Explain the miller’s theorem.

8. Explain the frequency response of an amplifier

1. Given hie = 2.4 k , hfe = 100, hre = 4 10–4 and hoe = 25 s sketch the

(a) Common – emitter hybrid equivalent model.

(b) Common – base hybrid equivalent model.

2. A CB transistor amplifier uses a voltage source of its internal resistance Rs = 1100 and the

load Resistance RL = 1300 . The h-parameter’s hib = 21 , hrb = 3.0 10–4, hfb = – 0.99 and

hob = 0.45 A/v. Calculate the following.

(i) Input impedance

(ii) Overall voltage gain.

(iii) Overall current gain.

1

3. Given the h-parameter’s for common emitter hie = 1000 ohms, hfe = 49, hoc = and

40 103

1

hre = 0, the values of hib and . (Ans. – 20 ohms and 2M ohms)

hob

4. A BJT has following low frequency h-parameter as Ic = 6 mA, hie = k , hre = 10–4, hfe = 102,

hoe = 4.5 10–5 mho, calculate the resistive parameters of the hybrid- equivalent model.

5. A BJT has the following CE h-parameters hie = 1100 , hre = 2.5 10–4, hfe = 50, hoe =

2.5 10–5 mho

(i) Find the h-parameter for CB and CC configuration.

(ii) If base spreading resistance = 100 the find the resistance hybrid parameter.

Ans. (i) hie = 1100 , hrc = 1, hfc = – 51, hoe = 2.5 10–5 mho, hib = 21.57 , hrb = 2.9 10–4,

hob = 0.5 10–6 mho (iii) rcc = 80 ohm)

6. For a BJT operated at Ic = 1 mA, determine fT and C if C = 2 PF and |hfe| = 10 at 50 MHz.

[Ans. 500 MHz, 10.7 PF]

7. If C = 10.7 PF of the BJT includes a relatively constant depletion-layer capacitance of 2 PF,

find fT of the BJT when operated at Ic = 0.1 mA. (Ans. = 130.7 MHz)

At the end of this unit you will able to learn about

What are large signal amplifiers

Need of large amplifiers

Classification of large signal amplifiers

Direct coupled class-A amplifier

Transformer coupled class-A amplifier

Design theory of power amplifier

Conversion efficiency or collector efficiency

Harmonic distortions in amplifiers

Class-A push-pull amplifier

Class-B push-pull amplifier with design

Crossover distortion

Class-AB push-pull amplifier

Conversion efficiency of class-B amplifiers

Complementary symmetry amplifier

Thermal runaway

In almost all electronic systems the last stage has to be large signal or power amplifier (it

means large signal amplifier is nothing but a power amplifier), this is because input signal is

generally small ranging from few microvolts to few millivolts. These signals if feed directly,

cannot drive the loud speakers or public address system (speaker or other power handling

device), therefore the signal is first fed to the voltage amplifier, so that the voltage level of

this signal is first raised to sufficiently high value. This voltage is then used by power

amplifier. Thus, power amplifier then provides sufficient power gain to drive an output

device. The power amplifier is capable of delivering power to the loud speaker. The loud

speaker finally converts the electrical energy into sound energy.

When we say, “a 3-W stereo tape recorder”, it means the peak power fed to the

loudspeaker is 3W. The word “stereo” means “three dimensional”. Block diagram represen-

tation of a public address system is shown in Figure 2.1.

Microphone

Voltage * Power Loud

amplifier amplifier Speaker

Sound On-Off

Switch

* Voltage Voltage

amplifier amplifier Sound

This amplified voltage signal is then fed to the final stage of multistage amplifier. In

multistage amplifier there is a number of voltage amplifiers. Thus, we found that power

amplifier is an essential part of every electronic device.

Finally, we conclude that most electronic devices use at least one amplifier, but there are

many types of amplifiers. This module will not try to describe all the different types of

amplifiers. You will be shown the general principles of amplifiers and some typical amplifier

circuits. Most amplifiers can be classified in two ways.

The first classification is by their function. This means they are basically voltage

amplifiers or power amplifiers. The second classification is by their frequency response. In

other words what frequencies are they designed to amplify ? If you describe an amplifier by

these two classifications (function and frequency response) you will have a good working

description of the amplifier. You may not know what the exact circuit is, but you will know

what the amplifier does and the frequencies that it is designed to handle.

As we have just discussed that the primary function of the voltage amplifier is to raise the

voltage level of the signal. It is designed to achieve the largest possible voltage gain. Only a

very little power can be drawn from its output.

On the other hand, a power amplifier is required to deliver a large amount of power and

as such it has to handle large current. To obtain a large power at the output of the power

amplifier its input signal voltage must be large. That is why, in an electronic system, a

voltage amplifier, invariably proceeds the power amplifier. Also that is why the power

amplifier are called large signal amplifiers.

An important questions arises here – “Does a power amplifier actually amplify

power ?”. The answer is “no”. In a real manner, no device can amplify power. This is

because amplification of power contradicts the basic principle of physics i.e., law of conser-

vation of energy.

In fact, a power amplifier, during its operation, takes power from the dc power supply

and converts it into useful ac signal power. This power is feed to the loudspeaker (i.e., load).

The type of ac power developed at the load (output) of the power amplifier is controlled by

the input signal. Thus, we may say that a power amplifier is a dc-to-ac power converter,

whose action is controlled by the input signal for better understanding.

The comparison between voltage amplifier and large signal (power) amplifier as shown

in Table 2.1.

Table 2.1

(i) high 100 low (20 to 50)

(ii) RC high ( 10 k ) low (~ 40 )

(iii) Input voltage low (few mV) high (few V)

(iv) Power output low high

(v) Collector current low (1 mA) high (100 mA)

(vi) Output impedance high low

(vii) Coupling usually R-C invariably transformer

coupling is used or tuned circuit used

Following are the conditions for a power amplifier :

In power amplifier, input resistance of transistor is very large as compared to its output

resistance.

The current gain of a transistor used in power amplifier is smaller compared to that of

voltage amplifier.

In power amplifiers, transformer coupling for impedance matching should be used.

Power amplifiers need large size, because a considerable amount of heat is dissipated

within the transistor and hence the large surface area is required for heat dissipation.

+ VCC

R1 RC

CC

C

+

CC

B

E VO

Rs

+

Vs RE

– R2 CE

–

Reason Why Voltage Amplifier Cannot Work as a Power Amplifier (Large Signal

Amplier) and its Remedy

For the transistor to work as a voltage amplifier need not to have a power dissipation

rating. It is generally not used to handle large power. However, if we want transistor to work

as a power amplifier, the transistor must have large power dissipation rating.

Practically, it is found, for voltage transistor power dissipation < 0.5 W and for power

transistor power dissipation > 0.5 W.

Let us consider a simple amplifier circuit. In fact this is a good voltage amplifier circuit

shown in Figure 2.2. Now, the question is that whether the circuit would work as a good

power amplifier if we replace the transistor with another transistor of higher power dissipa-

tion rating. We will see that this circuit cannot work as a power amplifier.

Applying KVL to the output loop, we have

VCE = VCC – IC (RC + RE) ...(2.1)

The dc power that goes into the transistor is

PDQ = VCE IC ...(2.2)

This represents that when dc power is applied to the amplifier only a portion of this

power can be converted by the amplifier into the useful ac power because there is a voltage

drop across resistance RC and RE (where RC is the collector resistor between collector and

base of the transistor and RE is the emitter resistance between emitter and ground).

There are two parameters RC and RE which are the main cause of power loss (i.e., dc

input power). If RE is replaced by the short-circuit (i.e., the absence of emitter resistance),

results in the poor stabilization of operating point. In other words the circuit stability

becomes poor due to the short-circuit of emitter resistance.

Now, we have only option to avoid power loss i.e., RC. One can think whether we can

avoid the dc power loss in RC by short-circuiting, its answer is “no”, because in ac equivalent

circuit (which will be discussed in next chapter) the load also becomes short. Since load

resistance is equal to RL || RC = 0 when RC = 0 (i.e., short-circuited). It means no power

is transferred to the load RL. The amplifier becomes useless.

The remedy of this difficulty is that we must replace RC by a component whose dc

resistance is zero, but ac resistance (or impedance) is very high, the solution of this problem

is choke coil or an inductor. There are two main advantages of using choke coil.

No dc voltage drop across the choke (since for dc f = 0 ; XL = 2 f L = 0)

The dc power loss in the choke coil is almost nil.

Figure 2.3 shows a typical single ended transistor power amplifier. Single ended means only

one transistor. It is basically the last stage of a multistage audio amplifier.

In many electronic system, such as radio, television, public address system, tape re-

corder etc., the final output is in the form of sound. The power amplifier makes the final

stage and it drives the loudspeaker. We already know that maximum power will be trans-

ferred to the loudspeaker from the power amplifier, only if its output impedance is same as

the impedance of the loudspeaker. If it is not so, the loudspeaker gets less power. Maximum

power can be transferred by using transformer impedance matching.

+ VCC

R1

Loud-

Speaker

CC C

B

RS E

+

VS R2 RE CE

–

load resistance RL is connected across the secondary of a transformer with turns ratio

FG N IJ .

1

HN K

2

Let the resistance seen looking into the primary of the transformer be R L , now

RL V /I

= 1 1 =

V1 FG IJ FG I IJ 1 N1 N1

.

FG N IJ

1

2

RL V2 /I 2 V2 H K HI K 2 N2 N2 HN K

2

or RL = RL

FG N IJ

1

2

...(2.3)

HN K 2

N 1 : N2

+ + +

I1 I2

V1 V2 RL

Speaker

– – –

RL

Thus, by using a step-down transformer of proper turns ratio, we can match a low R L

with high output impedance of the transistor.

Classification of power amplifiers is based on transistor biasing and amplitude of the input

signal i.e. The portion of the cycle for which the transistor conducts their mode of operation.

On the basis of biasing and the conduction of cycle, the classification of power amplifiers is

as follows :

Class-A amplifier.

Class-B amplifier.

Class-C amplifier.

Class-AB amplifier.

Before discussing each power amplifier in detail it is very necessary to discuss the

performance of power amplifier. The performance of amplifier is studied on the basis of

quantities like distortion and power dissipation capability. These are discussed below in

detail.

We have discussed earlier that the main purpose of an amplifier is to boost up the voltage or

power level of a signal. During this process, the waveshape of the signal should not change.

If the waveshape of the output is not an exact replica of the waveshape of the input we may

say that distortion has been introduced by the amplifier. Since power amplifier handles large

signal, distortion is always present.

A number of factors are responsible for causing distortion. It may be caused either due to

the relative components of the circuit or due to the non-linear characteristics of the transistor.

Some types of distortion is given below. These may exist either separately or simultaneously

in an amplifier :

(i) Frequency distortion

(ii) Phase or time-delay distortion

(iii) Harmonic, Amplitude or non-linear distortion.

(i) Frequency distortion : We know that practically, the signal is not a simple sinusoi-

dal voltage. It has a complex waveshape. Such a signal is equivalent to a signal obtained by

adding a number of sinusoidal voltages of different frequencies. These sinusoidal voltages

are called the frequency components of the signal. If all the frequency components of the

signal are not amplified equally well by the amplifier, frequency distortion is said to occur.

The cause for this distortion is non-constant gain for different frequencies. This occurs due to

inter electrode capacitance of the active device and other relative components of the circuit.

(ii) Phase distortion : Phase distortion occurs if the phase relationship between the

various frequency components making up the signal waveform is not the same in the output

as in the input. The main cause of the phase distortion is the reactive components of circuit.

This distortion is not important in audio amplifiers. Because our ears are not capable of

distinguishing the relative phases of different frequency components but this distortion is

considerable in video amplifiers used in television.

(iii) Harmonic distortion : This type of distortion occurs when the output contains new

frequency components that are not present in the input signal. These new frequencies are the

harmonics of the frequencies present in the input.

Harmonic distortion in an amplifier occurs because of the non-linearity in the dynamic

transfer characteristics curve. Hence this distortion is also called non-linear distortion. In

case of voltage amplifier, where small signals are handled, no harmonic distortion occurs.

However, in power amplifier due to the large input signal the change in the output

current is no longer proportional to the change in input voltage.

This type of distortion is also called as amplitude distortion.

Calculation for Harmonic Distortion in Power Amplifiers

If we apply for sinusoidal signal as input vi = V sin t to the input of the power

amplifier the waveform of the output signal can be mathematically represented as :

i0 = I0 + I1 sin t + I2 sin 2 t + I3 sin 3 t + ...(2.4)

where, I0 = dc component

I1 = Peak value of the first harmonic (or the fundamental)

I2 = Peak value of second harmonic

The harmonic distortion for each of these components is then defined as :

I2

Second harmonic distortion, D2 =

I1

I3

Third harmonic distortion, D3 = and so on.

I1

When distortion occur, the output power due to the fundamental component of the

distorted signal is:

I12 R L

P1 = ...(2.5)

2

The total power due to all the harmonic components at the output is :

d

PT = I12 I 22 i R2 I 23 L

or PT

F I I FG I IJ

= 1 G J 2

2

3

2

I12 R L

HI K HI K 1 1 2

or PT = d1 D D 2

2 iP 2

3 1 ...(2.6)

We may define the total distortion or distortion factor as :

D= D22 D23 ...(2.7)

2

so, PT = (1 + D ) P1

If the distortion is 10%, then the total power is :

PT = [1 + (0.1)2] P1 = 1.01 P1

This shows that a 10% distortion represents a power of only 1% of the fundamental. Thus,

only a small error is made in using only the fundamental term P1 for calculating the output power.

The ability of a power transistor to dissipate heat developed in it during operation is known

as its power dissipation capability or power rating.

If the heat generated within the transistor due to excessive current passing through it is

greater than its power dissipation capability, then the transistor may burn out. For good

power transistor, the power dissipation capability should be high. The power dissipation

capability of a transistor may be increased by connecting a metallic structure called heat sink

to the transistor case. It keeps the transistor case temperature within the permissible limits.

Now, we will discuss first of all the brief classification of power amplifiers (large signal

amplifier).

(i) Class-A amplifier : It is an amplifier in which the transistor is biased such that the

output current flows for complete cycle (i.e., 360°) of the input signal. Figure 2.5 (a),

shows output for a class-A amplifier.

(ii) Class-B amplifier : It is an amplifier in which the transistor is biased such that the

output current flows for only half cycle (i.e., 180°) of the input signal. Figure 2.5 shows

output for a class-B amplifier.

(iii) Class-C amplifier : It is an amplifier in which the transistor is biased such that the

output current flows for less than half cycle of the input signal. Figure 2.5 (c) shows the

output for a class-C amplifier.

(iv) Class-AB amplifier : It is an amplifier in which the transistor is biased such that the

output current flows for more than half cycle of the input signal. Figure 2.5 (d) shows the

output for class-AB amplifier.

Output Voltage

Input Voltage

AV

o 2 t Vin Vo o 2 t

(a)

Output Voltage

Input Voltage

AV

o 2 t Vin Vo o 2 t

(b)

Output Voltage

Input Voltage

AV

o 2 t Vin Vo o t

(c)

Output Voltage

Input Voltage AV

o 2 t Vin Vo o t

(d)

As we have already discussed that the large signal amplifier in which operating point is so

adjusted that the collector current flows during whole cycle of the input signal is known as

class-A amplifier.

Figure 2.6 shows the circuit arrangement of class A direct coupled large signal amplifier

with resistive load. One thing always should be kept in mind that the operating point (or Q

point) is selected in such a way that the transistor operates only over the linear region of its

load or we can say that at the middle of the AC load line.

Figure 2.7 shows the output characteristics with operating point Q. Here ICQ and VCEQ

represent no signal collector current and collector to emitter voltage respectively. When

signal is applied, the Q-point shifts to Q1 and Q2. The output collector current increases to IC

(max) and decreases to I C (min). Similarly the collector to emitter voltage increases to V CE (max)

and decreases to VCE (min). D.C. power drawn from the collector battery V CC is given by

+ VCC

RC

R1

+

Cb

VO

Input

R2

Signal CE

or Pin = VCC ICQ

This power is used in the following two parts :

t

pu l

in gna

si

Ic

Q1

IC(max)

Out put current Q

ICQ

waveform

IC(min)

Q2

VCE

VCEQ

(i) Power dissipated in the collector resistance i.e., load resistance RC as heat is given by

PRC = I CQ

2

. R C and ...(2.9)

(ii) Power given to transistor is given by

Ptr = Pin – PRC ...(2.10)

2

or Ptr = VCC . ICQ – I CQ . RC ...(2.11)

Now, when signal is applied, the power given to transistor is used in the following two

parts namely.

a.c. power developed across the load resistance R C which constitutes the power ouput.

V2 VM F I 2

1 V2

i.e., 2

PO (a.c.) = I . RC =

RC

=

2 GH JK .

RC

= M

2R C

...(2.11)

where I = rms value of ac output current through load and V m is the maximum

value of V.

The dc power dissipated by the transistor (collector region) in the form of heat.

In order to better memorizing the things discussed above are shown below in the form of

tree diagram.

Pin (dc)

PC (dc) PO (ac)

Terms Frequently Used in Large Signal or Power Amplifier

(i) Overall efficiency : The overall efficiency of the amplifier circuit may be defined as the

ratio of a.c. power delivered to the load to the total power delivered by dc supply

ac power delivered to the load

i.e., (overall) =

total power delivered by dc supply

Po a ac f

=

Pin b dc g

(ii) Collector efficiency : The collector efficiency of a amplifier is the ability of an active

device to convert the dc power of the supply into the ac (signal) transferred to the load is

called collector efficiency or conversion efficiency. Sometimes also called theoretical

efficiency.

average ac power output

i.e., (collector) =

average dc power input to transistor

Po a ac f

=

Ptr b dc g

In more simple words collector efficiency is nothing but a ratio of ac output power to the

dc input power (i.e., zero signal power).

We have discussed earlier that a power amplifier just converts dc power received from

the battery (source) into ac power which fluctuates according to the input signal. This ac

power is supplied to the load.

Really, collector efficiency tells us the percentage of dc power converted into ac power

by the amplifier.

For example, if the dc power supplied is 20 W and the ac output power is 5 W, then the

conversion or collector efficiency is 25%. The greater the collector efficiency better is the

amplifier.

The parameter i.e., collector resistance RC is the main cause of power loss (i.e., dc input power

loss). Now, we have only one option to avoid power loss i.e., RC. One can think whether we

can avoid the dc power loss in RC by short circuiting, its answer is “no”, because in ac

equivalent circuit the load also becomes short. Since load resistance is equal to R L || RC = 0

when RC = 0 (i.e., short-circuited). It means no power is transferred to the load RL,

ultimately the amplifier becomes useless.

The remedy of this difficulty is that we must replace RC by a component whose dc

resistance is zero, but ac resistance (or impedance) is very high, the solution of this problem

is choke coil or inductor.

There are two main advantages of using choke coil.

No dc voltage drop across the choke (since for dc f = 0 i.e., XL = 2nf L = 0).

The dc power loss in the choke coil is almost nil.

Figure 2.8 circuit arrangement of transformer coupled class A amplifier. Here resistance

R1 and R2 provide potential biasing arrangement for forward biased base-emitter junction of

the power transistor. REis the emitter resistor for bias stabilization and CE is bypass capacitor

for RE to prevent ac voltage.

+ VCC

Loudspeaker

R1

CC

N1 : N2

Input

R2

signal

CE

RE

Figure 2.8

The capacitor CC blocks any dc from the previous stage. Input signal from a pre-amplifier is

applied to the input terminals. T is step down transformer. The high impedance primary of

the transformer is connected to the high impedance collector circuit. The low impedance

secondary is connected to the load (generally loudspeaker).

Transformer Impedance Matching

The transformer impedance matching can be consid- I1 I2

ered with the help of Figure 2.9. In Figure 2.9, RL is

the load connected in the secondary of a transformer. n1 n2

Let the reflected load in the primary of the trans- V V2

1 RL RL

former be R L . N1 and N2 are the number of turns in

the primary and secondary respectively. Let V 1 and V2

be the primary and secondary voltages and I1 and I2,

be the primary and secondary currents respectively.

We know that, Figure 2.9

V1 N I N

= 1 and 1 = 2

V2 N2 I2 N1

N N

or V1 = 1 V2 and I1 = 2 I2

N2 N1

Hence

V1

=

N1 FG IJ

V2

2

I1 N2 H KI2

V1

But = R L = effective input resistance

I1

V2

and I 2 = RL = effective output resistance

RL =

FG N IJ

1

2

R L = n2 R L ...(2.12)

HN K2

number of turns in primary N

where n= = 1

number of turns in secondary N2

For example, if we want to match a 40 speaker load to a power amplifier so that the

effective load may be 4 K , then the turn ratio should be

FG N IJ

1

2

=

RL 4000

= 100

HN K

2 RL 40

N1

= n = 10

N2

In this way a power amplifier may be matched by taking proper turn ratio in step down

transformer.

Circuit Operation

In order to get maximum ac power output, the peak value of the collector current due to

signal should be equal to zero signal collector current. Thus, Q should be located at the centre

of load line. The output voltage and current waveforms are shown in Figure 2.10.

IC

Ic (max)

2ICQ Load line

Output ICQ

Current Q (at centre)

Waveform

VCC 2VCC

IC (min) O (Vce) Q (Vce) max VCE

Output voltage

Waveforms

Figure 2.10 Output voltage and current waveforms.

Now the operating point Q moves up and down the load Imax 1 Load line

line. The collector voltage varies in opposite phase to the Im

collector current. The variation of collector voltage ap- Q

pears across the primary of transformer. Now ac voltage is

induced in the secondary which in turn develops ac power Imin Im Vm Vm 2

in load.

O Vmin Vmax VCE

Characteristics of Class-A Amplifier

Following are the characteristics of a class-A amplifier Figure 2.11

The output current flows during the entire cycle of the ac input signal.

Output power is low, therefore the collector efficiency is less than 50%.

Since the transistor operates over the linear region of the load line, therefore the output

waveform is almost similar to the input waveform.

The ac power output per transmitter is smaller than that of class-B or class-C amplifier.

Maximum power dissipation is at the zero signal (i.e., in the absence of the signal).

Derivation of Maximum Efficiency for Class-A Amplifier

Figure 2.11 shows the load line for calculating the conversion or collector efficiency of

an ideal distortion less class-A power amplifier.

It is assumed that the static waves are equally spaced in the region of load line for equal

increment in excitation (base current). Thus (in Figure 2.11), the distance from 1 to Q is same

as that from Q to 2. It is also assumed that the excitation is such that it gives zero minimum

current. The construction in Figure 2.11 may be used to analyse either a series-fed or a

transformer-fed load. The only difference between these two circuits is that the supply

voltage VCC equals Vmax in the series-fed case, whereas VCC is equal to the quiescent voltage

VC in the transformer coupled amplifier.

Now, for series-fed class-A amplifier

Vmax Vmin

IC = Im and Vm =

2

Vm I m /2

=

VCC I C

I FG V max Vmin IJ

or =

2VCC H 2 K

Vmax Vmin

or in %, = 100

4VCC

or =

b

25 Vmax Vmin g ...(2.13)

Vmax

This equation indicates that the upper limit of the conversion efficiency is 25%, when

Vmin = 0. If the load is transformer-coupled, then

Vmax Vmin

VCC = VC =

2

so, = 50

FG VVmin

max

%

IJ ...(2.14)

HV

max Vmin K

Therefore for transformer coupled maximum frequency is ,

max = 50%.

single transistor as amplifier can be minimized by push-pull arrangement. The amplifier is

then known as push-pull amplifier. Push-pull amplifier circuit is employed in the output

stages of electronic circuits.

Circuit Description of Class-A Push-Pull Amplifier

The circuit arrangement of push-pull amplifier is shown in Figure 2.12.

Ic

Q

Q1 ic

1

Tr R1 Tr

1 2

– +

Input Loudspeaker

R2 VCC

Biasing

network

Q2 ic

1

Ic

Q

Input transformer

Push pull Output transformer Load

circuit

Figure 2.12 Class-A push-pull arrangement.

In push-pull arrangement two identical transistors Q1 and Q2 are used. The emitter

terminals of the two transistors are connected together. The input signal is applied to the

inputs of two transistors through centre tapped transformer, Tr1. This transformer provides

opposite polarity signals to the two transistor inputs. The collectors of both the transistors are

connected to the primary of output transformer Tr2. This transformer is also centre tapped.

The collector terminals of the two transistors are connected to the supply V CC through the

primary of output transformer. Resistors R1 and R2 provide the biasing arrangement. The

load (generally a loudspeaker) is connected across the secondary of output transformer. The

turns ratio of the output transformer is chosen in such a way that the load is well matched

with the output impedance of the transistor. So maximum power is delivered to the load by

the amplifier.

Circuit Operation of Class-A Push-Pull Amplifier

As shown in figure 2.12, the two transistors Q 1 and Q2 carry dc components of collector

currents ICQ. These currents are equal in magnitude and flow in opposite directions through

the primary of transformer Q2. So there is practically no net dc component of current through

the primary of transformer Q2. This will increase the a.c. power output which is obtained by

a single transistor.

Let us consider that ac signal is applied to the input. When the input signal voltage is

positive, the base of transistor T1 is more positive while the base of transistor Q2 is less

positive. Hence the collector current ic1 , of transistor Q1 increases while the collector current

ic2 of transistor Q2 decreases. These currents flow in opposite directions in two halves of the

primary of output transformer. Moreover, the flux produced by these currents will also be in

opposite directions. As a result, the voltage across the load will be induced voltage whose

magnitude will be proportional to the difference of collector currents i.e., ic1 d i

ic2 .

Similarly, for the negative input signal, the collector current ic2 will be more than ic1 . In

this case the voltage induced cross the load will again be due to the difference ic2 d i

ic1 . As

ic2 ic1 , the polarity of voltage induced across load will be reversed. The overall operation

results in an a.c. voltage induced in the secondary of output transformer and hence a.c.

power is delivered to the load.

ic

1

IC

Q

Ic + (– Ic )

1 2

Ic

2

IC Addition

Q

Ic + (– Ic )

1 2

– ic

2

– IC

Q

ic2 .

ic1 ic2 = ic1 d ii

c2

It is obvious that during any given half cycle of input signal, one transistor is being

driven (or pushed) deep into conduction while the other being non-conducting (pulled out).

Hence the name push-pull amplifier.

Distortion in Class-A Push-Pull Amplifier

The base currents ib1 and ib2 of transistors T1 and T2 respectively are expressed as

ib1 = Ib sin ( t) ...(i)

and ib2 = Ib sin ( t + ) ...(ii)

Their collector currents are expressed as

ic1 = Ic + I1 sin t + I2 sin 2 t + I3 sin 3 t ...(iii)

ic2 = Ic + I1 sin ( t + ) + I2 sin 2 ( t + ) + I3 sin 3 ( t + )

or ic2 = Ic + I1 sin ( t + ) + I2 sin (2 t + 2 ) + I3 sin (3 t + 3 )

or ic2 = Ic – I1 sin t + I2 sin 2 t – I3 sin 3 t ...(iv)

Thus ic1 ic2 = 2I1 sin t + 2I3 sin 3 t + ...(v)

The output voltage induced in the secondary of the output transformer is proportional to

dic1 i

ic2 . Hence,

vo = K ic1 d i

ic2 = K 2 [I1 sin t + I3 sin 3 t + I5 sin 5 t]

or vo = 2K [I1 sin t + I3 sin 3 t + I5 sin 5 t + ] ...(vi)

In equation (vi), there is no even harmonic terms, hence all even harmonics are elimi-

nated.

Advantages of Class-A Push-Pull Amplifier

Following are the advantage of Class-A Push-Pull Amplifier :

Even harmonics are absent in the output.

High a.c. output power is obtained.

The effect of ripple voltages contained in the power supply due to inadequate filtering

are balanced out.

Disadvantages of Class-A Push-Pull Amplifier

Following are the disadvantage of Class-A Push-Pull Amplifier :

Two identical transistors are required.

If the parameters of the two transistors are not the same, there will be unequal amplifica-

tion of two halves of the signal.

Centre tapping is required in transformer.

Transformers used are bulky and expensive.

The power amplifier in which the transistor operating point and amplitude of the input

signals are such that the output current flows for only half cycle (i.e., 180°) of the input signal

is known as class-B amplifier, as shown in Figure 2.14. For class-B operation of the

amplifier, the biasing circuit is so adjusted that operating point Q lies very near the cut-off

region, i.e., zero collector current (IC = 0). During the positive half-cycle of the signal

collector current flows, however during the negative half-cycle of the signal, the input

circuit is reverse biased. In other words we can say that output obtained from class-B

amplifier is just like an amplified half wave rectification.

Input

signal

Output

IC

current 2

0

0 2 3 VCE

0

2

3

Output voltage

Figure 2.14

It may be noted that there is no input signal due to the transistor biased at cut-off. At this

point there is no current flow through the transistor and hence no power is dissipated by the

transistor. However in class-A amplifier maximum dissipation occurs at zero signal

condition.

Characteristics of class-B Amplifier

Following are some of the important characteristics of class-B amplifier

The output current flows only for one-half cycle of the input signal.

The transistor dissipates no power with zero input signal. However, it increases with the

increase in amplitude of input signal. It is contrary to class-A amplifier operation in

which the transistor dissipation is maximum with no input signal and minimum with the

largest input signal.

The average current drawn by the circuit in class-B operation is smaller than that in class-

A. As a result of this, the amount of power dissipated by the transistor is less in class-B.

Thus, the overall efficiency of the circuit is higher than that of class-A.

The main disadvantage of class-B amplifier is that the harmonic distortion is higher, self

biasing method cannot be used, and the supply voltage must have good regulation.

Power and Efficiency Calculation

Input dc power, Pdc = VCC Idc

where Idc =

1

2 0 z

I c max sin d =

Im

I c max

2

cos 0 =

I c max

= m

I

{here factor 2 in this expression arises because two transistors are used in the push-pull

system (discussed later)}

V I

2

Im

2

b

VCC Vmin g

P

Now, efficiency = 0 100

Pin

Im

b

VCC Vmin g

= 2 100

I

2 VCC m

or =

FG1 VCC IJ 100

FG

0.785 1

VCC IJ 100 ...(2.15)

4H Vmin K H Vmin K

max = 78.5%

Thus, the conversion efficiency of class B amplifier is 78.5%.

It is an amplifier in which the transistor biasing and amplitude of input signal are such that

the output current flows for less than half cycle of the input signal.

For class-C operation of the amplifier, the biasing circuit is so adjusted that operating

point Q lies below the cut-off region, which is practically impossible resulting is much

higher distortion. This is the reason why such amplifiers are never used for power amplifica-

tion. However they are used as tuned amplifiers (in RF range) due to high efficiency of class-

C amplifier. Thus, class-C amplifier is basically a radio frequency (RF) power amplifier and

not an audio power amplifier like class-A and class-B amplifier.

Characteristics of Class-C Amplifier

Following are some important characteristics of class-C amplifier.

The output current flows for less than half cycle of the input signal. This condition is

achieved by biasing the transistor below cut-off.

The output signal does not resemble the input signal because it consists of narrow pulses.

The class-C amplifier is the most efficient power amplifier and its overall efficiency

under certain conditions may approach even 100%.

Reason why class-C Amplifier is not used in power amplifier

We have discussed just above that for class-C operation collector current flows for less

than half cycle of the input which results in maximum distortion. Class-C amplifier is

mostly used where maximum efficiency or maximum output is the prime requirement.

For example, generally class-C amplifier is used in T.V. receivers, Radio receivers

where this signal is passed through the tuned-circuit. Tuned circuit is nothing but a L-C

circuit, it may be also noted that the frequency of signal which passes through the tuned

circuit is not considered, since signal after passing through the tuned circuit will pass

F 1 I , however, it may have any initial frequency. This is the

through frequency = GH 2 LC JK

main feature of tuned circuit.

A circuit arrangement of a push-pull amplifier uses two transistor as shown in Figure 2.15.

This circuit may work in class-B or class-A operation. Because of the special circuit connec-

tion, it generates a very low distortion. In the circuit, the excitation is introduced through a

centre tapped transformer. Thus, when the signal on transistor T 1 is positive, the signal on T2

is negative by an equal amount. Any other circuit that provides two equal voltages which differ

in phases by 180° may be used in place of the centre tapped transformer. The collector

terminals of the two transistors are connected to the supply VCC through the primary of the

transformer. The load resistance is connected across the secondary of the output transformer.

The turn ratio N1 : N2 at the transformer is chosen so that the load RL is in matched conditions.

Maximum power is delivered here resistance R 1, R2 and RE form the biasing network.

VCC

i1 iL

Tr2

Tr T1

1

+ RE N1

R1

N2 Loudspeaker

Vi

RC

X N1

–

Biasing network

T2 i2

Input

transformer Load

Push-pull Output

circuit transformer

Figure 2.15

Consider the input signal (base current) of the form ibi = Ibm sin t applied to T1. The

output current of this transistor (i.e., T1) is given by equation (2.16)

i1 = I0 + I1 sin t + I2 sin t + I3 sin 3 t + ... ...(2.16)

for the transistor T2 the base current

I b2 = Ibm sin ( t + )

Its output can be written (2.16) as

i2 = I0 + I1 sin ( t + ) + I2 sin 2 ( t + )

+ I3 sin 3 ( t + ) + ...

or i2 = I0 + I1 sin ( t + ) + I2 sin (2 t + 2 )

+ I3 sin (3 t + 3 ) + ...

or i2 = I0 – i1 sin t + I2 sin 2 t – I3 sin t + ... ...(2.17)

Here we have assumed identical characteristics for the two transistors. We have seen that

voltage induced in the secondary of the output transformer is proportional to the difference

(i1 – i2).

Now from equation (2.16) and (2.17), we have

v0 = K (i1 – i2)

v0 = 2K (I1 sin t + I3 sin t + I5 sin t + ...) ...(2.18)

where K is some constant of proportionality.

Thus, we can say that a great deal of distortion introduced by the non-linearity of the

dynamic transfer characteristics may be eliminated by the circuit shown above known as push-

pull configuration.

From equation (2.18) it is clear that even harmonics get cancelled because of push-pull

connection. The net distortion in the output of the push-pull amplifier is much less than it

would have been seen in a single ended amplifier.

Advantages of a Push-Pull System

Because no even harmonics are present in the output of a push-pull amplifier, such

circuit will give more output per device (or transistor) for a given amount of distortion. For

this reason to get a given output power, we prefer using two transistors in push-pull

connection rather than using a single larger power transistor in a single ended circuit. The

main advantages of the push-pull circuit connection are given below :

Their collector efficiency is quite high 75.8%) due to class-B operation.

The output has much less distortion due to the cancellation of all the even harmonic

components.

The net current flowing through the emitter resistor R E is the sum of the two collector

currents ic1 (or I c1 ) and ic2 (or I c2 ). There is no need of by pass capacitor CE for the

fundamental frequency components. And to by pass the second harmonic term, we can

use a smaller capacitor. The cost is thus reduced.

The d.c components of the collector currents oppose each other in the transformer. This

results in zero d.c flux in the core. The magnetic saturation of the core the by d.c current

does not occur. We can use the smaller sized transformer, the cost thus becomes low.

They give more a.c output power per device or transistor.

It reduces the humming noise in the circuit.

Disadvantages of Push-Pull System :

Following are disadvantages of Push-Pull system

Two identical transistors are required, which is usually not found.

It requires two equal and opposite voltages at the input, therefore driver stage has to be

employed.

If the parameter (mainly ) of the two transistors differs, there will be an unequal

amplification of the two halves of the input signal which introduces more distortion.

Relation Between Maximum Output Power and Maximum Dissipated Power for Class-B

Amplifier

As we have discussed earlier that dissipation power is given as,

P D = Pi – P o ...(2.19)

where PD = Dissipation power

Pi = Input power

Po = Output power

Now, Pi = VCC . ICQ

V .I V V Vm2

R|since, I Vm U|

Po = m m = m . m

2 2 RL 2R L

S| m

RL V|

Twhere R L Load Resistance W

2I m

For full wave rectifier, ICQ =

2I m Vm2

PD = VCC .

2R L

2 VCC . Vm Vm2

or PD = ...(2.20)

. RL 2R L

Differentiating equation (2.20) w.r.t. V m for maximum or minimum value of power

dissipation.

d

PD =

d LM

2 VCC . Vm Vm2 OP

d Vm d Vm RL N 2R L Q

d PD 2 VCC 2Vm

=

d Vm RL 2R L

d PD

for maximum or minimum value put = 0, we have

d Vm

2VCC Vm

0=

RL RL

2VCC

Vm =

2 VCC Vm2

PDmax = . Vm

RL 2R L

=

b

2 VCC . 2VCC / g b2 V / g

CC

2

RL 2R L

2

2 VCC

PDmax = 2 ...(2.21)

RL

But we know that maximum output power (PDmax)

VCC

PDmax = ...(2.22)

2R L

Hence from equations (2.21) and (2.22), we have

4

PDmax = 2

Pomax

This is the required relation between maximum dissipated power and maximum output

power. This relation is for the two transistor.

Note. For example, if we wish to deliver 10 W from a class-B push-pull amplifier then PD max

= 4 W, or we must select transistors which have collector dissipation of approximately 2 W each.

In other words, we can obtain a push-pull amplifier output of five times the specified power

dissipation of a single transistor. On the other hand, if we connect two transistors in parallel and

operate them as class-A to obtain 10 W output, the collector dissipation of each transistor would

have to be at least 10 W (assuming 50% efficiency). This statement follows from the fact that P i =

Po 10

= 20 W, this input power must be dissipated in the two collector at no signal (As we has

0.5

discussed earlier that in class-A amplifier the maximum dissipation occurs at zero signal) or P D =

10 W, each transistor. This example clearly indicates the superiority of the push-pull over the

parallel configuration.

It is possible to eliminate both the input and output transformers in an ordinary push-pull

amplifier circuit, the solution is by using complementary push-pull circuit. Here comple-

mentary means if one transistor is taken pnp then other must be a npn transistor.

The circuit arrangement of the complementary push-pull circuit is shown in Figure 2.16.

Note that the complementary symmetry circuit requires two power supplies namely VCC1 and

VCC2 . Push-pull amplifiers means the two transistors are conducting alternatively. The term

‘symmetry’ means that the biasing resistors are equal. As a result of this, the emitter base

junctions of each transistor is biased with the same voltage. A complementary symmetry

Large Signal (Power) Amplifiers 67

push-pull amplifier works on the same principle i.e., for the first half-cycle one transistor

conducts and the other remains in cut-off state and in the second half-cycle, the action is

reversed. Both the transistors work in class-B operation.

The important point to note is that no centre tap transformer is required. However, an

ordinary output transformer is used for impedance matching to get maximum output across

the load.

npn C1

B1

T1

E

R1 R2 VCC1

RL

Input VO

signal R1 R2 VCC2

E2

T2

B2

pnp C2

Operation

The input signal appears across the terminals AB during the positive half cycle of the input

signal, the transistor T1 (npn) conducts while at the same time transistor T2 (pnp) does not

conduct. During the negative half cycle transistor T2 (pnp) conducts while at the same time

transistor T1 (npn) does not conducts. Hence npn transistor amplifies the positive half-cycle

whereas pnp transistor amplifies the negative half-cycle. Thus, we get amplified output

across the load for complete cycle of the input signal.

Advantages of complementary symmetry Push-Pull amplifier :

The circuit does not require centre tap transformers. Hence it’s weight and cost is less.

Efficiency is high.

At the output of circuit transformer is not necessary.

Disadvantages of complementary symmetry Push-Pull amplifier :

We require two batteries (or supply).

It is difficult to get a pair of transistors (npn and pnp) having exactly same characteristics.

Note : All modern power amplifier circuits are transformer-less and use complementary

transistors.

As we have already discussed that in the class-AB power amplifier output current (i.e.,

collector current) flows for more than half cycle of the input signal.

In addition to the distortion introduced by not using matched transistors and that due to

the non-linearity of the collector characteristics, there is one more source of distortion that is

caused by non-linearity of the input characteristic. As we know that in the case of transistor

(any type whether npn or pnp of any configuration), no appreciable base current flows until

the emitter junction is forward biased by the cut in voltage V , which is 0.2 V for germanium

transistor and 0.6 V for silicon transistor. Under these circumstances a sinusoidal base

voltage excitation will not result in a sinusoidal output current.

The distortion caused by the non-linear transistor input characteristics is indicated in

Figure 2.17. To eliminate (Remedy) cross-over distortion, it is necessary to add a small

amount of forward bias to take the transistor to the average of conduction or slightly beyond.

This does slightly lower the efficiency of the circuit and there is a waste of stand by power,

but it alleviates the cross-over distortion problem. Technically the operation of transistors

lies between class-B and class-A mode. Therefore, the circuit operation is often referred to as

being class-AB operation.

T1 conducts

Cross-over

distortion

iC

iB

T2 conducts

Output

Input

Figure 2.17 Illustration of cross-over distortion.

In other words, we can say that such distortion would not occur if the driver stage were a

true current generator, in other words, if the base current (rather than the base voltage) were

sinusoidal. Thus, the transistor must operate in a class-AB mode. Where a small stand by

current flows at zero excitation.

The rated power of a transistor solely depends upon the construction of the transistor,

however, temperature limits the maximum power that a transistor can withstand. Usually,

power rating of transistors lies in the range of few milli watts to 200 W.

For Si transistors, the temperature ranges from 150°C to 225°C and for Ge it is between

60°C to 100°C.

Now the question arises that what are the causes which tend to increase the junc-

tion temperature ?

The junction temperature rises either because of ambient temperature or because of self-

heating.

Here, our main attention is over self-heating part, which is responsible for the thermal

runaway.

The self-heating can destroy the unstabilized transistor. The thermal runaway can be

defined as the self destruction of collector junction because of self-heating.

Reason of Thermal Runaway

It is very important to note that reverse saturation current ICO changes greatly with the

temperature. (It nearly gets doubled for each 10°C rise in temperature).

When current IC causes the collector junction temperature to rise, ICO increases because ICO

depends upon minority carrier concentration and minority carriers are thermally generated.

Now, as a result of growth of ICO, IC will increase, which may further increase the

junction temperature and consequently ICO. It is more likely to have a cumulative succession

of this phenomenon. Thus, the ratings of the transistors are exceeded, permanently damaging

the transistor.

Condition for Thermal Stability

To prevent thermal runaway the condition ;

PD 1

< should be satisfied

Tj H

where, Tj = Junction temperature in (°C)

PD = Power delivered at collector junction in watts.

H = Constant of proportionality known as thermal resistance in °C/W

The maximum collector power PC allowed for safe operation is specified at 25°C. For

ambient temperature above this value ; P C must be decreased and at extreme temperature at

which the transistor can operate safely PC is reduced to zero.

Following curve shows the relationship between power and temperature. Typically, this

curve is named as derating curve; because as long as ambient temperature increases, the

power gets derated.

Pc,W

150

120

90

60

30

0

20 40 60 80 100

Case-temperature, °C

How to avoid thermal runaway ?

In this article, we are going to discuss the restrictions to be fulfilled for avoidance of

thermal runaway.

The required condition is that the rate of release of heat at the J C (collector-junction)

must not exceed the rate at which the heat can be dissipated.

Mathematically ;

PC 1

< should be satisfied for thermal stability of the transistor.

Tj H

In order to avoid thermal runaway :

VCC

IC > should be satisfied.

b

2 RE RC g

Heat-sink

As we know that the increase in junction temperature causes self destruction of the

collector junction. In order to avoid the phenomenon of thermal runaway (specially for the

transistors handling high magnitude power signals) there should be some arrangement with

the transistor which could wipe off the heat generated instantly. For this purpose, we often

use a heat-sink.

A heat-sink is a metallic foil either rectangular or circular that is used to dissipate heat

developed at the collector junction of transistor.

In the power amplifiers, power transistors are employed which handle large currents. Be-

cause of heavy current these transistors are heated up during operation.

Heat-sinks are not only used with power transistors but they are also used with other

electronic device like SCRs : trioc, TCs, etc. Heat-sink is just a sheet of metal (Generally

aluminium) which improves the heat dissipation ability of power transistor and keeps its

temperature within permissible limits.

Since-the quantity of heat to be dissipated depends upon the surface area of the heat-sink

therefore heat-sinks are designed in various shapes. Thus, by using heat-sinks, phenomenon

of thermal runaway can be easily overcome.

Mathematical Analysis

The permissible power p dissipation of transistor is very important term of power

transistor. The permissible power rating of a transistor is determined from the expression.

Tj a max f Tambient

PTotal =

Tj (max) = Maximum permissible junction temperature

Tambient = Ambient temperature i.e., temperature of surrounding air in °C.

= Thermal resistance i.e., resistance of heat flow from junction to

the surrounding air. Its units are °C/watt.

The value of is usually given in the transistor manual. Low value of means heat flows

easily from junction to surrounding air i.e., more dissipation and smaller rise in temperature.

In fact, heat-sink reduces the value of appreciably resulting an increase in power dissipa-

tion.

1. Power amplifier is a DC-to-AC power conversion whose action is controlled by the input signal.

2. For voltage transistor amplifier power dissipation < 0.5 watt. However for the power

transistor power dissipation > 0.5 watt.

3. When only one transistor is used in the final stage of multistage amplifier, it is called single-

ended power amplifier.

4. The ratio of ac output power to the d.c input power or zero signal power of an amplifier is

known as collector or conversion efficiency :

=

a f

Poutput ac 1

a f

Pinput dc H

5. The change of output waveform from the input waveform of an amplifier is known as distortion.

6. The ability of a power transistor to dissipate heat developed in it during operation is known as

its power dissipation capability.

7. The Relation between load Resistance (rL), turns ratio and the input resistance of the trans-

former in the case of transformer impedance matching is given by the relation

R L = RL

FG N IJ

1

2

HN K

2

R L = resistances seen looking into the primary of the transformer

N1 = turns in primary side

N2 = turns in secondary side.

8. For class-A amplifier the maximum collector efficiency

max = 50%

9. There are two main advantage by using choke coil in place of RC (Collector Resistance)

(i) no d.c voltage drop across the choke

(ii) the .c power lost in choke coil is almost nil.

10. Main classification of a power amplifier is class-A, class-B, class-C and class-AB.

11. The amplifier stage that immediately precedes the output stage and supplies the necessary

power to the output stage is known as driver stage.

12. Maximum efficiency is class-B amplifier is about 78.5%.

13. The final stage of an audio multistage amplifier that provides the necessary power to drive the

load is known as output stage. Usually, a push-pull amplifier is used as an output stage.

14. For class-A operation the biasing resistors are so adjusted that the operating point Q lies in the

middle of the load line.

15. For class-B operation the biasing resistor are so adjusted that the operating point Q lies in the

cut-off region.

16. The order of increasing distortion in the different class of amplifier is given as :

class-C > class-B > class-AB > class-A

17. The order of increasing efficiency in the different class of amplifier is given as :

class-C > class-B > class-AB > class-A

18. Usually there are three types of distortion exists in an amplifier

(i) Frequency distortion

(ii) Phase or time-delay distortion

(iii) Harmonic amplitude or non-linear distortion

19. Total distortion or harmonic distortion factor.

I2

where D2 = called second harmonic distortion

I1

20. Total power output due to all the harmonic components as the output is :

PT = (1 + D)2 Pin

21. In push-pull amplifier, two transistors are needed and they conduct alternatively i.e., one

conducts during positive half cycle and the other conducts during negative half cycle of the

signal. The two transistor works in class-B operation.

22. A complementary symmetry push-pull amplifier is a circuit in which pair of npn and pnp

transistor is used. The two transistor conducts alternatively.

23. Dissipated power is given by :

PD = Pi – Po watts

where Pi = input power (dc)

Po = output power (ac)

24. Relation between output maximum power and dissipated maximum power for class-B ampli-

fier.

PD max 0.4 Po max

where PD max = maximum dissipated power

Po max = maximum output power

25. Cross-over distortion is reduced by using class-AB operation.

26. Second harmonic distortion in terms of VCE max, VCE min and VCE Q is given by the relation

D2 =

1

2 dVCE max VCE min i VCE Q

.

VCE max VCE min

Problem 1. Figure N (2.1) shows the circuit of a common emitter amplifier. Determine

the values of collector current and collector-to-emitter voltage at the points of saturation and

cut-off under ac signal operation. Also draw the ac load line, assume V BE = 0.7 V.

Sol. Given that

VCC = 10 V, R1 = 10 k

R2 = 5 k , RC = 1 k

RL = 1.5 k , RE = 500

= 100 and VBE = 0.7 V

With the help of Thevenin equivalent model (which have been already discussed).

VBB = VCC .

FG R IJ 2 8.78

HR R K 1 2

AC Load line

F 5 IJ

= 10. G

H 10 5K 5.26 Q

= 3.33 V

IC (mA)

Value of emitter current,

VBB VBE 3.33 0.7 0 2.11 5.27

IE =

RE 500 VCE (in volt)

Value of collector current,

ICQ = IEQ = 5.26 mA

Collector to emitter voltage.

VCEQ = VCC – ICQ (RC + RE)

= 10 – (5.26 10–3)

(1000 + 500) = 2.11 V.

+ VCC = 10 V

RC = 1 k

10 k R1

CC

C

CC

B

B = 100

RS

E

Ri = 1.5 k

Vin 6k R2

RE

CE

= 500

Figure N (2.2)

Now, we shall find the values of collector current and collector-to-emitter voltage of

saturation and cut-off points. We know that at saturation point, the collector current,

VCEQ

IC (sat) = ICQ + where ( R L = RC || RL)

RL

R L = RC || RC = 1000 || 1500 = 600

2.11

IC (sat) = 5.26 10 –3

1000 ||1500

= 8.78 10–3 A = 8.78 mA. Ans.

and the collector to emitter voltage

VCE (sat) = 0. Ans.

Similarly, the collector current at cut-off point

IC (cut-off) = 9. Ans.

and VCE (cut-off) = VCEQ + ICQ . rL

= 2.11 + 5.26 10–3 600

= 5.27 V. Ans.

The ac load line may be obtained by plotting the points of a.c saturation and a.c cut-off

and then joining them by a straight line as shown in Figure N (2.2).

Problem 2. A power amplifier is operated from a 10 V d.c supply. It gives an output of

3W. Find the maximum collector current in the circuit.

Sol. Let IC be the maximum collector current.

Power = Supply voltage collector current

3 = 10 IC

3

IC = = 0.3C Amp. Ans.

10

Problem 3. Determine the turn ratio of the output transformer to match an 10 speaker

load to an amplifier having effective load of 1.8 k .

Sol. Let the turn ratio of output transformer be

N1 N

n= = P

N2 NS

We know that,

R L = n2 . RL

RL

n2 =

RL

RL

n=

RL

where R L = effective load

RL = Load resistance (i.e., speaker)

1800

n= 180 = 13.42 14. Ans.

10

Problem 4. For a power transistor working in class-A operation has zero signal power

dissipation of 8 W. If the AC power is 4 W, determine

(i) Power rating of transistor

(ii) Collector efficiency

Sol. We know that in class-A operation

the power rating of transistor = zero signal power dissipation

= 8 W. Ans.

i.e., Pdc = 8 W

Given Pac = 4 W

Pac

Collector efficiency, = 100

Pdc

4

= 100 = 50%. Ans.

8

Problem 5. The transistor of a class-A power amplifier is supplied from a 6 V Battery. If

the maximum collector current change is 30 mA, find the power transferred to an 10

loudspeaker when :

(i) It is connected directly to the collector circuit.

(ii) It is coupled through a transformer for maximum power. Also determine the turns ratio of

coupling transformer.

Sol. Here, given that

IC max = 30 mA.

VCE max = 6 V.

RL = 10

(i) When loudspeaker is connected directly [see Figure N (2.3)]

+ VCC = 6 V

R1 Loudspeaker

10

CC

Input

signal

R2 RE CE

Figure N (2.3)

= IC RL

= 30 mA 10

= 300 mV.

Power delivered to the loudspeaker

= 300 mA 30 mA = 9 mW.

(ii) When loudspeaker is connected through a coupling transformer, as shown in Figure

N (2.4).

+ VCC = 6 V

Loudspeaker

10

R1

CC

Input

signal R2

RE CE

Figure N (2.4)

voltage to the maximum change in collector current.

VCE max 6V

i.e., RS = = = 200

I C max 30 mA

We know that for maximum power transformer, the load resistance referred to primary

side must be equal to output impedance of transistor i.e., R L = 200

Now, R L = n2 RL

RL 200

n= 20 4.47 5

RL 10

Now, secondary voltage i.e., voltage across the speaker

VP Vce 6

V L = VS = = 1.2 V

n n 5

V 1.2

Load current, IL = S = = 0.12 Amp.

VL 10

Power transferred to speaker = IL VL = 0.12 12 = 0.144 W or = 144 mW.

Problem. 6. For class-A, CE transistor amplifier, the operating point is located at I C =

250 mA and VCE = 8 V. Due to input signal the output collector current goes in between 450

mA and 40 mA. The VCE swings between 15 V and 1 V. Determine :

(i) The output power delivered,

(ii) The input power,

(iii) Collector efficiency,

(iv) Power dissipated by the transistor.

Sol. Given : IC = 250 mA (i.e., zero signal or ac condition)

VCE = 88 V (zero signal condition or dc condition)

IC (max) = 450 mA

IC (max) = 40 mA

VC (max) = 15 V

VC (min) = 1 V

(i) Output power delivered or ac power output

bV max Vmin g bI max I min g

P(ac) = 2 2

2

=

b V V g bI I g

max min max min RS Pac

Vm I m UV

8 T 2 W

=

a15 1f V a450 40f mA = 14 410

= 717.5 mW.

8 8

(ii) Input power or dc input power

Pdc = VCE IC = 8 250 = 2000 mW

Po a ac f

(iii) Collector efficiency, = 100

Pin a dc f

717.5

= 100 = 35.87%

2000

(iv) Power dissipated by the transistor

PD = Pdc – Pac = 2000 – 717.5

= 1282.5 mW.

Problem 7. A transistor BC 147 is used as a medium power transistor. Its thermal

resistance is 0.29°C/mW when no heat sink is provided. The maximum junction temperature

is 90°C. If the ambient temperature is 25°C, find :

(i) The maximum power dissipation that can be allowed.

(ii) The maximum power dissipation that can be allowed with aluminium heat sink of 12.5

cm2 area which reduces the thermal resistance to 0.08°C/mW.

Sol. (i) When no heat sink is used

Tj (max) = 90°C

Tamb = 25°C

= 0.29°C/mW

Tj a max f Tamb 90 25

Ptotal = = = 224 mW.

0.29

(ii) When heat sink is used

Tj (max) = 90°C

T(amb) = 25°C

= 0.08°C/mW

Pj a max f90 25 Tamb

Ptotal = = 812.5 mW. Ans.

=

0.08

Problem 8. We are to match a 20 speaker local to an amplifier so that the effective load

resistance is 10 k . What should be the transformer turns ratio ?

Sol. We know that,

RL = RL

FG N IJ 1

2

HN K 2

RL = load resistance or speaker

N1 = Primary turns

N2 = Secondary turns

Given R L = 10 k = 10 1000

RL = 20

FG N IJ

1

2

= n2 =

RL

HN K

2 RL

RL 1000

n= 500 = 22.36 23

RL 20

N1

or = 23 : 1.

N2

Problem. 9. A sinusoidal signal VS = 1.75 sin 600 t is fed to an amplifier the resulting

output current is of the form l0 = 15 sin 600 t 1.5 sin + 1200 t + 1.2 sin 1800 t + 0.5 sin

2400 t.

Calculate :

(a) Second, third and fourth harmonic distortions,

(b) Percentage increase in power because of harmonic distortion.

Sol. We know that

I2 1.5

(i) Second harmonic distortion, D2 = = = 0.10

I1 15

I3 1.2

Third harmonic distortion, D3 = = = 0.08

I1 15

I4 0.5

Fourth harmonic distortion, D4 = = = 0.03

I1 15

(ii) To calculate the percentage increase in power, first-of-all calculate total distortion

factor (D). And assume that input power is P1.

The distortion factor is :

D= D22 D32 D24

2 2 2

= 0.1323.

The net output power is :

Ptotal = (1 + D2) P1

= {1 + (0.1323)2} P1

= 1.0175 P1.

Thus, the percentage increase in power is :

Ptotal P1 1.0175 P1 P1

% Increase in power = 100 = 100

P1 P1

= 1.75%. Ans.

Problem. 10 (a) If the transfer characteristics of the power transistor can be approxi-

mated by a second degree equation as ic = G1 ib + G2 ib2 , show that collector current contains

a second harmonic components, B2 and a dc component B0 in addition to the fundamental

component B1. [Given that ib = im cos wt].

(b) Calculate the value of B0, B1 and B2 in terms of IC max, Imin and IC.

(c) A transistor supplies 0.85 Watts total power to a 4 k load. The dc collector current is

RL 10000

31 mA. When there is no signal. When si = 500 again applied, the dc

RL 20

collector current increases to 34 mA.

Find the percentage 2nd harmonic distortion.

Sol. (a) Given that,

ib = im cos t

so, ic = G1 ib + G2 ib2

ic = G1 im cos t + G2 . im2 cos2 t

ic = G1 im cos t + G2 im2

FG 1

cos 2 t IJ

or

H 2 K

G2 2 G2 2

or ic = im + G1 im cos t+ im cos 2 t

2 2

R| Let us 0

G 2 im2 U|

S|assume V|

2

1 G 1 im

or ic = B0 + B1 cos t + B2 cos 2 t

T 2

G 2 im2

2 W

Now, taking quiescent current (IC) into account.

ic = IC + B0 + B1 cos t + B2 cos 2 t

(b) when t = 0, then

ic = Imax = IC + B0 + B1 + B2

When t=

2

i c = IC + B 0 – B 2

When t = ic = Imin = IC + B0 – B1 + B2

Also, from above

B0 = B 2

From above equations, we have

Imax – Imin = 2B1

I max I min

B1 =

2

I minI max

B 0 = B2 =

2

(c) We know that B0 = 34 – 31 = 3 mA = B 2.

2

1 RL

P=

2

2P 2 85

or B1 = = 20.6 mA.

RL 4 1000

We know that second harmonic distortion.

B2 3 mA

D2 = 100 100 = 14.6%. Ans.

B1 20.6 mA

Problem 11. The maximum collector dissipation of a transistor used in a class-A amplifier is

10 W. When a signal is applied, the collector efficiency of circuit is 32%. Calculate the ac

power output.

Sol. Given PD = 10 W

= 32% = 0.32

Po (a.c) = ?

We know that,

Po a a.c f

= ...(1)

Pi a d .c f

Also we know that

P i = Po + P D ...(2)

So, from equations (1) and (2), we have

Po

=

Po PD

Po

0.32 =

Po 10

0.32 Po + 3.2 = Po

Po (1 – 0.32) = 3.2

3.2

Po = = 4.7 watt. Ans.

0.68

Problem 12. An amplifier has a collector efficiency of 50% and operates from a 24 V

supply if the output power is 3.5 W, what is the total dissipated within the circuit ? What is

most likely source for most of this power loss ?

Sol. Given : = 50% = 0.5

Po (ac) = 3.5 V

VCE = 24 V

PD = ?

We know that

Po a a.c f

= 100

Pi a d .c f

3.5

50 = 100 ...(1)

Pi a d .c f

Also from equation,

Pi (dc) = Po (a.c) + PD ...(2)

Hence from equations (1) and (2), we have

3.5

0.5 =

3.5 PD

P, = 3.5 W.

The power PD = 3.5 W is dissipated in the form of heat within the transistor collector

regions.

Problem 13. A three stage amplifier has higher cut-off input frequency is 50 Hz. What is

the value of output frequency ?

Sol. We know that

fH* = fH 21/n 1

where fH* = upper 3dB or cut-off frequency of the output

fH = upper 3dB or cut-off frequency of the input

n = number of stages

Here given, n=3

fH = 50

f H* = ?

fH* = 50 21 / 3 1 = 24.49 = 24.5 Hz. Ans.

Problem 14. A four stage amplifier has lower cut-off input frequency is 100 Hz. What is

the value of lower cut-off output frequency ?

Sol. We know that,

fL

f L* =

1/ n

2 1

Given fL = 100 Hz

n=4

100

So, fL * = = 229.89 230 Hz. Ans.

21/ 4 1

Problem 15. An output waveform displayed on an oscilloscope provided the following

measured values.

(a) VCEmin = 1.2 V, VCEmax = 22 V, VCEQ = 10 V

(b) VCEmin = 2 V, VCEmax = 18 V, VCEQ = 10 V

Determine the percentage second harmonic distortion.

Sol. Second harmonic distortion in terms of VCEmax , VCEmin and VCEQ is given by the

relation.

1

d

VCEmax VCEmin VCEQ i

D2 = 2 100

VCEmax VCEmin

1

2

b

22 1.2 10 g 1

2

23.2 10

(a) D2 = 100 = 100 = 7.7%. Ans.

22 1.2 29.8

1

a

18 2 10 f

(b) D2 = 2

18 2

10 10

or D2 = =0 i.e., 0% or no distortion. Ans.

16

Problem 16. In class-B push-pull operation the dc power drawn is 25 W. At the ideal

efficiency of power conversion what is the power delivered.

Sol. Given Pi (d.c) = 25 W

= 78.5% = 0.785

Po (a.c) = ?

Po a a.c f

=

Pi a d.c f

Po (a.c) = 0.785 25 = 19.625 W. Ans.

Problem 17. Figure N (2.5) shows a push-pull class-B amplifier using complementary

symmetry transistors. Given VCC = 6 volts. Peak output current amplitude is 1 amp. What is

the dc power drawn from each power supply ? + VCC

Sol. Given VCC = 6 volts

Im = 1 amp

Assume = 78.5% = 0.785

in the case of class-B push-pull amplifier.

VS VO

Po a ac f

=

Pi a dc f RL

Po a ac f Po a ac f

0.785 = or 0.785 =

VCC . I C 6 1

( IC = Im in class-B push-pull amplifier) – VCC

Po (ac) = 6 0.785 = 4.71 W Figure N (2.5)

dc power drawn from each power supply is

4.71

= = 2.355 W. Ans.

2

Problem 18. For the circuit given underhere find out the value of H required for the Ge

transistor circuit to be thermally stable.

Assume VCC = 30 V and RC = 2.0 K and RC = 4.7 K.

VCC

RC

R1

IC

C

VC

B

+

IB

E

Vi R2

RC

N

–

Figure N (2.6)

Sol. Above mentioned self bias circuit can be simplified by using Thevenin’s theorem as

under :

IC RC

C

RB B

VCE +

VCC

IB –

E

+

V

– RE

Figure N (2.7)

Applying KVL in output ; we get

IC = 1.5 mA and RE = 4.7 k is assumed.

PC

Now, = 30 – (2) (1.5) (4.7 + 2.0) = 9.9 V

IC

For an increase in temperature from 25°C to 75°C IC increases by 0.131 mA

IC 0.131 10 3 6

= 2.62 10 A/°C

Tj 75 25

1

Now, 9.9 2.62 10–6 <

H

or H < 3.05 104°C/w

1. Distinguish between voltage amplifier and power amplifiers.

2. Derive expression for efficiency of class-A amplifier. Show that its maximum value is 50%.

3. Draw the circuit of a single ended class-A amplifier. Explain its working what will be its

collector efficiency.

4. Why is a power amplifier also known as “Large signal amplifier ?” Why does a power

amplifier generally employ a step down transformer in its collector circuit ? Explain.

5. What is heat sink ? Why do we use heat sink in power amplifiers ?

6. Draw the block diagram of an audio amplifier and mention the function of different stages.

7. Define and explain the following terms as applied to power amplifiers ?

(i) Collector efficiency (ii) Distortion

(iii) Power dissipation capability.

8. Why harmonic distortion is prominent in power amplifiers ? Support your answer with

mathematical expressions.

9. Draw the circuit diagram of a push-pull amplifier circuit. Explain

(a) How proper biasing is achieved in this circuit.

(b) How ac power, free from even harmonics is developed across the load ?

10. Draw the circuit diagram of a push-pull amplifier circuit and explain its working. Why this

circuit is called push-pull ?

11. Draw a practical circuit of a complementary symmetry push-pull amplifier and explain its

working. Why this circuit has become more popular in modern circuits ?

12. Explain how to complementary transistors in a class-B push-pull amplifiers act simultaneously

as phase inverters and an output push-pull pair.

1. In the basic power amplifier circuit given in Figure P (2.1) calculate the turns ratio of the

transformer for obtaining maximum output power. Assume the loudspeaker resistance equal to

4 and the dynamic output resistance (1/hoc) of the transformer to be 14.4 k .

VCC = 12 V

Loudspeaker

10 k

VS 33 k

10 ++ V

C

–– E

Figure P (2.1)

2. signal power is to be delivered to a loudspeaker + 12 V

having a resistance of 4 . The output transformer RC

used in the power amplifier for this purpose has a R1 47 k

turns ratio of P 2.1. The primary winding of the 47 k VO

transformer gets ac signal from a transistor which C1 C2

can be represented by a current source of 5 mA and

shunt resistance of 8 k . Calculate the power deliv- Vin RL

ered to a loudspeaker when it is connected to the R2 10 k

secondary of the transformer. [Ans. 27.778 mW] RE

10 k

1k

3. If power is to be delivered in a 5 loudspeaker coil

through a transformer in an audio power amplifier

circuit, calculate the turns ratio of the transformer.

Assume the dynamic output resistance of the trans- Figure P (2.2)

mitter to be 25 k .

4. Determine the collector current and the collector to

emitter voltage at the point of saturation and cut off

in Figure P (2.2) under ac signal operation and hence draw the ac loud line. Assume VBE =

0.7 V.

[Ans. 1.4 mA ; 4 V]

5. A transistor supplies 0.85 W to a 4k load. The zero-signal dc collector current is 31 mA, and

the d.c collector current with signal is 34 mA. Determine the percent second-harmonic

distortion.

6. A power transistor operating class-A in the circuit of given figure P (2.3) is to deliver a

maximum of 5 to a 4 load (RL = 4 ). The quiescent point is adjusted for symmetrical

clipping and the collector supply. Voltage is VCC = 20 V. Assume ideal characteristics as in

Figure P(2.3) with Vmin = 0.

iC

Jmax 1

Im

IC Q

Im

Vm Vm 2

Jmin VCE

O Vmin VC Vmax

Figure P (2.3)

N2

(a) What is the transformer turns ratio n =

N1 ?

(b) What is the peak collector current Im

(c) What is the quiescent operating point IC, VCE ?

(d) What is the collector circuit efficiency ?

7. A single transistor is operating as an ideal class-B amplifier with a 1K load. A dc meter in the

collector circuit reads 10 mA. How much signal power is delivered to the load ?

8. The idealized push-pull class-B transistor amplifier whose characteristics are as in Figure

FN I

= G

2

H N JK

1

P(2.4). The collector supply voltage VCC and the effective load resistance R L RL

2

are fixed as the base current excitation is varied. Show that the collector dissipation PC is zero

at no signal (Vm = 0) rises as Vm increases, and pass through a maximum given by equation.

2V 2 2VCC

PC max = 2CC at Vm = .

RL

iC Dynamic iC

transfer

characteristic

Im

O t

1

I IB

O 2 B iB

Excitation

wt

Figure P (2.4)

9. The power transistor whose characteristics is used in the class-B push-pull circuits with

R2 = 0 and VCC = – 20 V and R L = 15 . If the base voltage is sinusoidal with a peak value

of 0.4 V, plot the output collector current.

At the end of this unit you will be able to learn about the

Cascade amplifier

Amplifier coupling

Different coupling used in multistage amplifier

RC coupled amplifier and analysis

Transformer coupled amplifier

Direct coupled amplifier

Emitter follower

Darlington amplifier analysis

Bootstrapping

Tuned amplifier basics

Tuned (Resonant) circuits

Single tuned voltage amplifier

Double tuned voltage amplifier

Stagged-tuned voltage amplifier

As we have discussed earlier that voltage or current or power gain obtained from a single-

stage amplifier is limited. It is inadequate to drive the output devices like speaker, indicating

instruments etc. So in order to achieve high voltage gain, current or power, we need more

than one stage i.e., multistage. As we know that an amplifier is the basic building block of

most electronics system. Just as one brick does not make a house, a single-stage amplifier is

not sufficient to build a practical electronics system. Thus, we can say that when a number of

amplifier stages are used in succession (one after the other) it is called a multistage amplifier

or cascaded amplifier. It may be noted that much higher gain can be obtained from the multistage

amplifiers. In the multistage or cascaded amplifier, more than two amplifier are arranged in a

manner that output of one stage (amplifier) act as input of the other stage (amplifier). Much

higher gains (thousands and millions times) can be obtained from a multistage amplifier.

shown in Figure 3.1. You may note that the output of the first stage makes the input of the

second stage, the output of the second stage makes the input of third stage and so on.

The signal voltage VS is applied to the input of the first stage. The final output V0 is then

available at the output terminals of the last stage.

The output of the first stage or the input to the second stage is

v1 = A1 vs

where A1 is the voltage gain of the first stage. Then the output of the second stage (or the

input to the third stage) is

v2 = A2 v1

Similarly, the final output v0 is given as

v 0 = vn = A n V n – 1

where An is the gain of the nth stage.

Now, overall gain A of the amplifier is then given as

0 1 2 n 1 0

A=

s s 1 n–2 n 1

A = A1 A2 ... An – 1 An

VS VS = Vin A1 V1 A2 V2 A3 V3 Vn–1 An Vn = V0

For example, the three stages (cascaded) common emitter amplifier are shown in Figure 3.2.

+ VCC

R1 RC R1 RC R1 RC

CC CC CC VO

1 2 3

Q1 Q2 Q3

RS

+ CE

VS R2 RE CE R2 RE 2 R2 RE CE

– 1 3

Note. The gain of a multistage amplifier can be easily computed if the gains of the individual stages are

known in dB. If we take logarithm (to the base 10) then from equation (3.1) and then multiply each term by

20, we get

20 log10 A = 20 log10 A1 + 20 log10 A2 + ... + 20 log10 An ...(3.1)

In the above equation, the term on the left is the overall gain of the multistage amplifier

expressed in dB. The terms on to the right denote the gains of the individual stages expressed

in dB. Thus, the overall voltage gain in dB of a multistage amplifier is the sum of the decibel

voltage gains of the individual stages i.e.,

AdB = AdB1 + AdB2 + AdB3 + ... + AdBn ...(3.2)

The high 3-dB frequency for n-cascaded stages is fH and equal to the frequency for which

1

the overall voltage gain falls 3dB i.e., (which we will discuss, in more detail latter) of

2

its mid band value. To obtain the overall transfer function of non-interacting stages, the

transfer gain of individual stages are multiplied together.

Hence, if each stages has a dominant pole and if the high 3-dB frequency of its stage is fHi,

where i = 1, 2, 3, ..., n, then fH* can be calculated from the product.

1 1 1 1

=

Ff*I 2

Ff*I 2

FG f * IJ 2 2

1 GH f JK H

H1

1 GH f JK

H

Hi

1 H

HI K

n

fH1 = fH 2 = fH3 = .......... fH i = fHn fH

thus fH* is calculated from

LM 1 OP 2

=

1

MM F f*I P 2 2

N

1 GH f JK PQ

H

or f H * = fH . 21/n 1 ...(3.3)

where fH* = higher cut-off or upper 3-dB upper 3-dB frequency after n stage.

fH = cut-off or upper 3-dB frequencies of each stage.

Thus, from equation (3.3) it is clear that as the number of cascaded stages increases the

f *

upper 3-dB frequency decreases. For example, for n = 2, H = 0.64. Hence, two

fH

cascaded stages, each with a bandwidth, fH = 10 kHz, have an overall bandwidth of 6.4 kHz.

However, if the lower 3-dB frequency for n identical non-interacting cascaded stages is

fL* then corresponding to equation (3.3) we find

fL

fL * = ...(3.4)

1/ n

2 1

where fL* = Lower cut-off or lower 3-dB-frequency after n-stage

fL = Cut-off or lower 3-dB frequency of each stage.

Thus, from equation (3.4) it is clear that as the number of cascaded stages increases the

lower 3-dB frequency increases.

Now, if we combine these two results we see that a cascade of stages has a lower fH

and a higher fL than a single stage, resulting in a shrinkage (decrease) in bandwidth.

Example 1. A multistage amplifier consists of three stages. The voltage gains of the stages

are : 80, 50, 30, find the average (overall) voltage gain in dB.

Sol. We know that the overall voltage gain in dB of three stage amplifier is given by

AdB = AdB1 + AdB2 + AdB3

First we calculate the gains of individual stages in dB.

Thus,

AdB1 = 20 log10 80 = 38.06 dB

AdB2 = 20 log10 50 = 33.99 dB

AdB3 = 20 log10 30 = 29.54 dB

Overall voltage gain is

AdB = 38.06 + 33.99 + 29.54 dB

101.59 dB.

Example 2. Find the overall voltage gain of the 3-stage (multistage) amplifier. If each

stage has Rin = 1 k ; = 60 and RC = 2.4 k .

Sol. Voltage gain of single stage,

RC 2.4

G1 = = 60 = 144.

R in 1

Voltage gain of one stage in dB = 20 log10 G1 = 20 log10 144 = 20 2.158 = 43.17 dB.

Overall gain of the multistage amplifier (similar stages)

G = 3 G1 = 3 43.17 = 129.4 dB. Ans.

Earlier it was stated that almost every electronic devices contains at least one stage of

amplification. Many devices contain several stages of amplification and therefore several

amplifiers. Stages of amplification are added when a singlestage will not provide the required

amount of amplification. For example, if a single stage of amplification will provide a

maximum gain of 100 and desired gain is 1000, two stage amplification will be required.

The two stage might have gains of 10 and 100, 20 and 50 or 25 and 40. (The overall gain is

the product of individual stages : 10 100 = 20 50 = 25 40 = 1000). Figure 3.3 shows

the effect of adding stages of amplification. As stages of amplification are added, the signal

increases the final output (from the speaker) is increased.

Turntable Amplifier Speaker

Input Output

Turntable

1 2

Figure 3.3 (b). Two stage amplifier.

Turntable

1 2 3

Figure 3.3 (c) Three stage amplifier.

other devices (as in Figures 3.3(a) and (b)) there must be some way for the signal to enter and

leave the amplifier. The process of transferring energy between circuits is known as cou-

pling. There are various ways of coupling signals into and out of amplifier circuits. The

following is a description of some of the more common method of amplifier coupling.

It should be always remembered that, all amplifier need some kind of coupling network.

Even a single stage amplifier needs coupling to the input source and output level. Following

types of interstage coupling are given below :

1. Resistance-capacitor (RC) coupling.

2. Impedance coupling.

3. Transformer coupling.

4. Direct coupling.

1. Resistance Capacitance (RC) Coupled Amplifier

Figure 3.4 shows a two-stage RC coupled transistor amplifier. The given circuit consists of

two singlestage C-E transistor amplifiers. The resistors R1, R2, RB and capacitor CC form the

coupling network. The capacitor C1 is used to couple the input signal to the base of Q1, while

the capacitor C2 is used to couple the output signal from the collector of Q 2 to the load. The

capacitor CE connected at the emitters of Q1 and Q2, are needed because they bypass the

emitter current to the ground. without these capacitors, the voltage gain of each stage will be

lost.

VCC

RC Cout

RL R1

R1 CC

C1

R2 RE

Vin CE

R2 CE

RE

Input signal

Coupling network

Figure 3.4 RC coupled amplifier.

Operation : When the ac signal (i.e., input signal) is applied to the input of first stage, it

is amplified by a transistor and appears across the first stage output. This signal is given to

the input of second stage through a coupling capacitor CC. The second stage does further

amplification of the input signal. Thus, we can say that the cascaded stages amplify the signal

and the overall gain is equal to the product of the individual stage gains.

It will be interesting to know that the output signal of two stage RC coupled amplifier is in

phase with the input signal. It is because of the fact that its phase has been reversed twice by

the amplifier.

Analysis : Some assumption is to be made for the analysis of RC coupled amplifier. These

assumptions are :

(a) hre is so small so that voltage source hre Vo can be neglected.

(b) The bias resistors (R1 and R2) value are usually large as compared to hie.

1

(c) is very large so it can be considered as open circuit.

hoe

(d) The reactance of CE is so small for any input frequency so the parallel combination of R E

and CE can be effectively considered as short circuit.

From the above assumptions, we simplified the equivalent circuit diagram as shown in

Figure 3.5.

Ib Ic CC

For the purpose of analysis the entire frequency range may be divided into the following

three categories :

(i) Low frequency range (i.e., below 100 Hz)

(ii) Mid frequency range (i.e., above 20 KHz)

(iii) High frequency range (i.e., between 100 Hz to 20 KHz).

Let us discuss and analysis of low frequency ranges.

(i) Low Frequency Range Analysis : For the low frequency range, the impedance

offered by coupling capacitor is comparable with load resistance and it largely affect current

amplification. Therefore, it is included in its equivalent circuit (in Figure 3.6).

After this apply the Thevenin theorem on the circuit and the equivalent Thevenin circuit

become (as shown in Figure 3.6).

RL CC

I

+

–

Figure 3.6 Thevenin equivalent circuit.

h fe I b R L

...(3.5)

hie R L j / C C

So the current gain for low frequencies is given by

I h fe . R L

AiL = = ...(3.6)

Ib hie RL j / CC

Output voltage Vo

h fe hie I b R L

Vo = hie Current (I) = ...(3.7)

hie RL j / CC

Input voltage is Vin = hie Ib ...(3.8)

Vo h fe R L

Voltage gain = AVL =– ...(3.9)

Vin hie RL j / CC

From the equation (3.9) we can see that in low frequency range voltage gain decreases

with the decrease in frequency.

(ii) Mid-frequency range Analysis : At mid-frequencies, the impedance offered by

coupling capacitor CC is so small. So it can be effectively considered as short circuit. So

capacitor CC can be neglected. So the equivalent circuit for the mid-range frequencies is

shown in Figure 3.7.

Ib

Ib I RL

h fe I b R L

Current (I) = ...(3.10)

hie RL

I h fe R L

Current gain Aim = = ...(3.11)

Ib R L hie

Input voltage Vin = hie Ib

hie . h fe I b R L

Output voltage Vo = hie I = ...(3.12)

RL hie

Vo

=

hie h fe I b R L / R Lb hie g

Vin hie I b

h fe R L

...(3.13)

RL hie

The –ve sign means a phase changes of 180°. As from the above equation of current and

voltage gains are equal. (Aim = AVm).

(iii) High Frequency Range Analysis : In high frequency range, the reactance offered by

coupling capacitor CC is very small and it may be considered as a short-circuit. One most

important factor that comes into picture at high frequencies is their capacitances. In the BJT,

there are two depletion regions across the two P-N-junctions as shown in the Figure 3.9.

+ VCC

RL

CC

CB Vo

C

CC

E

Vin Cw

2

Cw CB

1 E

RE CE

Here, we consider three main inter capacitance as shown in figure 3.9. These inter-

capacitance and their effects are explained below as :

CBC – Capacitance between the base and collector connects output with input. It makes

the –ve feedback path. Due to this gain is reduced. This effect increase with increase in

frequency because with increase in frequency reactive impedance of capacitor decreases.

CBE – Capacitance between the base and emitter. It offers a low impedance path at the

side of input at high frequencies. This reduces the input impedance of the device, so the input

signal reduces and gain also reduced.

CCE – Capacitance between collector and emitter, it produces a shunting effect at high

frequencies on the output side. It is worthnoting point that Cbc is most important capacitance

because feedback takes place from output to input circuit through this capacitance. This is

called miller effect.

Cw1, Cw2 – Capacitances of wiring which connects between connecting wires of circuit

and ground. The CBE and CBC is replaced with Cd across the input resistance hie of the

transistor. The value of shunt capacitance (Cd) in the input circuit of the first stage is very

small. But in the output circuit (Cd) is increased by the stray capacitance of wires. The

1

reactance will have sufficient shunting effect on R2 and hie. The equivalent circuit at

Cd

high frequencies shown in Figure 3.10 and their Thevenin equivalent circuit in Figure 3.11.

Ib Ic

RLhie

Ic RL + hie

RLhie

Vin hie hfe .ib . Cd Vo

RL hie

R L hie

h fe . I b .

R L hie h fe . I b . R L . hie

Current (I) = = ...(3.14)

R L hie

R L hie

1

j Cd

R L . hie

j Cd

1

R L hie b g

I h fe . hie . R L

Current gain,Ai h = ...(3.15)

Ib R L hie

1

j Cd

b

RL hie g

Input voltage (Vin) = Ib hie ...(3.16)

1

Output voltage (Vo) = I .

j Cd

Vo =

b

h fe . I b . R L . hie / R L hie g 1

LMcbR gb

. hie / R L h gh

1

PQO j Cd

N L ie

j d Cd

h fe . I b . R L . hie

Vo = ...(3.17)

R L . hie . j C d bR L hie g

Vo

Voltage gain Avh =

Vin

h fe . R L

Avh = ...(3.18)

hie RL j C d . R L . hie

It is clear from above equation if frequency of input voltage increases, the voltage gain

decreases.

Lower cut-off frequency (f1) : The frequency at which the magnitude of the voltage gain

1

in the low frequency range falls off to or 0.707 times the maximum gain in the mid

2

frequency range is called lower cut-off frquency.

Thus,

1

| Avi | = | Vvm | ...(3.19)

2

From the above equation, the magnitude of A v1 become

h fe R L

| Avl | =

g FGH 2 1f C IJK

2

b hie RL

2

h fe . R L

L F I PO

1

2

bh R g M1 G

1

ie

MN H 2

L

f C hie b RL g JK PQ

2

and | Avm

Fh

|=G

fe .R I

JL

Hh ie R K L

A L 1

= ...(3.20)

A LM F 1 I 2

PPO

MN1 GH 2 g JK

m

b

f C hie RL

Q

f1 is the lower cut-off frequency. So equation become

1 1

=

2 LM L 1 OP OP 2

1 M

MN MN 2 f C bh R g PQ PQ 1 ie L

=1+ M

L 1 OP = 2 2

MN 2 f C bh R g QP 1 ie L

1

b

2 f1 C hie RL g =1

1

f1 = ...(3.21)

2 C hie b RL g

We get (from equation 3.20)

A m A m

| AvL | = = ...(3.22)

b1 f1 / f g 2

1 btan g 1

2

where tan =

f1

or = tan–1

FG f IJ

1

...(3.23)

l

f

i

H fK

So that total phase shift of the AvL is given by

f1 1

L = 180 + l 180 + tan ...(3.24)

f

From equation (3.24), it is obvious that with the decrease in frequency l increases and f = f1

l = 180 + 45° = 225°

So L increases above 225°, if f is further decrease.

Upper cut-off Frequency (f2) : The frequency at which the magnitude of the voltage gain

1

in the high frequency range falls to or 0.707 of the magnitude of the gain in the mid-

2

frequency range is called upper cut-off frequency. Thus,

A m

| Avh | = ...(3.25)

2

From the equation, the magnitude of Avh become

h fe R L

| Avh | =

g LMM1 FGH 2 IJ OP

1

2

bh RL

f . C d . hie . R L

K PQ

ie

N hie R L

h fe . R L

and | Avm | =

hie RL

A vh 1

= ...(3.26)

MML1 FGH 2 OP 1

A vm

f . C d . hie . R L IJ 2 2

N hie R L K PQ

F2 is the upper cut-off frequency, so equation become

1 1

=

MML1 FGH 2 IJ OP

1

2 2 2

f2 . C d . hie . R L

N hie R L K PQ

or 1+ M

L2 f2 . C d . hie .R O

2

PQ = 2

L

N hie R L

2 f2 . C d . hie . R L

=1

hie R L

f2 =

1

.

1 LM 1 OP ...(3.27)

2 C d hie N RL Q

From equation (3.26),

A h 1 1

= = ...(3.28)

A m LM1 F f I OP 2

e b

1 tan gj

2

MN GH f JK PQ

h

= tan G J

FfI –1

...(3.29)

h

Hf K 2

H = 180° – h

= 180° – tan–1

FG f IJ ...(3.30)

Hf K

2

At f = f2, H = 180° – 45° = 135°

So H decrease below 135°. If f is further increase.

Frequency response of RC coupled amplifier : The frequency response of an amplifier

is nothing but a graph, which indicates the relationship between the voltage gain as a function

of frequency. Generally, the voltage gain (in decibels) is plotted along the vertical axis and

frequency along the horizontal axis of the frequency response graph.

Low High

frequency frequency

Voltage gain (dB)

Flat

Response

100 Hz 20 kHz

Frequency (Hz)

Figure 3.12 Frequency response of RC coupled amplifier

It is evident from Figure 3.12 that voltage gain drops off (or rolls off) at low frequencies

and at high frequencies, while it remains constant in the mid-frequency range. The behaviour

is discussed in more detail follows :

(a) At low frequencies (i.e., below 100 Hz) : We know that the capacitive reactance (XC)

is inversely proportional to the frequency. Thus, at low frequencies, the reactance of the

capacitor CC is quite large. Therefore it will allow only a small part of the signal to pass from

one stage to the next stage. Besides, this the emitter bypass capacitor (CE) cannot shunt the

emitter resistor effectively, because of its large reactance at low frequencies. As a result of

these two factors, the voltage gain rolls of at low frequencies.

(b) At high frequencies (i.e., above 20 KHz) : In this frequency range, the reactance of CC

becomes quite small, therefore it behaves like a short-circuit. As a result of this, the loading

effect of next stage increases, which reduces the voltage gain. In addition to this, the

capacitance of the emitter diode plays an important role at high frequencies. It increases the

base current of the transistor due to which the current gain ( ) reduces. Hence the voltage

gain rolls off at high frequencies.

(c) At mid-frequencies (i.e., between 100 Hz to 20 KHz) : The effect of coupling capaci-

tor, in this frequency range is such that it maintains a constant voltage gain. Thus, as the

frequency increases the reactance of CC decreases, which tends to increase the gain. How-

ever, at the same time, the lower capacitive reactance increases the loading effect of next

stage due to which the gain reduces.

These two factors almost cancel each other. Thus, a constant gain is maintained through-

out this frequency range.

Advantages of RC coupled amplifier

It is the most convenient and least expensive multistage amplifier.

It has a wide frequency response.

It provides less frequency distortion.

Disadvantages of RC coupled amplifier

Following are the disadvantages of RC coupled amplifier

The overall gain of the amplifier is comparatively small because of loading effect of

successive stages.

It has a tendency to become noisy with age, especially in moist climates.

It provides poor resistance (or temperature) matching between the stages.

Note. RC coupled amplifier has an excellent frequency response from 100 Hz to 20 kHz. This

property makes it very useful in the initial stages of all public address systems. However, it may be

noted that a coupled amplifier can not be used as a final stage of amplifier because of its poor

impedance matching characteristics.

Example 3. A two stage amplifier uses transistors of which the transistor-parameters are hie =

4.5 k and hfe = 330. If the load resistance, RL = 5.5 k , find the required value of the

coupling capacitor C, so that the lower cut-off frequency is 50 Hz.

Sol. Given : hie = 4.5 k ; RL = 5.5 k

hfe = 330 ; f = 50 Hz

We know that lower cut-off frequency f1 is given by

1

f1 =

b

2 C hie RL g

1

C=

b

2 f1 hie RL g

Put the given values in above expression, then we get

1 10 5

C= = F

2 314

. a

50 4.5 5.5 f 10 3 2 3.14 5

= 0.0319 10–5 F = 0.319 F. Ans.

Example 4. In two stage RC coupled amplifier the values for R 1 = 2 k ; B = 80 and

RC = 1.5 k . Calculate the voltage gain for first stage and overall voltage gain in dB.

Sol. Given R1 = 2 k

RC = 1.5 k

= 80.

As we know that there is loading effect on the first stage first we calculate effective load of

first stage

RC R1 1500 2000

RAC = RC || R1 =

RC R1 1500 2000

3000000

= = 857.15 .

3500

Voltage gain of first stage,

R AC

G1 =

R1

857.15

= 80 = 34.28

2000

Overall gain (voltage) G = G1 G2 ( Two stages)

Let us calculate G2, as there is no load effect on second stage ;

Voltage gain of second stage =

RC

G2 =

Ri

1.5

= 80 = 60

2

Overall voltage gain = G1 G2

G = 34.28 60 = 2056.8

Overall voltage gain in dB

= 20 log10 G

= 20 log 2056.8

G = 66.28. Ans.

2. Impedance Coupling

The circuit shown in Figure 13(a) is a two stage impedance-coupled amplifier using NPN

transistor amplifier circuits. The impedance is coupling is different from RC coupling is that

collector resistance RC of first transistor has been replaced by an inductor L. The inductor

turns are wound on a iron core and shielded to avoid the interference of magnetic field with

the signal

+ VCC

RC

R1 CC R1 CC

+

Cin

R2 Vout

VS R2 RE

RE CE CE

Figure 13 (b).

B C B C

1 1 1 2

Vin R1 R2 B 1r e L R1 R2 B1r e R1 R2 Vout

E E

Figure 13 (b) Equivalent Circuits.

All the capacitance have been considered as short circuit so voltage gain (first stage).

R ac1

Avi = = XL|| R1||R2||B2r1e2 ...(i)

r1e1

For XL >> R1||R2||Br2e2

Av1 = R1||R2||B2r1e2

Voltage gain (second stage)

R ac2 R c ||R L

Av2 = =

re1 r1e2

2

(i) This type of coupling results in more efficient amplification because no signal power is

wasted in inductor.

Disadvantage of Impedance Coupling

(i) It is heavier, costlier and larger than the RC coupling.

3. Transformer Coupling

The circuit shown in Figure 3.14(a) is a two-stage transformer coupled amplifier. The

circuit consists of two single stage common emitter transistor amplifiers. The Resistor R C is

replaced by the primary winding of the transformer. Note that in this circuit there is no

coupling capacitor. The dc isolation between the two stages is provided by the transformer

itself. There is no existence of the dc path between the primary and secondary windings of a

transformer. However, the ac voltage across the primary winding is transformed to the

secondary winding.

The main advantage of the transformer coupling over RC coupling is that all the dc

voltage supplied by VCC is available at the collector. There is no voltage drop across the

collector resistor RC. The dc resistance of primary winding is very low.

Operation : When the input is applied to the base of transistor Q 1, its amplified output is

appears across the primary winding of transformer T 1, due to the sufficient magnetic induc-

tion, it is passed to the secondary. After this the output of secondary T1 is applied to the base

of transistor Q2. The amplified output appears across the primary of the transformer T 2.

+ VCC

T2

T1

R1 R1

VO

Q1 Q2

VS R2

CE CE

R2 RE

RE

Analysis : For the analysis of transformer coupling the equivalent circuit of the above

figure is shown in Figure 3.14(a).

Ib Ic Ib

1 1 2

1

(hfe )ib

1 1 2

1

Figure 3.14(b) Equivalent circuit of transformer coupled amplifier.

Let k be the transformer ratio of the transformer, then

I1 N

k= = 2 ...(3.31)

I2 N1

Let us consider the input impedance of second stage hie2 d i to the first stage. The trans-

Z

former with turn ratio k reflects a load impedance Z to the primary equal to a value . By

k2

considering this fact, let us again draw the simplified equivalent circuit diagram becomes (as

shown in Figure 3.15).

Ib Ic

1 1

(hie )(Ib )

1

hie2

hie hoe

1 1

K2

Figure 3.15 1

Equivalent circuit (simplified).

hie2

The impedance (output) of first stage hoe1 and effective load transferred from second stage is .

k2

For maximum power transfer, these two should be equal, so equation is

1 hie

= 22

F N IJ

hie2

=G 1

2

hie2 ...(3.32)

hoe1 k FG N IJ H N K

2

2

2

HN K 1

N1 1

=

N2 hoe1 . hie2

So we can calculate the current gain at mid-frequency range.

I1 Ic

K= = 1

I2 I b2

I c1 N1

I b2 =

K

Ic

N2 1

d i ...(3.33)

h fe1 . I b1

The current I c1 through the primary will be (for matched conditions)

2

Hence, I b2 =

N1 FG h fe1 . I b1 IJ

N2 H 2 K

So current gain is given by

I b2 N1 h fe1

= ...(3.34)

I b1 N2 2

The current gain is several times as large as the gain of RC coupled amplifier.

Example 5. A load of 20 is to be matched with a source that has an output impedance

of 10 k . Calculate (i) the transformer turn ratio so as to transfer maximum power to the

load. (ii) the load voltage if source voltage is 8 V

Sol. Load impedance,

ZL = 20

Source impedance, ZS = 10 k = 10,000

ZS = K2 ZL

where K is ratio of primary to secondary turns

Z 10000

K2 = S = = 500

ZL 20

K = 500

K = 23

V VS 8

Load voltage V L = V2 = 1 = 0.348 V. Ans.

K K 23

Advantages of Transformer Coupled Amplifier

Following are the advantages of transformer coupled amplifier :

No signal power is lost in the collector or base resistors, because of the low winding

resistance of the transformer.

It provides a higher voltage gain than the RC coupled amplifier.

It provides an excellent resistance (or impedance) matching between the stages. The

resistance matching is desirable for maximum power transfer.

Disadvantages of Transformer Coupled Amplifier

Following are the disadvantages of transformer coupled amplifier :

The most obvious disadvantage is the increased size of the system. The transformer is very

bulky as compared to a resistor or a capacitor. It is also relatively costlier.

At radio frequencies, the winding inductance and distributed capacitance produces reverse

frequency distortion.

It tends to produce “hum” in the circuit.

Frequency response of transformer coupled amplifier

Figure 3.16 shows the frequency response for a transformer coupled transistor amplifier.

From Figure 3.16, it is clear that voltage gain (in dB) drops off at low as well as at high

frequencies, whereas it remains constant in mid-frequency range. Another noticeable feature is

that at one particular frequency (f0) the voltage gain increases and then rolls off continuously.

Resonant rise

frequency response frequency

Roll off Roll off

Voltage gain (dB)

Frequency (Hz)

Now, we will discuss this typical behaviour – as we know that output voltage of a

transformer coupled amplifier is equal to the product of the collector current and the

reactance of the primary winding of coupling transformer. At low frequencies, the reactance

of primary winding (XL = 2 fL) begins to decreases and hence the voltage gain reduces. At

high frequencies, the effect of leakage inductance and distributed capacitance becomes

significant and hence the voltage gain reduces. The peak gain results due to resonance (or

turning) effect of inductance and distributed capacitance, which forms a resonant circuit. The

frequency at which the peak, occurs is called resonant frequency (f0).

It has been found that the flat part of frequency response curve of transformer coupled

amplifiers is small as compared to that of RC coupled amplifier. As a result of this, these

amplifier, cannot be used over a wide range of frequencies. Besides, this if they are used,

they produce frequency distortion, which means that all the frequency components in a

complete input signal are not equally amplified.

4. Direct Coupled Amplifier

The amplifier used for amplification of very slowly varying signal makes use of direct

coupling. The range lies below 10 Hz. In this case it is to be noted that the capacitors,

inductors and transformers cannot be used as a coupling network at very low frequencies

because the electrical size of these devices, at low frequencies becomes very large.

Figure 3.17 shows a two stage direct coupled amplifier. It is to be noted that the output of

the first stage is directly connected to base of the next transistor. Moreover, there are no

input or output coupling capacitors. R1, R2, RC and RE form biasing network.

+ VCC

R1 RC R1 RC

VO

Q1 Q2

Input

signal R2 RE R2 RE

The signal to be amplified is applied directly to the input of the first stage. Due to the

transistor action, it appears as the amplified form across the collector resistor or transistor

Q1. This voltage then drives the base of second transistor Q 2 and the amplified output is

obtained across the collector resistor of transistor Q2.

Frequency response of direct coupled amplifier : Figure 3.18 shows the frequency

response of a direct coupled amplifier. It is evident from figure that the gain is uniform up to

a certain frequency denoted by f2. Beyond this frequency, gain rolls off at high frequencies

due to increased emitter diode capacitance and stray wiring capacitance.

106 Analog Electronics

Flat response

High frequency

roll off

f2

0 Frequency

Following are the advantages of direct coupled amplifier :

The circuit arrangement is very simple because it uses a minimum number of resistors.

The circuit cost is low because of the absence of coupling devices.

It can amplify very low frequency signals down to zero frequency.

Disadvantages of Direct Coupled Amplifier

Following are the disadvantages of direct coupled amplifier :

It cannot amplify high frequency signals.

It has a poor temperature stability because of this Q-point shifts. In a multistage direct

coupled amplifier, the Q-point is amplified in succeeding stages. Thus, a small dc shift in

the first stage can cause the final stage to be either saturated or cut-off. All integrated

circuit amplifiers are direct coupled because of the difficulty of fabricating large inte-

grated capacitors. It leads to special problems in their design.

Particular coupling coupling coupling coupling

1. Size and weight Small Large and bulky Larger and Very small

heavier than RC

coupling

2. Cost Small Costlier Costlier than Very small

RC coupling

3. Frequency response Excellent in the Poor Good Best

audio frequency

range

4. Impedance matching Not good Excellent Not good Good

Unsuitable

5. Uses For voltage For power For For amplification

amplification amplification frequencies of extremely

beyond audio low frequency

range signals

The circuit diagram of common emitter is + VCC

shown in Figure 3.19. Where R1, R2 are the

R1 RC C

biasing parameter. CC is the coupling C

VO

capacitance. Now, here we are interested to CC C

B

know what is the effect of coupling capacitor

on low frequency. RS E

R2

1 VS RE CE

We know that, XC = thus, it is

2 fC

clear that on low frequency the voltage drop

across the coupling capacitor increases which Figure 3.19 Common emitter amplifier

results decrease in the magnitude of the input given with coupling

signal. Also we know that V0 = A Vin means capacitor CC.

output voltage decreases.

The circuit diagram of a common-collector transistor amplifier is shown in Figure 3.20. This

configuration is also called the emitter follower because its voltage gain is close to unity, and

hence change in base voltage appears as an equal change across the load. In other words, we

can say that emitter follows the input signal. It is shown that input impedance R i of an emitter

follower is very high (approximately hundred of kilo ohms) and the output resistance R 0 is

very low (approximately tenth of ohm).

Hence the most common use for the common collector (CC) or emitter follower circuit is

as a buffer stage (or in impedance matching) which performs the function of resistance

transformation (i.e., from high to low resistance) over a wide range of frequencies, with

voltage gain close to unity. In addition emitter follower increases the power level of the

signal.

IC

C

RS IB VCC

B

E

+

+ Vi IL = I E

VS

– RL

Vo

Ri Ro

Main Characteristics of Emitter Follower

(i) It has a voltage gain value close to unity (i.e., ~

— 1)

(iii)It has low output impedance (~ — 5 – 20 )

(iv) There is no phase shift between output and input in either voltage or current.

(v) It increases the power level of the signal.

Expression for current gain, input resistance, voltage gain and output resistance of emitter

follower :

(i) Current gain :

IE – h fc 1 h fe

AI = = ...(3.35)

IB 1 hoc R L 1 hoc R L

(ii) Input resistance

Vi

Ri = = hie + hrc AI RL hie + AI RL ...(3.36)

IB

( hrc ~

— 1)

(iii) Voltage gain

V0 A R R hie h

Av = = i L = i = 1 – ie ...(3.37)

Vi Ri Ri Ri

(iv) Output resistance

Z0 =

1

where Y0 = hoc –

h fc hrc

= hoc

d1 h fe i

Y0 hie R S bh

ie RS g ...(3.38)

As emitter follower does in BJT (Bipolar Junction Transistor) source follower in FET (Field

Effect Transistor). Source follower is also called a common drain amplifier. The output

voltage of a source follower (or common drain) amplifier is approximately equal to and in

phase with the input voltage. Because of this fact, the source follows the input signal. The

circuit arrangement for source follower are shown in Figure 3.21.

VDD

D

CC

G

S

VO

VS RG

RS

It is also called high-input resistance transmit- + VCC

ter circuit. In some applications we require an

amplifier with a high input impedance. For C1

input resistances smaller than 500 k , the B1

emitter follower is taken into consideration.

C2

However, to achieve larger input impedances, Q 1 E1

the circuit shown in Figure 3.22 called the

B2

Darlington connection is used. Darlington pair Q 2 E2

is nothing but a cascade connection of two

common collector transistors. Figure 3.22 npn transistor darlington.

Basically a Darlington pair is a three terminal device namely Base (B), Emitter (E) and

Collector (C). It acts like a transistor, with an extremely high current gain in which both the

collectors are coupled to the VCC supply. The Darlington pairs are available for both npn and

pnp transistors.

The Darlington composite emitter follower will be analysed by referring to Figure 3.23.

+ VCC

C1

Ii = I b B1

C2

I2 = (1 + hfc)Ib

Rs E1 B2

Vi Q2 E2

V2 V0

+

VS RE

–

Ri R0

Derivation for input impedance, output impedance, current gain and voltage gain for a

Darlington connection before starting the derivations, we assume hoe RE < 0.1

Derivation for Current Gain

Here it is interesting to note that to calculate the current gain of any cascaded amplifier.

First of all we must analyse the last stage (i.e., here second stage, which will be discussed, in

more detail latter)

Current gain of second stage :

A i2 =

h fc

=

d1 h fc i { RL = RE ; hfc = – (1 + hfc)}

1 hoc R L 1 hoc R E

or A i2

d1 h fc i [ hoc RE < 0.1]

1

or A i2 (1 + hfc)

Now, R i2 = hic + A i2 hrc RL

{we can neglect hic since the current gain of C-C is very high}

or, R i2 (1 + hfc) . RE {hrc 1 A i2 = 1 + hfc

h fc

so, A i1 = {RL = RE}

1 hoc R i2

or A i1 =

d1 h i fc

1 h d1 h i R

oc fc E

or A i1

d1 h i fc

1 h R d1 h i

oc E fc

AI = A i1 A i2

d1 h fc i

i d i

or AI = 1 h fc

1 hoc R E 1 d h fc

or AI =

d1 h fc i 2

1 hoc R E hoc R E h fc

AI =

d1 h fc i 2

...(3.39)

1 hoc R E h fc

{neglecting hoc RE < 0.1}

Equation (3.39) represents the current gain of a Darlington pair. For the standard values

of hybrid parameter. Ai for this configuration is found 427, and for the single stage common

collector configuration it is about 50. It means Darlington pair has more current gain

compared to the single stage emitter follower.

Derivation for Input Impedance of Darlington Pair

Input impedance,

Ri = hic + A i1 + R i2 hrc

or Ri = hic +

d1 h fc i . d1 i

h fc R E . 1

1 hoc h fc R E

or Ri = hic +

d1 h fc i 2

. RE

d1 hoc h fc . R E i

Ri

d1 h i fc

2

. RE

...(3.40)

1 hoc h fc R E

From equation (3.40), it is clear that input impedance of Darlington pair is very high.

Derivation for Voltage Gain

hie2

A 2= 1 –

R i2

hie1

A =1–

1

R i1

But, Ri = hie + hrc . A i1 . R i2

hrc + A i1 . R i2 .

R i1

1 1 d i

h fc . R i2

d1 hoc h fe R E i

From figure since the transistor is CC so input voltage must be equal to output voltage.

i.e., Ib . hie1 = (1 + hfc) hie2 Ib

or hie1 = (1 + hfc) hie2

hie1

Now, Avi =

d1 h fc R i2i

d1 hoc h fc R E i

1–

d1 i d h

h fc hie2 1 oc h fe R E i

d1 h i R fc i2

1–

hie2 1 d hoc . h fe . R E i

R i2

So, overall voltage gain, A v = A 1 A 2

or Av = 1 S| |W T| R

ie2

V|

T R i2 i2 W

hic2

Av = 1 – [2 + hoc hfc RE] ...(3.41)

R i2

Derivation for Output Impedance

Output admittance is given by relation.

h fc . hrc

YO 2 = hoc –

hie2 RS

or YO 2 = hoc

d1 h fc . 1 i ...(3.41(a))

hie2 RS

1

where RS = R O1 =

YO1

h fc hrc

But, YO1 = hoc

hic RS

YO1 = hoc

d1 h fc . 1 i

hic RS

YO1

d1 h fc i

hic RS

1 h RS

RS = R O1 = = ie

YO1 1 h fc d i

Now, on putting the value of RS in equation (3.41(a)), we have

YO 2

d1 +h i fc

hie2

d1 h i h fc ie1 RS

1 h fc

or YO 2

b1 +h g fc

RS

hie2 hie2

1 h fc

or YO1

d1 +h i fc

2

2h d1 h i

ie2 fc RS

or YO1

d1 h i fc

2

2 hie1 RS

so, R O2 =

d

2 1 +h fc i RS

...(3.42)

d1 h fc i 2

We conclude from equation (3.42) that the Darlington emitter follower has a higher input

resistance and a voltage gain less closer to unity than a single stage emitter follower. The

output impedance of the Darlington circuit may be greater or smaller than that of a single

transistor emitter follower, depending upon the value of R S relative to hie2 . If RS = 0, then

RO for the Darlington combination is twice RO for a single stage emitter follower.

+ VCC

R1

B

E

+

VS

R2 RE VO

Ri Ri

Figure 3.24

Following are the advantage of Darlington Pair :

It provides very high value of current gain ( ) approximately 400.

The circuit arrangement is very simple as very few components are used.

It posses excellent impedance transformation capability i.e., it can transform a high

impedance source to low impedance load. Hence, it is used in a high gain operational

amplifier which depends on very high input impedance for its operation as an integrator or

summing amplifier.

Disadvantages of Darlington Pair

The major disadvantage of Darlington transistor pair is that the leakage current of first

transistor is amplified by the second. Hence, the overall leakage current may be high and

hence a Darlington connection of three or more transistor is usually impractical.

We have just discussed the analysis of different parameters for Darlington pair connection,

and seen that input impedance of Darlington pair was very high. However, biasing problem,

results in decrement in the input impedance of Darlington connection. This difficulty can be

overcome by using a bootstrapping circuit.

Thus, in reference to the Darlington pair Bootstrapping is nothing but an improvement of

input impedance in the Darlington pair. The circuit which provides this facility is called

Bootstrapping circuit.

Figure 3.24 shows the typical biasing network of resistors R 1, R2 and RE. The input

resistance R i of this stage (procedure will be discussed latter) is Ri || R , where R = R1 || R2.

i.e., R 1 = R1 || R

or R i = Ri || R1 || R2 ...(3.43)

From equation (3.43), it is clear that since Biasing resistors are in order of k , therefore

the resultant input impedance decreases, or in other words we can say biasing create a

problem that reduces the input impedance. We get resultant input impedance of the order of

k .

To overcome the decrease in the input resistance due to the biasing network, the input

circuit of Figure 3.25 is modified by the addition of C between the emitter and the junction

of R1 and R2. The capacitance C is chosen large enough to act as a short-circuit at the lowest

frequency under consideration. The bottom of R3 is effectively connected to the output (the

emitter), whereas the top of R3 is at the input (the base). Since the input voltage is V i and

output to voltage is V0 = Av Vi, by using A.C. equivalent model of Figure 3.15 and

applying Miller theorem (which will be discussed in detail). The biasing arrangement R 1, R2

and R3 represents an effective input resistance of :

R3

Reff = ...(3.44)

1 Av

+ VCC

R1

C

B

+

E

R3 C +

Vi

R2 RE VO

– –

Ri Ri

Figure 3.25

since, for the emitter follower, Av approaches unity, Reff becomes extremely large. For

example, with Av = 0.995 and R3 = 100 k , we find Reff 20 M . The above effect, when

Av + 1, is called Bootstrapping. The term arises from the fact that, find one end of the

resistor R3 changes in voltage, the other end of R3 moves through the same potential

difference ; it is as if R3 were “pulling itself up by its bootstraps”. The input resistance of the

hic

CC amplifier is Ri = i.e., increased input resistance of the common collector (CC)

1 Av

configuration.

Why we need a tuned amplifier : As we know that audio amplifier which operate between

(20 Hz to 20 kHz) and radio frequency amplifiers which operate between (a few kHz to

hundred of MHz). We can operate audio amplifiers at radio frequencies. But there are some

drawbacks in it. They are :

They become less efficient at audio frequencies.

Their gain is dependent of signal frequency over a large bandwidth because of resistive

load.

These amplifiers are not capable of selecting a particular frequency while rejecting all

other frequencies. Sometimes, we need to select a particular frequencies and their amplifica-

tion for a special application. When radio frequency signals from different broadcasting

stations reach the receiving antenna, a weak signal is induced in it. To extract the original

audio signal from the receiver, it is necessary to amplify it. This is achieved by tuned

amplifier. So tuned amplifier can be defined as “The amplifiers which amplify a narrow band

of frequencies signal are called tuned amplifiers”. Such amplifiers are widely used in radio

and TV circuits where radio frequency signals are to be handle. So we need to employs a

tuned circuit in a tuned amplifier (as shown in Figure 3.26). The tuned circuit is capable of

selecting a particular or relatively narrow band of frequencies with the phenomenon called

resonance. The centre of the frequency band is the resonant frequency of the tuned circuit.

L C

So before the discussion of tuned amplifiers let us discuss tuned (resonant) circuits and

their analysis in more detail.

Tuned (Resonant) Circuits There are two types of tuned (resonant) circuits :

(i) Series tuned circuits

(ii) Parallel tuned circuits

Both types of circuits consists of resistance, an inductance L and capacitance C with two

elements connected in parallel or in series to form parallel tuned circuits and series tuned

circuits respectively.

Analysis of series tuned circuits

Consider a series RLC circuit shown in Figure 3.27.

R L C

+ – + – + –

VR VL VC

+

VS

–

ZS = R + j (XL – XC) = R + j

FG L–

1 IJ

H C K

VS

I=

ZS

The circuit is said to be resonance if the current is in phase with applied voltage of if X L =

XC (for series). The frequency at which the resonance occurs is called the resonant fre-

quency.

At the resonance xL = XC i.e.,

1

L=

C

At resonant frequency, the voltage across capacitance and inductance are equal in magni-

tude, but they are 180° out of phase with each other. They cancel each other, and so the zero

voltage appears across the LC combination.

If we solve the above equation, we get

XL = X C

1

L=

C

1

or 2 f rL =

2 fr C

1

fr2 = 2

4 LC

1

fr =

2 LC

In RLC series circuit, the resonance effect can be obtained by varing the frequency and

kept L and C constant.

Resonance curves : The resonance curve shows the variation of impedance and current

with frequency in Figure 3.28.

Z impedance

Current

fr

impedance is minimum. The maximum current flows through the circuit. At the zero

frequency, the capacitor acts as an open circuit and block current. The complete sources

voltage appears across the capacitor. If we start to increase the frequency, the X C decreases

and XL increases, causing total reactance (XC – XL) to decreases. Due to decrease in

impedance the current increases, VR also increases, and both VC and VL increases.

If the frequency reaches its resonant frequency value fr, the impedance is equal to R, hence

the current reaches its maximum value, and VR is at its maximum value.

If the frequency is increased above resonance, X L increases continuously and XC decreases

continuously. It causes the total reactance XL – XC to increases. As a result there is increase

impedance and a decrease in current if the current decreases, V R decreases and VC and VL

also decreases. As the frequency becomes very high, the current reaches to zero, both V R and

VC also reaches zero, VL approaches VS.

The bandwidth of the system is defined as the range of frequencies for which the current

or output voltage is equal to 70.7% of its value at resonant frequency.

·707

f1 fr f2 f

Band width

Figure 3.29 Bandwidth of Tunned Series Circuit.

As Figure shows a typical tuned (resonant) circuit. The circuit current is equal to or

F V I between frequency f

greater than 70.7% of maximum current I r

H R K 1 to f2.

connected in series with a capacitor of 2530.3 pF. Calculate (a) resonant frequency (fr). (b)

Voltage across resistance (VR), inductor (VL) and capacitor (VC) at resonance. (c) Q factor.

Assume the impressed voltage to be 0.182 volts.

Sol. Given L = 10 H, 10 10–6 H

R = 18.2

C = 2530.3 pF = 2530.3 10–12

(a) Resonant frequency for the series circuit is given by

1 1

fr = = = 1 MHz.

2 LC 2 10 10 6

2530 10 12

V 0.182

Ir = = = 0.01 Ampare.

R 18.2

VR = Ir R = 0.01 18.2 = 0.182 V

VL = I r X L = I r 2 f r L

= 0.01 2 106 10 10–6

= 0.6283 V

1

V C = Ir X C = I r .

2 fr C

0.01

= 6 2 = 60.283 V

2 10 2530.3 10

XL 2 10 6 10 10 6

Q-factor Q = = = 3.45. (Approx).

R 18.2

The quality factor (Q) and its effect on band width (B.W)

The quality factor, Q is the ratio of the reactive power in the inductor or capacitor to the

true power in the resistance (series) with a inductor or capacitor.

Maximum energy stored

Qfactor = 2

Energy dissipated per cycle

L 1

Q= = (for series circuits)

R CR

fr

The relation between band width and Q factor is given as Q =

BW

Hence, higher the value of Q, the smaller is the B.W.

Parallel tuned circuit

In a parallel resonance or tuned circuit consist of an inductor (coil) and capacitor are

connected in parallel across an ac source as shown in Figure 3.30. The parallel resonant

circuit is generally known as tank circuit. Because the circuit stores energy in the magnetic

field of the coil and in the electric field of the capacitor.

C

RL IL

The circuit is said to be resonant condition, if the susceptance part of admittance is zero.

The total admittance (Y) of circuits is given :

1 1

Y=

RL j XL j XC

Simplified form of above equation is

Y=

RL jXL j R

= 2 L 2 +j

1 LM XL OP

R 2L X 2L XC RL XL XC N R 2L X 2L Q

The susceptance part is zero to satisfy the condition of resonance :

1 X

= 2 L 2

XC RL XL

L

C=

R 2L 2 2

L

From the above equation,

L

R 2L 2

L2 =

C

2 2 L

L = R 2L

C

2 1 R 2L

=

LC L2

1 R 2L

=

LC L2

The resonant frequency for the tank circuit is

1 1 R 2L

fr =

2 LC L2

R2

Usually, the resistance of inductor is very small so we can neglect the value , we get

L2

1

Resonant fr = .

2 LC

Resonance Curve : The impedance of a parallel tuned (resonant) circuit is maximum of fr

and decreases at lower and higher frequencies as shown in figure 3.31.

X L = XC

L X L > XC

Zr = XL < XC

RC

fr f

Sharpness of resonance

The resonance curve, of a resonant circuit, is required to be a sharp as possible in order to

provide a high selectivity. The sharp resonance curve means that the impedance falls off

rapidly as the frequency is varied above and below the resonant circuit frequency. Math-

ematically, the sharpness of a resonance curve is defined as the ratio of the bandwidth of the

circuit to its resonant frequency i.e., sharpness of resonance.

Band width BW f2 f1 1

Sharpness = =

Resonant frequency fO fO QO

where QO is called the quality factor or simply Q-factor of the circuit at resonance.

Mathematically,

XL . L 2 fO . L

QO = = O

R R R

where L = Value of circuit inductance

R = Value of circuit resistance or coil resistance.

Small R

Medium R

Large R

Impedance

Frequency

Figure 3.32 Effect of coil resistance (R) on the sharpness of resonant curves.

Thus, we conclude that a higher value of quality factor provides a higher frequency

selectivity, but a smaller bandwidth, whereas a lower value of quality factor provides a poor

selectivity but a larger bandwidth.

Example 7. A tank circuit (parallel) has an inductor of 15 H and capacitor of 1000

pF and the resistance of inductor is 50 . Calculate (a) Resonant frequency ; (b) Imped-

ance at resonance;

(c) Q-factor and (d) Band width (BW).

Sol. Given : L = 15 H = 15 10–6 H

R = 50

C = 1000 pF = 10 10–12 F

1 1

(a) fr =

2 LC 2 5 10 6

1000 1012

= 1299.5 kHz

L 15 10 – 6

(b) Zr = = = 300

CR 1000 10 12 50

2 fr L 2 1299.5 10 3 15 10 6

(c) Q= =

R 50

= 2.452.

fr 1299.5 10 3

(d) BW = = = 519 kHz. Ans.

Q 2.5

Single Tuned Voltage Amplifier

Figure 3.33 shows the circuit of single tuned voltage amplifier using BJT for low fre-

quency applications. For microwave range we should go for FET or vacuum tubes like

pentodes etc. Figure 3.33 (a) is called capacitively coupled tuned amplifier because the

output is taken through a coupling capacitor CC. Similarly, the circuit shown in Figure

3.33(b) is called inductively coupled tuned amplifier because the output is taken across an

inductor.

+ VCC + VCC

R1 C L

R1 C VO

CB CB

CC

VS R2 VO R2

VS

RE CE RE CE

Figure 3.33 Single tuned voltage amplifier.

Both these circuits consist of transistor amplifier and tuned circuit is load. The values of

capacitance (C) and inductance (L) of the tuned circuit are selected in such a way that the

resonant frequency of the circuit is equal to the frequency to be selected and amplified.

The resistors R1, R2 and RE are called biasing resistors. They provide necessary biasing

voltage from VCC to the transistor. The resonant frequency of the circuit of the amplifier is

made equal to the frequency of the input signal to be amplified.

BW

A B

Voltage

gain

(Av)

f1 f0 f2

Frequency (Hz)

Figure 3.34 Bw Curve for Single Tuned Voltage Amp.

rL

The voltage gain AV =

Ri

L

rL = ZP =

CR

L

AV = CR

Ri

fO

and bandwidth, BW = f = f2 – f1 =

QO

Double Tuned Voltage Amplifier

Figure 3.35 shows the circuit of a double tuned voltage amplifier. It consists of a

transistor amplifier with two tuned circuits.

+ VCC

+

C1 L1 L2 C2 VO

R1

–

CC

VS R2

RE CE

One of the tuned circuits (L1, C1) is shown as the collector load and other (L2, C2) as the

output. The resistors R1, R2 and RE are used to set-up Q-point for the transistor operation.

The signal to be amplified is applied at the input terminal through the coupling capacitor

CC. The resonant frequency of the L1 C1 is made equal to that of the signal by adjusting L1

or C1. Under these conditions, the tuned circuit offers a very high impedance to the input

signal. As a result of this, large output appears across the tuned circuit L 1 C1. The output

from this tuned circuit is inductively coupled to the L2 C2 tuned circuit.

The frequency response of double tuned circuit depends upon its degree of coupling. The

degree of coupling gives an idea of the amount of energy transferred between two tuned

circuits.

Av Av Av

fo fo f o fo fo

(a) Tight coupling (b) Critical coupling (c) Loose coupling

Figure 3.36 Frequency response of double tuned circuit with different degrees of coupling.

It has been observed that if two or more tuned circuits, which are synchronously tuned are

cascaded, the overall bandwidth decreases. However, if the different tuned circuits, which

are cascaded, are tuned to slightly different frequencies, it is possible to obtain an increased

bandwidth with a flat passband with steep sides. This technique is used in stagger-tuning.

+ VCC + VCC

C1 L1 C1 L2

R1 R1

CC CC

CC VO

VS R2 R2

RE RE CE

At very low frequencies, XC become very small and XL is very large so total impedance is

inductive in nature. As frequency (f) increases impedance (z) also increases. After that X L =

XC, the impedance is max at this point. So current is very less at this point which satisfying

the resonance. As the frequency further increases the capacitive reactance dominate and

impedance starts decreasing.

1. There are different types of coupling namely Resistance Capacitor Coupling, impedance cou-

pling, transformer coupling and direct coupling.

2. Cascaded arrangement is one in which output of one stage is coupled with the input of the next

stage.

3. A transistor in which a number of amplifier stages are in succession is called a multistage

amplifier.

4. R-C coupled amplifier has a wide range of frequency response.

5. R-C coupled amplifier provides less frequency distortion.

6. Transformer coupling is the best coupling because there is no power is lost in the collector base

resistors, because of the low winding resistance of the transformer.

7. The main functions of a coupling device is to transfer only ac output of one stage to the input of

the next stage and to block dc components and isolate the dc conditions of one stage from the

other stage.

8. Direct coupled amplifier usually used to amplify very low frequency signal.

9. Transfer coupled amplifier usually used to amplify very high frequency signal.

10. Overall gain of a multistage amplifier is equal to the product of gains of individual stages.

i.e., A = A1 A 2 A 3 An.

11. Decibel is the common logarithm (log to the base 10) of power gain is known as bel power gain i.e.,

Pout

A = log10 bel.

Pin

Pout

12. Number of bels = log10

Pin

Pout

13. In dB, power gain = 10 log10 dB

Pin

Vout

voltage gain = 20 log10 dB

Vin

I out

current gain = 20 log10 dB.

I in

14. Gain of multistage amplifier in dB is equal to the sum of decibel gains of the individual stages.

A (dB) = A1 dB + A2 dB + A3 dB + ... An dB.

15. Frequency response, the curve drawn between voltage gain and signal frequency of an amplifier

is known as its frequency response.

16. Bandwidth may be defined as the range of frequency over which the gain of an amplifier is equal

or greater than 70.7% of its maximum gain is known as band width.

17. Higher or upper - 3dB frequency of n-stage amplifier is given as

fH* = fH 21/n 1

where fH = initial frequency

fH* = frequency after n-stages

n = number of stages

18. Lower - 3dB frequency of n-stage amplifier is given as

fL

fL* =

1/ n

2 1

where fL = lower initial frequency

fL* = lower initial frequency after n-stages

n = number of stages.

19. There is a shrinkage (decrease) of a bandwidth by using a cascaded amplifier.

20. A common collector configuration is also called emitter follower because its voltage gain is

close to unity. In other words we can say that emitter follows the input signal.

21. Common drain amplifier is called source follower.

22. Emitter follower (C-C configuration) has very high input resistance and low output resistance.

23. Darlington pair is nothing but a cascade connections of two common collector transistor, which

passes very high input impedance and very high current gain.

24. The major disadvantage of darlington transistor pair is that the leakage of current of first

transistor is amplified by the second. Hence, the overall leakage current may be high a

Darlington connection of three or more transistor is usually impractical.

25. The final stage of an audio or multi-stage amplifier is power amplifier.

26. The range of audio frequency is lies between 20 Hz to 20 kHz.

27. Small signal transistor tured amplifiers amplify small signals at radio frequencies. Power involved

is small. They are operated under class-A condition so that distortion is negligibly small.

28. Large signal transistor tuned amplifiers are meant for amplifying large signals at radio frequen-

cies. Power involved is large. Hence, they are operated under class AB, B or C conditions

providing large collector circuit efficiency.

29. Staggered tuned amplifier uses a number of single tuned stages in cascade. The successive tuned

circuits are tuned to slightly different frequencies.

30. An LC circuit is called a tuned circuit.

31. At resonant frequency, inductive reactance and capacitive reactance become equal.

32. For series resonance ;

1

fr =

2 LC

circuit impedance

Zr = R

V

circuit current I=

R

33. Quality factor

XL

Q=

R

fr

34. BW =

Q

35. For parallel resonance circuit,

1 1 R2 1 1

fr =

2 LC L2 2 LC

L

Zr =

CR

V

I= .

Zr

36. High selectivity of the tuned amplifiers depend on the sharpness of the frequency response curve.

37. For cascaded stages :

1

fH* = fH . 2n 1

fL

fL* = 1

.

2n 1

Problem 1. A multistage amplifier consists of three stages. The voltage gains of the stages

are 30, 60 and 90. Calculate the overall voltage gain in dB.

Sol. We know that overall voltage gain in dB of the three-stage amplifier is given as

AdB = A d B1 A d B2 A d B3

But, we are given the voltage gains of the individual stages as ratios, so, we should first

find the gains of the individual stages in decibels. Thus,

A d B1 = 20 log10 30 = 29.54 dB

A d B2 = 20 log10 60 = 35.56 dB

A d B3 = 20 log10 90 = 39.08 dB

AdB = 29.54 + 35.56 + 39.8 = 103.16 dB. Ans.

Alternatively, the overall voltage gain is

A = A1 A2 A3

= 30 60 90

= 162000

Therefore, the overall voltage gain in dB will be,

AdB = 20 log10 162000

or AdB = 104.19 dB. Ans.

Problem 2. An RC-coupled amplifier has a voltage gain of 100 in the frequency range of

40 Hz to 25 kHz. On either side of these frequencies, the gain fall so that it is reduced by

3dB at 80 Hz. Calculate gain in dB at cut-off frequencies and also construct a plot of

frequency response curve.

Sol. The gain in dB is :

40

37

AdB

80 400 3

25 10 40 10

Frequency (Hz)

Figure N(3.1)

This is midband gain the gain at cut-off frequencies is 3 dB less than the midband gain

i.e., (AdB) at cut-off frequencies = 40 – 3 = 37 dB

The plot of frequency response curve is given in Figure N(3.1)

Problem 3. The parameters of the transistor in the circuit shown are : hfe = 50 ; hie

= 1.1 k , hoe = hre = 0. Calculate

(a) Midband gain ;

(b) The value of CB necessary to give a lower 3 dB frequency of 20 Hz.

(c) The value of CB necessary to ensure less than 10% tilt for 1 kHz square wave input signal.

50K

50K 2K CB 2K

Vin 50K

50K 2K C1 2K C2

Figure N(3.2)

h fe R C

Avm =

hie RC

50 2

= = 32.26

11

. 2

(b) Low cut-off frequency

1

f1 =

2 C B hic b RC g

1

20 =

2 CB d. 10 3

11 2 10 3 i

1

CB = = 2.57 F Ans.

2 20 . 10 3

31

(c) Percentage tilt

f1

P= 100

f

pF 1000 10 100

f1 = = Hz

100 100

1 1

CB = =

2 f1 hie b RC g 2

100

. 10 3

31

= 1.613 F. Ans.

Problem 4. It is desired to build an audio-amplifier with a passband of 20 Hz to 20 kHz

and a midband gain of 64000. Since one stage can not give the required gain, 3 stages are

used in cascade. What should be the midband gain and bandwidth of each stage ?

Sol. Band width reduction factor

= (21/n – 1)1/2

Where n is the number of stages in cascade.

For a three stage amplifier, n = 3

Band width reduction factor = (21/3 – 1)1/2 = 0.5098

The overall band width fH* is given as 20 kHz. So individual bandwidth fH can be

calculated as follows :

fH* 20

fH = = 39.23 kHz

0.5098 0.5098

Similarly fL = fL* 0.5098

= 20 0.5098

= 10.196 Hz

Midband gain = 640001/3 = 40. Ans.

Problem 5. A parallel resonant circuit has an inductance of 150 H and a capacitance of

100 pF. Find the value of resonant frequency.

Sol. Given,

L = 150 H = 150 10–6 H

C = 100 pF = 100 10–12 F

We know that the resonant frequency

1

fo =

2 LC

0.159

=

L .C

0.159

=

d150 10 6

i . d100 10 12

i

6

= 1.3 10 Hz.

= 1.3 MHz. Ans.

Problem 6. A parallel resonant circuit consists of a capacitor of 100 pF and an inductor

of 100 H. The inductor has a resistance of 5 . Find the value of frequency at which the

circuit will resonate and the circuit impedance at resonance.

Sol. Given,

C = 100 pF = 100 10–12 F

L = 100 H = 100 10–6 H

R=5

We know that the resonant frequency

1 0.519

fo = =

2 LC d100 10 6

i d100 10 12

i

= 1.59 MHz.

Circuit impedance at resonance

We also know that the circuit impedance at resonance,

L

ZP =

CR

6

100 10

=

d100 10 12

i 5

5

= 2 10

= 200 k .

Problem 7. A tuned circuit has resonant frequency of 1600 kHz and a band width of

10 kHz. What is the value of its Q-factor ?

Sol. Given,

fo = 1600 kHz

Let Qo be the quality factor

We know that the band width (BW),

fo

B=

Qo

1600

10 =

Qo

Qo = 160.

Problem 8. A tuned amplifier has its maximum gain at a frequency of 2 MHz and has a

band width of 50 kHz. Calculate the Q-factor.

Sol. fo = 2 MHz = 2 106 Hz

BW = 50 kHz = 50 103 Hz

Let Qo be the quality factor.

We know that the band width (BWo)

fo 2 10 6

50 103 =

Qo Qo

Qo = 40.

2. State the various method of cascading transitor amplifier.

3. With the help of a suitable circuit diagram, explain the working of a RC coupled amplifier.

Derive the expression for voltage gain of the amplifier.

4. Draw the circuits diagram of a RC coupled amplifier using PNP transistor.

5. Explain with suitable circuit diagram, the operation of transformer coupled transistorized

amplifier.

6. Explain the essential difference between the RC coupled and direct coupled amplifier.

7. Draw the circuit diagram of a darlington emitter follower and derive the expressions for its

voltage gain and input resistance.

8. Draw the circuit diagram of a direct coupled amplifier. Explain its working. Discuss its applica-

tions ?

9. What is the necessity of impedance matching in amplifier ?

10. Draw a circuit diagram for a transformer coupled amplifier and explain its working.

11. How will you obtain impedance matching with transformer coupling ?

12. In a multi-stage amplifier, the input impedance of a amplifier stage should be very high and

output impedance must be very low. Justify this statement ?

13. Explain why 3-dB frequencies for current gain is not the same as for voltage gain.

14. Define bandwidth, selectivity and quality factor.

15. What are wide band amplifiers ? Why they are preferred over general audio amplifier ?

16. What is a tuned circuit ? What is its function with reference to a tuned amplifier ?

17. What are various tunning circuits ?

18. Explain how a large gain can be achieved by simply increasing the number of transistors in the

distributed amplifier.

19. What is the advantage of stagger tunning ?

20. What is a tank circuit ?

21. Differentiate between single tuned and double tuned amplifiers.

22. What are the advantages of double tuned over single tuned amplifiers ?

1. A transistor multistage amplifier contains two stages. The voltage gain of the first stage is 50-

dB and that of the second stage is 100. Calculate the overall gain of the multistage amplifier in

dB. [Ans. 90 dB]

2. The overall voltage gain of a two stage RC coupled amplifier is 80 dB. If the voltage gain of the

second stage is 150, calculate the voltage gain of the first stage in dB. [Ans. 36.47 dB]

3. The voltage gain of a multistage amplifier is 65-dB. If the input voltage to the first stage is 5

mV. Calculate the output voltage of the multi-stage amplifier. [Ans. 8.89 v]

4. An amplifier has an input signal is 20 V peak to peak and an input impedance of 400 K. It

gives an output of 10 V peak to peak across a load resistance of 5 . Calculate the power gain

in dB. [Ans. 43 dB]

5. The output power of an amplifier is 100 mV. When the signal frequency is 5 kHz. When the

frequency is increased to 25 kHz the output falls to 50 mV. Calculate the dB change in power.

6. A single stage CE amplifier is measured to have a voltage gain band width f2 of 5 MHz with RL =

500 . Assume hfe = 100, gm = 100 mA/V, rbb = 100 , CC = 1 pF and fT = 40 MHz.

(a) Find the value of the source resistance that will give the required bandwidth.

(b) With the value of RS found in part (a) find the midband voltage gain.

7. A parallel RLC circuit is resonant at 2.7 kHz. The circuit has L = 0.15 H, C = 0.232 F and a

parallel resistance of 30,000 ohms.

(a) What is the circuit impedance at resonance ?

(b) What is the value of the circuit Q ?

(c) What is the bandwidth ?

(d) What is the circuit impedance at f2, the upper band limit ?

8. A circuit is resonant at 455 kHz and has a 12 kHz bandwidth. The inductive reactance is 1255

ohms. What is the parallel impedance of the circuit at resonance ?

9. A CE amplifier with gm = 5000 mhos Cd = 50 PF is to be shunt compensated. The value of

AVm is to be 18. Find the values of R and L needed to shunt-compensate the circuit to as high a

frequency as possible what is that frequency ?

At the end of unit we will able to learn about the

Introduction to feedback

Basic concept behind feedback

Types of feedback

Classification of negative feedback

Effects of the feedback circuits

Analysis of different feedback circuits

The important characteristics of an amplifier are its voltage gain, bandwidth, input and

output impedances. The parameters are more or less constant for an amplifier. The value of

these parameters are required to change. The designer’s does not control the value of these

parameters. This problem can be solved with number of ways. For example, if the gain could

be reduced by voltage divider circuit in the input or in the ouptut circuit of an amplifier, the

input impedance of an amplifier could be increased if required by connecting a series

resistance in the circuit. But these methods results in the loss of useful signals. A new

technique is introduced called as feedback in the amplifiers.

The feedback is a process of injecting some energy (i.e., the form of voltage or current)

from the output and then return it back to the input when the fraction or a part of output is

feedback to the input, the process is known as Feedback. When amplifier circuit uses the

feedback, then it is called feedback amplifier.

As Figure 4.1 (a) shows a block diagram of a basis amplifier. Here, Vi is the input signal and

Vo is the output signal. If A is the voltage gain of the amplifier, the output Vo is related to the

input Vi by,

Vo

A=

Vi

In this amplifier, the input does not know what is happening at the output. If due to some

reason, the output changes the net input remains unaffected. Such a system is called open-loop

or non-feedback system.

However, Figure 4.1 (b) shows a block diagram of feedback amplifier network. This

feedback network is called a network or a feedback network. A fraction Vo of output

voltage is going back to the input. This changes the net input voltage to the amplifier. The

input knows at every instant what the output is. Such a system is called a closed-loop or

feedback system.

+ +

+

Vs Vi A V0

–

+ + – –

Vin Amplifier Vo – V +

(A) f + Feedback

– – network

Vo

( )

–

(a) Block diagram of basic amplifier. (b) Feedback introduced in the amplifier.

Figure 4.1

Vo

Af = ...(4.1)

Vs

The more general structure of the feedback amplifier is given below in Figure 4.1 (c).

Here this is a signal flow diagram, and the quantities x represent either voltage or currency

signal.

xs xi xo

Source Load

A

–

xf

x0 = Axi (i)

These are general equation of a feedback amplifier

xf = x o (ii)

xi = xs – xf (iii)

xo A

Af = = (iv)

xs 1 +A

But from Figure 4.1 (b) (i.e., on applying KVL), we get

V s = Vi + V f ...(4.2)

where Vf = feedback voltage. The output voltage (Vo) and feedback voltage (Vf) are related

with feedback network ( ) as

Vf

=

Vo

or Vf = V o ...(4.2(a))

For the basic amplifier, the input is Vi and the output Vo. Hence its voltage gain A (called

internal gain) is given as

Vo

A= ...(4.3)

Vi

We shall now derive the expression of the gain A i in term of A (internal gain) and

(feedback network)

Vo

Now, Af =

Vs

Vo

or Af = ...(4.4)

Vi Vf

Vo

or Af = (from equations (4.3) and (4.4))

Vo

Vo

A

A

Af = ...(4.5)

1 +A

Thus, it is clear from the equation (4.5) that the gain of amplifier decreases when we

apply negative feedback. However, gain of an amplifier when we apply positive feedback is

given by the relation.

A

Af = ...(4.6)

1– A

Thus, positive feedback increases the gain.

A

Thus, finally Af = – for Negative feedback

1 +A

A

and Af = – for Positive feedback

1– A

The term ‘ ’ is called ‘feedback factor’. Whereas is known as feedback ratio. The

expression (1 ± A ) is called loop gain).

Amplifiers are not the only things where the feedback is used. We use the idea of feedback in

our daily life too. You may not have realised it, but even we use feedback in the process of

learning. When a child is asked to write a letter A, he will probably write it as shown in

Figure 4.2 (a). When he finds that the stroke is not going in the correct direction, the

information goes to his brain through the eyes. The brain immediately orders the hand to

correct the direction of the stroke. With much effort and with constant feedback, the child

writes the letter ‘A’ as shown in Figure 4.2 (b).

From the equations (4.5) and (4.6), we have the following three cases :

(i) Af > A ; for positive feedback.

(ii) Af < A ; for negative feedback.

(iii) In the case of positive feedback, if A = 1 and Af = . It is possible only in the case :

when input is zero. But the amplifier is capable of producing output at input zero. This

stage of an amplifier works as an oscillator (Discuss later in chapter 5 in detail).

Example 1. Calculate the gain of a negative feedback amplifier with gain A = 200 and

1

the feedback factor = .

10

Sol. Given gain, A = 200

1

Feedback factor, =

10

A 200

From equation (4.5), Af = =

1 +A F 1I

1 200

H 10 K

200 200

= = = 9.52

1 20 21

Gain of the amplifier with feedback is 9.52.

Conclusion :

(i) With the negative feedback, the gain of the amplifier decreases.

(ii) The value of the feedback factor ( ) of the circuit lies between 0 to 1.

Example 2. An amplifier with negative feedback has a voltage gain of 1000. It is found

that without feedback, an input signal of 50 mV is required to produce a given output

whereas, with feedback the input signal must be 0.5 V for the same output. Calculate the

value of A and .

Sol. Given :

Af = 1000

Vi = 50 mV = 0.05 V

Vs = 0.5 V

Vo

Af =

Vs

Vo= Vs Af = 0.5 V 1000 = 500 V

Gain without feedback,

Vo 500 V

A= = = 10000

Vi 0.05 V

Gain with feedback,

A 10000

Af = =

1 +A 1 10000

10000

1000 =

1 10000

1000 + 107 = 10000

10000 1000

= = 0.0009

10 7

= 0.09%.

As we have discussed a feedback amplifier is consist of two parts namely amplifier circuits

and feedback circuit. Depending upon whether the feedback signal increase or decreases the

input signal there are two types of feedback in amplifier.

(a) Positive Feedback. If the feedback signal (voltage or current) is applied in such a way

that it is in phase with the input signal and thus increases it. Then it is called positive

feedback. It is also known as regenerative feedback or direct feedback.

Advantages :

(i) It increases the gain of the amplifier

(ii) If positive feedback is sufficiently large it leads to oscillations. So it used in oscillators.

Disadvantages :

It increases the distortion and instability.

(b) Negative feedback. If the feedback signal (i.e., voltages or current) is applied in such a

way that it is out of phase with the input signal and thus decrease it. Then it is called

negative feedback. It is also known as degenerative feedback.

Advantages :

(i) It stabilize the gain of the amplifier.

(ii) It reduces the distortion and noise.

(iii) It reduces the output impedance.

(iv) It increase the input impedance.

(v) It increase the range of uniform amplification or bandwidth.

Disadvantages :

It reduces the gain of amplifier. But due to the large number of advantages of negative

feedback is frequently employed in the amplifiers. So lets discuss the negative feedback in

more detail.

Negative feedback

Figure 4.2 Classification of –ve feedback

(i) Negative voltage feedback. The voltage is fedback to the input of amplifier is propor-

tional to the output voltage irrespective to the load. It is further classified into two

categories i.e.,

(a) Voltage series feedback

(b) Voltage shunt feedback

(ii) Negative current feedback. The voltage is fedback to the input of the amplifier is

proportional to the output current, irrespective to the load. It is further classified into

two catagories :

(a) Current-series feedback

(b) Current-shunt feedback

Let us discuss and analyze the effect of these four types of Negative feedback on the input

and output impedance.

+ R2

VO R1 VO

R1

Vo = . Vo (By applying potential divider rule)

R1 R2

R1

or =

R1 R2

(a) Voltage series feedback : In the voltage series feedback circuit there is amplification of

amplified

voltage into a voltage (i.e., voltage voltage) and a fraction of output voltage is

fedback in series with the input voltage through the feedback network. The Basic circuit or a

block diagram representation of voltage series feedback is shown in Figure 4.5.

+ +

Basic +

VS Vi amplifier VO

(AV) –

– –

– +

Vf

+ +

Feedback

Vo network Vo

–

Figure 4.5 Voltage series feedback circuit.

From the circuit shown input impedance with feedback is given as :

Vs

Zif =

Vi

Vf Vi

Zif = ( V s = V i + V f)

Ii

Vo Vi

Zif =

Ii

Basic amplifier

+

+

+ +

VS Vi A v Vi RLVO

– –

–

– – +

Vf

– Vo

Figure 4.6

Note: During the calculation of input impedance for any circuit output is open circuited

. A . Vi Vi

or Zif = { Vo = Av Vi then output is open}.

Zi

or Zif = A a 1f VI RS

i Vi

Zi , input impedance of the amplifier

UV

iT I1 W

Zif = Zi (1 + A )

Thus, the impedance increases in voltage series feedback.

Derivation of output impedance with feedback

Note: To calculate the output impedance for any circuit all the independent sources are replaced by

the internal resistance (i.e., voltage source will be treated as short circuited and current source as

open circuited). Take imaginary voltage source (V) at the output of the terminal and also assume

that current (I) is flowing through this source then output impedance with feedback will be equal to

the ratio of imaginary voltage source (V) to the current (I)

V

i.e., Zof =

I

This procedure will apply in all the feedback circuits. The circuit diagram of voltage

series configuration for calculating the output impedance is shown here. Source voltage V s is

the independent source replaced by short-circuit (S.C.)

Basic amplifier

circuit

Zo

+

AvVi

VS = 0 S.C. Vi RL ± V

– O

–+

V1

+

Vo = V Vo

–

Figure 4.7

Now,

Applying KVL at the output

V = I Zo + A v V i ( Vs = Vi + Vf

V = I Zo + Av (– Vf) 0 = Vi + Vf

V = I Zo – A v . V o or Vi = – Vf)

V = I Zo – A v .V ( Vo = V here)

V + V Av = IZo

V Zo

or =

I 1 Av

Zo

or Zof =

1 Av

Thus, we see that in voltage series feedback output impedance decreases.

(b) Voltage shunt feedback : In the voltage shunt feedback there is amplification of current

into a voltage (i.e., current amplified voltage) and a fraction of output voltage is fedback in shunt

with the input current through a fedback network. Basic circuit for voltage shunt feedback is

shown in Figure 4.8.

+

Basic

IS If amplifier Vo

Rm

–

Feedback

= If / Vo network

From Figure 4.9,

Basic amplifier circuit

Ii Zo

+

IS Vi RL ± Rmli R L Vo

–

If

If = Vo

Figure 4.9

Vi

Zif =

Is

Vi

or Zif = ( I s = I i + I f)

If Ii

Vi

or Zif = ( If = V o)

Vo I i

Vi

or Zif = ( V o = R m Ii)

. R m Ii Ii

Vi

or Zif =

b

Ii R m 1g

Zi

or Zif =

1 Rm

Thus, input impedance in the case of voltage shunt feedback is decreases.

Derivation for output impedance

According to the procedure for calculating output impedance the circuit diagram shown as in

Figure 4.10.

Basic amplifier circuit

Ii Zo

If l

O.S. Ri ± RMIi V Vo

+

Feedback

network Vo = V

( )

–

Figure 4.10

V

Zof =

I

Now, V = I Zo + R m Ii

or V = I Zo + Rm (– If) I s = I i + I f)

or V = I Zo – R m . V o = Ii + If

Ii = – I f

or V (1 + Rm ) = I Zo {If = V o} V = V o

V Zo

or =

I 1 Rm

Zo

or Zof =

1 Rm

Thus we see that in voltage shunt feedback output impedance decreases with feedback.

(a) Current series feedback : In the current series feedback circuit there is amplification

Vo

of voltage into current (voltage current) and a fraction of output current is fedback

Vi Vf

in series with the voltage through a feedback network. Basic circuit for current series

feedback is as shown in Figure 4.11).

+ + Basic +

VS Vi amplifier RL VO

– – + – Gm –

Vf

Feedback

= Vf/Io network

It is an exercise for students. In this circuit both input and output impedance after

feedback are :

Zif = (1 + Gm ) Zi

and Zof = (1 + Gm ) Zo

(b) Current shunt feedback : In the current shunt feedback circuit there is amplification

amplified

of current into a current (i.e., current current) and a fraction of output current

is fedback in shunt with the input current, through a feedback network. Basic circuit for

current shunt feedback is shown in Figure 4.12.

Ii

Basic +

Is If amplifier RL VO

AI –

Feedback

= If/Io network Io

Derivation for input impedance

I s = I + If = I i + I o

= Io (1 + A)

VI Vi

Zif = =

Is Ii 1 aA f

VI I i Zi

= =

1 A 1 A

So, the input impedance of amplifier by a factor (1 + A ).

Derivation for output impedance

To calculate the change in output impedance, the output resistance RL is disconnected and Vo

is set to zero. External voltage Vo is applied across the output terminals and output current is

measured.

Vo

Zif =

Io

Vo

(Io + AIo) =

Zo

Zo (1 + A) Io = Vo

Vo

Zif = = Zo (1 + A )

Io

Now, Table 4.1 shows the effects of feedback connection on input and output impedance

after feedback.

Table 4.1

Zi Zi

Zif Zi (1 + A ) Zi (1 + A )

1 A 1 A

increases increases decreases decreases

Zo Zo

Zof Zo (1 + A ) Zo (1 + A )

1 A 1 A

decreases increases decreases increases

Table 4.2 Shows some parameters and their relationship under different feedback circuits.

Table 4.2

Vo Vo Io Io

Gain without feedback (A) A= A= A= A=

Vi Ii Vi Ii

Vf If Vf If

Feedback ratio ( ) = = = =

Vo Vo Io Io

Vo Vo Io Io

Gain with feedback (Af) Af = Af = Af = Af =

Vs Is Vs Is

Before proceeding with the concept of feedback, it is very necessary to study the classifica-

tion of amplifiers. Generally amplifiers can be broadly classified in four categories, as given

below :

(i) Voltage amplifier

(ii) Current amplifier

(iii) Transconductance amplifier

(iv) Transresistance amplifier

This classification is based on the magnitudes of the input and output impedances of an

amplifier relative to source and load impedance respectively.

(i) Voltage amplifier : The general representation of voltage amplifier is shown in Figure

4.13(a). If the amplifier input resistance Ri is large compared with the source resistance Rs

then Vi = Vs. If the external load source resistance R L is large compared with the output

resistance Ro of the amplifier will provide a output voltage proportional to input voltage and

the proportionality factor is independent of the magnitudes of the source and load resistance.

Such a circuit is called a voltage amplifier.

Ri >> Rs Ro >> RL

Ro << RL Rs << Ri

Ii

Ro Io = iL

+ + +

+ +

Vs Vi R i AvVi RL Vo Ri AvVi Ro RL Vo

–

–

– – –

Figure 4.13(b). If the amplifier Ri is small compared with the source resistance Rs and output

resistance Ro is very large compared with the load resistance then IL = Ai Ii.

IL = A i I i.

This amplifier will provide a current proportional to the signal current and the proportional-

ity factor is independent of the magnitudes of the source and load resistance, such a circuit is

called current amplifier.

(iii) Transconductance amplifier : The general representation of transconductance am-

plifier is shown in Figure 4.14. The ideal transconductance amplifier supplies an output

current which is proportional to the signal voltage, independent of the magnitudes of source

resistance and load resistance. To achieve this source resistance should be small compared to

the input resistance and output resistance of amplifier should be large compared to the load

resistance.

Ri >> Rs Rs >> Ri

Ro << RL RL << Ro

Ii Io = iL Ii Io = iL

Rs

+ +

± Vs Vi Ri GmVi Ro RL Is Rs Ri RmVL Ro Vo

– –

shown in Figure 4.15. For a practical transresistance amplifier we must have Rs >> Ri and

RL >> Ro; when both input and output resistance of a amplifier are lower as compared to

source and load resistance respectively. Since if Ri << Rs, Ii Is and if RL >> Ro, Vo Rm

Ii Rm Is. This type of amplifier is called transresistance amplifier.

Now, Table 4.3 shows the ideal requirement of amplifier characteristics like input and

output resistance.

Table 4.3

Amplifier Type

Parameter Voltage Current Transconductance Transresistance

Ri 0 0

Ro 0 0

Transfer Vo = A v V s IL = Ai Is IL = Gm Vs Vo = Rm I s

characteristics

Now for better understanding we will draw a schematic representation of a single loop

feedback amplifier. The transfer gain A may be A v, Ai, Gm, Rm as the case may be.

IO = I L

Signal Comparator + V Basic Amplifier + Sampling

Source or Mixer – i Forward transfer –V network RL

gain (A)

Load

If Resistance

+

Feedback network

Vf

– Reverse transmission ( )

(a) Signal Source : This block is either a signal voltage V s in series with resistance (Rs) or

a current source (Is) in parallel with a resistance R s.

(b) Feedback Network : This block is usually a passive two part network which may

contain resistors, capacitors and inductors. Most often it is simply a resistive configura-

tion.

(c) Sampling Network : In the sampling network the output voltage is sampled by connect-

ing the feedback network in shunt across the output. Another feedback connection which

samples the output current where the feedback network is connected in series with the

output. This type of connection is referred to as current or loop sampling.

Voltage Current

amplifier amplifier

Ic

Basic + Basic

amplifier Vi amplifier RLVo

(A) – (A)

Feedback Feedback

network network

( ) ( )

Figure 4.17 Feedback connection of the output of basic amplifier, sampling the output.

(d) Comparator or mixer network : Two mixing blocks are very common, series (loop)

input and shunt (node) input connection respectively. A differential amplifier is often used as

a mixer. Such an amplifier has two inputs and gives an output proportional to the difference

between the signal at the two inputs.

Now, we will discuss the feedback connections at the input of a basic amplifier as shown

in Figure 4.18.

Series Shunt

Source mixer Source mixer

Rs +

Ii

Basic Is Basic

V1 amplifier Rs amplifier

+ A A

Vs –

–

Vf If

(a) (b)

Figure 4.18 Schematic diagram of feedback connections at the input of a basic

amplifier (a) series mixer (b) shunt mixing.

Transfer ratio or gain : Transfer ratio or gain of amplifier is the ratio of output signal to

Vo

the input signal. The transfer ratio is the voltage amplification or voltage gain. In the

Vi

I

same fashion on transfer ratio o represents current amplification or current gain. However,

Ii

Io

the transfer function represents the transconductance gm of amplifier and the transfer

Vi

V

ratio o represents transresistance RM. From the above discussions it is clear that the symbol

Ii

gm and RM does not represent an amplification in the usual sense. Nevertheless, it is conven-

ient to refer to each of the four quantities Av, Ai, gm and RM as a transfer gain of basic

amplifier without feedback and to use the symbol A to represent any one of these quantities.

The symbol Af is defined as the ratio of the output signal to the input signal of the amplifier

configuration and is called the transfer gain of the amplifier with feedback. Hence A f is used

Vo Io I V

to represent any one of the four ratios Avf, = Iif, o = gmf, and o = RMf

Is Is Vs Is

Figure 4.19 as shown below shows the schematic representation of a single loop feedback

amplifier.

Comparator or Output signal

mixer (xe) Xo = AXe

Input + Difference signal Basic

signal amplifier

(Xi) A

±

RL

Load

external

Feedback signal Feedback

network

Xf = Xo

Figure 4.19

As we have already seen that feedback circuits effects the many parameters of the amplifier.

These effects may be in positive or negative side for various parameters like Bandwidth,

gain, stability, distortion, frequency respnose etc.

Now, we are going to discuss the effects of negative feedback on these parameters one by one.

The gain of an amplifier may change due to change in power supply voltage or change in

parameter of active device. This adversely affects the performance of the amplifier.

The gain of amplifier with negative feedback is :

A

Af = (From equation 4.5)

1 +A

If we assume that A >> 1, then the above equation may be written as :

A 1

Af =

A

Thus, the gain Af of the feedback amplifier is made independent of the internal gain. It

depends only on , which in turn depends upon passive elements such as resistors, inductors

or capacitors.

Since the values of passive elements remain constant, and hence the gain is stabilized. The

only condition for the stabilization is that A >> 1.

However, if this condition is not fully met some improvement occurs in the stability of the

gain.

Suppose a certain change in the internal gain of the amplifier takes place. We can find the

corresponding percentage change in the overall gain of the feedback amplifier. This can be

done by differentiating equation (4.5) with respect to A.

dA f

=

a1 A f .1 A

dA a1 A f 2

dA f 1

=

dA a1 A f 2

or dAf =

dA RS A A UV

a1 +A f 2

T f

1 +A W

dA f d A a1 A f

= .

Af A a1 A f 2

dA f 1 dA

= . ...(4.7)

Af a

1 A f A

Thus, from equation (4.7) it is clear that as (1 + A ) > 1, the percentage change in Af is

seen to be much less than percentage change in A.

tion. A non-linear or harmonic distortion is usually introduced in the output of a large signal

amplifiers. However, when a negative feedback is used in such amplifier the distortion and

noise is reduced. To determine the amount of reduction in distortion caused by negative

feedback, refer the block diagram of the feedback amplifier as shown in Figure 4.20.

+ Df

Input Amplifier Output

signal A

–

Df Feedback

network

Figure 4.20

Consider the amplifier with gain A producing a distortion D without feedback. Whenever

feedback is applied then gain becomes Af and the distortion in the output becomes Df. Let us

see how the distortion in the output changes from D to Df. A part Df of distortion Df is

feedback to input. This gets amplifier A times by the basic amplifier and becomes D f. This

gets added up (in reverse polarity because of negative feedback) to the original distortion D

to make the net distortion Df,.

Thus, D f = D – A Df

D

or Df =

1 +A

Note that the distortion after feedback is reduced by a factor (1 + A ) times.

Noise (i.e., electrical noise) may appear due to many reasons, if a noise voltage appears

just at the input of the amplifier, it is amplified by the same amount as the signal voltage. If

negative feedback is applied the net noise in the output is reduced by (1 + A ) and the

performance of the amplifier is much improved.

For all the amplifiers the most basic requirement is the high input impedance. Then it will

not load the preceeding stage or the input voltage source. This type of characteristic can be

achieved with the help of negative voltage series feedback. To derive the input impedance of

a negative feedback, consider a voltage series feedback circuit as shown below in

Figure 4.21. Let Zif is the input impedance of the amplifier circuit after feedback.

Ii

+ +

+

Vs Vi A Vo

– – + – –

Vf = Vo

Vs

Now, Zif =

Ii

Vf Vi

or Zif = { Vs = Vi + Vf}

Ii

Vo Vi

or Zif =

Ii

or Zif =

. AVi Vi FG V f IJ

Ii HVo K

Vi

or Zif = ( A + 1)

Ii

FG V =Z

i

input impedance of the amplifier

IJ

HI i

i

K

or Zif = Zi (1 + A )

Thus, we see that the input impedance is increased by a factor of (1 + A )

Just as a high input impedance is advantegeous to an amplifier in the similar fashion a low

output impedance is also advantegeous. Because an amplifier having low output impedance is

capable of delivering power (voltage or current) to the load without much loss. Such a

desirable characteristic is achieved by employing negative voltage series feedback.

To derive the expression of output impedance of an amplifier after the feedback, first of all

we will draw the block diagram of voltage series amplifier as shown in Figure 4.22.

Note that the output impedance of any circuit is determined by deactivating all the

independent sources i.e., replaced by their internal resistance (i.e., voltage source as short

circuited and current source is open circuited). Since here V s (source voltage) is independent

source so replaced by the short circuit, we get

Vo

Zof =

Io

Zo

+ +

+ IL

Vs Vi +A V

– o Vo

– – RL

+

Vf

–

Figure 4.22

Vo + A V o = I o Z o

Vo (1 + A ) = Io Zo

Vo Zo

=

Io 1 A

Zo

or Zof = ...(4.8)

1 A

Thus, we see that output impedance is reduced by a factor (1 + A ).

We have seen that the overall gain of an amplifier decreases when a negative feedback is

applied.

A

i.e., Af = where A is the gain of basic amplifier

1 +A

We know that when negative feedback is employed, the lower cut of frequency decreases

by this factor (1 + A ) and the upper cut of frequency increases by the same factor (1 +

A ). Hence there is improvement in the bandwidth i.e., difference between the upper and

lower cut-off frequency increases (BW = Fu – Fl).

This is based upon the fact that for a given amplifier the product of gain and bandwidth

remains constant and known as gain bandwidth product (GBW)

i.e.,Gain Bandwidth before feedback = Gain Bandwidth after feedback.

A BW = Af . BWf

A

A BW = . BW f

1 +A

or BWf = (1 + A ). BW ...(4.9)

Thus, there is increase in bandwidth by factor (1 +A ).

Linear analysis of a transistor circuit. There are many transistor circuits which do not consist

of CE, CB or CC configuration as discussed earlier. Before applying feedback between

input and output, we must follow some steps as given below :

1. Draw the actual wiring diagram of the circuit neatly.

2. Mark the point B (base), C (collector) and E (Emitter) on the circuit diagram. Locate

these points during the starting of the equivalent circuit. Maintain the same relative

positions as in original circuit.

3. Replace each transistor by its h-parameters as discussed earlier.

4. Replace each independent dc source by its internal resistance (i.e., the ideal voltage

source is replaced by a short circuit, and the ideal current source by an open circuit).

5. Solve the resultant linear circuit for mesh or branch current and node voltages by

applying KVL and KCL.

Miller’s theorem is the best solution for the problem (or difficulty) discussed earlier.

When there is a voltage feedback we apply Miller’s theorem or in other words we can say that

generally Miller’s theorem is used to isolate the input and output, because feedback creates a

problem when we apply KVL and KCL.

According to the Miller’s theorem, if the feedback impedance (Zf) is connected between

input and output can be replaced by a circuit as shown Figure 4.23.

Zi

1 2

+ +

+ +

Vi Input V1 Network V2 Vo

– –

– –

1 2

Figure 4.23 shows the network with feedback. The effect of feedback on impedance (Z f) in

input side is as :

1 2

+ +

Vin Network Vo

– –

1 2

Zf Zf

1 – Av 1

1–

Av

Zf

Zin =

1 Av

V2

where Av = Voltage gain =

V1

However, the effect of feedback on impedance in the output side is as shown in Figure 4.24.

Zf

Zo =

1

1

Av

However, Dual Miller’s theorem is also applicable when there is a current feedback.

According to the Dual Miller’s theorem for the circuit as shown in Figure 4.25 and

Figure 4.26. The impedance Zf in input side as well as in output side is connected in series

given by the relation.

1 2

I1 I2

Z

1 2

Figure 4.25 General circuit with current feedback.

1

Z(1 – AI ) GH

Z 1–

AI JK

1 2

I1 I2

Z

1 2

Figure 4.26 Isolated circuit i.e., often applying Dual Miller’s theorem.

Zin = Z (1 – AI)

Zout = Z 1

FG 1 IJ

H AI K

Where AI is the current gain

FG AI

I2 IJ

H I1 K

Example of Miller and its dual theorem :

To understand the above theorem and its dual more clearly consider the transistor (CE)

configuration where there is a voltage feedback. To calculate the parameters like A v, Zi, Zo

etc., we should first apply the Miller’s theorem because there is a voltage series feedback.

Now we applying the Miller’s theorem the above circuit can be replaced as shown in

Figure 4.27.

VCC

RL

Rf

C +

Rs

+

B Vo

Vs E

–

–

VCC

RL

C

Rs I1

B Rf

E 1

Rf 1–

Vs ± Av

1 – Av

without feedback.

Now, the circuit shown in Figure 4.29 employs a current feedback. In this circuit we should

apply a dual Miller’s theorem.

VCC

RL

C

+

Rs

B

E Vo

Vs ±

RE

VCC

RL

1

RE 1 –

Ai

Rs RE (1 – Ai)

Vo

± Vs

–

Figure 4.30 Example of dual Miller’s theorem or circuit without feedback.

1. A feedback amplifier may be defined as the amplifier in which a fraction of output energy

voltage or current) is feedback to their input.

2. There are two types of feedback namely positive feedback and negative feedback.

3. When a feedback energy is in phase with the input signal and thus aids to it, it is known as

positive or regenerative or direct feedback.

4. When a feedback energy is not in phase with the input signal i.e., the input and output differ by

180° such type of feedback is known as negative, degenerative or reverse feedback.

5. On the basis of energy feedback there are two types of feedback circuit i.e., voltage feedback

and current feedback circuit.

6. Gain of amplifier without feedback.

Vo

A=

Vin

7. Gain of amplifier with feedback.

A

Af = Where is called feedback ratio or fraction.

1 +A

8. Negative feedback is more advantageous than disadvantage.

9. Negative voltage feedback decreases distortion and increases bandwidth therefore it is used in

public address system, transistor radio receivers etc.

10. Negative feedback provides perfect impedance matching therefore generally used at the output

stage.

11. Feedback circuits may be classified into four categories namely voltage-series feedback,

voltage shunt, current-series, current-shunt feedback.

12. In voltage series feedback input impedance increases while output impedance decreases with

feedback.

13. In voltage-shunt feedback both input and output impedances with feedback increases.

14. In current-series feedback both input and output decreases with feedback.

15. In current-shunt feedback input impedance decreases while output impedance increases with

feedback.

16. Miller’s and Dual Miller theorem is used to isolate the input and output.

17. Negative feedback is employed to make the amplifier gain less sensitive to components

variations, to control input and output impedances, to extend bandwidth ; to reduce non-linear

distortion and to enhance signal to-noise-ratio.

18. The key feedback parameters are the loop gain (A ).

19. Since A and are in general frequency dependent, the poles of the feedback amplifier are

obtained by solving the characteristic equation 1 + A (s) (s) = 0.

20. For the feedback amplifier to be stable, its poles must all be in the left half of the S-plane.

21. To make a given amplifier stable for a given feedback factor , the open-loop frequency

response is suitably modified by a process known as frequency compensation.

1

A = 125 and feedback factor = .

10

Sol. Given that A = 125

1

=

10

We know that gain of negative feedback is given by

A

Af =

1 +A

125

= = 9.259. Ans.

13.5

Problem 2. An amplifier with negative feedback has a voltage gain of 100. It is found that

without feedback, an input signal of 50 mV is required to produce a given output, whereas

with feedback, the input signal must be 0.6 for the same output. Calculate the value of A and B.

Sol. Given that Af = 100.

The input voltage required to produce the same output voltage as for the amplifier without

feedback is 0.6 V. Thus the output will be.

Vo = Af Vi = 100 0.6 = 60

According to question

If no feedback is employed, the required input to produce 60 V output is 50 mV. Hence the

Vo 60

internal gain of the amplifier is A = = 3 = 1200

Vi 50 10

A

Now, from Af =

1 +A

1200 12

1 = 1= 1200 = 11

1 1200 . 1 1200

11

= Ans.

1200

Problem 3. To an amplifier of 60 dB gain, a feedback of = 0.005 is applied. What

would be the change in overall gain of the feedback amplifier if the internal amplifier is

subjected to a gain reduction of 12%.

Sol. Given : A = 60 dB = 1000 { gain in dB = 20 log10

V2 FG IJ

V1 H K

= 0.005 60 = 20 log10 (A)

3

or A = 10 = 1000

dA dA f

= – 12% = – 0.12, =?

A Af

dA f 1 dA

We know that =

Af 1 A A

dA f

or

Af

=

1

1 1000 0.005

a 0.12 f

dA f

= – 0.02 or – 2%. Ans.

Af

Therefore, the overall gain of the feedback amplifier will be reduced by 2%.

Problem 4. An amplifier has gain A = 60 dB and output impedance Z o = 12.6 k . It is

required to modify its output impedance to 500 by applying negative feedback determine.

(i) The value of feedback factor

(ii) The percentage change in overall gain for 20% change in the gain of the basic amplifier.

Sol. Given gain in dB = 60.

FG V IJ = 20 log

2

(A)

HV K

1

10

60 = 20 log10 (A)

So, A = 103 = 1000

Zo = 12.6 k

Zof = 500

Zo

We know that, Zof =

1 A

12600

500 =

1 1000

5 + 5000 = 126

121

=

5000

= 0.0242

dA f 1 dA 1

Now, = = = 0.083%. Ans.

Af 1 A A 1 1000 0.0242

second harmonic distortion when the input is 0.028 V.

(a) If 1.2% of the output is feedback into the input in a negative voltage series feedback

circuit, what is the output voltage ?

(b) If the fundamental output is maintained at 36 V but the second-harmonic distortion is

reduced to 1 percent, what is the input voltage.

Sol. Given that Vo = 36 V

Vi = 0.028 V

Vo 36

A= = = 1285

Vi 0.028

Vf 1.2

= = = 0.012

Vo 100

(a) Gain with the feedback is given by,

A 1285

Af = = = 78.2

1 +A 1 1285 0.012

Vo

Also Af =

Vs

Vo = Af Vs = 78.2 0.028 = 2.19 V. Ans.

(b) If the output is maintained constant at 36 V then the distortion generated by the device is

unchanged. The reduction of the total distortion is caused by feedback.

D

Df =

1 +A

or 1+A =

D

=

7 RS Df 1% UV

Df 1 T D = 7% W

A =7–1=6

A 1285

Now, from equation, Af = = = 183.57

1 +A 7

Vo 36

Vs = = = 0.196. Ans.

Af 183.57

Problem 6. An amplifier with open loop voltage gain of 1000 ± 10% is available.

However we desire to build an amplifier whose gain does not vary by more than 0.1%. Find

the required feedback ratio and the corresponding closed loop voltage gain.

Sol. Given, we know that

dA f dA 1

= .

Af A 1 A

10

0.1 =

1 A

1 + A = 100

Given, A = 1000

100 1

= = 0.099

1000

A 1000

So, closed loop gain Af = = = 10. Ans.

1 +A 100

Problem 7. An amplifier has open loop voltage gain of 1000 and delivers 10 watts output

with 10% second harmonic distortion when the input is 10 mV. If 40 dB of negative feedback

is applied, what will be the distortion ? How much input voltage should be applied to 10

watts output power ?

Sol. The term 40 dB of feedback means 20 log10 (1 + A ) = 40 dB.

40

or log10 (1 + A ) =

20

or 1 + A = (10)2

or 1 + A = 100 ...(i)

A 1000

Af = =

1 +A 100

= 10 {Given A =1000,and 1+A = 100 from equation (i)}

New value of second harmonic distortion

Do 10

Df = = = 0.1%

1 A 100

Now value of input required = 10 mV 100 = 1 V { Vs = Vi (1 + A )}. Ans.

Problem 8. An amplifier has an input of 10 mV and a gain of 200 without feedback. The

distortion produced at the output of the amplifier is 10%. It is desired to reduce the distortion

to 1% by using negative feedback. Calculate the gain, input voltage and output voltage with

feedback.

Sol. Given : D = 10% = 0.1

Df = 1% = 0.01

A = 200

Vs = 10 mV

D

We know that, Df =

1 +A

0.1

0.01 =

1 200 .

= 0.045 or 4.5%

A 200

Gain with feedback, Af = = = 20

1 +A 1 0.045 200

Now output voltage, Vo = Af Vs = 20 10 mV = 0.2 V

Now input voltage, Vin = 0.01 V + (– 0.045 0.2) = 0.001 V. Ans.

Problem 9. An amplifier has an input impedance of 1 k and output impedance of 10 k

and a voltage of 10,000. If a negative feedback of = 0.02 is applied to it, determine the

input and output impedance of the amplifier with feedback.

Sol. Given : A = 10,000

= 0.02

Zi = 1 k

Zo = 10 k

Zif = ?

Zof = ?

Consider a voltage series feedback case in which feedback input impedance increases,

while output impedance decreases and given by the relation.

Zif = Zi (1 + A )

or Zif = 1 k (1 + 10000 0.02) = 1 k (201) = 201 k . Ans.

Zo

and Zof =

1 A

10 k 10

or Zof = = = 0.4975 k . Ans.

a

1 10,000 0.02 f 201

Problem 10. An RC coupled amplifier has a mid-frequency gain of 400 and a frequency

response from 200 Hz to 40 kHz. Determine the gain and frequency response when negative

feedback with feedback ratio of 0.01 is introduced in the amplifier circuit.

Sol. Given : A = 400,

= 0.01

We know that gain with feedback,

A

Af =

1+ A

= 400

fL

Lower cut-off frequency with feedback fLF =

1 A

200 Hz

= = 40 Hz.

1 +400 0.01

= 40 kHz (1 + 400 0.01)

= 40 5 = 200 kHz. Ans.

Problem 11. A negative feedback amplifier is shown in Figure N.(4.1) if the gain of the

amplifier without feedback is 4000, find :

(i) Feedback fraction or feedback ratio.

(ii) Overall voltage gain with feedback.

(iii) Output voltage if input voltage is 2 mV.

op-amplifier

+

+

Vin = 2mV –

RL = 10k Vo

R2 = 9k

R1 = 1k

Figure N (4.1)

R1 = 1 k

R2 = 9 k

R1 1

(i) Feedback fraction, = = = 0.1. Ans.

R1 R2 1 9

A

(ii) Overall voltage gain with feedback Af =

1 +A

4000 4000

= =

1 4000 0.1 1 400

= 9.975. Ans.

Vo

(iii) We know that, Af = (here Vs = 2 mV)

Vs

Vo = Af. Vs = 9.975 2 mV = 19.95 mV. Ans.

Problem 12. An amplifier has a gain of 54.8 dB without feedback. Find the change in

1

gain if of the output voltage is feedback at the input. Determine the percentage reduction

50

in harmonic distortion in the output due to feedback.

Sol. Given : A in dB = 54.8

We know that gain in dB = 20 log10 (A)

54.8

= log10 (A)

20

or A = 102.74

or A = 549.5 550

1

Feedback factor, = = 0.02

50

Now, gain with feedback,

A 550

Af = =

1 +A 1 550 0.02

Distortion with feedback,

D D

Df = =

1 +A 1 550 0.02

Percentage change in distortion

Df 1

100 = 100

D 12

= 8.33%. Ans.

Vf

Problem 13. (i) Find for the network shown below :

Vo

(ii) Sketch the circuit of a phase shift FET oscillator using this feedback network.

(iii) Find the minimum gain required for the oscillation.

C R

+ +

Vo I1 C R Vf

I2

– –

Figure N (4.2)

Sol. (i) Applying KVL in the loop (1) and (2), we get

Vo = I1 R +

FG 2 IJ – I 1

H j CK 2

j C

O = I2

FG R + 1 IJ – I 1

H j CK 1

j C

From equations (A) and (B) eliminating current I1

FG

I2 R +

1 IJ

CK F

Vo =

H

1

j

GH R + j 2C IJK I2

j C

1

j C

Vo

=j C R+

1 FG IJ FG R + 2 IJ 1

I2 j C H K H j CK j C

Vo 2 2 Rj C Rj C – R 2 2

C2 1

or = ( Vf = I2R.)

Vf j C

R

Vf j CR

or =

Vo 1 +3 j CR – R 2 2

C2

Vf 1

or =

Vo 1 R C

3

j CR j

Vf 1

or

Vo

=

3

F

j GR C–

1 IJ Ans.

H R CK

(ii) Circuit of phase-shift FET oscillator using the feedback network is shown in Figure N (4.3).

+ VDD

Rc

R1 C R

C R

R2 Rs

Figure N (4.3)

(iii) We know that

Vf

=

Vo

the frequency at which is purely real. In other word imaginary part must be zero.

Vf Vf 1

When in the expression imaginary part equal to zero, then becomes equal to

Vo Vo 3

1

i.e., =

3

Also A 1

1

A

A 3

Amin = 3 Ans.

Problem 14. Determine the stability of an amplifier, given the loop gain function.

T (f) =

a100f

F1 f I 3

H j

10 5 K

Determine the stability of the amplifier for = 0.20 and = 0.02.

Sol. The loop gain can be written in terms of its magnitude and phase, as

a100f – 3 tan–1 FfI

T (f) =

H 10 K

MML PPO

3 5

FfI 2

N

1

H 10 K 5

Q

The frequency f180 at which the phase becomes – 180 degree is

H 10 K

180

5

The magnitude of the loop gain at this frequency, for = 0.20, is then

b g

T f180 =

a0.20f a100f = 2.5

8

For = 0.02, the magnitude is

b g

T f180 =

a0.020f a100f = 0.25

8

Note: The loop gain magnitude at the frequency at which the phase is – 180 degree is 2.5 when

= 0.20 and 0.25 when 0.02. The system is therefore unstable for = 0.20 and stable for = 0.02,

since at = 0.20 gain is 2.5 which is greater than 1. Hence, the system is unstable for = 0.20.

Problem 15. Determine the required feedback transfer function which gives a phase

margin of 45 degrees.

Given that : T ( f) =

a100f

F1 f I FG 1 f IJ F 1 f I

H J

10 3 KH J

5 10 4 KH J

10 6 K

Sol. A phase margin of 45 degree implies that the phase of the loop gain is – 135 degree at

the frequency at which the magnitude of the loop gain is unity. The phase of the loop gain is

LM FfI FG f IJ F f I OP

H 10 K H 10 K Q

1 1 1

= – tan tan tan

N 3

H5 10 4 K 6

Since the three poles are far apart the frequency at which the phase is – 135 degree is

approximately equal to the frequency of the second pole. So in this example, f135 5 104 Hz,

so we have that

LM

= – tan 1 FG 5 10 IJ 4

tan 1 FG 5 10 4 IJ tan 1 FG 5 10 IJ OP 4

MN H 10 K 3

H5 10 4 K H 10 K PQ 6

Since we want the loop gain magnitude to be unity at this frequency, we have

af

T f =1

=

a100f

1 G

F 5 10 IJ 4 2

1

FG 5 10 4 IJ 2

1

FG 5 10 IJ 4 2

H 10 K 3

H5 10 4 K H 10 K 6

or 1

a100f

a50f a1.41f a1f

1. What does you mean by feedback. What do you understand by negative and positive feedback ?

Why is negative feedback applied in the high gain amplifier.

2. Distinguish current feedback and voltage feedback with appropriate circuit block diagram.

3. Drive the formula for negative feedback amplifier gain in terms of Af : A and B.

4. Explain, how is bandwidth increased by Negative feedback.

5. Draw the circuit of a transister amplifier with negative voltage feedback circuit. How to

explained it ? Explain how in Negative voltage feedback to the input.

6. What is an oscillator ? How does it differ from an amplifier ? What are the essential parts of

an oscillator circuit ? Explain the function of each part.

7. Explain why :

(i) A Negative feedback is always employed in high gain amplifiers.

(ii) Emitter-follower circuit is also called common-collector amplifier circuit.

(iii) A common emitter circuit without by pass capacitor is called a negative current feedback circuit.

8. State the merits and demerits of negative feedback in amplifiers.

9. Derive an expression to illustrate that the voltage gain in an amplifier circuit with negative

feedback is some what stable even if the of transistor changes due to its ageing or due to its

replacement.

10. What do you mean by Miller’s theorem ?

11. State Miller’s dual theorem.

12. List the fire main advantages of Negative feedback amplifier.

13. Explain why the input impedance and output impedance of a transconductance amplifier should

be high.

14. Explain different basic feedback topologies.

15. What do you mean by loop gain ?

16. How feedback effects stability ? Explain in detail.

1. An amplifier has a gain of 2000. If the feedback ratio is 0.04, then find the voltage gain of the

amplifier with negative feedback. (Ans. 24.7)

2. An amplifier has a gain of 4000. With negative feedback, the gain reduces to 25. Calculate the

fraction of the output that is feedback to the input. (Ans. 0.04)

3. An amplifier with negative feedback has a gain of 50. It is found that without feedback, an input

signal of 0.1 V is required to produce a given output, whereas with feedback, the input signal must

be 0.8 V for the same output. Calculate the amount of voltage gain and feedback ratio.

(Ans. Av = 400, = 0.018)

4. An amplifier has a voltage gain of 500. A technician decides that 10% negative feedback should

be employed to reduce distortion. (a) What will be the voltage gain with feedback ? (b) What

should be the feedback in order to double the gain that existed in (a).(Ans. (a) 9.8 ; (b) 4.9%)

5. The midband voltage gain of a certain amplifier is 500. Its upper half-power frequency (f2) is 20

kHz and the lower half-power frequency (f2) is 20 Hz. What will be the upper and lower half

power frequencies and voltage gain, if 2% negative feedback is introduced ?

(Ans. f2 = 200 kHz ; f2 = 1.8 Hz, Av = 45.5)

6. An amplifier with 2.5 k input resistance and 50 k output resistance has a voltage gain of

100. The amplifier is now modified to provide 5% negative voltage feedback in series with the

input. Calculate

(a) the voltage gain,

(b) the input resistance, and

(c) the output resistance with feed back. (Ans. (a) 16.67, (b) 15 kW and (c) 8.3 kW)

7. A feedback amplifier has an internal gain A = 40 dB and feedback factor = 0.05. If the input

impedance of this circuit is 12 k . What would have been the input impedance of the amplifier

if feedback not present. (Ans. 2 k )

8. What should be the feedback factor of negative feedback applied to an amplifier of internal gain

A = 180, and Z = 250 , in order to increase the input impedance to 1 k . (Ans. 0.0389)

9. A certain amplifier has an internal gain of 80 and the harmonic distortion in the output is 12%.

To improve the performance of the amplifier from the point of view of harmonic distortion.

Negative feedback is introduced in the circuit. This reduces the distortion within a tolerable

limit of 3%. Calculate the feedback factor in the amplifier. (Ans. = 0.0375 = 3.75%)

10. A negative feedback amplifier has a closed-loop gain Af = 100 and the open-loop gain A = 105.

What is the feedback factor ? If a manufacturing error results in a reduction of A to 103. What

closed-loop gain results ? What is the percentage change Af corresponding to this factor of 100

reduction in A ?

At the end of the unit we will able to learn about the

Introduction to oscillator

Different conditions of oscillator

Conditions for oscillations (Bark Hausen Criterion)

Different types of oscillators

Low frequency oscillators

R.C oscillator or phase shift oscillator

Wein bridge oscillator

High frequency oscillators

Hartley oscillator

Colpitts oscillator

Crystal oscillator

Frequency stability of oscillator

Wave generators plays a prominent role in the field of electronics. The generate signals

from few hertz to several giga hertz (109 Hz). Modern wave generators use many different

circuits and generate such outputs as, sinusoidal, square, rectangular, saw tooh and trapezoial

waveshapes. These waveshapes serves many useful purposes in the electronics circuit you

will studying. For example, they are used extensively throughout the television receiver to

reproduce both picture and sound.

One type of wave generator is known as an oscillator. The oscillator can be regarded as an

amplifier which provides its own input signal. They are used to generate high frequency wave

(carrier wave) in the tunning stages. Oscillators are widely use in radar, computer and digital

electronic circuits.

As we know that an amplifier produces an output signal whose waveform is similar to the

input signal but whose power level is different. This extra or additional power is supplied by

external dc source. There is no doubt in saying that an amplifier is essentially an energy i.e.,

it takes energy from the dc power source and converts it into as energy at signal frequency. It

is interesting here to note that if there is no input signal. There is no energy conversion and

hence there is no output signal.

However, an oscillators differs from an amplifier in the way that the oscillators does not

require an input source to start or maintain energy conversion process. It keeps producing an

output signal so long as the dc power source is connected.

Amplifier Oscillator

signal signal signal

DC Power DC Power

Input Input

Figure 5.1 Illustrating the comparison between an amplifier and an oscillator.

Oscillators are classified according to the waveshapes they produce and the requirements

needed for them to produce oscillations. They can be classified into two broad categories

according to their output. Waveshapes ; sinusoidal and non-sinusoidal (as shown in Figure 5.2).

Oscillators

oscillators relaxation oscillators

circuit oscillators oscillators resistance

oscillators oscillators

Figure 5.2 Classification of oscillator.

Ideally, the output signal is of constant amplitude with no variation in frequency.

Actually, something less than this is usually obtained. The degree to which the ideal is

approached depends upon such factors as class of amplifier operation, amplifier

characteristics, frequency stability and amplitude stability. Sine-wave oscillators produce

signal ranging from low audio frequencies to ultra high radio and microwave frequencies

(from 20 Hz to 1 MHz). The sinusoidal oscillators may be further sub-divided into

following type :

(a) Tuned circuit oscillator : These oscillators use a tuned circuit consisting inductors

(L) and capacitors (C) and are used to generate high frequency signals. Thus, they

are also known as radio frequency (RF) oscillators. Such oscillators are Hartley,

Colpitts, Clapp oscillators etc.

(b) RC oscillators : These oscillators use resistors and capacitors and are used to

generate low or radio frequency signals. Thus, they are also known as audio fre-

quency (AF) oscillators. Such oscillator are Phase shift oscillator and Wien bridge

oscillator.

(c) Crystal oscillators : These oscillators use quartz crystal and are used to generate

highly stabilized output signal with frequency upto 10 MHz. For example, peizo

oscillator.s

(d) Negative resistance oscillator : These oscillators use negative resistance character-

istics of the device such as tunnel diodes. For example, tuned diode oscillator.

(2) Non-sinusoidal oscillators : They generates complex waveforms such as square, rectan-

gular, trigger, sawtooth, or trapezoial. Because their outputs are generally characterized

by a sudden change, or relaxation, they are often referred as relaxation oscillators . The

signal frequency of these oscillators is usually governed by the charge or discharge time

of a capacitor in series with resistor. Some oscillators, both RC and LC Networks are

used for determining the frequency of oscillation. Within this category of non-sinusoidal

oscillators are multivibrators, blocking oscillators, sawtooth generators and trapezoidal

generators.

Advantages of Oscillators

Following are the advantages of oscillators :

An oscillator uses non-rotating device. Consequently, there is little wear and tear hence

longer life.

Due to absence of moving parts, the operation of an oscillator is quite silent.

The frequency of an oscillator can be easily changed when desired.

It has a good frequency stability i.e., frequency once set remains constant for a consid-

erable period of time.

It has a very high efficiency.

Nature of sinusoidal oscillations : The name of oscillations, produced by sinusoidal

oscillators may be of two types namely (i) damped oscillations and (ii) undamped oscilla-

tions.

V V t

t

O t O t

(i) Damped oscillations : The electrical oscillations, whose magnitude goes on decreasing

with time are called damped oscillations, as shown in Figure 5.3. The damped oscilla-

tions are produced by those oscillator circuits in which power losses place continuously

during each oscillation, however, it may be noted that frequency changes with time,

which is undesirable for practical purpose.

(ii) Undamped oscillations : The electrical oscillations whose amplitude remain constant

with time, are called undamped oscillations as shown in Figure 5.4. The undamped

oscillations are produced by those circuits in which either there are no power losses or if

they have any power loss they have provision for compensating those losses.

A circuit which produces electrical oscillations of any desired frequency is known as oscilla-

tory circuit or tank circuit. A simple oscillatory circuit consists of a capacitance (C) and

inductance (L) in parallel. Both the reactive devices are capable of storing electrical energy.

Basic principle of sinusoidal oscillator : It is a well known fact that an inductor stores

energy in its magnetic field whenever a current flows through it. Similarly a capacitor stores

energy in its electric field, whenever a voltage is applied across its plates.

S S

+

C L

–

(a)

Electron

S S

–

C L

+

Both the reactive elements are assumed to be an ideal one (i.e., they do not have any

power losses). Now we shall discuss as to how an LC circuit generates oscillations. Suppose

a capacitor has been charged dc voltage source with a polarity as shown in Figure 5.5. As the

switch (S) is opended it cannot discharge through the coil. When the switch (S) is closed as

shown in figure 5.5, the capacitor, discharges through the coil (L). This current flow set up

magnetic field around the coil. This magnetic field stores the energy released by electric

field. Because of the inductive effect, the current grows up slowly towards the maximum

value. This situation occurs, when the capacitor is fully discharged. At this instant, the

electrical energy stored in the capacitor becomes zero and the energy stored in magnetic field

is maximum energy around the coil.

Once the capacitor is discharged completely, the magnetic field around the coil begins to

collapse and produces a counter (or back) emf according to Lenz’s law, the counter emf,

keeps electrons moving in the same direction as shown in Figure 5.5 (b). This again charges

the capacitor, though in the opposite direction, as shown in Figure 5.5(c). When the capaci-

tor is charged completely in opposite direction, the magnetic field around the coil is also

collapsed completely. At this instant, the energy previously stored in the magnetic field, has

now converted into the energy stored in the electric field of the capacitor.

The above mentional sequence of charging and discharging of a capacitor results in an

alternating motion of electrons or an alternating current. As a result of this the energy is

alternatively stored in the electric field of the capacitor and magnetic field of the coil. This

interchange of energy between the capacitor and coil continues to be repeated, and results in

the production of electrical oscillations.

If there is no power losses in the tank circuit, the waveform of electrical oscillations will

be undamped (i.e., constant amplitude). However, in a practical tank circuit, the waveform

of the oscillations is damped (i.e., of decreasing amplitude). It is because of the energy lost

by L and C element, which may take place because of the following two reasons :

1. Some energy is lost in the form of heat produced in the resistance of the coil, connecting

wires and within the dielectric material of the capacitor.

2. Some energy is lost from the circuit due to radiation in the form of electromagnetic

waves. As a result of these losses, the amplitude of oscillating current in tank circuit

decreases gradually and eventually it becomes zero.

So, for achieving the undamped oscillation the following condition must be fulfilled :

The amount of energy supplied should be of such a value so as to meet the losses in the

tank circuit and ac energy removed from the circuit by the load for example, if losses in

LC circuit amount to 5 mW and the ac output being taken is 100 mW, when power of

105 mW should be continuously applied to the circuit.

The applied energy should have the same frequency as that of oscillations in the tank

circuit.

The applied energy should be in the same phase with the oscillations set up in the tank

circuit.

If these conditions are fulfilled the circuit will produce continuous undamped oscil-

lation. Finally we conclude that the essentials of a transistor oscillator is oscillator circuit and

transistor amplifier. For better understanding Figure 5.6 shows the block diagram of transis-

tor amplifier.

Oscillator circuit

or tank circuit

Transistor

L amplifier

C

Feedback

circuit

We know that overall voltage gain (i.e., gain with feedback for a positive feedback is given

by the expression).

A

Af =

1 A

where

A = Gain of amplifier without feedback or open loop gain.

Af = Gain of amplifier with feedback or closed loop gain.

A = loop gain.

It may be noted that if A = 1 then the Af but in actual practice it is impossible.

Therefore the condition A = 1 means the circuits has stopped amplifying and started oscil-

lating. Also it may be noted that undamped oscillation will not be maintained if the value of

A is less than unity.

We know that generally an amplifier causes a phase shift of 180° between the input and

output signals. In order to provide positive feedback, the feedback network must provide a

phase shift of 180° to provide a signal with a phase shift of 360° or 0° at the amplifier input.

Thus, the conditions for undamped oscillation is that there should be a positive feedback

with loop gain ( A = 1) equal to unity, and the net phase shift around the loop is equal to

360° or 0° are called the condition for oscillation. Thus, if A is a complex quantity then its

real part must be equal to unity and imaginary part equal to zero i.e.,

A=1+j0

However, an oscillator in which A is exactly unity, is realizable in practice. In every

practical oscillator A is slightly larger than unity to avoid the losses discussed earlier.

Finally, we concluded that an oscillator circuit must satisfy the two conditions mentioned

below to produce sustained undamped oscillation. The practical conditions are

(i) Loop gain A 1

(ii) Phase shift between the input and output signal must be 360° or 0°.

Different conditions for oscillations are :

(i) If A is less than unity, the output will die out and known as damped oscillations as

shown in Figure 5.7 (a).

V t

O t

(ii) If A is greater than unity, the output signal will build up is known as growing oscilla-

tions as shown in Figure 5.7 (b).

V t

O t

Figure 5.7(b) Growing oscillation when A > 1

(iii) If A is equal to unity, no change occurs in the output and we get an output with constant

magnitude is known as undamped oscillations as shown in Figure 5.7 (c).

V t

O t

These oscillators use resistors and capacitors are used to generate low or audio frequency

signals. Thus, they are also known as audio frequency (AF) oscillators, such oscillators are

given below namely

(i) Phase shift oscillator

(ii) Wein bridge oscillator

Basic principle of phase shift oscillator is that a fraction of the output single-stage amplifier

is passed through a phase-shift network, before feeding back to input. The phase-shift net-

work gives another phase-shift of 180° in addition to the phase-shift of 180° introduced by

the amplifier. Thus, there is a total phase-shift of 360°, which is also equal to 0°. The RC

oscillator, utilizing this principle is known as phase-shift oscillator.

Circuit arrangement of phase-shift oscillator is shown in Figure 5.8. Resistance R 1, R2

and R3 are the biasing parameter and Rc is the load resistance. There are three R-C combina-

tions forming feedback network. Each R-C combination provides a phase shift of 60°. Hence

the net phase shift produced by three RC networks is 180° and another 180° phase shift is

provided by transistor itself. Thus, total 360° phase shift is produced between the input and

1

output signal. The phase shift given by each RC section is = tan 1 if R is made

CR

zero then will be become 90°. But making R = 0 is impractical because if R is zero then

voltage across it will become zero, therefore in practice the value of R is adjusted such that

become 60°.

+Vcc

Rc

R1 In R

C C C

+ +

C C C

Ib

V1 R R R VC

R2 R R

RE CE – –

The transitor used in this circuit is C-E configuration. Let for this circuit hoe RC < 0.1 so

that we may use the approximate hybrid model (as discussed earlier). Also, it is assumed that

biasing resistor R1, R2, and RE have no effect on the signal operation and are neglected in the

analysis. The circuit for the feedback network is shown in Figure 5.9. Since it is the case of

voltage shunt feedback hence input and output can be separated without feedback by using

V0 = 0 and I1 = 0 respectively. The frequency of oscillation is given by

1

fr =

2 RC 6 4K

1

At this frequency, it is found that the feedback factor of the network is | | = . In

29

order that |A | shall not be less than unity. It is required that the amplifier gain |A| must be

more than 29 for oscillator operation.

Derivation of Frequency Oscillation

First of all draw its approximate hybrid model as shown in Figure 5.10 (a).

Ib C C C

hie hfelb Rc R R R

I3

From the Figure 5.10 (a), loop gain =

Ib

Now, to make calculation easy, apply the source transformation technique in Figure 5.10 (a)

and the equivalent circuit is shown below in the Figure 5.10 (b).

Ib Rc C C C

hie hfelb R R R

I1 I2 I3

Figure 5.10 (b) The equivalent circuit for which to calculate the loop gain.

Now, applying KVL in the loop (1), (2) and (3) we get

– hfe Ib RC – I1 [(RC – JXC) + R] + I2R = 0 ...(5.1)

(2R – JXC) I2 – I1R – I3R = 0 ...(5.2)

(2R – JXC) I3 – I2R = 0 ...(5.3)

RC X 1

Let K = and = C = , on putting these value equations (5.1), (5.2) and

R R CR

(5.3) may be rewritten as

– hfe Ib RC – I1 {K + 1 – J } + I2 = 0 ...(5.4)

I2 (2 – J ) – I1 – I3 = 0 ...(5.5)

(2 – J ) I3 – I2 = 0 ...(5.6)

From equation (5.5) and (5.6), we get

(2 – J ) I3 (2 – J ) = I1 + I3 ...(5.7)

or I3 (2 – J ) (2 – J ) = I1 + I3

or I3 {(2 – J ) (2 – J ) – 1} = I 1

2

or I3 {3 – – 4J } = I 1 ...(5.8)

I3

On substituting the values of I1 and I2 in equation (5.4). In order to calculate ratio , we

Ib

get

2

– hfe Ib K = I3 {(3 – – 4J ) (k + 1 – J )} – (2 – J ) I3

2 2 3 2

– hfe Ib K = I3 {3K + 3 – 3J – K – +J – J4K – J4 – 4 –2+J }

2 3

– hfe Ib K = I3 {1 + 3K – (5 + K) – J (6 + 4K) – } ...(5.9)

I3

From equation (5.9) the loop gain and if this is to be real co-efficient of J, must be

Ib

equal to zero i.e.,

3

(6 + 4K) – =0

2

or = 6 + 4K

= 6 4K

RS 1 UV

T CR W

1

= 6 4K

CR

1

= 6 4K { = 2 f}

2 f CR

1

f= ...(5.10)

2 CR 6 +4K

This is the required condition for the frequency of oscillation in phase shift oscillator.

I3 h fe K

Now, =

Ib 1 +3K – 5 +K a f 2

I3 h fe K 2

or = { = 6 + 4K}

Ib 1 +3K – 5 +K 6 4K a fa f

I3 h fe K

or =

Ib 1 +3K – 30 – 24K – 4K 2

I3 h fe K

or = 2

Ib 4K 23K +29

But loop gain 1

I3

or 1

Ib

h fe K

or 2 1

4K 23K +29

29

hfe 4K + 23 + ...(5.11)

K

Now, we will calculate the minimum or maximum value of hfe (i.e., gain of the transis-

tor). To calculate it we must differentiate equation (5.11) with respect to K, we get

h fe 29

4–

K K2

h fe

For maximum or minimum value, =0

K

29

0=4–

K2

29

K= 2.75

4

On putting the value of K in equation (5.11), we get

hfe 44.5 ...(5.12)

Thus, the value of K which gives the minimum hfe turns out to be approximate 2.75 and

for this value hfe = 44.5, i.e., a transistor with a small signal common emitter short circuit

current gain less than 44.5 cannot be used in the phase shift oscillator.

Advantages of Phase Shift Oscillator

Following are the advantages of phase shift oscillater :

It does not require transformers or inductors, that’s why it is less bulky.

Cheap and simple circuit as it contains resistors and capacitor only.

Waveform is exceptionally pure and sinusoidal since the core saturation effect and

harmonic distortion are absent as no transformer is used.

Disadvantages of Phase Shift Oscillator

Following are the disadvantages of phase shift oscillater :

The main disadvantage of this circuit is the high gain requirement (approximately >

44.5) which is practically impossible.

It gives only small output due to smaller feedback.

Feedback is less and it is difficult for the circuit to start oscillations. This is because

of high reactance of R and C.

It requires high supply voltage i.e., VCC > 12 V.

Example 1. Select the value of capacitor C and transistor hfe to provide an oscillator

frequency f = 2 KHz in phase shift oscillator

Given RC = 10 K , R = 8 K

Sol. Given that

f = 2 KHz = 2 103 Hz

RC = 10 k = 10 103

R=8K =8 103

We know that the frequency of oscillation in the case of phase shift oscillation is given by

relation (equation (5.10)).

1

f=

4R C

2 RC 6 +

R

1

2 103 =

10 10 3

2 8 10 3 C 6+4.

8 10 3

1

or 2 103 = 2 8 10 3 C 6+5

1

or 2 103 =

2 8 10 3 C 3.32

1

or C= 3

16 10 2 10 3 3.32

or C = 3.0 10–9 F = 0.003 F

Value of transistor gain hfe is given by relation

R RC

hfe 23 + 29 4

RC R

or hfe 23 + 29

FG 8 10 3 IJ 4.

FG 10 10 3 IJ

H 10 103 K H8 10 3 K

or hfe 23 + 23.2 + 5

or hfe 51.2

or hfe = 51.2. Ans.

In the circuit for wein bridge oscillator as shown in Figure 5.11. A second-stage of amplifier

is used for producing another 180° phase shift in addition to the phase shift of 180° produced

by the first stage. Thus, there is total phase shift of 360°, which is the basic requirement. A

fraction of output from the second stage is feedback to the input of the first stage without

producing any further phase-shift. The RC oscillator utilizing this principle, is known as

wien bridge oscillator.

+Vcc

R1

Rc R7 Rc

2

R5 Cc

R

C1

+VO

Cc

2

C

Q1 Q2

R6

R8 RE

4

R

R3 RE CE

Negative

feedback

The wein bridge oscillator consists of two transistor (CE configuration) which provides

an approximately 360° or 0° phase shift so the feedback network has no need to introduce

any additional phase shift where R5, R6, R7 and R8 are biasing resistors.

The feedback network consists of C1–R1 and C2–R2 (called a lead-lag network) and R3–R4

(called a voltage divider). The lead-lag network provides a positive feedback to the input of

the first stage and the voltage divider provides the negative feedback to the emitter of the

transistor Q1.

For calculating the frequency of oscillation the feedback network of wein bridge oscillator is

shown in Figure 5.12.

We know that at balanced condition phase shift must be zero.

According to wheat stone bridge,

P R

=

Q S

R3 R4

So, =

1 1

R1 R2

j C1 j C2

1

R2

j C2

S

R1

C2

C1 Q

2

R

P R

4

R

3

R

+ –

Figure 5.12 Feedback network or wein bridge oscillator.

R 3 j C1 R

= 4 ( j C2R2 + 1)

jR1 C1 1 R2

R 2R 3 j C 1 = R 4R 1 j 2 2C 1 C 2 R 2 + R 4 R 1 j C 1 + R 4 + R 4 j C 2R 2

FG

j R2R3 R4

C2

R2

IJ

H K

2

C 1 = R 4 – R 1R 2 R 4 C 1 C 2

C1

FG

– R 2 R3 R 4 R1 R4

C2

R2 = j

IJ RS R 4

R 4 R1R 2C1C2

UV ...(5.13)

H C1 K T C 1 W

the oscillation will be possible only when phase shift zero. The oscillation frequency is

given by

R4

– C 2R 4 R 2 R 1 = 0

C1

2 1

or = { = 2 f}

C1C 2 R1R 2

1

f= ...(5.14)

2 R1R 2 C1C 2

Condition for oscillation :

C2

R2R3 – R 1R4 – R 2R4 =0

C1

R3 R1 C

= 2 ...(5.15)

R4 R2 C1

This is the required condition for oscillation.

If, R1 = R2 = R and C1 = C2 = C, then from equation (5.15).

R3

–1=1 R1 C2

R4

C1

R3

=2 Vo R2

R4

Vf V

f

We know that =

Vo R3 R4

R4

V f = V o.

R3 R4 Figure 5.13

Vf R4

or =

Vo R3 R4

R4

or = ...(5.16)

2R 4 R 4

1

or =

3

Also since as we know that

A 1

1

A 1

3

A 3 ...(5.17)

Thus, for oscillation produced gain must be equal to or greater than 3.

Advantages of Wein Bridge Oscillator

Following are the advantages of wein bridge oscillator :

It has better stability.

Output is constant.

Its working quite simple and easy.

Overall gain in high as two transistors are used.

Frequency of oscillations can be easily adjusted by varying gang capacitors C 1 and C2.

Disadvantages of Wein Bridge Oscillator

Following are the disadvantages of wein bridge oscillator:

Costlier as more components are used.

It cannot be used to generate very high frequency (> 1 MHz) this is the main draw back

of this circuit.

Note : Why wein bridge oscillator used for audio frequency oscillator ?

1

Since the frequency of oscillation for the wein bridge oscillator is f = or

R1R 2 C1C 2

1

f= , when R1 = R2 and C1 = C2 and the practical feasible value of RC gives the frequency

2 RC

of audio range that’s why this oscillator is mainly used as audio frequency oscillator.

Example 2. A wein bridge oscillator is used for operation at f = 10 KHz. If the value of

R is 100 K . Find the value of the capacitor C.

Sol. Given : f = 10 KHz = 10 103 Hz

R = 100 K = 100 103

We know that frequency of oscillation in a wein bridge oscillation is given by relation.

1

f=

2 RC

1

10 103 =

2 100 10 3 C

1

or C=

2 d100 10 3 i 10 10 3

or C = 159 10–12 F

C = 159 PF. Ans.

These oscillators called tuned circuit oscillator are also known as LC oscillators resonant

circuit oscillators or tank circuit oscillators. These oscillator are used to produce an output

with frequencies ranging from 1 MHz to 500 MHz. Hence they are also known as radio

frequency (RF) oscillators.

Figure 5.14 shown the circuit of a Hartley oscillator. Tank circuit consists of two coils L 1

and L2 and a capacitor C. The coil L1 is inductively coupled to the coil L2 and the combination

works as an auto transformer. A coil called Radio Frequency Choke (RFC) is connected

between the oscillator and V CC supply. The feedback between the output and input circuit is

accomplished through auto transformer action, which also introduceds a phase shift of 180°.

The phase reversal between the output and input voltage occurs because they are taken from

the opposite ends of the coils (L1 and L2) with respect to the tap, which is grounded.

Since the transistor also introduces a phase shift of 180°, therefore, the total phase shift is

360° and hence feedback is positive. Ignoring the loading effects of the base, the feedback

fraction is given by the relation.

L2

=

L1

Also since A 1

L2

A. 1

L1

L1

A

L2

L1

It means voltage gain must be equal to

L2

+Vcc

RF Choke

R1 Cc

CB

+

L1

C Vo

R2

L2

RE CE –

The resistor R1, R2 and RE are used to provide dc bias to the transistor. When the circuit

is energised, switching on the supply, the collector current flows. The oscillations are pro-

duced because of positive feedback from the tank circuit.

Before the derivation for frequency of oscillation for Hartley Oscillator. Let us derive the

general theory for Hartley and Colpitts oscillator. The equivalent circuit is shown in

Figure 5.15. Here we have made some assumptions.

First, hre of transistor is negligibly small and so the feedback source hre Vo is neglected

from the equivalence circuit.

1 1

Second, hoe of transistor is very small i.e., h output resistance is very large. So h is

oe oe

also neglect from the equivalent circuit.

Let us calculate the ZL (load impedance) between output terminals 2 and 3. Here Z A and

hie are in parallel. Their impedance is in series with ZC, the resultant impedance is in parallel

with ZB hence,

1 1 1

=

ZA ZA hie

ZA . hie

i.e., ZA =

ZA hie

B C

IC

IB hie hfeIB

E

1 ZA ZB 3

I1 2

I1 I1

ZC

Figure 5.15

Z A + ZC =

ZA . hie Z h

+ ZC = A ie

ZC Z A b hie g

ZA hie Z1 hie

ZA hie ZA ZC ZC hie

=

ZA hie

=

hie ZAb ZC g Z A ZC

ZA hie

Load impedance is given by

1 1 1

=

ZL ZB ZA ZC

1 ZA hie

= (Put the value of ZA)

ZB hie Z A b ZC g ZA ZC

=

hie ZAb g Z Z Z bZ h gZC A C B A ie

Z h bZ Z g Z Z

B ie A C A C

=

hie bZ Z Z g Z Z Z Z

A B C A B A C

Z h bZ BZ g Z Z ie A C A C

Z h bZ BZ g Z Z ie A B A C

ZL = ...(5.18)

hie ZA ZB ZC ZA ZB ZA ZC

The voltage gain without any feedback is

h fe ZL

A=– ...(5.19)

hie

The feedback factor can be calculated as follows :

The output voltage between terminal 3 and 2

Vo = (Z A + ZC) I1

Vo =

FG Z h A ie

Z C I1

IJ

HZ h A ie K

=I M

LZ h A ie ZA ZC ZC hie OP

N1

Z1 hie Q

=I . M

L bZ A g

Z B hie Z A ZC OP ...(5.20)

1

N ZA hie Q

The voltage feedback to the input terminal (1) and (2), given by

ZA hie

Vfb = ZA I1 = I1

ZA hie

V fb Z A hie

= =

Vo hie Z A b ZC g Z A ZC

For condition A = 1, we get

h fe Z L LM Z A hie OP = 1

hie MN h bZ

ie A ZC g

Z A ZC PQ

or

b

h fe ZB hie ZA ZC g Z A ZC LM ZA OP = – 1

b

hie ZA ZB ZC g ZA Z B Z A ZC MN h bZ

ie A ZC g Z A ZC PQ

hie Z B Z A

or =–1

b

hie Z A ZB ZC ZA ZB g Z A ZC

or hie (ZA + ZB + ZC) + ZAZB (1 + hfe) + Z1Z3 = 0 ...(5.21)

Equation (5.21) is the general equation for the oscillator.

Derivation for Frequency of Hartley Oscillator

In the case of hartley oscillator (See Figure 5.14)

ZA = j L1 + j M

ZB = j L2 + j M

1 j

ZC = =–

j C C

Put these values in general equation (5.21), then we get

hie

LMb j L1 j M g bj L2 j M g j OP

+ (j L1 + j M)

N C Q

j

(j L2 + j M) (1 + hfe) + (j L1 + j M) – =0

c

j hie L1LM 1

L2

– 2M – OP 2

(L1 + M) (L2 + M) (1 + hfe) +

bL 1 M g =0

N 2

C Q C

Simplify the above equation as

j LM

hie L1

1

L2 – 2 (L1 + M) L 2

2M – OP LMb M 1 gd h fe i 1 OP

= 0 ...(5.22)

N 2

C Q N 2

C Q

Equating the imaginary part equal to zero, we get

hie L1LM L2

1

2M –

=0 OP

N 2

C Q

1

L1 + L2 + 2M – 2 = 0

C

2 1

C=

L1 L2 2M

1

=

bL

1 L2 2M C g

1 1

f= =

2 2 bL

1 L2 g

2M C

1

f= ...(5.23)

2 bL 1 L2 2M C g

Conditions for oscillations can be obtained by equating coefficients of real part of equa-

tion (5.5) to zero. Thus

1

(L2 + M) (1 + hfe) – 2

=0

C

1

(1 + hfe) = 2

C L2 b M g

or (1 + hfe) =

bL 1 L2 2M C g

b

C L2 M g

L1 L 2 2M

=

b L2 M g

=

bL 1 Mg bL 2 M g = 1 + FG L 1 M IJ

b L Mg

2 HL 2 M K

hfe =

FG L 1 MI

J ...(5.24)

HL 2 MK

Example 3. Calculate the frequency of a transistor Hartley oscillator. If L1 = 200 H,

L2 = 2 mH, mutual inductance between the coils M = 20 H and C = 20 pF.

1

Sol. f= (From equation (5.23))

2 bL 1 L2 2M Cg

Given : L1 = 200 H

L2 = 2 H

M = 20 H

C = 20 pF

1 1

f=

2 314

. a200 2000 2 20 10f 6

20 10 12

1 1

f=

2 3.14

2240 10 6

20 10 12

f = 7523.20 KHz.

Hartley oscillator is probably the most popular oscillator and is commonly used in radio

receivers. It is because of its easy adaptability to a wide range of frequencies.

Colpitts oscillator is similar to Hartley oscillator. The only difference is that in case of

colpitts oscillator, coupling is capacitive instead of being inductive. Figure 5.16 shows the

colpitts oscillator circuit. The tank circuit is made up of two capacitors C1 and C2 connected

in series with each other across a fixed inductance (L). The resistors R 1, R2, RE and RF choke

have the same function as mentioned in Hartley oscillator.

+Vcc

The feedback between the output and input cir-

cuit is accomplished by the voltage developed RF choke

across the capacitor C2. Ignoring the loading ef- R1 C

fect of the base, the feedback fraction A

CB Cc

C1

= C1

C2 L

R2 C2

But, since A 1

C1 RE CE

or A 1 B

C2

C2

or A

C1 Figure 5.16 Colpitts oscillator.

Thus, to start the oscillation, the voltage gain (AV) must be greater than

FG C IJ . The

2

HC K1

frequency of oscillation (neglecting mutual inductance) is given by the relation.

1

f=

2 LC

C1C 2

where C= (C is the effective value of capacitance)

C1 C 2

It may be noted that in a Colpitts oscillator C1 and C2 act as a simple alternating voltage

divider. Therefore, points A and B are out of phase with each other and another phase shift

of 180° is provided by the transistor itself. Thus, there is a total phase shift of 360° between

the emitter-base and collector-base circuits.

Colpitts oscillator is widely used in commercial signal generator ranging from 1 MHz to 500

MHz. Frequency of oscillation is varied by gang-tuning the two capacitor C1 and C2.

Derivation for frequency of oscillations for colpitts oscillator

hie (ZA + ZB + ZC) + ZAZB (1 + hfe) + ZAZC = 0 (From equation 5.21)

In case of Colpitts oscillator

1 J

ZA = =–

J C1 C1

1 J

ZB =

=–

J C2 C2

ZC = J L

Put these values in general equation (5.21), we get

hie –

LM J J

J L

OP FG J IJ FG J IJ d1 i FGH JC IJK J L = 0

h fe

N C1 C2 Q H C1 KH C2 K 1

– J hie

FG 1 1 1 I

J

1 h L

=0

fe

H C1 C2 LK CC 2

C 1 2 1

1 1

J hie

FG fe I L 1 h L OP = 0...(5.25)

LJ M

C1 C2 H 2

1 2 1 K N CC C Q

Equating the imaginary part of equation (5.25) equal to zero then, we have

hie

FG 1 1 IJ

L =0

H C1 C2 K

1 1

or = L

C1 C2

C2 C1

= L

C1C 2

or 2

=

C1 C 2

or =

RSbC C g UV

1 2

b

L C1C 2 g T LC C W 1 2

f=

1 RSbC C g UV

1 2

...(5.26)

2 T LC C W 1 2

Equate real part of equation (5.25) to zero, we get

1 h fe L

2 = or 1 + hfe

C1C2 C1

2

LC 2 C1 2

= = LC2

C1

or 1 + hfe =

bC C2

1 g LC2 =

C2

+1

LC1C 2 C1

C2

hfe =

C1

Example 4. Calculate the frequency of transistor Colpitt’s oscillator. If C1 = 0.001 F,

C2 = 0.01 F and L = 20 H

Sol. f=

1 LM bC C g OP (From equation 5.26)

1 2

2 N LC C Q

1 2

Given : L1 = 20 H

C1 = 0.001 F

C2 = 0.01 F

=

1 a0.001 0.01f 10 6

2 3.14 d20 10 6

i d0.001 10 i d0.01

6

10 6

i

= 1181.5 KHz.

So far, we have studied the oscillators in which the oscillations are produced by the oscillatory

circuit. The major problem in these circuits is that their frequency of operation does not remain

perfectly constant. It is because the values of resistors and inductors change with temperature.

However, in some of the applications it is necessary to maintain constant frequency with an

extremely low tolerance.

The solution to this problem is use of crystal oscillators. In crystal oscillators, piezoelec-

tric crystal are employed in place of RL or RC circuit. The frequency of crystal oscillators

remains more or perfectly constant even if temperature changes.

The crystal is usually made of quartz material and provides a high degree of frequency

stability and accuracy or we can say that crystal oscillator is basically a tuned oscillator. It

uses a piezoelectric crystal (when an ac voltage is applied across a crystal it starts vibrating at

the frequency of supply voltage, the effect is known as piezoelectric effect and the crystal

which exhibit this effect is known as piezoelectric crystals, conversely, when these crystals

are placed under mechanical strain to vibrate, they produce an ac voltage. For example,

rochelle salt, quartz and tourmaline are known as piezoelectric materials. Out of the three,

rochelle salts exhibit the greatest piezoelectric activity) as a reasonant tank circuit. The crys-

tal is usually, made of quartz material and provides high degree of frequency stability and

accuracy. Therefore, the crystal oscillators are very useful in those applications where fre-

quency stability is very essential. The crystal oscillators are widely used in communication

transmiters, digital watches and clocks etc.

Electrical equivalent circuit of a crystal : The electrical equivalent circuit of a crystal

consists of series R-L-C in parallel with capacitor Cm when the crystal is applied across the ac

source it is not vibrating, it is equivalent to the capacitor Cm. However, when crystal

vibrating, it acts like tuned R-L-C circuit.

Reactive

(Inductance)

R XL

P

Xtal Cm

L O s

C

Reactive

Xc (Capacitance)

Figure 5.17

Figure 5.17 (a) shows the symbol of piezoelectric crystal while Figure 5.17 (b) shows its

equivalent circuit. However, Figure 5.17 (c) shows the graph between reactance versus fre-

quency. If this device is properly mounted deformation takes place within the crystal, and an

electromechanical system is formed which will vibrate when properly excited. The resonant

frequency and the quality factor (Q) depend upon the crystal dimensions.

The crystal has two resonant frequencies viz series resonant frequency and parallel reso-

nant frequency. In this case when the impedance of the circuit is equal to the resistance R

XL = X C.

1

Thus, S L= C

S

1

or S =

LC

Then frequency of oscillations is given by

1

fS = ...(5.27)

2 LC

this frequency of oscillation is called series resonant frequency.

This is occur when resistance of series arm equals the reactance of Cm.

1 1

p L– =

pC pCm

1 1

or p L=

pCm pC

2 1 1 C +C m

or p L= =

Cm C C . Cm

C +C m

p =

LCC m

1

fp = ...(5.28)

2 LC eq

C . Cm

where Ceq =

C +C m

usually the value of Cm is much larger than C therefore the frequencies Fp and Fs are very

close to each other otherwise Fp is always more than Fs. However, when crystal is used as

oscillator, the oscillation frequency always lie between Fs and Fp.

The impedance versus frequency graph of crystal is shown in Figure 5.18.

fS fP f

Transistor crystal oscillator : The circuit arrangement for transistor crystal oscillator is

shown in Figure 5.19. This arrangement is used in the place when a constant high freqeuncy

(25 kHz – 5 MHz) is required, a transistor crystal oscillator is always preferred.

+Vcc

RFC

R1 XtalCl

+

V t

R2

RE CE

–

Figure 5.19 Transistor crystal oscillator.

Advantages of Crystal Oscillator

Following are the advantages of Crystal Oscillator :

The circuit is very simple. It does require any tank circuit other crystal itself.

It provides high degree of frequency stability.

It possess very high quality factor.

Different oscillation frequencies can be achieved by simply replacing one crystal with

another.

Disadvantages Crystal Oscillator

Following are the disadvantages of Crystal Oscillator :

These oscillators are used are not fit for frequencies less than 100 kHz.

The crystal oscillators have very limited tunning range.

The crystal oscillators are fragile and therefore, can be used in low power circuits.

Example 5. Calculate the parallel resonant frequency, series resonant frequency and Q

factor of the crystal oscillator, if the crystal of the oscillator has the following parameters :

C = 0.06 F ; L = 0.5 H ; Cm = 1 pF and R = 10 K .

Sol. Given : C = 0.06 pF

L = 0.5 H

R = 10 K

Cm = 1 pF

Parallel resonant frequency of crystal is given by

1 C +C m

fp = (From equation 5.28)

2 LCC m

=

1 a0.006 1f 10 12

= 946 kHz.

2 d0.5 0.06 10 12

i d1 10 12

i

Series resonant frequency of crystal is given by

1 1

fs = = = 918.9 kHz.

2 LC 2 a0.5f d0.06 10 12

i

Q factor of the crystal is given by

sL 2 fs L

Q= =

R R

=

2 d918.9 103 i 0.5

3

10 10

= 288.54.

The frequency stability of an oscillator measures its ability to maintain a constant frequency

over a long time interval. However it has been found that if an oscillator is set at some

particular frequency, it does not maintain for a longer period. In other words the frequency

of oscillator changes slowly (or drifts away) from the initially set values. But at some times,

it may be changing quite erratically. The change in oscillation frequency my arises due to the

following factors.

1. Supply voltage : The change in dc supply voltage applied to the active device, shifts the

oscillator frequency. This problem can be avoided by using highly regulated power

supply.

2. Operating point of the active device : The operating point of the active device (i.e.,

bipolar transistor or FET) is selected in such a way that its operation in non-linear

region, changes the values of device parameters which, in turn affects the frequency

stability of the oscillator.

3. Circuit components : The values of circuits components (i.e., resistor, inductors and

capacitors) change with the variation in temperature. Such changes take place slowly,

they also cause a drift in oscillator frquency.

4. Output load : A change in the output load may cause a change in the Q-factor of the

tank circuit, thereby causing a change in oscillator output frequency.

5. Stray capacitances and inter element capacitances : Any change in the inter element

capacitances of a transistor causes changes in the oscillator output frequency and thus

affects the frequency stability. Similarly, the stray capacitance also affects the frequency

stability of an oscillator. The effect of change in inter element. However it is very

difficult to avoid the effect of stray capacitance.

2. There are two types of oscillator circuits namely sinusoidal or harmonic oscillators circuit and

non-sinusoidal or relaxation oscillator.

3. The static electronic devices that produces sinusoidal oscillations of desired frequency is

called a sinusoidal oscillator.

4. The electrical oscillation whose amplitude decreases with time are known as damped oscillation.

5. However the electrical oscillations whose amplitude does not decreases with time are known

as damped oscillation.

6. A circuit that produces electrical oscillations of desired frequency is known as an oscillatory

circuit or tank circuit.

7. The resonance frequency of oscillation is given by the relation.

1

fr =

2 LC

8. In phase shift oscillator the frequency of oscillator.

1 R

f = where, K = c

2 RC 6 +4K R

Each RC network provides a phase shift of 60° ; = tan–1

FG 1 IJ

H 2 CR K

9. Minimum gain required in case of phase shift oscillator is 44.5

10. Frequency of oscillation in the Wein bridge oscillator is

1

f =

2 R1R 2C1C2

1

11. Feedback ratio ( ) in Wein bridge oscillator must be greater than .

3

12. Frequency of oscillation in Hartley oscillator is

1

f = where, Leq = L1 + L2 + 2M

L eq C

or Leq L1 + L2 (When mutual inductance M is neglected)

13. Frequency of oscillation in Colpitts oscillators is

1 C1C2

f = where, Ceq =

2 LCeq C1 C2

14. The percentage change of quantity (frequency) on either side is called tolerance.

Problem 1. An oscillatory circuit has L = 0.01 H and C = 10 pF, find the frequency of

oscillations.

Sol. Frequency of oscillation

1 1

f= =

2 LC 2 0.01 10 10 12

10 6

= = 550 kHz. Ans.

2 0.1

Problem 2. A tuned collector oscillator has a fixed inductance of 150 H and has to be

tunable over the frequency band of 500 kHz to 1500 kHz. Find the range of variable capacitor

to be used.

Sol. Resonant frequency is given by

1

f=

2 LC

1

C=

4 f 2L 2

1 1

C= =

4 2

d500 10 3 2

i 150 10 6 4 2

250000 100

= 1015 pF

When f = 500 kHz

1

C= = 113 pF

4 2

d500 10 3 i 2

150 10 6

Problem 3. In a transistor colpitt’s oscillator,

(i) Operating frequency

(ii) Feedback fraction

(iii) Minimum gain to sustain oscillations

(iv) Emitter resistance if RC = 2.5

Sol. (i) Given L = 100 H

C1 = 0.001 H

C2 = 0.01 F

1

Operating frequency, f=

2 LC

C1C 2 0.001 . 10 – 6 0.01 10 6

where C= =

C1C 2 0.001 . 10 6 0.01 10 6

6

0.001 0.01 10

= = 0.0000909 10–6

0.011

1

Now, f=

2 100 10 6 0.0000909 10 6

(ii) We know that feedback fraction ( ) is given by

C1 0.001 10 – 6

= = = 0.1

C2 0.01 10 6

(iii) Minimum gain to sustain oscillations,

A 1

Amin = 1

1 1

Amin = = = 10. Ans.

0.1

RC

(iv) Since, A

RE

RC 2.5

or RE k = 0.25 . Ans.

A 10

Problem 4. In a transistorised Hartley oscillator, if L1 = 0.1 mH, L2 = 10 mH and

mutual inductance (M) between the two coils = 20 H, calculate the value of capacitor C1,

of oscillatory circuit to obtain the frequency of 4110 kH 2.

Sol. We know that in Hartley oscillator, the tqo coil L1 and L2 are connected in series and

coupled magnetically

So, total inductance of the coils

L = L1 + C2 + 2M = 100 H = 150 H

1

Frequency of oscillations,f =

2 LC

1

4110 105 =

6

2 150 10 C

1

C= = 10 pF. Ans.

a2 f 2

150 10 6

d4110 10 3 i 2

frequency of 1 kHz is applied across the network, find the value of C for a phase shift of 60°

(i.e., RC phase shift oscillator).

C 1

Sol. We know tan = =

R CR

1

tan 60° =

2 1 10 3 C 10 10 3

1

1.732 =

2 10 10 10 3 3

C

C = 0.009 F. Ans.

Problem 6. In a Wein bridge oscillator given that R1 = R2 = 200 k and C1 = C2 = 250 pF.

Determine the frequency of oscillations.

Sol. Frequency of oscillations in Wein bridge oscillator is given by

1

f=

2 R1R 2 C1C 2

When R1 = R2 = R

and C 1 = C2 = C, then

1

f=

2 RC

1

or f= 3 12

2 200 10 250 10

or f = 3177.9 Hz. Ans.

Vf

Problem 7. Consider the two-section RC network shown in Figure N (5.1), find the

Vo

function and verify that it is not possible to obtain 180° phase shift with a finite attenuation.

C C

+ +

Vo R R Vf

I1 I2

– –

Figure N (5.1)

Sol. Applying kVL in loop (1) and (2), we get

V o = I1 R +

FGIJ – I R 1

...(i)

H

j CK

2

F

0 = GR +

1 I

H j C JK I – I R 2 1 ...(ii)

F 1 I FG 2R + 1 IJ I FG R + 1 IJ – I R

Vo =

H R K H J CK H J CK 2 2

I LF 1 IF 1 I O

Vo = 2

M

R NH

G 2R + J G

J CK H

R+ J

J CK

RP

Q

or V f = I2 R

I2 = Vf IR

Vo =

VfLMFG 2R + 1 IJ FG R + 1 IJ – ROP

R . R NH J CK H J CK Q

Vo J 3R C + 1 – R 2 2

C2

or =

Vf R 2 2 C2

Vf 2

C2 R 2

or = 2 2 2

Vo C R 1 3RJ C

XC 1

Put = =

R CR

Vf 1

= 2

Vo 1 J3

3

In order to have a phase shift of 180°, tan = tan 1800 = 0 – 2 . Hence either

1

= 0 or = 180°.

Vf

If = 0, then from the above expression = 1 it means phase shift is 0° not 180°.

Vo

Note that = 0 requires either R = or C = which means that output is connected

Vf

directly to the input. On the other hand if = , then = 0 and this woulde require an

Vo

amplifier with infinite gain. Note that = means either C = 0 or R = 0 so the attenuation

is infinite.

Problem 8. A Colpitts oscillator has a coil with an inductance of 50 H and is tuned by a

capacitor of 300 pF across the output. Find the frequency of oscillation and the minimum

gain for maintaining oscillation.

Sol. For Colpitts oscillator the frequency is given as

1 C1C 2

f= ; where Ceq = C C

2 LC eq 1 2

300 100

= 300 100 = 75 pF

L = 50 H

1

so, f=

6 6

2 50 10 75 10

or f 2.6 MHz. Ans.

For maintaining oscillation

Aloop 1

or Aopen loop =1 {Aopen loop = open loop gain or gain}

C2 C2

or Aopen loop =1 =

C1 C1

C1 3

or Aopen loop = = = 3. Ans.

C2 1

Problem 9. Prove that in a crystal the ratio of frequencies in series and parallel reso-

1 C

nance is given by 1 + .

2 C

Sol. The equivalent circuit of a crystal oscillator is given by

From the given figure series resonant frequency is given by

L

1

fs =

2 LC C

R

and parallel resonant frequency is given as

1 C

fp = ;

2 LCeq

C .C Figure N (5.2) Equivalent circuit of a

where Ceq = crystal oscillator.

C C

fs and fp may be written as

1

fs2 =

a2 f 2

LC

1

f p2 =

a2 f 2

. LCeq

According to given condition,

f p2 F 1 I F a2 f LC I

2

fs2

= GH a2 f LC

2

eq

JK GH 1 JK

f p2 LC

or =

fs2 C .C

L.

C C

f p2 C

or =1

fs2 C

fp C

or = 1

fs C

fp F C I 2

or

fs

= 1

H C K

fp 1 C

or =1 (Neglecting the higher terms)

fs 2 C

Hence proved.

2. What is the condition of oscillation ?

3. Draw and explain tuned collector oscillator.

4. Draw the circuit and explain the operation of Colpitt’s oscillator.

5. Discuss in detail Hartley oscillator.

6. Draw and discuss in detail the circuit of an R-C phase shift oscillator.

7. Draw the circuit of a Wein bridge oscillator and explained its working. Why is negative

feedback employed in this oscillator circuit in addition to the usual feedback positive feedback.

8. Explained the properties of quartz crystal which are responsible for its use in oscillator.

9. Explain why :

(i) Three R-C section are used R-C phase shift oscillator.

(ii) Negative feedback is provided in Wein bridge oscillation.

(iii) In Wien bridge oscillator, gangs are employed.

(iv) At low frequency (1 Hz to 100 kHz) application, we employ R-C oscillators and not

L-C oscillator.

10. What are the factors which affect the frequency stability of an oscillator ?

11. What is Bark hausen criterion for the frequency stability of an oscillator ?

12. Explain how L-C tank circuits is used to generate oscillations in an electronic oscillator.

operate at 25 kHz. Calculate the value of capacitance C.

2. For an FET Hartley oscillator calculate the oscillator frequency, given that C = 250 pF, L 1 =

1.5 mH, L2 = 1.5 mH and M = 0.5 mH.

3. An oscillatory circuit has L = 0.2 H, C = 100 pF, find the frequency of oscillations.

4. A tuned collector oscillator has a fixed inductance of 150 H and has to be tunable over the

frequency band of 500 kHz to 1000 kHz. Find the range of variable capacitor to be used.

5. In a transistor Colpitt’s oscillator, L = 100 H, LRFC = 0.6 H, C1 = 0.01 H, C2 = 0.01 F

determine.

(i) Operating frequency

(ii) Feedback fraction

(iii) Minimum gate to sustain oscillations

(iv) Emitter resistance if RC = 2.5 k .

6. Take into account the loading of RC network in the phase-shift oscillator. If Ro is the output

impedance of amplifier (assume that CS is arbitrary large) then prove that the frequency of

oscillation f and the minimum gain A are given by

1 1 Ro FR I 2

f=

2 RC 6 b

4 R o IR g

; A = 29 + 23

R

4

H RK

o

Vf

(a)

Vo

(b) The frequency of oscillations

(c) The minimum gain of the source follower required for oscillation.

VDD

R

+

C

R

Vf

C RS

R

–

C VSS

–

Vo +

+ –

Figure P (5.1)

At the end of this unit you will be able to learn about the

Unregulated power supplies

Rectifier circuits

Different rating of diode

Filters

Voltage regulation

Zener diode as voltage regulator

Transistor voltage series and shunt regulators

Load regulation

AC power is easily produced in bulk form through different methods, but generally in

many power control circuits and other industrial applications dc power is very much

required. Hence ac power necessarily has to be converted into dc power by means of

electronic rectifier which is simple cheaper and highly efficient compared to rotatory con-

verters or motor generators. The rectifier which converts ac voltages and currents into dc

voltages and current produces output in pulsating nature. It consists of dc components and the

unwanted ripple components which can be removed by using filter circuit. The output dc thus

obtained will be steady dc voltage and magnitude of dc voltage can be varied by variation of

ac voltage magnitude or the value of load current.

In certain applications dc to dc conversion is required such a power supply unit that

converts dc into ac or dc is called Switched Mode Power Supply (SMPS).

A block diagram as shown in Figure 6.1 containing the parts of a typical power supply at

various points. The ac voltage, typically 120–130 V rms, is connected to a transformer, which

steps up ac voltage for the desired dc output. A diode rectifier that provides a full-wave

rectified voltage that is initially filtered by a simple Capacitor Inductor Filter to produce pure

dc voltage. Now, this resulting dc voltage usually has some ripple or ac voltage variation. A

regulator circuit can use this dc input to provide a dc voltage that not only has much less ripple

voltage but also remain the same dc output voltage even if the input dc voltage varies somewhat

or the load connected to the output dc voltage changed.

Input

A.C.

Constant

dc output

t t t t t

Regulated power supplies are an integral part of all electronic devices and circuits. Devices

like diodes, transistors, Integrated Circuits (ICs) etc., require a fixed dc voltage for their

proper function.

One way to provide a constant dc voltage to such devices is through cells or batteries

(the combination of several dry cells), but these are much more costlier to conventional regulated

dc power supplies. The domestic ac supply can be converted to dc supply via a regulated power

supply system.

The essential elements of a fixed dc supply system are as under :

1. Rectifier

2. Filter

3. Voltage Regulator

A rectifier is a diode circuit which facilitates the ac current to flow only in one direction.

A single-diode rectifier circuit cuts off the negative portion of the ac current and allows only

one positive portion of the signal. This operation can be termed as Half-Wave Rectification

(HWR). Similarly, for both parts of the cycle, we require a two diode rectifier circuit. The

output waveform of a Full Wave Rectifier (FWR) can be shown as below :

ac signal

FWR

Pulsating dc

Figure 6.2 Waveform of Full wave Rectifier.

The output of a Full Wave Rectifier (FWR) is fedback to the filter circuit for removal of

the ripples present in the dc output. The dc output or full wave rectifier with ripples is

referred to as pulsating dc.

This pulsating dc works as an input signal for a filter circuit. A filter is a frequency

selective device which smoothens the ripples of the pulsating dc. The output waveform of a

filter is shown in Figure 6.3:

Filter

circuit

Almost

smooth dc

Figure 6.3 Waveform of a filter.

Although the output of filter is not the pure dc, yet it can be thought of fixed dc output

that can be given to any load-circuit.

Although, generation and transmission of power is done in alternating from (i.e., ac power),

however, there are many applications where we require a low level constant power supply

i.e., Direct power (dc voltage or current). Now, it is requirement of such a circuitary which

can transform ac power into dc power. For this purpose we usually use rectifier circuits.

In simple words rectifiers are nothing but the devices having capability of ac to dc

conversion.

Broadly rectifier circuits are classified into two categories. This classification is based

upon the fact that which portion (positive or negative or both) of all sinusoidal ac signal is

used. Rectifiers are the electronic circuits which employ the most fundamental property of

the diode, i.e., property of rectification (to allow the current to flow only in one direction)

for their functioning. Besides diodes, transformers are also used to step down the incoming

ac signal.

(b) Full wave rectifier (FWR).

(a) Half wave rectifier : Half wave rectifier circuits are those in which only half cycle

of ac signal either positive or negative sinusoidal wave is converted into dc.

We use one diode for half wave rectification. When this diode is forward biased, positive

half cycle appears across the load. When this diode is reverse biased, negative half-cycle

appears across the load.

Circuit diagram and operation of half-wave rectifier circuit : Here vi is the input

voltage.

+ – v1 = Vm sin t

+ +

D Vm

vi R vo

O T/2 T t

– – 1 cycle

The following diagrams clearly illustrates the conduction and non-conduction regions of

the diode used in half-wave rectifier circuit.

D

+ – S.C.

+ + + + vo

Vm

vi R vo v1 R vo = vi

t

– – – – o T/2

From the above diagrams, we can say that when crystal diode D is forward based, diode

conducts and offers zero forward resistance (idealy). In another figure it is shown as a short

circuit. In this mode of operation, positive half cycle of the input signal vi = Vm sin t

T

appears across the load as output. Thus, the conduction takes place for t = 0 to .

2

T

For t = to T, the diode remains reverse-biased and does not conduct. This is shown as

2

below :

+ – O.C.

– – + vo

vi R vo vi R vo = oV vo = OV

t

+ + – o T/2

In above diagrams, the polarity of the impressed input signal has changed now i.e.,

diode D is in reverse biased condition. As we know that in reverse mode diode offers ideally

infinite resistance. In above diagram it has shown as open-circuit. The result is the absence of

T

a path for charge to flow and v0 = (0) R = 0 V, because i = 0 for the period to T. Thus,

2

we can say that half-wave rectification can be referred to as a process of removing one half of

the input signal.

PIV (PRV) Rating of a diode in half-wave rectifier circuit

The knowledge of peak inverse voltage or peak reverse voltage of diode is needed before

designing a rectifier circuit. The PIV of a diode can be defined as the voltage level that must

not be exceeded in the reverse-bias region. In other words the PIV is the maximum voltage

that a diode can withstand in reverse bias mode before getting damaged.

The determination of PIV rating for the diode in case of a HWR can be proceeded as

follows :

– V (PIV) +

– –

Vm R Vo = IR = (0) R = 0V

+ +

Figure 6.7

PIV Rating = Vm for HWR.

(b) Full wave rectifier : In order to attain hundred percent rectification and utilize both

positive and negative portions of the impressed signal, we use full wave rectifier. The diodes

used in these circuits are so connected that for whole cycle, the circuit remains conducting

and we get a rectified output for both portions of the ac cycle.

There are two classes of full wave rectifier circuits :

1. Bridge network

2. Center tapped transformer.

1. Bridge network

This is the most widely preferred full wave rectifier circuit. The configuration utilizes four

diodes connected in the form of a bridge network. Because of this arrangement of the diodes,

this rectifier circuit is often called as a bridge rectifier.

Circuit diagram and operation of a Bridge Rectifier

+

D2

D1

– v0 +

vi

R

D3 D4

–

Figure 6.8 Full wave bridge rectifier.

T

Conduction path and operation for t = 0 to :

2

T

The resulting polarities of the diodes D1, D2, D3 and D4 for t = 0 to is shown as below :

2

+

+ + ‘on’

‘off’

– –

– v0 +

vi

R

+ +

‘on’ –

– ‘off’

–

T

Figure 6.9 States of the diodes for t = .

2

T

For t = 0 to , D2 and D3 are forward biased so they conduct and are nominated as ‘on’

2

state diodes. While at the same time D1 and D4 are in the ‘off’ state because of reverse biased

condition.

As we have assumed that the diodes are ideal i.e., they don’t obsorb voltage before

conduction, the voltage across the load i.e., output voltage is equal to the vi the impressed

signal.

Following diagram better describe the conduction path of the network for positive half-

cycle.

+ vi = Vm sin t

vi

Vm O.C. S.C.

vO

Vm

o t vi

T/2 – v

t

O T/2

S.C. O.C.

–

Figure 6.10 Conduction path for the positive portion of the input signal.

T

Conduction path and operation for t = to T.

2

T

In case of negative half-cycle i.e., for t = to T, diodes D1 and D4 are now forward

2

biased so they conduct while D2D3 are at the same time in reverse biased condition and they

do not conduct and remain in off state. The most important point here is to be noted that the

polarity of the load resistor R is not changed. The conduction path and operation is more

clearly understood by studying the following diagram :

–

v1 = Vm sin t vo

S.C. O.C.

vo

vi Vm

o – R +

t O.C. o t

T/2 T S.C. T/2 T

Vm +

Figure 6.11 Conduction path for negative portion of the impressed

T

signal i.e., for t = to T.

2

Now, combining these two subportions of the operation, we get the 100% rectified

output by using a bridge network as shown in Figure 6.12.

vi vo

Vm + +

vi FWR Vo

o t o t

– –

Vm

Figure 6.12

The determination of the peak inverse voltage in case of Bridged FWR can easily be

understood by examining following circuit diagram :

–

PIV

R

vi

– V +

m

+

Figure 6.13 PIV determination of the diode in bridged FWR.

Applying KVL in the loop marked by arrow in above circuit diagram, we get

PIV > Vm

Advantages of full wave Bridge rectifier network

A bridge rectifier has the following advantages :

It can be used in the applications where output terminal is ungrounded.

The transformer is less costlier as it is required to provide only half the voltage of an

equivalent center-tapped transformer used in a FWR circuit.

No center tap is required on the transformer.

Disadvantages of full wave Bridge rectifier network

It has got only disadvantage that it uses four diodes as compared to two diodes used in

case of center tapped full wave rectifier. This disadvantage of bridge rectifier can be justified

by using low cost sophisticated silicon diodes. Since, its PIV rating is one half of a center-

tapped FWR,

2. Center tapped Transformer full-wave rectifier circuit

Another class of full-wave rectifier other than bridge network is center-tapped transformer

full-wave bridge rectifier. The improvement over previous full-wave rectifier of this con

figuration is that it utilizes only two diodes for its whole operation. But at the same time, a

drawback, has been introduced that this configuration requires a (Center-tapped trans-

former).

Circuit diagram and operation of the center tapped transformer full-wave rectifier

circuit

1:2 D1

vi = Vm sin t + +

vi

Vm vO

–

vi

+

o t + R –

vi

– –

D2

The above diagram uses a centre tapped transformer and two diodes D1 and D2. The

circuit remains conducting for both portions of the impressed signal. For positive half-

cylcle, diode D1 conducts while D2 remains off. For negative half-cycle, diode D2 conducts

and at the same time D1 remains off. Thus, for whole cycle current flows in same direction

through the load resistor R the circuit behaves as a full-wave-rectifier.

S.C.

+

vi Vm vo

+

Vm – Vm

C.T. – vo +

vi

o t + R

T/2 t

O T/2

– Vm

– – +

O.C.

During the positive half-cycle diode D1 assumes ideally short circuit condition and that

D2 assumes ideally short circuit condition and that D2 assumes almost open-circuit condition.

The current flows through load resistor R from + to – terminal.

S.C.

– – +

vi vo

– Vm

C.T. – vo +

+ m

T

o t vi – R t

T/2 O T

T/2

Vm +

Vm

+

S.C.

Figure 6.16 Network conditions for the negative region of vi.

During the negative portion of the input the network conditions are assumed as men-

tioned in above circuit diagram. Here, again it is noteworthy that the polarity of the load-

resistor is not altered and the current flows again from + to – terminal through the load

resistor R.

The net-effect of the both parts of the circuit operation can be mingled up now as follows :

vi vO

+ +

vi vO

o t o t

T/2 T – – T/2 T

Input wave form Center tapped transformer full wave rectifier Output waveform

Figure 6.17

PIV determination of the center tapped transformer full wave rectifier

Peak inverse voltage in case of for center tapped transformer full wave rectifier can be

investigated clearly in the following circuit diagram :

– PIV +

–

–

Vm

+ – R +

vi

–

Vm

+

Figure 6.18

Applying KVL in above marked loop,

PIV = Vsecondary + VR

= Vm + Vm = 2Vm

PIV(CTT) >2Vm

Advantages of Center tapped full wave rectifier

Following are the advantages of center tapped full-wave rectifier :

In comparison to a half-wave rectifier, the output dc voltage and current are doubled in

case of center tapped transformer full wave rectifier.

Ripple factor gets reduced in context of half-wave rectifier.

Disadvantages of Center tapped full wave rectifier

Following are the disadvantages of center tapped full-wave rectifier :

The output voltage is half of the secondary voltage.

The peak inverse voltage (PIV) of a diode is twice that of the diode used in the half wave

rectifier.

It is practically difficult and rather more expensive to construct an accurate center-tapped

transformer which may produce equal voltages on each of the secondary winding.

Important Characteristic Terms Involved in Half-wave and Full-wave Rectifier Circuits

Following terms must be clearly understood before designing and rectifier circuits.

1. Average values of output voltage and load current :

For a half wave rectifier

For a half-wave rectifier the average value of voltage (V dc) is defined as

Area under the curve over the full cycle

Vdc =

Base

Considering following output voltage waveform for a half-wave rectifier.

Vm Im

(i2)

O/P 0.318 Im

Voltage 0.318Vm load

(vo) Vdc Current Idc

O 2 3 O 2 3

= ( t) t

Figure 6.19 Average values of output voltage and current in load. In half wave rectifier.

Im = Maximum value of load current.

Vdc = Average or dc value of output voltage across the load.

Idc = Average or dc value of load current.

Obviously the output exists only for 0 to , so that

Vdc =

z

0

2

d

=

2

1

z

0

Vm sin d

Vm

= 1 cos 0

2

V

= m [– cos – (– cos 0)]

2

Vm

= [+ 1 – (– 1)]

2

V

= m = 0.318 Vm.

From above expression, we can say that the average value for Vdc of a HWR is 31.8% of

its maximum output voltage.

In order to find average value of dc current through load, we have

Idc =

Vdc V I

= m = m

RS I V UV

RL RL T RL W

Similar expression is obtained for Idc also.

Note : Upto now we have assumed that in case of forward bias, diode acts as an eventually

short-circuit but in actual practice it is not so. The diode offers a small magnitude resistance in

forward, bias condition too. This is known as diode forward resistance, rf.

If this rf is introduced in the loop equations, we get an improved values for V dc and Idc as

under :

Vm

Vdc = I dc rf

Vm

Idc =

dr f RL i

If we introduce the secondary winding resistance (if the input is given through trans-

former) of the transformer, then

Vm

Vdc = – Idc (rf + RS)

Vm

Idc =

dr f RS RL i

where RS is the resistance of the secondary winding of the input-transformer.

For full wave rectifier

Considering following output waveforms :

Load Current (iL)

O/P Voltage (vO)

Vm I

0.636 Vm 0.636 Im

Vdc Idc

O O

t t

Figure 6.20 Average values of output voltage and load current in a full-wave rectifier.

Vdc =

Base

=

z0

.d

=

z 0

Vm sin d

=

2Vm

= 0.636 Vm

From above expression, it is clear that the average value of the voltage output of a full

wave rectifier is 63.6% of its maximum value and which is double as obtained in case of a

half wave rectifier.

Similarly,

Vdc 2Vm

Idc = = 0.636 Im

RL RL

This expression also indicates that the average value for load current in twice that

obtained in case of half wave rectifier.

Taking into account, previous two cases. We have following expressions for a FWR

2Vm

Vdc = d

I dc rf RS i

2I m 2 Vm

Idc =

d rf RS RL i

2. Frequency of output

The following waveforms clearly depict the effect of rectification on input frequency.

vi vo HWR vo

FWR

o t t t

2 o 2 3 o 2 3

Figure 6.21 Frequency of output in HWR and FWR.

From Figures 6.21 we conclude that the frequency of HWR output is the same as of its

input.

i.e., fout = fin

But, frequency of full wave rectifier output gets doubled as of its input frequency

fout = 2fin

3. Ripple factor

As we know that the output of any rectifier circuit is always a pulsating dc. The dc output

contains some ripples (i.e., unwanted ac component).

The usefulness and effectiveness of a rectifier is inversely proportional to the ripple

contents present in its output. Smaller the amount of ripple, more accurate and effective will

be the rectification and so the rectifier.

In order to have a mathematical approach, we define a factor responsible for the amount

of ripples present in the output.

The r.m.s value of ac content of the output sinusoid

Ripple factor, =

The dc component of output sinusoid

Vrms I

= = rms

Vdc I dc

where,

Vrms = The mean square value of the ac component of the

ouptut voltage.

Vdc = The average or dc value of the output voltage.

Irms = The root mean square value of ac component of

current.

Idc = The average or dc value of the output or load current.

The r.m.s. value of the rectified load current.

Dividing above equation on both sides by Idc, we get

I rms

=

I 2dc I 2r rms a f= 1

FG I armsfIJ

r

2

I dc I dc H I Kdc

a f

I r rms

=

FG I rms IJ 2

1

I dc HI dc K

or =

FG Irms IJ 2

1

HI dc K

4. Efficiency

The efficiency of a rectifier circuit is defined as the ratio of output power delivered to the

load to the input power impressed by the sinusoid to be rectified. It is denoted by Greek term

(Eta).

Pout I2 R

= = 2 dc L

Pin I rms rf R L d i

Where each terms has as usual meanings, knowing the value of I dc and Irms we can

calculate the efficiency for HWR and FWR.

5. Transformer Utilization Factor (T.U.F.)

Transformer utilization factor is defined as the ratio of dc power delivered to the load to

the rated ac power of the secondary of the transformer.

Mathematically, it can be expressed as,

dc power delivered to the load

T.U.F. =

ac rating of the transformer secondary

Pdc

=

a

Pac rated f

The prior knowledge of T.U.F. is necessary for designing a rectifier circuit and for the

sake of safety purposes.

6. Form Factor

Form factor is defined as the ratio of r.m.s value of output sinusoid (either voltage or

current) to the average value of the output sinusoid (either voltage or current).

Mathematically,

Vm

Form factor =

V rms

=

2 a f

= = 1.11

Vdc 2 Vm 2 2

Vm 2Vm

{ For FWR Vrms = and Vdc = }

2

7. Peak factor

In the similar manner, peak factor is defined as the ratio of the peak value of the output

sinusoid to the r.m.s value of the output voltage.

Mathematically,

r.m.s value of output sinusoid

Vm

= = 2.

Vm

2

Comparision of Various Rectifier Circuits

In the previous sections, we have studied about the various types of rectifier configura-

tion. We also have derived useful expressions and got familiarized with useful terms defining

the characteristics of the rectifiers. In this section, we represent all these deductions in a

tabular form to have a clear and quick review of all the necessary requirements for the

rectifier circuits.

Rectifier (HWR) Bridge Network Center Tapped (CTT)

1. Diodes used 1 4 2

2. Transformer No need of No need of Center tapped

used transformer transformer transformer is

primary

requirement.

3. PIV Vm Vm 2Vm

4. Ripple factor ( ) 1.21 0.482 0.482

5. Efficiency ( ) 0.406 0.812 0.812

Vm Vm Vm

6. Maximum value

dr f RL i d2 r f RL i dr f RL i

Im 2I m 2I m

7. dc current (Idc)

8. Output frequency fin 2fin 2fin

(fout)

9. Form factor 1.57 1.11 1.11

10. T.U.F. 0.287 0.812 0.693

11. Peak factor 2 2 2

Example 1. Determine the output waveform for the network of Figure 6.22 and calculate

the output dc level and the required PIV of each diode.

+

Vi

D2

20 V D1

– V0 +

Vi

o t

T/2 T 2k

2k 2k

–

Figure 6.22

Sol. The network shown in Figure 6.22. Since all the resistances of the same value here,

therefore the output will be same for both positive and negative cycle. For positive half cycle

diode D2 conduct while D1 does not now for easy to understand we will drew its equivalent

circuit as shown in Figure 6.23.

+ +

Vi A

O.C S.C. +

20V

k

– Vo –

+

Vi Vi Vo k

o 2k

T/2

2k k

2k

B

– –

Figure 6.23 Network.

2 2

v0 = VAB = 20 = 10 V

2 2 4

PIV for each diode = Vm, i.e., is equal to the maximum voltage across R (i.e., 2 k ),

which is 10 V. Ans.

Example 2. A half wave rectifier uses a diode with an equivalent forward resistance of

0.3 kW. If the input ac voltage is 10 V (rms) and the load is a resistance of 2.0 W, Calculate

Idc and Irms in the load.

Sol. Given that : Vrms = 10 V

rf = 0.3

RL = 2.0

So, Vm = 2 Vrms = 10 2 V

Peak value of current in load, Imax or Im

Vm 10 2

= = = 61.5 A

R L rf 2 0. 3

Im 6.15

dc output current, Idc = = = 1.958 A

Im 6.15

Irms =

= = 3.075 A.

2 2

Example 3. The circuit shown in Figure 6.24 calculate current over one period of the

input voltage. Assuming that the diodes to be ideal.

2 A 2

D1 D2

cos t 2 sin t

Figure 6.24

Sol. From Figure 6.24, it is clear that both the diodes are in forward biased because both

smt and cost are positive.

To calculate value of current over one period of the input signal first of all we will draw

its equivalent circuit (assuming ideal diode). Applying KCL at node. A,

2 A 2

+ +

2 sin t

cos t

– –

i

Figure 6.25

KCL at node A

VA cos t VA sin t VA 0

=0

2 2 2

T2 2 2 W 2 2

V =F

sin t cos t I

A

H 3 K

i=

V asin t cos tf

A sin t cos t

A.

2 3.2 6

Example 4. What is the ripple 5 V on average of 50 V ?

Sol. Given :

Vav or Vdc = 50 V

Vrms = 5 V

We know that ripple factor,

Vrms 5

= = = 0.10. Ans.

Vdc 50

(i) Maximum power rating

(ii) Peak inverse voltage rating (PIV)

(iii) Maximum forward current rating.

(i) Maximum power rating : Maximum power rating of a diode is defined as the

maximum power that a pn-junction (or diode) can dissipate without damaging it is called its

maximum power rating.

Usually, maximum power rating in specified by the manufacturer in its data sheet. The

power dissipated at the junction is equal to the product of junction current and the voltage

across the junction. If the power developed across the junction is more than the maximum

power dissipated by it, the junction will be overheated and may be destroyed.

(ii) Peak inverse voltage rating (PIV) : Peak inverse voltage rating of a diode may be

defined as the maximum value of reverse voltage that a pn-junction (or diode) can withstand

without damaging it is called the Peak Inverse Voltage rating (PIV) of a diode.

This rating of a pn-junction or diode is also specified by the manufacturer in its data

sheet. However, it may be noted that here if we increase the voltage across the junction at

reverse bias condition beyond this specified value, the junction will be destroyed.

(iii) Maximum forward current rating : The maximum forward current rating of a

diode may be defined as the maximum value of forward current that a pn-junction or diode

can carry without damaging itself called its maximum forward current rating of a diode.

Need of Filters

Upto now we have discussed about the rectifier circuit. As we have seen that the output

of any rectifier circuit is not purely dc The output is pulsating in nature because of ripples

present with the dc output. The ripples are unwanted ac signals which is not removed before

applying to the load produces distortions in the form of hum, so in order to get a smooth dc

output for perfectly operating to any electronic circuit we require an extra circuit between

rectifier output and load. Thus, we can state that filters are the devices which convert

pulsating dc output of a rectifier to steady dc level.

V

Filter

Circuit

Rectifier

t

output Filter output

(Pulsating dc)

dv

Ideally pure dc i.e. =0

dt

Figure 6.26 Block diagram representation of filter.

Before discussing the different types of filters it is very important to know about the

main components used in the filter circuits i.e., Inductor and capacitor.

Usually all filter circuits employ inductors or capacitors or both as basic frequency

selective components. Depending on the arrangement of these component with respect to

load, filters have been classified in following categories :

(i) Shunt capacitor filter

(ii) Series inductor filter

(iii) Choke input or L-section filter

(iv) Capacitor input or -section filter

The block diagram showing the function of filter is shown in Figure 6.26.

Role of an Inductor in Series and a Capacitor in Shunt in Filter

Inductor : The term inductance may be defined as the opposition offered by the

magnetic field of an inductor (an inductor is just a choke i.e., a coil having large number of

turns with small resistance wound). The resistance offered is called inductive reactance. Its

value can be calculated by using the relation ;

XL = 2 f L

where L = Inductance of choke in Henry

f = Operating frequency in Hertz

from the above relation (i.e., XL = 2 f L) it is clear that, for dc, the value of inductive

reactance is zero, because for dc, f = 0 (i.e., XL = 2 . 0 . L = 0) and hence it provides a

least resistance path to dc component. However, for ac the value of inductive reactance is

high. It means it provides high opposition to the a.c. components and blocks it.

Thus, an inductor is connected in series with the circuit so that it blocks the ac compo-

nent and provides an easy path to the dc component to reach the destination (i.e., load).

Capacitor : The term capacitance may be defined as the opposition offered by a

capacitor due to electric field. (Generally, an electrolytic capacitor at large capacitance in

used in the filter circuits). The resistance offered is called capacitive reactance and its value

is determined by the relation.

1

XC =

2 fC

1

Therefore the value of XC, for dc (i.e., XC = = ), and hence it provides

2 .0 .C

very high impedance (i.e., as open circuit) for dc. However, it provides an easy path (low

impedance) for ac. Thus, a capacitor is connected in parallel to the circuit so that it bypasses

the ac component and blocks the dc component to reach at the load.

Approximate Analysis of ripples in shunt capacitor filter : From Figure 6.27, it is

clear that the total change in output voltage is equal to Vr, the ripple component of output

voltage. The average or dc value of output voltage, Vdc is almost between the peak value

VL max and the minimum value between any two consecutive point of Figure 6.27 as given by

the relation.

Vr

Vdc = VL max –

2

The total change lost during non-conduction (or discharge) duration T2 through load is

given as

Qdischarge = Idc . T2

This charge is filled up again during time interval T1 in which voltage across the

capacitor increases to Vr volts. So change gained by capacitor.

Qcharge = CV r

However, in steady state,

Qcharge = Qdischarge

or CVr = Idc T2

I dc . T2

or Vr =

C

I dc T2 R|Since T T

1 2

Vr =

fC S|So T T = 1

T 2

f

Thus, the relation may be written as

I dc

Vdc = VL max for FWR

2fC

I dc

and Vdc = VL max for FWR

4fC

The ripple factor for half wave rectifier

1

=

2 3 f CR L

The ripple factor for full wave rectifier

1

=

4 3 f CR L

is quite large depending upon the value of RL, because it discharges through load resistance

RL.

For specified ripple the required values of a capacitor can be given by equation

1

C

4 3 f RL

The function of the capacitor filter may be understand in terms of impedances. The large

value capacitor C offers a low impedance shunt path to ac components or ripples. However

offers high impedance to the dc component. Due to this reason ripples get by passe through

capacitor C and only dc component flows through the load resistance.

As we know that choke filter is not suitable for half wave rectification. However, this

problem is overcome by using shunt capacitor filter because this filter is based for both half

wave as well as full wave rectification. Capacitor filter is very popular because of its low

cost, small size light weight and good characteristics.

IC IL b d f h

VLmax

Vr

Rectifier VLmin

C RL VL Vdc

Output a c e g

o 2 3 4 t

(a) Circuit diagram

(a) Circuit diagram ed(b)

(b) Rectifian Rectifiedd and filtered

filtered output

output voltage w ave

voltage wavefor m for fullwave rectifier with shunt capacitor filter.

Advantages of filter

Following are the advantages of filter :

It can be used for both half wave as well as full wave rectifier circuits.

The magnitude of output dc is improved because of charging and discharging the

capacitor.

Disadvantages of filter

Since capacitor itself draws heavy current from the rectifier circuit, a small load can be

applied with this filter circuit.

In other words we can say that for heavy load filtering will be poor and ripples will be

more. The relation between ripple factor ( ), load resistance RL and frequency are given

below.

RL

=

3 2 L

where RL = Load resistance

= Angular frequency

L = Inductance.

From above relation it is clear that ripple factor decreases with the decrease in R L (or

increase in load current IL). So inductor works more efficiently for small load or high load

current.

(i) Shunt capacitor filter : This is the most simple form among all the filters circuit and in this

arrangement a high value capacitor C is placed directly across the load terminals as illustrated

in Figure 6.27. During the conduction period capacitor gets charged and stores up energy in

the electrostatic field and discharges through the load resistance RL during the non-conduc-

tion period. In this process, the time duration during which current flows through the

load resistance gets prolonged (tedius) and ac component or ripples get considerably

reduced. Here it is very interesting to note that the capacitor C gets charged to the peak

value of input voltage quickly because charging time constant and is almost zero. It is so

because there is no resistance (except the negligible forward resistance of diode) in the

charging path.

(ii) Series inductor filter : Circuit diagram of series inductor filter is shown in figure 6.28

(a). In this arrangement (filter) a high value inductor (choke) L is connected in series

with the load resistance and rectifier supply (output). Due to the unique property of

inductor, its filtering action depends upon its property of opposing any change in the

current flowing through it when the output current of the rectifier increases above a

certain value, energy is stored in it in the form of magnetic field and energy is given up

when the output current falls below the average value. So, placing a inductor in series

with the rectifier output and load, any sudden change in current that might have occured

in the circuit without an inductor is smoothed out by the presence of the inductor L.

We know that the choke offers a high impedance to the ac component, but offers almost

zero resistance to the derived dc components. Thus, ripples are removed upto a large

extent. Nature of the output voltage without filter and with choke filter are shown in

Figure 6.28 (b).

L Vo

+ Output Output with

without filter choke filter

VLmax

Rectifier RL VL

(Output)

Output

2

Vdc VL max

–

t

(a) Circuit diagram of

series inductor filter (b) The output voltage waveforms

(iii) Choke input or L-section filter : Up to now we have studied about simple series

inductor filter and simple shunt capacitor filter. The former reduces both the peak and

effective values of the output current and output voltage while the later reduces the ripple

voltage but at the same time increases the diode current which may cause the diode to be

damaged. So, individual application of these filters in the power supply system adds

certain disadvantages.

In order to avoid the drawbacks of these two filter circuits and to add up their advan-

tages, another type of filter is introduced which is referred to as the choke input or L-section

filter. Figure 6.29 illustrates the arrangement of combination of inductor and capacitor in the

filter circuit.

L

+ +

IC IL

Rectifier VL

C RL

output

– –

The circuit diagram in figure 6.29 consists of a inductor in series and capacitor in shunt

with a load RL. The name L-section of this filter circuit has been derived from the basic ‘L’

shaped structure of the circuit.

The input is fed through the inductor so it is also known as the choke – input filter. Here,

the inductor plays its role as a current smoothing element and capacitor as the voltage

stabilizing element.

Here, it is notable that several L-section in cascade can be connected in order to get more

smooth filter output.

The choke L on the input side of the circuit easily allows dc to pass (2 f L = 0 for dc)

but restricts the ac components to flow. Now, if any component of ac i.e., pulsating dc is

still present then it is effectively by passed by the capacitor in the shunt ( XC < RL) because

current takes minimum resistance path. In actual practice we can’t get pure dc across the load

because some ripples have not yet been filtered, however, in most of the application it is

practically avoidable. The rectified and filtered output for a L-section filter is given in

Figure 6.30.

From Figure 6.30 we can see that the filtered output starts traversing from zero instant

and readily goes towards negative side i.e., below the constant dc level output. The reason

behind this phenomenon in that the shunt capacitor when charges, takes the voltage from the

dc level and the filtered output is diminished. When capacitor discharges during its opera-

tion, it adds up the current to the load RL and voltage level gets slightly increased.

VL

Rectified output

Filtered output

VLmax

Vdc

t

o 2 3

Figure 6.30 Rectified and filtered output voltage waveform for FWR for L-section filter.

The expression for ripple factor for choke input filter can be expressed as

Vac rms 2 XC

Ripple factor, = =

Vdc 3 XL

2 1 1 1

= . 2

3 2 C 2 L 6 2 LC

(iv) Capacitor input or -filter : In this class of configuration the output from a rectifier is

first fed across the capacitor and named as capacitor input filter. The circuit diagram for

capacitor input filter is given in Figure 6.31.

L

+ +

IL

Rectifier VL

C1 C2 RL

output

– –

Figure 6.31 consists of a shunt capacitor C1 at the input terminal. An induction L in them

connected to C1 in series. This inductor L is again shunted by another capacitor C2 and

finally load is connected across the C2. This type of arrangement of filter circuit is often

referred to as -filter just because of its shape which resembles to the symbol .

The most important feature of this filter is that it can be used for a half wave rectifier

circuit because rectifier output is directly connected to the capacitor.

In general, both the capacitors are confined in a single metal container and the metal acts

as a common ground for both the capacitors.

It is notable here that in filter circuits we employ electrolytic capactiors.

The main filtering action is performed by the input capacitor C1 in this case. The filtering

action of capacitor used not to be explained again because it has been given in detailed in the

beginning of this article. If any ripples are still present in the output C 1, series inductor L and

shunt capacitor C2 again smoothern the output and a desirable destabilized dc output gets

associated with the load. The main disadvantage of -filter is that the output voltage of -filter

falls off rapidly with the increase in load.

In a -filter ripples are less in comparison to shunt capacitor or L-section filter.

A -filter requires an inductor of relatively low magnitude than that used in L-section

filter.

Voltage regulation in case of -filter is poor, so -filters are generally employed with

fixed loads, while L-section filters suit better for varying loads.

PIV is larger in case of a -filter than in case of L-section filter.

Current and therefore voltage regulation for this filter circuit is usually poor.

The rectified output and filtered output in case of capacitor input filter is as given in

Figure 6.32.

VL

Filtered output

Rectified output

VLmax

t

o

Figure 6.32 Rectified and filtered output voltage waveforms for a full wave rectifier

with capacitor input filter.

Vac rms 2 I dc X C1 X C2

Ripple factor, = { Vdc = Idc . RL}

Vdc Vdc X L

2I dc X C1 X C2

=

I dc R L X L

2X C1 X C2

=

RL XL

2 1 1 1 2

or = . . 3

RL C1 C2 L C1 C2 LR L

Comparison between L-section and -filter

-filter provides better dc output voltage than that obtained in case of L-section filter

under similar input conditions.

Example 5. A full wave rectifier has a peak output voltage of 25 volt at 50 Hz and feeds

a resistive load of 1 k . The filter used is shunt capacitor one with C = 20 F. Determine :

(i) dc load current.

(ii) dc output voltage

(iii) ripple voltage

(iv) ripple factor.

Sol. Given,VL max =25 V {Neglecting the resistances of diode and transformer secondary}

Load Resistance, RL = 1 k

Shunt capacitance, C = 20 F

Supply frequency, f = 50 Hz

We know that from the relation,

I dc

Vdc = VL max – {For F.W.R.}

4 f .C

I dc

(i) or Idc RL + = VL max

4fC

FG

or Idc 1000

1 IJ = 25

H 4 50 20 10 6

K

25 25 3

or Idc = 20 10 A . Ans.

1000 250 1250

(ii) dc output voltage Vdc = Idc RL

= 20 mA 1k

= 20 V. Ans.

I dc 20 10 3

(iii) Ripple voltage, Vr = = 6 = 10 V. Ans.

2 fc 2 50 20 10

Vr

Vac rms 2 3 10

(iv) Ripple factor, = = 0.144. Ans.

Vdc Vdc 2 3 20

RS Vac rms

Vr UV

T 2 3 W

Example 6. Design a filter for full wave circuit with LC filter to provide an output voltage

of 2.5 V with a load current of 100 mA and its ripple is limited to 3%.

Sol. Design of filter means to calculate the value of L and C used in LC filter.

Given that, VL = 25 V and IL = 200 mA

VL 25 V

So load resistance, RL = = 125

IL 200 mA

We know that ripple factor for a LC filter is given by

1

=

2

6 2 LC

Given that, = 3% = 0.03

1

0.03 =

6 2 a2 f f 2

LC

1

0.03 = 2

{ f = 50 Hz}

6 2 4 50 2 . LC

1 1

LC = ...(1)

0.03 836614.8 25098.4

We know that,

RL RL

L= =

3 3. 2 f a f

125

or L =

3 2 314

. 50

or L = 0.1326 H. Ans.

1 1

C= = 300.25 F. Ans.

0.1326 25098.4 3330.46

Example 7. (a) Find the output voltage, current and ripple for the circuit shown in

Figure 6.33.

(b) What is the maximum value of RL ?

50 mH

1000 F RL = 5

15 Vrms

50 Hz

Figure 6.33

2 Vm 2 2 Vm 2 2 15

(a) Vdc = = 13.5 V

Vdc 13.5

Idc = = 2.7 A

RL 5

1 1 1

=

6 2 2

LC 6 2 2 fa f 2

LC 6 2 314a f 2

0.50 10 3

1000 10 6

1

= = 0.024. Ans.

41.83

(b) Peak ac current through inductor

Vm 15 2 15 2

Im 3

XL 2 fL 2 3.14 50 50 10

1.35 A.

Minimum dc current to avoid spiking (IL min) = 1.35 A

Vdc 13.5

RL max = = = 10 . Ans.

I L min 1.35

Example 8. A single phase full wave rectifier makes use of -section filter with two 10 F

capacitors and a choke of 104 H. The secondary rms voltage is 280 V with respect to centre

tap output. If the load current is 100 mA, determine :

(i) Vdc

(ii) Percentage ripple assume supply frequency of 50 Hz

Sol. Given : Vrms = 280 V

VL max = Vm = 2 Vrms = 2 280 = 396 V

Load current, Idc = 100 mA

C1 = C2 = 10 F

f = 50 Hz

(i) From relation, we know that :

I dc

Vdc = VLmax

4fC

100 10 3

= 396 – 6 = 346 V. Ans.

4 50 10 10

(ii) Ripple factor in case of -section filter is given by the relation

2

= 3

8 C1 C2 LR L

=

2 RSR Vdc 346 UV

a

8 2 . 50 f 3

10 10 6

10 10 6

10 10 6

3460 T L

I dc 0.1 W

= 3460

= 0.00165

or Percentage ripple = 0.165%. Ans.

As we know that for optimum functioning, the inductor should have a minimum current

flowing at all times. However, if the current through the inductor falls below this minimum

value, the output voltage rises sharply, resulting the voltage regulation becomes poor. So, in

order to provide this minimum current through the choke, a bleeder resistor R B is usually

connected in the circuit parallel with the load resistor RB.

Bleeder resistor works in such a manner that, even if load resistance R L becomes open

circuit the bleeder resistor RB maintains the minimum current necessary for optimum inductor

operation. In other case if the load resistance RL is very high, it provides a minimum resistance

equal to the parallel combination of load resistance (RL) and bleeder resistor RB. Usually in the

case of very high load resistance the equivalent resistance will be approximately equal to the

bleeder resistance ( RB || RL RB when it is assumed that RL >> RB). The bleeder resistor

can serve a number of other functions as well. It improves the voltage regulation of the

supply and it also serves as a discharge path for the capacitor, so that voltage does not remain

across the output terminals after the load has been disconnected, and the circuit de energized.

It is a common practice to place a bleeder resistor RB at the filter output as shown in

following circuit diagram of Figure 6.34.

L

+

Output from RL VL

C

rectifier RB

–

Figure 6.34 Bleeder resistor placed at the filter output.

The purpose of inserting a bleeder resistor at the load terminal lies in following advantages :

It maintains the minimum current necessary for optimum operation of the inductor.

It improves voltage regulation of the supply by acting as preload on the supply.

It provides safety to the persons handling the equipment, by acting as a discharging path

for capacitors.

The rectifier is the first element of a dc power supply, the filter is the intermediate stage and

the voltage regulator is the last element. The voltage regulator is connected between the filter

and the load. The purpose of connecting a voltage regulator is to maintain a constant output

dc voltage irrespective of input voltage fluctuations or variances in load circuit.

output voltage regardless of input voltage change and load resistances change.

Mathematically,

Voltage regulation is given as

VNL VFL

% V.R. = 100

VFL

Where V.R. Voltage regulation

VNL No load or open circuit voltage of the supply

VFL Full load voltage of the supply

Here, it is noteworthy that smaller the value of voltage-regulation-better is the perform-

ance of the power supply. Ideally, voltage, regulation of a regulated power supply should be

zero, but in actual practice it is not possible. UPS i.e., uninterrupted power supply used in

computer-systems can be regarded as the perfect regulated power supply, however, it is not

the ideal case.

Idealy, the output of most power supplies should be a constant voltage. Unfortunatly, this is

difficult to achieve. There are three factors that can cause output voltage to change.

1. First, the ac line voltage is not constant.

2. Second factor that can change the dc output voltage is a change in the load resistance. In

complex electronic equipment, the change as circuit are switched in and out.

3. Third due to change in temperature :

For example, in a television receiver, the load on a particular power supply may depend

on the brightness of the screen, the control setting, or even the channel selected. These

variation in load resistance tend to change the applied dc voltage because the power supply

has a fixed internal resistance. If the load resistance decrease, the internal resistance of the

power supply drops more voltage. This causes a decrease in the voltage across the load.

Many circuits are designed to operate with a particular supply voltage. When the supply

voltage changes the operation of the circuit may be adversely affected. Consequently, some

types of equipment must have power supplies that produce the same output voltage regardless

of changes in the load resistance or changes in the ac line voltage. This constant supply of

power may be achieved by adding a circuit called the voltage regulator at the output of the

filter.

You know that the output of a power supply varies with changes in input voltage and circuit

load current requirement because many electronic equipments require operating voltages and

currents that must remain constant, some form of regulation is necessary. The circuit that

maintain power supply voltage or current outputs within specified limits, or tolerances are

called regulators. They are designated as dc voltage or dc current regulators, depending on

their specific application. Voltage regulator circuits are additions to basic power supply

circuits and are made up of rectifier and filter sections. The purpose of the voltage regulator

is to provide an output voltage with little or no variation. Regulator circuits sense changes in

output voltage and compensate for changes. Regulators that maintain voltages within plus or

minus (±) 0.1 percent are quite common. Figure 6.35 clearly illustrates the purpose of the

voltage regulator.

DC

Rectifier OV Voltage OV

filter regulator

Input Output

Figure 6.35 Purpose of regulators.

There are two basic types of voltage regulators, series and shunt.

Whether a voltage regulator is classified as series or shunt depends on the location or

position of the regulating element(s) in relation to the circuit load resistance. Figure 6.36

illustrates the two basic types of voltage regulators. In actual practice the circuit of regulating

devices may be quite complex. We use the simplified drawings in the figure to emphasize

that there are two basic types of voltage regulators.

RS

RV RV

RL RL

Input dc Input dc

voltage voltage

(a) (b)

Figure 6.36 Series and shunt regulators.

The schematic in view (a) is that of a shunt type regulator. It is called a shunt type

regulator because the regulating device is connected in parallel with the load resistance. This

is a characteristic of all shunt type regulators. The schematic in view (b) is that of a series

regulator. It is called a series regulator because the regulating device is connected in series

with the load resistance.

Series voltage regulator

Figure 6.37 illustrates the principle of series voltage regulation. In this type, variable resistor

RV is used for regulation. Examine the circuit to determine how the regulator functions.

When the input voltage increases, the output voltage also increases. However, since the

voltage regulator device (RV) senses this change, the resistance of the regulating device

increases and results in a greater voltage drop through R V. This causes the output voltage to

decrease to normal or, for all practical purposes, to remain constant.

RV

RL

Unregulated Regulated

DC input DC output

You should be able to see that as the input voltage decreases, the resistance of the

variable resistor RV decreases almost simultaneously, thereby compensating for the voltage

drop. Since there is a smaller voltage drop across RV, the output voltage remains almost

constant. Voltage fluctuations within the circuit occur in microseconds.

Shunt voltage regulator

Figure 6.38 represents a shunt voltage regulator. Notice that variable resistor R V is in parallel

with the load resistance RL and that fixed resistor RS is in series with the load resistance. You

already know the voltage drop across a fixed resistor remains constant unless there is a variation

(increase or decrease) in the current through it. In a shunt regulator as shown in Figure 6.38,

output voltage regulation is determined by the current through the parallel resistances of the

that the circuit in Figure 6.38 is operating under normal conditions, that the input is 120 volts

dc, and that the desired regulated output is 100 volts dc. For a 100 volt output to be maintained,

20 volts must be dropped across the series resistor (RS). If you assume that the value of RS is 2

ohms, then you must have 10 amperes of current through RV and RL. (Remember V = IR). If

the values of the resistance of RV and RL are equal, then 5 amperes of current will flow through

each resistance (RV and RL).

IT = Ir + IL RS

+

Ir IL

Unregulated RL

RV Regulated

dc voltage

vout

input

–

Figure 6.38 Shunt voltage regulator.

Now, if the load resistance (RL) increases, the current through RL will decrease. For

example, assume that the current through RL is now 4 amperes and that the total current

through RS is 9 amperes. With this drop in current, the voltage drop across RS is 18 volts ;

consequently, the output of the regulator has increased to 102 volts. At this time, the

regulating device (RV) decreases in resistance, and 6 amperes of current flows through this

resistance (RV). Thus, the total current through RS is once again 10 amperes (6 amperes

across RV, 4 amperes through RL) ; therefore, 20 volts will be dropped across RS causing the

output to decrease back to 100 volts.

1. Zener diode as voltage regulator.

2. Transistor voltage series regulator.

3. Transistor voltage shunt regulator.

They are discussed one by one in detail :

Before discussing the first type i.e., zener diode as voltage regulator let us discuss the

brief theory of zener breakdown mechanism.

Breakdown Mechanism : The Breakdown mechanism of a zener diode made up of a

silicon pn-junction devices, differs from a rectifier diode, in the sense, that it is operated in

the reverse break down region (i.e., when the pn-junction is highly reverse biased).

The reverse voltage characteristic of a semiconductor diode, including the breakdown

region is shown as in Figure 6.39. Diodes which are designed with adequate power-dissipa-

tion capabilities to operate in the breakdown region may be employed as voltage reference or

constant voltage devices.

IF

VZ

Breakdown VR VF

(Forward bias

(Reverse bias

region)

region) IR

IZ

Figure 6.40 shows the symbol of zener diode which is quite different from the simple

diode.

A K

The mechanism of diode breakdown for increasing reverse voltage are namely :

(i) Zener breakdown, and (ii) Avalanche breakdown.

One thing should be always kept in mind that the zener breakdown and avalanche

breakdown are usually differentiated on the basis of doping concentration. Zener breakdown

occur when the pn-junction is highly doped while avalanche breakdown occurs only when the

pn-junction is very lightly doped.

The zener breakdown occurs when the electric field across the junction, produced due to

reverse voltage is sufficiently high. This electric field exerts a force on the electrons in the

outer most shell. This force is so high that the electrons are pulled away from their parent

nuclei and become free carriers. This ionization, which occurs due to the electrostatic force

of attraction is known as zener effect. Also known as high-field emission. One thing should

be always kept in mind that zener effect will occur only when a diode is heavily doped.

Because when the diode is heavily doped depletion layer becomes very narrow. Due to this

the electric field across the depletion layer is very intense, when the field strength reaches

approximately 300,000 V/cm. It causes an increase in the number of free carriers and hence

an increase in the reverse current.

The zener diodes, with breakdown voltages of less than 6 V, operate predominantly in

zener breakdown. However, the breakdown voltages greater than 6 V, operates predomi-

nantly in avalanche breakdown.

Avalanche multiplication. A thermally generated carrier falls down the junction barrier

and acquires energy from the applied potential. This carriers collides with a crystal ion and

imparts sufficient energy to disrupt a covalent bond. In addition to the original carrier, a new

electron-hole pair has now been generated. These carriers may also pick up sufficient energy

from the applied field, collide with another crystal ion and create still another electon-hole

pair. This cumulative process is referred to as avalanche multiplication. It results in large

reverse saturation currents and the diode is said to be in the region of avalanche breakdown.

However, zener breakdown does not involve collisions of carriers with the crystal ions as does

avalanche multiplication.

Temperature characteristics. The temperature coefficient of any device may be de-

fined as the percentage in reference voltage per centrigate degree change in diode tempera-

ture. This coefficient may be either positive or negative and will normally be lie in the range

± 0.1 percent /°C. Here with reference to the breakdown diode, if the reference voltage

(i.e., applied reverse voltage) is above 6 V, where the physical mechanism involved is

avalanche multiplication, the temperature coefficient is positive, however below 6 V, where

true zener breakdown is involved, the temperature coefficient is negative.

Explanation of why zener breakdown have negative temperature coefficient while

avalanche breakdown have positive temperature coefficient ?

A junction having a narrow depletion-layer width and hence high field intensity, will

breakdown by the zener mechanism. An increase in temperature increases the energies of the

valence electrons, and hence makes it easier for these electrons to escape from the covalent

bonds. Less applied voltage is therefore required to pull these electrons from their positions

in the crystal lattice and convert them into conduction electrons. Thus, the zener breakdown

voltage decreases with temperature i.e., negative temperature coefficient.

However, if a diode having very highly doping which gives a broad depletion layer, and

therefore low field intensity, will break down by avalanche mechanism. In this case, we rely

on intrinsic carriers to collide with valence electrons and create avalanche multiplication. As

the temperature increases, the vibrational displacement of atoms in the crystal of grows. This

vibration increases the probability of collisions with the lattice atoms of the intrinsic particles

as they cross the depletion width. The intrinsic holes and electrons thus have less of an

opportunity to gain sufficient energy between collisions to start the avalanche process.

Therefore, the value of the avalanche voltage must increases with increased temperature.

Breakdown characteristic of a zener diode. We have already discussed that a zener diode is

operated in the reverse-bias region. That is why we shall examine its characteristic in this

region only. Figure 6.41 shows the reverse characteristic of a zener diode.

It may be noted from above figure that as the reverse voltage (V R) the reverse current

(usually called zener current, IZ) remains negligibly small up to the ‘Knee’ of the curve (Point

A in Figure 6.41). At this point, the effect of breakdown process begins, at this point, the

voltage is called zener breakdown voltage or simply zener voltage V Z, remains essentially

constant. This ability of diode is called regulating ability and is important feature of zener

diode. It maintains, an essentially a constant voltage across its terminals over a specified

range of zener current values.

VR (Volts) VZ O

A IZK

Breakdown

or

regulation

region IZ (mA)

B IZM

There is a maximum value of zener current designated as IZM or Iz (max) above which

diode may be damaged. The value of this current is given by the maximum power

dissipation of zener diode. As long as the maximum power dissipation is not exceeded

the diode will not be damaged.

There is a minimum value of zener current called breakover current designated as I ZK or

IZ (min) which must be maintained in order to keep the diode in breakdown (or regula-

tion). When the current is reduced below the knee of the curve, the voltage changes

drastically and the regulation is lost.

Zener resistance

Figure 6.42 (a) shows a ideal approximation of a zener diode in reverse breakdown. It shows

that a zener diode is simply equivalent to a battery having a voltage equal to the zener voltage

(VZ).

Figure 6.42 (b) shows a practical equivalent circuit of zener diode. This circuit shows

that a zener diode is equivalent to a battery with voltage (V Z), in series with a resistance (VZ)

called zener resistance, also called dynamic resistance or ac resistance.

In order to calculate the value of zener resistance, consider any two points P and Q on the

reverse V-I curve as shown in Figure 6.42 (c).

Let, VZ = Change in the values of zener voltage between the points P and Q

IZ = Change in the values of zener current at the corresponding points.

Now, the zener resistance is given by the relation :

VZ

rZ =

IZ

VR (Volts)

VZ 0

rz

+ IZ (mA)

Vz VZ

– + Q

Vz

– IZ

(a) Ideal zener equivalent (b) Practical zener diode (c) Reverse V.I. characteristic

diode circuit equivalent circuit curve illustrating zener

resistance

Figure 6.42

Zener diode specification

Any zener diodes are generally specified in terms of four factors namely :

Zener voltage (VZ)

Maximum power dissipation (PZM or PD (max))

Breakover current (IZK), and

Zener resistance (rZ).

Zener diodes are available in market with breakdown voltages ranging from 1.8 V to 2000 V.

The power dissipation of a zener diode is the product of breakdown voltage (VZ) and reverse

current (IZ). Mathematically, the power dissipation,

PZ = VZ IZ

The maximum value of power dissipation, which a zener can dissipate, without failure is

called power rating and is designated by PZM.

The zener diodes are available with power rating from 150 mW to 50 W. The value of

maximum zener current is given by the relation,

PZM

IZM =

VZ

where, PZM = Maximum power rating of zener diode, and

VZ = Breakdown voltage.

Now come back to the regulators and discuss their three types one by one.

(1) Zener Diode As a Shunt Regulator

Figure 6.43 shows a circuit in which zener diode is used to regulate the voltage across R L

against changes due to variations in load current and supply voltage.

IR

IL

RZ IZ

+

+

V– VZ R L VL

–

Working : The source voltage V and resistor R are selected, so that, initially, the diode

is operating in the breakdown region. Here, the diode will now regulate the load voltage

against variations in load current and again variations in supply voltage changes in diode

voltage.

In order to better understanding. Consider :

When the input voltage increases. Since, the zener diode is equivalent to a

battery, VZ as shown in figure 6.43. It is clear that output voltage remain constant at V Z

(VL). The excess voltage is dropped across the series resistance R. This will cause an increase

in the value of total current I. The zener will conduct the increase of current in I while the

load current remains constant. Hence, output voltage VL remains constant irrespective of the

changes in the voltage V.

When the input voltage (V) is constant but the load resistance RL decreases.

This will cause an increase in load current. The extra current cannot come from the source

because drop in R will not change as the zener is within its regulating range. The additional

load current will come from a decrease in zener current IZ. Consequently, the output voltage

stays at constant value.

Voltage drop across R, = V – VL

Current through RZ, IR = IZ + IL

V – VL

R=

IZ IL

where, V = Input voltage

Moreover, as load current or supply voltage changes, the diode current will accommo-

date itself to these changes to maintain a nearly constant load voltage. The diode will

continue to regulate until the circuit operation requires the diode current to fall to I ZK, in the

neighbourhood of the knee of the diode volt-ampere curve. The upper limit on diode current

is determined by the power dissipation rating of the diode.

A zener diode is chosen whose breakdown voltage V Z is the same as output voltage VL.

Regulation takes place only for Vi > VZ.

Vi a max f VZ

IZ (max) = – IL (min)

R

Vi a min f VZ

IZ (min) = – IL (max)

R

Vi a min f VZ

Rmin =

I Z a max f I L a min f

Vi a min f VZ

Rmax =

I Z a min f I L a max f

Following are the application of Zener Diode :

As a fixed reference voltage in transistor biasing circuit.

As peak clippers or limiters in waveshaping circuits.

For meter protection against damage from accidental applications.

It is simple circuit, light weight, more reliable and provides regulation over a wide range

of current.

Disadvantages of Zener Diode

Following are the disadvantages of Zener Diode :

As there is power dissipation in series resistor and the diodes, it results in poor effi-

ciency.

The stabilised output is determined by the zener breakdown voltage and cannot be

varied.

Example 9. When the reverse current in a particular zener diode increases from 20 mA to

30 mA, the zener voltage changes from 5.6 V to 5.75 V. What is the resistance of device ?

Sol. Given :

IZ = (30 – 20) mA = 10 mA = 10 10–3 A

and VZ = 5.75 – 5.6 = 0.15 V.

We know that the resistance of the zener diode,

VZ

rZ =

IZ

0.15

or rZ = 3

10 10

or rZ = 15 .

Example 10. A 4.7 V zener has a resistance of 15 , what is the terminal voltage, when

the current is 20 mA ?

Sol. Given : VZ = 4.7 V

rZ = 15

IZ = 20 mA

VZ = ?

The terminal voltage VZ is given by relation :

VZ = VZ + IZ rZ

or VZ = 4.7 + 20 10–3 15

or VZ = 4.7 + 300 10–3

or VZ = 4.7 + 0.3

or VZ = 5 V. Ans.

A

15 = rZ IZ = 20 mA

Vz

+

4.7 V = VZ

–

B

Figure 6.44

Example 11. A zener diode has a dc power dissipation rating of 500 mW and a zener

voltage rating of 6.8 V. What is the value of IZM for the device ?

Sol. Given : PZM = 500 mW = 500 10–3 W

VZ = 6.8 V

We know that the max. current of zener diode is given by :

PZM 500 10 – 3

IZM = 73.5 mA. Ans.

VZ 6.8

(2) Transistor Series Voltage Regulator

The schematic for a typical series voltage regulator is shown in Figure 6.44. Notice that this

regulator has a transistor (Q1) in the place of the variable resistor found in Figure 6.45.

Because the total load current passes through this transistor, it is sometimes called a “pass

transistor”. Other components which make up the circuit are the current limiting resistor

(R1) and the zener diode (VZ).

+ +

Q1

R1

Unregulated

Regulated

dc voltage RL

Eout

input

VZ

– –

Recall that a zener diode is a diode that block current until a specified voltage is applied.

Remember also that the applied voltage is called the breakdown, or zener voltage. Zener

diodes are available with different zener voltages. When the zener voltage is reached, the

zener diode conducts from its anode to its cathode (with the direction of the arrow).

In this voltage regulator, Q1 has a constant voltage applied to its base. This voltage is

often called the reference voltage. As changes in the circuit output voltage occur, they are

sensed at the emitter of Q1 producing a corresponding change in the forward bias of the

transistor. In other words, Q1 compensates by increasing or decreasing its resistance in order to

change the circuit voltage division.

Now, see Figure 6.46. Voltages are shown to help you understand how the regulator

operates. The zener used in this regulator is a 15 volt Zener. In this instance the zener or

breakdown voltage is 15 volts. The zener estrablishes the value of the base voltage for Q1.

The output voltage will equal the zener voltage minus a 0.7 volt drop across the forward

biased base-emitter junction of Q1, or 14.3 volts. Because the output voltage is 14.3 volts,

the voltage drop across Q1 must be 5.7 volts.

5.7V

V

+ –

+ – +

Q1 0.7V

R1 +

Unregulated 14.3V +

dc voltage Regulated RL

input = 20V Eout –

VZ

– 15V –

Figure 6.47 in order to understand what happens when the input voltage exceeds 20

volts. Notice the input and output voltages of 20.1 and 14.4 volts, respectively. The 14.4

output voltage is a momentary deviation, or variation, from the required regulated output

voltage of 14.3 and is the result of a rise in the input voltage to 20.1 volts. Since the base

voltage of Q1 is held at 15 volts by VZ, the forward bias of Q1 changes to 0.6 volt. Because this

bias voltage is less than the normal 0.7 volt, the resistance of Q1 increases, thereby increasing

the voltage drop across the transistor to 5.8 volts. This voltage drop restores the output

voltage to 14.3 volts. The entire cycle takes only a fraction of a second and, therefore, the

change is not visible on an oscilloscope or readily measurable with other standard test

equipment.

+ +

Q1 0.6V

R1

Unregulated +

Regulated

dc voltage RL 14.4V

Eout

input = 20.1V –

VZ

– 15V –

Figure 6.48 is a schematic diagram for the same series voltage regulator with one

significant difference. The output voltage is shown as 14.2 volts instead of the desired 14.3

volts. In this case, the load has increased causing a lowered voltage drop across RL to 14.2 volts.

When the output decreases, the forward bias of Q1 increases to 0.8 volt because zener diode

VZ maintains the base voltage of Q1 at 15 volts. This 0.8 volt is the difference between the zener

reference voltage of 15 volts and the momentary output voltage. (15 V – 14.2 V = 0.8 V).

At this point, the larger forward bias on Q1 causes the resistance of Q1 to decrease, thereby

causing the voltage drop across Q1 to return to 5.7 volts. This causes the output voltage to

return to 14.3 volts.

+ +

Q1 0.8V

R1

Unregulated +

Regulated

dc voltage RL 14.2V

Eout

input –

VZ

– 15V –

The schematic shown in Figure 6.49 is that of a shunt voltage regulator. Notice that Q1 is in

parallel with the load. Components of this circuit are identical with those of the series voltage

regulator except for the addition of fixed resistor R S. As you study the schematic, you will

see that this resistor is connected in series with the output load resistance. The current

limiting resistor (R1) and zener diode (VZ) provide a constant reference voltage for the base-

collector junction of Q1. Notice that the voltage drop determines the bias of Q1 across R S and

R1. As you should know, the amount of forward bias across a transistor affects its total

resistance. In this case, the voltage drop across R S is the key to the total circuit operation.

+

+

VZ

Unregulated

DC voltage +

input Regulated RL

Q1 EOUT

+ –

R1 IE

–

– RS + –

–

Notice that the schematic is identical to the schematic shown in Figure 6.50 except that

voltages are shown to help you understand the functions of the various components. In the

circuit shown, the voltage drop across the zener diode (V Z) remains constant at 5.6 volts.

This means that with a 20 volt input voltage, the voltage drop across R1 is 14.4 volts. With

a base-emitter voltage of 0.7 volt, the output voltage is equal to the sum of the voltages

across VZ and the voltage at the base-emitter junction of Q1. In this example, with an output

voltage of 6.3 volts and a 20 volt input voltage, the voltage drop across R S equals 13.7 volts.

Study the schematic to understand fully how these voltages are developed. Pay close attention

to the voltages shown.

+

+

+

5.6V V CR1

Unregulated – +

Regulated

dc voltage V = 6.3V

+ Eout

input = 20V + Q1 –

0.74

–

14.4V V R1

–

– RS + –

–

V

13.7V

Figure 6.50 Shunt voltage regulator (with voltages).

Figure 6.51(a) shows the schematic diagram of the same shunt voltage regulator as that

shown in Figure 6.50 with an increased input voltage of 20.1 volts. This increases the

forward bias on Q1 to 0.8 volt. Recall that the voltage drop across V Z remains constant at 5.6

volts. Since the output voltage is composed of the zener voltage and the base-emitter voltage,

the output voltage momentarily increases to 6.4 volts. At this time, the increase in the

forward bias of Q1 lowers the resistance of the transistor allowing more current to flow

through it. Since this current must also pass through R S, there is also an increase in the

voltage drop across this resistor. The voltage drop across RS is now 13.8 volts and therefore

the output voltage is reduced to 6.3 volts. Remember, this change takes place in a fraction of

a second.

+

+

CR1

Unregulated 5.6V + Momentary

Regulated

dc voltage 6.4 volt

+ Eout

input = 20.1V Q1 – dc output

0.8V

–

R1

– RS + –

–

The schematic shown in Figure 6.51(b). Although this schematic is identical to the other

shunt voltage schematics previously illustrated and discussed, the output voltage is different.

The load current has increased causing a momentary drop in voltage output to 6.2 volts.

Recall that the circuit was designed to ensure a constant output voltage of 6.3 volts. Since the

output voltage is less than that required, changes occur in the regulator to restore the output

to 6.3 volts. Because of the 0.1 volt drop in the output voltage, the forward bias of Q1 is not

0.6 volt. This decrease in the forward bias increases the resistance of the transistor, thereby

reducing the current flow through Q1 by the same amount that the load current increased.

The current flow through RS returns to its normal value and restores the output voltage to 6.3

volts.

+

+

Unregulated CRI

DC voltage 5.6V Regulated Momentary

input EOUT 6.2 volt

Q1 Load – DC output

0.6V increase

R1

– RS + –

–

Decrease in output voltage

Figure 6.51(b) Shunt voltage regulator. Decrease in output voltage.

In any power supply there is always the risk that the output will experience a short circuit.

According it is necessary to protect the power supply from damage under these circum-

stances. There are a number of circuits that can be used for power protection but one of the

simplest circuits uses just two diodes and additional resistor.

The circuit for the power supply current limiter uses a sense resistor placed in series with

the emitter of the output pass transistor. Two diodes placed between the output of the circuit

and the base of the pass transistor provide the current limiting action. When the circuit is

operating within its normal operating range a small voltage exist across the series resistor.

This voltage plus the base emitter voltage of the transistor is less than the two diode junction

drops needed to turn on the two diodes and allow them to conduct current. However, as the

current increases so does the voltage across the resistor. When it equals the turn on voltage of

the diode the voltage across the resistor plus the base emitter junction drop for the transistor

equals two diode drops and as a result this voltage appears across the two diode, which start

to conduct. This starts to pull the voltage on the base of the transistor down, thereby the

limiting the current that can be drawn.

Sense resistor

D1 D2

Input Output

Reference diode

The circuit of this diode current limiter for a power supply is particularly simple. The

value of the series resistor can be calculated so that the voltage across it rises to 0.6 volts (the

turn on voltage for a silicon diode) when the maximum current is reached. However, it

always best to ensure that there is some margin in hand by limiting the current from the

simple power supply regulator before the absolute maximum level reached.

Using in other circuits : The same simple diode form of current limiting may be

incorporated into power supply circuits that uses feedback to sense the actual output voltage

sense points is taken after the series current sensing resistor, then the voltage drop across this

can be corrected at the output.

Sense resister

D1 D2

Input Output

Reference

diode

The circuit gives far better regulation than the straight emitter follower regulator. Also

voltage drop in the series current limit sense resistor can be accounted for provided that there

is sufficient voltage drop across the series pass transistor in the power supply circuit. Finally,

the output voltage can be adjusted to give the required value using the variable resistor.

A commonly used figure of merit for a power supply is its percentage of regulation. The

figure of merit gives us an indication of how much the output voltage changes over a range of

load resistance values. The percent of regulation aid us in determining of the type of load

regulation needed. Percent of regulation is determined by the equation :

Vno load Vfull load

Percentage of regulation = 100%

Vfull load

This equation compares the change in output voltage at the two loading extremes to the

voltage produced at full loading.

For example, assume that a power supply produces 12 volts when the load current is

zero. If the output voltage drops to 10 volts when full load current flows, then the percent of

regulation is :

Vno load Vfull load

Percentage of regulation = 100%

Vfull load

% of regulation =

a12 10 Vf 100

10

2V

% of regulation = 100

10 V

% of regulation = 20%.

Ideally, the output voltage should not over the full range of operation. That is, a 12 volts

supply should produce 12 V at no load, at full load and at all points between :

In this case the percentage of regulation would be :

Vno load Vfull load

% of regulation = 100%

Vfull load

% of regulation =

a12 – 12f V 100

12 V

0

% of regulation = 100

12 V

of regulation = 0 %

Thus, zero percent load regulation is the ideal situation. It means, that the output voltage

is constant under all load conditions. While you should strive for zero percent load regula-

tion, in practical circuits you must settle for something less. Even so, by using voltage

regulator, you can hold the percent of regulation to a very low value.

1. The purpose of fixed dc supply is to make the electronic circuits operate smoothly.

2. A rectifier is a circuit which allows current to flow only in one direction.

3. The important parts of the regulated power supply are :

(i) Power transformer (ii) Rectifier circuit

(iii) Filter circuit (iv) Voltage regulator.

4. The efficiency of full wave rectifier is just double as that of a HWR.

5. Full wave rectifier are two type : (i) Centre tap ; (ii) Bridge type rectifier.

6. In a bridge, FWR 4 diodes are used and the input transformer without centre tap secondary may

or may not be used.

7. In a centre tap, FWR an input transformer with centre tap secondary and two diodes are used.

8. Bridge network rectifier circuits are preferred because PIV rating of the diode in case if a

bridge rectifier is half that for a centre tap of FWR.

9. Ripples are the unwanted ac signals associated with the pulsating dc output of a rectifier.

10. A filter circuit is used to check the ac component of a rectifier.

11. Filter circuit which blocks the ac component. But allows the dc components of the rectifier to

pass on to the load.

12. Filter circuit may be

(i) Shunt capacitor (ii) Series inductor

(iii) Capacitor input ( ) filter (iv) Clock input (LC) filter.

13. Voltage regulation is defined as the change in output voltage from no load to full load conditions

Vno load Vfull load

Voltage regulation =

Vfull load

Vno load Vfull load

% of voltage regulation = 100

Vfull load

14. Voltage regulators may be

(i) Series voltage regulator (ii) Shunt voltage regulator

15. Line regulation is a measure of the ability of power supply to maintain its output voltage given

changes in the input line voltage.

Problem. 1. For a half wave rectifier circuit, the transformer used has a turn ratio N2 : N1

= 4 : 1 and load resistance RL = 1 k . Calculate the average current and load voltage, RMS

current and voltage, efficiency of rectification, TUF and ripple factor, if the input to

primary, is Vi = 10 sin t, assume ideal diode.

Sol. Given for an HWR :

N2 : N1 = 4 : 1

RL = 1 k

Vi = 10 sin t

Ideal diode,

Iav and Vav = ? Irms and Vrms = ? l = ?, TUF = ?

=?

(i) As we have for a transformer,

N2 V2

N1 = V1

Therefore induced voltage at the secondary winding when V 1 is applied.

N2

V2 = V1 = 4 10 sin t

N1

V2 = 40 sin t

Vm = 40 volts.

(ii) Average load voltage,

Vm 40

VL av = = VL DC =

or VL DC = 12.73 V. Ans.

and, average load current,

Im Vm 12.73

IDC =

RL 1K

IDC = 12.73 mA. Ans.

(iii) RMS load voltage,

Vm 40

VLrms =

2 2

VLrms = 20 V. Ans.

VLrms

and, Irms =

RL

or Irms = 20 mA. Ans.

(iv) Rectification efficiency ( )

PODC

= 100%

PiAC

=

I 2LOC R L

100 =

a12.73f 2

1

100

I 2rms R L a20f

2

1

= 40.51%. Ans.

(v) Transformer utilization factor (TUF) as defined,

PODC

TUF =

VA rating of transformer

=

PODC

=

a12.73f 2

1

V2 rms I 2 rms F 40 I

GH 2 JK 20

(vi) Ripple factor ( )

1

VL2rms VL2DC

2

=

VLDC

Substituting the values, we have :

a20f a12.73f

1

2 2 2

=

12.73

= 121%. Ans.

Problem 2. A diode whose internal resistance is 10 , is to supply power to a 1 k load

from a 230 V (rms) source of supply. Calculate input a.c. power, output d.c. power,

efficiency and percentage regulation from no load to full load.

Sol. Given :

Rf = 10

RL = 1 k

Vi = 230 V (rms)

As we have,

Vi RL = 1 k

Im

IDC =

Figure N (6.1)

Vm 230 2

=

d RL R f i a

10 1000 f

= 102.5 mA

or IDC = 102.5 mA

Vm LM I Im OP

d RL Rf i 2 N rms

2 Q

Irms = 161.02 mA

(i) Input ac power,

PiAC = I 2rms (RS + Rf) = (0.161)2 1010

PiAC = 26.9 watt. Ans.

(ii) Output dc power,

PODC = I 2DC R L

= (0.103)2 1000

PODC = 10.5 watt. Ans.

(iii) Efficiency of rectification ( )

As we have,

PODC

= 100%

PiAC

Substituting the values, we get

10.5

= 100%

26.9

= 39.03%. Ans.

(iv) Load regulation

VNL VFL

We have, R= 100%

VFL

Vm

here, VNL =

Vm

VFL = IDC RL = RL

dR f RL i

Vm Vm R L

R=

dR f RL i 100%

Vm RL

d RL R f i

or =

dR f RL i RL

%

RL

Rf

or = 100%

RL

10

or = 100%

1000

or R = 1%. Ans.

Problem 3. An HWR circuit is connected to a 230 V mains supply by a transformer of

1 : 4 turn ratio, calculate the output dc voltage and current for a laod resistance of 1 k and

assuming the Si diode.

Sol. Given for an HWR circuit

v1 = 230 V (rms)

N2 : N1 = 1 : 4

RL = 1 k

Drop across the diode = 0.7 V.

Therefore average load voltage :

VL DC =

1

2 0 zb

Vm 0.7 sin t d t g

F

Vm 0.7 Ia f

=

H2 K

cos t 0

V 0.7

VL DC = m volts.

N2 1

V 2 = V1 = 230 = 57.5 volt (rms)

N1 4

Vm = 2Vrms = 2V2

or = 2 57.5

or Vm = 81.32 volts.

Substituting the value of Vm, we get

81.32 – 0.7

VL DC =

VL DC = 25.66 V. Ans.

and the load current,

VLDC 25.66 V

I LDC = =

RL 1K

I LDC = 25.66 mA. Ans.

Problem 4. Find the voltage drop across 2 k resistance in the following circuit

(Assuming diode to be ideal). (U.P. Tech. 2000–2001)

1k Diode

+

Vi = 10 sin 314 t 1k 2k

–

Figure N (6.2)

Sol. During positive half cycle, diode D is forward biased and it behaves as a short

circuit (Assuming diode to be ideal) in this condition, above circuit can be redrawn as :

a 1k b S.C.

+ c

I1 + I2 I2 I1

Vi = 10 sin 314 t 1k 2k

– d

f e

Figure N (6.3)

Vi = 1 103 (I1 + I2) + 2 103 I1

10 sin 314t = 3 103 I1 + 1 103 I2 ...(1)

By KVL along path bcdeb

2 103 I1 = 1 103 I2

or 2I1 = I 2 ...(2)

From equation (1) and equation (2), we have

10 sin 314t = 3 103 I1 + 1 103 2I1

10 sin 314t = 5 103 I1

10 sin 314t

or I1 =

5 10 3

I1 = 2 10–3 sin 314t A

I1 = 2 sin 314t mA.

During negative half cycle, diode will not conduct. It behaves as an open circuit.

1k I1 O.C.

–

I2

Vi = 10 sin 314 t 1k 2k

+

Figure N (6.4)

From Figure N (6.4), we have I1 = 0 and voltage drop across 2 k resistance = 0.

Thus, we have

I1 =

RS2 sin 314t 0 t

T0 t 2

Im

R.M.S. value of current for a half wave rectifier is

2

2

I1, rms = =1

2

Voltage drop across 2 k =1 10–3 2 103 = 2 V. Ans.

Problem 5. Sketch the output voltage waveform for the following circuit. Assume the diode

is ideal. (U.P. Tech. 2000–2001)

(V)

20 10K

2

t

Vi 10K 20K V0

– 20

Figure N (6.5)

Sol. During the positive half cycle the ideal diode will work as closed switch. Hence,

from 0 circuit will be as below.

This circuit can be reduced to the following circuit.

Diode as

10K closed switch 10K

R1 R1

10 20

Vin R2 10K R3 20K V0 Vin R= V0

10 20

R2 R3 10 20 20

Here, R= K= K

R2 R3 10 20 3

This circuit is simply a voltage divider circuit.

20

R 3

So, Vo = Vin = Vin

R R1 20

10

3

20 2

= Vin = Vin

50 5

where, Vin = 20 sin t

2

So, Vo = 20 sin t

5

= 8 sin t

Now from 0 2

This is negative half cycle of V in. Diode will be in reverse bias condition. Because it is an

ideal diode so it will behave as open circuit. So the circuit will be as below.

Diode open

10K circuited

R1

Vin R2 10K R3 V0

Figure N (6.8)

Vo = 0

So the output waveform will be as in Figure N (6.9).

V

+ 8V

O t

2 3

Figure N (6.9)

Problem 6. Determine the output waveform for the network of Figure N (6.10) and

calculate the input dc level and the required PIV of each diode. (U.P. Tech. 2002–2003)

Vi

10 V

2k

O T T t V1

2 – V +

0

2k 2k

Figure N (6.10)

Sol. During positive half Cycle of Vi (0 to T/2). The circuit will be as shown in Figure

N (6.11) as D2 is forward biased and D1 is reverse biased.

It is clear from the circuit that

Vo = VAB = 2k I.

If we calculate the value of I, then

2K

P A B

Vi 2K I 2K

Q

Figure N (6.11)

Vi

I= .

4k

Vi

So, Vo = 2k

4k

Vi

=.

2

The maximum value of Vo during 0 T/2 will be at T/4

10 volts

Vo max = = 5 volts.

2

During negative half cycle of Vi (T/2 to T). The circuit will be as shown in Figure N

(6.12).

The diode D1 will be forward biased and D2 will be reverse biased.

2K

P B A

– V0 +

I

–

Vi 2K 2K

+

Q

Figure N (6.12)

Vo = VAB

or Vo = (– I ) 2k

as the circuit is similar to Figure N (6.11) here

– Vi

or Vo =

2

as the Vi has become negative so we get Vo again positive and same as in the positive half

cycle. Waveform shown in Figure N (6.13) and PIV of the diode should be 5 volts.

V0

5 volts

t

O T/2 T

Figure N (6.13)

Problem 7. For a full wave rectifier circuit (with center tapped transformer), find the

average, RMS and peak values of currents through the diode, if the voltage across half of

secondary is 15 sin 314t. Also calculate the PIV of diode. Given RL = 1 k and ideal diodes.

Sol. Given for a outer-tapped full wave rectifier circuit :

vi = 15 sin 314t

Vm = 15 V

(i) Average current through the diodes

Im

I D av = Idc =

Vm

but, Im = (as Rf and R2 are assumed zero)

RL

15

I D av = = 4.77 mA

1

I D av = 4.77 mA. Ans.

(ii) RMS current

Im

I Drms =

2

as one diode conducts only for one half cycle.

15

I Drms = = 7.5 mA

2 1

I Drms = 7.5 mA. Ans.

(iii) Peak diode current

I Dpeak = Im = Vm

RL

or I Dpeak = 15

1

or I Dpeak = 15 mA. Ans.

(iv) Peak inverse voltage

As we know the PIV, appears across the diode in center-tapped full wave rectifier is

given by :

PIV = 2Vm = 2 15

or PIV = 30 V. Ans.

Problem 8. For a center-tapped transformer full wave rectifier, the turn ratio of the

transformer between primary and half the secondary is 4 : 1. The resistance of each half of the

secondary is 2 and the forward resistance of each diode is 1 . Calculate,

(a) Average load current (b) Average load voltage at no load (c) Average load voltage at

full load (d) Percentage load regulation (e) Rectification efficiency.

Given : load resistance RL = 1 k ; and mains supply at primary is 240 V, 50 Hz.

Sol. Given : Rf = 1 , R2 = 2 , RL = 1 k

N1 : N2 = 4 : 1

2 Vm

(a) I LDC =

d R2 R f RL i

Where Vm = 2 V2rms

N2 1

V2 rms = V1rms 240

N1 4

or V2 rms = 60 V

Vm = 2 V2rms

= 2 60

Vm = 84.85 volt

2 84.85

Therefore, I LDC =

a 2 + 1 + 1000 f

I LDC = 53.86 mA. Ans.

(b) Average load voltage at no load

2 Vm 2 84.85

VNL =

(c) Average load voltage at full load

VL DC = VL DC RL = 53.86 1

VL DC = 53.86 volt. Ans.

(d) Load regulation

VNL VFL

% load regulation = 100%

VFL

54.02 53.86

= 100

53.86

% load regulation = 0.297%. Ans.

(e) Rectification efficiency ( )

Input ac power PiAC = I 2rms (R2 + Rf + RL)

I 2m

= (R2 + Rf + RL)

2

Vm

but Im =

d

RL R2 R f i

PiAC =

Vm2 a84.85f 2

2 RLd R2 Rf i a

2 1000 2 f

1

and output dc power

PODC = I 2L DC R L

= (53.86 10–3)2 1000

= 2.9 watts

As we know, rectification efficiency :

PODC 2.9

= =

Pi AC 3.6

= 80.56%. Ans.

Problem 9. A single phase full wave rectifier uses two diodes, the internal resistance of

each being 20 . The transformer rms secondary voltage from center tap to each end of

secondary is 50 V and load resistance is 980 . Find :

(i) The mean load current.

(ii) rms load current.

(iii) Output efficiency.

Sol. Given that

Vrms = 50 V

rf = 20

RL = 980

So, Vm = 2 Vrms = 50 2

(i) The mean load current

2 Im 2 . Vm 2 50 2

Idc = =2 .

d

R L rf i a 980 20 f

= 45 mA. Ans.

(ii) rms load current

Im Vm 50 2

Irms = = 50 mA. Ans.

2 d

2 RL rf i a

2 980 20 f

0.812 0.812

(iii) Output efficiency, = = 79.58%. Ans.

rf 20

1 1

RL 980

Problem 10. A half wave rectifier uses a diode with an equivalent forward resistance of

0.3 k . If the input ac voltage is 10 V (rms) and the load is a resistance of 2.0 , calculate Idc

and Irms in the load.

Sol. Given that Vrms = 10 V

rf = 0.3 V

RL = 2.0

So, Vm = 2 Vrms = 10 2 V

Peak value of current in load, Imax or Im

Vm 10 2

= 6.15 A

RL rf 2 0.3

Im 6.15

d.c. output current, Idc = = 1.958 A. Ans.

Im 6.15

Irms = = 3.075 A. Ans.

2 2

Problem 11. For the circuit shown in Figure N (6.14) a symmetrical 5 kHz square wave

whose output varies between + 10 V to – 10 V is applied. Find out the output for a complete

cycle.

+

1M

Vi Vo

2.5 V

–

Figure N (6.14)

Sol. In the given problem, input is look like as shown in Figure N (6.15).

Vi

– 10V

RSTime period = 1 1

0.2 ms

UV

t

T f 5 10 3 W

– 10V

T = .2 ms

Figure N (6.15)

From the input waveform it is clear that during positive half cycle diode will be in

conducting stage i.e., in forward biased. To calculate the output for positive half cycle we

will draw its equivalent diagram in Figure N (6.16).

S.C.

i

1M

+

10 V Vo

–

2.5 V

Figure N (6.16)

10 2.5 V

i= = 7.5 A

1M

V0 = i R + 2.5 = 7. 10–6 1 106 2.5 = 10 V. Ans.

Now, for negative half cycle, diode will be in reverse biased, therefore, there is no

current flowing through the circuit due to open circuit. So in this case

V0 = 2.5 V. Ans.

Problem 12. In the circuit shown in Figure N (6.17) calculate current over one period of

the input voltage. Assuming that the diodes to be ideal.

2 A 2

D1 D2

cos t 2 sin t

Figure N (6.17)

Sol. From Figure N (6.17), it is clear that both the diodes are in forward biased because

both sin t and cos t are positive.

To calculate value of current over one period of the input signal first of all we will draw

its equivalent circuit (assuming ideal diode). Applying KCL at node A,

2 A 2

+ +

cos t 2 sin t

– –

Figure N (6.18)

KCL at node A

VA cos t VA sin t VA 0

=0

2 2 2

T2 2 2 W 2 2

V =F

sin t cos t I

A

H 3 K

i =

V

=A

asin t cos tf

A. Ans.

sin t cos t

2 3.2 6

However, during the negative half cycle both the diodes in the reverse biased. Therefore

current i in this case will be zero. Ans.

Problem 13. For the given centre-tapped full wave rectifier. Calculate :

(a) dc output voltage (b) PIV

(c) Rectification efficiency.

5:1

230 V

AC

Supply

RL = 100

Figure N (6.19)

N2 1

= = 0.2

N1 5

RL = 100

(a) dc output voltage

We know that the rms value of secondary voltage,

N2

Vrms = V2 = V1 = 230 0.2 = 46 V

N1

and half of the secondary voltage

V2 46

Vs = = 23 V

2 2

Maximum value of the half of the secondary voltage,

Vm = 2 Vs 2 23 = 32.5 V

and dc output voltage,

2 Vm 2 32.5

Vdc = = 20.7 V. Ans.

For centre tapped FWR, we know that peak inverse voltage of a diode,

PIV = 2 Vm

= 2 32.5

= 65 V. Ans.

(c) Rectification efficiency

We also know that rectification efficiency of a full-wave rectifier,

= 0.812 = 81.2%. Ans.

Problem 14. For the circuit shown in Figure N (6.20), determine :

(a) dc output voltage

(b) Rectification efficiency

(c) Peak inverse voltage (PIV)

(d) Output frequency.

Assume the diodes is ideal.

10 : 1

50 Hz 220 V

250

Figure N (6.20)

V1 = 220 V

N2 1

= = 0.1

N1 10

RL = 250

(a) dc output voltage

rms value of secondary voltage,

N2

V 2 = V1 = 220 0.1 = 22 V

N1

Maximum value of secondary voltage to be rectified

Vm = 2 V2 = 2 22 V

= 31.11 V

Now,

Vm

Im = ( diode is assumed to be ideal i.e., rf = 0)

RL

3111

.

= = 124.44 mA

250

2 Im

Idc = Iav = (for FWR)

2 124.44

= = 79.22 mA

= 79.22 250 10–3

= 19.80 V. Ans.

(b) Rectification efficiency

dc output power, Pdc = I 2dc RL = (79.22 10–3)2 250

= 1.56 W.

FI I R 2

RL = m

L

F 124.44 10 I 250

=G

3

2

H 2 JK

= 1.935 W

Pdc

Now, rectification efficiency, =

Pac

1.56

= = 0.805

1.935

% = 0.805 100

= 80.5%. Ans.

(c) Peak inverse voltage

We know that PIV for a bridge network full wave rectifier is

PIV = Vm = 31.11 V. Ans.

(d) Output frequency

A full wave rectifier doubles the input frequency

fout = 2 fin = 2 50

= 100 Hz. Ans.

Problem 15. Calculate the output dc level and the required PJV for each diode in the

circuit in Figure N (6.21) : (U.P Tech. 2004–2005)

Vm

Vi

t

RL

R R

Figure N (6.21)

D1 D2

RL

R R

Figure N (6.22)

It may be shown that output when diode D1 is conducting as follows :

A

+

Vm Open circuited due

to reverse bias

Vi RL

R

– R

B

Figure N (6.23)

and we get the above diagram as follows :

A

I

I0

RL V0

Vi R

B

Figure N (6.24)

So output voltage may be calculated as follows :

I=

Vi

R eq bR L

Vi

g

R ||R

Vi

R

RL b R g

IR Vi R Vi

and I0 =

RL R R R RL R+R RL 2R

and we have output voltage

Vi Vi R L

V0 = I0 . RL = RL

RL 2R R L 2R

and PIV of diodes may be calculated as follows :

A

– Vm

I

+

Vi

RL

R R

B

Figure N (6.25)

Vm – I 0 R L = 0

or Vm = I0 RL

Vi R L

or Vm = . Ans.

RL 2R

This is the required PIV of each diode.

Problem 16. A motorola’s IN 754 zener diode is being operated at 85°C. What is the

maximum power dissipation for the device ? Assume that the dc power dissipation rating of the

device is 1500 mW and the derating factor is 3.33 mW/°C above 60°C.

Sol. Given : PZM = 1500 mW, and

Derating factor = 3.33 mW

We know that so long the zener diode is being operated at or below 60°C, its maximum

power dissipation is 1500 mW. However, if it is so operated at 85°C, its maximum power

dissipated will be below 1500 mW, because of the excessive heat generated inside.

We know that total derating value

= Derating factor (85 – 60)

= 3.33 (85 – 60)

= 83.25 mW

Maximum power dissipation for the device,

PZM = 1500 – 83.25

= 1416.75 mW. Ans.

Problem 17. For the zener diode network of Figure N (6.26) determine V L, VR, IZ and PZ.

VR –

+

R

+

1k

IZ

Vi = 16 V VZ = 10 V RL 1.2 k VL

PZM = 30 mW

–

Figure N (6.26)

Sol.

Note : Before solving this type of problem, consider two situation :

Situation 1. Applying kVL to Figure N (6.27).

R

+ +

Vi VZ RL VL

– –

Figure N (6.27)

Where the application of voltage divider rule, we get,

R L . Vi

VL =

b RL R g

If VL VZ, the zener diode is “on” and the equivalent model of Figure N (6.27) can be

substituted.

i.e., VL = VZ

Situation 2. If VL VZ, the diode is “off” and the open circuit equivalent as shown below

in Figure N (6.28) is substituted.

R

+

+

Vi VZ VL RL

–

–

Figure N (6.28)

+ + +

VZ VZ VZ

– – –

“On” “Off”

By VL =

R L . Vi

=

1.2 k 16 V a f

R +R L 1k a 1.2 k f = 8.73 V

Since, V = 8.73 V is less than VZ = 10 V, the diode is in “off” state. So, in order to

calculate the parameter, substitute the open circuit equivalent.

VL = 8.73 V

VR = Vi – VL = 16 – 8.73 = 7.27 V

IZ = 0 A

PZ = VZ IZ = VZ . 0 = 0 W. Ans.

Problem 18. Determine the range of value of Vi that will maintain the zener diode in the

‘on’ state as shown in Figure N (6.29).

IR

R

+ +

IL

220 IZ

VI RL 1.2 k VL

VZ = 20 V

IZM = 60 mA

– –

Figure N (6.29)

Sol. For fixed values of RL, the voltage Vi must be sufficiently large to turn the zener

diode on. The minimum turn-on voltage Vi = Vi (min) is determined by relation,

RL

V L = VZ = . Vi (min)

RL R

or Vi (min) =

bR L R g .V Z

RL

or Vi (min) =

a1.20.220

. 20

f

1.2

or Vi (min) = 23.67 V

However, the maximum value of Vi is limited by the maximum zener current IZM.

Since IZM = IR – IL

IR (max) = IZM + IL

So, Vi (max) = VR (max) + VZ

or Vi (max) = IR (max) . R + VZ

or Vi (max) = (IZM + IL) . R + VZ

FG

= 60 mA +

20 V IJ . (0.22 k ) + 20

H 1.2 k K

= 16.87 + 20 = 36.87 V. Ans.

Problem 19. Check whether the zener diode of Figure N (6.30) operating in the breakdown

region.

270

+

+ +

18 V 10 V 1k VL

– –

–

Figure N (6.30)

Sol. The zener diode will be operated in the breakdown region if VL > VZ. Applying

potential divider method, we get,

1k

VL =

a270 1k f . 18 V

or VL = 14.2 V

Since, VZ (14.2 V) > VZ (10 V)

Hence, the zener diode is operating in the breakdown region. Ans.

Problem 20. Calculate the value of zener current as shown in Figure N (6.31).

A 250 B

+ IL

IZ

IR

Power +

supply 18 V 10 V 1k

–

–

Figure N (6.31)

18 10 8

IR = = 32 mA

250 250

10

IL = = 10 mA

1k

Apply KCL at node B. We get,

IR = IL + IZ

32 = 10 + IZ

or IZ = 32 – 10 = 22 mA. Ans.

Problem 21. Find the current flowing through the resistance R as shown in Figure N

(6.32).

I R

= 10 k IL = 1 mA

+ +

Vi = 20 V VZ = 10 V RL = 10 k VL

– –

Figure N (6.32)

VL =

FG 10 IJ . V = 10 . 20 = 10 V

H 10 10 K 20

i

I=

VI VZ

=

a20 10 Vf= 1 mA. Ans.

R 10 k

Problem. 22. (a) Determine VL, IL, IZ and IR for the network shown in Figure N (6.33)

if RL = 300 .

(b) Determine the value of RL that will establish maximum power conditions for the zener diode.

(c) Determine the minimum value of RL to ensure that the zener diode is in the “on” state.

R

IL

IR 200 IZ

+

+ +

Vi = 20 V 10 V = VZ RL VL

– –

–

PZ (max) = 400 mW

Figure N (6.33)

300

(a) VL = . 20

300 200

3

or VL =

. 20 = 12 V

5

Since VL > VZ, it means zener diode is “on”.

So, VL = VZ = 10 V

VL 10

IL = = = 33.333 mA

RL 300

Vi VZ 20 – 10 10

IR = = 50 mA

R 200 200

IZ = IR – IL

or IZ = 50 – 33.33

IZ = 16.67 mA. Ans.

(b) In order to ensure that the zener diode is in the “on” state.

VL VZ

RL

. VI VZ

RL R

RL

. 20 10

RL 200

2 RL RL + 200

RL 200

(RL)min = 200 . Ans.

Note : From the above result we conclude that the minimum value of RL to ensure that the

zener diode is in the “on” state is equal to the value of R.

Problem 23. The circuit diagram of a regulated power supply is shown in Figure N

(6.34). The zener diode characteristic is given by V Z = 8 + RIZ, where VZ and IZ are the

diode voltage and current respectively and RL = 10 ohms. If the maximum rated current of

zener diode is 0.2 A. Calculate the minimum value of Ri.

Ri

IZ

Unregulated

VZ RL

voltage = 15 v

Figure N (6.34)

Sol. For maximum current of 0.2 A, the voltage of zener diode is,

VZ = 8 + RIZ

= 8 + 10 0.2

= 10 V.

This maximum current is drawn where the regulated voltage of 15 V is regulated to 10

V. So, the load current is

10

IL (min) = = 1 A.

10

Given : IZ (max) = 0.2 A

Vi a max f VZ

so, Ri (min) =

I Z a max f I L a min f

15 10 5

= = 4.7 . Ans.

0.2 1.0 1.2

Problem 24. For the circuit of Figure N (6.35), find (a) the output voltage, (b) voltage

drop across RS and (c) the current through the zener diode.

RS = 5 K

+ +

12 V VZ = 8 V 10 K RL V0

– –

Figure N (6.35)

Sol. While trouble shooting zener regulator circuits, the first thing to check for its

breakdown operation of the zener diode. Because of the load resistor, the Thevenin voltage

driving the zener diode is less than the source voltage. See a zener regulator act as below :

RS = 5 K

+

VS = 12 V ± VZ = 8 V RL = 10 K V L = V0

–

Figure N (6.36)

RL 10

VL = VS or VL = . 12

RS R L 5 10

or VL = 8 V

For breakdown operation the zener diode must be greater than V Z.

But, here, V L = VZ = 8 V

So, zener diode will not be in the breakdown condition. Hence, no current will flow

through it and it will behave as open circuited as shown in following circuit.

RS = 5 K

+

VS = 12 V ± RL = 10 K V0 = VL

–

Figure N (6.37)

(b) Voltage drop across RS = VS – Vo = 12 – 8 = 4 V.

(c) Current through zener diodeIZ = 0. Ans.

Problem 25. Determine VZ, IZ, PZ for the following circuit :

RS = 1 K

+

IZ IL

VS = 16 V VZ = 10 V RL = 1.2 K V0 = VL

Pzm = 300 mW

–

Figure N (6.38)

Sol. First of all we will check whether the zener diode conduct or not.

RL

VL = VS

RS R L

1.2

or VL = 16

1 1.2

or VL = 8.72 V

as VL < VZ, so diode will not conduct.

No, current will flow through diode.

i.e., IZ = 0

PZ = 0

Vo = VL = 8.72 V. Ans.

Problem 26. For the circuit shown in Figure N (6.39), determine V L, IL, IZ and IR with

RL = 200 ohm and RL = 200 ohm. Comment on the operation of the circuit. Vin = 20 V,

VZ = 10 V, PZ, max = 400 mW and RS = 220 ohm.

IR RS +

IZ IL

Vin RL VL

–

Figure N (6.39)

Checking for the operation of zener diode.

The diode is open circuited and VL is calculated

RL 200

VL = Vin = 20 = 9.52 volts.

RS R I 220 200

as this value VL < VZ i.e., 10 volts.

Zener breakdown cannot occur and diode will remain in off state so

IZ = 0

Vin 20 V 20

and IR = IL = Amp.

RS RL a f

220 200 ohms 420

so, IR = IL = 47.62 m amp.

VL = 9.52 volts.

IZ = 0.

When RL = 50 ohm.

Checking for the operating of zener diode

RL 50

VL = Vin = 20 = 3.7 volts

RS R L 220 50

Which is less than VZ = 10 volts.

So, zener diode remains off. Hence, IZ = 0

Vin 20

and IR = IL = = 74.1 m amp.

RS RL 220 50

IZ = 0.

VL = 3.7 volts. Ans.

2. Differentiate between regulated and unregulated power supply.

3. What is the need for unregulated power supply ?

4. What does the term voltage-regulation mean ?

5. Draw the block-diagram of a regulated power supply and explain each block in detail.

6. What is filter ? Clearly explain its significance in a regulated power supply system.

7. What is the idea used in classifying rectifier circuit as a half wave rectifier and full wave

rectifier ?

8. Draw the circuit diagram of a full wave rectifier using two diodes and calculate (i) Idc , (ii) Irms ,

(iii) Ripple factor, (iv) Efficiency, (v) PIV rating of diode.

9. Draw a neat diagram of a full wave rectifier bridge circuit. Explain its working in details

clearly making direction of flow of currents for positive and negative cycles showing inputs and

output wave forms.

10. For a full wave bridge rectifier calculate the terms mentioned in problem 8.

11. What do you mean by ripples and ripples factor ?

12. What is a pulsating dc output ?

13. Find out the ripple factor for HWR circuit and compare it with that of FWR.

14. Compare half wave, full wave bridge and centre tap rectifiers.

15. What are the main functions of a filter ? Compare L-section and inductor filter.

16. Clearly explain the filtering action of an inductor and a capacitor.

17. What is a bleeder resistance ? And why it is used ?

18. Write short notes on the following :

(a) PIV of a diode (b) Ripple factor

(c) Voltage regulation (d) Bleeder resistance

(e) Centre tap transformer (CTT) (f) DC power supply

(g) Choke input filter (h) Capacitor filter

(i) Diode rating.

EC-202 ANALOG

ELECTRONICS/APPLIED

ELECTRONICS (NEW)

(B.Tech., 4th Semester, 2056)

Time: 3 Hours Maximum Marks: 60

1. (a) A single stage amplifier has a gain of 60. The collector load Rc = 500 and the

input impedance is 1 k . Calculate the over all gain when two such stages are

cascaded through R-C coupling.

(b) Draw the circuit of push-pull amplifier? Explain why is it called push-pull?

(c) Discuss crossover distortion.

(d) Compare RC phase shift and crystal oscillator.

(e) Discuss the advantages of Push-pull amplifier.

(f) The voltage gain of an amplifier without feed back is 3000. Calculate the voltage

gain of the amplifier is negative feed back is introduced in the circuit. Given that

feed back fraction m = 0.01.

(g) How that negative feed back changes the impedances? (Explain with mathematical

expression).

(h) In an amplifier, RAC (a.c. load) is 100 , Rin is 50 , and is 50 and is 50.

Calculate the power gain. What is its relation with current gain?

(i) Discuss the V-I characteristics of Zener diode?

(j) Draw the equivalent circuit of zener diode as voltage regulator and explain.

2. Classify amplifiers and discuss in detail.

3. With circuit diagram explain current-series feed back.

4. Explain line and load regulation.

5. Explain the functioning of a push-pull amplifier?

6. In detail discuss Hartley oscillator.

Answer any two (2 10 = 20)

7. What is Barkhausen Criterion? What do you mean by frequency stability and stability

criterion in an oscillator? Explain the Wien bridge oscillator in detail. (2 + 3 + 5)

8. What are the different types of Feedback? With help of diagram explain a RC coupled

amplifier. Discuss its gain response. (3 + 5 + 2)

9. Write notes on:

(a) h-parameters

(b) Thermal runaway

(c) Stagger tuned amplifier

(d) voltage regulator. (2 1 2 4 = 10)

EC-202

ANALOG ELECTRONICS (NEW)

(B.Tech., 4th Semester, 2055)

Time: 3 Hours Maximum Marks : 60

Note: Section A is compulsory. Attempt any Four questions from Section B and any Two questions from

Section C.

Marks: 2 Each

1. (a) Draw the high frequency equivalent circuit of CE transition.

(b) Why does RC coupling give constant gain over mid-frequency range?

(c) Explain the difference between a voltage and a power amplifier.

(d) What is crossover distortion? Explain in brief.

(e) Show that maximum collector efficiency of class A transformer coupled power

amplifier is 50%.

(f) Why is negative feedback employed in high gain amplifiers?

(g) What are practical applications of emitter follower?

(h) Why is crystal oscillator used in radio transmitter?

(i) Why is –ve feedback provided in Wein-bridge oscillator?

(j) How does zener diode maintain constant voltage across load in the breakdown

region?

Marks: 5 Each

2. Explain hybrid pi CE transistor model in detail.

3. Explain the push-pull amplifier circuit in detail with a neat diagram.

4. The gain and distortion of an amplifier are 150 and 5% respectively without feedback. If

the stage has 10% of its output voltage applied as negative feedback, find the distortion

of the amplifier with feedback.

5. A transformer coupling is used in the final stage of a multistage amplifier. If the output

impedance of transistor is 1 k and the speaker has a resistance of 10 , find the turn

ratio of the transformer so that maximum power is transferred to the load.

6. Explain a current shunt feedback circuit and perform a suitable analysis.

Marks: 10 Each

7. What do you understand by class A, class B and class C power amplifier? Define and

explain the following terms as applied to power amplifiers:

(a) Collector efficiency

(b) Distortion

(c) Power dissipation capability.

8. (a) A zener regulator has Vz = 15 V. The input voltage may vary from 22 to 40 V and

load current from 20 to 100 mA. To hold load voltage constant under all conditions,

what should be the value of series resistance?

(b) Explain the working of a Colpitts oscillator with a neat diagram.

9. (a) Derive an expression for the gain of negative voltage feedback amplifier.

(b) A multistage amplifier consists of three stages. The voltage gain of stages are 60,

100 and 160. Calculate the overall gain in db.

Index

A Controlled current source (gm Vb'•) 17

Conversion efficiency 55

Amplifier coupling 90

Coupling 91

Avalanche multiplication 233

Crystal oscillator 189

B Crystal oscillators 170

Current amplifier 144

Bandpass of cascaded stages 89

Current gain 7

Bandwidth of RLC (tuned series circuits) 117

Current law (kcl) 4

Bark hausen criterion 173

Cut-offfrequency 35

Base spreading resistance (rbb'): 17

Basic concept of feedback 132

D

Bleeder resistance 227

Damped oscillations 171

Bootstrapping 113

Darlington connection 109

Breakdown mechanism 231

Direct coupled amplifier 105

Bridge network 205

Direct coupling 91

c Distortion in amplifiers 50

Double tuned voltage amplifier 122

Capacitor 218

Dual miller' s theorem 153

Capacitor input or 7t-filter 223

Cascade amplifier 88

E

Cenrer tapped transformer full-wave rectifier

Effect of coupling capacitor on low frequency

cin::uit 207

response 107

Choke coil 55

Effect of negative feedback on amplifier input

Choke input or L-section filter 221 impedance 149

Cirt::nit components 193 Effect of negative feedback on amplifier noise

Class A amplifier 55 and distortion 149

Class-A push-pull amplifier 58 Effect of negative feedback on amplifier output

C -A8 a.ffiplifier 50, 52 impedance 150

Clas.s-AB operation and cross-over Effect of negative feedback on bandwidth and

nion 67 frequency response 151

-8 amplifier 50, 52, 61 Effect of negative feedback on stability 148

-8 push pull amplifier 63 Effect of source resistance on frequency

-C amplifier 50, 52, 62 response 30

137 Effects of feedback circuits 148

.......~...if

efficiency 55

Efficiency 213

oscillator 187,188

Electrical equivalent circuit of a crystal 190

Co~lc:miClltary symmetry push-pull

Emitter follower 107

66

278 Analog Electronics

F Inductor 218

Feedback factor 135

K

Feedback in amplifier 132

Feedback network 146 Kirchoff s voltage law 4

Feedback ratio 135

L

Form factor 213

Frequency distortion 50 Large signal amplifiers 46

Frequency response of an amplifier 24 Limitation ofRC oscillators 189

Frequency stability of oscillator 193 Load regulation 243

Full wave rectifier 205 Loop gain 135

Low frequency range analysis 93

G Lower cut-off frequency (f1) 96

Gain bandwidth 152

Gain bandwidth product 26 M

General hybrid equivalent circuit 4 Maximum forward current rating 217

Maximum power rating 217

H Mid-frequency range analysis 93

H-parameters 2, 3 Miller effect 95

Half wave rectifier 203 Miller's theorem 29, 152, 154

Harmonic distortion 51 Multistage amplifier 87, 91

Hartley and colpitts oscillator 182

Hartley oscillator 182 N

Heat-sink 70