Compal La-7551p r1.0 Schematics PDF

A B C D E
1 1
Compal Confidential
2 2
QBL50 Schematics Document

AMD Sabine
APU Llano / Hudson M2_M3 / Vancouver Whistler
UMA only / PX Muxless with BACO
3 3
2011-04-25
Rev:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/03/04 Deciphered Date 2011/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QBL50 LA-7551P
Date: Wednesday, April 27, 2011 Sheet 1 of 53
A B C D E
A B C D E
Compal Confidential
Model Name : QBL50
1
VRAM 1G/2G
128M16 x 4/8
page 23, 24
Sabine 1
DDR3
Thermal Sensor ATI Vancuver Whistler GFX x 8 Gen2
ADM1032
page 19
uFCBGA-962 GFX x 4
AMD FS1 APU Memory BUS(DDR3)
Page 18~22 204pin DDRIII-SO-DIMM X2
APU HDMI Dual Channel
(UMA / Muxless) Llano BANK 0, 1, 2, 3 Page 11,12
1.5V DDRIII 800~1333MHz
DP x1 (DP0 TXP/N0)
uPGA-722 Package
HDMI Conn.
page 28
Travis LVDS Page 6~10
LVDS
2 LVDS Conn. Translator DP x 4
2
page 26 P_GPP x 2
Reserve eDP GEN1 (DP1 TXP/N 0~4) UMI
page 27 USB2 USB2/ USB2 CMOS Mini Card Card Reader
USB3.0 (LS-7322P) Camera RTS5137
(with BT)
page 34 page 34 page 30 page 27 page 32 page 31
CRT Conn. FCH CRT (VGA DAC) Port 0 Port 10 Port 5 Port2 Port 3 Port 4
page 27 FCH USB
3.3V 48MHz
GPP1 GPP0
Hudson-M2/M3
HD Audio 3.3V 24.576MHz/48Mhz
uFCBGA-656
MINI Card 1 LAN(GbE) S-ATA Gen2
WLAN RTL8111E-VL Page 13~17
page 32 page 29
LPC BUS port 0 port 1
3 3
SATA HDD1 ODD HDA Codec

RJ45
page 29 Conn. Conn. ALC269 page
page 33 page 33 30
ENE KB930
page 36
Touch Pad Int.KBD

LED page 38 page 38
page 37
RTC CKT.
External board
4
page 25 4
LS-7321P
page 35
DC/DC Power/B
Interface CKT.page 39
BIOS ROM Security Classification Compal Secret Data Compal Electronics, Inc.
2011/03/04 2011/12/31 Title
LS-7322P Issued Date Deciphered Date
Block Diagrams
Power Circuit Audio BD EC BIOS (2M) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
B
Document Number Rev
1.0
page 40~48 page 30 page 35 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QBL50 LA-7551P
A B C D E
5 4 3 2 1
CLOCK DISTRIBUTION DISPLAY DISTRIBUTION

: LVDS PATH
: APU HDMI PATH

LVDS CONN
B_SODIMM
D A_SODIMM D
TXOUT[0:2]+/-
TXCLK+/-
TZOUT[0:2]+/-
TZCLK+/-
I2CC_SCL/DA
AMD R
ATI VGA
MEM_MB_CLK7_P/N
MEM_MB_CLK1_P/N
MEM_MA_CLK7_P/N
MEM_MA_CLK1_P/N
1066~1600MHz
1066~1600MHz
Whistler
APU_TXOUT[0:2]+/-
APU_TXOUT_CLK+/-
CLK_PEG_VGAP/N APU_TZOUT[0:2]+/-
APU_TZOUT_CLK+/-
100MHz APU_LVDS_CLK/DATA
APU_DISP_CLKP/N
C
AMD 100MHz AMD LVDS_OUT C
RTD2132
CPU FS1 SOCKET
FCH DP_IN
APU_CLKP/N Hudson-M2/M3
100MHz Internal CLK GEN
DP0_AUX GPP_CLK
100MHz
LVDS Transtator 32.768KHz 25MHz
DP0_TXP/N[0:1]
DP0_AUXP/N
B B
GPP1 GPP0 DP0
WLAN GbE LAN APU VGA
Mini PCI Socket PCIE_GFX[0:7] C PCIE_GFX[0:7]
DP1 PCIE_GFX[12:15] C
25MHz
FCH
LS
R
A A
CRT CONN HDMI CONN
Security Classification Compal Secret Data

CLOCK / DISPLAY DISTRIBUTION
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom QBL50 LA-7551P 1.0
Date: W ednesday, April 27, 2011 Sheet 3 of 53
5 4 3 2 1
A B C D E
Voltage Rails
SIGNAL
Power Plane Description S1 S3 S5 STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
VIN Adapter power supply (19V) N/A N/A N/A Full ON HIGH HIGH HIGH ON ON ON ON
B+ AC or battery power rail for power circuit. N/A N/A N/A
S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
+CPU_CORE Core voltage for CPU ON OFF OFF
1
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF 1
+CPU_CORE_NB Voltage for On-die VGA of APU ON OFF OFF

S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
+VGA_CORE 0.95-1.2V switched power rail ON OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON ON OFF S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
+1.0VSG 1.0V switched power rail for VGA ON OFF OFF
+1.1ALW 1.1V switched power rail for FCH ON ON ON*
+1.1VS 1.1V switched power rail for FCH ON OFF OFF
+1.2VS 1.2V switched power rail for APU ON OFF OFF
+1.5V 1.5V power rail for CPU VDDIO and DDR ON ON OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8VSG 1.8V switched power rail ON OFF OFF
+2.5VS 2.5V for CPU_VDDA ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+LAN_IO 3.3V power rail for LAN ON ON ON
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
2
+5VS 5V switched power rail ON OFF OFF 2
+VSB VSB always on power rail ON ON ON*

+RTCVCC RTC power ON ON ON
BTO Option Table M3@ U25
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOM Structure BTO Item
VGA@ Use VGA (Mux)
X76@ VRAM ID Table FCH M3
Part Number = SA000043ID0
M2@ Use Hudson-M2
M3@ Use Hudson-M3 BOM Config
USB30@ USB30 on M/B
USB20@ USB20 on M/B
x = 1 is read cmd, x= 0 is writee cmd.
External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts
3 3
EC SM Bus1 address EC SM Bus2 address

Device Address HEX Device Address HEX
Smart Battery 0001 011X b 16H ADI ADM1032 (VGA) 1001 101X b 9AH
(APU)
RTD2132S (TL)
FCH FCH
4 SM Bus 0 address SM Bus 1 address 4
Device Address HEX Device Address HEX

DDR DIMM1 1101 000X b D0
DDR DIMM2 1101 001X b D2
Notes List
B 1.0
QBL50 LA-7551P
Date: Friday, April 29, 2011 Sheet 4 of 53
A B C D E
5 4 3 2 1
AMD APU FS1

BATTERY BATT+ PU101 PU201
+CPU_CORE +CPU_CORE 0.7~1.475V VDD CORE 54A
12.6V CHARGER ISL6267HRZ-T
+CPU_CORE_NB +CPU_CORE_NB 0.7~1.475V VDDNB 27.5A
+2.5VS +2.5VS +2.5VS VDDA 500mA
+1.5V
+1.5V +1.5V VDDIO 4.6A
PU501
AC ADAPTOR VIN +1.2VS +1.2VS VDDR 6.7A
D RT8209MGQW PU603
D
19V 90W
APL5508-25DC
RAM DDRIII SODIMMX2
PU801 +1.2VS +1.5V VDD_MEM 4A
RT8209MGQW VTT_MEM 0.5A
B+ +0.75VS
PU601 +0.75VS +0.75VS
APL5336KAI
VGA ATI
Whistler/Seymour/Granville
PU901 +VGA_CORE +VGA_CORE
RT8237CZQW 0.85~1.1V VDDC 47A
+VDDCI 0.9~1.0V VDDCI 4.6A
DPLL_VDDC: 125 mA
PU602 +1.0VSG +1.0VSG SPV10: 120 mA
APL5930KAI +1.0VSG PCIE_VDDC: 2000 mA
DP[A:E]_VDD10: 680 mA
VRAM 1GB/2GB
U41 +1.5VSG +1.5VSG
+1.5VSG VDDR1: 3400 mA 64M / 128Mx16 * 4 / 8
AO4430L
PU701 +1.1VALW
RT8209MGQW PLL_PVDD: 75 mA +1.5VSG 2.4 A
TSVDD: 20 mA
AVDD: 70 mA
C VDD1DI: 100 mA C
VDD2DI: 50 mA
A2VDDQ: 1.5 mA
PU301 +3VALW
PU401 +1.8VSG +1.8VSG VDD_CT: 110 mA
RT8205LZQW U40 +1.8VSG VDDR4: 170 mA
+5VALW SY8033BDBC PCIE_PVDD: 40 mA
SI4800
MPV18: 150 mA
SPV18: 75 mA
PCIE_VDDR: 400 mA
DP[A:F]_VDD18: 920 mA
DP[A:F]_PVDD: 120 mA
+INVPWR_B+
+3VS
PJ14 +3VSG +3VSG A2VDD: 130 mA
+3VSG VDDR3: 60 mA
U33
SI4800
LCD panel
FCH AMD Hudson M2/M3
15.6"
VDDPL_11_DAC: 7 mA
U39 VDDAN_11_ML: 226 mA
B+ 300mA AO4430L VDDCR_11: 1007 mA
+1.1VS +1.1VS +1.1VS
+3.3 350mA VDDAN_11_CLK: 340 mA
VDDAN_11_PCIE: 1088 mA
VDDAN_11_SATA: 1337 mA
VDDAN_11_USB_S: 140 mA
FAN Control VDDCR_11_USB_S: 197 mA
+1.1VALW
B
APL5607 VDDAN_11_SSUSB_S: 282 mA B
+1.1VALW
VDDCR_11_SSUSB_S: 424 mA
+5VS
VDDCR_11_S: 187 mA
+5VS 500mA VDDPL_11_SYS: 70 mA
+5VALW VDDIO_33_PCIGP: 131 mA

U54/U55 VDDPL_33_SYS: 47 mA
AP2301MPG +USB_VCCA VDDPL_33_DAC: 20 mA
+USB_VCCB
+3VS VDDPL_33_ML: 20 mA
+3VS +3VS VDDAN_33_DAC: 200 mA
VDDPL_33_PCIE: 43 mA
USB X3 VDDPL_33_SATA: 93 mA
+1.5VS
VDDIO_AZ_S: 26 mA
+5V
Dual+1
2.5A +3VALW VDDPL_33_SSUSB_S: 20 mA
+3VALW VDDPL_33_USB_S: 17 mA
+3VALW VDDAN_33_USB_S: 658 mA
VDDIO_33_S: 59 mA
VDDXL_33_S: 5 mA
SATA Audio Codec EC LAN VDDAN_33_HWM_S: 12 mA
HDD*2 ALC269-GR ENE KB930 RTL8111E Mini Card
ODD*1
VDDIO_33_GBE_S
+5V 3A +5V 45mA +3.3VALW 30mA +3.3VALW 201mA +1.5VS 500mA VDDCR_11_GBE_S
+3.3VS 3mA +3.3VS 1A GND VDDIO_GBE_S
+3.3V +3.3VS 25mA +3.3VALW 330mA
RTC
A RTC BAT VDDBT_RTC_G A
Bettary

POWER DELIVERY CHART
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom QBL50 LA-7551P 1.0
5 4 3 2 1
A B C D E
18 PCIE_GTX_C_FRX_P[0..7] PCIE_FTX_C_GRX_P[0..7] 18 APU To HDMI

18 PCIE_GTX_C_FRX_N[0..7] PCIE_FTX_C_GRX_N[0..7] 18
PCIE_FTX_GRX_P[12..15] 28
JCPU1A CONN@
PCI EXPRESS PCIE_FTX_GRX_N[12..15] 28

PCIE_GTX_C_FRX_P0 AA8 AA2 PCIE_FTX_GRX_P0 C917VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_P0
P_GFX_RXP0 P_GFX_TXP0
PCIE_GTX_C_FRX_N0 AA9 AA3 PCIE_FTX_GRX_N0 C918VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_N0
P_GFX_RXN0 P_GFX_TXN0
PCIE_GTX_C_FRX_P1 Y7 Y2 PCIE_FTX_GRX_P1 C919VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_P1
1 PCIE_GTX_C_FRX_N1 PCIE_FTX_GRX_N1 C920VGA@ PCIE_FTX_C_GRX_N1 1
Y8 Y1 1 2 0.1U_0402_16V7K
PCIE_GTX_C_FRX_P2 W5 Y4 PCIE_FTX_GRX_P2 C921VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_P2
PCIE_GTX_C_FRX_N2 W6 Y5 PCIE_FTX_GRX_N2 C922VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_N2
PCIE_GTX_C_FRX_P3 W8 W2 PCIE_FTX_GRX_P3 C923VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_P3
For UMA Mux.
PCIE_GTX_C_FRX_N3 W9 W3 PCIE_FTX_GRX_N3 C924VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_N3
PCIE_GTX_C_FRX_P4 V7 V2 PCIE_FTX_GRX_P4 C925VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_P4
PCIE_GTX_C_FRX_N4 V8 V1 PCIE_FTX_GRX_N4 C926VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_N4
PCIE_GTX_C_FRX_P5 U5 V4 PCIE_FTX_GRX_P5 C927VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_P5
PCIE_GTX_C_FRX_N5 U6 V5 PCIE_FTX_GRX_N5 C928VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_N5
PCIE_GTX_C_FRX_P6 U8 U2 PCIE_FTX_GRX_P6 C929VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_P6
GRAPHICS
PCIE_GTX_C_FRX_N6 U9 U3 PCIE_FTX_GRX_N6 C930VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_N6
PCIE_GTX_C_FRX_P7 T7 T2 PCIE_FTX_GRX_P7 C931VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_P7
PCIE_GTX_C_FRX_N7 T8 T1 PCIE_FTX_GRX_N7 C932VGA@ 1 2 0.1U_0402_16V7K PCIE_FTX_C_GRX_N7
R5 T4
R6 P_GFX_RXN8 P_GFX_TXN8 T5
CPU TSI interface level shift
R8 P_GFX_RXP9 P_GFX_TXP9 R2 BSH111, the Vgs is:
2 min = 0.4V 2
R9 R3 C935 1 2 0.1U_0402_16V4Z
P_GFX_RXN9 P_GFX_TXN9 Max = 1.3V
P7 P2
+3VS 1 R535 2 1 R536 2
P8 P1
P_GFX_RXN10 P_GFX_TXN10 31.6K_0402_1% 30K_0402_1%
N5 P4
N6 P_GFX_RXN11 P_GFX_TXN11 P5
2
G
Q9
PCIE_FTX_GRX_P12 R537
N8 N2
P_GFX_RXP12 P_GFX_TXP12 APU_SID 3 EC_SMB_DA
PCIE_FTX_GRX_N12
2 8,14 APU_SID 1 1 2 EC_SMB_DA2 19,36
D
N9 P_GFX_RXN12 P_GFX_TXN12 N3
PCIE_FTX_GRX_P13 BSH111 1N_SOT23-3 0_0402_5%
M7 P_GFX_RXP13 P_GFX_TXP13 M2
1
M8 P_GFX_RXN13 P_GFX_TXN13 M1 PCIE_FTX_GRX_N13 To EC
To HDMI
2
G
L5 M4 PCIE_FTX_GRX_P14 Q10
P_GFX_RXP14 P_GFX_TXP14 R538
PCIE_FTX_GRX_N14
0 APU_SIC 3 EC_SMB_CK
L6 M5 8,14 APU_SIC 1 1 2 EC_SMB_CK2 19,36
D
L8 L2 PCIE_FTX_GRX_P15
P_GFX_RXP15 P_GFX_TXP15 BSH111 1N_SOT23-3 0_0402_5%
PCIE_FTX_GRX_N15
CK
L9 L3
AC5 AD4 PCIE_FTX_DRX_P0 C950 1 2 0.1U_0402_16V7K

29 PCIE_DTX_C_FRX_P0 P_GPP_RXP0 P_GPP_TXP0 PCIE_FTX_C_DRX_P0 29
GLAN
AC6 AD5 PCIE_FTX_DRX_N0 C951 1 2 0.1U_0402_16V7K
29 PCIE_DTX_C_FRX_N0 P_GPP_RXN0 P_GPP_TXN0 PCIE_FTX_C_DRX_N0 29
3 PCIE_FTX_DRX_P1 C952 1 3
32 PCIE_DTX_C_FRX_P1 AC8 P_GPP_RXP1 P_GPP_TXP1 AC2 2 0.1U_0402_16V7K PCIE_FTX_C_DRX_P1 32
WLAN
PCIE_FTX_DRX_N1 C953 1 2 0.1U_0402_16V7K
GPP
32 PCIE_DTX_C_FRX_N1 AC9 P_GPP_RXN1 P_GPP_TXN1 AC3 PCIE_FTX_C_DRX_N1 32

AB7 AB2
P_GPP_RXP2 P_GPP_TXP2
AB8 AB1
P_GPP_RXN2 P_GPP_TXN2
AA5 AB4
P_GPP_RXP3 P_GPP_TXP3
AA6 AB5
P_GPP_RXN3 P_GPP_TXN3 Power Sequence of APU
AF8 AF1 UMI_FTX_MRX_P0 C956 1 2 0.1U_0402_16V7K
+1.5V
13 UMI_MTX_C_FRX_P0 P_UMI_RXP0 P_UMI_TXP0 UMI_FTX_C_MRX_P0 13
AF7 AF2 UMI_FTX_MRX_N0 C957 1 2 0.1U_0402_16V7K
13 UMI_MTX_C_FRX_N0 P_UMI_RXN0 P_UMI_TXN0 UMI_FTX_C_MRX_N0 13
+2.5VS Group A
UMI-LINK
AE6 AF5 UMI_FTX_MRX_P1 C958 1 2 0.1U_0402_16V7K

AE5 AF4 UMI_FTX_MRX_N1 C959 1 2 0.1U_0402_16V7K
AE9 AE3 UMI_FTX_MRX_P2 C960 1 2 0.1U_0402_16V7K
+1.5VS
AE8 AE2 UMI_FTX_MRX_N2 C961 1 2 0.1U_0402_16V7K
AD8 AD1 UMI_FTX_MRX_P3 C962 1 2 0.1U_0402_16V7K
+CPU_CORE
AD7 AD2 UMI_FTX_MRX_N3 C963 1 2 0.1U_0402_16V7K
Group B
+1.2VS 1 2 P_ZVDDP K5 K4 P_ZVSS 1 2
+CPU_CORE_NB
4 R539 196_0402_1% P_ZVDDP P_ZVSS R540 196_0402_1% 4
AMD_TOPEDO_FS-1
+1.2VS

AMD FS1 PCIE / UMI / TSI
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
1 1
JCPU1B CONN@ JCPU1C CONN@
11 DDRA_SMA[15..0] MEMORY CHANNEL A DDRA_SDQ[63..0] 11 12 DDRB_SMA[15..0] MEMORY CHANNEL B DDRB_SDQ[63..0] 12

DDRA_SMA0 U20 E13 DDRA_SDQ0 DDRB_SMA0 T27 A14 DDRB_SDQ0
DDRA_SMA1 MA_ADD0 MA_DATA0 DDRA_SDQ1 DDRB_SMA1 MB_ADD0 MB_DATA0 DDRB_SDQ1
R20 MA_ADD1 MA_DATA1 J13 P24 MB_ADD1 MB_DATA1 B14
DDRA_SMA2 R21 H15 DDRA_SDQ2 DDRB_SMA2 P25 D16 DDRB_SDQ2
P22 J15 N27 E16
P21 H13 N26 B13
N24 MA_ADD5 MA_DATA5 F13 M28 MB_ADD5 MB_DATA5 C13
DDRA_SMA6 N23 F15 DDRA_SDQ6 DDRB_SMA6 M27 B16 DDRB_SDQ6
N20 E15 M24 A16
DDRA_SMA8 MA_ADD7 MA_DATA7 DDRB_SMA8 MB_ADD7 MB_DATA7
N21 M25
DDRA_SMA9 MA_ADD8 DDRA_SDQ8 DDRB_SMA9 MB_ADD8 DDRB_SDQ8
M21 MA_ADD9 MA_DATA8 H17 L26 MB_ADD9 MB_DATA8 C17
DDRA_SMA10 U23 F17 DDRA_SDQ9 DDRB_SMA10 U26 B18 DDRB_SDQ9
M22 MA_ADD11 MA_DATA10 E19 L27 MB_ADD11 MB_DATA10 B20
DDRA_SMA12 L24 J19 DDRA_SDQ11 DDRB_SMA12 K27 A20 DDRB_SDQ11
AA25 G16 W26 E17
L21 MA_ADD14 MA_DATA13 H16 K25 MB_ADD14 MB_DATA13 B17
DDRA_SMA15 L20 H19 DDRA_SDQ14 DDRB_SMA15 K24 B19 DDRB_SDQ14
MA_ADD15 MA_DATA14 DDRA_SDQ15 MB_ADD15 MB_DATA14 DDRB_SDQ15
F19 C19
DDRA_SBS0# MA_DATA15 DDRB_SBS0# MB_DATA15
11 DDRA_SBS0# U24 12 DDRB_SBS0# U27
DDRA_SBS1# MA_BANK0 DDRA_SDQ16 DDRB_SBS1# MB_BANK0 DDRB_SDQ16
11 DDRA_SBS1# U21 MA_BANK1 MA_DATA16 H20 12 DDRB_SBS1# T28 MB_BANK1 MB_DATA16 C21
DDRA_SBS2# L23 F21 DDRA_SDQ17 DDRB_SBS2# K28 B22 DDRB_SDQ17
11 DDRA_SBS2# MA_BANK2 MA_DATA17 12 DDRB_SBS2# MB_BANK2 MB_DATA17
J23 DDRA_SDQ18 C23 DDRB_SDQ18
11 DDRA_SDM[7..0] DDRA_SDM0 MA_DATA18 DDRA_SDQ19 12 DDRB_SDM[7..0] DDRB_SDM0 MB_DATA18 DDRB_SDQ19
E14 H23 D14 A24
DDRA_SDM1 MA_DM0 MA_DATA19 DDRA_SDQ20 DDRB_SDM1 MB_DM0 MB_DATA19 DDRB_SDQ20
J17 G20 A18 D20
E21 MA_DM2 MA_DATA21 E20 A22 MB_DM2 MB_DATA21 B21
DDRA_SDM3 F25 G22 DDRA_SDQ22 DDRB_SDM3 C25 E23 DDRB_SDQ22
AD27 MA_DM4 MA_DATA23 H22 AF25 MB_DM4 MB_DATA23 B23
DDRA_SDM5 AC23 DDRB_SDM5 AG22
2 DDRA_SDM6 MA_DM5 DDRA_SDQ24 DDRB_SDM6 MB_DM5 DDRB_SDQ24 2
AD19 MA_DM6 MA_DATA24 G24 AH18 MB_DM6 MB_DATA24 E24
DDRA_SDM7 AC15 E25 DDRA_SDQ25 DDRB_SDM7 AD14 B25 DDRB_SDQ25
MA_DM7 MA_DATA25 DDRA_SDQ26 MB_DM7 MB_DATA25 DDRB_SDQ26
G27 B27
DDRA_SDQS0 MA_DATA26 DDRA_SDQ27 DDRB_SDQS0 MB_DATA26 DDRB_SDQ27
11 DDRA_SDQS0 G14 MA_DQS_H0 MA_DATA27 G26 12 DDRB_SDQS0 C15 MB_DQS_H0 MB_DATA27 D28
DDRA_SDQS0# H14 F23 DDRA_SDQ28 DDRB_SDQS0# B15 B24 DDRB_SDQ28
11 DDRA_SDQS0# DDRA_SDQS1 MA_DQS_L0 MA_DATA28 DDRA_SDQ29 12 DDRB_SDQS0# DDRB_SDQS1 MB_DQS_L0 MB_DATA28 DDRB_SDQ29
11 DDRA_SDQS1 G18 MA_DQS_H1 MA_DATA29 H24 12 DDRB_SDQS1 E18 MB_DQS_H1 MB_DATA29 D24
DDRA_SDQS1# H18 E28 DDRA_SDQ30 DDRB_SDQS1# D18 D26 DDRB_SDQ30
11 DDRA_SDQS1# DDRA_SDQS2 MA_DQS_L1 MA_DATA30 DDRA_SDQ31 12 DDRB_SDQS1# DDRB_SDQS2 MB_DQS_L1 MB_DATA30 DDRB_SDQ31
11 DDRA_SDQS2 J21 MA_DQS_H2 MA_DATA31 F27 12 DDRB_SDQS2 E22 MB_DQS_H2 MB_DATA31 C27
DDRA_SDQS2# H21 DDRB_SDQS2# D22
11 DDRA_SDQS2# DDRA_SDQS3 MA_DQS_L2 DDRA_SDQ32 12 DDRB_SDQS2# DDRB_SDQS3 MB_DQS_L2 DDRB_SDQ32
11 DDRA_SDQS3 E27 MA_DQS_H3 MA_DATA32 AB28 12 DDRB_SDQS3 B26 MB_DQS_H3 MB_DATA32 AG26
DDRA_SDQS3# E26 AC27 DDRA_SDQ33 DDRB_SDQS3# A26 AH26 DDRB_SDQ33
11 DDRA_SDQS3# MA_DQS_L3 MA_DATA33 12 DDRB_SDQS3# MB_DQS_L3 MB_DATA33
DDRA_SDQS4 AE26 AD25 DDRA_SDQ34 DDRB_SDQS4 AG24 AF23 DDRB_SDQ34
11 DDRA_SDQS4 DDRA_SDQS4# MA_DQS_H4 MA_DATA34 DDRA_SDQ35 12 DDRB_SDQS4 DDRB_SDQS4# MB_DQS_H4 MB_DATA34 DDRB_SDQ35
11 DDRA_SDQS4# AD26 MA_DQS_L4 MA_DATA35 AA24 12 DDRB_SDQS4# AG25 MB_DQS_L4 MB_DATA35 AG23
DDRA_SDQS5 AB22 AE28 DDRA_SDQ36 DDRB_SDQS5 AG21 AG27 DDRB_SDQ36
11 DDRA_SDQS5 DDRA_SDQS5# MA_DQS_H5 MA_DATA36 DDRA_SDQ37 12 DDRB_SDQS5 DDRB_SDQS5# MB_DQS_H5 MB_DATA36 DDRB_SDQ37
11 DDRA_SDQS5# AA22 MA_DQS_L5 MA_DATA37 AD28 12 DDRB_SDQS5# AF21 MB_DQS_L5 MB_DATA37 AF27
DDRA_SDQS6 AB18 AB26 DDRA_SDQ38 DDRB_SDQS6 AG17 AH24 DDRB_SDQ38
11 DDRA_SDQS6 MA_DQS_H6 MA_DATA38 12 DDRB_SDQS6 MB_DQS_H6 MB_DATA38
DDRA_SDQS6# AA18 AC25 DDRA_SDQ39 DDRB_SDQS6# AG18 AE24 DDRB_SDQ39
11 DDRA_SDQS6# DDRA_SDQS7 MA_DQS_L6 MA_DATA39 12 DDRB_SDQS6# DDRB_SDQS7 MB_DQS_L6 MB_DATA39
11 DDRA_SDQS7 AA14 MA_DQS_H7 12 DDRB_SDQS7 AH14 MB_DQS_H7
DDRA_SDQS7# AA15 Y23 DDRA_SDQ40 DDRB_SDQS7# AG14 AE22 DDRB_SDQ40
11 DDRA_SDQS7# MA_DQS_L7 MA_DATA40 DDRA_SDQ41 12 DDRB_SDQS7# MB_DQS_L7 MB_DATA40 DDRB_SDQ41
AA23 AH22
DDRA_CLK0 MA_DATA41 DDRA_SDQ42 DDRB_CLK0 MB_DATA41 DDRB_SDQ42
11 DDRA_CLK0 T21 Y21 12 DDRB_CLK0 R26 AE20
DDRA_CLK0# MA_CLK_H0 MA_DATA42 DDRA_SDQ43 DDRB_CLK0# MB_CLK_H0 MB_DATA42 DDRB_SDQ43
11 DDRA_CLK0# T22 MA_CLK_L0 MA_DATA43 AA20 12 DDRB_CLK0# R27 MB_CLK_L0 MB_DATA43 AH20
DDRA_CLK1 R23 AB24 DDRA_SDQ44 DDRB_CLK1 P27 AD23 DDRB_SDQ44
11 DDRA_CLK1 MA_CLK_H1 MA_DATA44 12 DDRB_CLK1 MB_CLK_H1 MB_DATA44
DDRA_CLK1# R24 AD24 DDRA_SDQ45 DDRB_CLK1# P28 AD22 DDRB_SDQ45
11 DDRA_CLK1# MA_CLK_L1 MA_DATA45 DDRA_SDQ46 12 DDRB_CLK1# MB_CLK_L1 MB_DATA45 DDRB_SDQ46
AA21 AD21
DDRA_CKE0 MA_DATA46 DDRA_SDQ47 DDRB_CKE0 MB_DATA46 DDRB_SDQ47
11 DDRA_CKE0 H28 MA_CKE0 MA_DATA47 AC21 12 DDRB_CKE0 J26 MB_CKE0 MB_DATA47 AD20
DDRA_CKE1 H27 DDRB_CKE1 J27
11 DDRA_CKE1 MA_CKE1 12 DDRB_CKE1 MB_CKE1
AA19 DDRA_SDQ48 AF19 DDRB_SDQ48
DDRA_ODT0 MA_DATA48 DDRA_SDQ49 DDRB_ODT0 MB_DATA48 DDRB_SDQ49
11 DDRA_ODT0 Y25 MA_ODT0 MA_DATA49 AC19 12 DDRB_ODT0 W27 MB_ODT0 MB_DATA49 AE18
DDRA_ODT1 AA27 AC17 DDRA_SDQ50 DDRB_ODT1 Y28 AE16 DDRB_SDQ50
11 DDRA_ODT1 MA_ODT1 MA_DATA50 DDRA_SDQ51 12 DDRB_ODT1 MB_ODT1 MB_DATA50 DDRB_SDQ51
MA_DATA51 AA17 MB_DATA51 AH16
DDRA_SCS0# V22 AB20 DDRA_SDQ52 DDRB_SCS0# V25 AG20 DDRB_SDQ52
3 11 DDRA_SCS0# MA_CS_L0 MA_DATA52 12 DDRB_SCS0# MB_CS_L0 MB_DATA52 3
DDRA_SCS1# AA26 Y19 DDRA_SDQ53 DDRB_SCS1# Y27 AG19 DDRB_SDQ53
11 DDRA_SCS1# MA_CS_L1 MA_DATA53 DDRA_SDQ54 12 DDRB_SCS1# MB_CS_L1 MB_DATA53 DDRB_SDQ54
MA_DATA54 AD18 MB_DATA54 AF17
DDRA_SRAS# V21 AD17 DDRA_SDQ55 DDRB_SRAS# V24 AD16 DDRB_SDQ55
11 DDRA_SRAS# DDRA_SCAS# MA_RAS_L MA_DATA55 12 DDRB_SRAS# DDRB_SCAS# MB_RAS_L MB_DATA55
11 DDRA_SCAS# W24 MA_CAS_L 12 DDRB_SCAS# V27 MB_CAS_L
DDRA_SWE# W23 AA16 DDRA_SDQ56 DDRB_SWE# V28 AG15 DDRB_SDQ56
11 DDRA_SWE# MA_WE_L MA_DATA56 12 DDRB_SWE# MB_WE_L MB_DATA56
Y15 DDRA_SDQ57 AD15 DDRB_SDQ57
MEM_MA_RST# MA_DATA57 DDRA_SDQ58 MEM_MB_RST# MB_DATA57 DDRB_SDQ58
11 MEM_MA_RST# H25 AA13 12 MEM_MB_RST# J25 AG13
MEM_MA_EVENT# MA_RESET_L MA_DATA58 DDRA_SDQ59 MEM_MB_EVENT# MB_RESET_L MB_DATA58 DDRB_SDQ59
11 MEM_MA_EVENT# T24 MA_EVENT_L MA_DATA59 AC13 12 MEM_MB_EVENT# T25 MB_EVENT_L MB_DATA59 AD13
Y17 DDRA_SDQ60 AG16 DDRB_SDQ60
MA_DATA60 DDRA_SDQ61 MB_DATA60 DDRB_SDQ61
15mil MA_DATA61 AB16
DDRA_SDQ62 MB_DATA61 AF15
DDRB_SDQ62
+MEM_VREF W20 AB14 AE14
M_VREF MA_DATA62 DDRA_SDQ63 MB_DATA62 DDRB_SDQ63
Y13 AF13
MA_DATA63 MB_DATA63
1 2 M_ZVDDIO W21
+1.5V M_ZVDDIO
R541 39.2_0402_1%
AMD_TOPEDO_FS-1
Qmbdf!uifn!dmptf!up!BQV!xjuijo!2#
AMD_TOPEDO_FS-1
EVENT# pull high 0.75V reference voltage +1.5V
+1.5V
2
4 R542 4
1K_0402_1%
R544 1 2 1K_0402_5% MEM_MA_EVENT# 15mil
1
R545 1 2 1K_0402_5% MEM_MB_EVENT# +MEM_VREF

2
1 2
R543 C964
1K_0402_1% C965
1000P_0402_50V7K 0.1U_0402_16V7K Issued Date 2010/08/04 2011/12/31 Title
2 1 Deciphered Date
AMD FS1 DDRIII I/F
1
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
Place near APU JCPU1D CONN@ Place near APU

If not used, pins are left unconnected (DG ref.)
To LVDS C971 1 2 0.1U_0402_16V7K DP0_TXP0 F2 D4 DP0_AUXP C972 1 2 0.1U_0402_16V7K To LVDS 20101111
26 DP0_TXP0_C DP0_TXP0 DP0_AUXP DP0_AUXP_C 26
Translator 26 DP0_TXN0_C
C973 1 2 0.1U_0402_16V7K DP0_TXN0 F1 D5 DP0_AUXN C974 1 2 0.1U_0402_16V7K DP0_AUXN_C 26
Translator
DP0_TXN0 DP0_AUXN DP0_AUXP R554 2 1 1.8K_0402_5%
DP0_TXP1 E3 E5 ML_VGA_AUXP C975 1 2 0.1U_0402_16V7K DP0_AUXN R555 2 1 1.8K_0402_5%

T25 DP0_TXP1 DP1_AUXP ML_VGA_AUXP_C 15
To FCH
DISPLAY PORT 0
T28 DP0_TXN1 E2 E6 ML_VGA_AUXN C976 1 2 0.1U_0402_16V7K ML_VGA_AUXP R547 2 1 1.8K_0402_5%
DP0_TXN1 DP1_AUXN ML_VGA_AUXN_C 15
ML_VGA_AUXN R556 2 1 1.8K_0402_5%
DP0_TXP2 D2 J5
T19 DP0_TXP2 DP2_AUXP
AUX 2~5 are for GFX interface
DISPLAY PORT MISC.

DP0_TXN2 D1 J6
1 T20 DP0_TXN2 DP2_AUXN use, they could be selected to I2C 1
or AUX logic +1.2VS
DP0_TXP3 C2 H4
T21 DP0_TXP3 DP3_AUXP
VDDIO level TEST25_L R548 1 2 510_0402_1%
DP0_TXN3 C3 H5
T22 DP0_TXN3 DP3_AUXN Need Level shift TEST25_H R557 1 2 510_0402_1%
Place near APU
DP4_AUXP G5
C977 1 2 0.1U_0402_16V7K DP1_TXP0 K2 +1.5V
15 ML_VGA_TXP0 DP1_TXP0
G6
C968 1 DP1_TXN0 DP4_AUXN TEST35
15 ML_VGA_TXN0 2 0.1U_0402_16V7K K1 R558 1 2 300_0402_5%
DP1_TXN0
F4 APU_HDMI_CLK R559 1 @ 2 300_0402_5%
DP1_TXP1 DP5_AUXP APU_HDMI_CLK 28
C969 1 2 0.1U_0402_16V7K J3
15 ML_VGA_TXP1 DP1_TXP1 APU_HDMI_DATA
F5
DISPLAY PORT 1
DP5_AUXN APU_HDMI_DATA 28 +1.5V
C970 1 2 0.1U_0402_16V7K DP1_TXN1 J2
15 ML_VGA_TXN1 DP1_TXN1
To FCH VGA ML D7 DP0_HPD LVDS VDDIO level M_TEST R564 1 @ 2 39.2_0402_1%
DP1_TXP2 DP0_HPD DP0_HPD 10
C978 1 2 0.1U_0402_16V7K H2 Need Level shift
15 ML_VGA_TXP2 DP1_TXP2 DP1_HPD
E7 CRT R567 1 2 39.2_0402_1%
DP1_TXN2 DP1_HPD DP1_HPD 10
C979 1 2 0.1U_0402_16V7K H1
15 ML_VGA_TXN2 DP1_TXN2
J7
DP2_HPD +3VALW
DP1_TXP3
System DP
C980 1 2 0.1U_0402_16V7K G2 H7
15 ML_VGA_TXP3 DP1_TXP3 DP3_HPD FS1R1 R571 1 2 10K_0402_5%
C981 1 2 0.1U_0402_16V7K DP1_TXN3 G3 G7
15 ML_VGA_TXN3 DP1_TXN3 DP4_HPD FS1R1 : Control S5 Dual PWR plane
F7 DP5_HPD In laptop, seems no use
DP5_HPD DP5_HPD 10
HDMI
APU_CLKP AH7 +1.5V
13 APU_CLKP CLKIN_H DP_ENBKL
100MHz DP_BLON C6 DP_ENBKL 10 VDDIO level
APU_CLKN AH6
2 13 APU_CLKN CLKIN_L DP_ENVDD
Need Level shift 2
DP_DIGON C5 DP_ENVDD 10 +1.5VS
CLK
R612 1 2 1K_0402_5%
APU_DISP_CLKP AH4 C7 DP_INT_PWM
13 APU_DISP_CLKP DISP_CLKIN_H DP_VARY_BL DP_INT_PWM 10 ALLOW_STOP R577 1
100MHz_NSS 2 1K_0402_5%
APU_DISP_CLKN AH3 @
13 APU_DISP_CLKN DISP_CLKIN_L DP_AUX_ZVSS APU_RST#
D8 R569 1 2 150_0402_1% R578 1 2 300_0402_5%
DP_AUX_ZVSS
MISC
APU_PWRGD R580 1 2 300_0402_5%
APU_SVC B8 Chang to unpop (DG ref.)
47 APU_SVC SVC
AA10 20101111
APU_SVD TEST6
47 APU_SVD A8
SVD R573 1 @ +1.5V +3VS
2 0_0402_5%
SER.
G10
TEST9 Asserted as an input to force the
APU_SIC AH11 H10 processor into the HTC-active state
6,14 APU_SIC SIC TEST10
TSI
1
APU_SID AG11 H12 R574 1 2 1K_0402_5%
6,14 APU_SID SID TEST12
2
R587 R588
D9 T6 R586 10K_0402_5% 10K_0402_5%
TEST14 1K_0402_5%
APU_RST# AF10 E9 T7
2 2
2
13 APU_RST# RESET_L TEST15
1
Chang to PU +1.5VS (DG ref.) APU_PWRGD
B
13 APU_PWRGD AE10 PWROK TEST16
G9 T8
+1.5V 20101111 Q11
APU_PROCHOT#
E
H9 T9 1 2 1 3 EC_THERM# 13,36,47
APU_PROCHOT# TEST17 R591 0_0402_5%
C
AD10
R575 1 APU_SVC PROCHOT_L APU_TEST18
2 1K_0402_5% R582 1 2 1K_0402_5% MMBT3904_NL_SOT23-3
CTRL
H11
APU_THERMTRIP# TEST18 +1.5V
Serial VID AG12 THERMTRIP_L
R576 1 2 1K_0402_5% APU_SVD G11 APU_TEST19 R583 1 2 1K_0402_5%
ALERT_L TEST19
AH12 ALERT_L
F12 APU_TEST20 R584 1 2 1K_0402_5% THERMTRIP shutdown Indicates to the FCH that a thermal trip
TEST20
1
+1.5V temperature: 125 degree has occurred. Its assertion will cause the FCH to
E11 APU_TEST21 R585 1 2 1K_0402_5% transition the system to S5 immediately
TEST21
2
3 R579 1 APU_SIC APU_TDI 3
2 1K_0402_5%
TEST
C12 TDI
D11 APU_TEST22 R589 1 2 1K_0402_5% R610
R581 1 APU_SID APU_TDO TEST22
2 1K_0402_5% A12 R609
2 2
TDO 1K_0402_5% 10K_0402_5%
F10 T10
TEST23
B
R791 1 2 1K_0402_5% ALERT_L APU_TCK A11
1
TCK APU_TEST24 R590 1
TEST24 G12 2 1K_0402_5% Q12
E
APU_TMS D12 APU_THERMTRIP# 3 1 1 2
JTAG
+1.5V TMS H_THERMTRIP# 14
C
Close to Header AH10 TEST25_H R611 0_0402_5%
APU_TRST# TEST25_H MMBT3904_NL_SOT23-3
B12
TRST_L TEST25_L
TEST25_L AH9
R592 1 2 1K_0402_5% APU_TDI APU_DBRDY B11
DBRDY
K7
R593 1 APU_TCK APU_DBREQ# TEST28_H
2 1K_0402_5% C11 DBREQ_L +1.5V
R594 1 2 1K_0402_5% APU_TMS TEST28_L K8
HDT Debug conn JP1
AA12 1 2 APU_TCK
TEST30_H T11 1 2
R595 1 2 1K_0402_5% APU_TRST# E8 RSVD_1 APU_TMS
AB12 T12 3 4
R596 1 APU_DBREQ# TEST30_L 3 4
2 300_0402_5%
RSVD
K21 RSVD_2
K22 M_TEST 5 6 APU_TDI
TEST31 5 6
AC11 RSVD_3
AB11 T13 7 8 APU_TDO Cut on CPU side, Debug mount
R597 1 TEST32_H 7 8
47 APU_VDDNB_RUN_FB_L 2 0_0402_5%
Route as differential AA11 APU_TRST# R5981 2 0_0402_5% 9 10 R5991 @ 2 0_0402_5% APU_PWRGD
TEST32_L T14 9 10
R600 1 2 0_0402_5% B9
with VSS_SENSE 47 APU_VDD_RUN_FB_L VSS_SENSE TEST35 APU_RST#
D10 R601 1 2 10K_0402_5% 11 12 R6021 @ 2 0_0402_5%
TEST35 11 12
C8
VDDP_SENSE R603 1 APU_DBRDY
2 10K_0402_5% 13 14
APU_VDDNB_RUN_FB_L APU_VDDNB_SEN 13 14
47 APU_VDDNB_SEN A9
VDDNB_SENSE FS1R1 R605 1 APU_DBREQ#
APU_VDDNB_SEN route as differential 2 10K_0402_5%
SENSE
Y11 15 16
FS1R1 15 16
B10
VDDIO_SENSE ALLOW_STOP
DMAACTIVE_L AB10 ALLOW_STOP 13 17 17 18 18 R6061 2 0_0402_5% APU_TEST19
4 APU_VDD_RUN_FB_L APU_VDD_SEN 4
47 APU_VDD_SEN C9 VDD_SENSE
APU_VDD_SEN route as differential C639 1 2 0.1U_0402_16V4Z 19 20 R6081 2 0_0402_5% APU_TEST18
@ 19 20
A10 VDDR_SENSE THERMDA AE12 T15
THERMDC AD12 T16

Llano do not support this thermal die SAMTE_ASP-136446-07-B
CONN@
AMD_TOPEDO_FS-1
AMD FS1 Display / MISC / HDT
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
Power Name Consumption

VDD
+CPU_CORE 50A CPU BOTTOM SIDE DECOUPLING
VDDNB JCPU1F CONN@
+CPU_CORE
+CPU_CORE_NB 22.5A
VDDIO A7 VSS VSS T11
A13 T19
+1.5V 4A VSS VSS
C982
22U_0805_6.3V6M
C996
22U_0805_6.3V6M
C983
22U_0805_6.3V6M
C984
22U_0805_6.3V6M
C997
22U_0805_6.3V6M
C985
22U_0805_6.3V6M
C986
22U_0805_6.3V6M
C987
0.22U_0603_16V4Z
C988
0.22U_0603_16V4Z
C989
0.01U_0402_16V7K
C998
0.01U_0402_16V7K
C990
0.01U_0402_16V7K
C991
180P_0402_50V8J
C992
180P_0402_50V8J
2000mil 2000mil A15
VSS VSS
U4
VDDP / VDDR JCPU1E CONN@ 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A17 U7
+CPU_CORE +CPU_CORE VSS VSS
A19 U10
+1.2VS 3A / 3.5A A21
VSS VSS
U18
VSS VSS
VDDA C1 VDD VDD T6
2 2 2 2 2 2 2 2 2 2 2 2 2 2
A23 VSS VSS V9
1 1
D3 T10 A25 V11
+2.5VS 0.75A D6
VDD VDD
T18 B7
VSS VSS
V19
VDD VDD VSS VSS
E1 U1 C4 W4
VDD VDD VSS VSS
CORE_NB CPU_CORE F3
VDD VDD
U11 C10
VSS VSS
W7
F6 U19 C14 W10
330uF X 2 330uF X 4 VDD VDD VSS VSS
F8 V3 C16 W12
VDD VDD +CPU_CORE_NB VSS VSS
22uF X 4 22uF X 11 G1 VDD VDD V6 C18 VSS VSS W14
H3 VDD VDD V10 C20 VSS VSS W16
H6 V18 C22 W18
VDD VDD VSS VSS
H8 VDD VDD W1 C24 VSS VSS Y9
C1000
22U_0805_6.3V6M
C1001
22U_0805_6.3V6M
C1002
22U_0805_6.3V6M
C1003
22U_0805_6.3V6M
C1004
0.22U_0603_16V4Z
C1005
0.22U_0603_16V4Z
C1006
180P_0402_50V8J
C1007
180P_0402_50V8J
C1008
180P_0402_50V8J
C1009
390U_2.5V_10M
J1 W11 1 C26 Y22
VDD VDD VSS VSS
K3 W13 1 1 1 1 1 1 1 1 1 C28 AA4
VDD VDD + VSS VSS
K6 W15 D13 AA7
VDD VDD VSS VSS
L1 VDD VDD W17 D15 VSS VSS AB9
L11 VDD VDD W19 D17 VSS VSS AB13
L19 Y3 2 2 2 2 2 2 2 2 2 2 D19 AB15
VDD VDD VSS VSS
M3 VDD VDD Y6 D21 VSS VSS AB17
M6 Y10 D23 AB19
VDD VDD VSS VSS
M10 Y12 D25 AB21
VDD VDD VSS VSS
M18 VDD VDD Y14 D27 VSS VSS AB23
N1 VDD VDD Y16 E4 VSS VSS AB25
N11 Y18 +1.5V E10 AB27
VDD VDD VSS VSS
N19 Y20 E12 AC4
VDD VDD VSS VSS
P3 AA1 F9 AC7
VDD VDD VSS VSS
P6 VDD VDD AB3 F11 VSS VSS AC10
C1012
22U_0805_6.3V6M
C1013
22U_0805_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C1018
0.22U_0603_16V4Z
C1019
0.22U_0603_16V4Z
C1020
0.22U_0603_16V4Z
C1021
0.22U_0603_16V4Z
C1022
0.22U_0603_16V4Z
C1023
0.22U_0603_16V4Z
C1024
180P_0402_50V8J
C1025
180P_0402_50V8J
330U_D2_2V_Y
P10 VDD VDD AB6 1 F14 VSS VSS AC12
C14
C15
C16
C17
C5
P18 VDD VDD AC1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 F16 VSS VSS AC14
R1 AD3 + F18 AC16
VDD VDD VSS VSS
R11 AD6 F20 AC18
VDD VDD VSS VSS
R19 AE1 F22 AC20
VDD VDD 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 VSS VSS
T3 VDD F24 VSS VSS AC22
F26 VSS VSS AC24
2 2
900mil 900mil F28 VSS VSS AC26
+CPU_CORE_NB J9 VDDNB VDDNB K11 +CPU_CORE_NB G4 VSS VSS AC28
J10 K12 @ G8 AD9
VDDNB VDDNB VSS VSS
J11 VDDNB VDDNB K13 G13 VSS VSS AD11
J12 VDDNB VDDNB K14 G15 VSS VSS AE4
K9 K18 G21 AE15
VDDNB VDDNB +1.5V VSS VSS
K10 L18 G23 AE17
VDDNB VDDNB VSS VSS
G25 VSS VSS AE19
160mil 160mil J4
VSS VSS
AE21
+1.5V G28 R22 +1.5V J8 AE23
VDDIO VDDIO VSS VSS
C1027
0.22U_0603_16V4Z
C1028
0.22U_0603_16V4Z
C1029
180P_0402_50V8J
C1030
180P_0402_50V8J
H26 VDDIO VDDIO R25 J18
VSS VSS
AE25
J28 R28 1 1 1 1 J20 AE27
VDDIO VDDIO VSS VSS
K20 VDDIO VDDIO T20 J22 VSS VSS AF3
K23 T23 J24 AF6
VDDIO VDDIO VSS VSS
K26 VDDIO VDDIO T26 K19
VSS VSS
AF9
2 2 2 2
L22 VDDIO VDDIO U22 L4
VSS VSS
AF12
L25 U25 L7 AF14
VDDIO VDDIO VSS VSS
L28 U28 L10 AF16
VDDIO VDDIO VSS VSS
M20
VDDIO VDDIO
V20 Decoupling between CPU and DIMMs M9
VSS VSS
AF18
M23 VDDIO VDDIO V23 across VDDIO and VSS split M11
VSS VSS
AF20
M26 V26 M19 AF22
VDDIO VDDIO VSS VSS
N22 VDDIO VDDIO W22 N4
VSS VSS
AF24
N25 W25 N7 AF26
VDDIO VDDIO VSS VSS
N28 VDDIO VDDIO W28 N10
VSS VSS
AF28
P20 VDDIO VDDIO Y24 N18 VSS VSS AG10
P23
VDDIO VDDIO
Y26 VDDP decoupling P9
VSS VSS
AH5
P26 VDDIO VDDIO AA28 P11
VSS VSS
AH8
+1.2VS P19 AH13
+1.2VS VSS VSS
120mil 120mil R4
VSS VSS
AH15
+1.2VS AG2 A3 R7 AH17
VDDP_A_1 VDDP_B_1 VSS VSS
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
180P_0402_50V8J
180P_0402_50V8J
0.22U_0603_16V4Z
0.22U_0603_16V4Z
3 3
AG3 VDDP_A_2 VDDP_B_2 A4 R10 VSS VSS AH19
C1034
C1035
C1036
C1037
AG4 VDDP_A_3 VDDP_B_3 B3 1 R18
VSS VSS
AH21
C8
C7
C6
AG5 VDDP_A_4 VDDP_B_4 B4 1 1 1 1 1 1 1 T9

VSS VSS
AH23
+ C1038 AH25
220U_6.3V_M VSS
160mil 160mil
+1.2VS AG6 VDDR VDDR A5
AG7 A6 2 2 2 2 2 2 2 2
VDDR VDDR AMD_TOPEDO_FS-1
AG8 B5
VDDR VDDR
AG9 B6
+2.5VS VDDR VDDR C1038 change to SF000002Y00
L1 20101228
40mil
FBMA-L11-201209-221LMA30T_0805 AE11
+VDDA_APU VDDA
2 1 AF11 VDDA VDDR decoupling
+1.2VS
C1040
3300P_0402_50V7K
C1041
0.22U_0603_16V4Z
4.7U_0805_10V4Z
C1043
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
C18
C1044
C1045
C1046
C1047
C1048
C1049
C1050
C1051
1 1 1
1
AMD_TOPEDO_FS-1 1 1 1 1 1 1 1 1
Keep trace from resistor to APU
@ within 0.6"
2
2 2 2
Keep trace from Caps to APU 2 2 2 2 2 2 2 2
within 1.2"
Demo Board Capacitor (include PWM side)

C18 & C1043 follow AMD request CPU_CORE CORE_NB VDDIO_SUS VDDIO_SUS VDDP/R_PWM VDDP VDDR
201012061900
470uF x 6 470uF x 4 (CPU side) (DIMM x2) 470uF x 2 10uF x 3 4.7uF x 4
C1052
0.22U_0603_16V4Z
C1053
0.22U_0603_16V4Z
C1054
0.22U_0603_16V4Z
C1055
0.22U_0603_16V4Z
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C10
C11
C12
1 1 1 1 1 1 1 2 22uF x 9 22uF x 6 680uF x 1 100uF x 4 10uF x 1 0.22uF x 2 0.22uF x 4

0.22uF x 2 0.22uF x 2 330uF x 1 0.1uF 180pF x 2 1nF x 4
C13
4 2 2 2 2 2 2 2 1 180pF x 2 180uF x 3 22uF x 3 180pF x 4 4

10nF x 3 4.7uF x 4
0.22uF x 6
180pF x 4

AMD FS1 PWR / GND
Custom 1.0
QBL50 LA-7551P
A B C D E
5 4 3 2 1
˛ˣ˗ ˣ˴́˸˿ʳ˘ˡ˕˞˟
+3VS
+3VS
1
+1.5VS
1
R613 @
2
10K_0402_5% R614
2
@ 4.7K_0402_5%
2
@ R616 R617
2
D R615 1K_0402_5% 100K_0402_5% APU_ENBKL R624 1 @ D
Translator HPD 2 0_0402_5% ENBKL 36
2
1K_0402_5%
1
G
From Translator
1
LVDS_HPD 1 3 @ D Q14
26 LVDS_HPD DP0_HPD 8
2
MMBT3904_NL_SOT23-3
@ G
1
2 @ 1 @ Q15 C S 2N7002K_SOT23-3
R618 100K_0402_5% Q13
1 2 2
3
2N7002K_SOT23-3 8 DP_ENBKL
R619 2.2K_0402_5% B
2
E
3
+3VS @
R620
100K_0402_5%
1
1
+1.5VS
R621
2
10K_0402_5%
2
2
@ R623
CRT HPD R622 1K_0402_5%
1K_0402_5% 2 DP_ENBKL 1 2 ENBKL
1
From FCH G R676 0_0402_5%
1
FCH_CRT_HPD 1 3
15 FCH_CRT_HPD DP1_HPD 8
D
2 @ 1
Q16
ˣ˴́˸˿ʳ˘ˡ˩˗˗
R627 100K_0402_5%
2N7002K_SOT23-3
C +3VS C
+1.5VS
1
1
2
@ @
R630 @ R632
HDMI HPD 4.7K_0402_5% R631 4.7K_0402_5%
100K_0402_5%
2
2
From HDMI Conn
1
APU_ENVDD 27
APU_HDMI_HPD 1 2
28 APU_HDMI_HPD DP5_HPD 8
1
R677 0_0402_5%
@ D Q18
2 @ 1 2
MMBT3904_NL_SOT23-3
R659 100K_0402_5% @ G
1
@ Q19 C S 2N7002K_SOT23-3
1 2 2
3
8 DP_ENVDD
R633 2.2K_0402_5% B
E
3
2
@
R634
100K_0402_5%
1
ˣ˴́˸˿ʳˣ˪ˠ
B B
+3VS
1
R635 R636
47K_0402_5% 4.7K_0402_5%
2
APU_INVT_PWM 26,27
1
D Q20
2
MMBT3904_NL_SOT23-3
G
1
Q21 C S 2N7002K_SOT23-3
1 2 2
3
8 DP_INT_PWM
R637 2.2K_0402_5% B
E
3
1
R638
4.7K_0402_5%
Q15 / Q19 / Q21 change to SB000006A00
2
20101228
A A

AMD FS1 Singal Level Shifter
Custom 1.0
QBL50 LA-7551P
5 4 3 2 1
A B C D E
+VREF_DQ +1.5V +1.5V
15mil JDIMM2
1 2
VREF_DQ VSS1 DDRA_SDQ4 DDRA_SDQ[0..63]
3 4
DDRA_SDQ0 VSS2 DQ4 DDRA_SDQ5 DDRA_SDQ[0..63] 7
5 6
DDRA_SDQ1 DQ0 DQ5 DDRA_SDM[0..7]
7 DQ1 VSS3 8 DDRA_SDM[0..7] 7
9 10 DDRA_SDQS0#
DDRA_SDM0 VSS4 DQS#0 DDRA_SDQS0 DDRA_SDQS0# 7 DDRA_SMA[0..15]
11 DM0 DQS0 12 DDRA_SDQS0 7 DDRA_SMA[0..15] 7
13 14
DDRA_SDQ2 VSS5 VSS6 DDRA_SDQ6
15 DQ2 DQ6 16
DDRA_SDQ3 17 18 DDRA_SDQ7
DQ3 DQ7
19 VSS7 VSS8 20
1 DDRA_SDQ8 DDRA_SDQ12 1
21 DQ8 DQ12 22
DQ9 DQ13
25 26
DDRA_SDQS1# VSS9 VSS10 DDRA_SDM1
7 DDRA_SDQS1# 27 28
DDRA_SDQS1 DQS#1 DM1 MEM_MA_RST#
7 DDRA_SDQS1 29
DQS1 RESET#
30 MEM_MA_RST# 7 Place near DIMM1
31 VSS11 VSS12 32
DDRA_SDQ11 DQ10 DQ14 DDRA_SDQ15 +1.5V
35 DQ11 DQ15 36
37 38
DDRA_SDQ16 VSS13 VSS14 DDRA_SDQ20 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
39 40
DDRA_SDQ17 DQ16 DQ20 DDRA_SDQ21
41 DQ17 DQ21 42 2 2 2 2 2 2 2 2 2 2
43 VSS15 VSS16 44
DDRA_SDQS2# 45 46 DDRA_SDM2 C1067 C1068 C1069 C1070 C1071 C1072 C1073 C1074 C1075 C1076
7 DDRA_SDQS2# DQS#2 DM2
DDRA_SDQS2 47 48
7 DDRA_SDQS2 DQS2 VSS17 DDRA_SDQ22 1 1 1 1 1 1 1 1 1 1
49 VSS18 DQ22 50
DDRA_SDQ18 51 52 DDRA_SDQ23 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRA_SDQ19 DQ18 DQ23
53 DQ19 VSS19 54
55 56 DDRA_SDQ28
DDRA_SDQ24 VSS20 DQ28 DDRA_SDQ29
57 58
59 DQ25 VSS21 60
61 62 DDRA_SDQS3#
DDRA_SDM3 VSS22 DQS#3 DDRA_SDQS3 DDRA_SDQS3# 7
63 64 +0.75VS +1.5V
DM3 DQS3 DDRA_SDQS3 7
65 66 @
DDRA_SDQ26 VSS23 VSS24 DDRA_SDQ30 0.1U_0402_16V4Z
67 DQ26 DQ30 68 1 2
DDRA_SDQ27 69 70 DDRA_SDQ31 2 2 1 C1106 0.1U_0402_16V4Z
DQ27 DQ31
71 72
VSS25 VSS26 C1077 C1078 C1079 Add C1106
20101101
1 1 2
DDRA_CKE0 73 74 DDRA_CKE1 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
7 DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 7
75 VDD1 VDD2 76
77 78 DDRA_SMA15
2 DDRA_SBS2# NC1 A15 DDRA_SMA14 2
7 DDRA_SBS2# 79 BA2 A14 80
81 VDD3 VDD4 82
DDRA_SMA12 83 84 DDRA_SMA11
DDRA_SMA9 A12/BC# A11 DDRA_SMA7
85 A9 A7 86
87 VDD5 VDD6 88
DDRA_SMA8 89 90 DDRA_SMA6
DDRA_SMA5 A8 A6 DDRA_SMA4
91 A5 A4 92
93 94
DDRA_SMA3 VDD7 VDD8 DDRA_SMA2 +VREF_CA +1.5V
95 96
DDRA_SMA1 A3 A2 DDRA_SMA0 +VREF_DQ +1.5V
97 A1 A0 98
99 100
VDD9 VDD10
2
DDRA_CLK0 101 102 DDRA_CLK1
7 DDRA_CLK0 CK0 CK1 DDRA_CLK1 7
2
DDRA_CLK0# 103 104 DDRA_CLK1# R640
7 DDRA_CLK0# CK0# CK1# DDRA_CLK1# 7
105 106 R639 1K_0402_1%
DDRA_SMA10 VDD11 VDD12 DDRA_SBS1# 1K_0402_1%
107 A10/AP BA1 108 DDRA_SBS1# 7
DDRA_SBS0# 109 110 DDRA_SRAS# 15mil
1
7 DDRA_SBS0# BA0 RAS# DDRA_SRAS# 7
111 112 15mil +VREF_CA
1
DDRA_SWE# VDD13 VDD14 DDRA_SCS0# +VREF_DQ
113 WE# S0# 114 DDRA_SCS0# 7
7 DDRA_SWE#
1000P_0402_50V7K
0.1U_0402_16V4Z
DDRA_SCAS# 115 116 DDRA_ODT0
7 DDRA_SCAS# CAS# ODT0 DDRA_ODT0 7
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
117 118
VDD15 VDD16
1000P_0402_50V7K
4.7U_0603_6.3V6K
DDRA_SMA13 119 120 DDRA_ODT1 1 1 1
A13 ODT1 DDRA_ODT1 7
2
DDRA_SCS1# 121 122 1 1 1 @ C1064 C1065
7 DDRA_SCS1# S1# NC2
C1063
123 124 15mil @ C1061 C1062 R642
VDD17 VDD18
C1060
125 126 +VREF_CA R641 1K_0402_1%
NCTEST VREF_CA 1K_0402_1% 2 2 2
127 128
DDRA_SDQ32 VSS27 VSS28 DDRA_SDQ36 2 2 2
129 130
1
131 132 1
1
DQ33 DQ37 C1066
133 134
DDRA_SDQS4# VSS29 VSS30 DDRA_SDM4
7 DDRA_SDQS4# 135 DQS#4 DM4 136
DDRA_SDQS4 137 138 1000P_0402_50V7K
7 DDRA_SDQS4 DQS4 VSS31 DDRA_SDQ38 2
139 VSS32 DQ38 140
3 DDRA_SDQ35 DQ34 DQ39 3
143 DQ35 VSS33 144
145 146 DDRA_SDQ44
147 DQ40 DQ45 148
DDRA_SDQ41 149 150
DQ41 VSS35 DDRA_SDQS5#
151 152 DDRA_SDQS5# 7
DDRA_SDM5 VSS36 DQS#5 DDRA_SDQS5
153 DM5 DQS5 154 DDRA_SDQS5 7
155 156
157 DQ42 DQ46 158
DQ43 DQ47
161 VSS39 VSS40 162
165 166
DQ49 DQ53
167 VSS41 VSS42 168
DDRA_SDQS6# 169 170 DDRA_SDM6
7 DDRA_SDQS6# DQS#6 DM6
DDRA_SDQS6 171 172
7 DDRA_SDQS6 DQS6 VSS43
173 174 DDRA_SDQ54
175 DQ50 DQ55 176
DDRA_SDQ51 177 178
DQ51 VSS45 DDRA_SDQ60
179 VSS46 DQ60 180
183 DQ57 VSS47 184
185 186 DDRA_SDQS7#
DDRA_SDM7 VSS48 DQS#7 DDRA_SDQS7 DDRA_SDQS7# 7
187 188 DDRA_SDQS7 7
DM7 DQS7
189 190
191 192
193 DQ59 DQ63 194
R643 10K_0402_5% 195 196
VSS51 VSS52 MEM_MA_EVENT#
1 2 197 198 MEM_MA_EVENT# 7
+3VS SA0 EVENT#
+3VS 199 200 FCH_SDATA0 12,14,32
VDDSPD SDA
201 202 FCH_SCLK0 12,14,32
SA1 SCL
203 204 +0.75VS
VTT1 VTT2
1
4 R645 4
1 1 205 G1 G2 206
C1080 C1081
10K_0402_5% TYCO_2-2013310-1
2.2U_0603_6.3V4Z 0.1U_0402_16V4Z
2
2 2

2010/08/04 2011/12/31 Title
DIMM_A STD H:9.2mm Issued Date Deciphered Date
DDRIII SO-DIMM 1
<Address: 00> AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
+VREF_DQ +1.5V +1.5V
15mil JDIMM1
1 2
VREF_DQ VSS1 DDRB_SDQ4 DDRB_SDQ[0..63]
3 4
DDRB_SDQ0 VSS2 DQ4 DDRB_SDQ5 DDRB_SDQ[0..63] 7
5 6
DDRB_SDQ1 DQ0 DQ5 DDRB_SDM[0..7]
7 DQ1 VSS3 8 DDRB_SDM[0..7] 7
9 10 DDRB_SDQS0#
DDRB_SDM0 VSS4 DQS#0 DDRB_SDQS0 DDRB_SDQS0# 7 DDRB_SMA[0..15]
11 DM0 DQS0 12 DDRB_SDQS0 7 DDRB_SMA[0..15] 7
13 14
DDRB_SDQ2 VSS5 VSS6 DDRB_SDQ6
15 DQ2 DQ6 16
DDRB_SDQ3 17 18 DDRB_SDQ7
DQ3 DQ7
19 VSS7 VSS8 20
1 DDRB_SDQ8 DDRB_SDQ12 1
21 DQ8 DQ12 22
DQ9 DQ13
25 26
DDRB_SDQS1# VSS9 VSS10 DDRB_SDM1
7 DDRB_SDQS1# 27 28
DDRB_SDQS1 DQS#1 DM1 MEM_MB_RST#
7 DDRB_SDQS1 29 30 MEM_MB_RST# 7
DQS1 RESET#
31 VSS11 VSS12 32
DDRB_SDQ11 DQ10 DQ14 DDRB_SDQ15
35 DQ11 DQ15 36
37 38
39 40
41 DQ17 DQ21 42
DDRB_SDQS2#
43 VSS15 VSS16 44
DDRB_SDM2
Place near DIMM2
7 DDRB_SDQS2# 45 46
DDRB_SDQS2 DQS#2 DM2
7 DDRB_SDQS2 47 48
DQS2 VSS17 DDRB_SDQ22 +1.5V
49 VSS18 DQ22 50
DDRB_SDQ19 DQ18 DQ23 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
53 DQ19 VSS19 54
55 56 DDRB_SDQ28 2 2 2 2 2 2 2 2 2 2
DDRB_SDQ24 VSS20 DQ28 DDRB_SDQ29
57 58
DDRB_SDQ25 DQ24 DQ29 C1089 C1090 C1091 C1092 C1093 C1094 C1095 C1096 C1097 C1098
59 DQ25 VSS21 60
61 62 DDRB_SDQS3#
DDRB_SDM3 VSS22 DQS#3 DDRB_SDQS3 DDRB_SDQS3# 7 1 1 1 1 1 1 1 1 1 1
63 64 DDRB_SDQS3 7
DM3 DQS3 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
65 66
67 DQ26 DQ30 68
DQ27 DQ31
71 72
VSS25 VSS26
+0.75VS +1.5V +1.5V

DDRB_CKE0 73 74 DDRB_CKE1 @
7 DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 7
75 76 0.1U_0402_16V4Z 1 2
VDD1 VDD2 DDRB_SMA15 C1107 0.1U_0402_16V4Z
77 NC1 A15
78 2 2 1 1
2 DDRB_SBS2# DDRB_SMA14 2
7 DDRB_SBS2# 79 BA2 A14 80
81 82 C1099 C1100 C1101 Add C1107 + C9
DDRB_SMA12 VDD3 VDD4 DDRB_SMA11 20101101 @ 330U_X_2VM_R6M
83 84
DDRB_SMA9 A12/BC# A11 DDRB_SMA7 1 1 2
85 A9 A7 86
87 88 0.1U_0402_16V4Z 4.7U_0603_6.3V6K 2
DDRB_SMA8 VDD5 VDD6 DDRB_SMA6
89 A8 A6 90
DDRB_SMA5 91 92 DDRB_SMA4
A5 A4
93 94
DDRB_SMA3 VDD7 VDD8 DDRB_SMA2
95 96
DDRB_SMA1 A3 A2 DDRB_SMA0
97 A1 A0 98
99 100
DDRB_CLK0 VDD9 VDD10 DDRB_CLK1
101 102 DDRB_CLK1 7
7 DDRB_CLK0 DDRB_CLK0# CK0 CK1 DDRB_CLK1#
103 CK0# CK1# 104 DDRB_CLK1# 7
7 DDRB_CLK0#
105 106
DDRB_SMA10 VDD11 VDD12 DDRB_SBS1#
107 A10/AP BA1 108 DDRB_SBS1# 7
DDRB_SBS0# 109 110 DDRB_SRAS#
7 DDRB_SBS0# BA0 RAS# DDRB_SRAS# 7
111 VDD13 VDD14 112
DDRB_SWE# 113 114 DDRB_SCS0#
7 DDRB_SWE# DDRB_SCAS# WE# S0# DDRB_ODT0 DDRB_SCS0# 7
7 DDRB_SCAS# 115 116 DDRB_ODT0 7
CAS# ODT0
117 118
DDRB_SMA13 VDD15 VDD16 DDRB_ODT1
119 120 DDRB_ODT1 7
DDRB_SCS1# A13 ODT1 +VREF_DQ +VREF_CA
121 S1# NC2
122
7 DDRB_SCS1#
123
VDD17 VDD18
124 15mil
125
NCTEST VREF_CA 126 +VREF_CA 15mil +VREF_DQ
15mil +VREF_CA
127 128
129 DQ32 DQ36 130
1000P_0402_50V7K
1000P_0402_50V7K
DDRB_SDQ33 131 132 DDRB_SDQ37 1
DQ33 DQ37
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
133 134 C1088
DDRB_SDQS4# VSS29 VSS30 DDRB_SDM4 1000P_0402_50V7K
7 DDRB_SDQS4# 135 DQS#4 DM4 136 1 1 1 1 1 1
DDRB_SDQS4 137 138 @ C1083 C1084 @ C1086 C1087
7 DDRB_SDQS4 DQS4 VSS31 2
C1082
C1085
139 140 DDRB_SDQ38
141 142
3 DDRB_SDQ35 DQ34 DQ39 2 2 2 2 2 2 3
143 DQ35 VSS33 144
145 146 DDRB_SDQ44
147 DQ40 DQ45 148
DDRB_SDQ41 149 150
DQ41 VSS35 DDRB_SDQS5#
151 152 DDRB_SDQS5# 7
DDRB_SDM5 VSS36 DQS#5 DDRB_SDQS5
153 DM5 DQS5 154 DDRB_SDQS5 7
155 156
157 DQ42 DQ46 158
DQ43 DQ47
161 VSS39 VSS40 162
165 166
DQ49 DQ53
167 VSS41 VSS42 168
DDRB_SDQS6# 169 170 DDRB_SDM6
7 DDRB_SDQS6# DQS#6 DM6
DDRB_SDQS6 171 172
7 DDRB_SDQS6 DQS6 VSS43
173 174 DDRB_SDQ54
175 DQ50 DQ55 176
DDRB_SDQ51 177 178
DQ51 VSS45 DDRB_SDQ60
179 VSS46 DQ60 180
DDRB_SDQ57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDRB_SDQS7#
DDRB_SDM7 VSS48 DQS#7 DDRB_SDQS7 DDRB_SDQS7# 7
187 188 DDRB_SDQS7 7
DM7 DQS7
189 190
191 192
193 DQ59 DQ63 194
R646 10K_0402_5% 195 196
VSS51 VSS52 MEM_MB_EVENT#
1 2 197 198 MEM_MB_EVENT# 7
SA0 EVENT#
+3VS 199 200 FCH_SDATA0 11,14,32
VDDSPD SDA
201 202 FCH_SCLK0 11,14,32
SA1 SCL
203 204 +0.75VS
VTT1 VTT2
1
<BOM Structure>
4 <BOM Structure>
R648 4
205 G1 G2 206
10K_0402_5% TYCO_2-2013289-1
2

2010/08/04 2011/12/31 Title
DIMM_B STD H:5.2mm Issued Date Deciphered Date
DDRIII SO-DIMM 2
<Address: 01> AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
C1195 150P_0402_50V8J
2 1 U25A
HUDSON-2
APU_PCIE_RST#_CAE2 AF3
R829 A_RST#_R PCIE_RST# PCICLK0
1 2 33_0402_5% AD5 AF1
PCI CLKS
36 A_RST# A_RST# PCICLK1/GPO36 PCI_CLK1 16
PCI Host Bus Reset (To EC) PCICLK2/GPO37
AF5
C1189 1 2 0.1U_0402_16V7K UMI_MTX_FRX_P0 AE30 AG2
6 UMI_MTX_C_FRX_P0 UMI_MTX_FRX_N0 UMI_TX0P PCICLK3/GPO38 PCI_CLK3 16
C1190 1 2 0.1U_0402_16V7K AE32 AF6
6 UMI_MTX_C_FRX_N0 UMI_MTX_FRX_P1 UMI_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 16 +3VALW
C1191 1 2 0.1U_0402_16V7K AD33
6 UMI_MTX_C_FRX_P1 UMI_MTX_FRX_N1 UMI_TX1P
C1192 1 2 0.1U_0402_16V7K AD31 AB5 For PCIE device reset on FS1 @ C1193
6 UMI_MTX_C_FRX_N1 UMI_TX1N PCIRST#
C1196 1 2 0.1U_0402_16V7K UMI_MTX_FRX_P2 AD28 1 2
6 UMI_MTX_C_FRX_P2 UMI_MTX_FRX_N2 UMI_TX2P (GLAN,WLAN)
C1197 1 2 0.1U_0402_16V7K AD29
6 UMI_MTX_C_FRX_N2 UMI_MTX_FRX_P3 UMI_TX2N
C1198 1 2 0.1U_0402_16V7K AC30 AJ3 0.1U_0402_16V4Z
6 UMI_MTX_C_FRX_P3 UMI_TX3P AD0/GPIO0
5
C1194 1 2 0.1U_0402_16V7K UMI_MTX_FRX_N3 AC32 AL5
6 UMI_MTX_C_FRX_N3 UMI_TX3N AD1/GPIO1
AG4 2 @
P
1 UMI_FTX_C_MRX_P0 AD2/GPIO2 APU_PCIE_RST#_C R825 1 B 1
6 UMI_FTX_C_MRX_P0 AB33 AL6 2 33_0402_5% 4 PLT_RST# 18,26,29,32
UMI_FTX_C_MRX_N0 UMI_RX0P AD3/GPIO3 Y
6 UMI_FTX_C_MRX_N0 AB31 AH3 1
PCI EXPRESS INTERFACES

UMI_RX0N AD4/GPIO4 A
G
2
UMI_FTX_C_MRX_P1 AB28 AJ5 2 U26
6 UMI_FTX_C_MRX_P1 UMI_RX1P AD5/GPIO5
UMI_FTX_C_MRX_N1 AB29 AL1 R826 NC7SZ08P5X_NL_SC70-5
3
6 UMI_FTX_C_MRX_N1 UMI_RX1N AD6/GPIO6
UMI_FTX_C_MRX_P2 Y33 AN5 C1188 @ 8.2K_0402_5%
6 UMI_FTX_C_MRX_P2
UMI_FTX_C_MRX_N2 UMI_RX2P AD7/GPIO7
Y31 AN6 150P_0402_50V8J
6 UMI_FTX_C_MRX_N2 UMI_FTX_C_MRX_P3 UMI_RX2N AD8/GPIO8 1
Y28 AJ1
1
6 UMI_FTX_C_MRX_P3 UMI_FTX_C_MRX_N3 UMI_RX3P AD9/GPIO9
6 UMI_FTX_C_MRX_N3 Y29 UMI_RX3N AD10/GPIO10 AL8 1 2
AL3 R835 0_0402_5%
AD11/GPIO11 +3VALW
R827 1 2 590_0402_1% PCIE_CALRP AF29
PCIE_CALRP AD12/GPIO12
AM7
+PCIE_VDDR_FCH R828 1 2 2K_0402_1% PCIE_CALRN AF31 AJ6 @ C1199
PCIE_CALRN AD13/GPIO13
AD14/GPIO14 AK7 1 2
V33 AN8
GPP_TX0P AD15/GPIO15 0.1U_0402_16V4Z
V31 AG9
GPP_TX0N AD16/GPIO16
5
W30 AM11 U27
@U27
@
GPP_TX1P AD17/GPIO17
W32 AJ10 2 B
P
GPP_TX1N AD18/GPIO18 VGA_PWRGD VGA_PWRGD_R
AB26 GPP_TX2P AD19/GPIO19 AL12 25,48 VGA_PWRGD Y 4 1 2
AB27 AK11 1 R830 @ 0_0402_5%
GPP_TX2N AD20/GPIO20 A
G
AA24 AN12
GPP_TX3P AD21/GPIO21 NC7SZ08P5X_NL_SC70-5
AA23 AG12
3
GPP_TX3N AD22/GPIO22
AE12 PCI_AD23 16 1 2
AD23/GPIO23 R831 @ 100K_0402_5%
AA27 AC12 PCI_AD24 16
GPP_RX0P AD24/GPIO24
AA26 AE13 PCI_AD25 16
GPP_RX0N AD25/GPIO25
W27 AF13 1 2
PCI INTERFACE
GPP_RX1P AD26/GPIO26 PCI_AD26 16
V27 AH13 R832 0_0402_5%
GPP_RX1N AD27/GPIO27 VGA_PWRGD_R PCI_AD27 16
V26 AH14
˚ˣˣʳˣ̂̅̇˃ʳ˙̂̅ʳ˨˦˕ˆ˃ʳ̂́ʳ˦˨˦˂˕ W26
GPP_RX2P AD28/GPIO28
AD15
˚ˣˣʳˣ̂̅̇˄ʳ˙̂̅ʳ˨˦˕ˆ˃ʳ̂́ʳˠ˂˕ʳʳ˅˃˄˃˄˄˃ˆ W24
GPP_RX2N AD29/GPIO29
AC15
W23
GPP_RX3P
GPP_RX3N
AD30/GPIO30
AD31/GPIO31 AE16
AN3
˟˸̉˸˿ʳ̆˻˼˹̇ʳ̇̂ʳ˜˦˟ˉ˅ˉˊ
CBE0#
CBE1# AJ8
AN10 +1.5VS +3VS
2 CBE2# 2
+1.1VS_CKVDD R833 1 2 2K_0402_1% CLK_CALRN F27 CLK_CALRN CBE3# AD12
AG10
FRAME#
1
AK9
DEVSEL# Q38 change to SB000006A00
IRDY# AL10
G30 AF10 R834 20101228
PCIE_RCLKP TRDY#
2
For "EXT" CLK mode, input to PCIE, 10K_0402_5%
SS G28 PCIE_RCLKN PAR AE10
AH1 R836
2 2
APU_DISP_CLKP STOP#
8 APU_DISP_CLKP R26 DISP_CLKP PERR#
AM9 4.7K_0402_5%
B
APU_DISP_CLKN T26 AH8
8 APU_DISP_CLKN DISP_CLKN SERR#
AG15
APU DISP
1
REQ0#
E
TRAVIS_CLKP APU_PWRGD
NSS 26 TRAVIS_CLKP H33
DISP2_CLKP REQ1#/GPIO40
AG13 3 1 APU_PWRGD_L 47
C
TRAVIS_CLKN H31 AF15 Q38
26 TRAVIS_CLKN DISP2_CLKN REQ2#/CLK_REQ8#/GPIO41
AM17 T23 MMBT3904_NL_SOT23-3
APU_CLKP REQ3#/CLK_REQ5#/GPIO42
8 APU_CLKP T24 AD16
APU_CLKN APU_CLKP GNT0# R842 1
T23 AD13 2 0_0402_5%
APU 8 APU_CLKN APU_CLKN GNT1#/GPO44
AD21
PE_GPIO0 18
˥˧˖ʳ˕˔˧˧ʳ˖̂́́ˁ
GNT2#/SD_LED/GPO45 PE_GPIO1 25,36
CLK_PEG_VGA J30 AK17 T24
18 CLK_PEG_VGA CLK_PEG_VGA# SLT_GFX_CLKP GNT3#/CLK_REQ7#/GPIO46
VGA 18 CLK_PEG_VGA# K29 SLT_GFX_CLKN CLKRUN# AD19
AH9 +RTCBATT
CLK_PCIE_LAN R604 1 0_0402_5% CLK_PCIE_LAN_R LOCK#
29 CLK_PCIE_LAN 2 H27
GPP_CLK0P
1
GLAN CLK_PCIE_LAN# R625 1 0_0402_5%
2 CLK_PCIE_LAN#_R H28 AF18
29 CLK_PCIE_LAN# GPP_CLK0N INTE#/GPIO32 PE_GPIO1 1
AE18 2 JRTC1
+
CLK_PCIE_MINI1 R644 1 0_0402_5% CLK_PCIE_MINI1_R J27 INTF#/GPIO33 R109 10K_0402_5%
32 CLK_PCIE_MINI1 2 AC16 SUYIN_060003HA002G202ZL
CLK_PCIE_MINI1#R572 1 0_0402_5% CLK_PCIE_MINI1#_R K26 GPP_CLK1P INTG#/GPIO34
WLAN 32 CLK_PCIE_MINI1# 2
GPP_CLK1N INTH#/GPIO35 AD18 @
F33
CLOCK GENERATOR
GPP_CLK2P
F31 GPP_CLK2N LPC_CLK0_EC_R R8431 2 LPC_CLK0_EC
SS E33
LPCCLK0
B25
R6711 22_0402_5%
2
LPC_CLK0_EC 16,36
GPP_CLK3P LPC_CLK1_R R844 1 22_0402_5% CLK_PCI_DB 32
E31 D25 2 LPC_CLK1 16
GPP_CLK3N LPCCLK1 LPC_AD0 0_0402_5%
LAD0 D27 LPC_AD0 32,36
M23 C28 LPC_AD1
3 GPP_CLK4P LAD1 LPC_AD2 LPC_AD1 32,36 3
-
M24 GPP_CLK4N LAD2 A26 LPC_AD2 32,36
LPC_AD3
LPC
A29 LPC_AD3 32,36
2
LAD3
M27 GPP_CLK5P LFRAME# A31 LPC_FRAME# 32,36
M26 GPP_CLK5N LDRQ0# B27
AE27 CONN@
LDRQ1#/CLK_REQ6#/GPIO49
N25 GPP_CLK6P SERIRQ/GPIO48 AE19 SERIRQ 36
N26
GPP_CLK6N
R23
GPP_CLK7P APU_PG/APU_RST#/LDT_STP# : OD pin
R24 GPP_CLK7N DMA_ACTIVE# G25 ALLOW_STOP 8 DMA_ACTIVE# : IN/OD, 0.8V threshold
E28 R853 1 @ 2 0_0402_5% PROCHOT# : IN, 0.8V threshold
PROCHOT# APU_PWRGD EC_THERM# 8,36,47
N27
GPP_CLK8P APU_PG
E26 APU_PWRGD 8 LDT_STP : No use, NC
APU
R27 GPP_CLK8N LDT_STP# G26

APU_RST# F26 APU_RST# 8 DMA active. The FCH drives the DMA_ACTIVE# to
R657 1
EMI2 22_0402_5% CLK_SD_48M_R J26
APU to notify DMA activity. This will cause the APU
31 CLK_SD_48M 14M_25M_48M_OSC to reestablish the UMI link quicker.
H7 +RTCBATT
S5_CORE_EN R855 1
C1200 F1 2 22_0402_5% RTC_CLK 16,36
RTCCLK
INTRUDER_ALERT# F3
1
2 1 R856 1 2 0_0402_5% 25M_X1 C31 E6
25M_X1 VDDBT_RTC_G R857
S5 PLUS
1
G2 32K_X1 1K_0402_5%
12P_0402_50V8J R858 32K_X1
X1 1M_0402_5% 25M_X2 C33
2
25M_X2 D23
25MHZ_20PF_7A25000012 +RTCVCC
2
G4 32K_X2 2
32K_X2 RTCVCC_R
2 1 1 2 1
R859 510_0402_5% 3 +CHGRTC
0.1U_0402_16V4Z
C1201 C1202 1 1 C1203 W=20mils
12P_0402_50V8J
1
1U_0402_6.3V6K
0.1U_0402_16V4Z
HUDSON-M2_FCBGA656 1
M2@ CLRP1 C1204 DAN202UT106_SC70-3
SHORT PADS
2
4 C1205 2 2 4
for Clear CMOS 2
1 2 32K_X1
Y4 @
4 3
10P_0402_50V8J
1
R861
20M_0402_5% 1 2 Security Classification Compal Secret Data Compal Electronics, Inc.
2
C1206
32.768KHZ_7PF_Q13MC1461000100 Issued Date 2010/08/04 2011/12/31 Title
32K_X2 Deciphered Date
1 2
Hudson-M2/M3-UMI/PCI/CLOCK/LPC/RTC
Close
10P_0402_50V8J to HUDSON-M2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
PCIE_RST2 : Reset PCIE device on Hudson2

U25D
HUDSON-2
AB6 G8
USB MISC
EC_LID_OUT# PCIE_RST2#/PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
36 EC_LID_OUT# R2
RI#/GEVENT22# USB_RCOMP R863 1
W7
SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
B9 2 11.8K_0402_1%
36 SLP_S3# T3 SLP_S3#
36 SLP_S5# W2 H1
SLP_S5# USB_FSD1P/GPIO186
36 PBTN_OUT# J4 PWR_BTN# USB_FSD1N H3
36 FCH_PWRGD N7
PWR_GOOD
USB 1.1
USB_FSD0P/GPIO185 H6
ACPI / WAKE UP EVENTS

TEST0 T9 H5
TEST1 TEST0 USB_FSD0N
T10
1 TEST2 TEST1/TMS 1
V9 H10
TEST2 USB_HSD13P
G10
USB_HSD13N
36 EC_GA20 AE22 GA20IN/GEVENT0#
USB_HSD12P
K10 Hudson-M2 Hudson-M3
36 EC_KBRST# AG19
KBRST#/GEVENT1# USB_HSD12N
J12 EHCI CTL xHCI CTL
36 EC_SCI# R9 LPC_PME#/GEVENT3# DEV 22, Fn 2 DEV 16, Fn 1
36 EC_SMI# C26 LPC_SMI#/GEVENT23# USB_HSD11P G12 <Disable CTL of M2> xHCI CTL
T5 LPC_PD#/GEVENT5# USB_HSD11N F12 DEV 16, Fn 0
+3VALW 1 @ 2 SYS_RESET# U4
FCH_PCIE_WAKE# R18 10K_0402_5% SYS_RESET#/GEVENT19# USB20_P10
29,32,36 FCH_PCIE_WAKE# K1 K12 USB20_P10 34
WAKE#/GEVENT8# USB_HSD10P USB20_N10
V7 K13
THERMTRIP: 8 H_THERMTRIP# R10
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
USB_HSD10N USB20_N10 34 USB1
Need level shift from +3VALW to +1.5V +3VS 1 2 AF19 B11
R862 10K_0402_5% WD_PWRGD USB_HSD9P
USB_HSD9N
D11 Hudson-M2/M3
36 EC_RSMRST# U2 RSMRST# EHCI CTL
USB_HSD8P
E10 DEV 19, Fn 2
AG24 CLK_REQ4#/SATA_IS0#/GPIO64 USB_HSD8N F10
AE24
CLK_REQ3#/SATA_IS1#/GPIO63
AE26 C10
SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD7P
R81 1 2 0_0402_5% LAN_CLKREQ#_1 AF22 A10
USB 2.0
29 LAN_CLKREQ# CLK_REQ0#/SATA_IS3#/GPIO60 USB_HSD7N
AH17
Modify 2010212-AMD request SATA_IS4#/FANOUT3/GPIO55
AG18 H9
SATA_IS5#/FANIN3/GPIO59 USB_HSD6P
1 2 AF24 G9
FCH_SCLK0 R873 10K_0402_5% SPKR/GPIO66 USB_HSD6N
GPIO
11,12,32 FCH_SCLK0 AD26 SCL0/GPIO43
SM bus 0-->S0 PWR domain FCH_SDATA0 AD25 A8
11,12,32 FCH_SDATA0 SDA0/GPIO47 USB_HSD5P
FCH_SCLK1 T7 C8
SM bus 1-->S5 PWR domain FCH_SDATA1 SCL1/GPIO227 USB_HSD5N
R7
SDA1/GPIO228 USB20_P4
VGA_PD: Support MLDAC power AG25 F8
save if connect 32 MINI1_CLKREQ#
MINI1_CLKREQ# AG22
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
USB_HSD4P
USB_HSD4N E8 USB20_N4 USB20_P4 31
USB20_N4 31
CardReder Hudson-M2/M3
0: MLDAC power on
J2
IR_LED#/LLB#/GPIO184 EHCI CTL
AG26 C6 USB20_P3 DEV 18, Fn 2
2
1: MLDAC power off
16 VGA_PD
VGA_PD V8
SMARTVOLT2/SHUTDOWN#/GPIO51
DDR3_RST#/GEVENT7#/VGA_PD
USB_HSD3P
USB_HSD3N
A6 USB20_N3 USB20_P3 32
USB20_N3 32
WLAN(BT) 2
W8 GBE_LED0/GPIO183
Y6 C5 USB20_P2
V10
SPI_HOLD#/GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
USB_HSD2P
USB_HSD2N
A5 USB20_N2 USB20_P2 27
USB20_N2 27
CMOS
AA8 GBE_STAT0/GEVENT11#
T29 AF25 C1 USB20_P1
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD1P
USB_HSD1N C3 USB20_N1 USB20_P1 30
USB20_N1 30
USB3
M7 E1 USB20_P0
R8
BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_HSD0P
USB_HSD0N E3 USB20_N0
USB20_P0 34
USB20_N0 34
USB2
T1
USB OC
USB_OC5#/IR_TX0/GEVENT17# USBSS_CALRP R864 1 M3@
P6 C16 2 1K_0402_1%
USB_OC4#/IR_RX0/GEVENT16# USBSS_CALRP USBSS_CALRN R865 1
F5 A16 2 1K_0402_1% +FCH_VDD_11_SSUSB_S
USB_OC2# USB_OC3#/AC_PRES/TDO/GEVENT15# USBSS_CALRN M3@
34 USB_OC2# P5 USB_OC2#/TCK/GEVENT14#
USB_OC1# J7 A14
34 USB_OC1# USB_OC0# USB_OC1#/TDI/GEVENT13# USB_SS_TX3P
34 USB_OC0# T8 USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# USB_SS_TX3N C14 Hudson-M3
xHCI CTL
USB_SS_RX3P C12 DEV 16, Fn 1
USB_SS_RX3N A12 xHCI CTL
DEV 16, Fn 0
R866 1 2 33_0402_5% HDA_BITCLK AB3 D15
30 HDA_BITCLK_AUDIO HDA_SDOUT AZ_BITCLK USB_SS_TX2P
R867 1 2 33_0402_5% AB1 B15
30 HDA_SDOUT_AUDIO HDA_SDIN0 AZ_SDOUT USB_SS_TX2N
AA2
HD AUDIO
30 HDA_SDIN0 AZ_SDIN0/GPIO167
HDA_SDIN1 Y5 E14
USB 3.0
T31 AZ_SDIN1/GPIO168 USB_SS_RX2P
Y3 AZ_SDIN2/GPIO169 USB_SS_RX2N F14
T35 Y1
R868 1 HDA_SYNC AZ_SDIN3/GPIO170
30 HDA_SYNC_AUDIO 2 33_0402_5% AD6 F15
+3VALW R869 1 HDA_RST# AZ_SYNC USB_SS_TX1P
30 HDA_RST_AUDIO# 2 33_0402_5% AE4 AZ_RST# USB_SS_TX1N G15
USB_SS_RX1P H13
1 2 USB_OC2# G13
R56 100K_0402_5% USB_SS_RX1N
1 2 USB_OC0# K19 J16 USB30_MTX_DRX_P0 C39 1 2 0.1U_0402_16V7K
3 PS2_DAT/SDA4/GPIO187 USB_SS_TX0P USB30_MTX_DRX_N0 USB30_MTX_C_DRX_P0 34 3
R55 100K_0402_5% T27 J19 H16 C37 1 2 0.1U_0402_16V7K On board
PS2_CLK/CEC/SCL4/GPIO188 USB_SS_TX0N USB30_MTX_C_DRX_N0 34
1 2 USB_OC1# J21 M3@ M3@
SPI_CS2#/GBE_STAT2/GPIO166 USB30_MRX_DTX_P0
USB Conn
R54 100K_0402_5% J15
H_THERMTRIP# USB_SS_RX0P USB30_MRX_DTX_N0 USB30_MRX_DTX_P0 34
1 2 K15 USB30_MRX_DTX_N0 34
R871 10K_0402_5% +3VALW USB_SS_RX0N
1 2 FCH_SCLK1 FCH_GPIO189 D21
R874 2.2K_0402_5% FCH_GPIO190 PS2KB_DAT/GPIO189 R870 1
C20 H19 2 10K_0402_5%
FCH_SDATA1 FCH_GPIO191 PS2KB_CLK/GPIO190 SCL2/GPIO193 R872 1
1 2 D23 G19 2 10K_0402_5%
PS2M_DAT/GPIO191 SDA2/GPIO194
8.2K_0402_5%
8.2K_0402_5%
@
8.2K_0402_5%
@
R876 2.2K_0402_5% @ C22 EMBEDDED CTRL G22 APU_SIC

PS2M_CLK/GPIO192 SCL3_LV/GPIO195 APU_SIC 6,8
1
1 2 EC_LID_OUT# G21 APU_SID

SDA3_LV/GPIO196 APU_SID 6,8
R877 10K_0402_5% E22
EC_PWM0/EC_TIMER0/GPIO197
R47
R45
R43
1 2 FCH_PCIE_WAKE# H22
R878 10K_0402_5% EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2
F21 KSO_0/GPIO209 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 J22 EC_PWM2 16
@ E20 H21
2
Modify 2010212-AMD request FCH_GPIO189 KSO_1/GPIO210 EC_PWM3/EC_TIMER3/GPIO200

F20 KSO_2/GPIO211
FCH_GPIO190 A22 K21
FCH_GPIO191 KSO_3/GPIO212 KSI_0/GPIO201
E18 KSO_4/GPIO213 KSI_1/GPIO202 K22
A20 F22
KSO_5/GPIO214 KSI_2/GPIO203
1
1
8.2K_0402_5%
R48
8.2K_0402_5%
@
8.2K_0402_5%
@
+3VS @ J18 F24

Project SKU ID H18
E24
1 2 FCH_SCLK0 G18 B23
R880 2.2K_0402_5% GPIO189 (use VGA) L(NO) H(YES) KSO_8/GPIO217 KSI_5/GPIO206
B21 C24
R46
R44
1 2 FCH_SDATA0 R44 R43 K18 F18

2
R881 2.2K_0402_5% GPIO190 (use PX) L(NO) H(YES) KSO_10/GPIO219 KSI_7/GPIO208

D19
MINI1_CLKREQ# KSO_11/GPIO220
1 2 R46 R45 A18
R882 8.2K_0402_5% GPIO191 L(15") H(17") KSO_12/GPIO221
C18 KSO_13/GPIO222
@ R48 R47 B19
Modify 2010212-AMD request Add Project ID Table KSO_14/GPIO223
B17 KSO_15/GPIO224
201011301600 A24
KSO_16/GPIO225
D17
KSO_17/GPIO226
4 LAN_CLKREQ#_1 HUDSON-M2_FCBGA656 4
1 2
R940 8.2K_0402_5% M2@
Modify 20101111
1 2 EC_RSMRST# +3VALW For FCH internal debug use

R884 2.2K_0402_5%
1 @ 2 HDA_BITCLK 1 @ 2 TEST0
R885 10K_0402_5% R887 2.2K_0402_5%
1 @ 2 HDA_SDIN0 1 @ 2 TEST1 Security Classification Compal Secret Data Compal Electronics, Inc.
R886 10K_0402_5% R889 2.2K_0402_5% Issued Date 2010/08/04 2011/12/31 Title
@ HDA_SDIN1 @ TEST2 Deciphered Date
1 2 1 2
R888 10K_0402_5% R890 2.2K_0402_5%
Hudson-M2/M3-ACPI/USB/EC
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
U25B SYS BIOS ROM 0.1U_0402_16V4Z C466

+3VALW
HUDSON-2 2 1
AK19 AL14 +3VALW
33 SATA_STX_DRX_P0 SATA_TX0P SD_CLK/SCLK_2/GPIO73
AM19 AN14 U28
33 SATA_STX_DRX_N0 SATA_TX0N SD_CMD/SLOAD_2/GPIO74 FCH_SPI_CS1#
HDD1 SD_CD/GPIO75
AJ12 1
R626 1
2
FCH_SPI_WP#
1
CS# VCC
8 @
FCH_SPI_CLK
33 SATA_DTX_C_SRX_N0 AL20
SATA_RX0N SD_WP/GPIO76
AH12 2 1K_0402_5% 3
WP# SCLK
6
SD CARD
AN20 AK13 R934 1 @ 2 10K_0402_5% FCH_SPI_HOLD# 7 5 FCH_SPI_MOSI
33 SATA_DTX_C_SRX_P0 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 HOLD# SI FCH_SPI_MISO
AM13 R935 @ 10K_0402_5% 4 2
SD_DATA1/SDATO_2/GPIO78 @ GND SO
33 SATA_STX_DRX_P1 AN22 SATA_TX1P SD_DATA2/GPIO79 AH15 @
AL22 AJ14 MX25L1606EM2I-12G SOP 8P
33 SATA_STX_DRX_N1 SATA_TX1N SD_DATA3/GPIO80
ODD SA000041N00
AH20 AC4 GBE_COL
33 SATA_DTX_C_SRX_N1 SATA_RX1N GBE_COL
AJ20 AD3 GBE_CRS @ R36 @ C23
1 33 SATA_DTX_C_SRX_P1 SATA_RX1P GBE_CRS FCH_SPI_CLK 1
GBE_MDCK AD9 1 2 1 2
AJ22 W10 GBE_MDIO 10_0402_5%
SATA_TX2P GBE_MDIO 10P_0402_50V8J
AH22 SATA_TX2N GBE_RXCLK AB8
AH7 Add for EMI 201011291330
GBE_RXD3
AM23 AF7
SATA_RX2N GBE_RXD2
AK23 SATA_RX2P GBE_RXD1 AE7
AD7 +3VALW
GBE_RXD0
AH24 SATA_TX3P GBE_RXCTL/RXDV AG8
AJ24 AD1 GBE_RXERR GBE_MDIO 1 2
SATA_TX3N GBE_RXERR R891 10K_0402_5%
AB7
GBE LAN
GBE_TXCLK
AN24 SATA_RX3N GBE_TXD3 AF9
AL24 AG6 Change to PD 20101112
SATA_RX3P GBE_TXD2
AE8
GBE_TXD1 GBE_PHY_INTR
AL26 AD8 1 2
SATA_TX4P GBE_TXD0 R892 10K_0402_5%
AN26 SATA_TX4N GBE_TXCTL/TXEN AB9
AC2 GBE_COL 1 2
SERIAL ATA
GBE_PHY_PD R893 10K_0402_5%
AJ26 SATA_RX4N GBE_PHY_RST# AA7
AH26 W9 GBE_PHY_INTR GBE_CRS 1 2
SATA_RX4P GBE_PHY_INTR R894 10K_0402_5%
AN29 GBE_RXERR 1 2
SATA_TX5P FCH_SPI_MISO R895 10K_0402_5%
AL28 V6
SATA_TX5N SPI_DI/GPIO164 FCH_SPI_MOSI
V5
SPI_DO/GPIO163
SPI ROM
AK27 V3 FCH_SPI_CLK_R R35 1 @ 2 0_0402_5% FCH_SPI_CLK
SATA_RX5N SPI_CLK/GPIO162 FCH_SPI_CS1#
AM27 SATA_RX5P SPI_CS1#/GPIO165 T6 Add SYS BIOS ROM
V1 FCH_SPI_WP#
ROM_RST#/SPI_WP#/GPIO161 20101111
AL29 NC6
AN31 NC7
L30 FCH_CRT_R 27
VGA_RED R896 1
AL31 2 150_0402_1%
NC8
AL33
NC9
VGA_GREEN L32 FCH_CRT_G 27
AH33 R897 1 2 150_0402_1%
2 NC10 2
AH31 NC11
M29 FCH_CRT_B 27
VGA_BLUE R898 1
AJ33 2 150_0402_1%
VGA DAC
NC12
AJ31 NC13
M28 FCH_CRT_HSYNC 27
VGA_HSYNC/GPO68
VGA_VSYNC/GPO69 N30 FCH_CRT_VSYNC 27
VGA_DDC_SDA/GPO70 M33 FCH_CRT_DDC_SDA 27

1K_0402_1% 2 1 R899 SATA_CALRP AF28 N32
SATA_CALRP VGA_DDC_SCL/GPO71 FCH_CRT_DDC_SCL 27
1K_0402_1% 2 1 R900 SATA_CALRN AF27
+AVDD_SATA SATA_CALRN
K31 R901 1 2 715_0402_1%
VGA_DAC_RSET
SATA_LED# AD22
32 SATA_LED# SATA_ACT#/GPIO67
AUX_VGA_CH_P V28 ML_VGA_AUXP_C 8
+3VS R902 1 2 10K_0402_5% V29
AUX_VGA_CH_N ML_VGA_AUXN_C 8
AF21
VGA MAINLINK
SATA_X1
U28 AUXCAL 1 2 +VDDAN_11_ML
AUXCAL R903 100_0402_1%
T31 ML_VGA_TXP0 8
ML_VGA_L0P
T33 ML_VGA_TXN0 8
ML_VGA_L0N
AG21 SATA_X2 ML_VGA_L1P T29 ML_VGA_TXP1 8
T28 ML_VGA_TXN1 8
ML_VGA_L1N
ML_VGA_L2P R32 ML_VGA_TXP2 8
R30 ML_VGA_TXN2 8
ML_VGA_L2N
ML_VGA_L3P P29 ML_VGA_TXP3 8
ML_VGA_L3N P28 ML_VGA_TXN3 8 +FCH_VDDAN_33_DAC_R
C29 FCH_CRT_HPD FCH_CRT_HPD 2 1

ML_VGA_HPD/GPIO229 FCH_CRT_HPD 10
10K_0402_5% R904
3 @ 3
T40 AH16 FANOUT0/GPIO52 VIN0/GPIO175 N2 1 2
AM15 R5 10K_0402_5%
BT_ON FANOUT1/GPIO53 HW MONITOR
32 BT_ON AJ16 FANOUT2/GPIO54 VIN1/GPIO176 M3 1 2
R6 10K_0402_5%
AK15 L2 1 2
WL_OFF# FANIN0/GPIO56 VIN2/SDATI_1/GPIO177 R7 10K_0402_5%
32 WL_OFF# AN16 FANIN1/GPIO57
AL16 N4 1 2
FANIN2/GPIO58 VIN3/SDATO_1/GPIO178 R8 10K_0402_5%
P1 1 2
VIN4/SLOAD_1/GPIO179 R9 10K_0402_5%
1 2 K6 TEMPIN0/GPIO171
R13 10K_0402_5% P3 1 2
VIN5/SCLK_1/GPIO180 R10 10K_0402_5% GL-02/10/2011: Please enabled integrated pull-up/pull-down and left unconnected.
1 2 K5 TEMPIN1/GPIO172 VIN6/GBE_STAT3/GPIO181 M1 1 2
R14 10K_0402_5% R11 @ 10K_0402_5%
VIN7/GBE_LED3/GPIO182 M5 1 2
1 2 K3 R12 10K_0402_5%
R15 10K_0402_5% TEMPIN2/GPIO173
AG16
NC1
1 2 M6 AH10
R16 10K_0402_5% TEMPIN3/TALERT#/GPIO174 NC2
A28
NC3
G27
NC4
L4
NC5
HUDSON-M2_FCBGA656
M2@
4 4

Hudson-M2/M3-SATA/GBE/HWM
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
STRAP PINS
PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK
1 1
PULL ALLOW USE NON_FUSION EC CLKGEN LPC ROM S5 PLUS If support ML DAC power down when no VGA plug
HIGH PCIE GEN2 DEBUG CLOCK MODE ENABLED ENABLED MODE
STRAPS DEFAULT DISABLED
DEFAULT DEFAULT DEFAULT
L47 30mil
1 2
PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS FBMA-L11-201209-221LMA30T_0805
LOW PCIE GEN1 DEBUG CLOCK DISABLED DISABLE MODE 220 ohm
STRAP MODE ENABLED +3VS +FCH_VDDAN_33_DAC +FCH_VDDAN_33_DAC_R
DEFAULT DEFAULT DEFAULT
@ L48
@Q39
@ Q39 3 1 1 2
2.2U_0603_6.3V4Z
AP2301GN-HF_SOT23-3 FBMA-L11-201209-221LMA30T_0805
0.1U_0402_16V4Z
C1209
C1210
220 ohm
1 1
2
+3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW
2 2
R905
R906 10K_0402_5%
R907 10K_0402_5%
R908 10K_0402_5%
R909 10K_0402_5%
R910 10K_0402_5%
R911 10K_0402_5%
VGA_PD# AO3413 Vgs(max)=1V
1
1
1 2
10K_0402_5%
@ @ @ R912 0_0402_5%
+1.1VS +FCH_VDDAN_11_MLDAC
2
2
30mil
@ Q40 3 1 1 @ 2
13 PCI_CLK1
AP2301GN-HF_SOT23-3 R913 0_0402_5%
2 13 PCI_CLK3 2
2
13 PCI_CLK4
13,36 LPC_CLK0_EC VGA_PD#

+3VS
13 LPC_CLK1
14 EC_PWM2
13,36 RTC_CLK
1
100K_0402_5%
R916
100K_0402_5%
R914
1
R915 10K_0402_5%
R917 10K_0402_5%
R918 10K_0402_5%
R919 10K_0402_5%
R920 10K_0402_5%
R921 2.2K_0402_5%
R922 2.2K_0402_5%
1
1
@
2
@ @ @
2
VGA_PD#
2
6
1K_0402_5%
R923
0_0402_5%
DMN66D0LDW-7_SOT363-6
Q41A
VGA_PD: Support MLDAC power
R924
save if not connect
@ @
0: MLDAC power on 2
1: MLDAC power off
3
Q41B
1U_0402_6.3V6K
1
1
C1211
@
Check VGA_PD states
DEBUG STRAPS 14 VGA_PD
1
5
2
4
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23] R925 C1212
2.2K_0402_5%
2
3 1U_0402_6.3V6K 3
1
PCI_AD26 PCI_AD27 PCI_AD25 PCI_AD24 PCI_AD23
USE PCI DISABLE USE FC USE DEFAULT DISABLE PCI

PULL PLL ILA PLL PCIE STRAPS MEM BOOT
HIGH AUTORUN
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
PULL BYPASS ENABLE BYPASS USE EEPROM ENABLE PCI

LOW PCI PLL ILA FC PLL PCIE STRAPS MEM BOOT
AUTORUN
13 PCI_AD27
13 PCI_AD26
13 PCI_AD25
13 PCI_AD24
13 PCI_AD23
R926 2.2K_0402_5%
R927 2.2K_0402_5%
R928 2.2K_0402_5%
R929 2.2K_0402_5%
R930 2.2K_0402_5%
4 4
1
@ @ @ @ @
2

Hudson-M2/M3-STRAP
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
C1218 / C1219 / C1247 Change to SE00000I10

20101228 +VCC_FCH_R +1.1VS
U25C 1007mA
131mA 10mils 1 2
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
2.2U_0603_6.3V4Z
22U_0805_6.3V6M
HUDSON-2 R937 0_0805_5%
50mils
C1213
C1214
C1215
C1216
C1217
C1219
+3VS 1 2 +VDDIO_33_PCIGP AB17 T14
+3VS VDDIO_33_PCIGP_1 VDDCR_11_1
22U_0805_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
R20 0_0603_5% AB18 T17 1 1 1 1 1 1
VDDIO_33_PCIGP_2 VDDCR_11_2
C1218
C1228
C1220
C1221
L3 AE9 T20 U25E
PCI/GPIO I/O
+VDDPL_3.3V VDDIO_33_PCIGP_3 VDDCR_11_3
1 2 1 1 1 1 AD10 U16
VDDIO_33_PCIGP_4 VDDCR_11_4
2.2U_0603_6.3V4Z
MBK1608221YZF_2P HUDSON-2
0.1U_0402_16V7K
AG7 U18
VDDIO_33_PCIGP_5 VDDCR_11_5 2 2 2 2 2 2
C1222
C1229
CORE S0
220 ohm AC13
VDDIO_33_PCIGP_6 VDDCR_11_6 V14 A3 VSS VSS T25
1 1
1 1 AB12 VDDIO_33_PCIGP_7 VDDCR_11_7
V17 A33
VSS VSS
T27
2 2 2 2 AB13 V20 B7 U6
VDDIO_33_PCIGP_8 VDDCR_11_8 VSS VSS
AB14 VDDIO_33_PCIGP_9 VDDCR_11_9
Y17 B13
VSS VSS
U14
AB16 +1.1VS_CKVDD +1.1VS D9 U17
2 2 VDDIO_33_PCIGP_10 VSS VSS
47mA 10mils 20mils 340mA D13
VSS VSS
U20
+VDDPL_3.3V H24 H26 +1.1VS_CKVDD 1 2 E5 U21
VDDPL_33_SYS VDDAN_11_CLK_1 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
2.2U_0603_6.3V4Z
20mA 10mils J25 R25 0_0603_5% E12 U30
VDDAN_11_CLK_2 VSS VSS
C1223
C1224
C1225
C1226
C1230
+FCH_VDDAN_33_DAC_R 2 +VDDPL_33_DAC
1 V22 K24 E16 U32
CLKGEN I/O
+FCH_VDDPL_33_MLDAC VDDPL_33_DAC VDDAN_11_CLK_3 VSS VSS
20mA R22 0_0402_5% 10mils VDDAN_11_CLK_4
L22 1 1 1 1 1 E29
VSS VSS
V11
1 2 +FCH_VDDPL_33_MLDAC 2 +VDDPL_33_ML
1 U22
VDDPL_33_ML VDDAN_11_CLK_5
M22 F7 VSS VSS V16
R19 0_0603_5% 200mA R23 0_0402_5% 10mils N21 F9 V18
+3VS VDDAN_11_CLK_6 VSS VSS
2.2U_0603_6.3V4Z
+FCH_VDDAN_33_DAC_R
0.1U_0402_16V7K
T22 VDDAN_33_DAC VDDAN_11_CLK_7 N22 F11
VSS VSS
W4
2 2 2 2 2
C1227
C1231
@ L4 VDDPL_33_SSUSB_S 20mA 10mils P22 F13 W6

R936 2 M2@ 10_0402_5% +FCH_VDDPL_33_SSUSB_S VDDAN_11_CLK_8 VSS VSS
1 2 1 1 For Hudson3 USB3.0 only L18
VDDPL_33_SSUSB_S F16 VSS VSS W25
MBK1608221YZF_2P 17mA 10mils F17 W28
220 ohm For Hudson2, connect to GND +FCH_VDDPL_33_USB_S +PCIE_VDDR_FCH +1.1VS VSS VSS
D7
VDDPL_33_USB_S 50mils F19 VSS VSS Y14
2 2
43mA 10mils VDDAN_11_PCIE_1 AB24 1088mA F23 VSS VSS Y16
+VDDPL_33_PCIE AH29 Y21 +PCIE_VDDR_FCH 1 2 F25 Y18
VDDPL_33_PCIE VDDAN_11_PCIE_2 VSS VSS
PCI EXPRESS
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
2.2U_0603_6.3V4Z
93mA 10mils AE25 R938 0_0805_5% F29 AA6
VDDAN_11_PCIE_3 VSS VSS
C1233
C1234
C1235
C1236
C1237
LDO_CAP: Internally generated 1.8V +VDDPL_33_SATA AG28 VDDPL_33_SATA VDDAN_11_PCIE_4 AD24 G6 VSS VSS AA12
supply for the RGB outputs AB23 1 1 1 1 1 G16 AA13
@ VDDAN_11_PCIE_5 VSS VSS
For A11: Cap = 1nF VDDAN_11_PCIE_6
AA22 G32 VSS VSS AA14
+3VALW 1 2 M31 AF26 H12 AA16
+FCH_VDDAN_11_MLDAC For A12, Cap = DNI LDO_CAP VDDAN_11_PCIE_7 VSS VSS
M3@L6
M3@L6 C1232 2.2U_0603_6.3V4Z AG27 H15 AA17
VDDAN_11_PCIE_8 2 2 2 2 2 VSS VSS
1 2 +FCH_VDDPL_33_SSUSB_S L24 7mA 10mils H29 AA25
GROUND
VSS VSS
2.2U_0603_6.3V4Z
0.1U_0402_16V7K
MBK1608221YZF_2P 1 2 +VDDPL_11_DAC_L
1 2 +VDDPL_11_DAC V21
VDDPL_11_DAC J6 VSS VSS AA28
+1.1VS
C1238
C1239
MBK1608221YZF_2P R24 0_0402_5% 60mils J9 AA30

+VDDAN_11_ML VSS VSS
220 ohm 1 1 220 ohm/2A 226mA VDDAN_11_SATA_1
AA21 1337mA+AVDD_SATA J10 VSS VSS AA32
1 2 20mils Y20 +AVDD_SATA 1 2 J13 AB25
VDDAN_11_SATA_4 VSS VSS
0.1U_0402_16V7K
2.2U_0603_6.3V4Z
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
22U_0805_6.3V6M
M3@ M3@ R1148 0_0603_5% Y22 AB21 R941 0_0805_5% J28 AC6
VDDAN_11_ML_1 VDDAN_11_SATA_2 VSS VSS
MAIN LINK
C1240
4.7U_0603_6.3V6K
C1241
C1242
C1243
C1244
C1245
C1246
C1247
V23 AB22 J32 AC18
SERIAL ATA
2 2 VDDAN_11_ML_2 VDDAN_11_SATA_3 VSS VSS
1 1 1 V24 AC22 1 1 1 1 1 K7 AC28
2 VDDAN_11_ML_3 VDDAN_11_SATA_5 VSS VSS 2
V25 VDDAN_11_ML_4 VDDAN_11_SATA_6 AC21 K16 VSS VSS AD27
AA20 K27 AE6
VDDAN_11_SATA_7 VSS VSS
AA18 K28 AE15
+VDDAN_33_USB 2 2 2 VDDAN_11_SATA_8 2 2 2 2 2 VSS VSS
VDDAN_11_SATA_9 AB20 L6 VSS VSS AE21
L7 AC19 L12 AE28
VDDAN_11_SATA_10 +3VALW VSS VSS
1 2 +FCH_VDDPL_33_USB_S AB10 VDDIO_33_GBE_S L13 VSS VSS AF8
2.2U_0603_6.3V4Z
0.1U_0402_16V7K
0_0603_5% 10mils 59mA L15 AF12

VSS VSS
C1248
C1249
R1242 change to 2.2uf-AMD request AB11 N18 +VDDIO_33_S 1 2 L16 AF16

VDDCR_11_GBE_S_1 VDDIO_33_S_1 VSS VSS
GBE LAN
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 20110212 AA11 L19 R26 0_0402_5% L21 AF33
VDDCR_11_GBE_S_2 VDDIO_33_S_2 VSS VSS
C1250
C1251
C1252
C1282
VDDIO_33_S_3 M18 M13 VSS VSS AG30
3.3V_S5 I/O
change to 0ohm-AMD request 1 2 AA9 V12 1 1 1 1 M16 AG32
R945 0_0402_5% VDDIO_GBE_S_1 VDDIO_33_S_4 VSS VSS
20110212 AA10 V13 M21 AH5
2 2 +3VALW VDDIO_GBE_S_2 VDDIO_33_S_5 change to four 1uf-AMD request VSS VSS
VDDIO_33_S_6 Y12 M25
VSS VSS
AH11
L54 658mA 30mils Y13 20110212 N6 AH18
+VDDAN_33_USB VDDIO_33_S_7 2 2 2 2 VSS VSS
1 2 G7 VDDAN_33_USB_S_1 VDDIO_33_S_8 W11 N11 VSS VSS AH19
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V7K
FBMA-L11-201209-221LMA30T_0805 H8 N13 AH21
VDDAN_33_USB_S_2 VSS VSS
C1253
C1254
C1255
C1256
C1257
+3VS 220 ohm/2A J8 +3VALW N23 AH23
L15 VDDAN_33_USB_S_3 L28 VSS VSS
1 1 1 1 1 K8 VDDAN_33_USB_S_4 10mils 5mA N24
VSS VSS
AH25
1 2 +VDDPL_33_PCIE K9 G24 +VDDXL_3.3V 1 2 P12 AH27
VDDAN_33_USB_S_5 VDDXL_33_S VSS VSS
2.2U_0603_6.3V4Z
0.1U_0402_16V7K
0.1U_0402_16V7K
2.2U_0603_6.3V4Z
MBK1608221YZF_2P M9 MBK1608221YZF_2P P18 AJ18
C1258
C1259
C1260
C1261
220 ohm 2 2 2 2 2
M10
VDDAN_33_USB_S_7 220 ohm P20
VSS VSS
AJ28
1 1 N9 VDDAN_33_USB_S_8 1 1 P21
VSS VSS
AJ29
N10 P31 AK21
M12 VDDAN_33_USB_S_10
P33
VSS VSS
AK25
N12 R4 AL18
2 2 VDDAN_33_USB_S_11 2 2 VSS VSS
M11 VDDAN_33_USB_S_12
R11
VSS VSS
AM21
+1.1VALW R25 AM25
L57 +1.1VALW VSS VSS
140mA 10mils R28 AN1
USB
+VDDAN_11_USB_S VSS VSS
1 2 U12 VDDAN_11_USB_S_1 10mils 187mA T11
VSS VSS
AN18
2.2U_0603_6.3V4Z
0.1U_0402_16V7K
MBK1608221YZF_2P U13 N20 +VDDCR_1.1V 1 2 T16 AN28

VDDAN_11_USB_S_2 VDDCR_11_S_1 VSS VSS
C1262
C1263
1U_0402_6.3V6K
2.2U_0603_6.3V4Z
+3VS 220 ohm M20 R1145 0_0603_5% T18 AN33
VDDCR_11_S_2 VSS VSS
C1264
C1265
L22 1 1
3 +VDDPL_33_SATA 3
1 2 1 1 N8 VSSAN_HWM VSSPL_DAC T21
2.2U_0603_6.3V4Z
0.1U_0402_16V7K
MBK1608221YZF_2P L28
VSSAN_DAC
C1266
C1267
220 ohm 2 2
K25
VSSXL VSSANQ_DAC K33
1 1 VSSIO_DAC N28
2 2 H25
VSSPL_SYS
EFUSE R6
+1.1VALW
2 2 L59 +1.1VALW
197mA 10mils
1 2 +VDDCR_1.1V_USB T12 10mils 70mA L29
VDDCR_11_USB_S_1
2.2U_0603_6.3V4Z
0.1U_0402_16V7K
0.1U_0402_16V7K
MBK1608221YZF_2P T13 J24 +VDDPL_1.1V 1 2 HUDSON-M2_FCBGA656

VDDCR_11_USB_S_2 VDDPL_11_SYS_S
C1268
C1269
C1270
2.2U_0603_6.3V4Z
220 ohm MBK1608221YZF_2P M2@
0.1U_0402_16V7K
C1271
C1272
1 1 1 220 ohm Connected to VSS through a dedicated via.
1 1
2 2 2
2 2
+3VALW
+FCH_VDD_11_SSUSB_S 12mA
20mils 10mils +VDDAN_33_HWM
282mA P16 VDDAN_11_SSUSB_S_1 VDDAN_33_HWM_S M8 1 2
2.2U_0603_6.3V4Z
M3@ 2 +VDDAN_SSUSB R27 0_0402_5% AMD reply:
0.1U_0402_16V7K
1 M14
VDDAN_11_SSUSB_S_2
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
C1472
C1473
R1149 0_0603_5% N14 VDDAN_33_HWM_S: Please connect
VDDAN_11_SSUSB_S_3
C1273
C1274
C1275
For FCH M2 - BOM option 40mils P13 1 1 it to +3.3V_S5 directly if HWM is not used.
+FCH_VDD_11_SSUSB_S
VDDAN_11_SSUSB_S_4
VDDAN_11_SSUSB_S / VDDAN_11_SSUSB_S 1 1 1 P14
VDDAN_11_SSUSB_S_5
USB SS
Connected to VSS.
M3@ M3@ M3@ 2 2

2 2 2 30mils
N16
1
M2@ M2@ VDDCR_11_SSUSB_S_1 +3VS

N17
C1275 C1281 VDDCR_11_SSUSB_S_2
P17
VDDCR_11_SSUSB_S_3 10mils 26mA
0_0402_5% 0_0402_5% M17 AA4 +VDDIO_AZ 1 2
4 VDDCR_11_SSUSB_S_4 VDDIO_AZ_S R28 0_0402_5% VDDIO_AZ_S should be tied to 4
2
POWER 1 2 +3.3/1.5V_S5 rail if Wake on Ring

424mA C1276 2.2U_0603_6.3V4Z is supported
+1.1VALW 2 L61 M3@ 1 1 M3@ 2 +VDDCR_11_SSUSB HUDSON-M2_FCBGA656 1 2
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
R1150 0_0603_5% M2@ C1277 0.1U_0402_16V7K

C1278
C1279
C1280
C1281
FBMA-L11-201209-221LMA30T_0805
42 ohm/4A 1 1 1 1
M3@ M3@ M3@ M3@ Issued Date 2010/08/04 2011/12/31 Title
2 2 2 2 Deciphered Date
Hudson-M2/M3-POWER/GND
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
<DIGON> <VARY_BL>
Controls panel digital power on/off. LCD PWM (pulse width modulated)
GFX PCIE LANE REVERSAL Active High ,external PD need output to adjust LCD brightness
Active High ,external PD need
PCIE_FTX_C_GRX_P[0..7] U8A U8G
6 PCIE_FTX_C_GRX_P[0..7] PCIE_GTX_C_FRX_P[0..7]
PCIE_FTX_C_GRX_N[0..7] PCIE_GTX_C_FRX_P[0..7] 6
6 PCIE_FTX_C_GRX_N[0..7] PCIE_GTX_C_FRX_N[0..7]
PCIE_GTX_C_FRX_N[0..7] 6 LVDS CONTROL R386 1 VGA@
VARY_BL AK27 2 10K_0402_5%
AJ27 R387 1 VGA@ 2 10K_0402_5%
DIGON
PCIE_FTX_C_GRX_P0 AA38 Y33 PCIE_GTX_FRX_P0 C580 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P0
1
PCIE_FTX_C_GRX_N0 PCIE_RX0P PCIE_TX0P PCIE_GTX_FRX_N0 C291 0.1U_0402_16V7K PCIE_GTX_C_FRX_N0 1
Y37 PCIE_RX0N PCIE_TX0N Y32 1 2
VGA@
VGA@ TXCLK_UP_DPF3P AK35
PCIE_FTX_C_GRX_P1 Y35 W 33 PCIE_GTX_FRX_P1 C247 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P1 AL36
PCIE_FTX_C_GRX_N1 PCIE_RX1P PCIE_TX1P PCIE_GTX_FRX_N1 C473 0.1U_0402_16V7K PCIE_GTX_C_FRX_N1 TXCLK_UN_DPF3N
W 36 PCIE_RX1N PCIE_TX1N W 32 1 2
VGA@ TXOUT_U0P_DPF2P AJ38
VGA@ TXOUT_U0N_DPF2N AK37
PCIE_FTX_C_GRX_P2 W 38 U33 PCIE_GTX_FRX_P2 C572 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P2
PCIE_FTX_C_GRX_N2 PCIE_RX2P PCIE_TX2P PCIE_GTX_FRX_N2 C288 0.1U_0402_16V7K PCIE_GTX_C_FRX_N2
V37 PCIE_RX2N PCIE_TX2N U32 1 2 TXOUT_U1P_DPF1P AH35
VGA@ TXOUT_U1N_DPF1N AJ36
VGA@
PCIE_FTX_C_GRX_P3 V35 U30 PCIE_GTX_FRX_P3 C579 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P3 For UMA Mux. AG38
PCIE_FTX_C_GRX_N3 PCIE_RX3P PCIE_TX3P PCIE_GTX_FRX_N3 C316 0.1U_0402_16V7K PCIE_GTX_C_FRX_N3 TXOUT_U2P_DPF0P
U36 PCIE_RX3N PCIE_TX3N U29 1 2 TXOUT_U2N_DPF0N AH37
VGA@
VGA@ TXOUT_U3P AF35
PCIE_FTX_C_GRX_P4 U38 T33 PCIE_GTX_FRX_P4 C287 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P4 AG36
PCIE_FTX_C_GRX_N4 PCIE_RX4P PCIE_TX4P PCIE_GTX_FRX_N4 C228 0.1U_0402_16V7K PCIE_GTX_C_FRX_N4 TXOUT_U3N
T37 PCIE_RX4N PCIE_TX4N T32 1 2
PCI EXPRESS INTERFACE

VGA@
VGA@ LVTMDP
PCIE_FTX_C_GRX_P5 T35 T30 PCIE_GTX_FRX_P5 C224 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P5
PCIE_FTX_C_GRX_N5 PCIE_RX5P PCIE_TX5P PCIE_GTX_FRX_N5 C576 0.1U_0402_16V7K PCIE_GTX_C_FRX_N5
R36 PCIE_RX5N PCIE_TX5N T29 1 2 TXCLK_LP_DPE3P AP34
VGA@ TXCLK_LN_DPE3N AR34
VGA@
PCIE_FTX_C_GRX_P6 R38 P33 PCIE_GTX_FRX_P6 C295 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P6 AW 37
PCIE_FTX_C_GRX_N6 PCIE_RX6P PCIE_TX6P PCIE_GTX_FRX_N6 C472 0.1U_0402_16V7K PCIE_GTX_C_FRX_N6 TXOUT_L0P_DPE2P
P37 PCIE_RX6N PCIE_TX6N P32 1 2 TXOUT_L0N_DPE2N AU35
VGA@
VGA@ TXOUT_L1P_DPE1P AR37
PCIE_FTX_C_GRX_P7 P35 P30 PCIE_GTX_FRX_P7 C242 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P7 AU39
PCIE_FTX_C_GRX_N7 PCIE_RX7P PCIE_TX7P PCIE_GTX_FRX_N7 C468 0.1U_0402_16V7K PCIE_GTX_C_FRX_N7 TXOUT_L1N_DPE1N
N36 PCIE_RX7N PCIE_TX7N P29 1 2
2 VGA@ TXOUT_L2P_DPE0P AP35 2
VGA@ TXOUT_L2N_DPE0N AR35
N38 PCIE_RX8P PCIE_TX8P N33
M37 PCIE_RX8N PCIE_TX8N N32 TXOUT_L3P AN36
TXOUT_L3N AP37
M35 PCIE_RX9P PCIE_TX9P N30

L36 PCIE_RX9N PCIE_TX9N N29
2160809000A11SEYMOU_FCBGA962
L38 L33 VGA@
PCIE_RX10P PCIE_TX10P
K37 PCIE_RX10N PCIE_TX10N L32
K35 PCIE_RX11P PCIE_TX11P L30

J36 PCIE_RX11N PCIE_TX11N L29
J38 PCIE_RX12P PCIE_TX12P K33

H37 K32 +3VSG
PCIE_RX12N PCIE_TX12N
H35 PCIE_RX13P PCIE_TX13P J33

G36 PCIE_RX13N PCIE_TX13N J32
1
@
R394
G38 K30 2.2K_0402_5% VGA@
PCIE_RX14P PCIE_TX14P U21
F37 PCIE_RX14N PCIE_TX14N K29
5
2
2
P
3 13 PE_GPIO0 B 3
F35 H33 4 VGA_RST#
PCIE_RX15P PCIE_TX15P Y
E37 PCIE_RX15N PCIE_TX15N H32 13,26,29,32 PLT_RST# 1 A
G
3
NC7SZ08P5X_NL_SC70-5
CLOCK
13 CLK_PEG_VGA AB35 PCIE_REFCLKP
13 CLK_PEG_VGA# AA36 PCIE_REFCLKN 1 @ 2
R159 0_0402_5%
CALIBRATION
Y30 VGA_PCIE_CALRP R388 1 2 1.27K_0402_1%
PCIE_CALRP VGA@
2 1 AH16 Y29 VGA_PCIE_CALRN R390 1 2 2K_0402_1% +1.0VSG
R389 VGA@ 10K_0402_5% PW RGOOD PCIE_CALRN VGA@
VGA_RST# AA30 PERSTB
VGA@
4 4

Vancouver_ PCIE / LVDS
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
U8B
Strap Name Pin Straps description <all internal PD> Setting +3VSG External VGA Thermal Sensor
VIP Device Strap Enable indicates to the software driver (Internal PD) Don't have this strap on U9 VGA@
VIP_DEVICE_EN V2SYNC 0: Driver would ignore the value sampled on VHAD_0 during reset 0 AU24 1 8 VGA_SMB_CK2
(GENLK_VSYNC) 1: VHAD_0 to determine whether or not a VIP slave device Whistler and Seymour TXCAP_DPA3P
AV23 1 VGA@
VDD SCLK
TXCAM_DPA3N
0.1U_0402_16V4Z
C324
GPU_THERM_D+ 2 7 VGA_SMB_DA2
2200P_0402_50V7K D+ SDATA
VGA Disable determines (Internal PD) TX0P_DPA2P
AT25
VGA_DIS GPIO9 0: VGA Controller capacity enabled 0 MUTI GFX AR24 1 2 3 6 THM_ALERT#
DPA TX0M_DPA2N 2 C325 VGA@ D- ALERT#
1: The device will not be recognized as the system’s VGA controller
AU26 GPU_THERM_D- 4 5 1 2
TX1P_DPA1P THERM# GND +3VSG
Transmitter Power Saving Enable (Internal PD) AV25 R391 VGA@ 4.7K_0402_5%
TX1M_DPA1N
TX_PWRS_ENB GPIO0 0: 50% Tx output swing 1
1: full Tx output swing AR8 AT27 ADM1032ARMZ-2REEL_MSOP8
NC_DVPCNTL_MVP_0 TX2P_DPA0P
NC on Park, AU8 NC_DVPCNTL_MVP_1 TX2M_DPA0N AR26
PCI Express Transmitter De-emphasis Enable (Internal PD) AP8
NC_DVPCNTL_0
TX_DEEMPH_EN GPIO1 0: Tx de-emphasis diabled 1 Robson and Seymour AW8 AR30 +3VSG
NC_DVPCNTL_1 TXCBP_DPB3P
1: Tx de-emphasis enabled NC on Park, Robson AR3 NC_DVPCNTL_2 TXCBM_DPB3N AT29
AR1 +3VSG
1
VRAM_ID0 NC_DVPCLK 1
GPIO13,12,11 (config 2,1,0) : (Internal PD) memory apertures AU1
DVPDATA_0 TX3P_DPB2P
AV31
2
CONFIG[2] GPIO13 a) If BIOS_ROM_EN = 1, then Config[2:0] defines VRAM_ID1 AU3 AU30
CONFIG[3:0] VRAM_ID2 DVPDATA_1 DPB TX3M_DPB2N
AW3 R392 R393
the ROM type. 128 MB 000 VRAM_ID3 DVPDATA_2
CONFIG[1] GPIO12 001 AP6 AR32 4.7K_0402_5% 4.7K_0402_5%
2
b) If BIOS_ROM_EN = 0, then Config[2:0] defines 256 MB 001 * AW5 AT31 VGA@ VGA@ VGA@
DVPDATA_4 TX4M_DPB1N
CONFIG[0] GPIO11 the primary memory aperture size. 64 MB 010 AU5
1
DVPDATA_5 VGA_SMB_CK2 R80 1 @ SM_CK2 EC_SMB_CK2
AR6 AT33 2 0_0402_5% 1 6 EC_SMB_CK2 6,36
BIOS_ROM_EN GPIO22 Enable external BIOS ROM device (Internal PD) AW6
DVPDATA_7 TX5M_DPB0N
AU32
0: Diable, 1: Enable 0 AU6 Q8A DMN66D0LDW-7_SOT363-6
DVPDATA_8
5
AT7 DVPDATA_9 TXCCP_DPC3P AU14
AUD[1] HSYNC 00: No audio function; 10: Audio for DisplayPort only; AV7 AV13 VGA@
DVPDATA_10 TXCCM_DPC3N VGA_SMB_DA2 R82 1 @ SM_DA2 EC_SMB_DA2
01: Audio for DisplayPort and HDMI if adapter is detected; 00 AN7 2 0_0402_5% 4 3 EC_SMB_DA2 6,36
DVPDATA_11
AUD(0) VSYNC 11: Audio for both DisplayPort and HDMI
AV9 DVPDATA_12 TX0P_DPC2P AT15
AT9 AR14 Q8B DMN66D0LDW-7_SOT363-6
DVPDATA_13 TX0M_DPC2N
0= Advertises the PCI-E device as 2.5 GT/s capable at power-on AR10
DVPDATA_14
BIF_GEN2_EN GPIO2 1= Advertises the PCI-E device as 5.0 GT/s capable at power-on 1 AW10 DPC AU16
DVPDATA_15 TX1P_DPC1P
5.0 GT/s capability will be controlled by software AU10 DVPDATA_16 TX1M_DPC1N AV15
AP10 NC_DVPDATA_17
H2SYNC Internal use only. THIS PAD HAS AN INTERNAL AV11
NC_DVPDATA_18 TX2P_DPC0P
AT17
RESERVED (GENLK_CLK) NC on Park, AT11 AR16
PULL-DOWN AND MUST BE 0 V AT RESET. The NC_DVPDATA_19 TX2M_DPC0N
GPIO8 Robson and Seymour
AR12 NC_DVPDATA_20
pad may be left unconnected DNI AW12 NC_DVPDATA_21 NC_TXCDP_DPD3P AU20
GPIO21 AU12
NC_DVPDATA_22 NC_TXCDM_DPD3N
AT19
AP12 NC_DVPDATA_23
NC_TX3P_DPD2P AT21
Global Swap Lock on AJ21 SWAPLOCKA NC_TX3M_DPD2N AR20
Multiple GPUs
AK21
SWAPLOCKB NC on Park,
˩˥˔ˠʳ˜˗
DPD AU22
+1.8VSG NC_TX4P_DPD1P Robson and Seymour
NC_TX4M_DPD1N AV21
GPIO5 fast-power reduction: I2C AT23

X76@ X76@ X76@ X76@ NC_TX5P_DPD0P
HW control will casue display disturb Move to NC_TX5M_DPD0N AR22
1
1
10K_0402_5%
R426
10K_0402_5%
R427
10K_0402_5%
R428
10K_0402_5%
R429
AK26
should use SW method control DDCCLK_AUX3P,DDCDATA_AUX3N, SCL
AJ26
SDA Not share via for other GND
GPIO6 voltage control signal ,No use can NC
AD39
GENERAL PURPOSE I/O R
AD37
2
VRAM_ID0 VGA_GPIO0 RB
AH20 GPIO_0
VRAM_ID1 VGA_GPIO1 AH18 AE36
VRAM_ID2 VGA_GPIO2 GPIO_1 G
2 AN16 GPIO_2 GB
AD35 2
VRAM_ID3 VGA_GPIO3 AH23
X76@ X76@ X76@ X76@ VGA_GPIO4 GPIO_3_SMBDATA
AJ23 AF37
GPIO_4_SMBCLK B
1
1
10K_0402_5%
R432
10K_0402_5%
R433
10K_0402_5%
R434
10K_0402_5%
R435
AH17 AE38
GPIO_5_AC_BATT DAC1 BB
AJ17 GPIO_6
GPIO7 Controls backlight on/off. 2 VGA@ 1 VGA_ENBKL AK17 AC36 HSYNC
GPIO_7_BLON HSYNC
Active High ,need external PD R413 10K_0402_5% AJ13 GPIO_8_ROMSO VSYNC AC38 VSYNC
ROM AH15 HSYNC:VSYNC
2
GPIO_9_ROMSI
if GPIO22 High ,GPIO 11-13->CFG[0:2] AJ16 GPIO_10_ROMSCK
Config ROM type ,GPU has internal PD VGA_GPIO11 AK16 AB34 R414 1 2 499_0402_1% L8 11: Audio for both DisplayPort and HDMI
VGA_GPIO12 GPIO_11 RSET VGA@ BLM18AG121SN1D_0603 +3VSG
AL16
GPIO_12 10mil
GPIO6,15,16,20 VGA_GPIO13 AM16 70mA AVDD AD34 +AVDD 2 1 +1.8VSG
GPIO_13 VGA@ VGA@ VGA@ VGA@ VSYNC R417 1 @
Voltage control signal AM14 AE34 AUD Strap 2 10K_0402_5%
GPIO_14_HPD2 AVSSQ
22U_0805_6.3V6M
C331
GPU_VID0 AM13 10mil 1 1 1 HSYNC R418 1 @ 2 10K_0402_5%
GPIO6,15 no use can NC 48 GPU_VID0 GPIO_15_PWRCNTL_0
1U_0402_6.3V6K
C329
0.1U_0402_16V4Z
C330
AK14 100mA VDD1DI AC33 +VDD1DI AMD ref:120ohm/0.3A
THM_ALERT# GPIO_16
Thermal monitor interrupt AG30 GPIO_17_THERMAL_INT VSS1DI AC34
AN14 GPIO_18_HPD3
+3VSG 2 2 2
Critical temperature fault AM17 GPIO_19_CTF
GPU_VID1 AL13 AC30 L9
VGA_GPIO0 48 GPU_VID1 GPIO_20_PWRCNTL_1 R2/NC
R395 1 VGA@ 2 10K_0402_5% Reserved AJ14 AC31 NC on Whistler
R396 VGA_GPIO1 GPIO_22_ROMCSB GPIO_21_BB_EN R2B/NC
1 VGA@ 2 10K_0402_5% AK13 2 1 +1.8VSG
R397 VGA_GPIO2 GPIO_22_ROMCSB and Seymour
1 VGA@ 2 10K_0402_5% External BIOS device T30 AN13 GPIO_23_CLKREQB G2/NC AD30 VGA@
R398 1 @ 2 10K_0402_5% VGA_GPIO3 T32 AM23 AD31 VGA@ 1 VGA@ 1 VGA@ 1 BLM18AG121SN1D_0603
ON(1)/OFF(0) inter PD JTAG_TRSTB G2B/NC
1U_0402_6.3V6K
C332
0.1U_0402_16V4Z
C333
10U_0603_6.3V6M
C334
R401 1 @ 2 10K_0402_5% VGA_GPIO4 T18 AN23 AMD ref:120ohm/0.3A
T33 JTAG_TDI
Internal Debug AK23 JTAG_TCK B2/NC AF30 SM010030010
T34 AL24 AF31
VGA_GPIO11
no use can floating JTAG_TMS B2B/NC 2 2 2 200ma 120ohm@100mhz DCR 0.2
R405 1 VGA@ 2 10K_0402_5% T17 AM24
R406 @ 10K_0402_5% VGA_GPIO12 ON(1)/OFF(0) JTAG_TDO
1 2 AJ19
R408 @ 10K_0402_5% VGA_GPIO13 GENERICA
1 2 Stereo Sync AK19 GENERICB C/NC AC32
R409 1 @ 2 3K_0402_5% GPIO_22_ROMCSB AJ20 AD32
no use can NC GENERICC Y/NC
AK20 AF32
GENERICD COMP/NC
For ATI Cross fire AJ24
GENERICE_HPD4
AH26 DAC2
no use can NC NC_GENERICF_HPD5
AH24 AD29 T2
NC_GENERICG_HPD6 H2SYNC/GENLK_CLK
V2SYNC/GENLK_VSYNC
AC29 T3 Back compatibility(Manhattan)
AK24
HPD1 10mil +VDD2DI +VDD1DI
AG31 R77 1 @ 2 0_0402_5%
VDD2DI/NC VSS2DI R209 1 @
100mA AG32 2 0_0402_5% Whistler and Seymour
VSS2DI/NC
3
+1.8VSG R430 1 VGA@ 2 499_0402_1% 10mil Except A2VSSQ change to TSVSSQ, 3
SM_CK2 R78 1 VGA@ 2 0_0402_5% VGA_GPIO4 20mil 100mA AG33 +A2VDD R70 1 @ 2 0_0402_5% +3VSG others are NC
R431 1 VGA@ A2VDD/NC
2 249_0402_1% 10mil
2mA AD33 +A2VDDQ R256 1 @ 2 0_0402_5% +1.8VSG
SM_DA2 A2VDDQ/NC
R79 1 VGA@ 2 0_0402_5% VGA_GPIO3 SM010030010 C335 1 2 0.1U_0402_16V4Z +VGA_VREF AH13 1 @ 1 @ 1 @
VREFG
1U_0402_6.3V6K
C342
0.1U_0402_16V4Z
C343
10U_0603_6.3V6M
C344
200ma 120ohm@100mhz DCR 0.2 A2VSSQ/TSVSSQ AF33
VGA@
+1.8VSG
20mil 2 2 2
VGA@ L10 AA29 1 2
+DPLL_PVDD R2SET/NC R436 VGA@ 715_0402_1%
2 1 AM32
BLM18AG121SN1D_0603 DPLL_PVDD
1 1 VGA@ 1 VGA@ AN32
DPLL_PVSS 75mA
0.1U_0402_16V4Z
C340
1U_0402_6.3V6K
C341
AMD ref:470ohm/1A VGA@

C339 20mil DDC/AUX AM26
10U_0603_6.3V6M PLL/CLOCK DDC1CLK
AN31 DPLL_VDDC DDC1DATA AN26
2 2 2
125mA
AM27
+1.0VSG 27MCLK AUX1P
AV33 AL27
VGA@ L11 XTALOUT AU34 XTALIN AUX1N
+DPLL_VDDC XTALOUT
2 1 AM19
BLM18AG121SN1D_0603 DDC2CLK
1 VGA@ 1 VGA@ 1 VGA@ DDC2DATA
AL19 GPIO8 Serial-ROM output from ROM. if GPIO22 High ,GPIO 11-13->CFG[0:2]
10U_0603_6.3V6M
C345
0.1U_0402_16V4Z
C346
1U_0402_6.3V6K
C347
AMD ref:470ohm/1A XO_IN AW34

XO_IN
AN20 GPIO9 Serial-ROM input to ROM. Config ROM type ,GPU has internal PD
AUX2P
2 2 2
XO_IN2 AW35
XO_IN2 AUX2N
AM20 GPIO10 Serial-ROM clock to ROM. if GPIO22 Low ,GPIO 11-13->CFG[0:2]
Location VRAM_ID3 VRAM_ID2 VRAM_ID1 VRAM_ID0 GPIO22 erternal BIOS-ROM enable Config Primary memory-aperture size
1
VRAM DDCCLK_AUX3P AL30

R443 R444
DDCDATA_AUX3N
AM30 CFG[3:0]
Samsung @ @ GPIO8,GPIO9,GPIO10 no use can NC
SA00004GS30 64M16x8 0_0402_5% 0_0402_5% 128MB 000
0 0 0 0 NC_DDCCLK_AUX4P
AL29 NC on Park, GPIO22
K4W1G1646G-BC11 AF29 AM29 256MB 001 *
2
DPLUS NC_DDCDATA_AUX4N Robson and Seymour

AG29
DMINUS
THERMAL Enable need 3K PH ,no use must NC 64MB 010
Samsung DDCCLK_AUX5P
AN21
SA000047QA0 128M16x8 0 0 0 1 AM21
GPU_THERM_D+ DDCDATA_AUX5N
K4W2G1646C-HC11 AK32 TS_FDO
GPU_THERM_D- AJ30
DDC6CLK
Hynix AL31
TS_A/NC DDC6DATA
AJ31
SA000041S60 64M16x8 0 1 0 0
H5TQ1G63DFR-11C Future ASIC call MLPS NC_DDCCLK_AUX7P
AK30 NC on Park,
AJ32 AK29
OLD ASIC is Fan PWM TSVDD NC_DDCDATA_AUX7N Robson and Seymour
Hynix AJ33
TSVSS 20mA
4 SA00003YO30 128M16x8 0 1 0 1 4
H5TQ2G63BFR-11C
+1.8VSG L12
BLM18AG121SN1D_0603 10mil 2160809000A11SEYMOU_FCBGA962
VGA@ 2 1 +TSVDD VGA@
XTALOUT 2 1 27MCLK VGA@ 1 1 1
R445 1M_0402_5% VGA@ VGA@ VGA@
10U_0603_6.3V6M
C350
1U_0402_6.3V6K
C351
0.1U_0402_16V4Z
C352
120ohm/0.3A
VGA@ Y3
2 1 2 2 2
2 27MHZ_16PF_X5H027000FG1H
2 Security Classification Compal Secret Data Compal Electronics, Inc.
C353 C354 2010/07/12 2011/12/31 Title
Issued Date Deciphered Date
1
15P_0402_50V8J
VGA@
1
12P_0402_50V8J
VGA@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Vancouver_Strape/DP/HDMI//CRT
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
U8C U8D
DDR2 DDR2 DDR2 DDR2
GDDR3/GDDR5 GDDR5/GDDR3 MAA[0..12] GDDR3/GDDR5 GDDR5/GDDR3 MAB[0..12]
MDA[0..63] DDR3 DDR3 MAA[0..12] 23 MDB[0..63] DDR3 DDR3 MAB[0..12] 24
23 MDA[0..63] 24 MDB[0..63]
MDA0 C37 G24 MAA0 MDB0 C5 P8 MAB0
MDA1 NC_DQA0_0/DQA_0 NC_MAA0_0/MAA_0 MAA1 MDB1 DQB0_0/DQB_0 MAB0_0/MAB_0 MAB1
C35 NC_DQA0_1/DQA_1 NC_MAA0_1/MAA_1 J23 C3 DQB0_1/DQB_1 MAB0_1/MAB_1 T9
MDA2 A35 H24 MAA2 MDB2 E3 P9 MAB2
E34 J24 E1 N7
NC_DQA0_3/DQA_3 NC_MAA0_3/MAA_3 DQB0_3/DQB_3 MAB0_3/MAB_3
MEMORY INTERFACE A
MDA4 G32 H26 MAA4 MDB4 F1 N8 MAB4
NC_DQA0_4/DQA_4 NC_MAA0_4/MAA_4 DQB0_4/DQB_4 MAB0_4/MAB_4
MEMORY INTERFACE B
MDA5 D33 J26 MAA5 MDB5 F3 N9 MAB5
F32 NC_DQA0_6/DQA_6 NC_MAA0_6/MAA_6 H21 F5 DQB0_6/DQB_6 MAB0_6/MAB_6 U9
MDA7 E32 G21 MAA7 MDB7 G4 U8 MAB7
D31 H19 H5 Y9
F30 H20 H6 W9
1 MDA10 NC_DQA0_9/DQA_9 NC_MAA1_1/MAA_9 MAA10 MDB10 DQB0_9/DQB_9 MAB1_1/MAB_9 MAB10 1
C30 L13 J4 AC8
A30 G16 K6 AC9
MDA12 NC_DQA0_11/DQA_11 NC_MAA1_3/MAA_11 MAA12 A_BA[0..2] MDB12 DQB0_11/DQB_11 MAB1_3/MAB_11 MAB12 B_BA[0..2]
F28 NC_DQA0_12/DQA_12 NC_MAA1_4/MAA_12 J16 A_BA[0..2] 23 K5 DQB0_12/DQB_12 MAB1_4/MAB_12 AA7 B_BA[0..2] 24
MDA13 C28 H16 A_BA2 MDB13 L4 AA8 B_BA2
+1.5VSG MDA14 NC_DQA0_13/DQA_13 NC_MAA1_5/MAA_13_BA2 A_BA0 MDB14 DQB0_13/DQB_13 MAB1_5/BA2 B_BA0
A28 NC_DQA0_14/DQA_14 NC_MAA1_6/MAA_14_BA0 J17 M6 DQB0_14/DQB_14 MAB1_6/BA0 Y8
MDA15 E28 H17 A_BA1 +1.5VSG MDB15 M1 AA9 B_BA1
MDA16 NC_DQA0_15/DQA_15 NC_MAA1_7/MAA_A15_BA1 DQMA#[0..7] MDB16 DQB0_15/DQB_15 MAB1_7/BA1 DQMB#[0..7]
D27 NC_DQA0_16/DQA_16 DQMA#[0..7] 23 M3 DQB0_16/DQB_16 DQMB#[0..7] 24
MDA17 F26 A32 DQMA#0 MDB17 M5 H3 DQMB#0
NC_DQA0_17/DQA_17 NC_WCKA0_0/DQMA_0 DQB0_17/DQB_17 WCKB0_0/DQMB_0
1
MDA18 C26 C32 DQMA#1 MDB18 N4 H1 DQMB#1

NC_DQA0_18/DQA_18 NC_WCKA0B_0/DQMA_1 DQB0_18/DQB_18 WCKB0B_0/DQMB_1
1
R446 MDA19 A26 D23 DQMA#2 MDB19 P6 T3 DQMB#2
VGA@ MDA20 NC_DQA0_19/DQA_19 NC_WCKA0_1/DQMA_2 DQMA#3 R447 MDB20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 DQMB#3
F24 NC_DQA0_20/DQA_20 NC_WCKA0B_1/DQMA_3 E22 P5 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 T5
40.2_0402_1% 15mil MDA21 C24 C14 DQMA#4 VGA@ MDB21 R4 AE4 DQMB#4
MDA22 NC_DQA0_21/DQA_21 NC_WCKA1_0/DQMA_4 DQMA#5 40.2_0402_1% MDB22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 DQMB#5
A24 A14 15mil T6 AF5
2
MVREFDA MDA23 NC_DQA0_22/DQA_22 NC_WCKA1B_0/DQMA_5 DQMA#6 MDB23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 DQMB#6

E24 E10 T1 AK6
2
MDA24 NC_DQA0_23/DQA_23 NC_WCKA1_1/DQMA_6 DQMA#7 MVREFDB MDB24 DQB0_23/DQB_23 WCKB1_1/DQMB_6 DQMB#7
C22 D9 U4 AK5
NC_DQA0_24/DQA_24 NC_WCKA1B_1/DQMA_7 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
1
1 MDA25 A22 QSA[0..7] MDB25 V6 QSB[0..7]

NC_DQA0_25/DQA_25 QSA[0..7] 23 DQB0_25/DQB_25 QSB[0..7] 24
1
GDDR5/DDR2/GDDR3 GDDR5/DDR2/GDDR3
0.1U_0402_16V4Z
C355
R448 VGA@ MDA26 F22 C34 QSA0 MDB26 V1 F6 QSB0

MDA27 NC_DQA0_26/DQA_26 NC_EDCA0_0/QSA_0/RDQSA_0 QSA1 MDB27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 QSB1
D21 NC_DQA0_27/DQA_27 NC_EDCA0_1/QSA_1/RDQSA_1 D29 1 V3 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 K3
0.1U_0402_16V4Z
C356
100_0402_1% VGA@ MDA28 A20 D25 QSA2 R449 VGA@ MDB28 Y6 P3 QSB2
2 MDA29 NC_DQA0_28/DQA_28 NC_EDCA0_2/QSA_2/RDQSA_2 QSA3 100_0402_1% MDB29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 QSB3
F20 E20 Y1 V5
2
MDA30 NC_DQA0_29/DQA_29 NC_EDCA0_3/QSA_3/RDQSA_3 QSA4 VGA@ MDB30 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 QSB4

D19 E16 Y3 AB5
2
MDA31 NC_DQA0_30/DQA_30 NC_EDCA1_0/QSA_4/RDQSA_4 QSA5 2 MDB31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 QSB5
E18 E12 Y5 AH1
C18 J10 AA4 AJ9
A18 NC_DQA1_1/DQA_33 NC_EDCA1_3/QSA_7/RDQSA_7 D7 AB6 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7 AM5
MDA34 F18 QSA#[0..7] MDB34 AB1 QSB#[0..7]
+1.5VSG NC_DQA1_2/DQA_34 QSA#[0..7] 23 DQB1_2/DQB_34 QSB#[0..7] 24
MDA35 D17 A34 QSA#0 MDB35 AB3 G7 QSB#0
MDA36 NC_DQA1_3/DQA_35 NC_DDBIA0_0/QSA_0B/WDQSA_0 QSA#1 +1.5VSG MDB36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 QSB#1
A16 NC_DQA1_4/DQA_36 NC_DDBIA0_1/QSA_1B/WDQSA_1 E30 AD6 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 K1
MDA37 F16 E26 QSA#2 MDB37 AD1 P1 QSB#2
MDA38 NC_DQA1_5/DQA_37 NC_DDBIA0_2/QSA_2B/WDQSA_2 QSA#3 MDB38 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 QSB#3
D15 C20 AD3 W4
NC_DQA1_6/DQA_38 NC_DDBIA0_3/QSA_3B/WDQSA_3 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3
1
MDA39 E14 C16 QSA#4 MDB39 AD5 AC4 QSB#4

NC_DQA1_7/DQA_39 NC_DDBIA1_0/QSA_4B/WDQSA_4 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4
1
R450 MDA40 F14 C12 QSA#5 MDB40 AF1 AH3 QSB#5
VGA@ MDA41 NC_DQA1_8/DQA_40 NC_DDBIA1_1/QSA_5B/WDQSA_5 QSA#6 R451 MDB41 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 QSB#6
D13 NC_DQA1_9/DQA_41 NC_DDBIA1_2/QSA_6B/WDQSA_6 J11 AF3 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 AJ8
40.2_0402_1% 15mil MDA42 F12 F8 QSA#7 VGA@ MDB42 AF6 AM3 QSB#7
MDA43 NC_DQA1_10/DQA_42NC_DDBIA1_3/QSA_7B/WDQSA_7 40.2_0402_1% MDB43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
A12 15mil AG4
2
MVREFSA MDA44 NC_DQA1_11/DQA_43 ODTA0 MDB44 DQB1_11/DQB_43 ODTB0

2 D11 J21 ODTA0 23 AH5 T7 ODTB0 24 2
2
MDA45 NC_DQA1_12/DQA_44 NC_ADBIA0/ODTA0 ODTA1 MVREFSB MDB45 DQB1_12/DQB_44 ADBIB0/ODTB0 ODTB1
F10 G19 ODTA1 23 AH6 W7 ODTB1 24
NC_DQA1_13/DQA_45 NC_ADBIA1/ODTA1 DQB1_13/DQB_45 ADBIB1/ODTB1
1
1 MDA46 A10 MDB46 AJ4

NC_DQA1_14/DQA_46 DQB1_14/DQB_46
1
0.1U_0402_16V4Z
C357
R452 VGA@ MDA47 C10 H27 CLKA0 1 MDB47 AK3 L9 CLKB0

NC_DQA1_15/DQA_47 NC_CLKA0 CLKA0 23 DQB1_15/DQB_47 CLKB0 CLKB0 24
0.1U_0402_16V4Z
C358
MDA48 G13 G27 CLKA0# R453 MDB48 AF8 L8 CLKB0#
NC_DQA1_16/DQA_48 NC_CLKA0B CLKA0# 23 DQB1_16/DQB_48 CLKB0B CLKB0# 24
100_0402_1% VGA@ MDA49 H13 VGA@ MDB49 AF9
2 MDA50 NC_DQA1_17/DQA_49 CLKA1 100_0402_1% VGA@ MDB50 DQB1_17/DQB_49 CLKB1
J13 J14 CLKA1 23 AG8 AD8 CLKB1 24
2
MDA51 NC_DQA1_18/DQA_50 NC_CLKA1 CLKA1# 2 MDB51 DQB1_18/DQB_50 CLKB1 CLKB1#

H11 H14 CLKA1# 23 AG7 AD7 CLKB1# 24
2
MDA52 NC_DQA1_19/DQA_51 NC_CLKA1B MDB52 DQB1_19/DQB_51 CLKB1B
G10 AK9
MDA53 NC_DQA1_20/DQA_52 RASA0# MDB53 DQB1_20/DQB_52 RASB0#
G8 NC_DQA1_21/DQA_53 NC_RASA0B K23 RASA0# 23 AL7 DQB1_21/DQB_53 RASB0B T10 RASB0# 24
MDA54 K9 K19 RASA1# MDB54 AM8 Y10 RASB1#
NC_DQA1_22/DQA_54 NC_RASA1B RASA1# 23 DQB1_22/DQB_54 RASB1B RASB1# 24
MDA55 K10 MDB55 AM7
MDA56 NC_DQA1_23/DQA_55 CASA0# MDB56 DQB1_23/DQB_55 CASB0#
G9 NC_DQA1_24/DQA_56 NC_CASA0B K20 CASA0# 23 AK1 DQB1_24/DQB_56 CASB0B W10 CASB0# 24
MDA57 A8 K17 CASA1# MDB57 AL4 AA10 CASB1#
NC_DQA1_25/DQA_57 NC_CASA1B CASA1# 23 DQB1_25/DQB_57 CASB1B CASB1# 24
MDA58 C8 MDB58 AM6
MDA59 NC_DQA1_26/DQA_58 CSA0#_0 MDB59 DQB1_26/DQB_58 CSB0#_0
E8 K24 CSA0#_0 23 AM1 P10 CSB0#_0 24
MDA60 NC_DQA1_27/DQA_59 NC_CSA0B_0 MDB60 DQB1_27/DQB_59 CSB0B_0
A6 NC_DQA1_28/DQA_60 NC_CSA0B_1 K27 AN4 DQB1_28/DQB_60 CSB0B_1 L10
MDA61 C6 MDB61 AP3
MDA62 NC_DQA1_29/DQA_61 CSA1#_0 MDB62 DQB1_29/DQB_61 CSB1#_0
E6 NC_DQA1_30/DQA_62 NC_CSA1B_0 M13 CSA1#_0 23 AP1 DQB1_30/DQB_62 CSB1B_0 AD10 CSB1#_0 24
MDA63 A5 K16 MDB63 AP5 AC10
NC_DQA1_31/DQA_63 NC_CSA1B_1 DQB1_31/DQB_63 CSB1B_1
MVREFDA L18 K21 CKEA0 U10 CKEB0
+1.5VSG NC_MVREFDA NC_CKEA0 CKEA0 23 CKEB0 CKEB0 24
MVREFSA L20 J20 CKEA1 MVREFDB Y12 AA11 CKEB1
NC_MVREFSA NC_CKEA1 CKEA1 23 MVREFDB CKEB1 CKEB1 24
MVREFSB AA12
MVREFSB
1 VGA@ 2 L27 K26 WEA0#
WEA0# 23 N10 WEB0#
WEB0# 24
R454 NC_MEM_CALRN0 NC_WEA0B WEB0B
1 VGA@ 2 243_0402_1% N12 L15 WEA1#
WEA1# 23 AB11 WEB1#
WEB1# 24
R455 MEM_CALRN1 NC_WEA1B WEB1B
1 VGA@ 2 243_0402_1% AG12 NC_MEM_CALRN2
R459
R456 243_0402_1% 5.11K_0402_1%
1 VGA@ 2 M12 H23 MAA13 23 2 VGA@ 1 TESTEN AD28 T8 MAB13 24
R457 MEM_CALRP1 NC_MAA0_8 TESTEN MAB0_8
1 VGA@ 2 243_0402_1% M27 J19 W8
R458 NC_MEM_CALRP0 NC_MAA1_8 MAB1_8
1 VGA@ 2 243_0402_1% AH12 TEST_MCLK AK10 R461 10_0402_5%
GDDR5
NC_MEM_CALRP2 CLKTESTA
GDDR5
R460 243_0402_1% TEST_YCLK AL10 AH11 1 2 1 2

CLKTESTB DRAM_RST VRAM_RST# 23,24
VGA@ R462 VGA@ 51.1_0402_1%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
3 2 2 3
2
C360
C361
1
@ @ R463 VGA@ C359
VGA@
1 1 2160809000A11SEYMOU_FCBGA962 5.11K_0402_1% 120P_0402_50V8
2160809000A11SEYMOU_FCBGA962 VGA@ 2
1
1
1
VGA@
R464 R465
@ @ Place all these components very close
51.1_0402_1% 51.1_0402_1%
to GPU (Within 25mm) and
2
keep all component close to
each Other (within5mm) except Rser2
Note:
route 50ohms single-ended
and 100ohms diff
and keep short
REF137-03 suggest Park&Seymour is single channel for
memory (channel B only)
4 4

Vancouver_Memory
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
Seymour/Whistler Κ
U8E PCIE_VDDR,PCIE_PVDD can combian to PCIE_VDDR
+1.5VSG
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ MEM I/O
SM010014520 3000ma 220ohm@100mhz DCR 0.04
1U_0402_6.3V6K
C363
PCIE
1 1 1 1 1 1 1 1 40mil
1U_0402_6.3V6K
C375
1U_0402_6.3V6K
C376
1U_0402_6.3V6K
C362
1U_0402_6.3V6K
C377
1U_0402_6.3V6K
C378
1U_0402_6.3V6K
C379
1U_0402_6.3V6K
C380
AC7 AA31 +PCIE_VDDR 2 1 +1.8VSG
VDDR1#1 PCIE_VDDR#1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L13 VGA@
AD11 VDDR1#2 PCIE_VDDR#2 AA32
AF7 AA33 1 1 1 1 1 1 FBMA-L11-201209-221LMA30T_0805
2 2 2 2 2 2 2 2 VDDR1#3 PCIE_VDDR#3
0.1U_0402_16V4Z
C381
0.1U_0402_16V4Z
C382
1U_0402_6.3V6K
C364
1U_0402_6.3V6K
C383
1U_0402_6.3V6K
C365
10U_0603_6.3V6M
C384
AG10 VDDR1#4 PCIE_VDDR#4 AA34 220ohm/2A
AJ7 VDDR1#5 440mA PCIE_VDDR#5 V28
AK8 VDDR1#6 PCIE_VDDR#6 W29
2 2 2 2 2 2
AL9 VDDR1#7 PCIE_VDDR#7 W30
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ G11 Y31
VDDR1#8 PCIE_VDDR#8
1U_0402_6.3V6K
C390
1 1 1 1 1 1 1 1 G14 VDDR1#9 PCIE_VDDR/PCIE_PVDD AB37
1U_0402_6.3V6K
C385
1U_0402_6.3V6K
C366
1U_0402_6.3V6K
C386
1U_0402_6.3V6K
C387
1U_0402_6.3V6K
C388
1U_0402_6.3V6K
C367
1U_0402_6.3V6K
C389
1 G17 VDDR1#10
1
G20 VDDR1#11 PCIE_VDDC#1 G30 +1.0VSG
G23 G31 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2 VDDR1#12 PCIE_VDDC#2
G26 VDDR1#13 PCIE_VDDC#3 H29 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
C391
1U_0402_6.3V6K
C392
1U_0402_6.3V6K
C368
1U_0402_6.3V6K
C393
1U_0402_6.3V6K
C369
1U_0402_6.3V6K
C370
1U_0402_6.3V6K
C394
10U_0603_6.3V6M
C395
G29 VDDR1#14 PCIE_VDDC#4 H30
H10 VDDR1#15 PCIE_VDDC#5 J29
VGA@ J7 3400mA 2A J30
VDDR1#16 PCIE_VDDC#6 2 2 2 2 2 2 2 2
1U_0402_6.3V6K
C401
1 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 J9 VDDR1#17 PCIE_VDDC#7 L28
10U_0603_6.3V6M
C396
10U_0603_6.3V6M
C371
10U_0603_6.3V6M
C372
10U_0603_6.3V6M
C373
10U_0603_6.3V6M
C397
1U_0402_6.3V6K
C398
1U_0402_6.3V6K
C399
1U_0402_6.3V6K
C400
K11 VDDR1#18 PCIE_VDDC#8 M28
VGA@ K13 N28
VDDR1#19 PCIE_VDDC#9
K8 VDDR1#20 PCIE_VDDC#10 R28
2 2 2 2 2 2 2 2 2
L12 VDDR1#21 PCIE_VDDC#11 T28
L16 VDDR1#22 PCIE_VDDC#12 U28
L21 VDDR1#23
L23 VDDR1#24 Granville VDDC:47A
L26 VDDR1#25 VDDC#1 AA15 +VGA_CORE
1U_0402_6.3V6K
C405
1U_0402_6.3V6K
C406
1U_0402_6.3V6K
C407
1U_0402_6.3V6K
C408
1U_0402_6.3V6K
C409
1U_0402_6.3V6K
C410
1U_0402_6.3V6K
C411
1U_0402_6.3V6K
C412
1U_0402_6.3V6K
C413
1U_0402_6.3V6K
C414
L7 CORE AA17 1 1 1 1 1 1 1 1 1 1
VDDR1#26 VDDC#2
M11 VDDR1#27 VDDC#3 AA20
N11 VDDR1#28 VDDC#4 AA22
P7 AA24 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ Granville PRO VDDC:47A
VDDR1#29 VDDC#5 2 2 2 2 2 2 2 2 2 2
SM010030010 R11 VDDR1#30 VDDC#6 AA27
Madison PRO VDDC+VDDCI=31.3A
+1.8VSG 12 U11 VDDR1#31 VDDC#7 AB16
300ma 120ohm@100mhz DCR 0.3 120ohm/0.3A L14 U7 VDDR1#32 VDDC#8 AB18 Whistler PRO VDDC+VDDCI=24A
BLM18AG121SN1D_0603 1 1 1 Y11 AB21
VDDR1#33 VDDC#9
SeymourXT VDDC+VDDCI=14.2A
0.1U_0402_16V4Z
C404
VGA@ VGA@ VGA@ Y7 AB23
VDDR1#34 VDDC#10
10U_0603_6.3V6M
C402
1U_0402_6.3V6K
C403
1U_0402_6.3V6K
C416
1U_0402_6.3V6K
C417
1U_0402_6.3V6K
C418
1U_0402_6.3V6K
C419
1U_0402_6.3V6K
C420
1U_0402_6.3V6K
C421
1U_0402_6.3V6K
C422
1U_0402_6.3V6K
C423
1U_0402_6.3V6K
C424
1U_0402_6.3V6K
C425
VGA@ AB26 1 1 1 1 1 1 1 1 1 1
VDDC#11
AB28
RobsonXT VDDC+VDDCI=12.9A
2 2 2 VDDC#12
VDDC#13 AC17
AC20 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
LEVEL VDDC#14 2 2 2 2 2 2 2 2 2 2
20mil TRANSLATION VDDC#15 AC22
VDDC#16 AC24
POWER
Ref137-12~ remove Bead +VDD_CT AF26 AC27
VDD_CT#1 VDDC#17
AF27 VDD_CT#2 VDDC#18 AD18
10U_0603_6.3V6M
C428
10U_0603_6.3V6M
C429
10U_0603_6.3V6M
C430
10U_0603_6.3V6M
C431
10U_0603_6.3V6M
C432
10U_0603_6.3V6M
C433
10U_0603_6.3V6M
C434
+3VSG AG26 VDD_CT#3 219mA VDDC#19 AD21 1 1 1 1 1 1 1
2
AG27 VDD_CT#4 VDDC#20 AD23 2
1 1 1 VDDC#21 AD26
0.1U_0402_16V4Z
C427
VGA@ VGA@ AF17 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
VDDC#22 2 2 2 2 2 2 2
10U_0603_6.3V6M
C415
1U_0402_6.3V6K
C426
I/O AF20
VGA@ VDDC#23
AF23 VDDR3#1 VDDC#24 AF22
2 2 2
10mil AF24 VDDR3#2 VDDC#25 AG16
AG23 VDDR3#3 60mA VDDC#26 AG18
AG24 VDDR3#4 VDDC#27 AG21
SM010030010 20mil 47A VDDC#28 AH22
VDDC#29 AH27
300ma 120ohm@100mhz DCR 0.3 +1.8VSG 2 1 +VDDR4_5 AF13 AH28
L16 VGA@ VGA@ VGA@ VDDR4#4 VDDC#30
AF15 VDDR4#5 VDDC#31 M26 BIF_VDDC
120ohm/0.3ABLM18AG121SN1D_0603 1 1 1 AG13 VDDR4#7 VDDC#32 N24 Park/Madison:Connect to VDDC
10U_0603_6.3V6M
C437
1U_0402_6.3V6K
C438
0.1U_0402_16V4Z
C439
VGA@ AG15 N27 +BIF_VDDC +BIF_VDDC
VDDR4#8 VDDC/BIF_VDDC#33 Seymour/Whisler:
170mA VDDC#34 R18
2 2 2 VDDC#35 R21 dGPU operating:VDDC
AD12 VDDR4#1 VDDC#36 R23 BACO mode:+1.0V
AF11 VDDR4#2 55mA VDDC#37 R26
AF12 VDDR4#3 VDDC#38 T17
AG11 VDDR4#6 VDDC#39 T20 2010/04/27
VDDC#40 T22 non-BACO design,N27,T27
VDDC#41 T24
470ohm/1A T27 connect BIF_VDDC to VDDC
VDDC/BIF_VDDC#42
VDDC#43 U16 For BACO design
SM010030010 M20 NC_VDDRHA VDDC#44 U18
M21 NC_VSSRHA VDDC#45 U21
200ma 120ohm@100mhz DCR 0.2 VDDC#46 U23
VDDC#47 U26
L17 V12 V17
NC_VDDRHB VDDC#48
+1.8VSG 2 1 U12 NC_VSSRHB VDDC#49 V20
BLM18AG121SN1D_0603 VGA@ VGA@ VGA@ VGA@ VGA@ V22
VGA@ VDDC#50
1 1 1 1 1 VDDC#51 V24
10U_0603_6.3V6M
C440
1U_0402_6.3V6K
C441
0.1U_0402_16V4Z
C442
1U_0402_6.3V6K
C443
0.1U_0402_16V4Z
C444
VDDC#52 V27 VDDCI and VDDC should have seperate regulators with a merge option on PCB
VDDC#53 Y16
PLL Y18 For Madison and Park, VDDCI and VDDC can share one common regulator
2 2 2 2 2 VDDC#54
3
VDDC#55 Y21 3
VDDC#56 Y23 (GDDR3/DDR3 1.12V@4A VDDCI)

SM010030010 20mil +MPV_18
H7 MPV18#1 VDDC#57 Y26
(GDDR5 1.12V@16A VDDCI)
200ma 120ohm@100mhz DCR 0.2
H8 MPV18#2 150mA VDDC#58 Y28 SM01000BY00 5000ma 120ohm@100mhz DCR 0.02
L20 10mil Granville VDDCI:4.6A
+1.8VSG 2 1 +SPV_18 AM10 75mA 160mil
BLM18AG121SN1D_0603 VGA@ VGA@ VGA@ L18 SPV18 +VDDCI
VGA@
20mil +SPV10 VDDCI#1 AA13
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2
VGA@
1 +VGA_CORE
1 1 1 +1.0VSG 2 1 AN9 SPV10 120mA VDDCI#2 AB13
10U_0603_6.3V6M
C458
1U_0402_6.3V6K
C459
0.1U_0402_16V4Z
C460
VGA@ VGA@ VGA@ AC12 1 1 1 1 1 1 1 1 1 1 L19 Seymour/Whistler

VDDCI#3
10U_0603_6.3V6M
C445
1U_0402_6.3V6K
C446
0.1U_0402_16V4Z
C447
1U_0402_6.3V6K
C448
1U_0402_6.3V6K
C449
1U_0402_6.3V6K
C450
1U_0402_6.3V6K
C451
1U_0402_6.3V6K
C452
1U_0402_6.3V6K
C453
1U_0402_6.3V6K
C454
1U_0402_6.3V6K
C455
1U_0402_6.3V6K
C456
1U_0402_6.3V6K
C457
BLM18AG121SN1D_0603 1 1 1 AN10 AC15 FBMA-L11-201209-121LMA50T_0805
VGA@ SPVSS VDDCI#4
VDDCI#5 AD13 2 1
2 2 2 VGA@
470ohm/1A VDDCI#6 AD16
2 2 2 2 2 2 2 2 2 2 L21
SM010030010 2 2 2 VDDCI#7 M15
M16 FBMA-L11-201209-121LMA50T_0805
200ma 120ohm@100mhz DCR 0.2 VOLTAGE VDDCI#8
SENESE
5A VDDCI#9 M18
VDDCI#10 M23
GCORE_SEN
10mil VDDCI#11 N13
48 GCORE_SEN AF28 FB_VDDC VDDCI#12 N15
VDDCI#13 N17
VDDCI#14 N20
AG28 N22 VGA@ VGA@ VGA@ VGA@ VGA@
FB_VDDCI ISOLATED VDDCI#15
1U_0402_6.3V6K
C461
0.1U_0402_16V4Z
C462
10U_0603_6.3V6M
C463
10U_0603_6.3V6M
C464
10U_0603_6.3V6M
C465
NC 20101116 R12
CORE I/O VDDCI#16 R13
VDDCI#17 1 1 1 1 1
FB_GND AH29 R16
FB_GND VDDCI#18
VDDCI#19 T12
1
VDDCI#20 T15
@ 2 2 2 2 2
VDDCI#21 V15
R466 Y13
0_0402_5% VDDCI#22
2
VGA@
4 4

Vancouver_Power/GND
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
U8F
DPA_VDD18,DPA_PVDD,DPB_VDD18,DPB_PVDD Seymour/Whistler Κ
can combian to DPAB_VDD18 DPA_VDD10,DPB_VDD10
DPC_VDD18,DPC_PVDD,DPD_VDD18,DPD_PVDD can combian to DPAB_VDD10
AB39
PCIE_VSS#1 GND#1
A3 can combian to DPCD_VDD18 DPC_VDD10,DPD_VDD10
E39 A37 (DPD_VDD18,DPD_PVDD not applicable on Robson/Park) can combian to DPCD_VDD10
PCIE_VSS#2 GND#2
F34 AA16
PCIE_VSS#3 GND#3
F39 PCIE_VSS#4 GND#4 AA18 DPE_VDD18,DPE_PVDD,DPF_VDD18,DPF_PVDD DPE_VDD10,DPD_VDD10
G33 AA2 can combian to DPEF_VDD18 can combian to DPEF_VDD10
PCIE_VSS#5 GND#5
G34 PCIE_VSS#6 GND#6 AA21
H31 AA23
PCIE_VSS#7 GND#7
H34 AA26
H39
PCIE_VSS#8 GND#8
AA28
DPx-VSSR,DPx_PVSS can combian to DP_VSSR
PCIE_VSS#9 GND#9
1
J31
PCIE_VSS#10 GND#10
AA6 (Manhatann should have individual GND) 1
J34 AB12
K31
PCIE_VSS#11 GND#11
AB15 where x is A,B,C,D,E,F
PCIE_VSS#12 GND#12
K34 PCIE_VSS#13 GND#13 AB17
K39 AB20 U8H SM01000BL00
PCIE_VSS#14 GND#14
L31 AB22 1000ma 470ohm@100mhz DCR 0.2
PCIE_VSS#15 GND#15 DP C/D POWER DP A/B POWER
L34 PCIE_VSS#16 GND#16 AB24
M34 AB27 Manhatann:300mA 20mil 20mil L23
PCIE_VSS#17 GND#17 MBK1608221YZF_2P
M39 PCIE_VSS#18 GND#18 AC11
Seymour:150mA +DPABCD_VDD18
AP20 DPCD/DPC_VDD18#1 DPAB/DPA_VDD18#1 AN24
+DPABCD_VDD18
300mA
N31 AC13 AP21 AP24 2 1 +1.8VSG
PCIE_VSS#19 GND#19 DPCD/DPC_VDD18#2 DPAB/DPA_VDD18#2 VGA@
N34 AC16
PCIE_VSS#20 GND#20
P31 PCIE_VSS#21 GND#21 AC18 1 1 1
P34 AC2 20mil 20mil VGA@ VGA@ VGA@ FootPrint
PCIE_VSS#22 GND#22
10U_0603_6.3V6M
C469
0.1U_0402_16V4Z
C470
1U_0402_6.3V6K
C471
P39 AC21 AP13 AP31
PCIE_VSS#23 GND#23 +DPABCD_VDD10 DPCD/DPC_VDD10#1 DPAB/DPA_VDD10#1 +DPABCD_VDD10
R34 AC23 AT13 AP32
PCIE_VSS#24 GND#24 DPCD/DPC_VDD10#2 DPAB/DPA_VDD10#2 2 2 2
T31 PCIE_VSS#25 GND#25 AC26
T34 AC28
PCIE_VSS#26 GND#26
T39 PCIE_VSS#27 GND#27 AC6 AN17 DP/DPC_VSSR#1 DP/DPA_VSSR#1 AN27
U31 AD15 AP16 AP27
PCIE_VSS#28 GND#28 DP/DPC_VSSR#2 DP/DPA_VSSR#2
U34 AD17 AP17 AP28
V34 PCIE_VSS#30 GND#30 AD20 AW14 DP/DPC_VSSR#4 DP/DPA_VSSR#4 AW24
V39 AD22 AW16 AW26
W31 AD24
PCIE_VSS#32 GND#32
W34 AD27
PCIE_VSS#33 GND#33
Y34 PCIE_VSS#34 GND#34 AD9 20mil 20mil
Y39 AE2 AP22 AP25
PCIE_VSS#35 GND#35 +DPABCD_VDD18 DPCD/DPD_VDD18#1 DPAB/DPB_VDD18#1 +DPABCD_VDD18
GND#36
AE6 AP23
DPCD/DPD_VDD18#2 DPAB/DPB_VDD18#2
AP26 SM01000BL00
AF10 1000ma 470ohm@100mhz DCR 0.2
GND#37
GND#38
AF16 20mil
AF18 20mil L25
GND#39 +DPABCD_VDD10 MBK1608221YZF_2P
AF21 Manhatann:220mA AP14 AN33 220mA
F15
GND#100
GND GND#40
GND#41
GND#42
AG17
AG2 Seymour:110mA
AP15
DPCD/DPD_VDD10#1
DPCD/DPD_VDD10#2
DPAB/DPB_VDD10#1
DPAB/DPB_VDD10#2 AP33 +DPABCD_VDD10 2
VGA@
1 +1.0VSG
2 2
F17 GND#101 GND#43 AG20
F19
GND#102 GND#44
AG22 1 VGA@ 1 VGA@ 1 VGA@ FootPrint
0.1U_0402_16V4Z
C475
1U_0402_6.3V6K
C476
10U_0603_6.3V6M
C477
F21 AG6 AN19 AN29
GND#103 GND#45 DP/DPD_VSSR#1 DP/DPB_VSSR#1
F23 GND#104 GND#46 AG9 AP18 DP/DPD_VSSR#2 DP/DPB_VSSR#2 AP29
F25 AH21 AP19 AP30
GND#105 GND#47 DP/DPD_VSSR#3 DP/DPB_VSSR#3 2 2 2
F27 GND#106 GND#48 AJ10 AW20 DP/DPD_VSSR#4 DP/DPB_VSSR#4 AW30
F29 AJ11 AW22 AW32
GND#107 GND#49 DP/DPD_VSSR#5 DP/DPB_VSSR#5
F31 GND#108 GND#50 AJ2
F33 AJ28 R467 R468
GND#109 GND#51 150_0402_1% 150_0402_1%
F7 GND#110 GND#52 AJ6 SM01000BL00 DP mode:300mA
F9 AK11 1000ma 470ohm@100mhz DCR 0.2 2 1 AW18 AW28 1 2
GND#111 GND#53 LVDS mode:440mA VGA@ DPCD_CALR DPAB_CALR VGA@
G2 AK31
GND#112 GND#54 L26
G6 GND#113 GND#55 AK7 20mil 20mA
H9 AL11 MBK1608221YZF_2P DP E/F POWER DP PLL POWER 10mil
GND#114 GND#56 +DPEF_VDD18 +DPABCD_VDD18
J2 GND#115 GND#57 AL14 +1.8VSG 2 1 AH34 DPEF/DPE_VDD18#1 DPAB_VDD18/DPA_PVDD AU28
J27 AL17 VGA@ AJ34 AV27
GND#116 GND#58 DPEF/DPE_VDD18#2 DP_VSSR/DPA_PVSS
J6 GND#117 GND#59 AL2 1 VGA@ 1 VGA@ 1 VGA@
10U_0603_6.3V6M
C478
1U_0402_6.3V6K
C479
0.1U_0402_16V4Z
C480
J8 GND#118 GND#60 AL20 FootPrint 20mil 20mA
K14 AL21 PX_EN 10mil
GND#119 GND/PX_EN#61 PX_EN 25,36 +DPEF_VDD10 +DPABCD_VDD18
K7 AL23 AL33 AV29
GND#120 GND#62 2 2 2 DPEF/DPE_VDD10#1 DPAB_VDD18/DPB_PVDD
L11
GND#121 GND#63
AL26 PX_EN: PU at P.20 AM33
DPEF/DPE_VDD10#2 DP_VSSR/DPB_PVSS
AR28
L17 GND#122 GND#64 AL32
L2 AL6 SBIOS will control VGA power on/off. 20mA
GND#123 GND#65
L22 GND#124 GND#66 AL8 High :BACO mode enable +DPABCD_VDD18
10mil
L24 AM11 AN34 AU18
GND#125 GND#67 LOW:BACO disable DP/DPE_VSSR#1 DPCD_VDD18/DPC_PVDD
L6 GND#126 GND#68 AM31 AP39 DP/DPE_VSSR#2 DP_VSSR/DPC_PVSS AV17
M17 GND#127 GND#69 AM9 AR39 DP/DPE_VSSR#3
M22
GND#128 GND#70
AN11 AU37
DP/DPE_VSSR#4 20mA
M24 GND#129 GND#71 AN2
+DPABCD_VDD18
10mil
N16 AN30 AV19
GND#130 GND#72 DPCD_VDD18/DPD_PVDD
N18 GND#131 GND#73 AN6 DP_VSSR/DPD_PVSS AR18
3
N2
GND#132 GND#74
AN8 20mil 3
N21 GND#133 GND#75 AP11
+DPEF_VDD18
AF34 DPEF/DPF_VDD18#1 20mA
N23 GND#134 GND#76 AP7 SM01000BL00 AG34 DPEF/DPF_VDD18#2 10mil
N26 AP9 AM37 +DPEF_VDD18
GND#135 GND#77 1000ma 470ohm@100mhz DCR 0.2 DPEF_VDD18/DPE_PVDD
N6 GND#136 GND#78 AR5 DP mode:220mA 20mil DP_VSSR/DPE_PVSS AN38
R15 B11 L27
GND#137 GND#79 MBK1608221YZF_2P LVDS mode:240mA
R17 GND#138 GND#80 B13
+DPEF_VDD10
AK33 DPEF/DPF_VDD10#1 20mA
R2
GND#139 GND#81
B15 +1.0VSG 2 1 AK34
DPEF/DPF_VDD10#2 +DPEF_VDD18
10mil
R20 B17 VGA@ AL38
GND#140 GND#82 DPEF_VDD18/DPF_PVDD
R22
GND#141 GND#83
B19 1 VGA@ 1 VGA@ 1 VGA@ DP_VSSR/DPF_PVSS
AM35
10U_0603_6.3V6M
C481
1U_0402_6.3V6K
C482
0.1U_0402_16V4Z
C483
R24 GND#142 GND#84 B21 FootPrint
R27 B23 AF39
GND#143 GND#85 DP/DPF_VSSR#1
R6 B25 AH39
GND#144 GND#86 2 2 2 DP/DPF_VSSR#2
T11 GND#145 GND#87 B27 AK39 DP/DPF_VSSR#3
T13 GND#146 GND#88 B29 AL34 DP/DPF_VSSR#4
T16 GND#147 GND#89 B31 AM34 DP/DPF_VSSR#5
T18 B33
GND#148 GND#90
T21 GND#149 GND#91 B7
T23 B9 R470
GND#150 GND#92
T26 GND#151 GND#93 C1 2 1 AM39
DPEF_CALR
U15 C39 VGA@
GND#153 GND#94 150_0402_1%
U17 GND#154 GND#95 E35
U2 E5 2160809000A11SEYMOU_FCBGA962
GND#155 GND#96 VGA@
U20 F11
GND#156 GND#97
U22 F13
GND#157 GND#98
U24
GND#158
U27 GND#159
U6
GND#160
V11 GND#161
V16
GND#163 Park/Madison :AL21left NC
V18
GND#164
V21
GND#165
4
V23 GND#166 Seymour/Whistler: 4
V26 GND#167
W2
GND#168
AL21:PX_EN
W6 GND#169 use to control discreate GPU regulators
Y15 GND#170
Y17 GND#171
for power express BACO mode
Y20 Support BACO:
GND#172
Y22 GND#173 VSS_MECH#1 A39
Y24 AW1 output High3.3V:turn off regulators (BACO mode on)
Y27
GND#174 VSS_MECH#2
AW39
U13
GND#175 VSS_MECH#3 output Low0V:turn on regulators (BACO mode off) 2010/07/12 2011/12/31 Title
GND#152 Issued Date Deciphered Date
V13 GND#162 need PD resistor Vancouver_Power/GND
2160809000A11SEYMOU_FCBGA962 No support BACO: THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA@ left NC DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom
QBL50 LA-7551P 1.0
REF137-13 update MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
A B C D E
U11 U12 U13 U14
ZZZ1 ZZZ2 VREFCA_A1 M8 E3 MDA22 VREFCA_A2 M8 E3 MDA25 VREFCA_A3 M8 E3 MDA35 VREFCA_A4 M8 E3 MDA48
VREFDA_Q1 H1 VREFCA DQL0 MDA19 VREFDA_Q2 VREFCA DQL0 MDA30 VREFDA_Q3 VREFCA DQL0 MDA32 VREFDA_Q4 VREFCA DQL0 MDA51
VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 MDA21 F2 MDA24 F2 MDA38 F2 MDA55
MAA0 DQL2 MDA18 MAA0 DQL2 MDA29 MAA0 DQL2 MDA34 MAA0 DQL2 MDA54
N3 F8 N3 F8 N3 F8 N3 F8
MAA1 A0 DQL3 MDA23 MAA1 A0 DQL3 MDA26 MAA1 A0 DQL3 MDA37 MAA1 A0 DQL3 MDA50
P7 H3 P7 H3 P7 H3 P7 H3
P3 A2 DQL5
H8 P3 A2 DQL5
H8 P3 A2 DQL5
H8 P3 A2 DQL5
H8
1GVRAM-SAM 2GVRAM-SAM MAA3 N2 G2 MDA20 MAA3 N2 G2 MDA27 MAA3 N2 G2 MDA39 MAA3 N2 G2 MDA49
P8 A4 DQL7
H7 P8 A4 DQL7
H7 P8 A4 DQL7
H7 P8 A4 DQL7
H7
MAA5 P2 MAA5 P2 MAA5 P2 MAA5 P2
X76L01@ X76L02@ MAA6 A5 MAA6 A5 MAA6 A5 MAA6 A5
R8 R8 R8 R8
MAA7 A6 MDA0 MAA7 A6 MDA15 MAA7 A6 MDA43 MAA7 A6 MDA63
R2 D7 R2 D7 R2 D7 R2 D7
MAA8 A7 DQU0 MDA5 MAA8 A7 DQU0 MDA11 MAA8 A7 DQU0 MDA44 MAA8 A7 DQU0 MDA58
T8 A8 DQU1
C3 T8 A8 DQU1
C3 T8 A8 DQU1
C3 T8 A8 DQU1
C3
ZZZ3 ZZZ4 MAA9 R3 C8 MDA1 MAA9 R3 C8 MDA14 MAA9 R3 C8 MDA40 MAA9 R3 C8 MDA60
1 MAA10 A9 DQU2 MDA7 MAA10 A9 DQU2 MDA10 MAA10 A9 DQU2 MDA45 MAA10 A9 DQU2 MDA59 1
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
MAA11 R7 A7 MDA3 MAA11 R7 A7 MDA13 MAA11 R7 A7 MDA42 MAA11 R7 A7 MDA61
MAA12 A11 DQU4 MDA4 MAA12 A11 DQU4 MDA9 MAA12 A11 DQU4 MDA46 MAA12 A11 DQU4 MDA56
N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2
MAA13 T3 B8 MDA2 MAA13 T3 B8 MDA12 MAA13 T3 B8 MDA41 MAA13 T3 B8 MDA62
A13 DQU6 MDA6 A13 DQU6 MDA8 A13 DQU6 MDA47 A13 DQU6 MDA57
T7 A3 T7 A3 T7 A3 T7 A3
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
1GVRAM-HYNIX 2GVRAM-HYNIX M7 A15/BA3 M7 A15/BA3 M7 A15/BA3 M7 A15/BA3
+1.5VSG +1.5VSG +1.5VSG +1.5VSG
X76L03@ X76L04@ A_BA0 A_BA0 A_BA0
20 A_BA0 M2 B2 M2 B2 M2 B2 M2 B2
BA0 VDD A_BA1 BA0 VDD A_BA1 BA0 VDD A_BA1 BA0 VDD
20 A_BA1 N8 BA1 VDD D9 N8 BA1 VDD D9 N8 BA1 VDD D9 N8 BA1 VDD D9
M3 G7 A_BA2 M3 G7 A_BA2 M3 G7 A_BA2 M3 G7
20 A_BA2 BA2 VDD BA2 VDD BA2 VDD BA2 VDD
K2 K2 K2 K2
VDD VDD VDD VDD
K8 K8 K8 K8
MDA[0..63] VDD VDD VDD VDD
20 MDA[0..63] VDD N1 VDD N1 VDD N1 VDD N1
CLKA0 J7 N9 CLKA0 J7 N9 CLKA1 J7 N9 CLKA1 J7 N9
CLKA0# CK VDD CLKA0# CK VDD CLKA1# CK VDD CLKA1# CK VDD
K7 CK VDD R1 K7 CK VDD R1 K7 CK VDD R1 K7 CK VDD R1
K9 R9 CKEA0 K9 R9 K9 R9 CKEA1 K9 R9
20 CKEA0 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG 20 CKEA1 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG
ODTA0_1 K1 A1 ODTA0_1 K1 A1 ODTA1_1 K1 A1 ODTA1_1 K1 A1

20 MAA[13..0] ODT/ODT0 VDDQ ODT/ODT0 VDDQ ODT/ODT0 VDDQ ODT/ODT0 VDDQ
L2 A8 CSA0#_0 L2 A8 L2 A8 CSA1#_0 L2 A8
20 CSA0#_0 CS/CS0 VDDQ RASA0# CS/CS0 VDDQ 20 CSA1#_0 CS/CS0 VDDQ RASA1# CS/CS0 VDDQ
20 RASA0# J3 RAS VDDQ C1 J3 RAS VDDQ C1 20 RASA1# J3 RAS VDDQ C1 J3 RAS VDDQ C1
K3 C9 CASA0# K3 C9 K3 C9 CASA1# K3 C9
20 CASA0# CAS VDDQ WEA0# CAS VDDQ 20 CASA1# CAS VDDQ WEA1# CAS VDDQ
20 WEA0# L3 D2 L3 D2 20 WEA1# L3 D2 L3 D2
WE VDDQ WE VDDQ WE VDDQ WE VDDQ
20 DQMA#[7..0] VDDQ E9 VDDQ E9 VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1 VDDQ F1 VDDQ F1
QSA2 F3 H2 QSA3 F3 H2 QSA4 F3 H2 QSA6 F3 H2
QSA0 DQSL VDDQ QSA1 DQSL VDDQ QSA5 DQSL VDDQ QSA7 DQSL VDDQ
C7 H9 C7 H9 C7 H9 C7 H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
20 QSA[7..0] DQMA#2 DQMA#3 DQMA#4 DQMA#6

E7 DML VSS A9 E7 DML VSS A9 E7 DML VSS A9 E7 DML VSS A9
DQMA#0 D3 B3 DQMA#1 D3 B3 DQMA#5 D3 B3 DQMA#7 D3 B3
2 DMU VSS DMU VSS DMU VSS DMU VSS 2
VSS E1 VSS E1 VSS E1 VSS E1
VSS G8 VSS G8 VSS G8 VSS G8
QSA#2 G3 J2 QSA#3 G3 J2 QSA#4 G3 J2 QSA#6 G3 J2
20 QSA#[7..0] QSA#0 DQSL VSS QSA#1 DQSL VSS QSA#5 DQSL VSS QSA#7 DQSL VSS
B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8
VSS M1 VSS M1 VSS M1 VSS M1
VSS P1 VSS P1 VSS P1 VSS P1
VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9
20,24 VRAM_RST# RESET VSS RESET VSS RESET VSS RESET VSS
T1 T1 T1 T1
VSS VSS VSS VSS
L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9
1
1
J1 NC/ODT1 VSSQ
B1 J1 NC/ODT1 VSSQ
B1 J1 NC/ODT1 VSSQ
B1 J1 NC/ODT1 VSSQ
B1
R471 L1 B9 R472 L1 B9 R473 L1 B9 R474 L1 B9
243_0402_1% NC/CS1 VSSQ 243_0402_1% NC/CS1 VSSQ 243_0402_1% NC/CS1 VSSQ 243_0402_1% NC/CS1 VSSQ
J9 NC/CE1 VSSQ D1 J9 NC/CE1 VSSQ D1 J9 NC/CE1 VSSQ D1 J9 NC/CE1 VSSQ D1
VGA@ L9 D8 VGA@ L9 D8 VGA@ L9 D8 VGA@ L9 D8
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
E8 E8 E8 E8
VSSQ VSSQ VSSQ VSSQ
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
VSSQ G1 VSSQ G1 VSSQ G1 VSSQ G1
G9 G9 G9 G9
VSSQ VSSQ VSSQ VSSQ
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96
+1.5VSG X76@ X76@ X76@ X76@
+1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG
Pull high for Madison and Park...
ODTA0_1
1
1
R484 R475 R476 R477 R478 R479 R480 R481 R482
56_0402_1% 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1%
VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@
3 ODTA0 1 3
20 ODTA0 2 1 2
R483 0_0402_5% VGA@ 15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil
2
2
R486 VREFCA_A1 VREFDA_Q1 VREFCA_A2 VREFDA_Q2 VREFCA_A3 VREFDA_Q3 VREFCA_A4 VREFDA_Q4
56_0402_1%
1
1
ODTA1 1 2 1 2 1 1 1 1 1 1 1 1
20 ODTA1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R485 0_0402_5% VGA@ R487 C484 R488 R489 C486 R490 C487 R491 C488 R492 C489 R493 C490 R494 C491
4.99K_0402_1% 4.99K_0402_1% C485 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% VGA@ 4.99K_0402_1% 4.99K_0402_1% VGA@
ODTA1_1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2
2
2
+1.5VSG +1.5VSG +1.5VSG
+1.5VSG
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VGA@ VGA@ VGA@ VGA@ VGA@
1U_0402_6.3V6K
C492
1U_0402_6.3V6K
C493
1U_0402_6.3V6K
C494
1U_0402_6.3V6K
C495
1U_0402_6.3V6K
C496
1U_0402_6.3V6K
C497
1U_0402_6.3V6K
C498
1U_0402_6.3V6K
C499
1U_0402_6.3V6K
C500
1U_0402_6.3V6K
C501
1U_0402_6.3V6K
C502
1U_0402_6.3V6K
C503
1U_0402_6.3V6K
C504
1U_0402_6.3V6K
C505
1U_0402_6.3V6K
C506
VGA@ 1 1 1 1 1
1U_0402_6.3V6K
C507
1U_0402_6.3V6K
C508
1U_0402_6.3V6K
C509
1U_0402_6.3V6K
C510
1U_0402_6.3V6K
C511
20 CLKA0 1 2
R495 56_0402_1%
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
VGA@ 2 2 2 2 2
20 CLKA0# 1 2
R496 56_0402_1%
+1.5VSG
1
+1.5VSG
VGA@ C512
0.01U_0402_16V7K VGA@ VGA@ VGA@ VGA@
2 VGA@ VGA@ VGA@ VGA@ 1 10U_0603_6.3V6M 1 1 1
C519
10U_0603_6.3V6M
C520
10U_0603_6.3V6M
C517
10U_0603_6.3V6M
C518
1 1 1 1
4 VGA@ 4
10U_0603_6.3V6M
C513
10U_0603_6.3V6M
C514
10U_0603_6.3V6M
C515
10U_0603_6.3V6M
C516
20 CLKA1 1 2
R497 56_0402_1% 2 2 2 2
2 2 2 2
VGA@
20 CLKA1# 1 2
R498 56_0402_1%
1
C521
VGA@ 0.01U_0402_16V7K Issued Date 2010/07/12 2011/12/31 Title
Deciphered Date
2
VRAM_DDR3 / Channel A
Custom 1.0
QBL50 LA-7551P
A B C D E
A B C D E
U15 U16 U17 U18
VREFCB_A1 M8 E3 MDB26 VREFCB_A2 M8 E3 MDB22 VREFCB_A3 M8 E3 MDB35 VREFCB_A4 M8 E3 MDB55

VREFDB_Q1 H1 VREFCA DQL0 MDB28 VREFDB_Q2 H1 VREFCA DQL0 MDB20 VREFDB_Q3 H1 VREFCA DQL0 MDB37 VREFDB_Q4 H1 VREFCA DQL0 MDB49
VREFDQ DQL1 F7 VREFDQ DQL1 F7 VREFDQ DQL1 F7 VREFDQ DQL1 F7
F2 MDB27 F2 MDB21 F2 MDB34 F2 MDB52
MAB0 DQL2 MDB31 MAB0 DQL2 MDB18 MAB0 DQL2 MDB39 MAB0 DQL2 MDB50
N3 F8 N3 F8 N3 F8 N3 F8
MAB1 A0 DQL3 MDB25 MAB1 A0 DQL3 MDB19 MAB1 A0 DQL3 MDB33 MAB1 A0 DQL3 MDB53
P7 H3 P7 H3 P7 H3 P7 H3
P3 A2 DQL5
H8 P3 A2 DQL5
H8 P3 A2 DQL5
H8 P3 A2 DQL5
H8
MAB3 N2 G2 MDB24 MAB3 N2 G2 MDB23 MAB3 N2 G2 MDB32 MAB3 N2 G2 MDB54
P8 A4 DQL7
H7 P8 A4 DQL7
H7 P8 A4 DQL7
H7 P8 A4 DQL7
H7
MAB5 P2 MAB5 P2 MAB5 P2 MAB5 P2
MAB6 A5 MAB6 A5 MAB6 A5 MAB6 A5
R8 R8 R8 R8
MAB7 A6 MDB15 MAB7 A6 MDB1 MAB7 A6 MDB44 MAB7 A6 MDB56
R2 D7 R2 D7 R2 D7 R2 D7
MAB8 A7 DQU0 MDB10 MAB8 A7 DQU0 MDB6 MAB8 A7 DQU0 MDB43 MAB8 A7 DQU0 MDB59
T8 A8 DQU1
C3 T8 A8 DQU1
C3 T8 A8 DQU1
C3 T8 A8 DQU1
C3
MAB9 R3 C8 MDB12 MAB9 R3 C8 MDB0 MAB9 R3 C8 MDB47 MAB9 R3 C8 MDB63
1 MAB10 A9 DQU2 MDB11 MAB10 A9 DQU2 MDB4 MAB10 A9 DQU2 MDB41 MAB10 A9 DQU2 MDB62 1
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
MAB11 R7 A7 MDB13 MAB11 R7 A7 MDB3 MAB11 R7 A7 MDB45 MAB11 R7 A7 MDB57
MAB12 A11 DQU4 MDB9 MAB12 A11 DQU4 MDB7 MAB12 A11 DQU4 MDB40 MAB12 A11 DQU4 MDB61
N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2
MAB13 T3 B8 MDB14 MAB13 T3 B8 MDB2 MAB13 T3 B8 MDB46 MAB13 T3 B8 MDB58
A13 DQU6 MDB8 A13 DQU6 MDB5 A13 DQU6 MDB42 A13 DQU6 MDB60
T7 A3 T7 A3 T7 A3 T7 A3
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15/BA3 M7 A15/BA3 M7 A15/BA3 M7 A15/BA3
+1.5VSG +1.5VSG +1.5VSG +1.5VSG
M2 B2 B_BA0 M2 B2 B_BA0 M2 B2 B_BA0 M2 B2

20 B_BA0 BA0 VDD BA0 VDD BA0 VDD BA0 VDD
N8 D9 B_BA1 N8 D9 B_BA1 N8 D9 B_BA1 N8 D9
20 B_BA1 BA1 VDD B_BA2 BA1 VDD B_BA2 BA1 VDD B_BA2 BA1 VDD
20 B_BA2 M3 G7 M3 G7 M3 G7 M3 G7
BA2 VDD BA2 VDD BA2 VDD BA2 VDD
K2 K2 K2 K2
MDB[0..63] VDD VDD VDD VDD
20 MDB[0..63] K8 K8 K8 K8
VDD VDD VDD VDD
VDD N1 VDD N1 VDD N1 VDD N1
CLKB0 J7 N9 CLKB0 J7 N9 CLKB1 J7 N9 CLKB1 J7 N9
CLKB0# CK VDD CLKB0# CK VDD CLKB1# CK VDD CLKB1# CK VDD
K7 CK VDD R1 K7 CK VDD R1 K7 CK VDD R1 K7 CK VDD R1
K9 R9 CKEB0 K9 R9 K9 R9 CKEB1 K9 R9
20 CKEB0 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG 20 CKEB1 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG
20 MAB[13..0] ODTB0_1 ODTB0_1 ODTB1_1 ODTB1_1
K1 ODT/ODT0 VDDQ A1 K1 ODT/ODT0 VDDQ A1 K1 ODT/ODT0 VDDQ A1 K1 ODT/ODT0 VDDQ A1
L2 A8 CSB0#_0 L2 A8 L2 A8 CSB1#_0 L2 A8
20 CSB0#_0 CS/CS0 VDDQ RASB0# CS/CS0 VDDQ 20 CSB1#_0 CS/CS0 VDDQ RASB1# CS/CS0 VDDQ
20 RASB0# J3 RAS VDDQ C1 J3 RAS VDDQ C1 20 RASB1# J3 RAS VDDQ C1 J3 RAS VDDQ C1
K3 C9 CASB0# K3 C9 K3 C9 CASB1# K3 C9
20 CASB0# CAS VDDQ WEB0# CAS VDDQ 20 CASB1# CAS VDDQ WEB1# CAS VDDQ
20 DQMB#[7..0] 20 WEB0# L3 D2 L3 D2 20 WEB1# L3 D2 L3 D2
WE VDDQ WE VDDQ WE VDDQ WE VDDQ
VDDQ E9 VDDQ E9 VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1 VDDQ F1 VDDQ F1
QSB3 F3 H2 QSB2 F3 H2 QSB4 F3 H2 QSB6 F3 H2
QSB1 DQSL VDDQ QSB0 DQSL VDDQ QSB5 DQSL VDDQ QSB7 DQSL VDDQ
C7 H9 C7 H9 C7 H9 C7 H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
20 QSB[7..0]
DQMB#3 E7 A9 DQMB#2 E7 A9 DQMB#4 E7 A9 DQMB#6 E7 A9
DQMB#1 DML VSS DQMB#0 DML VSS DQMB#5 DML VSS DQMB#7 DML VSS
D3 B3 D3 B3 D3 B3 D3 B3
2 DMU VSS DMU VSS DMU VSS DMU VSS 2
VSS E1 VSS E1 VSS E1 VSS E1
20 QSB#[7..0] VSS G8 VSS G8 VSS G8 VSS G8
QSB#3 G3 J2 QSB#2 G3 J2 QSB#4 G3 J2 QSB#6 G3 J2
QSB#1 DQSL VSS QSB#0 DQSL VSS QSB#5 DQSL VSS QSB#7 DQSL VSS
B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8
VSS P1 VSS P1 VSS P1 VSS P1
VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9
20,23 VRAM_RST# RESET VSS RESET VSS RESET VSS RESET VSS
T1 T1 T1 T1
VSS VSS VSS VSS
L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9
1
1
J1 NC/ODT1 VSSQ
B1 J1 NC/ODT1 VSSQ
B1 J1 NC/ODT1 VSSQ
B1 J1 NC/ODT1 VSSQ
B1
R499 L1 B9 R500 L1 B9 R501 L1 B9 R502 L1 B9
VGA@ NC/CS1 VSSQ VGA@ NC/CS1 VSSQ NC/CS1 VSSQ VGA@ NC/CS1 VSSQ
243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1
L9 D8 L9 D8 L9 D8 L9 D8
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
E8 E8 E8 E8
VSSQ VSSQ VSSQ VSSQ
F9 F9 F9 F9
VSSQ VSSQ VGA@ VSSQ VSSQ
VSSQ G1 VSSQ G1 VSSQ G1 VSSQ G1
G9 G9 G9 G9
VSSQ VSSQ VSSQ VSSQ
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
Pull high for Madison and Park... K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96
X76@ X76@ X76@ X76@
+1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG
+1.5VSG +1.5VSG +1.5VSG +1.5VSG
1
1
ODTB0_1
1
R503 R504 R505 R506
R512 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ R507 R508 R509 R510
3 56_0402_1% 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 3
ODTB01 2 1 2
2
2
20 ODTB0
R511 0_0402_5% VGA@
2
VREFCB_A1 VREFDB_Q1 VREFCB_A2 VREFDB_Q2
R514 VREFCB_A3 VREFDB_Q3 VREFCB_A4 VREFDB_Q4
1
1
56_0402_1% 1 1 1 1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
ODTB11 2 1 2 R515 C522 R516 C523 R517 C524 R518 C525 1 1 1 1
20 ODTB1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R513 0_0402_5% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ R519 C526 R520 C527 R521 C528 R522 C529
VGA@ VGA@ VGA@ VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@
ODTB1_1 2 2 2 2 VGA@ VGA@ VGA@ VGA@
2
2
2 2 2 2
2
R523 56_0402_1%
1 2 +1.5VSG +1.5VSG
20 CLKB0
VGA@ +1.5VSG +1.5VSG
R524 56_0402_1% VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
1 2 1 1 1 1 1 1 1 1 1 1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
20 CLKB0#
1U_0402_6.3V6K
C531
1U_0402_6.3V6K
C532
1U_0402_6.3V6K
C533
1U_0402_6.3V6K
C534
1U_0402_6.3V6K
C535
1U_0402_6.3V6K
C536
1U_0402_6.3V6K
C537
1U_0402_6.3V6K
C538
1U_0402_6.3V6K
C539
1U_0402_6.3V6K
C540
VGA@ 1 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
C541
1U_0402_6.3V6K
C542
1U_0402_6.3V6K
C543
1U_0402_6.3V6K
C544
1U_0402_6.3V6K
C545
1U_0402_6.3V6K
C546
1U_0402_6.3V6K
C547
1U_0402_6.3V6K
C548
1U_0402_6.3V6K
C549
1U_0402_6.3V6K
C550
1
VGA@ C530 2 2 2 2 2 2 2 2 2 2
+1.5VSG 2 2 2 2 2 2 2 2 2 2
0.01U_0402_16V7K
2 +1.5VSG
R525
56_0402_1%
20 CLKB1 1 2 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@
10U_0603_6.3V6M
C551
10U_0603_6.3V6M
C552
10U_0603_6.3V6M
C554
10U_0603_6.3V6M
C553
VGA@ 1 1 1 1
R526 VGA@ VGA@ VGA@ VGA@
10U_0603_6.3V6M
C555
10U_0603_6.3V6M
C556
10U_0603_6.3V6M
C557
10U_0603_6.3V6M
C558
56_0402_1%
2 2 2 2
20 CLKB1# 1 2
4 VGA@ 2 2 2 2 4
1
VGA@ C559
0.01U_0402_16V7K
2

VRAM_DDR3 / Channel B
Custom 1.0
QBL50 LA-7551P
A B C D E
5 4 3 2 1
Power Sequence of Whistler and Seymour VGA Muxless with BACO Status Mapping table
Normal mode BACO mode
SUSP#
PX_EN 0 1
+3VSG
1.5_VDDC_PWREN 1 0 VGA Power Enable Signal Mapping table
(JUMP form +3VS)
VDDC_EN 1 0 Whislter
VGA_ON 10ms
1.0_EN 0 1 VGA_PWR_ON source signal VGA_ON
D VGA_PWR_ON +3.3VSG ON ON +3.3VSG SUSP# D
+1.8VSG ON ON +1.8VSG VGA_PWR_ON

1.5_VDDC_PWREN
+1.0VSG ON ON +1.0VSG VGA_PWR_ON
+VGA_CORE +VGA_CORE ON OFF +VDDCI Combine with +VGA_CORE
+1.5VSG ON OFF +VGA_CORE 1.5_VDDC_PWREN
+1.5VSG
+BIF_VDDC +VGA_CORE +1.0VSG +1.5VSG 1.5_VDDC_PWREN
+1.0VSG
+1.8VSG 20ms
For PX sequence, >2mS delay is required between

PE_GPIO1 and VGA_PWR_ON
@
R649 1 2 0_0402_5%
+3VS C1103 VGA@
PE_GPIO1
0.1U_0402_16V4Z
1 2
C C
VGA_PWR_ON >2ms
VGA@
5
U19
VGA_PWR_ON 2
P
B 1.5_VDD_PWREN
Y 4 1.5_VDD_PWREN 38,48
+3VS R650 1 2 10K_0402_5% 1 A
G
VGA@ NC7SZ08P5X_NL_SC70-5
3
1
D Q22
22,36 PX_EN 1 VGA@ 2 2 VGA@
R651 0_0402_5% G
1
S 2N7002K_SOT23-3
VGA@
3
R652 +5VS +5VS
5.11K_0402_1%
For VGA Power on control
2
Delay SUSP# 10ms
2
1 VGA@ 2 VGA_PWR_ON
36 VGA_ON VGA_PWR_ON 38,42,45
R111 0_0402_5% VGA@ VGA@
R653 R654
1K_0402_5% 1K_0402_5%
@
1
R119 VDDC_EN
1 2 VGA@ C1104 +3VS
13,36 PE_GPIO1
10K_0402_1% 0.1U_0402_16V4Z 1.0_EN
2 1
3
Q23A
Q23B
VGA@
5
U20
B 1.5_VDD_PWREN B
1 VGA@ 2 2
P
R655 0_0402_5% B
4 2 5
Y
VGA@
VGA@
13,48 VGA_PWRGD 1
A
4
From +VGA_CORE regulator NC7SZ08P5X_NL_SC70-5
3
+BIF_VDDC +VGA_CORE
+1.0VSG VGA@ Q24 VGA@ Q25
20mil 30mil @
S
3 1 1 3 1 2
R656 0_0805_5%
AO3416_SOT23-3 AO3416_SOT23-3 1
G
2
2
VGA@
1.0_EN C1105
2 22U_0805_6.3V6M
C1105 Change to SE00000I10

VDDC_EN
20101228
2
G
G
30mil AO3416 NMOS
3 1 1 3 Vgs(th)(Max)= 1V
D
VGA@ VGA@
S
A Q26 Q27 Rds(on)(Max)= 22m ohm @Vgs=4.5V A
+VGA_CORE AO3416_SOT23-3 AO3416_SOT23-3
Q24 / Q25 / Q26 / Q27 change to SB00000FG10

20101228

VGA power sequence and BACO
Custom 1.0
QBL50 LA-7551P
5 4 3 2 1
5 4 3 2 1
+3VS +3VS_ANX
40mil +DVDD12 +DVDD33
D 1 2 D
R570 0_0805_5%
32
46
59
13
53
9
U3
+1.2VS +1.2VS_ANX +AVDD12 +AVDD33
40mil
DVDD12
DVDD12
DVDD12
DVDD12
DVDD33
DVDD33
1 AVDD12 AVDD33 8
AVDD33 25
1 2 AVDD33 33
R607 0_0805_5% 39
AVDD33
AVDD33 63
DP0_AUXN_C 60
8 DP0_AUXN_C DPRX_AUX_N
DP0_AUXP_C 61
8 DP0_AUXP_C DPRX_AUX_P
10 LVDS_HPD R1291 1 2 0_0402_5% 58 26 APU_TXOUT_CLK- APU_TXOUT_CLK- 27
+1.2VS_ANX +DVDD12 DP0_TXN0_C DPPX_HPD LVDS_CLKL_N APU_TXOUT_CLK+
L31
20mil 8 DP0_TXN0_C
DP0_TXP0_C
4 DPRX_LN0_N LVDS_CLKL_P 27
APU_TXOUT0-
APU_TXOUT_CLK+ 27
8 DP0_TXP0_C 3 DPRX_LN0_P LVDS_L0_N 19 APU_TXOUT0- 27
FBMA-L11-201209-221LMA30T_0805 7 20 APU_TXOUT0+ APU_TXOUT0+ 27
0.1U_0402_16V7K 0.1U_0402_16V7K 0.01U_0402_16V7K DPRX_LN1_N LVDS_L0_P APU_TXOUT1-
2 1 6 DPRX_LN1_P LVDS_L1_N 21 APU_TXOUT1- 27
2 2 2 2 1 1 1 22 APU_TXOUT1+ APU_TXOUT1+ 27
C286 C289 C292 C296 C317 C326 C327 LVDS_L1_P APU_TXOUT2-
LVDS_L2_N 23 APU_TXOUT2- 27
+3VS_ANX 1 2 CLK_SEL 10 CLK_SEL LVDS_L2_P 24 APU_TXOUT2+ APU_TXOUT2+ 27
R400 10K_0402_5% 12 28
1 1 1 1 2 2 2 13,18,29,32 PLT_RST# RESET_L LVDS_L3_N
27 TL_ENVDD TL_ENVDD 14 29
0.1U_0402_16V7K 0.1U_0402_16V7K 0.01U_0402_16V7K 2.2U_0603_6.3V6K DIGON LVDS_L3_P
+3VS_ANX 1 2
R411 1M_0402_5% 42
LVDS_CLKU_N
2 1 34 POR LVDS_CLKU_P 43
C225 0.1U_0402_16V7K 35
C LVDS_U0_N C
LVDS_U0_P 36
+1.2VS_ANX +AVDD12
L30
20mil T36 51 CFG_SCL LVDS_U1_N 37
T37 52 CFG_SDA LVDS_U1_P 38
FBMA-L11-201209-221LMA30T_0805 40
0.1U_0402_16V7K 0.01U_0402_16V7K R410 1 LVDS_U2_N
2 1 2 10K_0402_5% 16 GPIO_0 LVDS_U2_P 41
2 2 1 1 1 T26 17 GPIO_1 LVDS_U3_N 44
C337 C564 C336 C562 C349 T38 18 45
GPIO_2 LVDS_U3_P
2 1
R402 12K_0402_1%
1 1 2 2 2 R_BIAS APU_LVDS_CLK
1 2 64 R_BIAS DDC_CLK 49 APU_LVDS_CLK 27
0.1U_0402_16V7K 0.01U_0402_16V7K 2.2U_0603_6.3V6K C226 100P_0402_50V8J 50 APU_LVDS_DAT APU_LVDS_DAT 27
DDC_DATA
T39 55 TDI
20mil +DVDD33 T50 57 15 TL_BKOFF# TL_BKOFF# 27,36
+3VS_ANX TMS BL_EN TL_INVT_PW M
T51 56 TCK VARY_BL 47 TL_INVT_PW M 27
L32 T52 54 48 APU_INVT_PW M
TDO CPU_VARY_BL APU_INVT_PW M 10,27
FBMA-L11-201209-221LMA30T_0805 1 2 11 31 TRAVIS_CLKN
TEST_EN OSC_OUT TRAVIS_CLKN 13
2 1 0.1U_0402_16V7K R407 10K_0402_5%
OSC_IN 30 TRAVIS_CLKP
TRAVIS_CLKP 13
2 1 65 PAD
AVSS
AVSS
AVSS
C338 C565
1 2 ANX3110_QFN64_9X9
2
5
62
2.2U_0603_6.3V6K
+3VS_ANX +AVDD33
L33
20mil
B FBMA-L11-201209-221LMA30T_0805 +3VS_ANX B
2 1 0.1U_0402_16V7K 0.1U_0402_16V7K 0.01U_0402_16V7K

+3VS_ANX
2 2 2 1 1 1
C563 C348 C561 C567 C467 C566 APU_LVDS_CLK 1 2
R566 4.7K_0402_5%
DP0_AUXP_C 2 @ 1 APU_LVDS_DAT 1 2
1 1 1 2 2 2 R531 1M_0402_5% R565 4.7K_0402_5%
0.1U_0402_16V7K 0.01U_0402_16V7K 2.2U_0603_6.3V6K
DP0_AUXN_C 2 @ 1
R532 1M_0402_5%
Place via on each trace bus and let resistor very close the via
A A

LVDS Translator-ANX3110
Custom 1.0
QBL50 LA-7551P
5 4 3 2 1
5 4 3 2 1
D1 D3
CRT BLUE
GREEN
2
2
1
1
HSYNC_L
VSYNC_L
2
2
1
1
+5VS
3 3 Q92
3 3
AZC199-02SPR7G_SOT23-3 AZC199-02SPR7G_SOT23-3 1 3
GND
VIN VOUT
D6 @
2
D2 VGA_DDC_DATA_C 2 AP2230_SOT23-3
RED 2
2
2 VGA_DDC_CLK_C 1
1 W=40mils
1 3
1 3 +CRT_VCC
+CRT_VCC 3
3 AZC199-02SPR7G_SOT23-3 D4
AZC199-02SPR7G_SOT23-3 2 L115 W=40mils
1+5VS_CRTVCC
1 2
3
D
ESD SMD1812P075TF .75A 13.2V

D
0.1U_0402_16V7K
RB491D_SOT23-3 1 1
0.1U_0402_16V7K
C1570 C1571
@
L116
FCH_CRT_R R1634 1 2 0_0402_5% CRT_R_R 1 2 RED 2 2
15 FCH_CRT_R
CHILISIN NBQ160808T-800Y-N 0603
L117
FCH_CRT_G R1635 1 2 0_0402_5% CRT_G_R 1 2 GREEN
15 FCH_CRT_G
L118
FCH_CRT_B R1636 1 2 0_0402_5% CRT_B_R 1 2 BLUE
15 FCH_CRT_B
1 1 1
C1575 C1576 C1577
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
1
1
R1637 R1638 R1639 C1572 C1573 C1574 For EMI
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
2 2 2 +CRT_VCC
2 2 2 JCRT1
6
2
T69 PAD 11
RED 1
7
12
GREEN 2
+CRT_VCC 8
C1578 +3VS +CRT_VCC HSYNC_L 13
1 2 R1640 1 2 BLUE 3
0.1U_0402_16V7K 1K_0402_5% DDC_MD2 9
VSYNC_L 14 G 16
5
1
4 17
1
G
R1645
R1644
4.7K_0402_5%
R1646
4.7K_0402_5%
R1642
10
OE#
2.2K_0402_5%
2.2K_0402_5%
P
2 1 FCH_CRT_HSYNC_R 2 4 CRT_HSYNC_D 1 2 HSYNC_L 15

15 FCH_CRT_HSYNC A Y
R1641 0_0402_5% R1643 0_0603_5% 5
G
U87
74AHCT1G125GW_SOT353-5 SUYIN_070546FR015S263ZR
3
2
2
C CONN@ C
100P_0402_50V8J
FCH_CRT_DDC_SDA 1 6 VGA_DDC_DATA_C 1 VGA_DDC_DATA_C
+CRT_VCC 15 FCH_CRT_DDC_SDA
C1579 C1580
1 2 R1648 1 2
100P_0402_50V8J
0.1U_0402_16V7K 1K_0402_5% Q101A
DMN66D0LDW-7_SOT363-6 2
1
5
1
C1581 VGA_DDC_CLK_C
5
@
OE#
P
2 1 FCH_CRT_VSYNC_R 2 4 CRT_VSYNC_D 1 2 VSYNC_L 1
100P_0402_50V8J
15 FCH_CRT_VSYNC A Y 2
R1651 0_0402_5% R1650 0_0603_5% 15 FCH_CRT_DDC_SCL FCH_CRT_DDC_SCL 4 3 VGA_DDC_CLK_C C1582
G
U88 1 @
74AHCT1G125GW_SOT353-5 C1583 C1584 1 Q101B DMN66D0LDW-7_SOT363-6
15P_0402_50V8J
15P_0402_50V8J
3
2
FCH_CRT_DDC_SDA R4 1 @ 2 VGA_DDC_DATA_C
2 0_0402_5%
Close to APU 2 FCH_CRT_DDC_SCL R31 1 @ 2 VGA_DDC_CLK_C
For AMD DG-47520-1-10 0_0402_5%
For EMI, close to JLVDS1.

680P_0402_50V7K @ C122
Panel LCDVDD Control 1 2
For EMI, close to JLVDS1. W=60mils JLVDS1

B+ L119 1 2 B+_L 1
+LCDVDD +LCDVDD +3VS FBMA-L11-201209-221LMA30T_0805 1
2
+5VALW Q93 2
3
SI2301BDS-T1-E3_SOT23-3 3
4
22P_0402_50V8J
4
1 26 APU_TXOUT0- 5
5
1
+LCDVDD
S
1 3 6
D
26 APU_TXOUT0+ 6
R1653 1 C19 7
4.7U_0805_10V4Z
R1652 7
47K_0402_5% W=60mils 2 26 APU_TXOUT1- 8
8
100_0805_5% C1585 1 @ 9
G
26 APU_TXOUT1+
2
4.7U_0805_10V4Z 9
10
6 2
10
2
2 C1586 11
1 1 26 APU_TXOUT2- 11
C1587 C1588 R21 12
2 26 APU_TXOUT2+ 12
0_0402_5% 13
B
0.1U_0402_16V4Z 0.1U_0402_16V4Z R1656 13 B
@ 26 APU_TXOUT_CLK- 14
2 2 0.047U_0402_16V7K 14
2 2 1 26 APU_TXOUT_CLK+ 15
1
220K_0402_1% 15
16
DMN66D0LDW-7_SOT363-6 C1589 16
30 DMIC_CLK 17
1
17
3
Q99A 30 DMIC_DATA 18
18
Q99B USB20_N2
Camera 19
19
14 USB20_N2 20
R1659 1 @ DMN66D0LDW-7_SOT363-6 USB20_P2 20
10 APU_ENVDD 2 5 14 USB20_P2 21
0_0402_5% +3VS 21
W=60mils 22
22
+LCDVDD 23
4
R712 1 23
26 TL_ENVDD 20_0402_5% 24
24
25
25
+3VS 26
1
INVTPWM 26
27
0.1U_0402_16V4Z
27
1
R1660 @ 1 DISPOFF# 28
2.2K_0402_5%
2.2K_0402_5%
R1661 R1662 C1590 28
29
100K_0402_5% @ @ 29
30
30
31
2
2 31
32
2
32
33
33
26 APU_LVDS_CLK 34
34
26 APU_LVDS_DAT 35
35
36 41
2
36 G1
37 42
37 G2
38 43
2
@ D30 @ D29 38 G3
39 44
Panel Backlight Control +3VS Panel PWM Control 40
39
40
G4
G5
45
1
AZC199-02SPR7G_SOT23-3
AZC199-02SPR7G_SOT23-3 HONDA_LVD-A40SFYG+
1
1
CONN@
R1670
@ @ 10K_0402_5% TL_INVT_PWM 1 2
26 TL_INVT_PWM
D14 RB751V_SOD323 R722 0_0402_5%
1 2 10,26 APU_INVT_PWM R1654 1 @ 2
2
0_0402_5%
R1655 1 @ 2 INVTPWM
ESD
36 EC_INVT_PWM
TL_BKOFF# R718 1 @ 2 0_0402_5% 0_0402_5%
26,36 TL_BKOFF#
1
A @ A
D8 RB751V_SOD323 R1657
BKOFF# 1 2 DISPOFF# 10K_0402_5%
36 BKOFF#
2
R719 1 2 0_0402_5%
1
R1677
10K_0402_5%
2
P10-LVDS/CRT CONN
C 1.0
QBL50 LA-7551P
5 4 3 2 1
5 4 3 2 1
+5VS Q95
D
+HDMI_5V_OUT
S
6
4 5 F2
@ 1 2 +HDMI_5V 2 1
1U_0603_10V6K
+1.5VS +1.5VS +HDMI_5V_OUT
1U_0603_10V4Z
C1591 1 W=40mils 0.5A_15V_SMD1812P050TF
G
1
C1592
3
2 SI3456BDV-T1-E3 1N TSOP6
2
4.7K_0402_5%
4.7K_0402_5%
+VSB
2
470K_0402_5%
R748
1
2K_0402_1%
2K_0402_1%
0_0402_5% R1678
R745
R746
R749
R750
2
1
D D
2
EN_HDMI
2
G
1
D
1.5M_0402_5%
0.1U_0402_16V7K
R1679 C1601 1
3 1 HDMI_SCLK 2 Q96
8 APU_HDMI_CLK 38,45 SUSP
SSM3K7002FU_SC70-3
D
G
Q36 S
3
2
2
G
BSH111 1N_SOT23-3
2
3 1 HDMI_SDATA
8 APU_HDMI_DATA
D
Q33
BSH111 1N_SOT23-3
+1.5VS +3VS +HDMI_5V_OUT
2
@ JHDMI1
HDMI_HPD 19
R469 R755 HP_DET
18 +5V
100_0402_1% 0_0402_5% 17
HDMI_SDATA DDC/CEC_GND
16
2
1
HDMI_SCLK SDA
15
SCL
14
Reserved
1
13 CEC
Q34 D HDMI_R_CK- 12 20
HDMI_HPD CK- GND
2 1 2 11
CK_shield GND
21
G R762 150K_0402_5% HDMI_R_CK+ 10 22
2N7002K_SOT23-3 HDMI_R_D0- CK+ GND
S 9 23
D0- GND
1
8
3
@ HDMI_R_D0+ D0_shield
7
C R768 HDMI_R_D1- D0+ C
10 APU_HDMI_HPD 6 D1-
365K_0402_1% 5
HDMI_R_D1+ D1_shield
4
2
D1+
1
HDMI_R_D2- 3 D2-
2
R775 HDMI_R_D2+ D2_shield
1 D2+
10K_0402_5%
SUYIN_100042MR019S153ZL
2
CONN@
UMA use 604 ohm HDMI_C_CLK- HDMI_R_CK-

R756 1 2 0_0402_5%
Near the connector VGA use 499 ohm
1 2
1 2
6 PCIE_FTX_GRX_N12
C1166 2 1 0.1U_0402_16V7K HDMI_C_TX2- R784 1 2 604_0402_1% L38
6 PCIE_FTX_GRX_P12
C1167 2 1 0.1U_0402_16V7K HDMI_C_TX2+ R786 1 2 604_0402_1% WCM-2012HS-900T
4 4 3 3
6 PCIE_FTX_GRX_N13
C1168 2 1 0.1U_0402_16V7K HDMI_C_TX1- R788 1 2 604_0402_1%
C1169 2 1 0.1U_0402_16V7K HDMI_C_TX1+ R790 1 2 604_0402_1% HDMI_C_CLK+ 1 2 HDMI_R_CK+
From APU 6 PCIE_FTX_GRX_P13
R765 0_0402_5%
6 PCIE_FTX_GRX_N14
C1170 2 1 0.1U_0402_16V7K HDMI_C_TX0- R792 1 2 604_0402_1%
6 PCIE_FTX_GRX_P14
C1171 2 1 0.1U_0402_16V7K HDMI_C_TX0+ R795 1 2 604_0402_1% HDMI_C_TX0- R769 1 2 0_0402_5% HDMI_R_D0-
6 PCIE_FTX_GRX_N15
C1172 2 1 0.1U_0402_16V7K HDMI_C_CLK- R797 1 2 604_0402_1% 1 1 2 2
6 PCIE_FTX_GRX_P15
C1173 2 1 0.1U_0402_16V7K HDMI_C_CLK+ R799 1 2 604_0402_1% L39
WCM-2012HS-900T
1
D
4 3
4 3
+HDMI_5V_OUT 2
G Q35 HDMI_C_TX0+ 1 2 HDMI_R_D0+
1
B R779 0_0402_5% B
S
3
R801 SSM3K7002FU_SC70-3
HDMI_C_TX1- R781 1 2 0_0402_5% HDMI_R_D1-
100K_0402_5%
1 2
2
L40 1 2
WCM-2012HS-900T
4 3
4 3
HDMI_C_TX1+ 1 2 HDMI_R_D1+
R782 0_0402_5%
HDMI_C_TX2- R783 1 2 0_0402_5% HDMI_R_D2-
1 2
L41 1 2
WCM-2012HS-900T
4 3
4 3
HDMI_C_TX2+ 1 2 HDMI_R_D2+
D11 D13 R794 0_0402_5%
HDMI_R_D1+ 1 1 10 9 HDMI_R_D1+ HDMI_R_D0+ 1 1 10 9 HDMI_R_D0+
HDMI_R_D1- 2 2 9 8 HDMI_R_D1- HDMI_R_D0- 2 2 9 8 HDMI_R_D0- D32

HDMI_HPD 6 3 HDMI_SDATA
HDMI_R_D2+ HDMI_R_D2+ HDMI_R_CK+ HDMI_R_CK+ I/O4 I/O2
4 4 7 7 4 4 7 7
HDMI_R_D2- 5 5 6 6 HDMI_R_D2- HDMI_R_CK- 5 5 6 6 HDMI_R_CK-

+5VS 5 2
VDD GND
3 3 3 3
8 8
A HDMI_SCLK A
+HDMI_5V_OUT 4 I/O3 I/O1 1
L15ESDL5V0NA-4 SLP2510P8 L15ESDL5V0NA-4 SLP2510P8 AZC099-04S.R7G_SOT23-6

For ESD request.
For ESD request.
HDMI Connector
Custom 1.0
QBL50 LA-7551P
5 4 3 2 1
5 4 3 2 1
W=60mils J8 W=60mils +LAN_IO

2 2 1 1
+3VALW @ JUMP_43X118 +LAN_VDD
2
+LAN_IO 1.5A
Q29 R1106
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
S
D
3 1 470_0603_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1 1 1 1 1
C1610 1 1 1 1 1 1
1
1U_0402_6.3V6K AO3419L_SOT23-3 C1617 C1618 C1619 C1620 C1621 C1622 C1623
G
2
C1611 C1612 C1613 C1614 C1615 C1616
1
+5VALW 2 D Q54 2 2 2 2 2 2 2
2 2 2 2 2 2 2 EN_WOL#
G
2
S
3
D R533 SSM3K7002FU_SC70-3 D
100K_0402_5% These caps close to Pin 3,6,9,13,29,41,45
R534 These caps close to Pin 12,27,39,42,47,48
1 1 2 EN_WOL#
220K_0402_5%~N
1
D
1
2 Q30 C1624 +LAN_IO
36 EN_WOL
G SSM3K7002FU_SC70-3 0.1U_0603_25V7K +LAN_IO W=40mils W=20mils
2
S R560 +LAN_VDD
3
R553 2 1 2 +LAN_VDDREG R658
0.1U_0402_16V7K
4.7U_0603_6.3V6K
10K_0402_5% 0_0603_5% 1 2 +LAN_EVDD10
0.1U_0402_16V7K
1U_0402_6.3V6K
R1620 1 1 0_0603_5%
10K_0402_5% C1625
1
C1626 1 1
2
G
1
2 2 C1627 C1628
1 3 LAN_WAKE#
14,32,36 FCH_PCIE_WAKE# 2 2
S
Q91
2N7002_SOT23
U49
C1629 1 20.1U_0402_16V7K PCIE_FRX_DTX_P0 22 31

6 PCIE_DTX_C_FRX_P0 HSOP LED3/EEDO
37
C1630 1 PCIE_FRX_DTX_N0 LED1/EESK
6 PCIE_DTX_C_FRX_N0 20.1U_0402_16V7K 23
HSON LED0
40
+LAN_VDD 15P_0402_50V8J
L120 C1633 R550
17 30 R5511 2 10K_0402_5% W=60mils
6 PCIE_FTX_C_DRX_P0 HSIP EECS/SCL +LAN_SROUT1.05 XTLI
18 32 R6601 2 10K_0402_5% 1 2 W=60mils 1 2 2 1
6 PCIE_FTX_C_DRX_N0 HSIN EEDI/SDA
0.1U_0402_16V7K
4.7U_0603_6.3V6K
2
C 2.2UH +-5% NLC252018T-2R2J-N 0_0402_5% C
1 1
16 1 LAN_MDIP0 Y6
14 LAN_CLKREQ# CLKREQB MDIP0
2 LAN_MDIN0 C1631 C1632 25MHZ_12PF_X5H025000FC1H-H
MDIN0 LAN_MDIP1 12P_0402_50V8J C1634
25 4
1
13,18,26,32 PLT_RST# PERSTB MDIP1 LAN_MDIN1 2 2 XTLO
5 1 2
MDIN1 LAN_MDIP2
13 CLK_PCIE_LAN 19 REFCLK_P NC/MDIP2 7
20 8 LAN_MDIN2
13 CLK_PCIE_LAN# REFCLK_N NC/MDIN2 LAN_MDIP3
NC/MDIP3 10
11 LAN_MDIN3
XTLO NC/MDIN3
43 CKXTAL1 These components close to Pin 36 JLAN1
XTLI
( Should be place within 200 mils )
44 13 +LAN_VDD
CKXTAL2 DVDD10 RJ45_TX3-
DVDD10 29 8 PR4-
41
LAN_WAKE# DVDD10 RJ45_TX3+
R661 28 LANWAKEB 7 PR4+
+3VS 1 2 ISOLATEB 26 27 RJ45_RX1- 6

ISOLATEB DVDD33 PR2-
DVDD33 39
1K_0402_5% RJ45_TX2- 5
PR3-
14 12 +LAN_IO
NC/SMBCLK AVDD33
2
R561 1 2 10K_0402_5% 15 42 RJ45_TX2+ 4

R662 R562 1 NC/SMBDATA AVDD33 PR3+
+LAN_IO 2 1K_0402_5% 38 47
15K_0402_5% GPO/SMBALERT AVDD33 RJ45_RX1+
48 3
AVDD33 PR2+
2 1 33 D18 RJ45_TX0- 2
+LAN_IO
1
R647 0_0402_5% ENSWREG +LAN_EVDD10 LAN_MDIP1 LAN_MDIN0 PR1-

EVDD10 21 6
I/O4 I/O2
3
3.3V : Enable switching regulator 34 RJ45_TX0+ 1
0V : Disable switching regulator +LAN_VDDREG VDDREG PR1+
35 3 +LAN_VDD
VDDREG AVDD10
AVDD10 6 SHLD1 9
9 +LAN_IO 5 2
R568 R563 1 AVDD10 VDD GND
2 2.49K_0402_1% 46 45 10
RSET AVDD10 SHLD2
2
1 2 @
B +LAN_SROUT1.05 D7 B
24 36
2
GND REGOUT +LAN_SROUT1.05 LAN_MDIN1
0_0603_5% 49 4 1 LAN_MDIP0 SANTA_130452-C
R546 PGND I/O3 I/O1 GND_LAN
1
1 @ 2 AZC099-04S.R7G_SOT23-6
RTL8111E-VL-CGT_QFN48_6X6 AZC199-02SPR7G_SOT23-3
1
0_0603_5%
@
GND_LAN TS1
D38
+V_DAC 1 24 R549 1 2 75_0603_1%
LAN_MDIN3 TCT1 MCT1 RJ45_TX3- R1529 1 75_0603_1% RJ45_TX0+ 1 RJ45_TX0-
2 23 2 2
LAN_MDIP3 TD1+ MX1+ RJ45_TX3+ R1530 1 75_0603_1% 1 2
3 TD1- MX1- 22 2
R552 1 2 75_0603_1% PD10943-T7_SOD323-2
+V_DAC 4 21 D39
LAN_MDIN2 TCT2 MCT2 RJ45_TX2- D19
5 20
C1635 1 LAN_MDIP2 TD2+ MX2+ RJ45_TX2+ LAN_MDIP3 LAN_MDIP2 RJ45_RX1+ 1 RJ45_RX1-
2 6 19 2 6 3 2
TD2- MX2- C1636 I/O4 I/O2 1 2
0.01U_0402_16V7K +V_DAC 7 18 120P_1206_2KV NPO @
LAN_MDIN1 TCT3 MCT3 RJ45_RX1- D40 PD10943-T7_SOD323-2
8 17
LAN_MDIP1 TD3+ MX3+ RJ45_RX1+ 1
9 TD3- MX3- 16 +LAN_IO 5
VDD GND 2
RJ45_TX2+ 1 2 RJ45_TX2-
+V_DAC GND_LAN 1 2
10 15
LAN_MDIN0 TCT4 MCT4 RJ45_TX0- PD10943-T7_SOD323-2
11 14 @
LAN_MDIP0 TD4+ MX4+ RJ45_TX0+ LAN_MDIN3 LAN_MDIN2 D41
12 13 4 1
TD4- MX4- I/O3 I/O1
AZC099-04S.R7G_SOT23-6 RJ45_TX3+ 1 2 RJ45_TX3-
1 2
X'FORM_ IH-160 LAN D21 @ LSE-200NX3216TRLF_1206-2 @@ PD10943-T7_SOD323-2
1 2 For ESD request.
A
D22 @
1 2
LSE-200NX3216TRLF_1206-2 ESD SOD323 package
A
D31 @ LSE-200NX3216TRLF_1206-2
1 2
D34 @ LSE-200NX3216TRLF_1206-2
1 2
P25-LAN RTL8111E
ESD THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
Custom QBL50 LA-7551P
Rev
1.0
5 4 3 2 1
A B C D E F G H
+5VS_PVDD
R1531 SPKOUT_L1 SPK_L1
R1532 1 2 0_0603_5% 1 2
+5VS 2 1 1 C24 0.22U_0603_16V7K
10U_0805_10V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
@
1 1 1 @ C1474 1U_0603_10V6K
0_0805_5%
C1475 C1476 C1477 SPKOUT_L2 R1533 1 2 0_0603_5% SPK_L2 2 1 2
C1478 0.22U_0603_16V7K
2 2 2
@
1 R1534 1
+3VS_DVDD 2 1 +3VS_DVDD_R SPKOUT_R1 R1535 1 2 0_0603_5% SPK_R1 1 2
10U_0603_6.3V6M
1 C1480 0.22U_0603_16V7K
0.1U_0402_16V7K
0_0603_5% 1 1 @
@ C1483 1U_0603_10V6K
C1481 C1482
SPKOUT_R2 R1536 1 2 0_0603_5% SPK_R2 2 1 2
2 2 C1484 0.22U_0603_16V7K
+5VS_PVDD +VDDA
@
L108
2 1 +5VS
+3VS_DVDD
10U_0805_10V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
R1537 1 1 1 MBK1608800YZF 0603 Close to JSPK1
+3VS 2 1
10U_0603_6.3V6M
0.1U_0402_16V7K
C1485 C1486 C1487
0_0603_5% 1 1 2 2 2
C1488 C1505
2 2
10P_0402_50V8J
39
46
25
38
1
9
U50 HDA_SDOUT_AUDIO HDA_BITCLK_AUDIO
2 SPK_L1
DVDD_IO
PVDD1
PVDD2
AVDD1
AVDD2
DVDD
SPK_L1 37
0_0402_5%
SPK_L2
SPK_L2 37
C1491 SPK_R1
SPK_R1 37
1
SPK_R2 SPK_R2
1 37
@ R1538
23 40 SPKOUT_L1 @
LINE1_L SPK_OUT_L+ SPKOUT_L2
24 41
LINE1_R SPK_OUT_L-
22P_0402_50V8J
14 45 SPKOUT_R1
LINE2_L SPK_OUT_R+
10P_0402_50V8J
15 44 SPKOUT_R2 1
LINE2_R SPK_OUT_R- HDA_SYNC_AUDIO
MIC1 1 R1539 2 MIC1_R 1 2 C1490 4.7U_0603_6.3V6K MIC1_C 21 32 HP_OUTL 2 C1492
2 1K_0402_5% MIC2_C 22 MIC1_L HP_OUT_L HP_OUTR 2
MIC1_R HP_OUT_R 33
MIC2 1 R1540 2 MIC2_R 1 2 C1493 4.7U_0603_6.3V6K C1494 @ 2
1K_0402_5% 16
MIC2_L @ 1
17 MIC2_R
10 HDA_SYNC_AUDIO
SYNC HDA_SYNC_AUDIO 14 +USB_VCCB
DMIC_DATA R1543 1 2 0_0402_5% DMIC_DATA_CODEC 2 6 HDA_BITCLK_AUDIO_R 1 R1590 2
27 DMIC_DATA GPIO0/DMIC_DATA BCLK HDA_BITCLK_AUDIO 14
0_0402_5% +MIC1_VREFO_R R1541 2 1 2.2K_0402_1%
DMIC_CLK L121 1 2 DMIC_CLK_CODEC 3 R1542 2 1 2.2K_0402_1% ACES_87213-1400G
27 DMIC_CLK GPIO1/DMIC_CLK +MIC1_VREFO_L
FBMA-L10-160808-301LMT_2P HDA_SDOUT_AUDIO
EMI request 12.24 SDATA_OUT 5 HDA_SDOUT_AUDIO 14 14
13
14
EC_MUTE# R1545 1 PD# HDA_SDIN_AUDIO1 R1546 2 13
36 EC_MUTE# 2 0_0402_5% 4 8 HDA_SDIN0 14 14 USB20_N1 12
PD# SDATA_IN 33_0402_5% 12
14 USB20_P1 11
11
10
HDA_RST_AUDIO# 10
14 HDA_RST_AUDIO# 11 RESET# EAPD 47 1 R1547 2 EAPD 36 9 9
8
0_0402_5% 8
SPDIFO 48 7
7
12 L109 MIC_JD 6
MIC_JD PCBEEP MIC2 MIC-2 6
1 R1548 2 20 1 2 5
20K_0402_1% MONO_OUT L110 BLM18PG121SN1D_0603 5
4 4
HP_JD 2 R1549 1 SENSE_A 13 MIC1 1 2 MIC-1 HP_JD 3
39.2K_0402_1% SENSE A BLM18PG121SN1D_0603 HPR 3
MIC2_VREFO 29 2
2
18 1 1 HPL 1
SENSE B 1
MIC1_VREFO_R 30 +MIC1_VREFO_R
36 28 C1495 C1496 JAU1
CBP LDO_CAP 220P_0402_50V7K 220P_0402_50V7K
2 2
10U_0805_10V6K
1 2 35 27 AC97_VREF
CBN VREF
10U_0805_10V6K
0.1U_0402_16V7K
C1497 2.2U_0603_16V6K 1
31 19 AC_JDREF 1 R1552 2 1 1
+MIC1_VREFO_L MIC1_VREFO_L JDREF 20K_0402_1% C1501
43 34 1 2 C1499 C1500
PVSS2 CPVEE 2
@
42 C1498
3 PVSS1 2.2U_0603_16V6K 2 2 3
49 DVSS2 AVSS1 26
+1.5VS 7 37
DVSS1 AVSS2
ALC269-GR_QFN48_7X7
1
R1554
4.7K_0402_5% 75_0603_1% L111
R1553 @ HP_OUTR 1 2 HP_R 1 2 HPR
L112 BLM18PG121SN1D_0603
2
HP_OUTL 1 R1555 2 HP_L 1 2 HPL

HDA_RST_AUDIO# R1556 1 2 0.1U_0402_16V7K 75_0603_1% BLM18PG121SN1D_0603
@ 1 1
1 R1557 1 2 0.1U_0402_16V7K
0.1U_0402_16V7K C1502 C1504
C1503 R1558 1 2 0.1U_0402_16V7K 470P_0402_50V7K 470P_0402_50V7K
2 2
2 R1559 1 2 0.1U_0402_16V7K
Change to 0.1U for EMI
4 4

P26-HD CODEC ALC259
Custom QBL50 LA-7551P 1.0
A B C D E F G H
5 4 3 2 1
Card Reader RTS5137

(only SD/MMC/MS function)
+3VS +3VS_CR
D
30mil D
R1560 1 2 0_0603_5%
@
2 1 12mil
C1507 100P_0402_50V8J U51
R1733 1 2 +RREF 1
6.2K_0603_1% REFE @
GPIO0 17 1 2 1 2
USB20_N4 2 R1561 10_0402_5% @ C1509
@C1509 10P_0402_50V8J
14 USB20_N4 DM
USB20_P4 CLK_SD_48M
+RREF & +VREF need 12mils 14 USB20_P4 3
DP CLK_IN
24 CLK_SD_48M 13
+3VS_CR 4 23
3V3_IN NC
+VREG
30mil +CARDPWR 5 CARD_3V3 MS_BS
1 2 6 22
C1511 V18 SP14 SDD2
1 10mil SP13
21
SDD3_MSD1
C1510 C1512 7 20
4.7U_0805_10V4Z 1U_0402_6.3V6K NC SP12
2 1 SDWP_MSCLK 1 R529 2 SDWP_MSCLK_R8
SP11
19
18 SDCMD
EMI
0.1U_0402_16V4Z 2 0_0402_5% MS_INS# SP1 SP10 MSD0
9 16
SDD1 SP2 SP9 SDCLKMSD2 1 SDCLK_MSD2
10 15 2
SP3 SP8
EPAD
SDD0 11 14 R441 0_0402_5%
MSD3 SP4 SP7 SDCD#
12 SP5 SP6 13
RTS5137-GR_QFN24_4X4
25
Card Reader Connector @
C787
SDCLK_MSD2 1 2
0.1U_0402_16V4Z
C C
+CARDPWR
30mil
@ +CARDPWR
C788
SDWP_MSCLK 1 2
2
@ 1 1 1 0.1U_0402_16V4Z JCR1
SDCD# 1
R1562 C1514 C1515 C1513 SDWP_MSCLK SD-CD
2 SD-WP
100K_0402_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z SDD1 3
2 2 2 SDD0 SD-D1
EMI Close to U51 4
1
SD-D0
Close to connector 5
MS-GND
6 SD-GND
MS_BS 7
SDCLK_MSD2 MS-BS
8
SD-CLK
9
MSD0 MS-D1
10
MS-D0
11 SD-VCC
12
MS-D2
13 SD-GND
MS_INS# 14
MSD3 MS-INS
15 MS-D3
SDCMD 16 SD-CMD
17
MS-SCLK
18 MS-VCC
SDD3_MSD1 19
SD-D3
20 MS-GND
SDD2 21
B SD-D2 B
22 GND
23 GND
TAITW_R009-142-HM
CONN@
A A

P27-RTS5137 Media Card Controller
5 4 3 2 1
A B C D E
W=60mils
Mini-Express Card for WLAN/WiMAX(Half) +3VALW +3VS_WLAN
Q31
D
3 1 R1596 2 1 0_1206_5%
1
+1.5VS C1664
+3VALW +1.5VS 1U_0402_6.3V6K AO3419L_SOT23-3
G
2
+3VS +3VS_WLAN
+5VALW 2
Mini-Express Card(WLAN/WiMAX) 1 1 1
1
R1563 2 @ 1 0_1206_5% @
2
R1564 C1516 C1517 C1518
0_1206_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z R663
2 2 2 100K_0402_5%
@ JMINI1
2
1 1
14,29,36 FCH_PCIE_WAKE# R1565 1 2 0_0402_5% WLAN_WAKE# 1 2
1
1 2
3 4 1 2
BT_ONR1594 1 @ 3 4
2 0_0402_5% 5 6 R115 20K_0402_5%
1
MINI1_CLKREQ# 5 6 LPC_FRAME#_R D
14 MINI1_CLKREQ# 7 8 1
7 8 LPC_AD3_R Q32 C1663
9 10 36,38 SUSP# 2
9 10 LPC_AD2_R G SSM3K7002FU_SC70-3 4.7nF_0603_50V7K
13 CLK_PCIE_MINI1# 11 12
11 12 LPC_AD1_R
13 CLK_PCIE_MINI1 13 14 S
3
13 14 LPC_AD0_R 2
15 16
PCI_RST#_R 15 16 R1567 1 @ 0_0402_5%
C124 R530 17 18 2 WL_OFF# 15
CLK_PCI_DB 17 18 R1568 1 0_0402_5%
19 20 2 WL_OFF#_EC 36
19 20
1 2 2 1CLK_PCI_DB 21 22 PLT_RST# 13,18,26,29
21 22 R1569 1
6 PCIE_DTX_C_FRX_N1 23 24 2 @ 0_0402_5% +3VALW
23 24 R1570 1
6 PCIE_DTX_C_FRX_P1 25 26 2 @ 0_0402_5% +3VS
10P_0402_50V8J 0_0402_5% 25 26
27 28
EMI @ @ 29
27 28
30 FCH_SMCLK0_R R1571 1 2 @ 0_0402_5% FCH_SCLK0 11,12,14
Reserve for SW mini-pcie debug card.
29 30 FCH_SMDAT0_R R1572 1
6 PCIE_FTX_C_DRX_N1 31 32 2 @ 0_0402_5% FCH_SDATA0 11,12,14 Series resistors closed to KBC side.
31 32
6 PCIE_FTX_C_DRX_P1 33 34
33 34
35 36 USB20_N3 14
+3VS_WLAN 35 36 LPC_FRAME#_R R1573 0_0402_5% LPC_FRAME#
37 38 USB20_P3 14 1 2 LPC_FRAME# 13,36
37 38 LPC_AD3_R R1574 0_0402_5% LPC_AD3
39 40 1 2 LPC_AD3 13,36
39 40 0_0402_5% LPC_AD2_R R1576 0_0402_5% LPC_AD2
41 42 1 2 LPC_AD2 13,36
41 42 WLAN_R_LED#
43 44 2 1 R1577 WLAN_LED# WLAN_LED# 36
LPC_AD1_R R1578 1 2 0_0402_5% LPC_AD1
LPC_AD1 13,36
100_0402_1% 43 44 BT_R_LED#
45 46 2 1 R1575 BT_LED# BT_LED# 36
LPC_AD0_R R1579 1 2 0_0402_5% LPC_AD0
LPC_AD0 13,36
R1581 45 46 0_0402_5% PCI_RST#_R R1580 0_0402_5% PLT_RST#
47 48 1 2
EC_TX_P80_DATA 1 47 48
36 EC_TX_P80_DATA 2 EC_TX_P80_DATA_R 49 50 CLK_PCI_DB CLK_PCI_DB 13
EC_RX_P80_CLK 1 49 50
36 EC_RX_P80_CLK 2 EC_RX_P80_CLK_R 51 52
@ R1582 51 52
100_0402_1% 53 54
BT_ON R1566 1 GND1 GND2
15 BT_ON 2 0_0402_5%
BELLW_80003-1021
2
For EC to detect
R1583
debug card insert. 100K_0402_5%
1
2 2
+5VALW
2
R669
10K_0402_5%
Add to prevent leakage issue.
LED
1
LED1
White
35,36 PWR_LED# 1 2 1 2 2 1 +3VALW
R628 33_0402_5% 100_0402_5% R1584
C560 1U_0402_6.3V6K
1 2 19-21SYGC/S530-E3/TR8 0603 Y/G
D26
C568 1U_0402_6.3V6K @
Orange 1 2 LED2 PWR_LED# 2
BATT_LOW_LED# 1 2 1 2 2 1 3
1
36 CHARGE_LED1# +3VALW
R629 33_0402_5% O 300_0402_5% R1585
YSDA0502C 3P C/A SOT-23
36 CHARGE_LED0# 1 2 3 4 2 1 +3VALW
R678 33_0402_5% W 100_0402_5% R1586
BATT_CHG_LED# D36
@
White CHARGE_LED1#
1 2 HT-297DQ/GQ 0603 AMB/YG 2
C569 1U_0402_6.3V6K 1
@ Green LED3 CHARGE_LED0# 3
D24
WLAN_R_LED# 1 2 WLAN_D_LED# 1 2 1 2 2 1 +3VS
3
R679 33_0402_5% 100_0402_5% R1588 YSDA0502C 3P C/A SOT-23 3
D37
RB751V_SOD323 @
@ C570 1U_0402_6.3V6K 19-21SYGC/S530-E3/TR8 0603 Y/G WLAN_D_LED# 2
D25
1 2 1
BT_R_LED# 1 2 SATA_LED# 3
RB751V_SOD323
YSDA0502C 3P C/A SOT-23
D35
36 RF_LED# R1589 1 2 0_0402_5% @
36 NUM_LED# NUM_LED# 2
1
CAPS_LED# 3
LED4
Green YSDA0502C 3P C/A SOT-23
15 SATA_LED# 1 2 1 2 2 1 +3VS
R680 33_0402_5% 100_0402_5% R1591
C571 1U_0402_6.3V6K 19-21SYGC/S530-E3/TR8 0603 Y/G

1 2
ESD
LED6
Green
36 CAPS_LED# 1 2 1 2 2 1 +3VS
R681 0_0402_5% 100_0402_5% R1593
4 4
@ C573 1U_0402_6.3V6K 19-21SYGC/S530-E3/TR8 0603 Y/G
1 2

P28-Mini PCIE/LED
1.0
QBL50 LA-7551P
A B C D E
A B C D E F G H
SATA HDD Conn.
JHDD1
1
SATA_STX_DRX_P0 C656 1 SATA_STX_C_DRX_P0 GND
15 SATA_STX_DRX_P0 2 0.01U_0402_16V7K 2
A+
SATA_STX_DRX_N0 C658 1 2 0.01U_0402_16V7K SATA_STX_C_DRX_N0 3
15 SATA_STX_DRX_N0 A-
4 GND
SATA_DTX_C_SRX_N0 C1519 1 2 0.01U_0402_16V7K SATA_DTX_SRX_N0 5
15 SATA_DTX_C_SRX_N0 SATA_DTX_C_SRX_P0 C1520 1 SATA_DTX_SRX_P0 B-
2 0.01U_0402_16V7K 6 B+
1 15 SATA_DTX_C_SRX_P0 1
7 GND
+3VS 8
V33
1 9
C22 V33
10 V33
11 GND
0.1U_0402_16V4Z 12
2 GND
13
GND
14 V5
15
R1595 +5VS_HDD V5
+5VS 1 2 0_0805_5% 16
V5
17
GND
18
10U_0603_6.3V6M 0.1U_0402_16V4Z Reserved
19 GND
20 23
V12 GND1
1 1 1 1 21 V12 GND2 24
C660 C661 C662 C663 22
V12
2 2 2 2 SUYIN_127043FR022S21MZR
1U_0402_6.3V6K 1000P_0402_50V7K
2 2
SATA ODD FFC Conn.

JODD1
1
C648 SATA_STX_C_DRX_P1 GND
15 SATA_STX_DRX_P1 1 2 0.01U_0402_16V7K 2
A+
15 SATA_STX_DRX_N1 C649 1 2 0.01U_0402_16V7K SATA_STX_C_DRX_N1 3
A-
4 GND
C1521 1 2 0.01U_0402_16V7K SATA_DTX_SRX_N1 5
15 SATA_DTX_C_SRX_N1 C1522 1 SATA_DTX_SRX_P1 B-
2 0.01U_0402_16V7K 6
15 SATA_DTX_C_SRX_P1 B+
7 GND
8
R1598 0_0805_5% +5VS_ODD DP
+5VS 80mils 1 2 9 +5V
10
@ +5V
+3VS 1 2 11
R670 10K_0402_5% MD
12
GND
13 GND
15
GND
GND 14
OCTEK_SLS-13DC1G_RV
3 3
4 4

P29-HDD & ODD CONN
B 1.0
QBL50 LA-7551P
A B C D E F G H
A B C D E
Left USB Conn.

+5VALW +USB_VCCA
W=80mils JUSB2
1 VBUS
USB20_N10_C 2
U54 +USB_VCCA USB20_P10_C D-
1 1 3 D+
4 GND
1 8 C708 C709 USB30_MRX_DTX_N0_C 5
GND OUT 470P_0402_50V7K 47U_0805_6.3V USB30_MRX_DTX_P0_C StdA_SSRX-
2 IN OUT 7 6 StdA_SSRX+
C707 2 10.1U_0402_16V4Z 3 6 2 2 7
USB_ON# IN OUT USB30_MTX_C_DRX_N0_C 7
4 EN# OC# 5 USB_OC0# 14 8 StdA_SSTX-
1 EMI request USB30_MTX_C_DRX_P0_C 9 1
StdA_SSTX+
Left USB Conn. AP2301MPG-13 MSOP 8P
1
C710
@ 1000P_0402_50V7K
10 GND
11 GND
Low Active 2
12 GND
13 GND
L55
+5VALW USB20_N10 1 2 USB20_N10_C SINGA_2UB4016-000101
14 USB20_N10 1 2
USB20_P10 4 3 USB20_P10_C
+USB_VCCB 14 USB20_P10 4 3
U55
WCM-2012HS-900T
1 8 L58
GND OUT USB20_N0_U USB20_N0_C
2 7 1 2
C714 2 10.1U_0402_16V4Z
USB_ON#
3
IN
IN
OUT
OUT 6
1 2
Left USB Conn.
36 USB_ON# 4 EN# OC# 5 USB_OC1# 14
USB20_P0_U USB20_P0_C +USB_VCCC
4 4 3 3 W=80mils JUSB1
1
AP2301MPG-13 MSOP 8P C713 WCM-2012HS-900T 1
@ 1000P_0402_50V7K USB20_N0_C VCC
2
Right USB Conn. Low Active 2
1 1 USB20_P0_C 3
D-
D+
4 GND
C711 C712
470P_0402_50V7K 47U_0805_6.3V 5
2 2 GND1
6 GND2
+5VALW 7 GND3
2 8 GND4 2
SUYIN_020173MR004S50DZL
U56 +USB_VCCC CONN@
1 GND OUT 8
2 IN OUT 7
C715 2 10.1U_0402_16V4Z 3 6 D5
USBAI_PEN# IN OUT USB30_MTX_C_DRX_P0_C
36 USBAI_PEN# 4 EN# OC# 5 USB_OC2# 14 1 1 10 9 USB30_MTX_C_DRX_P0_C D20
USB20_N10_C 6 3 USB20_N0_C
USB30_MTX_C_DRX_N0_C I/O4 I/O2
2 2 9 8 USB30_MTX_C_DRX_N0_C
AP2301MPG-13 MSOP 8P
Left USB Conn. 1
C716
USB30_MRX_DTX_P0_C 4 4 7 7 USB30_MRX_DTX_P0_C
Low Active @ 1000P_0402_50V7K USB30_MRX_DTX_N0_C
+5VALW 5 VDD GND 2
5 5 6 6 USB30_MRX_DTX_N0_C
2 3 3
USB20_P10_C 4 1 USB20_P0_C
8 I/O3 I/O1
AZC099-04S.R7G_SOT23-6
YSCLAMP0524P_SLP2510P8-10-9
For ESD request.
M3@
For ESD request.
3 3
L60 M3@
14 USB30_MTX_C_DRX_P0 USB30_MTX_C_DRX_P0 1 2 USB30_MTX_C_DRX_P0_C
1 2
14 USB30_MTX_C_DRX_N0 USB30_MTX_C_DRX_N0 4 4 3 3 USB30_MTX_C_DRX_N0_C AI CHARGER

WCM-2012HS-900T U2
36 USBAI_EN R949 1 2 0_0402_5% 8 1
CB CEN CEN# 36
USB20_N0 7 2 USB20_N0_U
14 USB20_N0 TDM DM
1 14 USB20_P0
USB20_P0 6 TDP DP 3 USB20_P0_U
+5VALW 5 VCC GND 4
R1016 1 9
100K_0402_5% GND
MAX14566EETA+_TDFN-EP8_2X2~D
2
CU1546 0.1U_0402_16V4Z
2
L62 M3@
14 USB30_MRX_DTX_P0 USB30_MRX_DTX_P0 1 2 USB30_MRX_DTX_P0_C
1 2
USB30_MRX_DTX_N0 USB30_MRX_DTX_N0_C
CB=0 Auto detection charger identification active
14 USB30_MRX_DTX_N0 4 4 3 3
WCM-2012HS-900T
CB=1 Connect DP/DM to TDP/TDM
4 4

P32-USB/BT/USBsub
Custom 1.0
QBL50 LA-7551P
A B C D E
5 4 3 2 1
ON/OFF switch Power Button Fan Control Circuit

+3VS +5VS
+3VALW
2
2
D R668 C701 1 D
10K_0402_5% C700 ACES_85205-0300N
2
2.2U_0603_106K
R527 U53 1 1000P_0402_50V7K 5
1
2 GND
8 GND EN 1 4 GND
100K_0402_5% FAN_SPEED 7 2
GND VIN +5VS_FAN
6 3 3
1
GND VOUT 3
7236LGH @ SW 3
SMT1-05-A_4P
D12
C702
1 5 GND VSET 4 1 36 FAN_SPEED
FAN_SPEED 2 2
2 ON/OFF# 36 1 1
1 3 ON/OFFBTN# 1 1000P_0402_50V7K APL5607KI-TRG_SO8 C703
3 10U_0603_6.3V6M JFAN1
51_ON# 40 2 2
2 4
DAN202UT106_SC70-3
Change to SC600000B00 36 FAN_SET CONN@
6
5
2
C773
1000P_0402_50V7K
1
%RWWRP6LGH
1
@ SW 4 Q28 D
SMT1-05-A_4P EC_ON 2
36 EC_ON
2
1 3 G
R528 S
3
2 4
10K_0402_5% SSM3K7002FU_SC70-3
6
5
C C
EC BIOS ROM R1049
+3VALW 1 2 C1370 1 2 0.1U_0402_16V4Z
JBTN1
ON/OFFBTN# 0_0603_5% +SPI_VCC
1 1 R1055 1 C1374 1
2 2 PW R_LED# 32,36
U42
2
33_0402_5%
2
22P_0402_50V8J
3 3 LID_SW #
+5VALW
EC_SPICS#/FSEL#
4 4 LID_SW # 36 36 EC_SPICS#/FSEL#
R1050 1
1 CS# VCC 8
5 5 +3VALW 2 4.7K_0402_5% EC_SPI_W P# 3
WP# SCLK 6 EC_SPICLK_R R1051 1 2 0_0402_5% EC_SPICLK 36
R1052 1 2 4.7K_0402_5% EC_SPI_HOLD#7 EC_SO_SPI_SI_R R1053 1 2 0_0402_5%
6 6 +3VALW HOLD# SI 5
EC_SI_SPI_SO_R R1054 1
EC_SO_SPI_SI 36
GND 7 4 GND SO 2 2 0_0402_5% EC_SI_SPI_SO 36
GND 8 MX25L1606EM2I-12G SOP 8P
2
ACES_85201-06051 SA000041N00
PJSOT24CH_SOT23-3
D27
1
B B
@
A A

P31-KB /SW/TP/Lid
B 1.0
QBL50 LA-7551P
5 4 3 2 1
5 4 3 2 1
+3VALW
L65
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2+EC_VCCA
1 1 C1346 1 1 2 2 BLM18AG601SN1D_2P
C1345 1
C1347 C1348 C1349 C1350
1000P_0402_50V7K 1000P_0402_50V7K C1351
2 2 2 2 1 1
2
ECAGND
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
D D
111
125
22
33
96
67
9
U31
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
EC_GA20 1 21
14 EC_GA20 EC_KBRST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F
14 EC_KBRST# 2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23
SERIRQ 3 26
13 SERIRQ LPC_FRAME# SERIRQ# FANPWM1/GPIO12 ACOFF C1360 100P_0402_50V8J
13,32 LPC_FRAME# 4 LFRAME# ACOFF/FANPWM2/GPIO13 27 ACOFF 39
@ C1352 LPC_AD3 5 2 1 ECAGND
13,32 LPC_AD3 LAD3
22P_0402_50V8J @ LPC_AD2 7 PWM Output
13,32 LPC_AD2 LAD2
2 1 2 1 LPC_AD1 8 63 BATT_TEMP
13,32 LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP 40
R1014 33_0402_5% LPC_AD0
13,32 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I
ADP_I/AD2/GPIO3A 65 ADP_I 39
LPC_CLK0_EC 12 AD Input 66 AD_BID0
13,16 LPC_CLK0_EC PCICLK AD3/GPIO3B AD_BID0 37
A_RST# 13 75 1 2 ENBKL
13 A_RST# PCIRST#/GPIO05 AD4/GPIO42
+3VALW 2 1 37 76 R30 0_0402_5%
R1011 47K_0402_5% EC_SCI# ECRST# SELIO2#/AD5/GPIO43 +3VS
14 EC_SCI# 20 SCI#/GPIO0E
2 1 1 2 38 CLKRUN#/GPIO1D
C1353 0.1U_0402_16V4Z @ R1015 10K_0402_5% 68 FCH_PW RGD 1 @ 2
DAC_BRIG/DA0/GPIO3C FAN_SET R1035 10K_0402_5%
EN_DFAN1/DA1/GPIO3D 70 FAN_SET 35
DA Output 71 IREF
IREF/DA2/GPIO3E IREF 39
KSI0 55 72 CHGVADJ
KSO[0..15] KSI0/GPIO30 DA3/GPIO3F CHGVADJ 39
KSI1 56 +5VS
KSO[0..15] 37 KSI1/GPIO31
KSI2 57
KSI[0..7] KSI3 KSI2/GPIO32 EC_MUTE# TP_CLK
KSI[0..7] 37 58 KSI3/GPIO33 PSCLK1/GPIO4A 83 EC_MUTE# 30 2 1
C KSI4 59 84 USB_ON# 4.7K_0402_5% R1018 C
KSI4/GPIO34 PSDAT1/GPIO4B USB_ON# 34
KSI5 60 85 W LAN_LED# TP_DATA 2 1
KSI5/GPIO35 PSCLK2/GPIO4C W LAN_LED# 32
KSI6 61 PS2 Interface 86 BT_LED# 4.7K_0402_5% R1019
KSI6/GPIO36 PSDAT2/GPIO4D BT_LED# 32
KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK 37
KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA 37
KSO1 40
KSO2 KSO1/GPIO21
41 KSO2/GPIO22
KSO3 42 97
KSO3/GPIO23 SDICS#/GPXOA00 VGATE 47
HI:2.4V KSO4 43 98 EN_W OL
KSO4/GPIO24 SDICLK/GPXOA01 EN_W OL 29
KSO5 VLDT_EN
LOW: 0.8V KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW #
VLDT_EN 38,46
R1033 EC_SPICLK 35
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW # 35
@ KSO7 46 SPI Device Interface EC_SPICLK_L 1 2 @
KSO8 KSO7/GPIO27 FBMA-10-100505-101T C1357 33P_0402_50V8K
+3VALW 1 2 47 KSO8/GPIO28
R1020 2.2K_0402_5% KSO9 48 119
KSO9/GPIO29 SPIDI/RD# EC_SI_SPI_SO 35
+3VS 1 2 EC_SMB_CK2 KSO10 49 120 Reserve for EMI, close to EC
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI 35
R1021 2.2K_0402_5% KSO11 50 SPI Flash ROM 126 EC_SPICLK_L
EC_SMB_DA2 KSO12 KSO11/GPIO2B SPICLK/GPIO58
1 2 51 KSO12/GPIO2C SPICS# 128 EC_SPICS#/FSEL# 35
R1022 2.2K_0402_5% KSO13 52
KSO14 KSO13/GPIO2D
+3VALW 1 2 53 KSO14/GPIO2E
R1023 @ 2.2K_0402_5% KSO15 54 73 Delay EC_PWROK 50ms
KSO15/GPIO2F CIR_RX/GPIO40 CEN# 34
USBAI_EN 81 74 PX_EN
34 USBAI_EN
USBAI_PEN# KSO16/GPIO48 CIR_RLC_TX/GPIO41 PX_EN 22,25 for VGA criterial
HI:2.4V 34 USBAI_PEN# 82 KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 89
CHARGE_LED0#
FSTCHG 39
BATT_CHGI_LED#/GPIO52 90 CHARGE_LED0# 32
+3VALW LOW: 0.8V 91 CAPS_LED#
CAPS_LED# 32
EC_SMB_CK1 CAPS_LED#/GPIO53 CHARGE_LED1# C1363 100P_0402_50V8J
40 EC_SMB_CK1 77 SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54 92 CHARGE_LED1# 32
EC_SMB_CK1 EC_SMB_DA1 PW R_LED# ACIN
1
R1027
2
2.2K_0402_5%
BATT 40 EC_SMB_DA1
EC_SMB_CK2
78 SDA1/GPIO45 SUSP_LED#/GPIO55 93
SYSON
PW R_LED# 32,35 2 1
6,19 EC_SMB_CK2 79 SCL2/GPIO46 SM Bus SYSON/GPIO56 95 SYSON 38,43
EC_SMB_DA1 EC_SMB_DA2 VR_ON ENBKL
1
R1028
2
2.2K_0402_5%
APU/VGA 6,19 EC_SMB_DA2 80 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 121
127 ACIN
VR_ON 47
100K_0402_5%
1 2
R1034
B KSO1 AC_IN/GPIO59 ACIN 39 B
1 2 @
R1029 47K_0402_5%
1 2 KSO2 SLP_S3# 6 100 EC_RSMRST#
14 SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# 14
R1030 47K_0402_5% SLP_S5# 14 101 EC_LID_OUT#
14 SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# 14
1 2 LID_SW # EC_SMI# 15 102 EC_ON
14 EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON 35
R37 10K_0402_5% 16 103 EC_PME#
USB_ON# LID_SW#/GPIO0A EC_SWI#/GPXO06 FCH_PW RGD
1 2 17 SUSP#/GPIO0B ICH_PWROK/GPXO06 104 FCH_PW RGD 14 Delay SUSP# 10ms
R1619 10K_0402_5% 18 GPO 105 BKOFF#
PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# 27
1 @ 2 EC_SMI# 19 GPIO 106
EC_PME#/GPIO0D WL_OFF#/GPXO09 W L_OFF#_EC 32
R1617 10K_0402_5% EC_INVT_PW M 25 107
27 EC_INVT_PW M EC_THERM#/GPIO11 GPXO10 RF_LED# 32
1 2 EC_MUTE# FAN_SPEED 28 108 VGA_ON 25
R1616 10K_0402_5% 35 FAN_SPEED FAN_SPEED1/FANFB1/GPIO14 GPXO11
29 FANFB2/GPIO15
EC_TX_P80_DATA 30 +3VALW
32 EC_TX_P80_DATA EC_TX/GPIO16
+3VS EC_RX_P80_CLK 31 110 PE_GPIO1 PE_GPIO1 13,25
32 EC_RX_P80_CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1
ON/OFF# 32 112 1 @ 2 ENBKL
35 ON/OFF# ON_OFF/GPIO18 ENBKL/GPXID2 ENBKL 10
1 2 EC_SCI# 34 114 EAPD R32 0_0402_5%
PWR_LED#/GPIO19 GPXID3 EAPD 30
R1623 10K_0402_5% NUM_LED# 36 GPI 115 EC_THERM#
32 NUM_LED# NUMLED#/GPIO1A GPXID4 EC_THERM# 8,13,47
116 SUSP#
GPXID5 SUSP# 32,38
1
117 PBTN_OUT#
GPXID6 PBTN_OUT# 14
GPXID7 118 1 2TL_BKOFF# TL_BKOFF# 26,27
R1032
EC_CRY1 122 R29 0_0402_5% 10K_0402_5%
XCLK1
13,16 RTC_CLK 1 2 EC_CRY2 123 XCLK0 V18R 124 @
R1036 0_0402_5% 1
2
1
AGND
2 C1359
GND
GND
GND
GND
GND
EC_CRY1 EC_CRY2 R1037 C1358 1 @ 2 EC_PME#

100K_0402_5% 22P_0402_50V8J 4.7U_0603_6.3V6K 14,29,32 FCH_PCIE_W AKE# R2 0_0402_5%
KB930QF A1 LQFP 128P 2
2 2
11
24
35
94
113
69
@ @ 1
20mil
2
1
A
C1361 @ C1362 L66 A
15P_0402_50V8J X2 15P_0402_50V8J ECAGND 1 2
OSC
OSC
1 1 FBM-11-160808-601-T_0603
NC
NC
32.768KHZ_12.5PF_Q13MC14610002
2
EC ENE KB930
B 1.0
QBL50 LA-7551P
5 4 3 2 1
+VGA_CORE
INT_KBD Conn.
KSI[0..7]
KSI[0..7] 36 P9 FS1 PWR/GND
KSO[0..15] ID BRD ID Ra Rb Vab
KSO[0..15] 36 ACES_88514-02401-071
1 1 1
26 C435 C436 C474
GND2 + + +
25
GND1 0 R01 SR 100K 0 0V
KSO2 C1543 1 2 @ 100P_0402_50V8J KSO1 C1544 1 2 @ 100P_0402_50V8J
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
KSO15 24 +CPU_CORE
KSO15 C1546 1 KSO7 KSO0 24 2 2 2
2 @ 100P_0402_50V8J C1545 1 2 @ 100P_0402_50V8J 23 1 R02 ER 100K 8.2K 0.25V
KSO7 23
22
KSO6 C1547 1 KSI2 KSO5 22
2 @ 100P_0402_50V8J C1548 1 2 @ 100P_0402_50V8J 21
KSO2 21
20
20 2 R10 MP 100K 18K 0.5V
KSO8 C1549 1 2 @ 100P_0402_50V8J KSO5 C1550 1 2 @ 100P_0402_50V8J KSO4 19
KSO8 19
18
18
C993
330U_D2_2V_Y
C994
330U_D2_2V_Y
C999
330U_D2_2V_Y
C995
330U_D2_2V_Y
C1014
330U_D2_2V_Y
KSO13 C1551 1 2 @ 100P_0402_50V8J KSI3 C1552 1 2 @ 100P_0402_50V8J KSO6 17 VGA@ VGA@ VGA@ 3 Reserve 100K 33K 0.82V 1 1 1 1 1
KSO11 17
16
KSO12 C1553 1 KSO14 KSO10 16 + + + + +
2 @ 100P_0402_50V8J C1554 1 2 @ 100P_0402_50V8J 15
KSO12 15
14
KSO11 C1555 1 KSI7 KSI3 14 +1.5VSG
2 @ 100P_0402_50V8J C1556 1 2 @ 100P_0402_50V8J 13
KSI0 13 2 2 2 2 2
12
KSO10 C1557 1 KSI6 KSI2 12
2 @ 100P_0402_50V8J C1558 1 2 @ 100P_0402_50V8J 11 +3VALW
KSI4 11 @
10
10 1 Ra
KSO3 C1559 1 2 @ 100P_0402_50V8J KSI5 C1560 1 2 @ 100P_0402_50V8J KSI6 9
KSI7 9 VGA@ + AD_BID0 R1024
8 36 AD_BID0 1 2 100K_0402_5%
KSO4 C1561 1 KSI4 KSI1 8
2 @ 100P_0402_50V8J C1562 1 2 @ 100P_0402_50V8J 7 C374
KSI5 7 330U_D2_2V_Y R1026
6 1 2 18K_0402_5%
KSI0 C1563 1 KSO9 KSO13 6 2
2 @ 100P_0402_50V8J C1564 1 2 @ 100P_0402_50V8J 5
KSO1 5
4
4 Rb
KSO0 C1565 1 2 @ 100P_0402_50V8J KSI1 C1566 1 2 @ 100P_0402_50V8J KSO3 3
KSO9 3
2
KSO14 2
1
1
CONN PIN define need double check JKB1 +CPU_CORE_NB
CONN@
C1010
330U_D2_2V_Y
C1011
330U_D2_2V_Y
1 1
+ +
2 2
+5VS
To TP/B Conn.
ZZZ
C1567
0.1U_0402_16V4Z
JTP1
1 H2 H4 H5 H6 H8 H9 H10
TP_CLK 1 H_3P8 H_3P0 H_3P8 H_3P0 H_3P8 H_3P8 H_4P3
36 TP_CLK 2
2 PCB
TP_DATA 3
36 TP_DATA 3
1 1 SW/L 4
@ @ SW/R 4 @ @ @ @ @ @ @
5 7
1
C1568 C1569 5 GND1
6 8
100P_0402_50V8J 100P_0402_50V8J 6 GND2
2 2 ACES_85201-06051
H11 H12 H13 H14 H15 H16 H18
H_4P3 H_3P0 H_3P0 H_4P3 H_4P3 H_3P0 H_3P8
JSPK1
3
D17 D28 30 SPK_R1 SPK_R1 1 @ @ @ @ @ @ @
1
SPK_R2 1
30 SPK_R2 2
SPK_L1 2
@ @ 30 SPK_L1 3
SPK_L2 3
30 SPK_L2 4
4 H19 H20 H21 H22 H23
5
1
YSDA0502C 3P C/A SOT-23 G5 H_3P0 H_3P0 H_3P0 H_7P0 H_3P3

6
YSDA0502C 3P C/A SOT-23 G6
ACES_85205-04001
For ESD. CONN@ @ @ @ @ @
1
Close to JTP1 For ESD.
Close to JSPK1
3
2
D9 D10 H1 H3 H7 H17
H_2P7X5P0N H_10P0X6P0N H_3P0 H_2P6N
@ @
@ @ @ @
1
1
YSDA0502C 3P C/A SOT-23 YSDA0502C 3P C/A SOT-23
FD1 FD2 FD3 FD4
Left side Button Right side Button
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
NTC010-BB1G-C100C NTC010-BB1G-C100C
SW5 SW6
SW/L 2 1 SW/R 2 1
4 3 4 3
5
Close to LED1
1 2
C1644 0.1U_0603_25V7K
Close to LED2
1 2
C1645 0.1U_0603_25V7K
Close to LED3
1 2
C1646 0.1U_0603_25V7K
Close to LED4
1 2
C1647 0.1U_0603_25V7K
Close to LED5
1 2
C1648 0.1U_0603_25V7K
For ESD.
Cap to LED gap is 1.2mm.
Note: Differential page:
P1,P2,P9,P29,P37
And Power schematic.

P33-Other IO/USB (right)
Custom 1.0
QBL50 LA-7551P
A B C D E
ʾˈ˩˔˟˪ʳ˧ˢʳʾˈ˩˦ʳʻˈ˔ʼ +5VALW
ʾ˄ˁ˄˩˔˟˪ʳ˧ˢʳʾ˄ˁ˄˩˦ʳʻ˄ˁ˄˔ʼ +5VALW +5VALW
+5VS
2
U38 +1.1VALW +1.1VS
SI4800BDY-T1-GE3_SO8 U39 R1097 R1098
8 1 AO4430L_SO8 100K_0402_5% 100K_0402_5%
7 2 8 1
2
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1U_0603_10V6K
SSM3K7002FU_SC70-3
6 3 1 7 2
1
1
2
C1446
C1444
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1 1 5 6 3 1 1 VLDT_EN#
1
C1443
C1447
C1449
SSM3K7002FU_SC70-3
R1099 1 5 SYSON#
C1445
470_0603_5% R1100 R1101
1
2 D
C1448
1K_0402_5% 470_0603_5% Q51
4
2 2 2 2 2
36,46 VLDT_EN
1 1
1
2 G Q52 D
2
1
1
D Q55 D Q57 S 2
3
1 SUSP VLDT_EN# 36,43 SYSON 1
2 2 G
1
G G R1102 S
3
1 2 5VS_GATE S S 10K_0402_5% R1104
+VSB
3
R1103 47K_0402_5% SSM3K7002FU_SC70-3 +VSB 1 2 1.1VS_GATE SSM3K7002FU_SC70-3 100K_0402_5%
2
1 R1105 47K_0402_5%
2
1
1
Q56 D C1450 Q64 D +5VALW
1
SUSP 2 0.1U_0603_25V7K VLDT_EN# 2
G 2 G C1451
2
S S 0.1U_0603_25V7K
3
3
SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 2 R1108
100K_0402_5%
SSM3K7002FU_SC70-3
1
SUSP
ʾˆ˩˔˟˪ʳ˧ˢʳʾˆ˩˦ʳʻˆˁˆ˔ʼ
28,45 SUSP
+3VALW +3VS
1
U40 Q53 D
SI4800BDY-T1-GE3_SO8 32,36 SUSP# 2
8 1 G
1
7 2 S
3
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
6 3 1 1
C1455
1 1 5 R1109
C1452
R1110 10K_0402_5%
C1453
C1454
470_0603_5%
4
2
2 2
1 1
2 2
D Q58
2 SUSP
G
2 1 3VS_GATE S
˩˚˔ʳˣ̂̊˸̅
+VSB
2 R1112 200K_0402_5% 3 SSM3K7002FU_SC70-3 2
1
Q59 D
1
SUSP 2
G C1456 +1.5V to +1.5VSG (1.5A)
S 0.1U_0603_25V7K
3
SSM3K7002FU_SC70-3 2 +1.5V +1.5VSG

U41 VGA@
AO4430L_SO8
8 1
7 2
ʾ˄ˁˈ˩ʳ˧ˢʳʾ˄ˁˈ˩˦ʳʻ˄ˁˈ˔ʼ
2
10U_0603_6.3V6M
VGA@ C1459
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@ C1457
6 3 1 1
1 1 5 VGA@ VGA@
C1458 R1114
+1.5V +1.5VS
C1460
VGA@
AP2301GN-HF_SOT23-3 1U_0402_6.3V6K 470_0603_5%
4
Q63 2 2
1 1
3 1 2 2
D Q73
2
2
10U_0603_6.3V6M
1 2 1.5_VDDC_PWREN#
C1461
G
R1116 R1117 S VGA@
2
3
100K_0402_5% 470_0603_5% +VSB 1 VGA@ 2 1.5VSG_GATE SSM3K7002FU_SC70-3
2 R1118 100K_0402_5%
1
1
1
1
D Q61 Q74 D C1462 +5VALW
2 SUSP 1.5_VDDC_PWREN# 2 1 2 VGA@
1
R1122 Q60 D G VGA@ R1120 47K_0402_5% G 0.1U_0603_25V7K
2
SUSP# VGA@ 2
2 1 2 S S
3
3
47K_0402_5% 1 G SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3
1 R1119
S VGA@ 100K_0402_5%
3
C1463 SSM3K7002FU_SC70-3 C1464

3 0.22U_0603_16V4Z 0.1U_0402_16V7K 3
1
2 2 VGA_PWR_ON#
1
Q68 D
25,42,45 VGA_PWR_ON 2
G
1
SSM3K7002FU_SC70-3
S
3
R1123
100K_0402_5%
+1.0VSG +VGA_CORE +1.8VSG +1.2VS
2
2
R1125 R1126 R1127 R1128

470_0603_5% 470_0603_5% 33_0603_5% 470_0603_5%
VGA@ VGA@ +3VS to +3VSG (3.3A) +5VALW
VGA@
1
Change to Jump
2
201012062000
1
D Q67 D Q66 D Q65 D Q62 R1131

2 VGA_PWR_ON# 2 1.5_VDDC_PWREN# 2 VGA_PWR_ON# 2 VLDT_EN# @ PJ14 100K_0402_5%
G G G G +3VS 1 2 +3VSG
VGA@ VGA@ VGA@ 1 2
S S S S
3
1
SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 JUMP_43X118 1.5_VDDC_PWREN#
1
Q77 D
25,48 1.5_VDD_PWREN 2
+1.5V +2.5VS +0.75VS G
1
S
3
SSM3K7002FU_SC70-3
2
4 R1134 4
R1135 R1136 R1137 10K_0402_5%
470_0603_5% 470_0603_5% 470_0603_5%
2
1
1
1
D Q71 D Q72 D Q70

2 SYSON# 2 SUSP 2 SUSP Security Classification Compal Secret Data Compal Electronics, Inc.
G G G Issued Date 2010/08/04 Deciphered Date 2011/12/31 Title
S S S
DC Interface
3
SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3

B 1.0
QBL50 LA-7551P
A B C D E
A B C D
PC119 @10U_0805_25V6K
1 2
PC115
1 2
B+ @10U_0805_25V6K
B+
PQ101 P2 PQ102 P3 PR101 PL102 CHG_B+ PQ103
AO4435L_SO8 AO4409L_SO8 0.02_1206_1% 1.2UH_1231AS-H-1R2N=P3_2.9A_30% AO4407AL 1P SO8
VIN 8 1 1 8 1 4 2 1 1 8
7 2 2 7 2 7
6 3 3 6 2 3 CSIN 3 6
10U_0805_25V6K
@10U_0805_25V6K
4.7U_0805_25V6-K
5 5 5
2200P_0402_25V7K
0.1U_0402_25V6
CSIP
4
1
1
1 1
PC103
PC104
PC111
VIN
PC105
PC106
CHG_N_005
3
PQ104 PR107 PR108
@5600P_0402_25V7K
2
2
S TR LTA044EUBFS8TL PNP UMT3F 200K_0402_1% 191K_0402_1% PR110
0.1U_0603_25V7K
PC107
6251VDD 1 2 ACSETIN 200K_0402_1%
2
1
1000P_0402_50V7K
2 1 2
2.2U_0603_6.3V6K
1
1CHG_N_010
2
VIN
PC108
PC109
RB751V-40TE17_SOD323-2
2
PC125
PR109
1
PC110
47K_0402_1% PD101 PR112
14.3K_0402_1%
@10U_0805_25V6K
47K_0402_1%
2
2
PR111
1
CHG_VIN 1
1CHG_N_0081
CHG_N_003
2
CHG_N_001
PR113 PR115
2 PR114 ACSETIN 1 2 100K_0402_1%
PQ105 1 10K_0402_1% 1 2 CHG_N_001
S TR LTC015EUBFS8TL NPN UMT3F 2 1 PU101 10_1206_5% PC112
DCIN
36 FSTCHG 1U_0603_25V6K
100K_0402_1%
PR116 1 24 1 2
3
VDD DCIN
PR117
150K_0402_1% PQ106
6
S TR LTC015EUBFS8TL NPN UMT3F 2 CHG_N_006

2
2 23 ACPRN
PQ107A ACSET ACPRN PR118
2
2 20_0603_5%
3CHG_N_002
1
SSM6N7002FU_US6 6251_EN CHG_CSON 1 CSON D
3 22 2
3
EN CSON
1
PR130 PC113 PC114 2 ACPRN
1
0_0402_5% 0.047U_0603_16V7K @2200P_0402_25V7K G

1 2 4 21 CHG_CSOP 1 2 CSOP S PQ109
3
CELLS CSOP PR119 @SSM3K7002FU_SC70-3
PQ107B PC116 6800P_0402_25V7K 20_0603_5% PQ108
2
SSM6N7002FU_US6 1 2 CHG_ICOMP 5 20 CHG_CSIN 2 1 4 AON7408L_DFN8-5 2
ICOMP CSIN
2
PC118 PR120
CHG_N_009 5 PC117 PR121 10K_0402_1% 0.1U_0603_25V7K 20_0603_5%
1 2 1 2 CHG_VCOMP 6 19 CHG_CSIP 1 2
1
VCOMP CSIP PL101 PR102
4
3
2
1
0.01U_0402_25V7K PR123 100_0402_1% PR122 10UH +-20% MSCDRI-104A-100M-E 0.02_1206_1% BATT+
PR124 1 2 CHG_ICM 7 ICM PHASE 18 LX_CHG 2.2_0603_1% 1 2 CHG 1 4
22K_0402_5% PR134
5
PACIN 0_0402_5%
4.7_1206_5%
1 2 1 2 2 3
1
PC120 6251VREF DH_CHG PQ110
10U_0805_25V6K
10U_0805_25V6K
8 VREF UGATE 17 1 2
PR125
0.1U_0402_16V7K PR126 PC121
10U_0805_25V6K
36 ADP_I 2.2_0603_5% 0.1U_0603_25V7K
1
PC101
PC126
PC102
2 1 CHG_CHLIM 9 16 BST_CHG 1 2 BST_CHGA 2 1
36 IREF CHLIM BOOT
1
1
4
1CHG_SNUB2
PR103 PR127 PD106
0.01U_0402_25V7K
2
150K_0402_1% 6251VREF 1 2 6251aclim 10 15 6251VDDP RB751V-40TE17_SOD323-2
ACLIM VDDP
1
12.4K_0402_1%
1
1
PC122
ACOFF PQ111 PR104 26251VDD AON7406L_DFN8-5
680P_0402_50V7K
36 ACOFF 2 1
3
2
1
140K_0402_1% 11 14 DL_CHG
VADJ LGATE
PC124
PR129
2
PR128 4.7_0603_5%
2
20K_0402_1% CHG_VADJ 12 13 PC123

3
2
S TR LTC015EUBFS8TL NPN UMT3F GND PGND 4.7U_0805_6.3V6K
ISL6251AHAZ-T QSOP 24P
PR105
10K_0402_1%
1 2
36 CHGVADJ
2
3
PR106 3
22K_0402_1%
1
6251VDD
PR133
1
10K_0402_1%
PR131 1 2
47K_0402_1% PR132 ACIN 36
10K_0402_1%
PACIN
2
1
C
1
ACPRN 2 PQ112
B PR136
E 20K_0402_1%
3
MMBT3904W H NPN SOT323-3
2
4 4

CHARGER
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
A B C D
A B C D
PL1
HCB2012KF-121T50_0805
PH1 under CPU botten side :
1 2
VIN CPU thermal protection at 92 +-3 degree C
PL2
HCB2012KF-121T50_0805
Recovery at 80 +-3 degree C
ADPIN 1 2 VL
PJPDC1
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
@10U_0805_25V6K
@10U_0805_25V6K
4 4
1
3
22K_0402_1%
3
2
PC1
PC2
PC3
PC4
1
2 2 1
PC13
PC14
1 PC5
2
1 0.1U_0603_16V7K
PR1
2
2
@CVILU_CI0104P1VRB-NH
X7R type
1
PU1
1 8 OTP_N_001
VCC TMSNS1
2 7 OTP_N_002 2 1
GND RHYST1
3 6 PR2 22.1K_0402_1%
OT1 TMSNS2
1
4 OT2 RHYST2 5
OTP_N_003
G718TM1U_SOT23-8 PH1
100K_0402_1%_NCP15W F104F03RC
PL3
2
HCB2012KF-121T50_0805
1 2
VMB PR4
PJP2
PL4 2 1
1 HCB2012KF-121T50_0805 VS_ON 41
1 0_0402_5%
2 2 1 2 BATT+
3 3
10U_0805_25V6K
4 4
5 EC_SMCA
5
1
6 EC_SMDA
6
2
1
PC127
7 TS_A PC6 PC7
7 PR27 1000P_0402_50V7K 0.01U_0402_25V7K
10 8
2
GND 8 1K_0402_1%
11 9
@PJSOT24CW_SOT323-3
2
GND 9
1
2
PD1 2
1
@SUYIN_200275MR009G186ZL
2
PD2
2 B+ 3 1 +VSBP
1
100K_0402_1%
0.1U_0603_25V7K
0.22U_0603_25V7K
3
1
PR28
1
PC8
PC9
PR10
100_0402_1% @PJSOT24CW _SOT323-3
1 2 EC_SMB_CK1 36
2
1 2 EC_SMB_DA1 36
2
PR31 PQ1
100_0402_1% VL PR12 TP0610K-T1-GE3_SOT23-3
PR29 22K_0402_1%
1 2 1 2 VSB_N_001
+3VALW
1VSB_N_003
100K_0402_5% PR13
PR30 100K_0402_1%
1 2 BATT_TEMP 36
PR16
1
1K_0402_1% 0_0402_5% D
41,44 SPOK 1 2VSB_N_002 2 PQ2

3
G SSM3K7002FU_SC70-3 3
0.1U_0402_16V7K
S
3
1
PC10
2
VIN
2
PD3
PJ2
RLS4148_LL34-2
2 1
VS_N_001
+VSBP +VSB
1
2 1
@JUMP_43X39
BATT+ 2 1 (120mA,40mils ,Via NO.= 1)

1
PD4
RLS4148_LL34-2 PQ3 PR17 PR18
TP0610K-T1-GE3_SOT23-368_1206_5% 68_1206_5%
2
N1 3 1 VS
1
PC12
PR21 PC11 0.1U_0603_25V7K
100K_0402_1% 0.22U_0603_25V7K
2
2
2
4 4
1 2 VS_N_002
35 51_ON#
PR22
22K_0402_1%

DCIN / BATT CONN / OTP
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B
A B C D
A B C D E
2VREF_6182
1
1 1
PC308
1U_0603_16V6K
2
PR301 PR305
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
PR302 PR306
B+ B++
20K_0402_1% 20K_0402_1%
B++
PL301 1 2 FB_3V FB_5V 1 2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
PR303 PR307
2200P_0402_50V7K
2200P_0402_50V7K
@10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
133K_0402_1% 165K_0402_1%
1
1
4.7U_0805_25V6-K
1 2 1 2
1
1
PC322
PC309
PC310
PC311
PC312
PC304
PC306
PQ303
2
2
6
1
AON7408L_DFN8-5 PU301
2
5
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
1
PC313 PQ305
4 10U_0805_6.3V6M 25 AON7408L_DFN8-5
P PAD
2
7 24 4
2 VO2 VO1 2
1
2
3
PC314 8 23 PR309 PC315
0.1U_0402_10V7K PR308 VREG3 PGOOD 2.2_0402_5% 0.1U_0402_10V7K
1 2 BST1_3V 1 2 BST_3V 9 22 BST_5V 1 2 BST1_5V 1 2
3
2
1
2.2_0402_5% BOOT2 BOOT1
PL303 1 2 UG_3V 10 21 UG_5V 1 2 PL305
4.7UH_FMJ-0630T-4R7 HF_5.5A_20% UGATE2 UGATE1 4.7UH_FMJ-0630T-4R7 HF_5.5A_20%
2 1 LX_3V PR318 0_0402_5% 11 20 LX_5V PR321 0_0402_5% 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
1
8
7
6
5
5
6
7
8
1
4.7_1206_5%
4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
PR312
PQ304
SKIPSEL
PR313
VREG5
1
PR314
GND
1
VIN
+
NC
PC303 499K_0402_1%
EN
2
2
150U_B2_6.3VM_R35M 4 1 2 4 + PC305
B++ SPOK 40,44
150U_B2_6.3VM_R35M
1 SNUB_3V
SNUB_5V
13
14
15
16
17
18
2 RT8205LZQW(2) WQFN 24P PWM
EN0 2
AO4468L_SO8 PQ306
1
2
3
3
2
1
680P_0402_50V7K
680P_0402_50V7K
VL S TR AO4406AL 1N SO8
1
PC316
PC317
PR315
95.3K_0402_1% PC320
2
1U_0603_10V6K
2
1
PC318
4.7U_0805_10V6K
2
1
B++
PC319
2
3 0.1U_0603_25V7K 3
2VREF_6182
ENTRIP1
ENTRIP2
6
D D
PQ307A 2 N_3_5V_001 5 PQ307B
SSM6N7002FU_US6 G G SSM6N7002FU_US6 +3VLP +CHGRTC
PJP302
S S 2 1
1
PAD-OPEN 2x2m
PJP306
+5VALWP 1 2 +5VALW (5A,200mils ,Via NO.= 10)

1 2 VL PAD-OPEN 4x4m VL
40 VS_ON
1
PR317 PJP305 PJP301

100K_0402_5%
+5VALWP 1 2 +5VALW (5A,200mils ,Via NO.= 10) 2 1
PAD-OPEN 2x2m
PAD-OPEN 4x4m
1 2 2
VS PJP303
42.2K_0402_1%
2.2U_0603_10V6K
PR319 PQ308
+3VALWP
1 2 +3VALW (4A,120mils ,Via NO.= 8)
1
100K_0402_1% S TR LTC015EUBFS8TL NPN UMT3F

1
PR320
PC321
PAD-OPEN 4x4m
2
2
4 4
EC:+3VL, reserve PR319, install PR318, PR320 100K

EC:+3VALW, reserve PR318, install PR319, PR320 42.2K Security Classification Compal Secret Data Compal Electronics, Inc.
3.3VALWP/5VALWP
A B C D E
A B C D
1 1
PL402
PU401 PL401 <Vo=1.8V> VFB=0.6V
4
+5VALW HCB1608KF-121T30_0603 1UH_VLS252012T-1R0N1R7_2.4A_30%
1 2 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
Vo=VFB*(1+PR401/PR402)=0.6*(1+20K/10K)=1.8V
PG
PVIN LX +1.8VSGP
68P_0402_50V8J
9 PVIN LX 3
1
4.7_1206_5%
1
1
PC404
PC403 8 SVIN
PR403
22U_0805_6.3VAM PR401
6 1.8VSP_FB 20K_0402_1%
2
2
FB
22U_0805_6.3VAM
22U_0805_6.3VAM
5
2
EN
1
NC
NC
TP
PC401
PC402
11
2
SNUB_1.8VSP
2
1 2 EN_1.8VSP 2
1
25,38,45 VGA_PWR_ON
1
PR404 200K_0402_5%
0.1U_0402_10V7K
PC405
S IC RT8061AZQW W DFN 10P PW M PR402
1
PR405 10K_0402_1%
@47K_0402_5%
PD401
2
680P_0402_50V7K
2
2
1 2
1
PC406
@1SS355_SOD323-2
2
PJP401
+1.8VSGP 1 2 +1.8VSG (2A, 80mils, Via NO.= 4)

PAD-OPEN 3x3m
3 3
4 4

+1.8VSGP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B 1.0
A B C D
5 4 3 2 1
D D
1.5V_B+
PR503 PL502 B+
2 1 EN_1.5V HCB1608KF-121T30_0603
36,38 SYSON 2 1
0_0402_5% PC505
1
@0.1U_0402_10V7K
10U_0805_25V6K
2200P_0402_50V7K
@4.7U_0805_25V6-K
0.1U_0402_25V6
@10U_0805_25V6K
2
1
PC507
PC512
PC503
PC504
PC506
PR504
2
2.2_0402_5%
BST_1.5V 1 2BST1_1.5V 1 2
4
PC508
0.1U_0402_10V7K
15
14
1
PU501 PQ501
PR506 PR505 AON7408L_DFN8-5
EN/DEM
NC
BOOT
3
2
1
255K_0402_1% 0_0402_5% +1.5VP
1 2TON_1.5V 2 TON UGATE 13 UG_1.5V 1 2 PL501
C S COIL 1UH +-20% VMPI0703AR-1R0M-Z01 11A C
+1.5VP 3 12 LX_1.5V 1 2
VOUT PHASE
+5VALW 1 V5FILT_1.5V TRIP_1.5V 1 PR508 15K_0402_1%
+5VALW 2 4 VDD CS 11 2
4.7_1206_5%
PR507 PR501
5
6
7
8
1
+1.5VP 1 2 FB_1.5V 5 10 +5VALW +5VALW 1
100_0402_1% FB VDDP
PR509
1
1
2.21K_0402_1% 6 9 LG_1.5V PQ502 + PC501
PGOOD LGATE
PGND
PC509 PC510 FDS6690AS-G_SO8 220U_6.3VM_R15
GND
1
4.7U_0603_10V6K 4.7U_0805_10V6K
2
2
PR502 2
4
2.15K_0402_1%
1SNUB_1.5V
7
8
RT8209MGQW _W QFN14_3P5X3P5
680P_0402_50V7K
2
3
2
1
PC511
2
B PJP502 B
1 2
@PAD-OPEN 4x4m
PJP501
+1.5VP 1 2 +1.5V (8A,320mils ,Via NO.= 16)

@PAD-OPEN 4x4m
A A

+1.5VP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QBL50 LA-7551P 1.0
5 4 3 2 1
5 4 3 2 1
D D
1.1V_B+
PR703 PL702 B+
2 1 EN_1.1V HCB1608KF-121T30_0603
40,41 SPOK 2 1
0_0402_5% PC704
1
@0.1U_0402_10V7K
10U_0805_25V6K
2200P_0402_50V7K
@10U_0805_25V6K
0.1U_0402_25V6
@10U_0805_25V6K
1 1
1
PC703
PC702
PC705
1
PC706
PC711
PR704
2
2.2_0402_5% 2 2
2
BST_1.1V 1 2 BST1_1.1V 1 2
4
PC707
0.1U_0402_10V7K
15
14
1
PU701 PQ701
EN/DEM
NC
BOOT
3
2
1
255K_0402_1% 0_0402_5% +1.1VALW
2.2UH_PCMC063T-2R2MN_8A_20%
+1.1VALW 3 12 LX_1.1V 1 2
VOUT PHASE PR708 14K_0402_1%
+5VALW +5VALW 1 2 V5FILT_1.1V 4 11 TRIP_1.1V 1 2
VDD CS
4.7_1206_5%
PR701
5
6
7
8
1
PR707 1 2 5 10 +5VALW +5VALW 1
FB VDDP
2
PR709
100_0402_1% +1.1VALW FB_1.1V
1
1
4.64K_0402_1% 6 9 LG_1.1V PQ702 PR706 + PC701
PGOOD LGATE
1
PGND
C PC708 PC709 @100K_0402_5% 220U_D2_2VY_R15M C
GND
4.7U_0603_6.3V6M PR702 4.7U_0805_10V6K AO4468L_SO8
2
2
10K_0402_1% 2
4
1
RT8209MGQW _W QFN14_3P5X3P5
1SNUB_1.1V
7
8
2
680P_0402_50V7K
3
2
1
PC710
2
B B
A A

PWR+1.1VALWP
Custom 1.0
QBL50 LA-7551P
5 4 3 2 1
5 4 3 2 1
+1.5V
PU601
1 VIN NC 8 +3VALW
2 GND NC 7
1
D D
1
PC601 3 6
VREF VCNTL
1
4.7U_0805_6.3V6K
2
PR601 PC603
4 VOUT NC 5
1K_0402_1% 1U_0603_10V6K
2
9
2
TP
APL5336KAI-TRL_SOP8P8
VREF_G2992
+0.75VSP
0.1U_0402_16V7K
1
PQ602
SSM3K7002FU_SC70-3
1
PR604 D
PR602
1
2 10.75VS_N_002 2 1K_0402_1%
28,38 SUSP G PC605
2
10U_0805_6.3V6M
PC604
S
2
0_0402_5%
1
PC606
2 @0.1U_0402_10V7K
C PJP601 C
+0.75VSP 1 2 +0.75VS (2A,80mils ,Via NO.= 4)

PU603
PAD-OPEN 3x3m
APL5508-25DC-TRL_SOT89-3
+3VS 2 3
IN OUT
+2.5VSP
4.7U_0805_6.3V6K
1
GND
1
PC607
1U_0402_6.3V6K 1 PR605
PC608
@150_1206_5%
2
+5VALW
+1.5V
1U_0603_10V6K
1
PC612
2
4.7U_0805_6.3V6K
PJP602
+2.5VSP 1 2 +2.5VS
PU602 APL5930KAI-TRG_SO8
1
6
PC611
VCNTL PAD-OPEN 3x3m

5 VIN VOUT 3 +1.0VSP
9 VIN VOUT 4
1
2
B PR610 B
1
8 1.82K_0402_1%
180P_0402_50V8J
22U_0805_6.3V6M
EN
PC614
PC615
PR609 7 2
GND
POK FB
15K_0402_1%
2
2
1 2
2
25,38,42 VGA_PWR_ON
1
1
PC613
PD601 0.1U_0402_16V7K PR611
2
1 2 7.32K_0402_1%
2
1SS355_SOD323-2
PJP603
+1.0VSP 1 2 +1.0VSG (2.5A,100mils ,Via NO.= 5)

PAD-OPEN 3x3m
A A

PWR 0.75VSP/1.0VSP/2.5VSP
5 4 3 2 1
A B C D
1 1
1.2V_B+
PR803 PL802 B+
2 1 EN_1.2V HCB1608KF-121T30_0603
36,38 VLDT_EN
0_0402_5% 2 1
PC804
1
@0.1U_0402_10V7K
2200P_0402_50V7K
10U_0805_25V6K
@680P_0402_50V7K
0.1U_0402_25V6
2
1
PC806
PC811
PC802
PC805
2 2
PR804
2
2.2_0402_5%
BST_1.2V 1 2BST1_1.2V 1 2
4
PC807
0.1U_0402_10V7K
15
14
1
PU801 PQ801
EN/DEM
NC
BOOT
3
2
1
255K_0402_1% 0_0402_5% +1.2VS
2.2UH_PCMC063T-2R2MN_8A_20%
+1.2VS 3 12 LX_1.2V 1 2
VOUT PHASE
+5VALW +5VALW 1 2 V5FILT_1.2V 4 11 TRIP_1.2V 1 PR808 2

15K_0402_1%
VDD CS
PR801
5
6
7
8
1
PR807 +1.2VS 1 2 FB_1.2V 5 10 +5VALW +5VALW 1
100_0402_1% FB VDDP PR809
220U_D2_2VY_R15M
1
1
+
PC801
3.24K_0402_1% 6 9 LG_1.2V @4.7_1206_5%
PGOOD LGATE
PGND
PC808 PC809 PQ802
GND
1
4.7U_0603_6.3V6M 4.7U_0805_10V6K S TR AO4406AL 1N SO8

2
1SNUB_1.2V 2
PR802 2
4
5.36K_0402_1% RT8209MGQW _W QFN14_3P5X3P5
7
8
2
3
2
1
PC810
@680P_0402_50V7K
2
3 3
4 4

+1.2VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B 1.0
A B C D
5 4 3 2 1
PL204
HCB2012KF-121T50_0805
1 2
CPU_B+ PL205
HCB2012KF-121T50_0805
1 2 B+
10U_0805_25V6K
2200P_0402_50V7K
0.01U_0402_25V7K
PLACE NEAR NB choke
@100U_25V_M
10U_0805_25V6K
1 1
@10U_0805_25V6K
@10U_0805_25V6K
S ELE CAP 68U 25V M 6.3X5.8 ESR0.36 FK
1
1
VSUMG+ + +
PC226
PC225
PC228
PC229
PC230
PC227
1
PR202
PC267
PC268
1
5
10_0402_5% PC231
4.02K_0402_1%
2
0.01U_0402_16V7K 2 2
PR203
2 1
0.1U_0402_10V7K
0.047U_0402_16V7K
2
2 1 PR255
11K_0402_1%
2
1
D D
0_0603_5% PQ205
1PH203_NB 2
8 APU_VDDNB_RUN_FB_L
PC232
PC233
PC234
PR201
2 1 4
@330P_0402_50V7K TPCA8065-H_PPAK56-8-5
2
8 APU_VDDNB_SEN
PR204 2 1
+CPU_CORE_NB 10_0402_5%
2
2 1 PL203
3
2
1
PC266 0.36UH_VMPI1004AR-R36M-Z03_30A_20%
@330P_0402_50V7K PH203 PHASE_NB 1 4
+CPU_CORE_NB
PLACE NEAR NB L-MOS 10K_0402_5%_ERTJ0ER103J 2 3
5
PQ206
TPCA8059-H_PPAK56-8-5
2
1
VSUMG-
PR205
PC236 PR207 PR208 4.7_1206_5%
VSUMG+_1
VSUMG-_1
470P_0402_50V7K 143K_0402_1% 2.49K_0402_1% PH204
1
2 1COMP_NB_1
2 1 2 1 470K_0402_5%_TSM0B474J4702RE 4
845_0402_1%
SNUB_NB 2
1 2 PC235
PR206
0.1U_0603_50V7K
2
PR211 PR213
1
27.4K_0402_1% 3.65K_0805_1%
3
2
1
PR209 2 1 2 1FB_NB_12 1 1 2NTC_NB_1 1 2 VSUMG+ 2 1
100K_0402_1% PR212
1
PC238 PR210 PC239 3.83K_0402_1%
BOOT1_NB 6.65K_0402_1%
100P_0402_50V8J 324_0402_1% 1000P_0402_50V7K PC237 PR214
2
UGATE_NB 680P_0402_50V7K 1_0402_1%
2
2
PR217
PR215 PC240 VSUMG- 2 1
+5VS 2.2_0603_5% 0.1U_0603_50V7K CPU_B+
2
2 1BOOST1_NB1 2 1
LGATE_NB
2
ISUMN_NB
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
0.01U_0402_25V7K
PR216 PC241
PROG2 1
8.06K_0402_1% 1000P_0402_50V7K
NTC_NB
1
1
1
PC223
PC224
PC242
PC243
Rfset(Kohm)=(Period(uS))-0.29)*2.65
2
5
48
47
46
45
44
43
42
41
40
39
38
37
PU201 +5VS
C C
PROG2
ISEN1_NB
ISEN2_NB
VSEN_NB
RTN_NB
ISUMN_NB
ISUMP_NB
NTC_NB
BOOT1_NB
UG1_NB
PH1_NB
LG1_NB
PR253
0_0603_5% PQ203
1 36 UGATE2 2 1 4
FB2_NB PWM2_NB
1
PR219
0_0402_5%
FB_NB 2 35 BOOT2 0_0603_5%
FB_NB BOOT2
PR218
COMP_NB 3 34 UGATE2
3
2
1
+3VS COMP_NB UG2 PL202
6267_VCCP1 2
VW_NB 4 33 PHASE2 0.36UH_VMPI1004AR-R36M-Z03_30A_20%
VW_NB PH2 PHASE2 1 4
5 32 LGATE2 +CPU_CORE
PGOOD_NB LG2
1
PR223 0_0402_5% PR224 PR226 PC244 ISEN2 2 PR220 1 2 3 1 PR222 2 ISEN1
5
8 APU_SVD 2 1 SDA 6 31 6267_VCCP1 2 2.2_0603_5% 0.1U_0603_50V7K PQ204 10K_0402_1% 10K_0402_1%
SVD VCCP
1
VSUM+_2
PR221 PR227 0_0402_5% ISL6267HRZ-T_QFN48_6X6 0_0402_5% BOOT2 2 1BOOT2_12 1 PR228
100K_0402_5% 2 1 ALERT# 7 30 PWM3 4.7_1206_5%
13 APU_PWRGD_L
1
PR229 0_0402_5% PWROK PWM3
1U_0603_10V6K
2
1 SCLK LGATE1
PC245
2 8 29 VSUM+ 2 PR230 1
8 APU_SVC SVC LG1
PR225 LGATE2 4 3.65K_0805_1%
2
2
@100K_0402_5% 9 28 PHASE1
36 VR_ON ENABLE PH1 PR231
SNUB_CPU2
10 27 UGATE1 1_0402_1%
36 VGATE PGOOD UG1 VSUM- 2 1 VSUM-_2
3
2
1
11 26 BOOT1
8,13,36 EC_THERM# PROC_HOT BOOT1
PR232 3.83K_0402_1% PR233 27.4K_0402_1%
ISEN3/FB2
2 1PH202_CPU 2 1 NTC_CPU 12 25 PROG1_CPU 1 2

NTC PROG1 PC246
ISUMN
ISUMP
COMP
1
ISEN2
ISEN1
VSEN
PR234 680P_0402_50V7K
VDD
RTN
VIN
VW
6.65K_0402_1% If the layout of each phase to CPU

FB
TP
2 1 is symmetric, the two res. can be
2
PLACE NEAR Phase1 L-MOS
13
14
15
16
17
18
19
20
21
22
23
24
49
PH202 470K_0402_5%_TSM0B474J4702RE removed.

VW_CPU
They are used for phase current
1 VDD_CPU
balance adjustment.
ISEN3_FB2_CPU
VIN_CPU
2 PR2351
1U_0603_10V6K
CPU_B+
1
COMP_CPU 0_0603_5%
ISUMN_CPU
1
2 1 +5VS
PR236 PC247 PR237
B B
8.06K_0402_1% 1000P_0402_50V7K 1_0603_5%
0.22U_0603_25V7K
2
PC248 33P_0402_50V8J CPU_B+

Rfset(Kohm)=(Period(uS))-0.29)*2.65
2
PC250
1 2
2
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
0.01U_0402_25V7K
FB_CPU
PC249
1
PR238 VSUM+
PC222
PC221
PC254
PC253
5
100K_0402_1% PC251 PR239 PC252
1
2 1 2 1 2 1FB_CPU_1
2 1 ISEN2
2
PR240
68P_0402_50V8J 324_0402_1% 1000P_0402_50V7K 2.61K_0402_1% PR254
0.22U_0402_16V7K
0.01U_0402_16V7K
ISEN1 0_0603_5% PQ201

11K_0402_1%
1
PC255 PR241 PR242 UGATE1 2 1 4

0.22U_0402_10V6K
0.22U_0402_10V6K
1PH201_CPU 2
1COMP_CPU_12
PC258
PC259
PR243
2 1 2 1 TPCA8065-H_PPAK56-8-5
1
470P_0402_50V7K 143K_0402_1% 2.43K_0402_1%

PC256
PC257
PL201
2
3
2
1
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
PHASE1 1 4
PR248 VSUM-
10_0402_5% PH201 PR247 PC260 ISEN1 2 PR245 1 2 3 1 PR246 2 ISEN2
5
+CPU_CORE 2 1 10K_0402_5%_ERTJ0ER103J 2.2_0603_5% 0.1U_0603_50V7K 10K_0402_1% 10K_0402_1%
VSUM+_1
PR244 BOOT1 2 1BOOT1_1 2 1 PQ202 PR249
976_0402_1% 4.7_1206_5%
2
2 1 2 1 VSUM-
VSUM+ 2 PR250 1
PC261 LGATE1 4 3.65K_0805_1%
2
8 APU_VDD_SEN
1
@330P_0402_50V7K
PC263 PC262 PR251
SNUB_CPU1
8 APU_VDD_RUN_FB_L
@330P_0402_50V7K PLACE NEAR Phase1 choke 0.1U_0603_50V7K 1_0402_1%
2
2 1 VSUM- 2 1 VSUM-_1
3
2
1
PR252
10_0402_5% PC264
2 1 0.01U_0402_16V7K
PC265
1
A 680P_0402_50V7K A

PWR_+CPU_CORE/+CPU_CORE_NB
1.0
QBL50 LA-7551P
5 4 3 2 1
A B C D
PC924 @10U_0805_25V6K
1 2
1 2
PC925 @10U_0805_25V6K
PL902
HCB2012KF-121T50_0805
1 2 VGA_B+
B+
10U_0805_25V6K
10U_0805_25V6K
1 1
@4.7U_0805_25V6-K
1
1
@10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
PC912
PC911
1
1
PC923
PC914
PC915
PC913
2
5
@TPCA8065-H_PPAK56-8-5
2
2
+3VS PQ901 PQ906
2
PR905
10K_0402_1% 4 4
1
PU901 PR906 PC916
1 10 BST_VGA 1 2BST1_VGA 1 2
13,25 VGA_PW RGD
3
2
1
3
2
1
PGOOD VBST 2.2_0603_5% PR919
1 PR9072TRIP_VGA 2 9 DH_VGA 0.1U_0603_25V7K 1 2 PL901 +VGA_CORE
73.2K_0402_1% TRIP DRVH 0_0603_5% 0.36UH_PDME104T-R36MS0R825_37A_20%
1 PR908 2 EN_VGA 3
EN SW 8 LX_VGA 1 2
25,38 1.5_VDD_PW REN PR909
1
1
0_0402_5% FB_VGA 4 7 V5IN_VGA 1 2
0.1U_0402_16V7K
VFB V5IN +5VALW
5
PC917 0_0603_5% PR910
330U_D2_2V_Y
2
5 6 DL_VGA PQ902 PQ903 4.7_1206_5% 1
2
RF DRVL PC918
PC901
RF_VGA
2
11 +
1
TP PC919 0.1U_0402_10V7K
1SNUB_VGA
RT8237CZQW (2) W DFN 2.2U_0603_6.3V6K 4 4
1
2
2
2 TPCA8059-H_PPAK56-8-5 2
3
2
1
3
2
1
PR911 PC920
470K_0402_1% 680P_0402_50V7K
1
2
PR912
+VGA_CORE1 2 1 GCORE_SEN 21
@10K_0402_1%
100_0402_1%
6.19K_0402_1%
2
2
PR903
PR904
+3VSG
+3VSG
3.01K_0402_1%
FB1_VGA1
FB0_VGA 1
2
2
PR901 PR913
10K_0402_1%
@10K_0402_1%
2
PR915
PR914
@5.1K_0402_1%
1
1
1
D 19 GPU_VID1 PR917
@SSM3K7002FU_SC70-3
1
D 19 GPU_VID0
PQ904
2GPU_VID1_1 1 2 5.1K_0402_1%
0.1U_0402_16V7K
1
2
G 2 GPU_VID0_1 1 2
1
S PR916 G
0.1U_0402_16V7K
3
2
@10K_0402_5%
PC921
S
1
PQ905 PR918
PC922
2
@10K_0402_5%
1
SSM3K7002FU_SC70-3
2
3 3
1
Rtrip = 73.2K, OCP = 34.42A
Rrf = 470K, FSW = 290KHz
1
PR902
GPU VID1 GPU VID0 Whistler Pro 6.98K_0402_1%
2
X L 1.0V
X H 0.9V
H L
H H
4 4

VGA_CORE
A B C D
5 4 3 2 1
Version change list (P.I.R. List) Power section Page 1 of 1
Item Reason for change PG# Modify List Date Phase

1
2
D D
C C
B B
A A

Title
Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2011/12/31
Changed-List History
QBL50 LA-7551P 1.0
5 4 3 2 1
5 4 3 2 1
32:(56(48(1&(
$&,1%$77,1
9$/:
D D
9$/:
9$/:
(&B560567
7!PV
7$PV
7!PV
57&B&/.
3%71B287
6/3B6 7!QV
6/3B6
'HOD\6/3B6
6<621
9
'HOD\6/3B6
6863
C C
96
96
96
9696
9/'7B(1 'HOD\6863PV
7$!QV
96
FCH_PWRGD
9*$B21 'HOD\6863PV
B9''&B3:5(1 $1'IURP9*$B21 3;B(1
9*$B&25(96*
B B
96*96*
7PV 96*WR96*SRZHUXS
9*$B3:5*'
95B21 9*$B21'HOD\PV
$38B&25($38B&25(B1%
9*$7(
7%PV
7$PV
)&+B3:5*'
PV7PV
$38B3:5*'
A
$B567 PV7$PV
A
7$QV
3/7B567
PV7PV
$38B567 PV7&PV

Power Sequence
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Wednesday, April 27, 2011
Date: Sheet 50 of 53
5 4 3 2 1
5 4 3 2 1
9HUVLRQFKDQJHOLVW3,5/LVW 3DJHRIIRU+:
,WHP )L[HG,VVXH 5HDVRQIRUFKDQJH 5HY 3* 0RGLI\/LVW 'DWH 3KDVH

For AMD reuqest 0.11 PG#26 Translator change to ANX3110 03/15 ER

D D
For AI charge function 0.11 PG#34 Add U2 & U56 03/15 ER

For PBL60 MEMO 0.11 PG#32 Change LED1 to Green color. 03/15 ER
For switch quality of ME. 0.11 PG#37 Change SW5,SW6 to 100g switch for ME. 03/15 ER
Change R1584 to 200 ohm.

For LED brightness. 0.11 PG#32 Change R1586,R1588,R1591,R1592,R1593 to 100 ohm 03/15 ER

For DFB. 0.12 PG#11 JDIMM1 footprint change to FOX_AS0A626-J8SG-7H_204P-T 03/17 ER

For USB3.0 & AI charge. 0.12 PG#34 USBP0 connect to JUSB1 and USBP10 connect to JUSB2. 03/17 ER

For Back light function. 0.12 PG#36 U31.15 connect to ENBKL from APU. 03/17 ER

For HDMI HPD issue. 0.12 PG#10 Q34 change to 2N7002(ESD) 03/19 ER
Add R469 to +1.5VS.

C C
For DP0_HPD & DP1_HPD from AMD recommend. 0.12 PG#10 Swap Q13.1 & Q13.3, R618 unmount. 03/19 ER
Swap Q16.1 & Q16.3, R627 unmount.

For Travis Vendor request 0.12 PG#26 Del DP0_TXN0_C & DP0_TXP0_C 03/22 ER

For LED1 0.12 PG#32 LED1 connect to +3VALW 03/22 ER

For EC SMBUS 0.2 PG#36 R1021,R1022 change to install. 03/24 ER

For Sourcer recommend 0.2 SE100105Z80 change to SE000000K80 03/24 ER

For Sourcer recommend 0.2 SE103225Z80 change to SE000008880 03/24 ER

For Sourcer recommend 0.2 SB000006A00 change to SB000006A10 03/24 ER

For Thermal 0.2 PG#37 Del H4 03/24 ER

B B
For +5VS rising time 0.2 PG#38 R1103 change to 47K 03/24 ER

For Crystal EA 0.2 PG#29 C1634 change to 12P & C1633 change to 15P 03/24 ER

For Crystal EA 0.2 PG#13 C1200 & C1201 change to 12P 03/24 ER

For Crystal EA 0.2 PG#19 C353 change to 15P & C354 change to 12P 03/24 ER

For EMI request 0.2 PG#36 R1033 change to SM01000DI00 03/24 ER
R1055 change to 33 ohm

For EMI request 0.2 PG#28 L38,L39,L40,L41 change to SM070001S00 03/24 ER

For EMI request 0.2 PG#27 D1,D2,D3,D6 change to install 03/24 ER

For Crystal EA 0.2 PG#13 C1205,C1206 change to 10P 03/24 ER

A A
For AI charge 0.2 PG#36 U2 reserve CEN# to EC 03/25 ER
PG#34

For AMD spec 0.2 PG#27 R1642 & R1646 change to 4.6K ohm 03/29 ER

HW-PIR
5 4 3 2 1
5 4 3 2 1

For EMI reuqest 0.2 PG#30 R1555,R1556,R1557,R1558 change to 0.1uf 03/29 ER

For share ROM reuqest 0.2 PG#15 U28,R626,R934,R935,R35 change to Un-install 03/29 ER
D D
PG#16 R921 change un-install & U910 change to install

For EMI reuqest 0.2 PG#34 D5 change to SC300001Y00 (YSCLAMP0524P) 03/29 ER
For Crystal vendor recommend 0.21 PG#13 Y4 change to SJ100007N00 (32.768K 7PF) 04/07 PR

For EMI recommend 0.21 PG#29 TS1 change to SP050006F00 (IH-160) 04/07 PR

For discharge EA 0.21 PG#38 R1127 change from 470 ohm to 33 ohm 04/07 PR

For leakage current 0.21 PG#27 R1644,R1645,Q101 change to install 04/07 PR
R4,R31 change to un-install

For EMI recommend 0.21 PG#29 C1636 change from 1000P to 120P 04/08 PR

For thermal recommend 0.21 PG#19 Add R78, R79, R80, R82 04/18 PR

Reserve PX_EN signal 0.21 PG#36 Reserve signal PX_EN to EC pin 74 04/18 PR
C
PG#11 C

Swap JDIMM1 & JDIMM2 location 0.21 Follow ME BOM 04/18 PR
PG#12

Do not use for MP 0.21 PG#35 Del SW3 SW4 04/18 PR

Change Boarrd ID to PR10 0.21 PG#37 Change R1036 to 18k 04/18 PR

For DFB request del co-lay schematiic 0.21 PG#34 Del R672~R675, R664~R667 04/18 PR

For EMI request 0.22 PG#29 ADD D7 04/19 PR

For EMI request 1.0 PG#13 unstuff C1193 04/25 PR
PG#13 location U25, for M2 change to SA000042C80,

For Customer change FCH P/N 1.0 ~17 M3 change to SA000043ID0 04/25 PR
R628,R629,R678,R679,R680,R681 change from 0ohm to

For ESD request 1.0 PG#32 33ohm & Add 1uF for C560,C568,C569,C570,C573,C571 04/27 PR

B B

A A
Security Classification
2010/06/30
Compal Secret Data
2011/12/31 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
HW-PIR
5 4 3 2 1
5 4 3 2 1

For MP cost down 1.0 As picture 03/15 PR

D D
03/15
04/25

03/15
03/15

03/15

03/17

03/17

03/17

03/19

C C
03/19

03/22

03/22

03/24

03/24

B B

A A

HW-PIR
5 4 3 2 1
www.s-manuals.com

Compal La-7551p r1.0 Schematics PDF

Transféré par

Informations du document

Titre original

Copyright

Formats disponibles

Partager ce document

Partager ou intégrer le document

Options de partage

Avez-vous trouvé ce document utile ?

Ce contenu est-il inapproprié ?

Droits d'auteur :

Formats disponibles

Compal La-7551p r1.0 Schematics PDF

Transféré par

Droits d'auteur :

Formats disponibles

A B C D E

QBL50 Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

SATA HDD1 ODD HDA Codec

Touch Pad Int.KBD

CLOCK DISTRIBUTION DISPLAY DISTRIBUTION

: APU HDMI PATH

LVDS Transtator 32.768KHz 25MHz

CRT CONN HDMI CONN

Security Classification Compal Secret Data

+CPU_CORE_NB Voltage for On-die VGA of APU ON OFF OFF

+VSB VSB always on power rail ON ON ON*

x = 1 is read cmd, x= 0 is writee cmd.

External PCI Devices

EC SM Bus1 address EC SM Bus2 address

Device Address HEX Device Address HEX

AMD APU FS1

+VDDCI 0.9~1.0V VDDCI 4.6A

+5VALW VDDIO_33_PCIGP: 131 mA

Security Classification Compal Secret Data

18 PCIE_GTX_C_FRX_P[0..7] PCIE_FTX_C_GRX_P[0..7] 18 APU To HDMI

PCI EXPRESS PCIE_FTX_GRX_N[12..15] 28

AC5 AD4 PCIE_FTX_DRX_P0 C950 1 2 0.1U_0402_16V7K

32 PCIE_DTX_C_FRX_N1 AC9 P_GPP_RXN1 P_GPP_TXN1 AC3 PCIE_FTX_C_DRX_N1 32

AE6 AF5 UMI_FTX_MRX_P1 C958 1 2 0.1U_0402_16V7K

Security Classification Compal Secret Data Compal Electronics, Inc.

JCPU1B CONN@ JCPU1C CONN@

11 DDRA_SMA[15..0] MEMORY CHANNEL A DDRA_SDQ[63..0] 11 12 DDRB_SMA[15..0] MEMORY CHANNEL B DDRB_SDQ[63..0] 12

EVENT# pull high 0.75V reference voltage +1.5V

R545 1 2 1K_0402_5% MEM_MB_EVENT# +MEM_VREF

Place near APU JCPU1D CONN@ Place near APU

DP0_TXP1 E3 E5 ML_VGA_AUXP C975 1 2 0.1U_0402_16V7K DP0_AUXN R555 2 1 1.8K_0402_5%

DISPLAY PORT MISC.

+1.5V TMS H_THERMTRIP# 14

THERMDC AD12 T16

Power Name Consumption

AG5 VDDP_A_4 VDDP_B_4 B4 1 1 1 1 1 1 1 T9

Demo Board Capacitor (include PWM side)

1 1 1 1 1 1 1 2 22uF x 9 22uF x 6 680uF x 1 100uF x 4 10uF x 1 0.22uF x 2 0.22uF x 4

4 2 2 2 2 2 2 2 1 180pF x 2 180uF x 3 22uF x 3 180pF x 4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data

+VREF_DQ +1.5V +1.5V

Security Classification Compal Secret Data Compal Electronics, Inc.

+VREF_DQ +1.5V +1.5V

+0.75VS +1.5V +1.5V

Security Classification Compal Secret Data Compal Electronics, Inc.

PCI EXPRESS INTERFACES

A29 LPC_AD3 32,36

R27 GPP_CLK8N LDT_STP# G26

PCIE_RST2 : Reset PCIE device on Hudson2

ACPI / WAKE UP EVENTS

R876 2.2K_0402_5% @ C22 EMBEDDED CTRL G22 APU_SIC

1 2 EC_LID_OUT# G21 APU_SID

Modify 2010212-AMD request FCH_GPIO189 KSO_1/GPIO210 EC_PWM3/EC_TIMER3/GPIO200

+3VS @ J18 F24

1 2 FCH_SDATA0 R44 R43 K18 F18

R881 2.2K_0402_5% GPIO190 (use PX) L(NO) H(YES) KSO_10/GPIO219 KSI_7/GPIO208

1 2 EC_RSMRST# +3VALW For FCH internal debug use

U25B SYS BIOS ROM 0.1U_0402_16V4Z C466

VGA_DDC_SDA/GPO70 M33 FCH_CRT_DDC_SDA 27

C29 FCH_CRT_HPD FCH_CRT_HPD 2 1

Security Classification Compal Secret Data Compal Electronics, Inc.