RED670I11r01 - Technical Reference Manual PDF

Relion® 670 series
Line differential protection RED670

Technical reference manual
Document ID: 1MRK505183-UEN
Issued: June 2010
Revision: C
Product version: 1.1
© Copyright 2010 ABB. All rights reserved

Copyright
This document and parts thereof must not be reproduced or copied without written
permission from ABB, and the contents thereof must not be imparted to a third
party, nor used for any unauthorized purpose.
The software or hardware described in this document is furnished under a license

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Please inquire about the terms of warranty from your nearest ABB representative.
ABB AB
Substation Automation Products
SE-721 59 Västerås
Sweden
Telephone: +46 (0) 21 32 50 00
Facsimile: +46 (0) 21 14 69 18
http://www.abb.com/substationautomation
Disclaimer
The data, examples and diagrams in this manual are included solely for the concept
or product description and are not to be deemed as a statement of guaranteed
properties. All persons responsible for applying the equipment addressed in this
manual must satisfy themselves that each intended application is suitable and
acceptable, including that any applicable safety or other operational requirements
are complied with. In particular, any risks in applications where a system failure and/
or product failure would create a risk for harm to property or persons (including but
not limited to personal injuries or death) shall be the sole responsibility of the
person or entity applying the equipment, and those so responsible are hereby
requested to ensure that all measures are taken to exclude or mitigate such risks.
This document has been carefully checked by ABB but deviations cannot be
completely ruled out. In case any errors are detected, the reader is kindly requested
to notify the manufacturer. Other than under explicit contractual commitments, in
no event shall ABB be responsible or liable for any loss or damage resulting from
the use of this manual or the application of the equipment.
Conformity
This product complies with the directive of the Council of the European
Communities on the approximation of the laws of the Member States relating to
electromagnetic compatibility (EMC Directive 2004/108/EC) and concerning
electrical equipment for use within specified voltage limits (Low-voltage directive
2006/95/EC).
This conformity is proved by tests conducted by ABB AB in accordance with the

generic standard EN 50263 for the EMC directive, and with the standards EN
60255-5 and/or EN 50178 for the low voltage directive.
This product is designed and produced for industrial use.

Table of contents
Table of contents
Section 1 Introduction.....................................................................29
Introduction to the technical reference manual.................................29
About the complete set of manuals for an IED............................29
About the technical reference manual.........................................30
This manual.................................................................................31
Introduction.............................................................................31
Principle of operation..............................................................31
Input and output signals.........................................................34
Function block........................................................................34
Setting parameters.................................................................34
Technical data........................................................................35
Intended audience.......................................................................35
Related documents......................................................................35
Revision notes.............................................................................36
Section 2 Analog inputs..................................................................37

Introduction.......................................................................................37
Operation principle...........................................................................37
Function block..................................................................................38
Setting parameters...........................................................................39
Section 3 Local HMI.......................................................................45

Human machine interface ................................................................45
Small size HMI..................................................................................47
Small............................................................................................47
Design.........................................................................................47
Medium size graphic HMI.................................................................49
Medium........................................................................................49
Design.........................................................................................49
Keypad.............................................................................................51
LED...................................................................................................52
Introduction..................................................................................52
Status indication LEDs................................................................52
Indication LEDs...........................................................................52
Local HMI related functions..............................................................53
Introduction..................................................................................53
General setting parameters.........................................................54
Status indication LEDs................................................................54
Design....................................................................................54
Function block........................................................................54
1
Table of contents

Indication LEDs...........................................................................55
Introduction.............................................................................55
Design....................................................................................55
Function block........................................................................62
Setting parameters.................................................................62
Section 4 Basic IED functions........................................................65

Authorization.....................................................................................65
Principle of operation...................................................................65
Authorization handling in the IED...........................................67
Self supervision with internal event list.............................................67
Introduction..................................................................................67
Internal signals.......................................................................69
Run-time model......................................................................71
Function block.............................................................................72
Output signals..............................................................................72
Setting parameters......................................................................72
Technical data.............................................................................73
Time synchronization........................................................................73
Introduction..................................................................................73
General concepts...................................................................73
Real-time clock (RTC) operation............................................76
Synchronization alternatives..................................................77
Process bus IEC 61850-9-2LE synchronization.....................80
Function block.............................................................................80
Output signals..............................................................................81
Technical data.............................................................................84
Parameter setting groups.................................................................84
Introduction..................................................................................84
Function block.............................................................................85
Input and output signals..............................................................86
ChangeLock function CHNGLCK.....................................................86
Introduction..................................................................................87
Function block.............................................................................87
2
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Test mode functionality TEST..........................................................88

Introduction..................................................................................88
Function block.............................................................................90
IED identifiers...................................................................................91
Introduction..................................................................................91
Product information..........................................................................92
Introduction..................................................................................92
Application...................................................................................92
Factory defined settings.........................................................92
Signal matrix for binary inputs SMBI................................................93
Introduction..................................................................................93
Function block.............................................................................93
Signal matrix for binary outputs SMBO ...........................................94
Introduction..................................................................................94
Function block.............................................................................95
Signal matrix for mA inputs SMMI....................................................95
Introduction..................................................................................96
Function block.............................................................................96
Signal matrix for analog inputs SMAI...............................................97
Introduction..................................................................................97
Frequency values........................................................................97
Function block.............................................................................98
Setting parameters....................................................................100
Summation block 3 phase 3PHSUM..............................................102
Introduction................................................................................102
Principle of operation.................................................................102
Function block...........................................................................103
Input and output signals............................................................103
Authority status ATHSTAT.............................................................104
3
Table of contents
Introduction................................................................................104
Function block...........................................................................104
Output signals............................................................................104
Section 5 Differential protection...................................................107

Line differential protection..............................................................107
Introduction................................................................................107
Line differential protection, 3 or 6 CT sets L3CPDIF,
L6CPDIF...............................................................................107
Line differential protection 3 or 6 CT sets, with in-zone
transformers LT3CPDIF, LT6CPDIF....................................109
Analog signal transfer for line differential protection............109
Algorithm and logic...............................................................110
Time synchronization...........................................................116
Analog signal communication for line differential
protection..............................................................................118
Open CT detection feature...................................................121
Binary signal transfer............................................................122
Line differential coordination function LDLPDIF ..................123
Function block...........................................................................123
Technical data...........................................................................141
1Ph High impedance differential protection HZPDIF .....................141
Introduction................................................................................142
Logic diagram.......................................................................142
Function block...........................................................................143
Technical data...........................................................................144
Section 6 Impedance protection ..................................................145

Distance measuring zones, quadrilateral characteristic
ZMQPDIS, ZMQAPDIS, ZDRDIR...................................................145
Introduction................................................................................145
Full scheme measurement...................................................146
Impedance characteristic.....................................................147
Minimum operating current...................................................151
Measuring principles............................................................151
4
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Directional impedance element for quadrilateral

characteristics......................................................................154
Simplified logic diagrams......................................................156
Function block...........................................................................159
Technical data...........................................................................163
Distance measuring zone, quadrilateral characteristic for
series compensated lines ZMCPDIS, ZMCAPDIS, ZDSRDIR.......164
Introduction................................................................................165
Directionality for series compensation..................................173
Function block...........................................................................178
Technical data...........................................................................184
Phase selection, quadrilateral characteristic with fixed angle
FDPSPDIS......................................................................................184
Introduction................................................................................185
Phase-to-earth fault..............................................................187
Phase-to-phase fault............................................................189
Three-phase faults...............................................................190
Load encroachment..............................................................191
Minimum operate currents....................................................194
Function block...........................................................................199
Technical data...........................................................................202
Full-scheme distance measuring, Mho characteristic
ZMHPDIS ......................................................................................202
Introduction................................................................................202
Basic operation characteristics.............................................205
Theory of operation..............................................................206
Function block...........................................................................216
5
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Technical data...........................................................................218
Full-scheme distance protection, quadrilateral for earth faults
ZMMPDIS, ZMMAPDIS..................................................................219
Introduction................................................................................219
Directional lines....................................................................226
Function block...........................................................................231
Technical data...........................................................................234
Directional impedance element for mho characteristic and
additional distance protection directional function for earth
faults ZDMRDIR, ZDARDIR...........................................................234
Introduction................................................................................235
Directional impedance element for mho characteristic
ZDMRDIR.............................................................................235
Additional distance protection directional function for
earth faults ZDARDIR ..........................................................238
Function block...........................................................................240
Mho impedance supervision logic ZSMGAPC................................242
Introduction................................................................................242
Fault inception detection......................................................243
Function block...........................................................................244
Faulty phase identification with load encroachment
FMPSPDIS.....................................................................................245
Introduction................................................................................246
The phase selection function................................................246
Function block...........................................................................257
6
Table of contents
Technical data...........................................................................259
Power swing detection ZMRPSB ...................................................259
Introduction................................................................................259
Resistive reach in forward direction.....................................261
Resistive reach in reverse direction.....................................262
Reactive reach in forward and reverse direction..................262
Basic detection logic.............................................................263
Operating and inhibit conditions...........................................265
Function block...........................................................................266
Technical data...........................................................................268
Power swing logic ZMRPSL ..........................................................268
Introduction................................................................................268
Communication and tripping logic........................................268
Blocking logic.......................................................................269
Function block...........................................................................271
Pole slip protection PSPPPAM ......................................................272
Introduction................................................................................272
Function block...........................................................................276
Technical data...........................................................................277
Automatic switch onto fault logic, voltage and current based
ZCVPSOF ......................................................................................278
Introduction................................................................................278
Function block...........................................................................280
Technical data...........................................................................281
Phase preference logic PPLPHIZ...................................................281
Introduction................................................................................281
Function block...........................................................................284
Section 7 Current protection.........................................................287

7
Table of contents
Instantaneous phase overcurrent protection PHPIOC ..................287

Introduction................................................................................287
Function block...........................................................................288
Technical data...........................................................................289
Four step phase overcurrent protection OC4PTOC ......................289
Introduction................................................................................289
Function block...........................................................................294
Technical data...........................................................................301
Instantaneous residual overcurrent protection EFPIOC ................301
Introduction................................................................................302
Function block...........................................................................302
Technical data...........................................................................303
Four step residual overcurrent protection EF4PTOC ....................304
Introduction................................................................................304
Operating quantity within the function..................................305
Internal polarizing.................................................................306
External polarizing for earth-fault function............................308
Base quantities within the protection....................................308
Internal earth-fault protection structure................................308
Four residual overcurrent steps............................................308
Directional supervision element with integrated
directional comparison function............................................310
Second harmonic blocking element.....................................312
Switch on to fault feature......................................................314
Function block...........................................................................316
Technical data...........................................................................323
Sensitive directional residual overcurrent and power protection
SDEPSDE .....................................................................................323
Introduction................................................................................324
Function inputs.....................................................................325
Function block...........................................................................331
8
Table of contents

Technical data...........................................................................335
Thermal overload protection, one time constant LPTTR ...............336
Introduction................................................................................336
Function block...........................................................................339
Technical data...........................................................................340
Breaker failure protection CCRBRF ..............................................340
Introduction................................................................................341
Function block...........................................................................344
Technical data...........................................................................346
Stub protection STBPTOC ............................................................347
Introduction................................................................................347
Function block...........................................................................348
Technical data...........................................................................349
Pole discordance protection CCRPLD ..........................................349
Introduction................................................................................350
Pole discordance signaling from circuit breaker...................353
Unsymmetrical current detection..........................................353
Function block...........................................................................353
Technical data...........................................................................355
Directional underpower protection GUPPDUP...............................355
Introduction................................................................................355
Low pass filtering..................................................................358
Calibration of analog inputs..................................................358
Function block...........................................................................359
Technical data...........................................................................361
Directional overpower protection GOPPDOP ................................362
9
Table of contents
Introduction................................................................................362
Low pass filtering..................................................................365
Calibration of analog inputs..................................................365
Function block...........................................................................366
Technical data...........................................................................369
Broken conductor check BRCPTOC .............................................369
Introduction................................................................................369
Function block...........................................................................370
Technical data...........................................................................371
Section 8 Voltage protection........................................................373

Two step undervoltage protection UV2PTUV ................................373
Introduction................................................................................373
Measurement principle.........................................................374
Time delay............................................................................374
Blocking................................................................................379
Design..................................................................................380
Function block...........................................................................382
Technical data...........................................................................385
Two step overvoltage protection OV2PTOV ..................................386
Introduction................................................................................386
Time delay............................................................................387
Blocking................................................................................393
Design..................................................................................393
Function block...........................................................................395
Technical data...........................................................................398
Two step residual overvoltage protection ROV2PTOV .................398
Introduction................................................................................398
Time delay............................................................................399
10
Table of contents
Blocking................................................................................404
Design..................................................................................404
Function block...........................................................................405
Technical data...........................................................................408
Overexcitation protection OEXPVPH ............................................408
Introduction................................................................................408
Measured voltage.................................................................411
Operate time of the overexcitation protection.......................412
Cooling.................................................................................415
Overexcitation protection function measurands...................415
Overexcitation alarm............................................................416
Logic diagram.......................................................................417
Function block...........................................................................417
Technical data...........................................................................419
Voltage differential protection VDCPTOV ......................................419
Introduction................................................................................419
Function block...........................................................................421
Technical data...........................................................................423
Loss of voltage check LOVPTUV ..................................................423
Introduction................................................................................423
Function block...........................................................................425
Technical data...........................................................................426
Section 9 Frequency protection....................................................427

Underfrequency protection SAPTUF .............................................427
Introduction................................................................................427
Time delay............................................................................428
Voltage dependent time delay..............................................428
Blocking................................................................................430
Design..................................................................................430
Function block...........................................................................431
11
Table of contents

Technical data...........................................................................432
Overfrequency protection SAPTOF ...............................................432
Introduction................................................................................433
Time delay............................................................................433
Blocking................................................................................434
Design..................................................................................434
Function block...........................................................................435
Technical data...........................................................................436
Rate-of-change frequency protection SAPFRC .............................436
Introduction................................................................................436
Time delay............................................................................437
Blocking................................................................................437
Design..................................................................................438
Function block...........................................................................439
Technical data...........................................................................440
Section 10 Multipurpose protection................................................441

General current and voltage protection CVGAPC..........................441
Introduction................................................................................441
Measured quantities within CVGAPC...................................441
Base quantities for CVGAPC function..................................444
Built-in overcurrent protection steps.....................................444
Built-in undercurrent protection steps...................................449
Built-in overvoltage protection steps....................................450
Built-in undervoltage protection steps..................................450
Logic diagram.......................................................................450
Function block...........................................................................455
Technical data...........................................................................464
Section 11 Secondary system supervision.....................................467

Current circuit supervision CCSRDIF ............................................467
12
Table of contents
Introduction................................................................................467
Function block...........................................................................469
Technical data...........................................................................470
Fuse failure supervision SDDRFUF...............................................470
Introduction................................................................................470
Zero and negative sequence detection................................471
Delta current and delta voltage detection.............................473
Dead line detection...............................................................476
Main logic.............................................................................476
Function block...........................................................................480
Technical data...........................................................................481
Section 12 Control..........................................................................483
Synchrocheck, energizing check, and synchronizing
SESRSYN......................................................................................483
Introduction................................................................................483
Basic functionality.................................................................484
Logic diagrams.....................................................................484
Function block...........................................................................493
Technical data...........................................................................498
Autorecloser SMBRREC ...............................................................498
Introduction................................................................................499
Logic Diagrams....................................................................499
Auto-reclosing operation Off and On....................................499
Auto-reclosing mode selection.............................................499
Start auto-reclosing and conditions for start of a
reclosing cycle......................................................................500
Control of the auto-reclosing open time for shot 1...............501
Long trip signal.....................................................................501
Time sequence diagrams.....................................................508
Function block...........................................................................511
Technical data...........................................................................515
13
Table of contents
Apparatus control APC...................................................................515

Introduction................................................................................515
Error handling............................................................................516
Bay control QCBAY...................................................................518
Introduction...........................................................................518
Principle of operation............................................................518
Function block......................................................................520
Input and output signals.......................................................520
Setting parameters...............................................................521
Local/Remote switch.................................................................521
Introduction...........................................................................521
Function block......................................................................522
Switch controller SCSWI...........................................................524
Introduction...........................................................................524
Function block......................................................................529
Circuit breaker SXCBR..............................................................531
Introduction...........................................................................531
Function block......................................................................535
Circuit switch SXSWI.................................................................536
Introduction...........................................................................537
Function block......................................................................541
Bay reserve QCRSV..................................................................542
Introduction...........................................................................542
Function block......................................................................544
Reservation input RESIN...........................................................546
Introduction...........................................................................546
14
Table of contents
Function block......................................................................548
Interlocking ....................................................................................550
Introduction................................................................................550
Logical node for interlocking SCILO .........................................553
Introduction...........................................................................553
Logic diagram.......................................................................553
Function block......................................................................554
Interlocking for busbar earthing switch BB_ES .........................554
Introduction...........................................................................555
Function block......................................................................555
Logic diagram.......................................................................555
Interlocking for bus-section breaker A1A2_BS..........................556
Introduction...........................................................................556
Function block......................................................................557
Logic diagram.......................................................................558
Interlocking for bus-section disconnector A1A2_DC ................560
Introduction...........................................................................561
Function block......................................................................561
Logic diagram.......................................................................562
Interlocking for bus-coupler bay ABC_BC ................................563
Introduction...........................................................................563
Function block......................................................................564
Logic diagram.......................................................................565
Interlocking for 1 1/2 CB BH .....................................................570
Introduction...........................................................................570
Function blocks....................................................................571
Logic diagrams.....................................................................573
Interlocking for double CB bay DB ...........................................582
Introduction...........................................................................582
Function block......................................................................583
Logic diagrams.....................................................................585
Input and output signals ......................................................588
Interlocking for line bay ABC_LINE ..........................................591
Introduction...........................................................................591
15
Table of contents
Function block......................................................................592
Logic diagram.......................................................................593
Interlocking for transformer bay AB_TRAFO ............................600
Introduction...........................................................................601
Function block......................................................................602
Logic diagram.......................................................................603
Position evaluation POS_EVAL.................................................606
Introduction...........................................................................606
Logic diagram.......................................................................606
Function block......................................................................607
Logic rotating switch for function selection and LHMI
presentation SLGGIO.....................................................................607
Introduction................................................................................607
Functionality and behaviour ................................................609
Graphical display..................................................................609
Function block...........................................................................611
Selector mini switch VSGGIO.........................................................613
Introduction................................................................................613
Function block...........................................................................614
Generic double point function block DPGGIO................................615
Introduction................................................................................615
Function block...........................................................................616
Settings......................................................................................616
Single point generic control 8 signals SPC8GGIO.........................616
Introduction................................................................................616
Function block...........................................................................617
AutomationBits, command function for DNP3.0 AUTOBITS..........618
Introduction................................................................................619
16
Table of contents
Function block...........................................................................620
Single command, 16 signals SINGLECMD....................................635
Introduction................................................................................635
Function block...........................................................................636
Section 13 Scheme communication...............................................639

Scheme communication logic for distance or overcurrent
protection ZCPSCH .......................................................................639
Introduction................................................................................639
Blocking scheme..................................................................640
Permissive underreaching scheme......................................640
Permissive overreaching scheme........................................641
Unblocking scheme..............................................................641
Intertrip scheme....................................................................642
Simplified logic diagram.......................................................642
Function block...........................................................................644
Technical data...........................................................................645
Phase segregated scheme communication logic for distance
protection ZC1PPSCH ...................................................................646
Introduction................................................................................646
Blocking scheme..................................................................647
Permissive underreach scheme...........................................647
Permissive overreach scheme.............................................648
Intertrip scheme....................................................................648
Simplified logic diagram.......................................................649
Function block...........................................................................650
Technical data...........................................................................652
Current reversal and weak-end infeed logic for distance
protection ZCRWPSCH .................................................................652
Introduction................................................................................652
Current reversal logic...........................................................653
17
Table of contents
Weak-end infeed logic..........................................................653

Function block...........................................................................655
Technical data...........................................................................656
Local acceleration logic ZCLCPLAL...............................................656
Introduction................................................................................657
Zone extension.....................................................................657
Loss-of-Load acceleration....................................................658
Function block...........................................................................658
Scheme communication logic for residual overcurrent
protection ECPSCH .......................................................................660
Introduction................................................................................660
Introduction...........................................................................660
Blocking scheme..................................................................661
Permissive under/overreaching scheme..............................662
Function block...........................................................................664
Technical data...........................................................................666
Current reversal and weak-end infeed logic for residual
overcurrent protection ECRWPSCH ..............................................666
Introduction................................................................................666
Directional comparison logic function...................................667
Fault current reversal logic...................................................667
Weak-end infeed logic..........................................................668
Function block...........................................................................669
Technical data...........................................................................670
Current reversal and weak-end infeed logic for phase
segregated communication ZC1WPSCH ......................................671
Introduction................................................................................671
Current reversal logic ..........................................................671
Function block...........................................................................673
18
Table of contents
Technical data...........................................................................675
Section 14 Logic.............................................................................677
Tripping logic SMPPTRC ...............................................................677
Introduction................................................................................677
Logic diagram.......................................................................679
Function block...........................................................................683
Technical data...........................................................................685
Trip matrix logic TMAGGIO............................................................685
Introduction................................................................................685
Function block...........................................................................687
Configurable logic blocks................................................................689
Introduction................................................................................689
Inverter function block INV........................................................689
OR function block OR................................................................690
AND function block AND...........................................................691
Timer function block TIMER......................................................691
Pulse timer function block PULSETIMER..................................692
Exclusive OR function block XOR.............................................692
Loop delay function block LOOPDELAY...................................693
Set-reset with memory function block SRMEMORY.................693
Controllable gate function block GATE......................................694
Settable timer function block TIMERSET..................................695
Technical data...........................................................................696
Fixed signal function block FXDSIGN............................................696
Function block...........................................................................697
Boolean 16 to Integer conversion B16I..........................................697
Introduction................................................................................697
Function block...........................................................................698
Boolean 16 to Integer conversion with logic node
representation B16IGGIO...............................................................699
Introduction................................................................................699
19
Table of contents
Function block...........................................................................700
Integer to Boolean 16 conversion IB16..........................................701
Introduction................................................................................701
Function block...........................................................................701
Integer to Boolean 16 conversion with logic node
representation IB16GGIO...............................................................702
Introduction................................................................................703
Function block...........................................................................703
Section 15 Monitoring.....................................................................705
Measurements................................................................................705
Introduction................................................................................706
Measurement supervision....................................................707
Measurements CVMMXU.....................................................711
Phase current measurement CMMXU.................................716
Phase-phase and phase-neutral voltage measurements
VMMXU, VNMMXU..............................................................717
Voltage and current sequence measurements VMSQI,
CMSQI..................................................................................717
Function block...........................................................................717
Technical data...........................................................................735
Event counter CNTGGIO................................................................736
Introduction................................................................................736
Reporting..............................................................................736
Design..................................................................................737
Function block...........................................................................737
Input signals..............................................................................737
Technical data...........................................................................738
Event function EVENT....................................................................738
Introduction................................................................................738
20
Table of contents
Function block...........................................................................740
Logical signal status report BINSTATREP.....................................743
Introduction................................................................................743
Function block...........................................................................744
Fault locator LMBRFLO..................................................................745
Introduction................................................................................746
Measuring Principle..............................................................747
Accurate algorithm for measurement of distance to fault.....747
The non-compensated impedance model............................751
IEC 60870-5-103..................................................................752
Function block...........................................................................752
Technical data...........................................................................754
Measured value expander block RANGE_XP................................754
Introduction................................................................................754
Function block...........................................................................755
Disturbance report DRPRDRE.......................................................755
Introduction................................................................................756
Function block...........................................................................763
Technical data...........................................................................776
Event list.........................................................................................776
Introduction................................................................................776
Function block...........................................................................777
Input signals..............................................................................777
Technical data...........................................................................777
Indications......................................................................................777
Introduction................................................................................777
Function block...........................................................................779
21
Table of contents
Input signals..............................................................................779
Technical data...........................................................................779
Event recorder ...............................................................................779
Introduction................................................................................779
Function block...........................................................................780
Input signals..............................................................................780
Technical data...........................................................................780
Trip value recorder.........................................................................780
Introduction................................................................................780
Function block...........................................................................781
Input signals..............................................................................781
Technical data...........................................................................782
Disturbance recorder......................................................................782
Introduction................................................................................782
Memory and storage............................................................783
IEC 60870-5-103..................................................................784
Function block...........................................................................785
Technical data...........................................................................785
Section 16 Metering.......................................................................787
Pulse-counter logic PCGGIO..........................................................787
Introduction................................................................................787
Function block...........................................................................789
Technical data...........................................................................791
Function for energy calculation and demand handling
ETPMMTR......................................................................................791
Introduction................................................................................791
Function block...........................................................................792
Section 17 Station communication.................................................795

Overview.........................................................................................795
IEC 61850-8-1 communication protocol.........................................795
Introduction................................................................................795
22
Table of contents
IEC 61850 generic communication I/O functions SPGGIO,

SP16GGIO................................................................................795
Introduction...........................................................................796
Function block......................................................................796
IEC 61850 generic communication I/O functions MVGGIO.......797
Function block......................................................................798
Technical data...........................................................................799
IEC 61850-9-2LE communication protocol.....................................799
Introduction................................................................................799
Function block...........................................................................801
Output signals............................................................................802
Technical data...........................................................................803
LON communication protocol.........................................................803
Introduction................................................................................803
Technical data...........................................................................821
SPA communication protocol.........................................................821
Introduction................................................................................821
Communication ports...........................................................829
Design.......................................................................................829
Technical data...........................................................................830
IEC 60870-5-103 communication protocol.....................................830
Introduction................................................................................830
General.................................................................................830
Communication ports...........................................................840
Function block...........................................................................840
Technical data...........................................................................850
Horizontal communication via GOOSE for interlocking
GOOSEINTLKRCV.........................................................................851
23
Table of contents
Function block...........................................................................851
Goose binary receive GOOSEBINRCV..........................................854
Function block...........................................................................854
Multiple command and transmit MULTICMDRCV,
MULTICMDSND.............................................................................855
Introduction................................................................................856
Design.......................................................................................856
General.................................................................................856
Function block...........................................................................857
Section 18 Remote communication................................................861

Binary signal transfer......................................................................861
Introduction................................................................................861
Function block...........................................................................863
Transmission of analog data from LDCM LDCMTransmit..............867
Function block...........................................................................867
Section 19 Hardware......................................................................869
Overview.........................................................................................869
Variants of case and local HMI display size..............................869
Case from the rear side.............................................................872
Hardware modules.........................................................................877
Overview....................................................................................877
Combined backplane module (CBM).........................................878
Introduction...........................................................................878
Functionality.........................................................................878
Design..................................................................................878
Universal backplane module (UBM)..........................................880
Introduction...........................................................................880
Functionality.........................................................................880
Design..................................................................................880
Numeric processing module (NUM)..........................................882
Introduction...........................................................................882
24
Table of contents
Functionality.........................................................................883
Block diagram.......................................................................884
Power supply module (PSM).....................................................884
Introduction...........................................................................884
Design..................................................................................884
Technical data......................................................................885
Local human-machine interface (Local HMI).............................885
Transformer input module (TRM)..............................................885
Introduction...........................................................................886
Design..................................................................................886
Technical data......................................................................886
Analog digital conversion module, with time
synchronization (ADM) .............................................................887
Introduction...........................................................................887
Design..................................................................................887
Binary input module (BIM).........................................................889
Introduction...........................................................................889
Design..................................................................................889
Technical data......................................................................893
Binary output modules (BOM)...................................................893
Introduction...........................................................................893
Design..................................................................................893
Technical data......................................................................895
Static binary output module (SOM)...........................................896
Introduction...........................................................................896
Design..................................................................................896
Technical data......................................................................898
Binary input/output module (IOM)..............................................899
Introduction...........................................................................899
Design..................................................................................900
Technical data......................................................................902
mA input module (MIM).............................................................903
Introduction...........................................................................903
Design..................................................................................903
Technical data......................................................................904
Serial and LON communication module (SLM) ........................905
Introduction...........................................................................905
Design..................................................................................905
Technical data......................................................................906
Galvanic RS485 communication module...................................907
Introduction...........................................................................907
Design..................................................................................907
Technical data......................................................................909
25
Table of contents
Optical ethernet module (OEM).................................................909

Introduction...........................................................................909
Functionality.........................................................................909
Design..................................................................................909
Technical data......................................................................910
Line data communication module (LDCM)................................910
Introduction...........................................................................910
Design..................................................................................911
Technical data......................................................................912
Galvanic X.21 line data communication (X.21-LDCM)..............913
Introduction...........................................................................913
Design..................................................................................913
Functionality.........................................................................915
Technical data......................................................................916
GPS time synchronization module (GSM).................................916
Introduction...........................................................................916
Design..................................................................................916
Technical data......................................................................918
GPS antenna.............................................................................919
Introduction...........................................................................919
Design..................................................................................919
Technical data......................................................................920
IRIG-B time synchronization module IRIG-B.............................921
Introduction...........................................................................921
Design..................................................................................921
Technical data......................................................................922
Dimensions.....................................................................................923
Case without rear cover.............................................................923
Case with rear cover..................................................................925
Flush mounting dimensions.......................................................927
Side-by-side flush mounting dimensions...................................928
Wall mounting dimensions.........................................................929
External resistor unit for high impedance differential
protection...................................................................................929
Mounting alternatives.....................................................................930
Flush mounting..........................................................................930
Overview..............................................................................930
Mounting procedure for flush mounting................................932
19” panel rack mounting............................................................933
Overview..............................................................................933
Mounting procedure for 19” panel rack mounting.................934
Wall mounting............................................................................934
Overview..............................................................................934
26
Table of contents
Mounting procedure for wall mounting.................................935

How to reach the rear side of the IED..................................936
Side-by-side 19” rack mounting.................................................936
Overview..............................................................................936
Mounting procedure for side-by-side rack mounting............937
IED in the 670 series mounted with a RHGS6 case.............937
Side-by-side flush mounting......................................................938
Overview..............................................................................938
Mounting procedure for side-by-side flush mounting...........939
Technical data................................................................................939
Enclosure...................................................................................939
Connection system....................................................................940
Influencing factors.....................................................................940
Type tests according to standard..............................................941
Section 20 Labels...........................................................................945
Different labels................................................................................945
Section 21 Connection diagrams...................................................949
Section 22 Inverse time characteristics..........................................965

Application......................................................................................965
Principle of operation......................................................................968
Mode of operation......................................................................968
Inverse characteristics....................................................................973
Section 23 Glossary.......................................................................999
27
28
1MRK505183-UEN C Section 1
Introduction
Section 1 Introduction
About this chapter

This chapter explains concepts and conventions used in this manual and provides
information necessary to understand the contents of the manual.
1.1 Introduction to the technical reference manual
1.1.1 About the complete set of manuals for an IED

The user’s manual (UM) is a complete set of five different manuals:
deinstalling & disposal

Planning & purchase
Decommissioning
Commissioning
Maintenance
Engineering
Operation
Installing
Engineeringmanual
Installation and
Commissioning manual
Operator’s manual
Application manual
Technical reference
manual
IEC09000744-1-en.vsd
IEC09000744 V1 EN
The Application Manual (AM) contains application descriptions, setting

guidelines and setting parameters sorted per function. The application manual
should be used to find out when and for what purpose a typical protection function
could be used. The manual should also be used when calculating settings.
The Technical Reference Manual (TRM) contains application and functionality

descriptions and it lists function blocks, logic diagrams, input and output signals,
setting parameters and technical data sorted per function. The technical reference
29
Section 1 1MRK505183-UEN C
Introduction
manual should be used as a technical reference during the engineering phase,

installation and commissioning phase, and during normal service.
The Installation and Commissioning Manual (ICM) contains instructions on

how to install and commission the protection IED. The manual can also be used as
a reference during periodic testing. The manual covers procedures for mechanical
and electrical installation, energizing and checking of external circuitry, setting and
configuration as well as verifying settings and performing directional tests. The
chapters are organized in the chronological order (indicated by chapter/section
numbers) in which the protection IED should be installed and commissioned.
The Operator’s Manual (OM) contains instructions on how to operate the

protection IED during normal service once it has been commissioned. The
operator’s manual can be used to find out how to handle disturbances or how to
view calculated and measured network data in order to determine the cause of a fault.
The Engineering Manual (EM) contains instructions on how to engineer the IEDs
using the different tools in PCM600. The manual provides instructions on how to
set up a PCM600 project and insert IEDs to the project structure. The manual also
recommends a sequence for engineering of protection and control functions, LHMI
functions as well as communication engineering for IEC 61850 and DNP3.
1.1.2 About the technical reference manual

The following chapters are included in the technical reference manual.
• Local HMI describes the control panel on the IED and explains display
characteristics, control keys and various local HMI features.
• Basic IED functions presents functions for all protection types that are
included in all IEDs, for example, time synchronization, self supervision with
event list, test mode and other general functions.
• Differential protection describes differential functions and restricted earth fault
protection.
• Impedance protection describes functions for distance zones with their
quadrilateral characteristics, phase selection with load encroachment, power
swing detection and similar.
• Current protection describes functions, for example, over current protection,
breaker failure protection and pole discordance.
• Voltage protection describes functions for under voltage and over voltage
protection and residual over voltage protection.
• Frequency protection describes functions for over frequency, under frequency
and rate of change of frequency protection.
• Multipurpose protection describes the general protection function for current
and voltage.
• Secondary system supervision describes current based functions for current
circuit supervision and fuse failure supervision.
• Control describes control functions, for example, synchronization and
energizing check and other product specific functions.
• Scheme communication describes functions related to current reversal and
weak end infeed logic.
30
Introduction
• Logic describes trip logic and related functions.

• Monitoring describes measurement related functions that are used to provide
data regarding relevant quantities, events and faults, for example.
• Metering describes pulse counter logic.
• Station communication describes Ethernet based communication in general,
including the use of IEC 61850 and horizontal communication via GOOSE.
• Remote communication describes binary and analog signal transfer, and the
associated hardware.
• Hardware describes the IED and its components.
• Connection diagrams provides terminal wiring diagrams and information
regarding connections to and from the IED.
• Inverse time characteristics describes and explains inverse time delay, inverse
time curves and their effects.
• Glossary is a list of terms, acronyms and abbreviations used in ABB technical
documentation.
1.1.3 This manual

The description of each IED related function follows the same structure (where
applicable). The different sections are outlined below.
1.1.3.1 Introduction
Outlines the implementation of a particular protection function.
1.1.3.2 Principle of operation
Describes how the function works, presents a general background to algorithms

and measurement techniques. Logic diagrams are used to illustrate functionality.
Logic diagrams
Logic diagrams describe the signal logic inside the function block and are bordered
by dashed lines.
Signal names
Input and output logic signals consist of two groups of letters separated by two
dashes. The first group consists of up to four letters and presents the abbreviated
name for the corresponding function. The second group presents the functionality
of the particular signal. According to this explanation, the meaning of the signal
BLKTR in figure 4 is as follows:
• BLKTR informs the user that the signal will BLOCK the TRIP command from
the under-voltage function, when its value is a logical one (1).
Input signals are always on the left hand side, and output signals on the right hand
side. Settings are not displayed.
31
Introduction
Input and output signals

In a logic diagram, input and output signal paths are shown as a lines that touch the
outer border of the diagram.
Input and output signals can be configured using the ACT tool. They can be
connected to the inputs and outputs of other functions and to binary inputs and
outputs. Examples of input signals are BLKTR, BLOCK and VTSU. Examples
output signals are TRIP, START, STL1, STL2, STL3.
Setting parameters
Signals in frames with a shaded area on their right hand side represent setting
parameter signals. These parameters can only be set via the PST or LHMI. Their
values are high (1) only when the corresponding setting parameter is set to the
symbolic value specified within the frame. Example is the signal Block TUV=Yes.
Their logical values correspond automatically to the selected setting value.
Internal signals
Internal signals are illustrated graphically and end approximately 2 mm from the
frame edge. If an internal signal path cannot be drawn with a continuous line, the
suffix -int is added to the signal name to indicate where the signal starts and
continues, see figure 1.
BLKTR
TEST
TEST
&
Block TUV=Yes BLOCK-int.
>1
BLOCK
VTSU
BLOCK-int.
&
STUL1N
BLOCK-int.
& >1 & TRIP
t
STUL2N
BLOCK-int.
START
&
STUL3N
STL1
STL2
STL3
xx04000375.vsd
IEC04000375 V1 EN
Figure 1: Logic diagram example with -int signals
32
Introduction
External signals
Signal paths that extend beyond the logic diagram and continue in another diagram
have the suffix “-cont.”, see figure 2 and figure 3.
STZMPP-cont.
>1
STCND
& STNDL1L2-cont.
1L1L2
STNDL2L3-cont.
&
1L2L3
& STNDL3L1-cont.
1L3L1
& STNDL1N-cont.
1L1N
& STNDL2N-cont.
1L2N
STNDL3N-cont.
&
1L3N
>1 STNDPE-cont.
>1
1--VTSZ 1--STND
>1 &
1--BLOCK
BLK-cont.
xx04000376.vsd
IEC04000376 V1 EN
Figure 2: Logic diagram example with an outgoing -cont signal
STNDL1N-cont.
>1
STNDL2N-cont. 15 ms
& t STL1
STNDL3N-cont.
STNDL1L2-cont. >1 15 ms
& t STL2
STNDL2L3-cont.
15 ms
STNDL3L1-cont. & t STL3
>1
15 ms
& t START
>1
BLK-cont.
xx04000377.vsd
IEC04000377 V1 EN
Figure 3: Logic diagram example with an incoming -cont signal
33
Introduction
1.1.3.3 Input and output signals
Input and output signals are presented in two separate tables. Each table consists of
two columns. The first column contains the name of the signal and the second
column contains the description of the signal.
1.1.3.4 Function block
Each function block is illustrated graphically.
Input signals are always on the left hand side and output signals on the right hand
side. Settings are not displayed. Special kinds of settings are sometimes available.
These are supposed to be connected to constants in the configuration scheme and
are therefore depicted as inputs. Such signals will be found in the signal list but
described in the settings table.
• The ^ character in front of an input or output signal name in the function block
symbol given for a function, indicates that the user can set a signal name of
their own in PCM600.
• The * character after an input or output signal name in the function block
symbol given for a function, indicates that the signal must be connected to
another function block in the application configuration to achieve a valid
application configuration.
IEC 61850 - 8 -1
Logical Node Mandatory
signal (*)
Inputs Outputs
PCGGIO
BLOCK INVALID
READ_VAL RESTART
BI_PULSE* BLOCKED
RS_CNT NEW_VAL
^SCAL_VAL
en05000511-1-en.vsd
User defined
name (^)
Diagram
Number
IEC05000511 V2 EN
Figure 4: Example of a function block
1.1.3.5 Setting parameters
These are presented in tables and include all parameters associated with the
function in question.
34
Introduction
1.1.3.6 Technical data
The technical data section provides specific technical information about the
function or hardware described.
1.1.4 Intended audience

General
This manual addresses system engineers, installation and commissioning
personnel, who use technical data during engineering, installation and
commissioning, and in normal service.
Requirements
The system engineer must have a thorough knowledge of protection systems,
protection equipment, protection functions and the configured functional logics in
the protective devices. The installation and commissioning personnel must have a
basic knowledge in the handling electronic equipment.
1.1.5 Related documents

Documents related to RED670 Identity number
Operator’s manual 1MRK 505 184-UEN
Installation and commissioning manual 1MRK 505 185-UEN
Technical reference manual 1MRK 505 183-UEN
Application manual 1MRK 505 186-UEN
Buyer’s guide 1MRK 505 188-BEN
Sample specification SA2005-001281
Connection diagram, Single breaker arr. Three phase tripping arr. 1MRK 002 801-BA
Connection diagram, Single breaker arr. Single phase tripping arr. 1MRK 002 801-CA
Connection diagram, Multi breaker arr. Three phase tripping arr. 1MRK 002 801-DA
Connection diagram, Multi breaker arr. Single phase tripping arr. 1MRK 002 801-EA
Configuration diagram A, Single breaker with single or double busbars 1MRK 004 500-82
Configuration diagram B, Single breakers with single or double busbars 1MRK 004 500-83
Configuration diagram C, Multi breakers such as 1 1/2 or ring busbar arr. 1MRK 004 500-84
Configuration diagram D, Multi breakers such as 1 1/2 or ring busbar arr. 1MRK 004 500-85
Setting example 1, 230 kV Short cable line with 1 1/2CB arr. 1MRK 505 175-WEN
Connection and Installation components 1MRK 513 003-BEN

Test system, COMBITEST 1MRK 512 001-BEN
Accessories for IED 670 1MRK 514 012-BEN
Getting started guide IED 670 1MRK 500 080-UEN
SPA and LON signal list for IED 670, ver. 1.1 1MRK 500 083-WEN
Table continues on next page
35
Introduction
IEC 61850 Data objects list for IED 670, ver. 1.1 1MRK 500 084-WEN
Generic IEC 61850 IED Connectivity package 1KHA001027-UEN
Protection and Control IED Manager PCM 600 Installation sheet 1MRS755552
Engineering guide IED 670 products 1MRK 511 179-UEN
More information can be found on www.abb.com/substationautomation.
1.1.6 Revision notes

Revision Description
C No functionality added. Changes made in content due to problem reports.
36
Analog inputs
Section 2 Analog inputs
2.1 Introduction
Analog input channels must be configured and set properly to get correct
measurement results and correct protection operations. For power measuring and
all directional and differential functions the directions of the input currents must be
defined properly. Measuring and protection algorithms in the IED use primary
system quantities. Set values are done in primary quantities as well and it is
important to set the data about the connected current and voltage transformers
properly.
A reference PhaseAngleRef can be defined to facilitate service values reading. This

analog channels phase angle will always be fixed to zero degree and all other angle
information will be shown in relation to this analog input. During testing and
commissioning of the IED the reference channel can be changed to facilitate testing
and service values reading.
The IED has the ability to receive analog values from primary
equipment, that are sampled by Merging units (MU) connected to a
process bus, via the IEC 61850-9-2 LE protocol.
The availability of VT inputs depends on the ordered transformer

input module (TRM) type.
2.2 Operation principle
The direction of a current to the IED depends on the connection of the CT. The
main CTs are typically star connected and can be connected with the star point to
the object or from the object. This information must be set to the IED.
Directional conventions for current or power, for example
• Positive value of current or power means quantity direction into the object.
• Negative value of current or power means quantity direction out from the object.
Directional conventions for directional functions (see figure 5)
37
Analog inputs
• Forward means direction into the object.

• Reverse means direction out from the object.
Definition of direction Definition of direction

for directional functions for directional functions
Reverse Forward Forward Reverse
Protected Object
Line, transformer, etc
e.g. P, Q, I e.g. P, Q, I
Measured quantity is Measured quantity is
positive when flowing positive when flowing
towards the object towards the object
Set parameter Set parameter

CTStarPoint CTStarPoint
Correct Setting is Correct Setting is
"ToObject" "FromObject"
en05000456.vsd
IEC05000456 V1 EN
Figure 5: Internal convention of the directionality in the IED
The correct setting of the primary CT direction
• CTStarPoint is set to FromObject or ToObject.

• Positive quantities flow towards the object.
• Direction is defined as Forward and looks towards the object.
The ratios of the main CTs and VTs must be known to use primary system
quantities for settings and calculation in the IED, The user has to set the rated
secondary and primary currents and voltages of the CTs and VTs to provide the
IED with this information.
The CT and VT ratio and the name on respective channel is done under Main
menu/General settings/Analog module in the Parameter Settings tool.
2.3 Function block
The function blocks are not represented in the configuration tool.

The signals appear only in the SMT tool when a TRM is included in
the configuration with the function selector tool. In the SMT tool
they can be mapped to the desired virtual input (SMAI) of the IED
and used internally in the configuration.
38
Analog inputs
2.4 Setting parameters
Dependent on ordered IED type.
Table 1: AISVBAS Non group settings (basic)

Name Values (Range) Unit Step Default Description
PhaseAngleRef TRM40-Ch1 - - TRM40-Ch1 Reference channel for phase angle
TRM40-Ch2 presentation
TRM40-Ch3
TRM40-Ch4
TRM40-Ch5
TRM40-Ch6
TRM40-Ch7
TRM40-Ch8
TRM40-Ch9
TRM40-Ch10
TRM40-Ch11
TRM40-Ch12
TRM41-Ch1
TRM41-Ch2
TRM41-Ch3
TRM41-Ch4
TRM41-Ch5
TRM41-Ch6
TRM41-Ch7
TRM41-Ch8
TRM41-Ch9
TRM41-Ch10
TRM41-Ch11
TRM41-Ch12
MU1-L1I
MU1-L2I
MU1-L3I
MU1-L4I
MU1-L1U
MU1-L2U
MU1-L3U
MU1-L4U
MU2-L1I
MU2-L2I
MU2-L3I
MU2-L4I
MU2-L1U
MU2-L2U
MU2-L3U
MU2-L4U
MU3-L1I
MU3-L2I
MU3-L3I
MU3-L4I
MU3-L1U
MU3-L2U
MU3-L3U
MU3-L4U
39
Analog inputs
Table 2: TRM_12I Non group settings (basic)

CTStarPoint1 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current
40
Analog inputs

Table 3: TRM_6I_6U Non group settings (basic)

VTsec7 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim7 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
41
Analog inputs

Table 4: TRM_6I Non group settings (basic)


42
Analog inputs


43
Analog inputs

44
Local HMI
Section 3 Local HMI
About this chapter

This chapter describes the structure and use of local HMI, which is the control
panel at the IED.
3.1 Human machine interface
The local human machine interface is available in a small and a medium sized
model. The difference between the two models is the size of the LCD. The small
size LCD can display seven lines of text and the medium size LCD can display the
single line diagram with up to 15 objects on each page. Up to 12 single line
diagram pages can be defined, depending on the product capability.
The local HMI is divided into zones with different functionality.
• Status indication LEDs.

• Alarm indication LEDs, which consist of 15 LEDs (6 red and 9 yellow) with
user printable label. All LEDs are configurable from PCM600.
• Liquid crystal display (LCD).
• Keypad with push buttons for control and navigation purposes, switch for
selection between local and remote control and reset.
• Isolated RJ45 communication port.
45
Local HMI
IEC05000055-LITEN V1 EN
Figure 6: Small, alpha numeric HMI
IEC05000056-LITEN V1 EN
Figure 7: Medium graphic HMI, 15 controllable objects
46
Local HMI
3.2 Small size HMI
3.2.1 Small
The small sized HMI is available for 1/2, 3/4 and 1/1 x 19” case. The LCD on the
small HMI measures 32 x 90 mm and displays 7 lines with up to 40 characters per
line. The first line displays the product name and the last line displays date and
time. The remaining 5 lines are dynamic. This LCD has no graphic display potential.
3.2.2 Design
The local HMI is identical for both the 1/2, 3/4 and 1/1 cases. The different parts of
the small local HMI are shown in figure 8
47
Local HMI
1 2 3
en05000055.eps
8 7
IEC05000055-CALLOUT V1 EN
Figure 8: Small graphic HMI
1 Status indication LEDs

2 LCD
3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ45 port
7 Communication indication LED
8 Keypad
48
Local HMI
3.3 Medium size graphic HMI
3.3.1 Medium
The following case sizes can be equipped with the medium size LCD:
• 1/2 x 19”
• 3/4 x 19”
• 1/1 x 19”
This is a fully graphical monochrome LCD which measures 120 x 90 mm. It has 28
lines with up to 40 characters per line. To display the single line diagram, this LCD
is required.
3.3.2 Design
The different parts of the medium size local HMI are shown in figure 9. The local
HMI exists in an IEC version and in an ANSI version. The difference is on the
keypad operation buttons and the yellow LED designation.
49
Local HMI
1 2 3
en05000056.eps
8 7
IEC05000056-CALLOUT V1 EN
Figure 9: Medium size graphic HMI
1 Status indication LEDs

2 LCD
3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ45 port
7 Communication indication LED
8 Keypad
50
Local HMI
3.4 Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look
and feel in all IEDs. LCD screens and other details may differ but the way the keys
function is identical.
IEC05000153 V1 EN
Figure 10: The HMI keypad.
Table 7 describes the HMI keys that are used to operate the IED.
Table 7: HMI keys on the front of the IED

Key Function
Press to close or energize a breaker or disconnector.

IEC05000101 V1 EN
Press to open a breaker or disconnector.

IEC05000102 V1 EN
Press to open two sub menus: Key operation and IED information.
IEC05000103 V1 EN
Press to clear entries, cancel commands or edit.

IEC05000104 V1 EN
Press to open the main menu and to move to the default screen.
IEC05000105 V1 EN
Press to set the IED in local or remote control mode.

IEC05000106 V1 EN
Press to open the reset screen.

IEC05000107 V1 EN
Press to start the editing mode and confirm setting changes, when in editing mode.
IEC05000108 V1 EN
51
Local HMI
Key Function
Press to navigate forward between screens and move right in editing mode.
IEC05000109 V1 EN
Press to navigate backwards between screens and move left in editing mode.
IEC05000110 V1 EN
Press to move up in the single line diagram and in the menu tree.
IEC05000111 V1 EN
Press to move down in the single line diagram and in the menu tree.
IEC05000112 V1 EN
3.5 LED
3.5.1 Introduction
The LED module is a unidirectional means of communicating. This means that
events may occur that activate a LED in order to draw the operators attention to
something that has occurred and needs some sort of action.
3.5.2 Status indication LEDs

The three LEDs above the LCD provide information as shown in the table below.
LED Indication Information
Green:
Steady In service
Flashing Internal failure
Dark No power supply
Yellow:
Steady Dist. rep. triggered
Flashing Terminal in test mode
Red:
Steady Trip command issued
3.5.3 Indication LEDs

The LED indication module comprising 15 LEDs is standard in 670 series. Its main
purpose is to present an immediate visual information for protection indications or
alarm signals.
52
Local HMI
Alarm indication LEDs and hardware associated LEDs are located on the right
hand side of the front panel. Alarm LEDs are located on the right of the LCD
screen and show steady or flashing light.
• Steady light indicates normal operation.

• Flashing light indicates alarm.
Alarm LEDs can be configured in PCM600 and depend on the binary logic.
Therefore they can not be configured on the local HMI.
Typical examples of alarm LEDs
• Bay controller failure

• CB close blocked
• Interlocking bypassed
• Differential protection trip
• SF6 Gas refill
• Position error
• CB spring charge alarm
• Oil temperature alarm
• Thermal overload trip
The RJ45 port has a yellow LED indicating that communication has been
established between the IED and a computer.
The Local/Remote key on the front panel has two LEDs indicating whether local or
remote control of the IED is active.
3.6 Local HMI related functions
3.6.1 Introduction
The local HMI can be adapted to the application configuration and to user preferences.
• Function block LocalHMI

• Function block LEDGEN
• Setting parameters
53
Local HMI
3.6.2 General setting parameters

Table 8: SCREEN Non group settings (basic)
Language English - - English Local HMI language
OptionalLanguage
DisplayTimeout 10 - 120 Min 10 60 Local HMI display timeout
AutoRepeat Off - - On Activation of auto-repeat (On) or not (Off)
On
ContrastLevel -10 - 20 % 1 0 Contrast level for display
DefaultScreen 0-0 - 1 0 Default screen
EvListSrtOrder Latest on top - - Latest on top Sort order of event list
Oldest on top
SymbolFont IEC - - IEC Symbol font for Single Line Diagram
ANSI
3.6.3 Status indication LEDs
3.6.3.1 Design
The function block LocalHMI controls and supplies information about the status of
the status indication LEDs. The input and output signals of local HMI are
configured with PCM600.
The function block can be used if any of the signals are required in a configuration
logic.
See section "Status indication LEDs" for information about the LEDs.

LocalHMI
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD
IEC05000773 V2 EN
Figure 11: LocalHMI function block

Table 9: LocalHMI Input signals
Name Type Default Description
CLRLEDS BOOLEAN 0 Input to clear the LCD-HMI LEDs
54
Local HMI
Table 10: LocalHMI Output signals

Name Type Description
HMI-ON BOOLEAN Backlight of the LCD display is active
RED-S BOOLEAN Red LED on the LCD-HMI is steady
YELLOW-S BOOLEAN Yellow LED on the LCD-HMI is steady
YELLOW-F BOOLEAN Yellow LED on the LCD-HMI is flashing
CLRPULSE BOOLEAN A pulse is provided when the LEDs on the LCD-
HMI are cleared
LEDSCLRD BOOLEAN Active when the LEDs on the LCD-HMI are not
active
3.6.4 Indication LEDs
The function block LEDGEN controls and supplies information about the status of
the indication LEDs. The input and output signals of LEDGEN are configured with
PCM600. The input signal for each LED is selected individually with the Signal
Matrix Tool in PCM600.
• LEDs (number 1–6) for trip indications are red.

• LEDs (number 7–15) for start indications are yellow.
Each indication LED on the local HMI can be set individually to operate in six
different sequences
• Two sequences operate as follow type.

• Four sequences operate as latch type.
• Two of the latching sequence types are intended to be used as a
protection indication system, either in collecting or restarting mode, with
reset functionality.
• Two of the latching sequence types are intended to be used as signaling
system in collecting (coll) mode with an acknowledgment functionality.
The light from the LEDs can be steady (-S) or flashing (-F). See the technical
reference manual for more information.
3.6.4.2 Design
The information on the LEDs is stored at loss of the auxiliary power to the IED in
some of the modes of LEDGEN. The latest LED picture appears immediately after
the IED is successfully restarted.
Operating modes
• Collecting mode
55
Local HMI
• LEDs which are used in collecting mode of operation are accumulated

continuously until the unit is acknowledged manually. This mode is
suitable when the LEDs are used as a simplified alarm system.
• Re-starting mode
• In the re-starting mode of operation each new start resets all previous
active LEDs and activates only those which appear during one
disturbance. Only LEDs defined for re-starting mode with the latched
sequence type 6 (LatchedReset-S) will initiate a reset and a restart at a
new disturbance. A disturbance is defined to end a settable time after the
reset of the activated input signals or when the maximum time limit has
elapsed.
Acknowledgment/reset
• From local HMI
• Active indications can be acknowledged or reset manually. Manual
acknowledgment and manual reset have the same meaning and is a
common signal for all the operating sequences and LEDs. The function
is positive edge triggered, not level triggered. The acknowledged or reset
is performed via the reset button and menus on the local HMI. See the
operator's manual for more information.
• From function input

• Active indications can also be acknowledged or reset from an input,
RESET, to the function. This input can, for example, be configured to a
binary input operated from an external push button. The function is
positive edge triggered, not level triggered. This means that even if the
button is continuously pressed, the acknowledgment or reset only affects
indications active at the moment when the button is first pressed.
• Automatic reset
• Automatic reset can only be performed for indications defined for re-
starting mode with the latched sequence type 6 (LatchedReset-S). When
automatic reset of the LEDs has been performed, still persisting
indications will be indicated with a steady light.
Operating sequences
The operating sequences can be of type Follow or Latched.
• For the Follow type the LED follows the input signal completely.
• For the Latched type each LED latches to the corresponding input signal until
it is reset.
56
Local HMI
Figure 12 show the function of available sequences that are selectable for each
LED separately.
• The acknowledgment or reset function is not applicable for sequence 1 and 2

(Follow type).
• Sequence 3 and 4 (Latched type with acknowledgement) are only working in
collecting mode.
• Sequence 5 is working according to Latched type and collecting mode.
• Sequence 6 is working according to Latched type and re-starting mode.
The letters S and F in the sequence names have the meaning S = Steady and F =
Flashing.
At the activation of the input signal, the indication operates according to the
selected sequence diagrams.
In the sequence diagrams the LEDs have the characteristics as shown in figure 12.
= No indication = Steady light = Flash
en05000506.vsd
IEC05000506 V1 EN
Figure 12: Symbols used in the sequence diagrams
Sequence 1 (Follow-S)
This sequence follows all the time, with a steady light, the corresponding input
signals. It does not react on acknowledgment or reset. Every LED is independent of
the other LEDs in its operation.
Activating
signal
LED
IEC01000228_2_en.vsd
IEC01000228 V2 EN
Figure 13: Operating sequence 1 (Follow-S)
Sequence 2 (Follow-F)
This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing
instead of showing steady light.
Sequence 3 (LatchedAck-F-S)
This sequence has a latched function and works in collecting mode. Every LED is
independent of the other LEDs in its operation. At the activation of the input signal,
the indication starts flashing. After acknowledgment the indication disappears if
57
Local HMI
the signal is not present any more. If the signal is still present after
acknowledgment it gets a steady light.
Activating
signal
LED
Acknow.
en01000231.vsd
IEC01000231 V1 EN
Figure 14: Operating sequence 3 (LatchedAck-F-S)
Sequence 4 (LatchedAck-S-F)
This sequence has the same functionality as sequence 3, but steady and flashing
light have been alternated.
Sequence 5 (LatchedColl-S)
This sequence has a latched function and works in collecting mode. At the
activation of the input signal, the indication will light up with a steady light. The
difference to sequence 3 and 4 is that indications that are still activated will not be
affected by the reset that is, immediately after the positive edge of the reset has
been executed a new reading and storing of active signals is performed. Every LED
is independent of the other LEDs in its operation.
Activating
signal
LED
Reset
IEC01000235 V2 EN
Figure 15: Operating sequence 5 (LatchedColl-S)
Sequence 6 (LatchedReset-S)
In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are
automatically reset at a new disturbance when activating any input signal for other
LEDs set to sequence 6 (LatchedReset-S). Also in this case indications that are still
activated will not be affected by manual reset, that is, immediately after the
positive edge of that the manual reset has been executed a new reading and storing
58
Local HMI
of active signals is performed. LEDs set for sequence 6 are completely independent
in its operation of LEDs set for other sequences.
Definition of a disturbance
A disturbance is defined to last from the first LED set as LatchedReset-S is
activated until a settable time, tRestart, has elapsed after that all activating signals
for the LEDs set as LatchedReset-S have reset. However if all activating signals
have reset and some signal again becomes active before tRestart has elapsed, the
tRestart timer does not restart the timing sequence. A new disturbance start will be
issued first when all signals have reset after tRestart has elapsed. A diagram of this
functionality is shown in figure 16.
From
disturbance
length control ³1 New
per LED ³1 disturbance
set to
sequence 6
tRestart
& t
&
³1
³1
&
en01000237.vsd
IEC01000237 V1 EN
Figure 16: Activation of new disturbance
In order not to have a lock-up of the indications in the case of a persisting signal
each LED is provided with a timer, tMax, after which time the influence on the
definition of a disturbance of that specific LED is inhibited. This functionality is
shown i diagram in figure 17.
Activating signal
To LED
To disturbance
AND
tMax length control
t
en05000507.vsd
IEC05000507 V1 EN
Figure 17: Length control of activating signals
Timing diagram for sequence 6

Figure 18 shows the timing diagram for two indications within one disturbance.
59
Local HMI
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000239_2-en.vsd
IEC01000239 V2 EN
Figure 18: Operating sequence 6 (LatchedReset-S), two indications within

same disturbance
Figure 19 shows the timing diagram for a new indication after tRestart time has
elapsed.
Disturbance Disturbance
tRestart tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000240 V2 EN
Figure 19: Operating sequence 6 (LatchedReset-S), two different disturbances
60
Local HMI
Figure 20 shows the timing diagram when a new indication appears after the first
one has reset but before tRestart has elapsed.
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000241 V2 EN
Figure 20: Operating sequence 6 (LatchedReset-S), two indications within

same disturbance but with reset of activating signal between
Figure 21 shows the timing diagram for manual reset.
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000242 V2 EN
Figure 21: Operating sequence 6 (LatchedReset-S), manual reset
61
Local HMI

LEDGEN
BLOCK NEWIND
RESET ACK
LEDTEST
IEC05000508 V2 EN
Figure 22: LEDGEN function block

Table 11: LEDGEN Input signals
BLOCK BOOLEAN 0 Input to block the operation of the LED-unit
RESET BOOLEAN 0 Input to acknowledge/reset the indications of the
LED-unit
LEDTEST BOOLEAN 0 Input for external LED test
Table 12: LEDGEN Output signals

NEWIND BOOLEAN A new signal on any of the indication inputs occurs
ACK BOOLEAN A pulse is provided when the LEDs are
acknowledged

Table 13: LEDGEN Non group settings (basic)
Operation Off - - Off Operation mode for the LED function
On
tRestart 0.0 - 100.0 s 0.1 0.0 Defines the disturbance length
tMax 0.0 - 100.0 s 0.1 0.0 Maximum time for the definition of a
disturbance
SeqTypeLED1 Follow-S - - Follow-S Sequence type for LED 1
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
62
Local HMI

Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED8 Follow-S - - Follow-S sequence type for LED 8
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
63
Local HMI

Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Follow-F
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
64
Basic IED functions
Section 4 Basic IED functions
About this chapter

This chapter presents functions that are basic to all 670 series IEDs. Typical
functions in this category are time synchronization, self supervision and test mode.
4.1 Authorization
To safeguard the interests of our customers, both the IED and the tools that are
accessing the IED are protected, subject of authorization handling. The concept of
authorization, as it is implemented in the IED and in PCM600 is based on the
following facts:
There are two types of access points to the IED:

• local, through the local HMI
• remote, through the communication ports
4.1.1 Principle of operation

There are different levels (or types) of users that can access or operate different
areas of the IED and tools functionality. The pre-defined user types are given in
table below.
Be sure that the user logged on to the IED has the access required
when writing particular data to the IED from PCM600.
The meaning of the legends used in the table:

• R= Read
• W= Write
• - = No access rights
65
Basic IED functions
Table 14: Pre-defined user types

Access rights System Protection Design User
Guest Super User SPA Guest
Operator Engineer Engineer Administrator
Basic setting possibilities (change R R/W R R/W R/W R/W R
setting group, control settings,
limit supervision)
Advanced setting possibilities (for R R/W R R R/W R/W R
example protection settings)
Basic control possibilities (process R R/W R/W R/W R/W R/W R
control, no bypass)
Advanced control possibilities R R/W R/W R/W R/W R/W R
(process control including interlock
trigg)
Basic command handling (for R R/W R R/W R/W R/W R
example clear LEDs, manual trigg)
Advanced command handling (for R R/W R R R/W R/W R/W
example clear disturbance record)
Basic configuration possibilities (I/ R R/W R R R R/W R/W
O-configuration in SMT)
Advanced configuration R R/W R R R R/W R/W
possibilities (application
configuration including SMT, GDE
and CMT)
File loading (database loading - R/W - - - R/W R/W
from XML-file)
File dumping (database dumping - R/W - - - R/W R/W
to XML-file)
File transfer (FTP file transfer) - R/W - R/W R/W R/W R/W
File transfer (limited) (FTP file R R/W R R/W R/W R/W R/W
transfer)
File Transfer (SPA File Transfer) - R/W - - - R/W -
Database access for normal user R R/W R R/W R/W R/W R/W
User administration (user R R/W R R R R R/W
management – FTP File Transfer)
User administration (user - R/W - - - - -
management – SPA File Transfer)
The IED users can be created, deleted and edited only with the User Management
Tool (UMT) within PCM600. The user can only LogOn or LogOff on the local
HMI on the IED, there are no users, groups or functions that can be defined on
local HMI.
Only characters A - Z, a - z and 0 - 9 should be used in user names

and passwords.
66
Basic IED functions
At least one user must be included in the UserAdministrator group

to be able to write users, created in PCM600, to IED.
4.1.1.1 Authorization handling in the IED
At delivery the default user is the SuperUser. No Log on is required to operate the
IED until a user has been created with the User Management Tool.
Once a user is created and downloaded to the IED, that user can perform a Log on,
introducing the password assigned in the tool.
If there is no user created, an attempt to log on will display a message box: “No
user defined!”
If one user leaves the IED without logging off, then after the timeout (set in Main
menu/Settings/General Settings/HMI/Screen/Display Timeout) elapses, the IED
returns to Guest state, when only reading is possible. The display time out is set to
60 minutes at delivery.
If there are one or more users created with the User Management Tool and
downloaded into the IED, then, when a user intentionally attempts a Log on or
when the user attempts to perform an operation that is password protected, the Log
on window will appear.
The cursor is focused on the User identity field, so upon pressing the “E” key, the
user can change the user name, by browsing the list of users, with the “up” and
“down” arrows. After choosing the right user name, the user must press the “E”
key again. When it comes to password, upon pressing the “E” key, the following
character will show up: “$”. The user must scroll for every letter in the password.
After all the letters are introduced (passwords are case sensitive) choose OK and
press the “E” key again.
If everything is alright at a voluntary Log on, the local HMI returns to the
Authorization screen. If the Log on is OK, when required to change for example a
password protected setting, the local HMI returns to the actual setting folder. If the
Log on has failed, then the Log on window opens again, until either the user makes
it right or presses “Cancel”.
4.2 Self supervision with internal event list
4.2.1 Introduction
Self supervision with internal event list function listens and reacts to internal
system events, generated by the different built-in self-supervision elements. The
internal events are saved in an internal event list.
67
Basic IED functions

The self-supervision operates continuously and includes:
• Normal micro-processor watchdog function.

• Checking of digitized measuring signals.
• Other alarms, for example hardware and time synchronization.
The self-supervision function status can be monitored from the local HMI, from the
Event Viewer in PCM600 or from a SMS/SCS system.
Under the Diagnostics menu in the local HMI the present information from the self-
supervision function can be reviewed. The information can be found under Main
menu/Diagnostics/Internal events or Main menu/Diagnostics/IED status/
General. The information from the self-supervision function is also available in the
Event Viewer in PCM600.
A self-supervision summary can be obtained by means of the potential free alarm

contact (INTERNAL FAIL) located on the power supply module. The function of
this output relay is an OR-function between the INT-FAIL signal see figure 24 and
a couple of more severe faults that can occur in the IED, see figure 23
IEC04000520 V1 EN
Figure 23: Hardware self-supervision, potential-free alarm contact
68
Basic IED functions
IO fail
OR Set e.g. BIM 1 Error
IO stopped
Reset
IO started
e.g. IOM2 Error OR
e.g. IO (n) Error Internal
OR FAIL
LON ERROR
FTF fatal error

OR
Watchdog NUMFAIL
RTE fatal error
Internal
Set WARN
RTE Appl-fail
OR
RTE OK Reset
IEC61850 not ready NUMWARNING

OR
RTCERROR Set RTCERROR
RTC OK Reset
TIMESYNCHERROR
OR TIMESYNCHERROR
Time reset Set
SYNCH OK Reset
SETCHGD
Settings changed
1 second pulse
en04000519-1.vsd
IEC04000519 V2 EN
Figure 24: Software self-supervision, IES (IntErrorSign) function block
Some signals are available from the INTERRSIG function block. The signals from
this function block are sent as events to the station level of the control system. The
signals from the INTERRSIG function block can also be connected to binary
outputs for signalization via output relays or they can be used as conditions for
other functions if required/desired.
Individual error signals from I/O modules can be obtained from respective module
in the Signal Matrix tool. Error signals from time synchronization can be obtained
from the time synchronization block TIME.
4.2.2.1 Internal signals
Self supervision provides several status signals, that tells about the condition of the
IED. As they provide information about the internal status of the IED, they are also
called internal signals. The internal signals can be divided into two groups.
• Standard signals are always presented in the IED, see table 15.
• Hardware dependent internal signals are collected depending on the hardware
configuration, see table 16.
Explanations of internal signals are listed in table 17.
69
Basic IED functions
Table 15: Self-supervision's standard internal signals

Name of signal Description
FAIL Internal Fail status
WARNING Internal Warning status
NUMFAIL CPU module Fail status
NUMWARNING CPU module Warning status
RTCERROR Real Time Clock status
TIMESYNCHERROR Time Synchronization status
RTEERROR Runtime Execution Error status
IEC61850ERROR IEC 61850 Error status
WATCHDOG SW Watchdog Error status
LMDERROR LON/Mip Device Error status
APPERROR Runtime Application Error status
SETCHGD Settings changed
SETGRPCHGD Setting groups changed
FTFERROR Fault Tolerant Filesystem status
Table 16: Self-supervision's hardware dependent internal signals

Card Name of signal Description
PSM PSM-Error Power Supply Module Error status
ADOne ADOne-Error Analog In Module Error status
BIM BIM-Error Binary In Module Error status
BOM BOM-Error Binary Out Module Error status
IOM IOM-Error In/Out Module Error status
MIM MIM-Error Millampere Input Module Error status
LDCM LDCM-Error Line Differential Communication Error status
Table 17: Explanations of internal signals

Name of signal Reasons for activation
FAIL This signal will be active if one or more of the following internal
signals are active; NUMFAIL, LMDERROR, WATCHDOG,
APPERROR, RTEERROR, FTFERROR, or any of the HW
dependent signals
WARNING This signal will be active if one or more of the following internal
signals are active; RTCERROR, IEC61850ERROR,
TIMESYNCHERROR
NUMFAIL This signal will be active if one or more of the following internal
signals are active; WATCHDOG, APPERROR, RTEERROR,
FTFERROR
NUMWARNING This signal will be active if one or more of the following internal
signals are active; RTCERROR, IEC61850ERROR
RTCERROR This signal will be active when there is a hardware error with the
real time clock.
70
Basic IED functions
Name of signal Reasons for activation

TIMESYNCHERROR This signal will be active when the source of the time
synchronization is lost, or when the time system has to make a
time reset.
RTEERROR This signal will be active if the Runtime Engine failed to do some
actions with the application threads. The actions can be loading
of settings or parameters for components, changing of setting
groups, loading or unloading of application threads.
IEC61850ERROR This signal will be active if the IEC 61850 stack did not succeed
in some actions like reading IEC 61850 configuration, startup,
for example
WATCHDOG This signal will be activated when the terminal has been under
too heavy load for at least 5 minutes. The operating systems
background task is used for the measurements.
LMDERROR LON network interface, MIP/DPS, is in an unrecoverable error
state.
APPERROR This signal will be active if one or more of the application threads
are not in the state that Runtime Engine expects. The states can
be CREATED, INITIALIZED, RUNNING, for example
SETCHGD This signal will generate an Internal Event to the Internal Event
list if any settings are changed.
SETGRPCHGD This signal will generate an Internal Event to the Internal Event
list if any setting groups are changed.
FTFERROR This signal will be active if both the working file and the backup
file are corrupted and can not be recovered.
4.2.2.2 Run-time model
The analog signals to the A/D converter is internally distributed into two different
converters, one with low amplification and one with high amplification, see figure
25.
ADx
Adx_Low
x1
u1
x2
Adx
Adx_High Controller
x1
u1
x2
en05000296-2-en.vsd
IEC05000296 V2 EN
Figure 25: Simplified drawing of A/D converter for the IED.
71
Basic IED functions
The technique to split the analog input signal into two A/D converters with
different amplification makes it possible to supervise the incoming signals under
normal conditions where the signals from the two converters should be identical.
An alarm is given if the signals are out of the boundaries. Another benefit is that it
improves the dynamic performance of the A/D conversion.
The self-supervision of the A/D conversion is controlled by the ADx_Controller

function. One of the tasks for the controller is to perform a validation of the input
signals. This is done in a validation filter which has mainly two objects: First is the
validation part that checks that the A/D conversion seems to work as expected.
Secondly, the filter chooses which of the two signals that shall be sent to the CPU,
that is the signal that has the most suitable level, the ADx_LO or the 16 times
higherADx_HI.
When the signal is within measurable limits on both channels, a direct comparison
of the two channels can be performed. If the validation fails, the CPU will be
informed and an alarm will be given.
The ADx_Controller also supervise other parts of the A/D converter.
4.2.3 Function block
IEC09000787 V1 EN
Figure 26: INTERRSIG function block
4.2.4 Output signals

Table 18: INTERRSIG Output signals
FAIL BOOLEAN Internal fail
WARNING BOOLEAN Internal warning
CPUFAIL BOOLEAN CPU fail
CPUWARN BOOLEAN CPU warning
4.2.5 Setting parameters

The function does not have any parameters available in the local HMI or PCM600.
72
Basic IED functions
4.2.6 Technical data

Table 19: Self supervision with internal event list
Data Value
Recording manner Continuous, event controlled
List size 1000 events, first in-first out
4.3 Time synchronization
4.3.1 Introduction
Use the time synchronization source selector to select a common source of absolute
time for the IED when it is a part of a protection system. This makes comparison of
events and disturbance data between all IEDs in a station automation system
possible. A common source shall be used for IED and merging unit when IEC
61850-9-2LE process bus communication is used.
Micro SCADA OPC server should not be used as a time

synchronization source.
4.3.2.1 General concepts
Time definitions
The error of a clock is the difference between the actual time of the clock, and the
time the clock is intended to have. The rate accuracy of a clock is normally called
the clock accuracy and means how much the error increases, that is how much the
clock gains or loses time. A disciplined (trained) clock knows its own faults and
tries to compensate for them.
Design of the time system (clock synchronization)

The time system is based on a software clock, which can be adjusted from external
time sources and a hardware clock. The protection and control modules will be
timed from a hardware clock, which runs independently from the software clock.
See figure 27.
73
Basic IED functions
External
Synchronization
sources Time tagging and general synchronisation
Off
Comm- Protection
LON Events
Time- unication and control
SPA Regulator functions
Min. pulse
(Setting,
GPS see
SW-time
technical
SNTP
reference
DNP manual) Connected when GPS-time is
IRIG-B used for differential protection
PPS
Synchronization for differential protection

(ECHO-mode or GPS)
Off Time-
GPS Regulator HW-time
(fast or slow)
IRIG-B
PPS Diff.-
A/D Trans-
converter comm- ducers*
unication
*IEC 61850-9-2
IEC08000287 V2 EN
Figure 27: Design of time system (clock synchronization)
All time tagging is performed by the software clock. When for example a status
signal is changed in the protection system with the function based on free running
hardware clock, the event is time tagged by the software clock when it reaches the
event recorder. Thus the hardware clock can run independently.
The echo mode for the differential protection is based on the hardware clock. Thus,
there is no need to synchronize the hardware clock and the software clock.
The synchronization of the hardware clock and the software clock is necessary only
when GPS or IRIG B 00X with optical fibre, IEEE 1344 is used for differential
protection. The two clock systems are synchronized by a special clock
synchronization unit with two modes, fast and slow. A special feature, an
automatic fast clock time regulator is used. The automatic fast mode makes the
synchronization time as short as possible during start-up or at interruptions/
disturbances in the GPS timing. The setting fast or slow is also available on the
local HMI.
If a GPS clock is used for other 670 series IEDs than line differential RED670, the
hardware and software clocks are not synchronized
74
Basic IED functions
Fast clock synchronization mode

At startup and after interruptions in the GPS or IRIG B time signal, the clock
deviation between the GPS time and the internal differential time system can be
substantial. A new startup is also required after for example maintenance of the
auxiliary voltage system.
When the time difference is >16us, the differential function is blocked and the time
regulator for the hardware clock is automatically using a fast mode to synchronize
the clock systems. The time adjustment is made with an exponential function, i.e.
big time adjustment steps in the beginning, then smaller steps until a time deviation
between the GPS time and the differential time system of >16us has been reached.
Then the differential function is enabled and the synchronization remains in fast
mode or switches to slow mode, depending on the setting.
Slow clock synchronization mode

During normal service, a setting with slow synchronization mode is normally used,
which prevents the hardware clock to make too big time steps, >16µs, emanating
from the differential protection requirement of correct timing.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical
structure. A function is synchronized from a higher level and provides
synchronization to lower levels.
Synchronization from
a higher level
Function
Optional synchronization of
modules at a lower level
IEC09000342 V1 EN
Figure 28: Synchronization principle
A function is said to be synchronized when it periodically receives synchronization

messages from a higher level. As the level decreases, the accuracy of the
synchronization decreases as well. A function can have several potential sources of
synchronization, with different maximum errors, which give the function the
possibility to choose the source with the best quality, and to adjust its internal clock
after this source. The maximum error of a clock can be defined as:
75
Basic IED functions
• The maximum error of the last used synchronization message

• The time since the last used synchronization message
• The rate accuracy of the internal clock in the function.
4.3.2.2 Real-time clock (RTC) operation
The IED has a built-in real-time clock (RTC) with a resolution of one second. The
clock has a built-in calendar that handles leap years through 2038.
Real-time clock at power off

During power off, the system time in the IED is kept by a capacitor-backed real-
time clock that will provide 35 ppm accuracy for 5 days. This means that if the
power is off, the time in the IED may drift with 3 seconds per day, during 5 days,
and after this time the time will be lost completely.
Real-time clock at startup
Time synchronization startup procedure

The first message that contains the full time (as for instance LON, SNTP and GPS)
gives an accurate time to the IED. After the initial setting of the clock, one of three
things happens with each of the coming synchronization messages configured as
“fine”:
• If the synchronization message, which is similar to the other messages, has an

offset compared to the internal time in the IED, the message is used directly
for synchronization, that is, for adjusting the internal clock to obtain zero
offset at the next coming time message.
• If the synchronization message has an offset that is large compared to the other
messages, a spike-filter in the IED removes this time-message.
• If the synchronization message has an offset that is large, and the following
message also has a large offset, the spike filter does not act and the offset in
the synchronization message is compared to a threshold that defaults to 100
milliseconds. If the offset is more than the threshold, the IED is brought into a
safe state and the clock is set to the correct time. If the offset is lower than the
threshold, the clock is adjusted with 1000 ppm until the offset is removed.
With an adjustment of 1000 ppm, it takes 100 seconds or 1.7 minutes to
remove an offset of 100 milliseconds.
Synchronization messages configured as coarse are only used for initial setting of
the time. After this has been done, the messages are checked against the internal
time and only an offset of more than 10 seconds resets the time.
Rate accuracy
In the IED, the rate accuracy at cold start is 100 ppm but if the IED is synchronized
for a while, the rate accuracy is approximately 1 ppm if the surrounding
temperature is constant. Normally, it takes 20 minutes to reach full accuracy.
76
Basic IED functions
Time-out on synchronization sources

All synchronization interfaces has a time-out and a configured interface must
receive time-messages regularly in order not to give an error signal (TSYNCERR).
Normally, the time-out is set so that one message can be lost without getting a
TSYNCERR, but if more than one message is lost, a TSYNCERR is given.
4.3.2.3 Synchronization alternatives
Three main alternatives of external time synchronization are available. Either the
synchronization message is applied via any of the communication ports of the IED
as a telegram message including date and time or as a minute pulse, connected to a
binary input, or via GPS. The minute pulse is used to fine tune already existing
time in the IEDs.
Synchronization via SNTP

SNTP provides a ping-pong method of synchronization. A message is sent from an
IED to an SNTP server, and the SNTP server returns the message after filling in a
reception time and a transmission time. SNTP operates via the normal Ethernet
network that connects IEDs together in an IEC 61850 network. For SNTP to
operate properly, there must be an SNTP-server present, preferably in the same
station. The SNTP synchronization provides an accuracy that gives 1 ms accuracy
for binary inputs. The IED itself can be set as an SNTP-time server.
SNTP server requirements

The SNTP server to be used is connected to the local network, that is not more than
4-5 switches or routers away from the IED. The SNTP server is dedicated for its
task, or at least equipped with a real-time operating system, that is not a PC with
SNTP server software. The SNTP server should be stable, that is, either
synchronized from a stable source like GPS, or local without synchronization.
Using a local SNTP server without synchronization as primary or secondary server
in a redundant configuration is not recommended.
Synchronization via Serial Communication Module (SLM)

On the serial buses (both LON and SPA) two types of synchronization messages
are sent.
• Coarse message is sent every minute and comprises complete date and time,
that is, year, month, day, hours, minutes, seconds and milliseconds.
• Fine message is sent every second and comprises only seconds and milliseconds.
IEC60870-5-103 is not used to synchronize the IED, but instead the offset between
the local time in the IED and the time received from 103 is added to all times (in
events and so on) sent via 103. In this way the IED acts as it is synchronized from
various 103 sessions at the same time. Actually, there is a “local” time for each 103
session.
The SLM module is located on the AD conversion Module (ADM).
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Basic IED functions
Synchronization via Built-in-GPS

The built in GPS clock modules receives and decodes time information from the
global positioning system. The modules are located on the GPS time
synchronization Module (GSM).
Synchronization via binary input

The IED accepts minute pulses to a binary input. These minute pulses can be
generated from, for example station master clock. If the station master clock is not
synchronized from a world wide source, time will be a relative time valid for the
substation. Both positive and negative edge on the signal can be accepted. This
signal is also considered as a fine time synchronization signal.
The minute pulse is connected to any channel on any Binary Input Module in the
IED. The electrical characteristic is thereby the same as for any other binary input.
If the objective of synchronization is to achieve a relative time within the

substation and if no station master clock with minute pulse output is available, a
simple minute pulse generator can be designed and used for synchronization of the
IEDs. The minute pulse generator can be created using the logical elements and
timers available in the IED.
The definition of a minute pulse is that it occurs one minute after the last pulse. As
only the flanks are detected, the flank of the minute pulse shall occur one minute
after the last flank.
Binary minute pulses are checked with reference to frequency.
Pulse data:
• Period time (a) should be 60 seconds.

• Pulse length (b):
• Minimum pulse length should be >50 ms.
• Maximum pulse length is optional.
• Amplitude (c) - please refer to section "Binary input module (BIM)".
Deviations in the period time larger than 50 ms will cause TSYNCERR.
78
Basic IED functions
en05000251.vsd
IEC05000251 V1 EN
Figure 29: Binary minute pulses
The default time-out-time for a minute pulse is two minutes, and if no valid minute
pulse is received within two minutes a SYNCERR will be given.
If contact bounces occurs, only the first pulse will be detected as a minute pulse.
The next minute pulse will be registered first 60 s - 50 ms after the last contact bounce.
If the minute pulses are perfect, for example, it is exactly 60 seconds between the
pulses, contact bounces might occur 49 ms after the actual minute pulse without
effecting the system. If contact bounces occurs more than 50 ms, for example, it is
less than 59950 ms between the two most adjacent positive (or negative) flanks, the
minute pulse will not be accepted.
Binary synchronization example

An IED is configured to use only binary input, and a valid binary input is applied
to a binary input card. The HMI is used to tell the IED the approximate time and
the minute pulse is used to synchronize the IED thereafter. The definition of a
minute pulse is that it occurs one minute after the previous minute pulse, so the
first minute pulse is not used at all. The second minute pulse will probably be
rejected due to the spike filter. The third pulse will give the IED a good time and
will reset the time so that the fourth minute pulse will occur on a minute border.
After the first three minutes, the time in the IED will be good if the coarse time is
set properly via the HMI or the RTC backup still keeps the time since last up-time.
If the minute pulse is removed for instance for an hour, the internal time will drift
by maximum the error rate in the internal clock. If the minute pulse is returned, the
first pulse automatically is rejected. The second pulse will possibly be rejected due
to the spike filter. The third pulse will either synchronize the time, if the time offset
is more than 100 ms, or adjust the time, if the time offset is small enough. If the
time is set, the application will be brought to a safe state before the time is set. If
the time is adjusted, the time will reach its destination within 1.7 minutes.
Synchronization via IRIG-B

The DNP3 communication can be the source for the course time synchronization,
while the fine time synchronization needs a source with higher accuracy.
79
Basic IED functions
IRIG-B is a protocol used only for time synchronization. A clock can provide local
time of the year in this format. The “B” in IRIG-B states that 100 bits per second
are transmitted, and the message is sent every second. After IRIG-B there numbers
stating if and how the signal is modulated and the information transmitted.
To receive IRIG-B there are two connectors in the IRIG-B module, one galvanic
BNC connector and one optical ST connector. IRIG-B 12x messages can be
supplied via the galvanic interface, and IRIG-B 00x messages can be supplied via
either the galvanic interface or the optical interface, where x (in 00x or 12x) means
a number in the range of 1-7.
“00” means that a base band is used, and the information can be fed into the IRIG-
B module via the BNC contact or an optical fiber. “12” means that a 1 kHz
modulation is used. In this case the information must go into the module via the
BNC connector.
If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains

information of the year. If x is 0, 1, 2 or 3, the information contains only the time
within the year, and year information has to come from PCM600 or local HMI.
The IRIG-B module also takes care of IEEE1344 messages that are sent by IRIG-B
clocks, as IRIG-B previously did not have any year information. IEEE1344 is
compatible with IRIG-B and contains year information and information of the time-
zone.
It is recommended to use IEEE 1344 for supplying time information to the IRIG-B
module. In this case, send also the local time in the messages, as this local time
plus the TZ Offset supplied in the message equals UTC at all times.
4.3.2.4 Process bus IEC 61850-9-2LE synchronization
For the time synchronization of the process bus communication (IEC 61850-9-2LE
protocol) an optical PPS or IRIG-B signal can be used. This signal should emanate
from either an external GPS clock, or from the merging unit.
An optical PPS signal can be supplied to the optical interface of the IRIG-B module.

TIMEERR
TSYNCERR
RTCERR
IEC05000425 V2 EN
Figure 30: TIMEERR function block
80
Basic IED functions

Table 20: TIMEERR Output signals
TSYNCERR BOOLEAN Time synchronization error
RTCERR BOOLEAN Real time clock error

Path in the local HMI is located under Main menu/Setting/Time
Path in PCM600 is located under Main menu/Settings/Time/Synchronization
Table 21: TIMESYNCHGEN Non group settings (basic)

CoarseSyncSrc Off - - Off Coarse time synchronization source
SPA
LON
SNTP
DNP
FineSyncSource Off - - Off Fine time synchronization source
SPA
LON
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
IRIG-B
GPS+IRIG-B
PPS
SyncMaster Off - - Off Activate IEDas synchronization master
SNTP-Server
TimeAdjustRate Slow - - Slow Adjust rate for time synchronization
Fast
Table 22: SYNCHBIN Non group settings (basic)

ModulePosition 3 - 16 - 1 3 Hardware position of IO module for time
synchronization
BinaryInput 1 - 16 - 1 1 Binary input number for time
synchronization
BinDetection PositiveEdge - - PositiveEdge Positive or negative edge detection
NegativeEdge
81
Basic IED functions
Table 23: SYNCHSNTP Non group settings (basic)

ServerIP-Add 0 - 18 IP 1 0.0.0.0 Server IP-address
Address
RedServIP-Add 0 - 18 IP 1 0.0.0.0 Redundant server IP-address
Address
Table 24: DSTBEGIN Non group settings (basic)

MonthInYear January - - March Month in year when daylight time starts
February
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - - Sunday Day in week when daylight time starts
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - - Last Week in month when daylight time starts
First
Second
Third
Fourth
UTCTimeOfDay 0 - 86400 s 1 3600 UTC Time of day in seconds when
daylight time starts
82
Basic IED functions
Table 25: DSTEND Non group settings (basic)

MonthInYear January - - October Month in year when daylight time ends
February
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - - Sunday Day in week when daylight time ends
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - - Last Week in month when daylight time ends
First
Second
Third
Fourth
UTCTimeOfDay 0 - 86400 s 1 3600 UTC Time of day in seconds when
daylight time ends
Table 26: TIMEZONE Non group settings (basic)

NoHalfHourUTC -24 - 24 - 1 0 Number of half-hours from UTC
Table 27: SYNCHIRIG-B Non group settings (basic)

SynchType BNC - - Opto Type of synchronization
Opto
TimeDomain LocalTime - - LocalTime Time domain
UTC
Encoding IRIG-B - - IRIG-B Type of encoding
1344
1344TZ
TimeZoneAs1344 MinusTZ - - PlusTZ Time zone as in 1344 standard
PlusTZ
83
Basic IED functions

Table 28: Time synchronization, time tagging
Function Value
Time tagging resolution, events and sampled measurement values 1 ms
Time tagging error with synchronization once/min (minute pulse ± 1.0 ms typically
synchronization), events and sampled measurement values
Time tagging error with SNTP synchronization, sampled ± 1.0 ms typically
measurement values
4.4 Parameter setting groups
4.4.1 Introduction
Use the six sets of settings to optimize IED operation for different system
conditions. By creating and switching between fine tuned setting sets, either from
the local HMI or configurable binary inputs, results in a highly adaptable IED that
can cope with a variety of system scenarios.

Parameter setting groups ActiveGroup function has six functional inputs, each
corresponding to one of the setting groups stored in the IED. Activation of any of
these inputs changes the active setting group. Seven functional output signals are
available for configuration purposes, so that up to date information on the active
setting group is always available.
A setting group is selected by using the local HMI, from a front connected personal
computer, remotely from the station control or station monitoring system or by
activating the corresponding input to the ActiveGroup function block.
Each input of the function block can be configured to connect to any of the binary
inputs in the IED. To do this PCM600 must be used.
The external control signals are used for activating a suitable setting group when
adaptive functionality is necessary. Input signals that should activate setting groups
must be either permanent or a pulse exceeding 400 ms.
More than one input may be activated at the same time. In such cases the lower
order setting group has priority. This means that if for example both group four and
group two are set to activate, group two will be the one activated.
Every time the active group is changed, the output signal SETCHGD is sending a
pulse.
The parameter MAXSETGR defines the maximum number of setting groups in use
to switch between.
84
Basic IED functions
ACTIVATE GROUP 6
ACTIVATE GROUP 5
ACTIVATE GROUP 4
ACTIVATE GROUP 3
ACTIVATE GROUP 2
+RL2 ACTIVATE GROUP 1
IOx-Bly1 ActiveGroup
Æ ACTGRP1 GRP1
IOx-Bly2
Æ ACTGRP2 GRP2
IOx-Bly3
Æ ACTGRP3 GRP3
IOx-Bly4
Æ ACTGRP4 GRP4
IOx-Bly5
Æ ACTGRP5 GRP5
IOx-Bly6 ACTGRP6
Æ GRP6
SETCHGD
en05000119.vsd
IEC05000119 V2 EN
Figure 31: Connection of the function to external circuits
The above example also includes seven output signals, for confirmation of which
group that is active.
SETGRPS function block has an input where the number of setting groups used is
defined. Switching can only be done within that number of groups. The number of
setting groups selected to be used will be filtered so only the setting groups used
will be shown on the Parameter Setting Tool.

ActiveGroup
ACTGRP1 GRP1
ACTGRP2 GRP2
ACTGRP3 GRP3
ACTGRP4 GRP4
ACTGRP5 GRP5
ACTGRP6 GRP6
SETCHGD
IEC05000433 V2 EN
Figure 32: ActiveGroup function block
SETGRPS
MAXSETGR
IEC05000716 V2 EN
Figure 33: SETGRPS function block
85
Basic IED functions
4.4.4 Input and output signals

Table 29: ActiveGroup Input signals
ACTGRP1 BOOLEAN 0 Selects setting group 1 as active
Table 30: ActiveGroup Output signals

GRP1 BOOLEAN Setting group 1 is active
SETCHGD BOOLEAN Pulse when setting changed

Table 31: ActiveGroup Non group settings (basic)
t 0.0 - 10.0 s 0.1 1.0 Pulse length of pulse when setting
changed
Table 32: SETGRPS Non group settings (basic)

ActiveSetGrp SettingGroup1 - - SettingGroup1 ActiveSettingGroup
SettingGroup2
SettingGroup3
SettingGroup4
SettingGroup5
SettingGroup6
MAXSETGR 1-6 No 1 1 Max number of setting groups 1-6
4.5 ChangeLock function CHNGLCK
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Basic IED functions
4.5.1 Introduction
Change lock function (CHNGLCK) is used to block further changes to the IED
configuration and settings once the commissioning is complete. The purpose is to
block inadvertent IED configuration changes beyond a certain point in time.

The Change lock function (CHNGLCK) is configured using ACT.
The function, when activated, will still allow the following changes of the IED
state that does not involve reconfiguring of the IED:
• Monitoring
• Reading events
• Resetting events
• Reading disturbance data
• Clear disturbances
• Reset LEDs
• Reset counters and other runtime component states
• Control operations
• Set system time
• Enter and exit from test mode
• Change of active setting group
The binary input signal LOCK controlling the function is defined in ACT or SMT:
Binary input Function
1 Activated
0 Deactivated

CHNGLCK
LOCK
IEC09000946 V1 EN
Figure 34: CHNGLCK function block

Table 33: CHNGLCK Input signals
LOCK BOOLEAN 0 Parameter change lock
87
Basic IED functions

Table 34: CHNGLCK Non group settings (basic)
Operation LockHMI and Com - - LockHMI and Com Operation mode of change lock
LockHMI,
EnableCom
EnableHMI,
LockCom
4.6 Test mode functionality TEST
4.6.1 Introduction
When the Test mode functionality TESTMODE function is activated, protection
functions in the IED are automatically blocked. It is then possible to unblock the
protection functions individually from the local HMI or the Parameter Setting tool
to perform required tests.
When leaving TESTMODE, all blockings are removed and the IED resumes
normal operation. However, if during TESTMODE operation, power is removed
and later restored, the IED will remain in TESTMODE with the same protection
functions blocked or unblocked as before the power was removed. All testing will
be done with actually set and configured values within the IED. No settings will be
changed, thus mistakes are avoided.

Put the IED into test mode to test functions in the IED. Set the IED in test mode by
• configuration, activating the input signal of the function block TESTMODE.

• setting TestMode to On in the local HMI, under Main menu/TEST/IED test
mode.
While the IED is in test mode, the ACTIVE output of the function block
TESTMODE is activated. The other outputs of the function block TESTMODE
shows the generator of the “Test mode: On” state — input from configuration
(OUTPUT output is activated) or setting from local HMI (SETTING output is
activated).
While the IED is in test mode, the yellow START LED will flash and all functions
are blocked. Any function can be unblocked individually regarding functionality
and event signalling.
Most of the functions in the IED can individually be blocked by means of settings
from the local HMI. To enable these blockings the IED must be set in test mode
(output ACTIVE is activated), see example in figure 35. When leaving the test
88
Basic IED functions
mode, that is entering normal mode, these blockings are disabled and everything is
set to normal operation. All testing will be done with actually set and configured
values within the IED. No settings will be changed, thus no mistakes are possible.
The blocked functions will still be blocked next time entering the test mode, if the
blockings were not reset.
The blocking of a function concerns all output signals from the actual function, so
no outputs will be activated.
When a binary input is used to set the IED in test mode and a
parameter, that requires restart of the application, is changed, the
IED will re-enter test mode and all functions will be blocked, also
functions that were unblocked before the change. During the re-
entering to test mode, all functions will be temporarily unblocked
for a short time, which might lead to unwanted operations. This is
only valid if the IED is put in TEST mode by a binary input, not by
local HMI.
The TESTMODE function block might be used to automatically block functions

when a test handle is inserted in a test switch. A contact in the test switch (RTXP24
contact 29-30) can supply a binary input which in turn is configured to the
TESTMODE function block.
Each of the protection functions includes the blocking from the TESTMODE
function block. A typical example from the undervoltage function is shown in
figure 35.
The functions can also be blocked from sending events over IEC 61850 station bus
to prevent filling station and SCADA databases with test events, for example
during a maintenance test.
89
Basic IED functions
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
IEC05000466 V1 EN
Figure 35: Example of blocking the time delayed undervoltage protection

function.

TESTMODE
INPUT ACTIVE
OUTPUT
SETTING
NOEVENT
IEC09000219-1.vsd
IEC09000219 V1 EN
Figure 36: TESTMODE function block

Table 35: TESTMODE Input signals
INPUT BOOLEAN 0 Sets terminal in test mode when active
90
Basic IED functions
Table 36: TESTMODE Output signals

ACTIVE BOOLEAN Terminal in test mode when active
OUTPUT BOOLEAN Test input is active
SETTING BOOLEAN Test mode setting is (On) or not (Off)
NOEVENT BOOLEAN Event disabled during testmode

Table 37: TESTMODE Non group settings (basic)
TestMode Off - - Off Test mode in operation (On) or not (Off)
On
EventDisable Off - - Off Event disable during testmode
On
CmdTestBit Off - - Off Command bit for test required or not
On during testmode
4.7 IED identifiers
4.7.1 Introduction
IED identifiers (TERMINALID) function allows the user to identify the individual
IED in the system, not only in the substation, but in a whole region or a country.
Use only characters A-Z, a-z and 0-9 in station, object and unit names.

Table 38: TERMINALID Non group settings (basic)
StationName 0 - 18 - 1 Station name Station name
StationNumber 0 - 99999 - 1 0 Station number
ObjectName 0 - 18 - 1 Object name Object name
ObjectNumber 0 - 99999 - 1 0 Object number
UnitName 0 - 18 - 1 Unit name Unit name
UnitNumber 0 - 99999 - 1 0 Unit number
91
Basic IED functions
4.8 Product information
4.8.1 Introduction
The Product identifiers function identifies the IED. The function has seven pre-set,
settings that are unchangeable but nevertheless very important:
• IEDProdType
• ProductDef
• FirmwareVer
• SerialNo
• OrderingNo
• ProductionDate
The settings are visible on the local HMI , under Main menu/Diagnostics/IED
status/Product identifiers
They are very helpful in case of support process (such as repair or maintenance).

4.8.3 Application
4.8.3.1 Factory defined settings
The factory defined settings are very useful for identifying a specific version and
very helpful in the case of maintenance, repair, interchanging IEDs between
different Substation Automation Systems and upgrading. The factory made settings
can not be changed by the customer. They can only be viewed. The settings are
found in the local HMI under Main menu/Diagnostics/IED status/Product
identifiers
The following identifiers are available:
• IEDProdType
• Describes the type of the IED (like REL, REC or RET). Example: REL670
• ProductDef
• Describes the release number, from the production. Example: 1.1.r01
• FirmwareVer
• Describes the firmware version. Example: 1.4.51
• Firmware versions numbers are “running” independently from the
release production numbers. For every release numbers (like 1.4.51)
92
Basic IED functions
there can be one or more firmware versions, depending on the small

issues corrected in between releases.
• IEDMainFunType
• Main function type code according to IEC 60870-5-103. Example: 128
(meaning line protection).
• SerialNo
• OrderingNo
• ProductionDate
4.9 Signal matrix for binary inputs SMBI
4.9.1 Introduction
The Signal matrix for binary inputs (SMBI) function is used within the Application
Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT),
see the application manual to get information about how binary inputs are brought
in for one IED configuration.

The Signal matrix for binary inputs (SMBI) function , see figure 37, receives its
inputs from the real (hardware) binary inputs via the Signal Matrix Tool (SMT),
and makes them available to the rest of the configuration via its outputs, BI1 to
BI10. The inputs and outputs, as well as the whole block, can be given a user
defined name. These names will be represented in SMT as information which
signals shall be connected between physical IO and SMBI function. The input/
output user defined name will also appear on the respective output/input signal.

SMBI
^VIN1 ^BI1
^VIN2 ^BI2
^VIN3 ^BI3
^VIN4 ^BI4
^VIN5 ^BI5
^VIN6 ^BI6
^VIN7 ^BI7
^VIN8 ^BI8
^VIN9 ^BI9
^VIN10 ^BI10
IEC05000434 V2 EN
Figure 37: SMBI function block
93
Basic IED functions

Table 39: SMBI Input signals
VIn1 BOOLEAN 0 SMT Connect input
Table 40: SMBI Output signals

BI1 BOOLEAN Binary input 1
4.10 Signal matrix for binary outputs SMBO
4.10.1 Introduction
The Signal matrix for binary outputs (SMBO) function is used within the
Application Configuration Tool (ACT) in direct relation with the Signal Matrix
Tool (SMT), see the application manual to get information about how binary inputs
are sent from one IED configuration.
94
Basic IED functions

The Signal matrix for binary outputs (SMBO) function , see figure 38, receives
logical signal from the IED configuration, which is transferring to the real
(hardware) outputs, via the Signal Matrix Tool (SMT). The inputs in SMBO are
BO1 to BO10 and they, as well as the whole function block, can be tag-named. The
name tags will appear in SMT as information which signals shall be connected
between physical IO and the SMBO.

SMBO
BO1 ^BO1
BO2 ^BO2
BO3 ^BO3
BO4 ^BO4
BO5 ^BO5
BO6 ^BO6
BO7 ^BO7
BO8 ^BO8
BO9 ^BO9
BO10 ^BO10
IEC05000439 V2 EN
Figure 38: SMBO function block

Table 41: SMBO Input signals
BO1 BOOLEAN 1 Signal name for BO1 in Signal Matrix Tool
4.11 Signal matrix for mA inputs SMMI
95
Basic IED functions
4.11.1 Introduction
The Signal matrix for mA inputs (SMMI) function is used within the Application
Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT),
see the application manual to get information about how milliamp (mA) inputs are
brought in for one IED configuration.

The Signal matrix for mA inputs (SMMI) function, see figure 39, receives its
inputs from the real (hardware) mA inputs via the Signal Matrix Tool (SMT), and
makes them available to the rest of the configuration via its analog outputs, named
AI1 to AI6. The inputs, as well as the whole block, can be tag-named. These tags
will be represented in SMT.
The outputs on SMMI are normally connected to the IEC61850 generic

communication I/O functions (MVGGIO) function for further use of the mA signals.

SMMI
^VIN1 AI1
^VIN2 AI2
^VIN3 AI3
^VIN4 AI4
^VIN5 AI5
^VIN6 AI6
IEC05000440 V2 EN
Figure 39: SMMI function block

Table 42: SMMI Input signals
VIn1 REAL 0 SMT connected milliampere input
96
Basic IED functions
Table 43: SMMI Output signals

AI1 REAL Analog milliampere input 1
4.12 Signal matrix for analog inputs SMAI
4.12.1 Introduction
Signal matrix for analog inputs function SMAI (or the pre-processing function) is
used within PCM600 in direct relation with the Signal Matrix tool or the
Application Configuration tool. Signal Matrix tool represents the way analog
inputs are brought in for one IED configuration.

Every Signal matrix for analog inputs function (SMAI) can receive four analog
signals (three phases and one neutral value), either voltage or current, see figure 41
and figure 42. SMAI outputs give information about every aspect of the 3ph analog
signals acquired (phase angle, RMS value, frequency and frequency derivates etc. –
244 values in total). The BLOCK input will reset all outputs to 0.
The output signal AI1 to AI4 are direct output of the, in SMT, connected input to
GRPxL1, GRPxL2, GRPxL3 and GRPxN, x=1-12. AIN is always the neutral
current, calculated residual sum or the signal connected to GRPxN. Note that
function block will always calculate the residual sum of current/voltage if the input
is not connected in SMT. Applications with a few exceptions shall always be
connected to AI3P.
4.12.3 Frequency values

The frequency functions includes a functionality based on level of positive
sequence voltage, IntBlockLevel, to validate if the frequency measurement is valid
or not. If positive sequence voltage is lower than IntBlockLevel the function is
blocked. IntBlockLevel, is set in % of UBase/√3
If SMAI setting ConnectionType is Ph-Ph at least two of the inputs GRPxL1,

GRPxL2 and GRPxL3 must be connected in order to calculate positive sequence
voltage. If SMAI setting ConnectionType is Ph-N, all three inputs GRPxL1,
97
Basic IED functions
GRPxL2 and GRPxL3 must be connected in order to calculate positive sequence

voltage.
If only one phase-phase voltage is available and SMAI setting ConnectionType is

Ph-Ph the user is advised to connect two (not three) of the inputs GRPxL1,
GRPxL2 and GRPxL3 to the same voltage input as shown in figure 40 to make
SMAI calculating a positive sequence voltage (that is input voltage/√3).
IEC10000060 V1 EN
Figure 40: Connection example
The above described scenario does not work if SMAI setting

ConnectionType is Ph-N. If only one phase-earth voltage is
available, the same type of connection can be used but the SMAI
ConnectionType setting must still be Ph-Ph and this has to be
accounted for when setting IntBlockLevel. If SMAI setting
ConnectionType is Ph-N and the same voltage is connected to all
three SMAI inputs, the positive sequence voltage will be zero and
the frequency functions will not work properly.
The outputs from the above configured SMAI block shall only be
used for Overfrequency protection (SAPTOF), Underfrequency
protection (SAPTUF) and Rate-of-change frequency protection
(SAPFRC) due to that all other information except frequency and
positive sequence voltage might be wrongly calculated.

SMAI1
BLOCK SPFCOUT
DFTSPFC AI3P
^GRP1L1 AI1
^GRP1L2 AI2
^GRP1L3 AI3
^GRP1N AI4
TYPE AIN
IEC05000705 V2 EN
Figure 41: SMAI1 function block
98
Basic IED functions
SMAI2
BLOCK AI3P
^GRP2L1 AI1
^GRP2L2 AI2
^GRP2L3 AI3
^GRP2N AI4
TYPE AIN
IEC07000130 V2 EN
Figure 42: SMAI2 function block

Table 44: SMAI1 Input signals
BLOCK BOOLEAN 0 Block group 1
DFTSPFC REAL 20.0 Number of samples per fundamental cycle used
for DFT calculation
GRP1L1 STRING - Sample input to be used for group 1 phase L1
calculations
calculations
calculations
GRP1N STRING - Sample input to be used for group 1 residual
calculations
Table 45: SMAI1 Output signals

SPFCOUT REAL Number of samples per fundamental cycle from
internal DFT reference function
AI3P GROUP SIGNAL Group 1 analog input 3-phase group
AI1 GROUP SIGNAL Group 1 analog input 1
AIN GROUP SIGNAL Group 1 analog input residual for disturbance
recorder
99
Basic IED functions
Table 46: SMAI2 Input signals

BLOCK BOOLEAN 0 Block group 2
calculations
calculations
calculations
GRP2N STRING - Sample input to be used for group 2 residual
calculations
Table 47: SMAI2 Output signals

AI3P GROUP SIGNAL Group 2 analog input 3-phase group
AIN GROUP SIGNAL Group 2 analog input residual for disturbance
recorder
Settings DFTRefExtOut and DFTReference shall be set to default

value InternalDFTRef if no VT inputs are available. Internal
nominal frequency DFT reference is then the reference.
100
Basic IED functions
Table 48: SMAI1 Non group settings (basic)

DFTRefExtOut InternalDFTRef - - InternalDFTRef DFT reference for external output
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
DFTReference InternalDFTRef - - InternalDFTRef DFT reference
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - - Ph-N Input connection type
Ph-Ph
TYPE 1-2 Ch 1 1 1=Voltage, 2=Current
Table 49: SMAI1 Non group settings (advanced)

Negation Off - - Off Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 % 1 10 Limit for frequency calculation in % of
UBase
UBase 0.05 - 2000.00 kV 0.05 400.00 Base voltage
101
Basic IED functions
Table 50: SMAI2 Non group settings (basic)

AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - - Ph-N Input connection type
Ph-Ph
TYPE 1-2 Ch 1 1 1=Voltage, 2=Current
Table 51: SMAI2 Non group settings (advanced)

Negation Off - - Off Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 % 1 10 Limit for frequency calculation in % of
UBase
4.13 Summation block 3 phase 3PHSUM
4.13.1 Introduction
Summation block 3 phase function 3PHSUM is used to get the sum of two sets of
three-phase analog signals (of the same type) for those IED functions that might
need it.

Summation block 3 phase 3PHSUM receives the three-phase signals from Signal
matrix for analog inputs function (SMAI). In the same way, the BLOCK input will
reset all the outputs of the function to 0.
102
Basic IED functions

3PHSUM
BLOCK AI3P
DFTSPFC AI1
G1AI3P* AI2
G2AI3P* AI3
AI4
IEC05000441 V2 EN
Figure 43: 3PHSUM function block

Table 52: 3PHSUM Input signals
BLOCK BOOLEAN 0 Block
DFTSPFC REAL 0 Number of samples per fundamental cycle used
for DFT calculation
G1AI3P GROUP - Group 1 analog input 3-phase group
SIGNAL
G2AI3P GROUP - Group 2 analog input 3-phase group
SIGNAL
Table 53: 3PHSUM Output signals

AI3P GROUP SIGNAL Group analog input 3-phase group
AI1 GROUP SIGNAL Group 1 analog input
Settings DFTRefExtOut and DFTReference shall be set to default

value InternalDFTRef if no VT inputs are available.
Table 54: 3PHSUM Non group settings (basic)

SummationType Group1+Group2 - - Group1+Group2 Summation type
Group1-Group2
Group2-Group1
-(Group1+Group2)
AdDFTRefCh1
External DFT ref
103
Basic IED functions
Table 55: 3PHSUM Non group settings (advanced)

FreqMeasMinVal 5 - 200 % 1 10 Amplitude limit for frequency calculation
in % of Ubase
4.14 Authority status ATHSTAT
4.14.1 Introduction
Authority status (ATHSTAT) function is an indication function block for user log
on activity.

Authority status (ATHSTAT) function informs about two events related to the IED
and the user authorization:
• the fact that at least one user has tried to log on wrongly into the IED and it
was blocked (the output USRBLKED)
• the fact that at least one user is logged on (the output LOGGEDON)
Whenever one of the two events occurs, the corresponding output (USRBLKED or
LOGGEDON) is activated. The output can for example, be connected on Event
(EVENT) function block for LON/SPA.The signals are also available on IEC
61850 station bus.

ATHSTAT
USRBLKED
LOGGEDON
IEC06000503 V2 EN
Figure 44: ATHSTAT function block

Table 56: ATHSTAT Output signals
USRBLKED BOOLEAN At least one user is blocked by invalid password
LOGGEDON BOOLEAN At least one user is logged on
104
Basic IED functions

105
106
Differential protection
Section 5 Differential protection
About this chapter

This chapter describes the measuring principles, functions and parameters used in
differential protection.
5.1 Line differential protection
Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Line differential protection, 3 CT sets, 3Id/I>

L3CPDIF 87L
2-3 line ends
SYMBOL-HH V1 EN
Line differential protection, 6 CT sets, 3Id/I>

L6CPDIF 87L
3-5 line ends
SYMBOL-HH V1 EN
Line differential protection 3 CT sets, 3Id/I>

LT3CPDIF 87LT
with in-zone transformers, 2-3 line ends
SYMBOL-HH V1 EN
Line differential protection 6 CT sets, 3Id/I>

LT6CPDIF 87LT
with in-zone transformers, 3-5 line ends
SYMBOL-HH V1 EN
Line differential logic LDLPDIF - 87L
5.1.1 Introduction
5.1.1.1 Line differential protection, 3 or 6 CT sets L3CPDIF, L6CPDIF
Line differential protection applies the Kirchhoff's law and compares the currents
entering and leaving the protected multi-terminal circuit, consisting of overhead
107
power lines, power transformers and cables. It offers phase-segregated true current
differential protection with high sensitivity and provides phase selection
information for single-pole tripping.
The three terminal version is used for conventional two-terminal lines with or
without 1 1/2 circuit breaker arrangement in one end, as well as three terminal lines
with single breaker arrangements at all terminals.
Protected zone
IED Comm. Channel IED
IEC05000039 V2 EN
Figure 45: Example of application on a conventional two-terminal line
The six terminal versions are used for conventional two-terminal lines with 1 1/2
circuit breaker arrangements in both ends, as well as multi terminal lines with up to
five terminals.
Protected zone
Comm. Channel Comm. Channel

IED
IEC05000040 V2 EN
Figure 46: Example of application on a three-terminal line with 1 1/2 breaker

arrangements
The current differential algorithm provides high sensitivity for internal faults, at the
same time as it has excellent stability for external faults. Current samples from all
CTs are exchanged between the IEDs in the line ends (master-master mode) or sent
to one IED (master-slave mode) for evaluation.
A restrained dual biased slope evaluation is made where the bias current is the
highest phase current in any line end giving a secure through fault stability even
with heavily saturated CTs. In addition to the restrained evaluation, an unrestrained
high differential current setting can be used for fast tripping of internal faults with
very high currents.
A special feature with this function is that applications with small power
transformers (rated current less than 50 % of the differential current setting)
connected as line taps (that is, as "shunt" power transformers), without
measurements of currents in the tap, can be handled. The normal load current is
108
here considered to be negligible, and special measures need only to be taken in the
event of a short circuit on the LV side of the transformer. In this application, the
tripping of the differential protection can be time delayed for low differential
currents to achieve coordination with down stream over current IEDs.
A line charging current compensation provides increased sensitivity of Line

differential protection.
5.1.1.2 Line differential protection 3 or 6 CT sets, with in-zone transformers

LT3CPDIF, LT6CPDIF
Two two-winding power transformers, or one three-winding power transformer,

can be included in the line differential protection zone. Both two- and three-
winding transformers are correctly represented with vector group compensations
made in the algorithm. The function includes 2nd and 5th harmonic restraint and zero-
sequence current elimination.
Protected zone
Comm. Channel Comm. Channel
IED
IEC05000042 V2 EN
Figure 47: Example of application on a three-terminal line with a power

transformer in the protection zone
5.1.1.3 Analog signal transfer for line differential protection
The line differential communication can be arranged as a master-master system or

a master-slave system alternatively. In the former, current samples are exchanged
between all IEDs, and an evaluation is made in each IED. This means that a 64 kbit/
s communication channel is needed between every IED included in the same line
differential protection zone. In the latter, current samples are sent from all slave
IEDs to one master IED where the evaluation is made, and trip signals are sent to
the remote ends when needed. In this system, a 64 kbit/s communication channel is
only needed between the master, and each one of the slave IEDs.
109
Protected zone
IED IED
Comm.
Channels
IED IED IED
IEC0500043_2_en.vsd
IEC05000043 V2 EN
Figure 48: Five terminal lines with master-master system
Protected zone
RED RED
670 670
Comm.
Channels
RED RED RED

670 670 670
en05000044.vsd
IEC05000044 V1 EN
Figure 49: Five terminal line with master-slave system
Current samples from IEDs located geographically apart from each other, must be
time coordinated so that the current differential algorithm can be executed
correctly. In IED, it is possible to make this coordination in two different ways.
The echo method of time synchronizing is normally used whereas for applications
where transmit and receive times can differ, the optional built in GPS receivers can
be used.
The communication link is continuously monitored, and an automatic switchover

to a standby link is possible after a preset time.
5.1.2.1 Algorithm and logic
In Line differential protection function, measured current values from local and
remote line ends are evaluated in order to distinguish between internal or external
faults, or undisturbed conditions.
The local currents are fed to the IED via the Analog Input Modules and thereafter
they pass the Analog to Digital Converter, as shown in figure 50.
110
Local end Remote end
Remote end IED
LDCM
Local end IED
Current
samples from
local end
Analog Input A/D
Module Converter Current
Pre-processing
samples from
Block
remote end
LDCM
Line Diffferential Function
CH1IL1RE [magnitude] Trip by unrestrained differential protection
Trip commands
CH1IL1IM Calculation of Differential ³1 TRIP
CH1IL2RE fundamental and bias currents
Start L1
CH1IL2IM frequency Magnitudes of applied to
differential differential operate / bias -, Start L2
currents Output logic: TRL1
currents (3x) and unrestrained Start L3 TRL2
Currents from
all ends as & bias current characteristics TRL3
Bias current St L1 low sens - 2nd harmonic block
phasors TRIPRES
- 5th harmonic block
St L2 low sens TRIPUNRE
CH1IL1SM St L3 low sens TRIPENHA
- Cross block logic
CH1IL2SM Calculation
CH1IL3SM of [samples] 2nd h. block
- Enhanced trip for START
CH2IL1SM instantaneous internal faults STL1
differential Harmonic STL2
Instantaneous analysis - Decreased STL3
currents
Curr. samples 5th h. block sensitivity for
differential
Information
from all ends (3x) ( 2nd and 5th)
currents external faults BLK2H
(samples) BLK2HL1
- BLK2HL2
CH1INSRE Conditional trip for BLK2HL3
CH1INSIM Calculation simultaneous external
of and internal faults BLK5H
CH1INSRE High sensitive Internal fault
negative-- BLK5HL1
CH1INSIM Two to six internal/external fault BLK5HL2
sequence contributions discriminator BLK5HL3
External fault -
differential to neg. seq. Conditional extra time
Neg. seq. current differential delay for trip signals
currents from current as INTFAULT
(1x)
all ends phasors EXTFAULT
as phasors
IEC05000294 V2 EN
Figure 50: The principle for the line differential protection
The remote currents are received to the IED as samples via a communication link.
When entering the IED, they are processed in the Line Differential Communication
Module (LDCM) where they are time coordinated with the local current samples,
and interpolated in order to be comparable with the local samples.
111
In the Pre-Processing Block, the real and imaginary parts of the fundamental
frequency phase currents and negative sequence currents are derived. Together
with the current samples, they are then forwarded to the differential function block
where three different analyses are carried out.
The first analysis is the classical differential and bias current evaluation with the
characteristic as seen in figure 51. Line differential protection is phase segregated
where the differential current is the vectorial sum of all measured currents taken
separately for each phase. The bias current, on the other hand, is considered as the
greatest phase current in any line end and it is common for all three phases. The
two slopes (SlopeSection1, SlopeSection2) and breakpoints (EndSection1,
EndSection2) can be set in PCM600 or via the local HMI.
Current values plotted above the characteristic formed by IdMin and the dual slope
will give a start in that phase. The level IdMinHigh is a setting value that is used to
temporarily decrease the sensitivity in situations when:
• the line is energized

• when a fault is classified as external
• when a tap transformer is switched in
There is also an unrestrained high differential current setting that can be used for
fast tripping of internal faults with very high currents.
112
Operate current
[ in pu of IBase]
Operate
5
unconditionally
UnrestrainedLimit
4
Operate IdMinHigh
3 C
conditionally
A B
2
Section 1 Section 2 Section 3
SlopeSection3
1
IdMin
SlopeSection2 Restrain
0
0 1 2 3 4 5
EndSection1 Restrain current

EndSection2 [ in pu of IBase]
en05000300.vsd
IEC05000300 V1 EN
Figure 51: Description of the restrained-, and the unrestrained operate

characteristics
where:
slope = D Ioperate × 100%

D Irestrain
EQUATION1246 V1 EN
and where the restrained characteristic is defined

by the settings:
1. IdMin
2. EndSection1
3. EndSection2
SlopeSection2
4.
5. SlopeSection3
The second analysis is the 2nd and 5th harmonic analysis on the differential current.
Occurrence of these harmonics over a level that is set separately for each one will
block tripping action from the biased slope evaluation.
113
The third analysis is the negative sequence current analysis. Effectively this is a
fault discriminator that distinguishes between internal and external faults. It works
such that the phase angle of the negative sequence current from the local end is
compared with the phase angle of the sum of the negative sequence currents from
the remote ends. The characteristic for this fault discriminator is shown in
figure 52, where the directional characteristic is defined by the two setting
parameters IminNegSeq and NegSeqRoa.
90 deg
120 deg
If one or the Internal/external
other of fault boundary
currents is too
low, then no
measurement NegSeqROA
is done, and
(Relay
120 degrees
Operate
is mapped Angle)
180 deg 0 deg
IMinNegSeq
External Internal
fault fault
region region
270 deg
en05000188.vsd
IEC05000188 V1 EN
Figure 52: Operating characteristic of the internal/external fault discriminator
Reference direction of currents is considered to be towards the line. Thus, when

both currents to be compared have this direction, the phase difference between
them will ideally be zero. In the opposite case, when one current is entering and the
other is leaving the protected object, the phase difference will ideally be 180
degree. In case either the local or the sum of the remote negative sequence currents
or both is below the set level, the fault discriminator will not make any fault
classification and the value 120 degree is set. This value is then an indication that
negative sequence directional comparison has not been possible to make, and it
does not mean classification as external fault.
When a fault is classified as internal by the negative sequence fault discriminator, a

trip is issued under the condition that the dual slope restrained function has started ,
while a classification as external fault results in an increase of the restrained
characteristic trip values IdMinHigh.
114
With reference to figure 50, the outputs from the three analysis blocks are fed to
the output logic. Figure 53 shows a simplified block diagram of this output logic
where only trip commands and no alarm signals are shown for simplicity.
Trip unrestrained L1
TRIP
Trip unrestrained L2 OR
Trip unrestrained L3
Start L1 TRL1
AND OR
Start L2 OR AND
OR
Start L3 TRL2
AND OR
OR AND
OR
OR TRL3
AND
St L1 IdMinHigh OR AND
OR
St L2 IdMinHigh
St L3 IdMinHigh
Internal fault
AND
NegSeqDiffEn
tIdMinHigh
AND t
External fault
OR
Line energizing
Diff curr L1 2nd harm AND

OR OR
Diff curr L2 2nd harm
Diff curr L3 2nd harm AND
OR OR
Diff curr L1 5th harm
th
Diff curr L2 5 harm AND
OR OR
Diff curr L3 5th harm
OR
AND
CrossBlockEn
IEC05000295 V2 EN
Figure 53: Simplified block diagram
Remembering that current values plotted above the characteristic formed by IdMin
and the dual slope in figure 52 are said to give a start, the output logic can be
summarized as follows:
• A start in one phase, gives a trip under the condition that the content of 2nd and
5th harmonic is below the set level for these harmonics. Otherwise it is blocked
115
as long as the harmonic is above the set level. However, when a line is
energized the current setting value IdMinHigh is used. Effectively this means
that the line A-B-C in figure 51 forms the characteristic.
• Current values above the unrestrained limit gives a trip irrespective of any
presence of harmonics.
• Classification of a fault as internal by the negative sequence fault
discriminator, will give a trip under the condition that a start has occurred in
that phase. This means that any harmonic blocking is then overridden.
However, occurrence of harmonics at the same time as the differential current
is below the level IdMinHigh, will block a trip even though the fault is
classified as internal. This latter condition is to prevent unwanted trips when
energizing a line tap transformer.
• Classification of a fault as external by the negative sequence fault
discriminator will cause IdMinHigh to be used as the lower limit for the
restrained characteristic according to figure 51. Cross blocking will also be
activated in this situation.
Compensation for charging currents can be selected active or not by setting

ChargCurEnableYes or No. The compensation works such that the fundamental
frequency differential current that is measured under steady state undisturbed
conditions, is identified and then subtracted making the resulting differential
current zero (or close to zero). This action is made separately for each phase. The
magnitude of the subtracted pre-fault currents in Amperes can be read at any time
as the service value ICHARGE.
Values of the pre-fault differential currents are not updated under disturbance
conditions. The updating process is resumed 50 ms after normal conditions have
been restored. Normal conditions are only considered if there are no start signals,
neither internal nor external fault is declared, the power system is symmetrical and
so on.
It is thus obvious that the change in charging current that the fault causes by
decreasing the system voltage is not considered in the algorithm, a matter that is
further discussed in the application manual.
Note that all small pre-fault differential currents are subtracted, no matter what
their origin. Besides the true charging currents, the following currents are eliminated:
• Small differential currents due to small errors (inequalities) of current

transformers.
• Small differential currents because of off-nominal load tap changer positions
when a power transformer is included in the protected zone.
• Load currents of tap loads included in the protected zone.
5.1.2.2 Time synchronization
In a numerical line differential protection, current samples from protections located

geographically apart from each other, must be time coordinated so that the currents
116
from the different line ends can be compared without introducing irrelevant errors.
Accuracy requirements on this time coordination are extremely high.
As an example, an inaccuracy of 0.1 ms in a 50 Hz system gives a maximum

amplitude error approximately around 3% whilst an inaccuracy of 1 ms gives a
maximum amplitude error of approximately 31%. The corresponding figures for a
60 Hz system are 4% and 38% respectively.
In Line differential protection, the time coordination is made with the so-called
echo method, which can be complemented with GPS synchronization as an option.
Each IED has an accurate local clock with a very small time drift. This clock
makes time tagging of telegrams, and the echo method is then used to find out the
time difference between the clocks in two ends of a power line.
Referring to figure 54, it works such that the transmission time to send a message
from station B to station A (T1 → T2) and receive a message from A to B (T3 →
T4) is measured. The time instances T2 and T3 are taken with the local clock
reference of station A, and the time instances T1 and T4 are taken with the local
clock reference of station B.
T2 T3
A
B
T1 T4
en05000293.vsd
IEC05000293 V1 EN
Figure 54: Measuring time differences
Calculation of the delay time one-way Td and the time difference Δt between the
clocks in A and B is then possible to do with equation 2 and equation 3, which are
only valid under the condition that the send and receive times are equal.
(T2 - T1 ) + (T4 - T3 )
Td =
2
EQUATION1358 V1 EN (Equation 2)
(T1 + T4 ) - (T2 + T3 )
Dt =
2
Δt is calculated every time a telegram is received, and the time difference is then
used to adjust and interpolate the current measurements from the remote end before
the current differential algorithm is executed.
117
The echo method without GPS, can be used in telecommunications transmission

networks with varying signal propagation delay as long as there is delay symmetry,
that is, the send and receive delays are equal. The delay variation can depend on
the signal going different routes in the network from time to other.
When the delay symmetry is lost, the expression for Δt given above is no longer
valid, and GPS synchronization of the local IED clocks must be used.
Including the optional GPS, means that there will be one GPS receiver module in
each IED, synchronizing its local IED clock. As GPS synchronization is very
accurate, in the order of 1 μs, all IEDs in the same line differential scheme will
have the same clock reference. It is then possible to detect asymmetric transmission
time delay and compensate for it.
When the IED is equipped with GPS, this hardware is integrated in the IED.
Besides the GPS receiver itself, it also consists of filters and regulators for post
processing of the GPS time synch pulse, which is necessary to achieve a reliable
GPS synchronization. Especially short interruptions and spurious out of synch GPS
signals are handled securely in this way.
When GPS synchronization is used, an interruption in the GPS signal leads to

freewheeling during 8 seconds that is, during this time the synchronization benefits
from the stability in the local clocks. If the interruption persists more than 8
seconds, either fall back to the echo synchronization method or blocking of Line
differential protection function is made, as selected through setting parameter
GPSSyncErr.
For a description of the time synchronization function, refer to section "Time

synchronization".
5.1.2.3 Analog signal communication for line differential protection
Communication principle
For a two-terminal line, the current from the local CT needs to be communicated
over a 64 kbit/s channel to the remote line end, and the remote end current
communicated back on the same channel. If there is, for example, a three terminal
line another 64 kbit/s channel will be needed to exchange the same local current
with the third line end current.
In one-and-a-half breaker arrangements, there are two local currents meaning two
64 kbit/s channels to each remote substation. Alternatively, it is possible to add
together the two local currents before sending them and in that way reduce the
number of communication channels needed. This is achieved by selecting proper
setting for parameter TransmCurr (CT-SUM, CT-DIFF1 or CT-DIFF2). However,
information about bias currents is reduced if the alternative option is followed. For
further information and discussions on this matter, refer to the Application manual.
The communication can be arranged as a master-master system or a master-slave

system alternatively. Figure 55 shows a master-master system for a five-terminal
line. Here current samples are exchanged between all IEDs, and an evaluation is
118
made in each IED. This means that a 64 kbit/s communication channel is needed
between every IED included in the same line differential protection zone.
Protected zone
IED IED
Comm. Channels
IED IED IED
IEC05000292 V2 EN
Figure 55: 5–terminal line with master-master system
In the master-slave system, current samples are sent from all slave IEDs to one
master IED where the evaluation is made and trip signals are sent to the remote
ends when needed. In this system, a 64 kbit/s communication channel is only
needed between the master, and each one of the slave IEDs, as shown in figure 56.
Protected zone
IED IED
Comm. Channels
IED IED IED
IEC05000291 V2 EN
Figure 56: 5–terminal line with master-slave system
The master-slave configuration is achieved by setting parameter Operation in the

slaves to Off for Line differential protection function, and setting parameter
ChannelMode to On for the LDCMs in the slaves.
Test mode
Line differential protection function in one IED can be set in test mode. This can
block the trip outputs on that IED, and set the remote IEDs in a remote test mode,
so that injected currents can be echoed back phase shifted and with a settable
amplitude. The trip outputs in the remote IEDs can also be blocked automatically.
For further information, refer to the installation and commissioning manual.
Communication of current sampled values

The currents are sampled twenty times per power system cycle in the protection
terminals, but the communication exchange is made only once every 5 ms. This
119
means that at in each telegram sent, 5 consecutive current samples in a 50 Hz

system and 6 consecutive current samples in a 60 Hz system (three phases each
sampling instant) are included. Figure 57 shows the principle.
Current Current Current Current Current Current Current Current

sample sample sample sample sample sample sample sample
telegram telegram telegram telegram telegram telegram telegram telegram
sent sent sent sent sent sent sent sent
Time
0 5 10 15 20 25 30 35 (ms)
en05000290.vsd
IEC05000290 V1 EN
Figure 57: Communication of current sampled values.
where:
x is the current sampling moment
Redundant communication channels

With redundant communication channels, as shown in figure 58, both channels are
in operation continuously but with one of them favoured as a primary channel.
Telecom. Network
LD LD
CM CM
LD LD
CM CM
Telecom. Network
Primary
channel
Secondary redundant
channel en05000289.vsd
IEC05000289 V1 EN
Figure 58: Direct fibre optical connection between two IEDs with LDOM over
longer distances.
If communication is lost on the primary channel, switchover to the secondary

channel is made after a settable time delay RedChSwTime. Return of the primary
channel will cause a switchback after another settable time delay RedChRturnTime.
For a three-, four- or five-terminals line in a master-master configuration, a loss of

one communication channel will not cause the line differential protection to be
120
unserviceable. Instead it will automatically revert to a partial master-slave mode

with the two IEDs that have an unserviceable communication link between them,
will serve as slaves.
For more details about the remote communication see section "Remote
communication" and the application manual.
5.1.2.4 Open CT detection feature
Line differential protection has a built-in, advanced open CT detection feature.
The open CT circuit condition creates unexpected operations for Line differential
protection under the normal load conditions. It is also possible to damage
secondary equipment due to high voltage produced from open CT circuit outputs.
Therefore, it is always a requirement from security and reliability points of view to
have open CT detection function to block Line differential protection function in
case of open CT conditions and at the same time, produce the alarm signal to the
operational personal to make quick remedy actions to correct the open CT condition.
The built-in open CT feature can be enabled or disabled by a setting parameter

OpenCTEnable (Off/On). When enabled, this feature prevents mal-operation when
a loaded main CT connected to Line differential protection is by mistake open
circuited on the secondary side. Note that this feature can only detect interruption
of one CT phase current at the time. If two or even all three-phase currents of one
set of CT are accidentally interrupted at the same time this feature cannot operate
and Line differential protection generates trip signal, if the false differential current
is sufficiently high. To ensure blocking of the differential protection for open CT
condition this algorithm must operate within 10 ms in order to be able to prevent
unwanted operation of Line differential protection under all loading conditions.
The principle applied to detect an open CT is a simple pattern recognition method,

similar to the waveform check which has been with advantage used by the Power
Transformer Differential Protection in order to detect the magnetizing inrush
condition. The open CT detection principle is based on the fact, that for an open
CT, the current in the phase with the open CT suddenly drops (at least
theoretically) to zero (that is, as seen by the protection), while the currents of the
other two phases continue as before.
The open CT function is supposed to detect an open CT under normal conditions,

that is, with the protected multi-terminal circuit under normal load. If the load
currents are very low or zero, the open CT condition cannot be detected. The open
CT algorithm only detects an open CT if the load on the power transformer is from
10% to 110% of the rated load. Outside this range an open CT condition is not
even looked for. The search for an open CT starts after 60 seconds (50 seconds in
60 Hz systems) since the bias current enters the 10–110% range. The Open CT
detection feature can also be explicitly deactivated by setting: OpenCTEnable = 0
(Off).
If an open CT is detected and the output OPENCT set to 1, then all the differential
functions are blocked, except of the unrestrained (instantaneous) differential. An
121
alarm signal is also produced after a settable delay (tOCTAlarmDelay) to report to

operational personal for quick remedy actions once the open CT is detected. When
the open CT condition is removed (that is, the previously open CT reconnected),
the functions remain blocked for a specified interval of time, which is also a setting
(tOCTResetDelay). The task of this measure is to prevent an eventual mal-
operation after the reconnection of the previously open CT secondary circuit.
The open CT feature works only during normal loading condition. Thus, the open
CT feature must be automatically disabled for all external faults, big overloads and
inrush conditions.
The open CT algorithm provides detailed information about the location of the
defective CT secondary circuit. The algorithm clearly indicates IED side, CT input
and phase in which open CT condition has been detected. These indications are
provided via the following outputs from Line differential protection function:
1. Output OPENCT provides instant information to indicate that open CT circuit

has been detected
2. Output OPENCTAL provides time delayed alarm that the open CT circuit has
been detected. Time delay is defined by setting parameter tOCTAlarmDelay.
3. Integer output OPENCTIN provides information on the local HMI regarding
which open CT circuit has been detected (1=CT input No 1; 2=CT input No 2)
4. Integer output OPENCTPH provides information on the local HMI regarding
in which phase open CT circuit has been detected (1=Phase L1; 2= Phase L2;
3= Phase L3)
Once the open CT condition is declared, the algorithm stops to search for further
open CT circuits. It waits until the first open CT circuit has been corrected. Note
that once the open CT condition has been detected, it can be automatically reset
within the differential function. It is not possible to externally reset open CT
condition. To reset the open CT circuit alarm automatically, the following
conditions must be fulfilled:
• Bias current is for at least one minute smaller than 110%

• Open CT condition in defective CT circuit has been rectified (for example,
current asymmetry disappears)
• Above two conditions are fulfilled for longer time than defined by the setting
parameter tOCTResetDelay
After the reset, the open CT detection algorithm starts again to search for any other
open CT circuit within the protected zone.
5.1.2.5 Binary signal transfer
There is space for eight binary signals integrated in the telegram of the line
differential analog communication. For further information, refer to section
"Binary signal transfer".
122
5.1.2.6 Line differential coordination function LDLPDIF
Line differential coordination function (LDLPDIF) is a support function to Line

differential protection functions L3CPDIF, L6CPDIF , LT3CPDIF and LT6CPDIF.
The function gathers and coordinates local IED signals and the signals from remote
IEDs between the Line differential protection functions and the LDCM
communication module.
The function acts as the interface to and from Line differential protection.

L3CPDIF
I3P1* TRIP
I3P2* TRL1
I3P3* TRL2
TRL3
TRIPRES
TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
ALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
IEC06000252 V2 EN
Figure 59: L3CPDIF function block
123
L6CPDIF
I3P1* TRIP
I3P2* TRL1
I3P3* TRL2
I3P4* TRL3
I3P5* TRIPRES
I3P6* TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
ALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
IEC06000253 V2 EN
Figure 60: L6CPDIF function block
LT3CPDIF
I3P1* TRIP
I3P2* TRL1
I3P3* TRL2
TRL3
TRIPRES
TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
ALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
IEC06000254 V2 EN
Figure 61: LT3CPDIF function block
124
LT6CPDIF
I3P1* TRIP
I3P2* TRL1
I3P3* TRL2
I3P4* TRL3
I3P5* TRIPRES
I3P6* TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
ALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
IEC06000255 V2 EN
Figure 62: LT6CPDIF function block
LDLPDIF
CTFAIL TRIP
OUTSERV TRL1
BLOCK TRL2
TRL3
TRLOCAL
TRLOCL1
TRLOCL2
TRLOCL3
TRREMOTE
DIFLBLKD
IEC05000394 V3 EN
Figure 63: LDLPDIF function block

Table 57: L3CPDIF Input signals
I3P1 GROUP - Three phase current grp1 samples and DFT values
SIGNAL
SIGNAL
SIGNAL
125
Table 58: L3CPDIF Output signals

TRIP BOOLEAN Common, main, trip output signal
TRL1 BOOLEAN Trip signal from phase L1
TRIPRES BOOLEAN Trip by restrained differential protection
TRIPUNRE BOOLEAN Trip by unrestrained differential protection
TRIPENHA BOOLEAN Trip by enhanced restrained differential protection
START BOOLEAN Common, main, start output signal
STL1 BOOLEAN Start signal from phase L1
BLK2H BOOLEAN Common block signal, due to 2nd harmonic
BLK2HL1 BOOLEAN Block signal due to 2nd harmonic, phase L1
BLK5H BOOLEAN Common block signal, due to 5-th harmonic
BLK5HL1 BOOLEAN Block signal due to 5th harmonic, phase L1
OPENCT BOOLEAN An open CT was detected
ALARM BOOLEAN Alarm for sustained differential current
OPENCTAL BOOLEAN Open CT Alarm output signal. Issued after a
delay ...
IDL1 REAL Instantaneous differential current, phase L1
IDL1MAG REAL Magnitude of fund. freq. differential current,
phase L1
phase L2
phase L3
IBIAS REAL Magnitude of the bias current, common for L1,
L2, L3
IDNSMAG REAL Magnitude of the negative sequence differential
current
126
Table 59: L6CPDIF Input signals

SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
Table 60: L6CPDIF Output signals

delay ...
127

phase L1
phase L2
phase L3
L2, L3
current
Table 61: LT3CPDIF Input signals

SIGNAL
SIGNAL
SIGNAL
Table 62: LT3CPDIF Output signals

128

delay ...
phase L1
phase L2
phase L3
L2, L3
current
Table 63: LT6CPDIF Input signals

SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
Table 64: LT6CPDIF Output signals

129

delay ...
phase L1
phase L2
phase L3
L2, L3
current
Table 65: LDLPDIF Input signals

CTFAIL BOOLEAN 0 CT failure indication from local CT supervision
OUTSERV BOOLEAN 0 Input for indicating that the terminal is out of service
BLOCK BOOLEAN 0 Block of function
Table 66: LDLPDIF Output signals

TRIP BOOLEAN General trip from differential protection system
130

TRLOCAL BOOLEAN Trip from local differential function
TRLOCL1 BOOLEAN Trip from local differential function in phase L1
TRREMOTE BOOLEAN Trip from remote differential function
DIFLBLKD BOOLEAN Local line differential function blocked

Table 67: L3CPDIF Group settings (basic)
Operation Off - - Off Operation Off / On
On
IdMin 0.20 - 2.00 IB 0.01 0.30 Oper - restr charact., section 1
sensitivity, multiple IBase
IdMinHigh 0.20 - 10.00 IB 0.01 0.80 Initial lower sensitivity, as multiple of
IBase
tIdMinHigh 0.000 - 60.000 s 0.001 1.000 Time interval of initial lower sensitivity, in
sec
IdUnre 1.00 - 50.00 IB 0.01 10.00 Unrestrained differential current limit,
multiple of IBase
NegSeqDiffEn Off - - On Off/On selection for internal / external
On fault discriminator
NegSeqROA 30.0 - 120.0 Deg 1.0 60.0 Internal/external fault discriminator
Operate Angle, degrees
IMinNegSeq 0.01 - 0.20 IB 0.01 0.04 Min. value of neg. seq. curr. as multiple
of IBase
CrossBlockEn No - - No Off/On selection of the cross -block logic
Yes
ChargCurEnable Off - - Off Off/On selection for compensation of
On charging currents
AddDelay Off - - Off Off/On selection for delayed diff. trip
On command
IMaxAddDelay 0.20 - 5.00 IB 0.01 1.00 Below limit, extra delay can be applied,
multiple of IBase
tDefTime 0.000 - 6.000 s 0.001 0.000 Definite time additional delay in seconds
tMinInv 0.001 - 6.000 s 0.001 0.010 Inverse Delay Minimum Time. In seconds
131

CurveType ANSI Ext. inv. - - IEC Def. Time 19 curve types. Example: 15 for definite
ANSI Very inv. time delay.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
k 0.05 - 1.10 - 0.01 1.00 Time Multiplier Setting (TMS) for inverse
delays
IdiffAlarm 0.05 - 1.00 IB 0.01 0.15 Sustained differential current alarm,
factor of IBase
tAlarmdelay 0.000 - 60.000 s 0.001 10.000 Delay for alarm due to sustained
differential current, in s
Table 68: L3CPDIF Group settings (advanced)

EndSection1 0.20 - 1.50 IB 0.01 1.25 End of section 1, as multiple of reference
current IBase
current IBase
SlopeSection2 10.0 - 50.0 % 0.1 40.0 Slope in section 2 of operate-restrain
characteristic, in %
SlopeSection3 30.0 - 100.0 % 0.1 80.0 Slope in section 3 of operate- restrain
I2/I1Ratio 5.0 - 100.0 % 1.0 10.0 Max. ratio of 2nd harm. to fundamental
harm dif. curr. in %
I5/I1Ratio 5.0 - 100.0 % 1.0 25.0 Max. ratio of 5th harm. to fundamental
p 0.01 - 1000.00 - 0.01 0.02 Settable curve parameter, user-
programmable curve type.
a 0.01 - 1000.00 - 0.01 0.14 Settable curve parameter, user-
b 0.01 - 1000.00 - 0.01 1.00 Settable curve parameter, user-
c 0.01 - 1000.00 - 0.01 1.00 Settable curve parameter, user-
OpenCTEnable Off - - On Open CTEnable Off/On
On
tOCTAlarmDelay 0.100 - 10.000 s 0.001 1.000 Open CT: time in s to alarm after an
open CT is detected
tOCTResetDelay 0.100 - 10.000 s 0.001 0.250 Reset delay in s. After delay, diff.
function is activated
132
Table 69: L3CPDIF Non group settings (basic)

NoOfTerminals 2 - - 2 Number of current terminals of the
3 protected circuit
Chan2IsLocal No - - No 2-nd local current connected to input
Yes channel 2, Yes/ No
IBase 50.0 - 9999.9 A 0.1 3000.0 Base (reference) current of the
differential protection
Table 70: L6CPDIF Group settings (basic)

On
IBase
sec
multiple of IBase
of IBase
Yes
On command
multiple of IBase
133

ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
delays
factor of IBase
Table 71: L6CPDIF Group settings (advanced)

current IBase
current IBase
OpenCTEnable Off - - On Open CT detection feature. Open
On CTEnable Off/On
open CT is detected
134
Table 72: L6CPDIF Non group settings (basic)

3 protected circuit
4
5
6
Table 73: LT3CPDIF Group settings (basic)

On
IBase
sec
multiple of IBase
of IBase
Yes
On command
multiple of IBase
135

ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
delays
factor of IBase
Table 74: LT3CPDIF Group settings (advanced)

current IBase
current IBase
OpenCTEnable Off - - On Open CT detection feature. Open
On CTEnable Off/On
open CT is detected
136
Table 75: LT3CPDIF Non group settings (basic)

3 protected circuit
ZerSeqCurSubtr Off - - Off Off/On for elimination of zero seq. from
On diff. and bias curr
TraAOnInpCh No Transf A - - No Transf A Power transformer A applied on input
1 channel X
2
3
RatVoltW1TraA 1.0 - 9999.9 kV 0.1 130.0 Transformer A rated voltage (kV) on
winding 1 (HV winding)
winding 2 (LV winding)
ClockNumTransA 0 [0 deg] - - 0 [0 deg] Transf. A phase shift in multiples of 30
1 [30 deg lag] deg, 5 for 150 deg
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraA No - - No Yes/No for capability of transf A to
Yes transform zero seq curr
TraBOnInpCh No Transf B - - No Transf B Power transformer B applied on input
1 channel X
2
3
RatVoltW1TraB 1.0 - 9999.9 kV 0.1 130.0 Transformer B rated voltage (kV) on
ClockNumTransB 0 [0 deg] - - 0 [0 deg] Transf. B phase shift in multiples of 30
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraB No - - No Yes/No for capability of transf B to
137
Table 76: LT6CPDIF Group settings (basic)

On
IBase
sec
multiple of IBase
of IBase
Yes
AddDelay Off - - Off On/Off selection for delayed diff. trip
On command
multiple of IBase
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
138

delays
factor of IBase
Table 77: LT6CPDIF Group settings (advanced)

current IBase
current IBase
OpenCTEnable Off - - On Open CTEnable Off/On
On
open CT is detected
Table 78: LT6CPDIF Non group settings (basic)

3 protected circuit
4
5
6
ZerSeqCurSubtr Off - - Off Off/On for elimination of zero seq. from
On diff. and bias curr
139

TraAOnInpCh No Transf A - - No Transf A Power transformer A applied on input
1 channel X
2
3
4
5
6
ClockNumTransA 0 [0 deg] - - 0 [0 deg] Transf. A phase shift in multiples of 30
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraA No - - No Yes/No for capability of transf A to
TraBOnInpCh No Transf B - - No Transf B Power transformer B applied on input
1 channel X
2
3
4
5
6
ClockNumTransB 0 [0 deg] - - 0 [0 deg] Transf. B phase shift in multiples of 30
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraB No - - No Yes/No for capability of transf B to
140
Table 79: LDLPDIF Non group settings (basic)

Operation Off - - On Operation Off / On
On
testModeSet Off - - Off Test mode On/Off
On
ReleaseLocal Block all - - Block all Release of local terminal for trip under
Release local test mode

Table 80: L3CPDIF, L6CPDIF, LT3CPDIF, LT6CPDIF technical data
Function Range or value Accuracy
Minimum operate current (20-200)% of IBase ± 2.0% of Ir at I £ Ir
± 2.0% of I at I >I r
SlopeSection2 (10.0-50.0)% -
SlopeSection3 (30.0-100.0)% -
EndSection 1 (20–150)% of IBase -
EndSection 2 (100–1000)% of IBase -
Unrestrained limit function (100–5000)% of IBase ± 2.0% of Ir at I ≤ Ir
± 2.0% of I at I > Ir
Second harmonic blocking (5.0–100.0)% of fundamental ± 2.0% of Ir
Fifth harmonic blocking (5.0–100.0)% of fundamental ± 6.0% of Ir
Inverse characteristics, see table 19 curve types See table 644 and
644, 645 and table 646 table 645
Operate time 25 ms typically at 0 to 10 x Id -
Reset time 15 ms typically at 10 to 0 x Id -
Critical impulse time 2 ms typically at 0 to 10 x Id -
Charging current compensation On/Off -
5.2 1Ph High impedance differential protection HZPDIF
IEC 61850 IEC 60617 ANSI/IEEE C37.2

Function description
1Ph High impedance differential Id

HZPDIF 87
protection
SYMBOL-CC V2 EN
141
5.2.1 Introduction
The 1Ph High impedance differential protection HZPDIF function can be used
when the involved CT cores have the same turn ratio and similar magnetizing
characteristic. It utilizes an external summation of the phases and neutral current
and a series resistor and a voltage dependent resistor externally to the IED.

The 1Ph High impedance differential protection (HZPDIF) function is based on
one current input with external stabilizing resistors and voltage dependent resistors.
Three functions can be used to provide a three phase differential protection
function. The stabilizing resistor value is calculated from the IED operating value
UR calculated to achieve through fault stability. The supplied stabilizing resistor
has a link to allow setting of the correct resistance value.
See the application manual for operating voltage and sensitivity calculation.
5.2.2.1 Logic diagram
The logic diagram shows the operation principles for the 1Ph High impedance
differential protection function HZPDIF, see figure 64. It is a simple one step IED
with an additional lower alarm level. By activating inputs, the HZPDIF function
can either be blocked completely, or only the trip output.
IEC05000301 V1 EN
Figure 64: Logic diagram for 1Ph High impedance differential protection
HZPDIF
142

HZPDIF
ISI* TRIP
BLOCK ALARM
BLKTR MEASVOLT
IEC05000363 V2 EN
Figure 65: HZPDIF function block

Table 81: HZPDIF Input signals
ISI GROUP - Group signal for current input
SIGNAL
BLKTR BOOLEAN 0 Block of trip
Table 82: HZPDIF Output signals

TRIP BOOLEAN Trip signal
ALARM BOOLEAN Alarm signal
MEASVOLT REAL Measured RMS voltage on CT secondary side

Table 83: HZPDIF Group settings (basic)
On
U>Alarm 2 - 500 V 1 10 Alarm voltage level in volts on CT
secondary side
tAlarm 0.000 - 60.000 s 0.001 5.000 Time delay to activate alarm
U>Trip 5 - 900 V 1 100 Operate voltage level in volts on CT
secondary side
SeriesResistor 10 - 20000 ohm 1 250 Value of series resistor in Ohms
143

Table 84: HZPDIFtechnical data
Operate voltage (20-400) V ± 1.0% of Ur for U < Ur
± 1.0% of U for U > Ur
Reset ratio >95% -

Maximum U>Trip2/series resistor ≤200 W -
continuous voltage
Operate time 10 ms typically at 0 to 10 x Ud -
Reset time 90 ms typically at 10 to 0 x Ud -
Critical impulse time 2 ms typically at 0 to 10 x Ud -
144
Impedance protection
Section 6 Impedance protection
About this chapter

This chapter describes distance protection and associated functions. It includes
function blocks, logic diagrams and data tables with information about distance
protection, automatic switch onto fault, weak end in-feed and other associated
functions. Quadrilateral characteristics are also covered.
6.1 Distance measuring zones, quadrilateral

characteristic ZMQPDIS, ZMQAPDIS, ZDRDIR

Distance protection zone, quadrilateral ZMQPDIS 21
characteristic (zone 1)
S00346 V1 EN
Distance protection zone, quadrilateral ZMQAPDIS 21

characteristic (zone 2-5)
S00346 V1 EN
Directional impedance quadrilateral ZDRDIR 21D
Z<->
IEC09000167 V1 EN
6.1.1 Introduction
The line distance protection is a, up to four zone full scheme protection with three
fault loops for phase-to-phase faults and three fault loops for phase-to-earth fault
for each of the independent zones. Individual settings for each zone in resistive and
reactive reach gives flexibility for use as back-up protection for transformer
connected to overhead lines and cables of different types and lengths.
ZMQPDIS together with Phase selection with load encroachment FDPSPDIS has
functionality for load encroachment, which increases the possibility to detect high
resistive faults on heavily loaded lines, as shown in figure66.
145
Forward
operation
Reverse
operation
en05000034.vsd
IEC05000034 V1 EN
Figure 66: Typical quadrilateral distance protection zone with Phase selection
with load encroachment function FDPSPDIS activated
The independent measurement of impedance for each fault loop together with a
sensitive and reliable built-in phase selection makes the function suitable in
applications with single-phase autoreclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone 1 at

load exporting end at phase-to-earth faults on heavily loaded power lines.
The distance protection zones can operate independently of each other in

directional (forward or reverse) or non-directional mode. This makes them suitable,
together with different communication schemes, for the protection of power lines
and cables in complex network configurations, such as parallel lines, multi-
terminal lines, and so on.
6.1.2.1 Full scheme measurement
The execution of the different fault loops within the IED are of full scheme type,
which means that each fault loop for phase-to-earth faults and phase-to-phase faults
for forward and reverse faults are executed in parallel.
Figure 67 presents an outline of the different measuring loops for up to five,

impedance-measuring zones. There are 3 to 5 zones depending on product type and
variant.
146
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1
en05000458.vsd
IEC05000458 V1 EN
Figure 67: The different measuring loops at phase-to-earth fault and phase-to-
phase fault.
The use of full scheme technique gives faster operation time compared to switched
schemes which mostly uses a start element to select correct voltages and current
depending on fault type. Each distance protection zone performs like one
independent distance protection IED with six measuring elements.
6.1.2.2 Impedance characteristic
The distance measuring zone includes six impedance measuring loops; three
intended for phase-to-earth faults, and three intended for phase-to-phase as well as,
three-phase faults.
The distance measuring zone will essentially operate according to the non-
directional impedance characteristics presented in figure 68 and figure 69. The phase-
to-earth characteristic is illustrated with the full loop reach while the phase-to-
phase characteristic presents the per phase reach.
147
X (Ohm/loop)
R1PE+Rn
RFPE RFPE
X0PE-X1PE
Xn =
3
X1PE+Xn R0PE-R1PE
Rn =
3
jN jN
R (Ohm/loop)
RFPE RFPE
X1PE+Xn
RFPE RFPE
en08000280-2-en.vsd
R1PE+Rn
IEC08000280 V1 EN
Figure 68: Characteristic for phase-to-earth measuring, ohm/loop domain
148
X (Ohm/phase)
RFPP R1PP RFPP

2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG- -X31XRVPE
1RVPG
XNRV =
XNRV =
33
XX00 PE-
X 0 PG X
PE --1X 11FWPE
XFWPE
FWPG
XNFW===
XNFW
XNFW
X1PP 3 33
j j
R (Ohm/phase)
RFPP RFPP
2 2
X1PP
RFPP R1PP RFPP

2 2
en07000062.vsd
IEC07000062 V2 EN
Figure 69: Characteristic for phase-to-phase measuring
The fault loop reach with respect to each fault type may also be presented as in
figure 70. Note in particular the difference in definition regarding the (fault)
resistive reach for phase-to-phase faults and three-phase faults.
149
IL1 R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1
IL1 R1 + j X1 0.5·RFPP Phase-to-phase

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5·RFPP
IEC08000282 V2 EN
Figure 70: Fault loop model
The R1 and jX1 in figure 70 represents the positive sequence impedance from the
measuring point to the fault location. The settings RFPE and RFPP are the
eventual fault resistances in the faulty place.
Regarding the illustration of three-phase fault in figure 70, there is of course fault
current flowing also in the third phase during a three-phase fault. The illustration
merely reflects the loop measurement, which is made phase-to-phase.
The zone can be set to operate in Non-directional, Forward or Reverse direction

through the setting OperationDir. The result from respective set value is illustrated
in figure 71. The impedance reach is symmetric, in the sense that it conforms for
forward and reverse direction. Therefore, all reach settings apply to both directions.
150
X X X
R R R
Non-directional Forward Reverse
en05000182.vsd
IEC05000182 V1 EN
Figure 71: Directional operating modes of the distance measuring zones
6.1.2.3 Minimum operating current
The operation of Distance measuring zones, quadrilateral characteristic

(ZMQPDIS) is blocked if the magnitude of input currents fall below certain
threshold values.
The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.
For zone 1 with load compensation feature the additional criterion applies, that all
phase-to-earth loops will be blocked when IN < IMinOpIN, regardless of the phase
currents.
ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector
sum of the three-phase currents, that is, residual current 3I0.
The phase-to-phase loop LmLn is blocked if ILmLn < IMinOpPP.
ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.
All three current limits IMinOpPE, IMinOpIN and IMinOpPP are

automatically reduced to 75% of regular set values if the zone is set
to operate in reverse direction, that is, OperationDir = Reverse.
6.1.2.4 Measuring principles
Fault loop equations use the complex values of voltage, current, and changes in the
current. Apparent impedances are calculated and compared with the set limits. The
151
apparent impedances at phase-to-phase faults follow equation 4 (example for a

phase L1 to phase L2 fault).
UL1 – UL2
Zapp = -------------------------
I L1 – IL2
Here U and I represent the corresponding voltage and current phasors in the
respective phase Ln (n = 1, 2, 3)
The earth return compensation applies in a conventional manner to phase-to-earth

faults (example for a phase L1 to earth fault) according to equation 5.
U L1
Z app = ------------------------------
I L1 + I N × KN
Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
Z0 - Z1
KN =
3 × Z1
EQUATION 2105 V1 EN
Z 0 = R0 + jX 0
EQUATION2106 V1 EN
Z1 = R1 + jX 1
EQUATION2107 V1 EN
Where
R0 is setting of the resistive zero sequence reach
X0 is setting of the reactive zero sequence reach
R1 is setting of the resistive positive sequence reach
X1 is setting of the reactive positive sequence reach
Here IN is a phasor of the residual current in IED point. This results in the same
reach along the line for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and

reactance X.
152
The formula given in equation 5 is only valid for radial feeder application without
load. When load is considered in the case of single phase-to-earth fault,
conventional distance protection might overreach at exporting end and underreach
at importing end. The IED has an adaptive load compensation which increases the
security in such applications.
Measuring elements receive current and voltage information from the A/D
converter. The check sums are calculated and compared, and the information is
distributed into memory locations. For each of the six supervised fault loops,
sampled values of voltage (U), current (I), and changes in current between samples
(DI) are brought from the input memory and fed to a recursive Fourier filter.
The filter provides two orthogonal values for each input. These values are related
to the loop impedance according to equation 6,
X Di
U = R × i + ------ × -----
w 0 Dt
in complex notation, or:
X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt
X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt
with
w0 = 2 × p × f 0
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency
The algorithm calculates Rmmeasured resistance from the equation for the real
value of the voltage and substitutes it in the equation for the imaginary part. The
equation for the Xm measured reactance can then be solved. The final result is
equal to:
153
Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )
The calculated Rm and Xm values are updated each sample and compared with the
set zone reach. The adaptive tripping counter counts the number of permissive
tripping results. This effectively removes any influence of errors introduced by the
capacitive voltage transformers or by other factors.
The directional evaluations are performed simultaneously in both forward and

reverse directions, and in all six fault loops. Positive sequence voltage and a phase
locked positive sequence memory voltage are used as a reference. This ensures
unlimited directional sensitivity for faults close to the IED point.
6.1.2.5 Directional impedance element for quadrilateral characteristics
The evaluation of the directionality takes place in Directional impedance

quadrilateral function ZDRDIR. Equation 12 and equation 13 are used to classify
that the fault is in forward direction for phase-to-earth fault and phase-to-phase fault.
0.8 × U 1L1 + 0.2 × U 1L1 M

- ArgDir < arg < ArgNeg Re s
I L1
For the L1-L2 element, the equation in forward direction is according to.
0.8 × U 1L1 L 2 + 0.2 × U 1L1 L 2 M

I L1 L 2
where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default
set to 15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default
set to 115 degrees, see figure 72.
U1L1 is positive sequence phase voltage in phase L1
U1L1M is positive sequence memorized phase voltage in phase L1
IL1 is phase current in phase L1
U1L1L2 is voltage difference between phase L1 and L2 (L2 lagging L1)
U1L1L2M is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 is current difference between phase L1 and L2 (L2 lagging L1)
154
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115
degrees respectively (as shown in figure 72). It should not be changed unless
system studies have shown the necessity.
ZDRDIR gives binary coded directional information per measuring loop on the
output STDIRCND.
STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048
ArgNegRes
ArgDir
R
en05000722.vsd
IEC05000722 V1 EN
Figure 72: Setting angles for discrimination of forward and reverse fault in
Directional impedance quadrilateral function ZDRDIR
The reverse directional characteristic is equal to the forward characteristic rotated

by 180 degrees.
The polarizing voltage is available as long as the positive sequence voltage exceeds
5% of the set base voltage UBase. So the directional element can use it for all
unsymmetrical faults including close-in faults.
For close-in three-phase faults, the U1L1M memory voltage, based on the same
positive sequence voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is
restored.
After 100ms the following occurs:
155
• If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set IED rated current IBase), the condition seals in.
• If the fault has caused tripping, the trip endures.
• If the fault was detected in the reverse direction, the measuring element
in the reverse direction remains in operation.
• If the current decreases below the minimum operating value, the memory
resets until the positive sequence voltage exceeds 10% of its rated value.
6.1.2.6 Simplified logic diagrams
Distance protection zones

The design of the distance protection zones are presented for all measuring loops:
phase-to-earth as well as phase-to-phase.
Phase-to-earth related signals are designated by L1N, L2N and L3N. The phase-to-
phase signals are designated by L1L2, L2L3, and L3L1.
Fulfillment of two different measuring conditions is necessary to obtain the one

logical signal for each separate measuring loop:
• Zone measuring condition, which follows the operating equations described

above.
• Group functional input signal (STCND), as presented in figure 73.
Two types of function block, ZMQPDIS and ZMQAPDIS, are used in the IED.
ZMQPDIS is used for zone 1 and ZMQAPDIS for zone 2 - 5.
The STCND input signal represents a connection of six different integer values
from Phase selection with load encroachment, quadrilateral characteristic function
FDPSPDIS within the IED, which are converted within the zone measuring
function into corresponding boolean expressions for each condition separately.
Input signal STCND is connected to FDPSPDIS function output STCNDZ.
The input signal DIRCND is used to give condition for directionality for the
distance measuring zones. The signal contains binary coded information for both
forward and reverse direction. The zone measurement function filters out the
relevant signals depending on the setting of the parameter OperationDir. It must be
configured to the STDIR output on ZDRDIR function.
156
IEC99000557-TIFF V1 EN
Figure 73: Conditioning by a group functional input signal STCND, external

start condition
Composition of the phase start signals for a case, when the zone operates in a non-
directional mode, is presented in figure 74.
STNDL1N
OR
STNDL2N
AND STL1
STNDL3N
STNDL1L2 OR STL2
AND
STNDL2L3
STNDL3L1 AND STL3
OR
AND START
OR
BLK
en00000488.vsd
IEC00000488 V1 EN
Figure 74: Composition of starting signals in non-directional operating mode
157
Results of the directional measurement enter the logic circuits, when the zone
operates in directional (forward or reverse) mode, as shown in figure 75.
STNDL1N
AND
DIRL1N STZMPE
OR
STNDL2N
DIRL2N AND
STNDL3N OR STL1
DIRL3N AND AND
STNDL1L2
DIRL1L2 AND OR STL2
AND
STNDL2L3
DIRL2L3 AND
OR STL3
STNDL3L1 AND
DIRL3L1 AND
STZMPP
OR
BLK
15 ms
OR START
AND t
en05000778.vsd
IEC05000778 V2 EN
Figure 75: Composition of start signals in directional operating mode
Tripping conditions for the distance protection zone one are symbolically presented
in figure 76.
158
Timer tPP=On tPP

AND t
STZMPP
OR
Timer tPE=On tPE
AND t
STZMPE
15ms
BLKTR AND t
TRIP
BLK OR
STL1 AND TRL1
STL2 AND TRL2
STL3 AND TRL3
en00000490-3.vsd
IEC00000490 2 V1 EN
Figure 76: Tripping logic for the distance protection zone

ZMQPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
IEC06000256 V2 EN
Figure 77: ZMQPDIS function block
ZMQAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
IEC09000884 V1 EN
Figure 78: ZMQAPDIS function block (zone 2 - 5)
159
ZDRDIR
I3P* STDIR
U3P*
IEC05000681 V2 EN
Figure 79: ZDRDIR function block

Table 85: ZMQPDIS Input signals
I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
VTSZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition
Table 86: ZMQPDIS Output signals

TRIP BOOLEAN General Trip, issued from any phase or loop
START BOOLEAN General Start, issued from any phase or loop
STND BOOLEAN Non-directional start, issued from any phase or
loop
Table 87: ZMQAPDIS Input signals

SIGNAL
SIGNAL
160

Table 88: ZMQAPDIS Output signals

loop
Table 89: ZDRDIR Input signals

I3P GROUP - Group connection
SIGNAL
U3P GROUP - Group connection
SIGNAL
Table 90: ZDRDIR Output signals

STDIR INTEGER All start signals binary coded
Signals and settings for ZMQPDIS are valid for zone 1 while
signals and settings for ZMQAPDIS are valid for zone 2 - 5
161
Table 91: ZMQPDIS Group settings (basic)

On
IBase 1 - 99999 A 1 3000 Base current, i.e. rated current
UBase 0.05 - 2000.00 kV 0.05 400.00 Base voltage, i.e. rated voltage
OperationDir Off - - Forward Operation mode of directionality NonDir /
Non-directional Forw / Rev
Forward
Reverse
X1 0.10 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach
R1 0.10 - 1000.00 ohm/p 0.01 5.00 Positive seq. resistance for zone
characteristic angle
X0 0.10 - 9000.00 ohm/p 0.01 100.00 Zero sequence reactance reach
R0 0.50 - 3000.00 ohm/p 0.01 15.00 Zero seq. resistance for zone
RFPP 1.00 - 3000.00 ohm/l 0.01 30.00 Fault resistance reach in ohm/loop, Ph-Ph
RFPE 1.00 - 9000.00 ohm/l 0.01 100.00 Fault resistance reach in ohm/loop, Ph-E
OperationPP Off - - On Operation mode Off / On of Phase-
On Phase loops
Timer tPP Off - - On Operation mode Off / On of Zone timer,
On Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
OperationPE Off - - On Operation mode Off / On of Phase-Earth
On loops
Timer tPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPP 10 - 30 %IB 1 20 Minimum operate delta current for Phase-
Phase loops
IMinOpPE 10 - 30 %IB 1 20 Minimum operate phase current for
Phase-Earth loops
IMinOpIN 5 - 30 %IB 1 5 Minimum operate residual current for
Phase-Earth loops
Table 92: ZMQAPDIS Group settings (basic)

On
Forward
Reverse
162

RFPP 1.00 - 3000.00 ohm/l 0.01 30.00 Fault resistance reach in ohm/loop, Ph-Ph
On Phase loops
On Ph-Ph
On loops
On Ph-E
Phase loops
Phase-Earth loops
Table 93: ZDRDIR Group settings (basic)

ArgNegRes 90 - 175 Deg 1 115 Angle to blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle to blinder in fourth quadrant for
forward direction
IMinOp 1 - 99999 %IB 1 10 Minimum operate current in % of IBase
IBase 1 - 99999 A 1 3000 Base Current
UBase 0.05 - 2000.00 kV 0.05 400.00 Base Voltage

Table 94: ZMQPDIS technical data
Number of zones 34 with selectable -
direction
Minimum operate residual (5-30)% of IBase -
current, zone 1
Minimum operate current, phase- (10-30)% of IBase -
to-phase and phase-to-earth
163

Positive sequence reactance, (0.10-3000.00) Ω/ ± 2.0% static accuracy
zone 1 phase ± 2.0 degrees static angular accuracy
Conditions:
Positive sequence reactance, (0.50-3000.00) Ω/ Voltage range: (0.1-1.1) x Ur
zone 2- phase
Current range: (0.5-30) x Ir
34
Angle: at 0 degrees and 85 degrees
Positive sequence resistance (0.10-1000.00) Ω/
phase
Zero sequence reactance, zone 1 (0.10-9000.00) Ω/
phase
Zero sequence reactance, (0.50-9000.00) Ω/
zone 2- phase
34
Zero sequence resistance (0.50-3000.00) Ω/
phase
Fault resistance, phase-to-earth (1.00-9000.00) Ω/loop
Fault resistance, phase-to-phase (1.00-3000.00) Ω/loop
Dynamic overreach <5% at 85 degrees -
measured with CVT’s
and 0.5<SIR<30
Impedance zone timers (0.000-60.000) s ± 0.5% ± 10 ms
Operate time 24 ms typically -
Reset ratio 105% typically -
Reset time 30 ms typically -
6.2 Distance measuring zone, quadrilateral

characteristic for series compensated lines
ZMCPDIS, ZMCAPDIS, ZDSRDIR

Distance measuring zone, quadrilateral ZMCPDIS 21
characteristic for series compensated
lines (zone 1)
S00346 V1 EN
Distance measuring zone, quadrilateral ZMCAPDIS 21

characteristic for series compensated
lines (zone 2-5)
S00346 V1 EN
Directional impedance quadrilateral, ZDSRDIR 21D

including series compensation
Z<->
IEC09000167 V1 EN
164
6.2.1 Introduction
The line distance protection is a, up to four zone full scheme protection with three
fault loops for phase-to-phase faults and three fault loops for phase-to-earth fault
for each of the independent zones. Individual settings for each zone resistive and
reactive reach give flexibility for use on overhead lines and cables of different
types and lengths.
Quadrilateral characteristic is available.
ZMCPDIS function has functionality for load encroachment which increases the
possibility to detect high resistive faults on heavily loaded lines.
Forward
operation
Reverse
operation
en05000034.vsd
IEC05000034 V1 EN
Figure 80: Typical quadrilateral distance protection zone with load

encroachment function activated
sensitive and reliable built in phase selection makes the function suitable in
applications with single phase auto-reclosing.
Built-in adaptive load compensation algorithm for the quadrilateral function

prevents overreaching of zone1 at load exporting end at phase to earth-faults on
heavily loaded power lines.
The distance protection zones can operate, independent of each other, in directional
(forward or reverse) or non-directional mode. This makes them suitable, together
with different communication schemes, for the protection of power lines and cables
in complex network configurations, such as parallel lines, multi-terminal lines.
165
which means that earth fault loop for phase-to-earth faults and phase-to-phase
faults for forward and reverse faults are executed in parallel.
Figure 81 presents an outline of the different measuring loops for the basic five,
impedance-measuring zones.
en05000458.vsd
IEC05000458 V1 EN
Figure 81: The different measuring loops at phase-to-earth fault and phase-to-
phase fault
depending on fault type. Each distance protection zone performs like one
independent distance protection IED with six measuring elements.
Distance measuring zone, quadrilateral characteristic for series compensated lines

(ZMCPDIS) include six impedance measuring loops; three intended for phase-to-
earth faults, and three intended for phase-to-phase as well as, three-phase faults.
The distance measuring zone operates according to the non-directional impedance

characteristics presented in figure 82 and figure 83. The phase-to-earth
characteristic is illustrated with the full loop reach while the phase-to-phase
characteristic presents the per-phase reach.
166
X (Ohm/loop)
R1PE+RNFw
X 0 PE - X 1FwPE
RFRvPE RFFwPE XNFw =
3
PG- -
XX00PE 1RVPG 1RvPE
1XRVPE
X
XNRV XNRv
XNRV == =XXNFw
3
×
3 X 1FwPE
XX0 PE - X-1X
0 PG FWPE
1FWPG
XNFW==
XNFW
X1FwPE+XNFw 3 3 R0 PE - R1PE
RNFw =
jN jN 3
R (Ohm/loop)
RFRvPE RFFwPE
X1RvPE+XNRv
jN
RFRvPE RFFwPE
IEC09000625 V1 EN
Figure 82: Characteristic for the phase-to-earth measuring loops, ohm/loop

domain
167
X (Ohm/phase)
RFRvPP R1PP RFFwPP

2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG- -X31XRVPE
1RVPG
XNRV =
XNRV =
33
XX00 PE-
X 0 PG X
PE --1X 11FWPE
XFWPE
FWPG
XNFW===
XNFW
XNFW
X1FwPP 3 33
j j
jN R (Ohm/phase)
RFRvPP RFFwPP
2 2
X1RvPP
jN
RFRvPP RFFwPP
2 2
IEC09000632 V1 EN
Figure 83: Characteristic for the phase-to-phase measuring loops
The fault loop reach with respect to each fault type may also be presented as in
figure 84. Note in particular the difference in definition regarding the (fault)
resistive reach for phase-to-phase faults and three-phase faults.
168
IL1 R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1
IL1 R1 + j X1 0.5·RFPP Phase-to-phase

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5·RFPP
IEC08000282 V2 EN
measuring point to the fault location. The RFPE and RFPP is the eventual fault
resistance in the fault place.
Regarding the illustration of three-phase fault in figure 84, there is of course fault
current flowing also in the third phase during a three-phase fault. The illustration
merely reflects the loop measurement, which is made phase-to-phase.
The zone may be set to operate in Non-directional, Forward or Reverse direction

through the setting OperationDir. The result from respective set value is illustrated
in figure 85. It may be convenient to once again mention that the impedance reach
is symmetric, forward and reverse direction. Therefore, all reach settings apply to
both directions.
169
X X X
R R R
en05000182.vsd
IEC05000182 V1 EN
Figure 85: Directional operating modes of the distance measuring zone
The operation of Distance measuring zone, quadrilateral characteristic for series

compensated lines (ZMCPDIS,ZMCAPDIS) is blocked if the magnitude of input
currents fall below certain threshold values.
currents.
sum of the three phase currents, that is, residual current 3I0.
The phase-to-phase loop LmLn is blocked if ILmLnAB (BC or CA)< IMinOpPP.
ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.
All three current limits IMinOpPE, IMinOpIN and IMinOpPP are

automatically reduced to 75% of regular set values if the zone is set
to operate in reverse direction, that is, OperationDir=Reverse.
current. Apparent impedances are calculated and compared with the set limits. The
170
calculation of the apparent impedances at ph-ph faults follows equation 14

(example for a phase L1 to phase L2 fault).
UL1 – UL2
Zapp = -------------------------
I L1 – IL2
respective phase.
The earth return compensation applies in a conventional manner to ph-E faults

(example for a phase L1 to earth fault) according to equation 15.
U L1
Z app = ------------------------------
I L1 + I N × KN
Where:
KN is defined as:
Z0 - Z1
KN =
3 × Z1
EQUATION 2105 V1 EN
Z 0 = R0 + jX 0
EQUATION2106 V1 EN
Z1 = R1 + jX 1
EQUATION2107 V1 EN
Where
Here IN is a phasor of the residual current at the IED point. This results in the same

reactance X.
171
The formula given in equation 15 is only valid for no loaded radial feeder
applications. When load is considered in the case of single phase-to-earth fault,
at importing end. IED has an adaptive load compensation which increases the
X Di
U = R × i + ------ × -----
w 0 Dt
X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt
X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt
with
w0 = 2 × p × f 0
where:
The algorithm calculates Rm measured resistance from the equation for the real
value of the voltage and substitute it in the equation for the imaginary part. The
equal to:
172
Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )

6.2.2.5 Directionality for series compensation
In the basic distance protection function, the control of the memory for polarizing
voltage is performed by an under voltage control. In case of series compensated
line, a voltage reversal can occur with a relatively high voltage also when the
memory must be locked. Thus, a simple undervoltage type of voltage memory
control can not be used in case of voltage reversal. In the option for series
compensated network the polarizing quantity and memory are controlled by an
impedance measurement criterion.
The polarizing voltage is a memorized positive sequence voltage. The memory is

continuously synchronized via a positive sequence filter. The memory is starting to
run freely instantaneously when a voltage change is detected in any phase. A non-
directional impedance measurement is used to detect a fault and identify the faulty
phase or phases.
At a three phase fault when no positive sequence voltage remains (all three phases
are disconnected) the memory is used for direction polarization during 100 ms.
The memory predicts the phase of the positive sequence voltage with the pre-fault
frequency. This extrapolation is made with a high accuracy and it is not the
accuracy of the memory that limits the time the memory can be used. The network
is at a three phase fault under way to a new equilibrium and the post-fault condition
can only be predicted accurately for a limited time from the pre-fault condition.
In case of a three phase fault after 100 ms the phase of the memorized voltage can
not be relied upon and the directional measurement has to be blocked. The
achieved direction criteria are sealed-in when the directional measurement is
blocked and kept until the impedance fault criteria is reset (the direction is stored
until the fault is cleared).
173
This memory control allows in the time domain unlimited correct directional
measurement for all unsymmetrical faults also at voltage reversal. Only at three
phase fault within the range of the set impedance reach of the criteria for control of
the polarization voltage the memory has to be used and the measurement is limited
to 100 ms and thereafter the direction is sealed-in. The special impedance
measurement to control the polarization voltage is set separately and has only to
cover (with some margin) the impedance to fault that can cause the voltage reversal.
The evaluation of the directionality takes place in Directional impedance

quadrilateral, including series compensation (ZDSRDIR) function. Equation 22 and
equation 23 are used to classify that the fault is in forward direction for phase-to-
earth fault and phase-to-phase fault.
U 1L1M
I L1
For the L1-L2 element, the equation in forward direction is according to:
U 1L1L 2 M
I L1L 2
where:
U1L1L2M is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 is current difference between phase L1 and L2 (L2 lagging L1)
degrees respectively, see figure 86, and it should not be changed unless system
studies have shown the necessity.
ZDSRDIR generates a binary coded signal on the output STDIR depending on the
evaluation where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4.
174
ArgNegRes
ArgDir
R
en05000722.vsd
IEC05000722 V1 EN
Figure 86: Setting angles for discrimination of forward and reverse fault

by 180 degrees.

The design of distance protection zones are presented for all measuring loops: phase-
to-earth as well as phase-to-phase.
Phase-to-earth related signals are designated by Ln, where n represents the

corresponding phase number (L1, L2, and L3). The phase-to-phase signals are
designated by LnLm, where n and m represent the corresponding phase numbers
(L1L2, L2L3, and L3L1).


above.
Two types of function block, ZMCPDIS and ZMCAPDIS , are used in the IED.
ZMQPDIS is used for zone 1 and ZMQAPDIS for zone 2 - 5.
175
from the phase selection function within the IED, which are converted within the
zone measuring function into corresponding boolean expressions for each
condition separately. It is connected to Phase selection with load enchroachment,
quadrilateral characteristic (FDPSPDIS) function output STCDZ.
Figure 87: Conditioning by a group functional input signal STCND
Composition of the phase starting signals for a case, when the zone operates in a non-
176
operates in directional (forward or reverse) mode, as shown in figure 89.
STNDL1N
AND
DIRL1N STZMPE
OR
STNDL2N
DIRL2N AND
STNDL3N OR STL1
DIRL3N AND AND
STNDL1L2
DIRL1L2 AND OR STL2
AND
STNDL2L3
DIRL2L3 AND
OR STL3
STNDL3L1 AND
DIRL3L1 AND
STZMPP
OR
BLK
15 ms
OR START
AND t
en05000778.vsd
IEC05000778 V2 EN
Figure 89: Composition of starting signals in directional operating mode
in figure 90.
177
Timer tPP=On tPP

AND t
STZMPP
OR
Timer tPE=On tPE
AND t
STZMPE
15ms
BLKTR AND t
TRIP
BLK OR
STL1 AND TRL1
STL2 AND TRL2
STL3 AND TRL3
en00000490-3.vsd
IEC00000490 2 V1 EN
Figure 90: Tripping logic for the distance protection zone one

ZMCPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
IEC07000036 V2 EN
Figure 91: ZMCPDIS function block
ZMCAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
IEC09000890 V1 EN
Figure 92: ZMCAPDIS function block
178
ZDSRDIR
I3P* STFW
U3P* STRV
STDIRCND
IEC07000035 V2 EN
Figure 93: ZDSRDIR function block
Input and output signals is shown for zone 1, zone 2 - 5 are equal.
Table 95: ZMCPDIS Input signals

SIGNAL
SIGNAL
Table 96: ZMCPDIS Output signals

loop
179
Table 97: ZMCAPDIS Input signals

SIGNAL
SIGNAL
Table 98: ZMCAPDIS Output signals

loop
Table 99: ZDSRDIR Input signals

I3P GROUP - Group connection for current
SIGNAL
U3P GROUP - Group connection for voltage
SIGNAL
Table 100: ZDSRDIR Output signals

STFW BOOLEAN Start in forward direction
STRV BOOLEAN Start in reverse direction
STDIRCND INTEGER Binary coded directional information per
measuring loop
180
Settings for ZMCPDIS are valid for zone 1, while settings for
ZMCAPDIS are valid for zone 2 - 5
Table 101: ZMCPDIS Group settings (basic)

On
Forward
Reverse
On Phase loops
X1FwPP 0.50 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, forward
R1PP 0.10 - 1000.00 ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-Ph
RFFwPP 1.00 - 3000.00 ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, forward
X1RvPP 0.50 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, reverse
RFRvPP 1.00 - 3000.00 ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, reverse
On Ph-Ph
On loops
X1FwPE 0.50 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, forward
R1PE 0.10 - 1000.00 ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-E
X0PE 0.50 - 9000.00 ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E
R0PE 0.50 - 3000.00 ohm/p 0.01 47.00 Zero seq. resistance for zone
characteristic angle, Ph-E
RFFwPE 1.00 - 9000.00 ohm/l 0.01 100.00 Fault resistance reach, Ph-E, forward
X1RvPE 0.50 - 3000.00 ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, reverse
RFRvPE 1.00 - 9000.00 ohm/l 0.01 100.00 Fault resistance reach, Ph-E, reverse
On Ph-E
181

Phase loops
Phase-Earth loops
Phase-Earth loops
Table 102: ZMCAPDIS Group settings (basic)

On
Forward
Reverse
On Phase loops
Ph, forward
angle, Ph-Ph
Ph, reverse
On Ph-Ph
On loops
E, forward
angle, Ph-E
X0PE 0.50 - 9000.00 ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E
E, reverse
On Ph-E
182

Phase loops
Phase-Earth loops
Table 103: ZDSRDIR Group settings (basic)

OperationSC NoSeriesComp - - SeriesComp Special directional criteria for voltage
SeriesComp reversal
IBase 1 - 99999 A 1 3000 Base setting for current level
UBase 0.05 - 2000.00 kV 0.05 400.00 Base setting for voltage level
Phase-Earth loops
Phase loops
ArgNegRes 90 - 175 Deg 1 130 Angle of blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
INReleasePE 10 - 100 %IPh 1 20 3I0 limit for releasing phase-to-earth
measuring loops
INBlockPP 10 - 100 %IPh 1 40 3I0 limit for blocking phase-to-phase
measuring loops
OperationLdCh Off - - On Operation of load discrimination
On characteristic
RLdFw 1.00 - 3000.00 ohm/p 0.01 80.00 Forward resistive reach within the load
impedance area
RLdRv 1.00 - 3000.00 ohm/p 0.01 80.00 Reverse resistive reach within the load
impedance area
ArgLd 5 - 70 Deg 1 30 Load angle determining the load
impedance area
Ph, forward
angle, Ph-Ph
Ph, reverse
E, forward
angle, Ph-E
X0FwPE 0.50 - 9000.00 ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
forward
183

E, reverse
X0RvPE 0.50 - 9000.00 ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
reverse

Table 104: ZMCPDIS, ZMCAPDIS technical data
Number of zones 34 with selectable direction -
Minimum operate residual (5-30)% of IBase -
current, zone 1
Minimum operate current, Ph-Ph (10-30)% of IBase -
and Ph-E
Positive sequence reactance (0.50-3000.00) Ω/phase ± 2.0% static accuracy
± 2.0 degrees static angular
Positive sequence resistance (0.10-1000.00) Ω/phase accuracy
Zero sequence reactance (0.50-9000.00) Ω/phase Conditions:
Voltage range: (0.1-1.1) x Ur
Zero sequence resistance (0.50-3000.00) Ω/phase Current range: (0.5-30) x Ir
Fault resistance, Ph-E (1.00-9000.00) Ω/loop Angle: at 0 degrees and 85
degrees
Fault resistance, Ph-Ph (1.00-3000.00) Ω/loop
Dynamic overreach <5% at 85 degrees measured -
with CCVT’s and 0.5<SIR<30
6.3 Phase selection, quadrilateral characteristic with

fixed angle FDPSPDIS

Phase selection with load FDPSPDIS 21
encroachment, quadrilateral
characteristic Z<phs
SYMBOL-DD V1 EN
184
6.3.1 Introduction
The operation of transmission networks today is in many cases close to the stability
limit. Due to environmental considerations, the rate of expansion and
reinforcement of the power system is reduced, for example, difficulties to get
permission to build new power lines. The ability to accurately and reliably classify
the different types of fault, so that single pole tripping and autoreclosing can be
used plays an important role in this matter. Phase selection, quadrilateral
characteristic with fixed angle FDPSPDIS is designed to accurately select the
proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may make
fault resistance coverage difficult to achieve. Therefore, FDPSPDIS has a built-in
algorithm for load encroachment, which gives the possibility to enlarge the
resistive setting of both the phase selection and the measuring zones without
interfering with the load.
The extensive output signals from the phase selection gives also important
information about faulty phase(s), which can be used for fault analysis.

The basic impedance algorithm for the operation of the phase selection measuring
elements is the same as for the distance zone measuring function. Phase selection
with load encroachment, quadrilateral characteristic FDPSPDIS includes six
impedance measuring loops; three intended for phase-to-earth faults, and three
intended for phase-to-phase faults as well as for three-phase faults.
The difference, compared to the distance zone measuring function, is in the

combination of the measuring quantities (currents and voltages) for different types
of faults.
A current-based phase selection is also included. The measuring elements

continuously measure three phase currents and the residual current, and compare
them with the set values. The current signals are filtered by Fourier's recursive
filter, and separate trip counter prevents too high overreaching of the measuring
elements.
The characteristic is basically non-directional, but FDPSPDIS uses information

from the directional function to discriminate whether the fault is in forward or
reverse direction.
The start condition STCNDZ is essentially based on the following criteria:
1. Residual current criteria, that is, separation of faults with and without earth
connection
2. Regular quadrilateral impedance characteristic
3. Load encroachment characteristics is always active but can be switched off by
selecting a high setting.
185
The current start condition STCNDI is based on the following criteria:
1. Residual current criteria

2. No quadrilateral impedance characteristic. The impedance reach outside the
load area is theoretically infinite. The practical reach, however, will be
determined by the minimum operating current limits.
3. Load encroachment characteristic is always active, but can be switched off by
selecting a high setting.
The STCNDI output is non-directional. The directionality is determined by the

distance zones directional function. There are outputs from FDPSPDIS that
indicate whether a start is in forward or reverse direction or non-directional, for
example STFWL1, STRVL1 and STNDL1.
These directional indications are based on the sector boundaries of the directional
function and the impedance setting of FDPSPDIS function. Their operating
characteristics are illustrated in figure 94.
X X X
R
R R
Non-directional (ND) Forward (FW) Reverse (RV)
en08000286.vsd
IEC08000286 V1 EN
Figure 94: Characteristics for non-directional, forward and reverse operation

of Phase selection with load encroachment, quadrilateral
characteristic FDPSPDIS
The setting of the load encroachment function may influence the total operating
characteristic, (for more information, refer to section "Load encroachment").
The input DIRCND contains binary coded information about the directional
coming from the directional function . It shall be connected to the STDIR output on
ZDRDIR, directional measuring block. This information is also transferred to the
input DIRCND on the distance measuring zones, that is, the ZMQPDIS, distance
measuring block.
The code built up for the directionality is as follows:
186
STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048
If the binary information is 1 then it will be considered that we have start in

forward direction in phase L1. If the binary code is 3 then we have start in forward
direction in phase L1 and L2, binary code 192 means start in reverse direction in
phase L1 and L2A and B etc.
The STCNDZ or STCNDI output contains, in a similar way as DIRCND, binary

coded information, in this case information about the condition for opening correct
fault loop in the distance measuring element. It shall be connected to the STCND
input on the ZMQPDIS, distance measuring block.
The code built up for release of the measuring fault loops is as follows:
STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32
6.3.2.1 Phase-to-earth fault
For a phase-to-earth fault, the measured impedance by FDPSPDIS will be

according to equation 24.
Index PHS in images and equations reference settings for Phase

selection with load encroachment function FDPSPDIS.
ULn
ZPHSn =
ILn
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for FDPSPDIS function at phase-to-earth fault is according to

figure 95. The characteristic has a fixed angle for the resistive boundary in the first
quadrant of 60°.
The resistance RN and reactance XN are the impedance in the earth-return path
defined according to equation 25 and equation 26.
R0 - R1
RN =
3
187
X 0 - X1
XN =
3
X (ohm/loop)
Kr·(X1+XN)
RFRvPE RFFwPE
X1+XN
60 deg
RFFwPE
RFRvPE R (Ohm/loop)
60 deg
X1+XN
1
Kr =
tan(60deg)
RFRvPE RFFwPE
Kr·(X1+XN)
en06000396.vsd
IEC06000396 V2 EN
Figure 95: Characteristic of FDPSPDIS for phase-to-earth fault (setting

parameters in italic), ohm/loop domain (directional lines are drawn
as "line-dot-dot-line")
Besides this, the 3I0 residual current must fulfil the conditions according to
equation 27 and equation 28.
3 × I0 ³ 0.5 × IMinOpPE
3 × I0 ³ INReleasePE
------------------------------------ × Iphmax
100
where:
IMinOpPE is the minimum operation current for forward zones
INReleasePE is the setting for the minimum residual current needed to enable operation in the phase-
to-earth fault loops (in %).
Iphmax is the maximum phase current in any of three phases.
188
6.3.2.2 Phase-to-phase fault
For a phase-to-phase fault, the measured impedance by FDPSPDIS will be

according to equation 29.
ULm - ULn
ZPHS =
-2 × ILn
ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the
phase current in the lagging phase n.
The operation characteristic is shown in figure 96.
X (W / phase)
0.5·RFRvPP 0.5·RFFwPP
Kr·X1
X1
0.5·RFFwPP
60 deg
R (W / phase)
60 deg
0.5·RFRvPP
X1
1
Kr =
tan(60 deg)
Kr·X1
0.5·RFRvPP 0.5·RFFwPP
IEC09000047 V2 EN
Figure 96: The operation characteristics for FDPSPDIS at phase-to-phase

fault (setting parameters in italic, directional lines drawn as "line-dot-
dot-line"), ohm/phase domain
In the same way as the condition for phase-to-earth fault, there are current
conditions that have to be fulfilled in order to release the phase-to-phase loop.
Those are according to equation 30 or equation 31.
3I 0 < IMinOpPE
189
INBlockPP
3I 0 < × Iph max
100
where:
IMinOpPE is the minimum operation current for earth measuring loops,
INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.
6.3.2.3 Three-phase faults
The operation conditions for three-phase faults are the same as for phase-to-phase
fault, that is equation 29, equation 30 and equation 31 are used to release the
operation of the function.
However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all

directions. At the same time the characteristic is rotated 30 degrees, counter-
clockwise. The characteristic is shown in figure 97.
X (O/phase)
4 × X1
3
90 deg
0.5·RFFwPP·K3
X1·K3 4 × RFFwPP
6
R (O/phase)
0.5·RFRvPP·K3
K3 = 2 / v(3)
30 deg
IEC05000671 V3 EN
Figure 97: The characteristic of FDPSPDIS for three-phase fault (setting

parameters in italic)
190
6.3.2.4 Load encroachment
Each of the six measuring loops has its own load encroachment characteristic based
on the corresponding loop impedance. The load encroachment functionality is
always active, but can be switched off by selecting a high setting.
The outline of the characteristic is presented in figure 98. As illustrated, the

resistive blinders are set individually in forward and reverse direction while the
angle of the sector is the same in all four quadrants.
RLdFw
ArgLd ArgLd
R
ArgLd ArgLd
RLdRv
IEC09000042 V1 EN
Figure 98: Characteristic of load encroachment function
The influence of load encroachment function on the operation characteristic is

dependent on the chosen operation mode of FDPSPDIS function. When output
signal STCNDZ is selected, the characteristic for FDPSPDIS (and also zone
measurement depending on settings) will be reduced by the load encroachment
characteristic (see figure 99, left illustration).
When output signal STCNDI is selected, the operation characteristic will be as the
right illustration in figure 99. The reach will in this case be limit by the minimum
operation current and the distance measuring zones.
191
X X
R R
STCNDZ STCNDI
en05000197.vsd
IEC05000197 V1 EN
Figure 99: Difference in operating characteristic depending on operation

mode when load encroachment is activated
When FDPSPDIS is set to operate together with a distance measuring zone the
resultant operate characteristic could look like in figure 100. The figure shows a
distance measuring zone operating in forward direction. Thus, the operating area is
highlighted in black.
"Phase selection"
"quadrilateral" zone
Distance measuring zone
Load encroachment
characteristic
Directional line
en05000673.vsd
IEC05000673 V1 EN
Figure 100: Operating characteristic in forward direction when load

encroachment is activated
192
Figure 100 is valid for phase-to-earth. During a three-phase fault, or load, when the
quadrilateral phase-to-phase characteristic is subject to enlargement and rotation
the operate area is transformed according to figure 101. Notice in particular what
happens with the resistive blinders of the "phase selection" "quadrilateral" zone.
Due to the 30-degree rotation, the angle of the blinder in quadrant one is now 90
degrees instead of the original 60 degrees. The blinder that is nominally located to
quadrant four will at the same time tilt outwards and increase the resistive reach
around the R-axis. Consequently, it will be more or less necessary to use the load
encroachment characteristic in order to secure a margin to the load impedance.
X (W / phase)
Phase selection
”Quadrilateral” zone
Distance measuring zone
R (W / phase)
IEC09000049 V1 EN
Figure 101: Operating characteristic for FDPSPDIS in forward direction for three-
phase fault, ohm/phase domain
The result from rotation of the load characteristic at a fault between two phases is
presented in fig 102. Since the load characteristic is based on the same
measurement as the quadrilateral characteristic, it will rotate with the quadrilateral
characteristic clockwise by 30 degrees when subject to a pure phase-to-phase fault.
At the same time the characteristic will "shrink" by 2/√3, from the full RLdFw and
RLdRv reach, which is valid at load or three-phase fault.
193
IEC08000437.vsd
IEC08000437 V1 EN
Figure 102: Rotation of load characteristic for a fault between two phases
There is a gain in selectivity by using the same measurement as for the

quadrilateral characteristic since not all phase-to-phase loops will be fully affected
by a fault between two phases. It should also provide better fault resistive coverage
in quadrant one. The relative loss of fault resistive coverage in quadrant four
should not be a problem even for applications on series compensated lines.
6.3.2.5 Minimum operate currents
The operation of the Phase selection with load encroachment function (FDPSPDIS)
is blocked if the magnitude of input currents falls below certain threshold values.
The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS

value of the current in phase Ln.
The phase-to-phase loop LmLn is blocked if (2·ILn<IMinOpPP).
Figure 103 presents schematically the creation of the phase-to-phase and phase-to-
earth operating conditions. Consider only the corresponding part of measuring and
194
logic circuits, when only a phase-to-earth or phase-to-phase measurement is

available within the IED.
Load encroachment block
3I 0 ³ 0.5 × IMinOpPE IRELPE

15 ms
& & t STPE
INReleasePE
3I 0 ³ × Iphmax
100 Bool to &
STCNDI
BLOCK integer
15 ms
3I 0 < IMinOpPE 10 ms 20 ms & t STPP
& t t
OR IRELPP
INBlockPP
3I 0 < × Iph max
100
IEC08000439 1 EN V1 EN
Figure 103: Phase-to-phase and phase-to-earth operating conditions (residual

current criteria)
A special attention is paid to correct phase selection at evolving faults. A STCNDI

output signal is created as a combination of the load encroachment characteristic
and current criteria, refer to figure 103. This signal can be configured to STCND
functional input signals of the distance protection zone and this way influence the
operation of the phase-to-phase and phase-to-earth zone measuring elements and
their phase related starting and tripping signals.
Figure 104 presents schematically the composition of non-directional phase

selective signals STNDLn. Internal signals ZMLnN and ZMLmLn (m and n
change between one and three according to the phase number) represent the
fulfilled operating criteria for each separate loop measuring element, that is, within
the characteristic.
195
INDL1N
INDL2N
INDL3N
15 ms
STNDPE
OR t
IRELPE
AND 15 ms
ZML1N STNDL1
OR t
AND
ZML2N
15 ms
STNDL2
OR t
AND
ZML3N
15 ms
ZML1L2 STNDL3
AND OR t
ZML2L3
AND INDL1L2
INDL2L3
ZML3L1
AND
INDL3L1
IRELPP
15 ms
STNDPP
OR t
Figure 104: Composition on non-directional phase selection signals
Composition of the directional (forward and reverse) phase selective signals is

presented schematically in figure 106 and figure 105. The directional criteria
appears as a condition for the correct phase selection in order to secure a high
phase selectivity for simultaneous and evolving faults on lines within the complex
network configurations. Internal signals DFWLn and DFWLnLm present the
corresponding directional signals for measuring loops with phases Ln and Lm.
Designation FW (figure 106) represents the forward direction as well as the
designation RV (figure 105) represents the reverse direction. All directional signals
are derived within the corresponding digital signal processor.
Figure 105 presents additionally a composition of a STCNDZ output signal, which

is created on the basis of impedance measuring conditions. This signal can be
configured to STCND functional input signals of the distance protection zone and
this way influence the operation of the phase-to-phase and phase-to-earth zone
measuring elements and their phase related starting and tripping signals.
196
INDL1N
AND
DRVL1N
INDL1L2 15 ms STRVL1
AND OR t
DRVL1L2
INDL3L1
AND
DRVL3L1 15 ms STRVPE
INDL2N OR t
AND
DRVL2N
INDL1L2 15 ms
STRVL2
AND OR t
INDL2L3 INDL1N
AND INDL2N
DRVL2L3
INDL3N Bool to STCNDZ
INDL3N INDL1L2 integer
AND INDL2L3
DRVL3N INDL3L1
INDL2L3 15 ms
STRVL3
AND OR t
INDL3L1
15 ms
AND STRVPP
OR t
Figure 105: Composition of phase selection signals for reverse direction
197
AND
INDL1N
AND 15 ms 15 ms
DFWL1N STFW1PH
AND OR t t
INDL1L2
15 ms STFWL1
AND OR t
DFWL1L2
INDL3L1
AND
AND
DFWL3L1 15 ms
STFWPE
INDL2N OR t
AND
DFWL2N
AND 15 ms
INDL1L2 STFWL2
t
AND OR
15 ms 15 ms
INDL2L3 STFW2PH
AND OR t t
AND
DFWL2L3
INDL3N
AND AND
DFWL3N 15 ms
STFWL3
t
INDL2L3
AND OR
15 ms
INDL3L1 STFW3PH
AND t
AND
15 ms
STFWPP
OR t
IEC05000201 V2 EN
Figure 106: Composition of phase selection signals for forward direction
Figure 107 presents the composition of output signals TRIP and START, where
internal signals STNDPP, STFWPP and STRVPP are the equivalent to internal
signals STNDPE, STFWPE and STRVPE, but for the phase-to-phase loops.
198
TimerPP=Off
tPP
AND AND
t
TRIP
OR OR
tPE
TimerPE=Off
t
AND AND
STNDPP
STFWPP OR
STRVPP
START
OR
STNDPE
STFWPE OR
STRVPE
IEC08000441 1 V2 EN
Figure 107: TRIP and START signal logic

FDPSPDIS
I3P* TRIP
U3P* START
BLOCK STFWL1
DIRCND STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDI
IEC06000258 V2 EN
Figure 108: FDPSPDIS function block
199

Table 105: FDPSPDIS Input signals
SIGNAL
SIGNAL
Table 106: FDPSPDIS Output signals

TRIP BOOLEAN Trip output
START BOOLEAN Start in any phase or loop
STFWL1 BOOLEAN Fault detected in phase L1 - forward direction
STFWPE BOOLEAN Earth fault detected in forward direction
STRVL1 BOOLEAN Fault detected in phase L1 - reverse direction
STRVPE BOOLEAN Earth fault detected in reverse direction
STNDL1 BOOLEAN Non directional start in L1
STNDPE BOOLEAN Non directional start, phase-earth
STFW1PH BOOLEAN Start in forward direction for single-phase fault
STFW2PH BOOLEAN Start in forward direction for two- phase fault
STFW3PH BOOLEAN Start in forward direction for thre-phase fault
STPE BOOLEAN Current conditions release of phase-earth
measuring elements
STPP BOOLEAN Current conditions release of phase-phase
measuring elements
STCNDZ INTEGER Start condition (PHS,LE and I based)
STCNDI INTEGER Start condition (LE and I based)
200

Table 107: FDPSPDIS Group settings (basic)
INBlockPP 10 - 100 %IPh 1 40 3I0 limit for blocking phase-to-phase
measuring loops
INReleasePE 10 - 100 %IPh 1 20 3I0 limit for releasing phase-to-earth
measuring loops
RLdFw 1.00 - 3000.00 ohm/p 0.01 80.00 Forward resistive reach within the load
impedance area
RLdRv 1.00 - 3000.00 ohm/p 0.01 80.00 Reverse resistive reach within the load
impedance area
ArgLd 5 - 70 Deg 1 30 Load angle determining the load
impedance area
Phase loops
Phase-Earth loops
Table 108: FDPSPDIS Group settings (advanced)

TimerPP Off - - Off Operation mode Off / On of Zone timer,
On Ph-Ph
tPP 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-Ph
TimerPE Off - - Off Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-E
201

Table 109: FDPSPDIS technical data
Minimum operate current (5-30)% of IBase -
Reactive reach, positive (0.50–3000.00) Ω/phase ± 2.0% static accuracy
sequence, forward and reverse ± 2.0 degrees static angular
accuracy
Resistive reach, positive (0.10–1000.00) Ω/phase Conditions:
sequence Voltage range: (0.1-1.1) x Ur
Reactive reach, zero sequence, (0.50–9000.00) Ω/phase Current range: (0.5-30) x Ir
forward and reverse Angle: at 0 degrees and 85
degrees
Resistive reach, zero sequence (0.50–3000.00) Ω/phase
Fault resistance, phase-to-earth (1.00–9000.00) Ω/loop
faults, forward and reverse
Fault resistance, phase-to- (0.50–3000.00) Ω/loop
phase faults, forward and reverse
Load encroachment criteria:
Load resistance, forward and (1.00–3000.00) Ω/phase
reverse (5-70) degrees
Safety load impedance angle
6.4 Full-scheme distance measuring, Mho

characteristic ZMHPDIS
Function description IEC 61850 IEC 60617 identification ANSI/IEEE

identification C37.2 device
number
Full-scheme distance protection, mho ZMHPDIS 21
characteristic
S00346 V1 EN
6.4.1 Introduction
The numerical mho line distance protection is a, up to four zone full scheme
protection for back-up detection of short circuit and earth faults. The full scheme
technique provides back-up protection of power lines with high sensitivity and low
requirement on remote end communication. The four zones have fully independent
measuring and settings, which gives high flexibility for all types of lines.
The IED can be used up to the highest voltage levels. It is suitable for the
protection of heavily loaded lines and multi-terminal lines where the requirement
for tripping is one-, two- and/or three-pole.
202
applications with single phase autoreclosing.
Built-in adaptive load compensation algorithm prevents overreaching at phase-to-

earth faults on heavily loaded power lines, see figure 109.
jX
Operation area Operation area
Operation area
No operation area No operation area
en07000117.vsd
IEC07000117 V1 EN
Figure 109: Load encroachment influence on the offset mho characteristic
(forward or reverse) or non-directional mode (offset). This makes them suitable,
together with different communication schemes, for the protection of power lines
and cables in complex network configurations, such as parallel lines, multi-
terminal lines and so on.
The possibility to use the phase-to-earth quadrilateral impedance characteristic

together with the mho characteristic increases the possibility to overcome eventual
lack of sensitivity of the mho element due to the shaping of the curve at remote end
faults.
The integrated control and monitoring functions offer effective solutions for
operating and monitoring all types of transmission and sub-transmission lines.
which means that each fault loop for phase-to-earth faults and phase-to-phase faults
are executed in parallel.
203
depending on fault type. So each distance protection zone performs like one
independent distance protection function with six measuring elements.
The distance function consists of five instances. Each instance can be selected to be
either forward or reverse with positive sequence polarized mho characteristic
alternatively self polarized offset mho characteristics with reverse offset. The
operating characteristic is in accordance to figure 110 where zone 5 is selected
offset mho.
jx
Mho, zone4
Mho, zone3
Zs=0
Mho, zone2
R
Mho, zone1
Zs=Z1
R Zs=2Z1
Offset mho, zone5
IEC09000143 V1 EN
Figure 110: Mho, offset mho characteristic and the source impedance influence on the mho characteristic
The mho characteristic has a dynamic expansion due to the source impedance.
Instead of crossing the origin as for the mho to the left of figure 110, which is only
valid where the source impedance is zero, the crossing point is moved to the
coordinates of the negative source impedance given an expansion of the circle
shown to the right of figure 110.
The polarization quantities used for the mho circle are 100% memorized positive
sequence voltages. This will give a somewhat less dynamic expansion of the mho
circle during faults. However, if the source impedance is high, the dynamic
expansion of the mho circle might lower the security of the function too much with
high loading and mild power swing conditions.
The mho distance element has a load encroachment function which cuts off a
section of the characteristic when enabled. The function is enabled by setting the
setting parameter LoadEnchMode to On. Enabling of the load encroachment
204
function increases the possibility to detect high resistive faults without interfering
with the load impedance. The algorithm for the load encroachment is located in the
Faulty phase identification with load encroachment for mho function FMPSPDIS,
where also the relevant settings can be found. Information about the load
encroachment from FMPSPDIS to the zone measurement is given in binary format
to the input signal LDCND.
6.4.2.3 Basic operation characteristics
Each impedance zone can be switched On and Off by the setting parameter
Operation.
Each zone can also be set to Non-directional, Forward or Reverse by setting the
parameter DirMode.
The operation for phase-to-earth and phase-to-phase fault can be individually

switched On and Off by the setting parameter OpModePE and OpModePP.
For critical applications such as for lines with high SIRs as well as CVTs, it is
possible to improve the security by setting the parameter ReachMode to
Underreach. In this mode the reach for faults close to the zone reach is reduced by
20% and the filtering is also introduced to increase the accuracy in the measuring.
If the ReachMode is set to Overreach no reduction of the reach is introduced and
no extra filtering introduced. The latter setting is recommended for overreaching
pilot zone, zone 2 or zone 3 elements and reverse zone where overreaching on
transients is not a major issue either because of less likelihood of overreach with
higher settings or the fact that these elements do not initiate tripping unconditionally.
The offset mho characteristic can be set in Non-directional, Forward or Reverse by

the setting parameter OffsetMhoDir. When Forward or Reverse is selected a
directional line is introduced. Information about the directional line is given from
the directional element and given to the measuring element as binary coded signal
to the input DIRCND.
The zone reach for phase-to-earth fault and phase-to-phase fault is set individually
in polar coordinates.
The impedance is set by the parameters ZPE and ZPP and the corresponding
arguments by the parameters ZAngPE and ZAngPP.
Compensation for earth-return path for faults involving earth is done by setting the
parameter KNMag and KNAng where KNMag is the magnitude of the earth-return
path and KNAng is the difference of angles between KNMag and ZPE.
Z0-Z1
KNMag =
3 × Z1
205
KNAng = arg
( Z 0 - Z1
3 × Z1
)
where
Z0 is the complex zero sequence impedance of the line in Ω/phase
Z1 is the complex positive sequence impedance of the line in Ω/phase
The phase-to-earth and phase-to-phase measuring loops can be time delayed

individually by setting the parameter tPE and tPP respectively. To release the time
delay, the operation mode for the timers, OpModetPE and OpModetPP, has to be
set to On. This is also the case for instantaneous operation.
The function can be blocked in the following ways:
• activating of input BLOCK blocks the whole function

• activating of the input BLKZ (fuse failure) blocks all output signals
• activating of the input BLKZMTD blocks the delta based algorithm
• activating of the input BLKHSIR blocks the instantaneous part of the
algorithm for high SIR values
• activating of the input BLKTRIP blocks all output signals
• activating the input BLKPE blocks the phase-to-earth fault loop outputs
• activating the input BLKPP blocks the phase-to-phase fault loop outputs
The activation of input signal BLKZ can be made by external fuse failure function
or from the loss of voltage check in the Mho supervision logic (ZSMGAPC). In
both cases the output BLKZ in the Mho supervision logic shall be connected to the
input BLKZ in the Mho distance function block (ZMHPDIS)
The input signal BLKZMTD is activated during some ms after fault has been
detected by ZSMGAPC to avoid unwanted operations due to transients. It shall be
connected to the BLKZMTD output signal of ZSMGAPC function.
At SIR values >10, the use of electronic CVT might cause overreach due to the built-
in resonance circuit in the CVT, which reduce the secondary voltage for a while.
The input BLKHSIR shall be connected to the output signal HSIR on ZSMGAPC
for increasing of the filtering and high SIR values. This is valid only when
permissive underreach scheme is selected by setting ReachMode=Underreach.
6.4.2.4 Theory of operation
The mho algorithm is based on phase comparison of a operating phasor and a

polarizing phasor. When the operating phasor leads the reference phasor by more
than 90 degrees, the function will operate and give a trip output.
206
Phase-to-phase fault
Mho
The plain mho circle has the characteristic as in figure 111. The condition for
deriving the angle β is according to equation 34.
b = arg(U L1 L 2 - I L1 L 2 × ZPP ) - arg(U pol )

where
U L1L2 is the voltage vector difference between phases L1 and L2

EQUATION1790 V2
EN
I L1L2 is the current vector difference between phases L1 and L2

EQUATION1791 V2
EN
ZPP is the positive sequence impedance setting for phase-to-phase fault

Upol is the polarizing voltage
The polarized voltage consists of 100% memorized positive sequence voltage

(UL1L2 for phase L1 to L2 fault). The memorized voltage will prevent collapse of
the mho circle for close in faults.
Operation occurs if 90≤β≤270
207
IL1L2·X
Ucomp = UL1L2 - IL1L2 • ZPP
IL1L2 • ZPP
ß
Upol
UL1L2
IL1L2·R
en07000109.vsd
IEC07000109 V1 EN
Figure 111: Simplified mho characteristic and vector diagram for phase L1-to-
L2 fault
Offset Mho
The characteristic for offset mho is a circle where two points on the circle are the
setting parameters ZPP and ZRevPP. The vector ZPP in the impedance plane has
the settable angle AngZPP and the angle for ZRevPP is AngZPP+180°.
The condition for operation at phase-to-phase fault is that the angle β between the
two compensated voltages Ucomp1 and Ucomp2 is greater than or equal to 90°
(figure 112). The angle will be 90° for fault location on the boundary of the circle.
The angle β for L1-to-L2 fault can be defined according to equation 35.
æ U -IL1L2 × ZPP ö
b = arg ç ÷
è U-(-IL1L2 × ZRevPP) ø
where
U is the UL1L2 voltage

EQUATION1800 V1 EN
ZRevPP is the positive sequence impedance setting for phase-to-phase fault in reverse direction
208
IL1L2jX
Ucomp1 = UL1L2 - IL1L2 • ZPP

IL1L2 • ZPP
U
Ucomp2 = U = IF•ZF=UL1L2
IL1L2R
- IL1L2 • Z RevPP
en07000110.vsd
IEC07000110 V1 EN
Figure 112: Simplified offset mho characteristic and voltage vectors for phase
L1-to-L2 fault.
Operation occurs if 90≤β≤270.
Offset mho, forward direction

When forward direction has been selected for the offset mho, an extra criteria
beside the one for offset mho (90<β<270) is introduced, that is the angle φ between
the voltage and the current must lie between the blinders in second quadrant and
fourth quadrant. See figure 113. Operation occurs if 90≤β≤270 and
ArgDir≤φ≤ArgNegRes.
where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional element,
ZDMRDIR.
ArgNegRes is the setting parameter for directional line in second quadrant in the directional element,
ZDMRDIR.
β is calculated according to equation 35
The directional information is brought to the mho distance measurement from the
mho directional element as binary coded information to the input DIRCND. See
Directional impedance element for mho characteristic (ZDMRDIR) for information
about the mho directional element.
209
IL1L2jX
ZPP
UL1L2
ArgNegRes f
IL1L2
ArgDir
en07000111.vsd
IEC07000111 V1 EN
Figure 113: Simplified offset mho characteristic in forward direction for phase
L1-to-L2 fault
Offset mho, reverse direction

The operation area for offset mho in reverse direction is according to figure 114.
The operation area in second quadrant is ArgNegRes+180°.
Operation occurs if 90≤β≤270 and 180° - ArgDir ≤φ ≤ ArgNegRes + 180°
The β is derived according to equation 35 for the mho circle and φ is the angle
between the voltage and current.
210
ZPP
ArgNegRes
ϕ
IL1L2
ArgDir R
UL1L2
ZRevPP
en06000469.eps
IEC06000469 V1 EN
Figure 114: Operation characteristic for reverse phase L1-to-L2 fault
Phase-to-earth fault
Mho
The measuring of earth faults uses earth-return compensation applied in a
conventional way. The compensation voltage is derived by considering the
influence from the earth-return path.
For an earth fault in phase L1, the compensation voltage Ucomp can be derived, as
shown in figure 115.
Ucomp = U pol - I L1 × Z loop

where
Upol is the polarizing voltage (memorized UL1 for Phase L1-to- earth fault)
Zloop is the loop impedance, which in general terms can be expressed as
Z1+ZN = Z 1 × 1 + KN ( )
211
where
Z1 is the positive sequence impedance of the line (Ohm/phase)
KN is the zero-sequence compensator factor
The angle β between the Ucomp and the polarize voltage Upol for a L1-to-earth
fault is
b = arg [UL1 -(IL1 +3I0 · KN ) · ZPE ] - arg( Upol)

GUID-A9492CDF-D3B7-4DC5-8E06-6638BEE2540B V1 EN (Equation 38)
where
UL1 is the phase voltage in faulty phase L1
IL1 is the phase current in faulty phase L1
IA is the phase current in faulty phase A
3I0 is the zero-sequence current in faulty phase L1
KN Z0-Z1
EQUATION1593 V1 EN
3 × Z1
EQUATION1594 V1 EN
the setting parameter for the zero sequence compensation consisting of the
magnitude KN and the angle KNAng.
Upol is the 100% of positive sequence memorized voltage UL1
Vpol is the 100% of positive sequence memorized voltage VA
IL1·X
IL1·ZN
Ucomp
IL1 • Zloop
IL1·ZPE
Upol
f
IL1 (Ref) IL1·R
en06000472_2.vsd
IEC06000472 V2 EN
Figure 115: Simplified offset mho characteristic and vector diagram for phase
L1-to-earth fault
212
Offset mho
The characteristic for offset mho at earth fault is a circle containing the two vectors
from the origin ZPE and ZRevPE where ZPE and ZrevPE are the setting reach for
the positive sequence impedance in forward respective reverse direction. The
vector ZPE in the impedance plane has the settable angle AngZPE and the angle for
ZRevPP is AngZPE+180°.
The condition for operation at phase-to-earth fault is that the angle β between the
two compensated voltages Ucomp1 and Ucomp2 is greater or equal to 90° see
figure 116. The angle will be 90° for fault location on the boundary of the circle.
The angle β for L1-to-earth fault can be defined as
æ UL1- IL1L × ZPE ö

b = arg ç ÷
è UL1-(- IL1 × Z Re vPE ) ø
where
is the phase L1 voltage
U L1
EQUATION1
805 V1 EN
IL1L 2 • jX
U comp1 = UL1 - I L1• ZPE

IL1 • ZPE
UL1
U comp2 = UL1 - (-IL1 • ZRevPE)
IL1L2 • R
- I L1 • Z Re vPe
en 06000465.vsd
IEC06000465 V1 EN
Figure 116: Simplified offset mho characteristic and voltage vector for phase L1-
to-L2 fault
213
Offset mho, forward direction

In the same way as for phase-to-phase fault, selection of forward direction of offset
mho will introduce an extra criterion for operation. Beside the basic criteria for
offset mho according to equation 41 and 90≤β≤270, also the criteria that the angle
φ between the voltage and the current must lie between the blinders in second and
fourth quadrant. See figure 117. Operation occurs if 90≤β≤270 and
ArgDir≤φ≤ArgNegRes.
where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional element,
ZDMRDIR.
ArgNegRes is the setting parameter for directional line in second quadrant in the directional element,
ZDMRDIR.
β is calculated according to equation 41
IL1 jX
UL1
ArgNegRes f
IL1 IL1·R
ArgDir
en 06000466.vsd
IEC06000466 V1 EN
Figure 117: Simplified characteristic for offset mho in forward direction for L1-to-
earth fault
Offset mho, reverse direction

In the same way as for offset in forward direction, the selection of offset mho in
reverse direction will introduce an extra criterion for operation compare to the
normal offset mho. The extra is that the angle between the fault voltage and the
fault current shall lie between the blinders in second and fourth quadrant. The
operation area in second quadrant is limited by the blinder defined as 180° -ArgDir
and in fourth quadrant ArgNegRes+180°, see figure 118.
214
The conditions for operation of offset mho in reverse direction for L1-to-earth fault
is 90≤β≤270 and 180°-Argdir≤φ≤ArgNegRes+180°.
The β is derived according to equation 41 for the offset mho circle and φ is the
angle between the voltage and current.
ZPE
ArgNegRes
ϕ
IL1
ArgDir R
UL1
ZRevPE
en06000470.eps
IEC06000470 V1 EN
Figure 118: Simplified characteristic for offset mho in reverse direction for L1-to-
earth fault
215

ZMHPDIS
I3P* TRIP
U3P* TRL1
CURR_INP* TRL2
VOLT_INP* TRL3
POL_VOLT* TRPE
BLOCK TRPP
BLKZ START
BLKZMTD STL1
BLKHSIR STL2
BLKTRIP STL3
BLKPE STPE
BLKPP STPP
DIRCND
STCND
LDCND
IEC06000423 V2 EN
Figure 119: ZMHPDIS function block

Table 110: ZMHPDIS Input signals
I3P GROUP - Connection for current sample signals
SIGNAL
U3P GROUP - Connection for voltage sample signals
SIGNAL
CURR_INP GROUP - Connection for current signals
SIGNAL
VOLT_INP GROUP - Connection for voltage signals
SIGNAL
POL_VOLT GROUP - Connection for polarizing voltage
SIGNAL
BLKZ BOOLEAN 0 Block due to fuse failure
BLKZMTD BOOLEAN 0 Block signal for blocking of time domaine function
BLKHSIR BOOLEAN 0 Blocks time domain function at high SIR
BLKTRIP BOOLEAN 0 Blocks all operate output signals
BLKPE BOOLEAN 0 Blocks phase-to-earth operation
BLKPP BOOLEAN 0 Blocks phase-to-phase operation
LDCND INTEGER 0 External load condition (loop enabler)
216
Table 111: ZMHPDIS Output signals

TRIP BOOLEAN Trip General
TRL1 BOOLEAN Trip phase L1
TRPE BOOLEAN Trip phase-to-earth
TRPP BOOLEAN Trip phase-to-phase
START BOOLEAN Start General
STL1 BOOLEAN Start phase L1
STPE BOOLEAN Start phase-to-earth
STPP BOOLEAN Start phase-to-phase

Table 112: ZMHPDIS Group settings (basic)
Operation Off - - On Operation Off/On
On
IBase 1 - 99999 A 1 3000 Base current
DirMode Off - - Forward Direction mode
Offset
Forward
Reverse
LoadEnchMode Off - - Off Load enchroachment mode Off/On
On
ReachMode Overreach - - Overreach Reach mode Over/Underreach
Underreach
OpModePE Off - - On Operation mode Off / On of Phase-Earth
On loops
ZPE 0.005 - 3000.000 ohm/p 0.001 30.000 Positive sequence impedance setting for
Phase-Earth loop
ZAngPE 10 - 90 Deg 1 80 Angle for positive sequence line
impedance for Phase-Earth loop
KN 0.00 - 3.00 - 0.01 0.80 Magnitud of earth return compensation
factor KN
KNAng -180 - 180 Deg 1 -15 Angle for earth return compensation
factor KN
ZRevPE 0.005 - 3000.000 ohm/p 0.001 30.000 Reverse reach of the phase to earth
loop(magnitude)
tPE 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to
earth elements
217

IMinOpPE 10 - 30 %IB 1 20 Minimum operation phase to earth current
OpModePP Off - - On Operation mode Off / On of Phase-
On Phase loops
ZPP 0.005 - 3000.000 ohm/p 0.001 30.000 Impedance setting reach for phase to
phase elements
ZAngPP 10 - 90 Deg 1 85 Angle for positive sequence line
impedance for Phase-Phase elements
ZRevPP 0.005 - 3000.000 ohm/p 0.001 30.000 Reverse reach of the phase to phase
loop(magnitude)
tPP 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to phase
IMinOpPP 10 - 30 %IB 1 20 Minimum operation phase to phase
current
Table 113: ZMHPDIS Group settings (advanced)

OffsetMhoDir Non-directional - - Non-directional Direction mode for offset mho
Forward
Reverse
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
OpModetPP Off - - On Operation mode Off / On of Zone timer,
On Ph-ph

Table 114: ZMHPDIS technical data
Number of zones with selectable Max 4 with selectable direction -
directions
Minimum operate current (10–30)% of IBase -
Positive sequence impedance, (0.005–3000.000) W/phase ± 2.0% static accuracy

phase-to-earth loop Conditions:
Positive sequence impedance (10–90) degrees
angle, phase-to-earth loop
Angle: at 0 degrees and 85
Reverse reach, phase-to-earth (0.005–3000.000) Ω/phase degrees
loop (Magnitude)
Magnitude of earth return (0.00–3.00)
compensation factor KN
Angle for earth compensation (-180–180) degrees
factor KN
with CVT’s and 0.5<SIR<30
Timers (0.000-60.000) s ± 0.5% ± 10 ms
218

Operate time 20 ms typically (with static -
outputs)
6.5 Full-scheme distance protection, quadrilateral for

earth faults ZMMPDIS, ZMMAPDIS

Fullscheme distance protection, ZMMPDIS 21
quadrilateral for earth faults (zone 1)
S00346 V1 EN
Fullscheme distance protection, ZMMAPDIS 21

quadrilateral for earth faults (zone 2-5)
S00346 V1 EN
6.5.1 Introduction
The line distance protection is a zone protection with three fault loops for phase-to-
earth fault for each of the independent zones. Individual settings for each zone
resistive and reactive reach give flexibility for use on overhead lines and cables of
different types and lengths.
The Full-scheme distance protection, quadrilateral for earth faults functions

ZMMDPIS and ZMMAPDIS have functionality for load encroachment, which
increases the possibility to detect high resistive faults on heavily loaded lines , see
figure 66.
219
Forward
operation
Reverse
operation
en05000034.vsd
IEC05000034 V1 EN
Figure 120: Typical quadrilateral distance protection zone with Phase selection,
quadrilateral characteristic with settable angle function FRPSPDIS
activated
applications with single phase auto-reclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at

load exporting end at phase to earth faults on heavily loaded power lines.
(forward or reverse) or non-directional mode. This makes them suitable, together
with different communication schemes, for the protection of power lines and cables
in complex network configurations, such as parallel lines, multi-terminal lines.
The different fault loops within the IED are operating in parallel in the same
principle as a full scheme measurement.
Figure 121 presents an outline of the different measuring loops for the basic five,
impedance-measuring zones l.
220
L1-N L2-N L3-N Zone 1
en07000080.vsd
IEC07000080 V1 EN
Figure 121: The different measuring loops at line-earth fault and phase-phase
fault.
The distance measuring zone include three impedance measuring loops; one fault
loop for each phase.
The distance measuring zone will essentially operate according to the non-
directional impedance characteristics presented in figure 122. The characteristic is
illustrated with the full loop reach.
221
X (Ohm/loop)
R1PE+Rn
RFPE RFPE
X0PE-X1PE
Xn =
3
X1PE+Xn R0PE-R1PE
Rn =
3
jN jN
R (Ohm/loop)
RFPE RFPE
X1PE+Xn
RFPE RFPE
en08000280-2-en.vsd
R1PE+Rn
IEC08000280 V1 EN
Figure 122: Characteristic for the phase-to-earth measuring loops, ohm/loop

domain.
The fault loop reach may also be presented as in figure 123.
ILn R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 ) en06000412.vsd
IEC06000412 V1 EN
222
measuring point to the fault location. The RFPE is presented in order to “convey”
the fault resistance reach.
The zone may be set to operate in Non-directional, Forward, Off or Reverse

direction through the setting OperationDir. The result from respective set value is
illustrated in figure 124. It may be convenient to once again mention that the
impedance reach is symmetric, in the sense that it is conform for forward and
reverse direction. Therefore, all reach settings apply to both directions.
X X X
R R R
en05000182.vsd
IEC05000182 V1 EN
Figure 124: Directional operating modes of the distance measuring zone
The operation of the distance measuring zone is blocked if the magnitude of input
currents fall below certain threshold values.
currents.
sum of the three phase currents, that is, residual current 3I0.
Both current limits IMinOpPE and IMinOpIN are automatically

reduced to 75% of regular set values if the zone is set to operate in
reverse direction, that is, OperationDir=Reverse.
223
current. Apparent impedances are calculated and compared with the set limits.
respective phase Ln (n = 1, 2, 3).
The calculation of the apparant impedances at phase-to-earth fault follow equation

42
The earth return compensation applies in a conventional manner.
U L1
Z app = ------------------------------
I L1 + I N × KN
Where:
KN is defined as:
Z0 - Z1
KN =
3 × Z1
EQUATION 2105 V1 EN
Z 0 = R0 + jX 0
EQUATION2106 V1 EN
Z1 = R1 + jX 1
EQUATION2107 V1 EN
Where
Here IN is a phasor of the residual current in IED point. This results in the same

reactance X.
The formula given in equation 42 is only valid for no loaded radial feeder
applications. When load is considered in the case of single line-to-earth fault,
224

at importing end. IED has an adaptive load compensation which increases the
X Di
U = R × i + ------ × -----
w 0 Dt
X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt
X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt
with
w0 = 2 × p × f 0
where:
The algorithm calculates Rm measured resistance from the equation for the real
value of the voltage and substitute it in the equation for the imaginary part. The
equal to:
Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
225
Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )

6.5.2.5 Directional lines
The evaluation of the directionality takes place in the Directional impedance

element for mho characteristic ZDMRDIR function. Equation 49 is used to classify
that the fault is in forward direction for line-to-earth fault.
0.85 × U1L1 + 0.15 × U1L1M

I L1
where:
U1L1 is positive sequence phase voltage in phase L1
degrees respectively (see figure 125) and it should not be changed unless system
studies have shown the necessity.
ZDMRDIR gives a binary coded signal on the output STDIRCND depending on

the evaluation where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1
adds 4 etc.
226
ArgNegRes
ArgDir
R
en05000722.vsd
IEC05000722 V1 EN
Figure 125: Setting angles for discrimination of forward and reverse fault

by 180 degrees.
The polarizing voltage is available as long as the positive-sequence voltage

exceeds 5% of the set base voltage UBase. So the directional element can use it for
all unsymmetrical faults including close-in faults.
restored.
After 100 ms, the following occurs:
(between 10 and 30% of the set IED rated current IBase), the condition seals in.
227

The design of distance protection zone 1 is presented for all measuring: phase-to-
earth loops.
Phase-to-earth related signals are designated by LnE, where n represents the

corresponding phase number (L1E, L2E, and L3E).


above.
from the phase selection function within the IED, which are converted within the
zone measuring function into corresponding boolean expressions for each
condition separately. It is connected to the Phase selection with load
enchroachment, quadrilateral characteristic (FDPSPDIS) function output STCNDZ.
The input signal DIRCND is used to give condition for directionality for the
distance measuring zones. The signal contains binary coded information for both
forward and reverse direction. The zone measurement function filter out the
relevant signals on the DIRCND input depending on the setting of the parameter
OperationDir. It shall be configured to the DIRCND output on the Directional
impedance element for mho characteristic (ZDMRDIR) function.
228
STCND
AND STNDL1N
L1N
AND STNDL2N
L2N
STNDL3N
L3N AND
OR STNDPE
OR
VTSZ STND
OR AND
BLOCK
BLK
en06000408.vsd
IEC06000408 V1 EN
Figure 126: Conditioning by a group functional input signal STCND
Composition of the phase starting signals for a case, when the zone operates in a non-
STNDL1N 15 ms
AND t STL1
STNDL2N 15 ms
AND t STL2
STNDL3N 15 ms
AND t STL3
15 ms
AND t START
OR
BLK
en06000409.vsd
IEC06000409 V1 EN
operates in directional (forward or reverse) mode, see figure 128.
229
STNDL1N
DIRL1N AND
OR STZMPE.
&
STNDL2N
DIRL2N AND
STNDL3N 15 ms
STL1
& t
DIRL3N AND
15 ms
STL2
& t
15 ms
STL3
& t
BLK
15 ms
OR START
& t
en07000081.vsd
IEC07000081 V1 EN
Figure 128: Composition of starting signals in directional operating mode
in figure 129.
Timer tPE=On tPE

AND t
STZMPE
15ms
BLKTR AND t
TRIP
STL1 AND TRL1
STL2 AND TRL2
STL3 AND TRL3
en07000082.vsd
IEC07000082 V1 EN
Figure 129: Tripping logic for the distance protection zone one
230

ZMMPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
IEC06000454 V2 EN
Figure 130: ZMMPDIS function block
ZMMAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
IEC09000947 V1 EN
Figure 131: ZMMAPDIS function block

Table 115: ZMMPDIS Input signals
SIGNAL
SIGNAL
BLKZ BOOLEAN 0 Blocks all output by fuse failure signal
Table 116: ZMMPDIS Output signals

231

loop
Table 117: ZMMAPDIS Input signals

SIGNAL
SIGNAL
BLKZ BOOLEAN 0 Blocks all output by fuse failure signal
Table 118: ZMMAPDIS Output signals

loop

Table 119: ZMMPDIS Group settings (basic)
On
232

Forward
Reverse
On Ph-E
Phase-Earth loops
Phase-Earth loops
Table 120: ZMMAPDIS Group settings (basic)

On
Forward
Reverse
On Ph-E
Phase-Earth loops
233

Table 121: ZMMPDIS technical data
Number of zones with selectable direction -
Minimum operate current (10-30)% of IBase -
Positive sequence reactance (0.50-3000.00) W/phase ± 2.0% static accuracy
± 2.0 degrees static angular
Positive sequence resistance (0.10-1000.00) Ω/phase accuracy
Zero sequence reactance (0.50-9000.00) Ω/phase Conditions:
Zero sequence resistance (0.50-3000.00) Ω/phase Current range: (0.5-30) x Ir
Fault resistance, Ph-E (1.00-9000.00) W/loop Angle: at 0 degrees and 85
degrees
with CCVT’s and 0.5<SIR<30
6.6 Directional impedance element for mho

characteristic and additional distance protection
directional function for earth faults ZDMRDIR,
ZDARDIR

Directional impedance element for mho ZDMRDIR 21D
characteristic
S00346 V1 EN

Additional distance protection ZDARDIR -
directional function for earth faults
S00346 V1 EN
234
6.6.1 Introduction
The phase-to-earth impedance elements can be optionally supervised by a phase
unselective directional function based on symmetrical components.
6.6.2.1 Directional impedance element for mho characteristic ZDMRDIR
The evaluation of the directionality takes place in Directional impedance element

for mho characteristic (ZDMRDIR). Equation 50 and equation 51 are used to
classify that the fault is in the forward direction for phase-to-earth fault and phase-
to-phase fault respectively.
0.85 × U1L1 + 0.15 × U1L1M

I L1
0.85 × U1L1L 2 + 0.15 × U1L1L 2M

I L1L 2
Where:
ArgDir Setting for the lower boundary of the forward directional characteristic, by default set to
15 (= -15 degrees)
ArgNegRes Setting for the upper boundary of the forward directional characteristic, by default set to
115 degrees, see figure 132 for mho characteristics.
U1L1 Positive sequence phase voltage in phase L1
U1L1M Positive sequence memorized phase voltage in phase L1
IL1 Phase current in phase L1
U1L1L2 Voltage difference between phase L1 and L2 (L2 lagging L1)
U1L1L2M Memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 Current difference between phase L1 and L2 (L2 lagging L1)
The default settings for ArgDir and ArgNegRes are 15 (= -15) and 115 degrees
respectively (see figure 132) and they should not be changed unless system studies
show the necessity.
If one sets DirEvalType to Comparator (which is recommended when using the

mho characteristic) then the directional lines are computed by means of a comparator-
type calculation, meaning that the directional lines are based on mho-circles (of
infinite radius). The default setting value Impedance otherwise means that the
235
directional lines are implemented based on an impedance calculation equivalent to

the one used for the quadrilateral impedance characteristics.
When Directional impedance element for mho characteristic

(ZDMRDIR) is used together with Fullscheme distance protection,
mho characteristic (ZMHPDIS) the following settings for
parameter DirEvalType is vital:
• alternative Comparator is strongly recommended
• alternative Imp/Comp should generally not be used
• alternative Impedance should not be used. This altenative is
intended for use together with Distance protection zone,
quadrilateral characteristic (ZMQPDIS)
X
Zset reach point
ArgNegRes
-ArgDir R
-Zs
en06000416.vsd
IEC06000416 V1 EN
Figure 132: Setting angles for discrimination of forward fault

by 180 degrees.

The memory voltage is used for 100ms or until the positive sequence voltage is
restored. After 100ms, the following occurs:
236
• If the current is still above the set value of the minimum operating current the
condition seals in.
• If the current decreases below the minimum operating value, no directional
indications will be given until the positive sequence voltage exceeds 10% of
its rated value.
The Directional impedance element for mho characteristic (ZDMRDIR) function

has the following output signals:
The STDIRCND output provides an integer signal that depends on the evaluation
and is derived from a binary coded signal as follows:
bit 11 bit 10 bit 9 bit 8 bit 7 bit 6

(2048) (1024) (512) (256) (128) (64)
STRVL3L1= STRVL2L3= STRVL1L2= STRVL3N=1 STRVL2N=1 STRVL1N=1
1 1 1
bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
(32) (16) (8) (4) (2) (1)
STFWL3L1= STFWL2L3= STFWL1L2= STFWL3N=1 STFWL2N=1 STFWL1N=1
1 1 1
The STFW output is a logical signal with value 1 or 0. It is made up as an OR-

function of all the forward starting conditions, that is, STFWL1N, STFWL2N,
STFWL3N, STFWL1L2, STFWL2L3 and STFWL3L1. The STRV output is
similar to the STFW output, the only difference being that it is made up as an OR-
function of all the reverse starting conditions, that is, STRVL1N, STRVL2N,
STRVL3N, STRVL1L2, STRVL2L3 and STRVL3L1.
Values for the following parameters are calculated, and may be viewed as service
values:
• resistance phase L1
• reactance phase L1
• direction phase L1
237
6.6.2.2 Additional distance protection directional function for earth faults

ZDARDIR
A Mho element needs a polarizing voltage for its operation. The positive-sequence
memory-polarized elements are generally preferred. The benefits include:
• The greatest amount of expansion for improved resistive coverage. These

elements always expand back to the source.
• Memory action for all fault types. This is very important for close-in three-
phase faults.
• A common polarizing reference for all six distance-measuring loops. This is
important for single-pole tripping, during a pole-open period.
There are however some situations that can cause security problems like reverse
phase to phase faults and double phase-to-earth faults during high load periods. To
solve these, additional directional element is used.
For phase-to-earth faults, directional elements using sequence components are very
reliable for directional discrimination. The directional element can be based on one
of following types of polarization:
• Zero-sequence voltage
• Negative-sequence voltage
• Zero-sequence current
These additional directional criteria are evaluated in the Additional distance

protection directional function for earth faults (ZDARDIR).
Zero-sequence voltage polarization is utilizing the phase relation between the zero-
sequence voltage and the zero-sequence current at the location of the protection.
The measurement principle is illustrated in figure 133.
238
- 3U 0
AngleOp
AngleRCA
3I 0
en06000417.vsd
IEC06000417 V1 EN
Figure 133: Principle for zero-sequence voltage polarized additional directional

element
Negative-sequence voltage polarization is utilizing the phase relation between the

negative-sequence voltage and the negative-sequence current at the location of the
protection.
Zero-sequence current polarization is utilizing the phase relation between the zero-
sequence current at the location of the protection and some reference zero-
sequence current, for example, the current in the neutral of a power transformer.
The principle of zero-sequence voltage polarization with zero-sequence current

compensation is described in figure 134. The same also applies for the negative-
sequence function.
Z0 SA I0 I0
Z0 Line Z0 SB
Charac te ris tic
ang le
U0 U0
K*I0
U0 + K*I0
IF
en06000418.vsd
IEC06000418 V1 EN
Figure 134: Principle for zero sequence compensation
Note that the sequence based additional directional element cannot give per phase
information about direction to fault. This is why it is an AND-function with the
normal directional element that works on a per phase base. The release signals are
per phase and to have a release of a measuring element in a specific phase both the
additional directional element, and the normal directional element, for that phase
must indicate correct direction.
239
Normal
directional Release of distance
element measuring element
L1N, L2N, L3N L1N, L2N, L3N
AND
Additional
directional AND per
element phase
en06000419.vsd
IEC06000419 V1 EN
Figure 135: Earth distance element directional supervision

ZDMRDIR
I3P* DIR_CURR
U3P* DIR_VOLT
DIR_POL
STFW
STRV
STDIRCND
IEC06000422 V2 EN
Figure 136: ZDMRDIR function block
ZDARDIR
I3P* STFWPE
U3P* STRVPE
I3PPOL* DIREFCND
DIRCND
IEC06000425 V2 EN
Figure 137: ZDARDIR function block

Table 122: ZDMRDIR Input signals
I3P GROUP - group connection for current abs 1
SIGNAL
U3P GROUP - group connection for voltage abs 1
SIGNAL
240
Table 123: ZDMRDIR Output signals

DIR_CURR GROUP SIGNAL Group connection
DIR_VOLT GROUP SIGNAL Group connection
DIR_POL GROUP SIGNAL Group connection
STFW BOOLEAN Start in forward direction
STRV BOOLEAN Start in reverse direction
STDIRCND INTEGER Binary coded directional information per
measuring loop
Table 124: ZDARDIR Input signals

I3P GROUP - Current signals
SIGNAL
U3P GROUP - Voltage signals
SIGNAL
I3PPOL GROUP - Polarisation current signals
SIGNAL
DIRCND INTEGER 0 Binary coded directional signal
Table 125: ZDARDIR Output signals

STFWPE BOOLEAN Forward start signal from phase-to-ground
directional element
STRVPE BOOLEAN Reverse start signal from phase-to-ground
directional element
DIREFCND INTEGER Start direction Binary coded

Table 126: ZDMRDIR Group settings (basic)
IBase 1 - 99999 - 1 3000 Base setting for current level
UBase 0.05 - 2000.00 - 0.05 400.00 Base setting for voltage level
DirEvalType Impedance - - Comparator Directional evaluation mode Impedance /
Comparator Comparator
Imp/Comp
ArgNegRes 90 - 175 Deg 1 115 Angle of blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
Phase-Earth loops
Phase loops
241
Table 127: ZDARDIR Group settings (basic)

IBase 1 - 99999 A 1 3000 Base setting for current values
UBase 0.05 - 2000.00 kV 0.05 400.00 Base setting for voltage level in kV
PolMode -3U0 - - -3U0 Polarization quantity for opt dir function
-U2 for P-E faults
IPol
Dual
-3U0Comp
-U2comp
AngleRCA -90 - 90 Deg 1 75 Characteristic relay angle (= MTA or
base angle)
I> 1 - 200 %IB 1 5 Minimum operation current in % of IBase
UPol> 1 - 100 %UB 1 1 Minimum polarizing voltage in % of UBase
IPol> 5 - 100 %IB 1 10 Minimum polarizing current in % of IBase
Table 128: ZDARDIR Group settings (advanced)

AngleOp 90 - 180 Deg 1 160 Operation sector angle
Kmag 0.50 - 3000.00 ohm 0.01 40.00 Boost-factor in -U0comp and -U2comp
polarization
6.7 Mho impedance supervision logic ZSMGAPC

Mho Impedance supervision logic ZSMGAPC - -
6.7.1 Introduction
The Mho impedance supervision logic (ZSMGAPC) includes features for fault
inception detection and high SIR detection. It also includes the functionality for
loss of potential logic as well as for the pilot channel blocking scheme.
ZSMGAPC can mainly be decomposed in two different parts:
1. A fault inception detection logic

2. High SIR detection logic
242
6.7.2.1 Fault inception detection
The aim for the fault inception detector is to detect quickly that a fault has occurred
on the system.
The fault inception detection detects instantaneous changes in any phase currents
or zero sequence current in combination with a change in the corresponding phase
voltage or zero sequence voltage. If the change of any phase current and
corresponding phase voltage or 3U0 and 3I0 exceeds the settings DeltaI and
DeltaU respectively. Delta3U0 and Delta3I0 and the input signal BLOCK is not
activated, the output signal FLTDET is activated indicating that a system fault has
occurred.
If the setting PilotMode is set to On in blocking scheme and the fault inception
function has detected a system fault, a block signal BLKCHST will be issued and
send to remote end in order to block the overreaching zones. Different criteria has
to be fulfilled for sending the BLKCHST signal:
1. The setting PilotMode has to be set to On

2. The breaker has to be closed, that is, the input signal CBOPEN has to be
deactivated
3. A reverse fault should have been detected while the carrier send signal is not
blocked, that is, input signal REVSTART is activated and input signal
BLOCKCS is not activated
Or
A fault inception is detected
If it is later detected that it was an internal fault that made the function issue the
BLKCHST signal, the function will issue a CHSTOP signal to unblock the remote
end. The criteria that have to be fulfilled for this are:
1. The function has to be in pilot mode, that is, the setting PilotMode has to be
set to On
2. The carrier send signal should be blocked, that is, input signal BLOCKCS is
On and,
3. A reverse fault should not have been detected while the carrier send signal was
not blocked, that is, input signals REVSTART and BLOCKCS is not activated.
ZSMGAPC function has a built in loss of voltage detection based on the evaluation
of the change in phase voltage or the change in zero sequence voltage (3U0). It
operates if the change in phase voltages exceeds the setting DeltaU or 3U0 exceeds
the setting Delta3U0.
If loss of voltage is detected, but not a fault inception, the distance protection
function will be blocked. This is also the case if a fuse failure is detected by the
243
external fuse failure function and activate the input FUSEFAIL. Those blocks are
generated by activating the output BLKZ, which shall be connected to the input
BLKZ on the distance Mho function block.
During fault inception a lot of transients will be developed which in turn might
cause the distance function to overreach. The Mho supervision logic (ZSMGAPC)
will increase the filtering during the most transient period of the fault. This is done
by activating the output BLKZMD, which shall be connected to the input
BLKZMTD on mho distance function block.
High SIR detection

High SIR values increases the likelihood that CVT will introduce a prolonged and
distorted transient, increasing the risk for overreach of the distance function.
The SIR function calculates the SIR value as the source impedance divided by the
setting Zreach and activates the output signal HSIR if the calculated value for any
of the six basic shunt faults exceed the setting SIRLevel. The HSIR signal is
intended to block the delta based mho impedance function.

ZSMGAPC
I3P* BLKZMTD
U3P* BLKCHST
BLOCK CHSTOP
REVSTART HSIR
BLOCKCS
CBOPEN
IEC06000426 V2 EN
Figure 138: ZSMGAPC function block

Table 129: ZSMGAPC Input signals
I3P GROUP - Three phase current samples and DFT magnitude
SIGNAL
U3P GROUP - Three phase phase-neutral voltage samples and
SIGNAL DFT magnitude
BLOCK BOOLEAN 0 Block of the function
REVSTART BOOLEAN 0 Indication of reverse start
BLOCKCS BOOLEAN 0 Blocks the blocking carrier signal to remote end
CBOPEN BOOLEAN 0 Indicates that the breaker is open
244
Table 130: ZSMGAPC Output signals

BLKZMTD BOOLEAN Block signal for blocking of time domained mho
BLKCHST BOOLEAN Blocking signal to remote end to block
overreaching zone
CHSTOP BOOLEAN Stops the blocking signal to remote end
HSIR BOOLEAN Indication of source impedance ratio above set limit

Table 131: ZSMGAPC Group settings (basic)
IBase 1 - 99999 A 1 3000 Base value for current measurement
UBase 0.05 - 2000.00 kV 0.05 400.00 Base value for voltage measurement
PilotMode Off - - Off Pilot mode Off/On
On
Zreach 0.1 - 3000.0 ohm 0.1 38.0 Line impedance
IMinOp 10 - 30 %IB 1 20 Minimum operating current for SIR
measurement
Table 132: ZSMGAPC Group settings (advanced)

DeltaI 0 - 200 %IB 1 10 Current change level in %IB for fault
inception detection
Delta3I0 0 - 200 %IB 1 10 Zero seq current change level in % of IB
DeltaU 0 - 100 %UB 1 5 Voltage change level in %UB for fault
inception detection
Delta3U0 0 - 100 %UB 1 5 Zero seq voltage change level in % of UB
SIRLevel 5 - 15 - 1 10 Settable level for source impedance ratio
6.8 Faulty phase identification with load encroachment

FMPSPDIS

Faulty phase identification with load FMPSPDIS 21
encroachment for mho
S00346 V1 EN
245
6.8.1 Introduction
The operation of transmission networks today is in many cases close to the stability
limit. Due to environmental considerations the rate of expansion and reinforcement
of the power system is reduced, for example difficulties to get permission to build
new power lines. The ability to accurate and reliable classifying the different types
of fault so that single phase tripping and autoreclosing can be used plays an
important roll in this matter.
The phase selection function is design to accurate select the proper fault loop in the
distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may in
some cases interfere with the distance protection zone reach and cause unwanted
operation. Therefore the function has a built in algorithm for load encroachment,
which gives the possibility to enlarge the resistive setting of the measuring zones
without interfering with the load.
The output signals from the phase selection function produce important
information about faulty phase(s), which can be used for fault analysis as well.
6.8.2.1 The phase selection function
Faulty phase identification with load encroachment for mho (FMPSPDIS) function
can be decomposed into six different parts:
1. A high speed delta based current phase selector

2. A high speed delta based voltage phase selector
3. A symmetrical components based phase selector
4. Fault evaluation and selection logic
5. A load encroachment logic
6. A blinder logic
The total function can be blocked by activating the input BLOCK.
Delta based current and voltages

The delta based fault detection function uses adaptive technique and is based on
patent US4409636.
The aim of the delta based phase selector is to provide very fast and reliable phase
selection for releasing of tripping from the high speed Mho measuring element and
is essential to Directional Comparison Blocking scheme (DCB), which uses Power
Line Carrier (PLC) communication system across the protected line.
The current and voltage samples for each phase passes through a notch filter that
filters out the fundamental components. Under steady state load conditions or when
no fault is present, the output of the filter is zero or close to zero. When a fault
246
occurs, currents and voltages change resulting in sudden changes in the currents
and voltages resulting in non-fundamental waveforms being introduced on the line.
At this point the notch filter produces significant non-zero output. The filter output
is processed by the delta function. The algorithm uses an adaptive relationship
between phases to determine if a fault has occurred, and determines the faulty phases.
The current and voltage delta based phase selector gives a real output signal if the
following criterion is fulfilled (only phase L1 shown):
Max(ΔUL1,ΔUL2,ΔUL3)>DeltaUMinOp
Max(ΔIL1,ΔIL2,ΔIL3)>DeltaIMinOp
where:
ΔUL1, ΔUL2 and ΔUL3 are the voltage change between sample t and sample t-1
DeltaUMinOp and DeltaIMinOp are the minimum harmonic level settings for the voltage and current
filters to decide that a fault has occurred. A slow evolving fault may not
produce sufficient harmonics to detect the fault; however, in such a
case speed is no longer the issue and the sequence components
phase selector will operate.
The delta voltages ΔULn and delta current ΔILn (n prefix for phase order) are the
voltage and current between sample t and sample t-1.
The delta phase selector employs adaptive techniques to determine the fault type.
The logic determines the fault type by summing up all phase values and dividing
by the largest value. Both voltages and currents are filtered out and evaluated. The
condition for fault type classification for the voltages and currents can be expressed
as:
S( DUL1, DUL2, DUL3)

Fa ulType =
Ma x( DIL1, DIL2, DUL3)
S( DIL1, DIL2, DIL3)

Fa ultType =
Ma x( DIL1, DIL2, DIL3)
The value of FaultType for different shunt faults are as follows:
Under ideal conditions: (Patent pending)

Single phase-to-earth; FaultType=1
Phase-to-phase fault FaultType=2
Three-phase fault; FaultType=3
247
The output signal is 1 for single phase-to-earth fault, 2 for phase-to-phase fault and
3 for three-phase fault. At this point the filter does not know if earth was involved
or not.
Typically there are induced harmonics in the non-faulted lines that will affect the
result. This method allows for a significant tolerance in the evaluation of FaultType
over its entire range.
When a single phase-to-earth fault has been detected, the logic determines the
largest quantity, and asserts that phase. If phase-to-phase fault is detected, the two
largest phase quantities will be detected and asserted as outputs.
The faults detected by the delta based phase selector are coordinated in a separate
block. Different phases of faults may be detected at slightly different times due to
differences in the angles of incidence of fault on the wave shape. Therefore the
output is forced to wait a certain time by means of a timer. If the timer expires, and
a fault is detected in one phase only, the fault is deemed as phase-to-earth. This
way a premature single phase-to-earth fault detection is not released for a phase-to-
phase fault. If, however, earth current is detected before the timer expires, the phase-
to-earth fault is released sooner.
If another phase picks up during the time delay, the wait time is reduced by a
certain amount. Each detection of either earth-to-phase or additional phases further
reduce the initial time delay and allow the delta phase selector output to be faster.
There is no time delay, if for example, all three phases are faulty.
The delta function is released if the input DELTAREL is activated at the same time
as input DELTABLK is not activated. Activating the DELTABLK input will block
the delta function. The release signal has an internal pulse timer of 100 ms. When
the DELTAREL signal has disappeared the delta logic is reset. In order not to get
too abrupt change, the reset is decayed in pre-defined steps.
Symmetrical component based phase selector

The symmetrical component phase selector uses preprocessed calculated sequence
voltages and currents as inputs. It also uses sampled values of the phase currents.
All the symmetrical quantities mentioned further in this section are with reference
to phase L1.
The function is made up of four main parts:
A Detection of the presence of earth fault

B A phase-to-phase logic block based on U1/U2 angle relationship
C A phase-to-earth component based on patent US5390067 where the angle relationships

between U2/I0 and U2/U1 is evaluated to determine earth fault or phase- to-phase to earth fault
D Logic for detection of three-phase fault
248
Presence of earth-fault detection

This detection of earth fault is performed in two levels, first by evaluation of the
magnitude of zero sequence current, and secondly by the evaluation of the zero and
negative sequence voltage. It is a complement to the earth-fault signal built-in in
the Symmetrical component based phase selector.
The complementary based zero-sequence current function evaluates the presence of

earth fault by calculating the 3I0 and comparing the result with the setting
parameter INRelPE. The output signal is used to release the earth-fault loop. It is a
complement to the earth-fault signal built-in in the sequence based phase selector.
The condition for releasing the phase-to-earth loop is as follows:
The output from this detection is used to release the earth-fault loop.
|3I0|>maxIph: INRelPE
where:
|3I0| is the magnitude of the zero sequence current 3I0
maxIph is the maximum magnitude of the phase currents

INRelPE is a setting parameter for the relation between the magnitude of 3I0 and the
maximum phase current
The earth-fault loop is also released if the evaluation of the zero sequence current
by the main sequence function meets the following conditions:
|3I0|>IBase · 0.5
|3I0|>maxIph ·INRelPE
where:
maxIph is the maximal current magnitude found in any of the three phases
INRelPE is the setting of 3I0 limit for release of phase-to-earth measuring loop in % of IBase
IBase is the global setting of the base current (A)
In systems where the source impedance for zero sequence is high the change of
zero sequence current may not be significant and the above detection may fail. In
those cases the detection enters the second level, with evaluation of zero and
negative sequence voltage. The release of the earth-fault loops can then be
achieved if all of the following conditions are fulfilled:
|3U0|>|U2| · 0.5
|3U0|>|U1| · 0.2
|U1|> UBase · 0.2/√(3)
and
249
3I0> 0.1 · IBase
or
3I0<maxIph · INRelPE
where:
3U0 is the magnitude of the zero sequence voltage
U2 is the magnitude of the negative sequence voltage at the relay measuring point of
phase L1
k5 is design parameter
ILmax is the maximal phase current
IMinOp is the setting of minimum operate phase current in % of IBase
Phase-to-phase fault detection

The detection of phase-to-phase fault is performed by evaluation of the angle
difference between the sequence voltages U2 and U1.
60°
UL3
L3-L1 sector
UL2 0°
180° L2-L3 sector U1L1 (Ref)
L1-L2 sector
UL1
300°
en06000383.vsd
IEC06000383 V1 EN
Figure 139: Definition of fault sectors for phase-to-phase fault
The phase-to-phase loop for the faulty phases will be determined if the angle
between the sequence voltages U2 and U1 lies within the sector defined according
to figure 139 and the following conditions are fulfilled:
|U1|>U1MinOP
|U2|>U2MinOp
where:
U1MinOP and U2MinOp are the setting parameters for positive sequence and negative sequence
minimum operate voltages
250
The positive sequence voltage U1L1 in figure 139 above is reference.
If there is a three-phase fault, there will not be any release of the individual phase
signals, even if the general conditions for U2 and U1 are fulfilled.
Phase-to-earth and phase-to-phase-to-earth-fault detection

The detection of phase-to-earth and phase-to-phase-to-earth fault (US patent
5390067) is based on two conditions:
1. Angle relationship between U2 and I0
2. Angle relationship between U2 and U1
The condition 1 determines faulty phase at single phase-to-earth fault by determine

the argument between U2 and I0.
80°
L2-E sector L3-E sector
200°
L1-E sector
320°
IEC06000384 V2 EN
Figure 140: Condition 1: Definition of faulty phase sector as angle between U2

and I0
The angle is calculated in a directional function block and gives the angle in
radians as input to the U2 and I0 function block. The input angle is released only if
the fault is in forward direction. This is done by the directional element. The fault
is classified as forward direction if the angle between U0 and I0 lies between 20 to
200 degrees, see figure 141.
251
Forward 20°
200° Reverse
en06000385.vsd
IEC06000385 V1 EN
Figure 141: Directional element used to release the measured angle between
Uo and I0
The input radians are summarized with an offset angle and the result evaluated. If
the angle is within the boundaries for a specific sector, the phase indication for that
sector will be active see figure 140. Only one sector signal is allowed to be
activated at the same time.
The sector function for condition 1 has an internal release signal which is active if
the main sequence function has classified the angle between U0 and I0 as valid. The
following conditions must be fulfilled for activating the release signals:
|U2|>U2MinOp
|3I0|> 0.05 · IBase
|3I0|>maxIph · INRelPE
where:
U2 and IN are the magnitude of the negative sequence voltage and zero-
sequence current (3I0)
U2MinOp is the setting parameter for minimum operating negative sequence

voltage
maxIph is the maximum phase current
INRelPE is the setting parameter for 3I0 limit for releasing phase-to-earth loop
The angle difference is phase shifted by 180 degrees if the fault is in reverse direction.
The condition 2 looks at the angle relationship between the negative sequence
voltage U2 and the positive sequence voltage U1. Since this is a phase-to-phase
voltage relationship, there is no need for shifting phases if the fault is in reverse
direction. A phase shift is introduced so that the fault sectors will have the same
angle boarders as for condition 1. If the calculated angle between U2 and U1 lies
252
within one sector, the corresponding phase for that sector will be activated. The
condition 2 is released if both the following conditions are fulfilled:
|U2|>U2MinOp
|U1|>U1MinOP
where:
|U1| and |U2| are the magnitude of the positive and negative sequence voltages.
U1MinOP and U2MinOp are the setting parameters for positive sequence and negative sequence
minimum operating voltages.
140°
L3-E sector
20°
U1L1
(Ref)
L1-E sector
L2-E sector
260° IEC06000413_2_en.vsd
IEC06000413 V2 EN
Figure 142: Condition 2: U2 and U1 angle relationship
If both conditions are true and there is sector match, the fault is deemed as single
phase-to-earth. If the sectors, however, do not match the fault is determined to be
the complement of the second condition, that is, a phase-to-phase-to- earth fault.
Condition 1 and Condition 2 ⇒ Fault type

L3-E L3-E L3-E
L2-E L1-E L2-L3-E
The sequence phase selector is blocked when earth is not involved or if a three-
phase fault is detected.
Three-phase fault detection

Unless it has been categorized as a single or two-phase fault, the function classifies
it as a three-phase fault if the following conditions are fulfilled:
|U1|<U1Level
253
and
|I1|>I1LowLevel
or
|I1|>IMaxLoad
where:
|U1| and |I1| are the positive sequence voltage and current magnitude
U1Level , are the setting of limits for positive sequence voltage and current
I1LowLevel
IMaxLoad is the setting of the maximum load current
The output signal for detection of three-phase fault is only released if not earth
fault and phase-to-phase fault in the main sequence function is detected.
The conditions for not detecting earth fault are the inverse of equation 5 to 10.
The condition for not detecting phase-to-phase faults is determined by three

conditions. Each of them gives condition for not detecting phase-to-phase fault.
Those are:
1:
earth fault is detected
or
|3I0IN|> 0.05 · IBase
and
|3I0IN|>maxIph ·INRelPE
2:
phase-to-earth and phase-to-phase faults are not fulfilled
and
maxIph<0.1 · IBase
and
|I2|<0.1 · maxIph
3:
|3I0IN|>maxIph · INBlockPP
or
|I2|<maxIph · I2maxIL
where:
maxIph is the maximum of the phase currents IL1, IL2 and IL3
INRelPE is the setting parameter for 3I0 limit for release of phase-to-earth fault loops
254
|I2| is the magnitude of the negative sequence current
I2ILmax is the setting parameter for the relation between negative sequence current
to the maximum phase current in percent of IBase
INBlockPP is the setting parameter for 3I0 limit for blocking phase to phase measuring
loops
Fault evaluation and selection logic

The phase selection logic has an evaluation procedure that can be simplified
according to figure 143. Only phase L1 is shown in the figure. If the internal signal
3 Phase fault is activated, all four outputs START, STL1, STL2 and STL3 gets
activated.
a a>b FaultPriority
DeltaIL1 then c=a c Adaptive release
b else c=a dependent on result
from Delta logic
DeltaUL1
Sequence based
function a<b
a
L1L2 fault
then c=b c
OR b else c=a OR
L1N fault
3 Phase fault
STL1
IL1Valid &
BLOCK
en06000386.vsd
IEC06000386 V1 EN
Figure 143: Simplified diagram for fault evaluation, phase L1
Load encroachment logic

Each of the six measuring loops has its own load (encroachment) characteristic
based on the corresponding loop impedance. The load encroachment functionality
is always activated in faulty phase identification with load encroachment for mho
(FMPSPDIS) function but the influence on the zone measurement can be switched
On/Offin the respective impedance measuring function.
The outline of the characteristic is presented in figure 144. As illustrated, the

resistive reach in forward and reverse direction and the angle of the sector is the
same in all four quadrants. The reach for the phase selector will be reduced by the
load encroachment function, as shown in figure 144.
255
Blinder
Blinder provides a mean to discriminate high load from a fault. The operating
characteristic is illustrated in figure 144. There are six individual measuring loops
with the blinder functionality. Three phase-to-earth loops which estimate the
impedance according to
Zn = Uph / Iph
and three phase-to-phase loops according to
Zph-ph = Uph-ph / Iph-ph
The start operations from respective loop are binary coded into one word and
provides an output signal STCNDPLE.
X jX
Operation area Operation area
RLd
ArgLd ArgLd
R
ArgLd R
ArgLd
RLd
Operation area
No operation area No operation area
en06000414.vsd
IEC06000414 V1 EN
Figure 144: Influence on the characteristic by load encroachment logic
Outputs
The output of the sequence components based phase selector and the delta logic
phase selector activates the output signals STL1, STL2 and STL3. If an earth fault
is detected the signal STPE gets activated.
The phase selector also gives binary coded signals that are connected to the zone
measuring element for opening the correct measuring loop(s). This is done by the
signal STCNDPHS. If only one phase is started (L1, L2 or L3), the corresponding
phase-to- element is enabled. STPE is expected to be made available for two-phase
and three-phase faults for the correct output to be selected. The fault loop is
indicated by one of the decimal numbers below.
The output STCNDPHS provides release information from the phase selection part
only. STCNDLE provides release information from the load encroachment part
only. STCNDPLE provides release information from the phase selection part and
256
the load encroachment part combined, that is, both parts have to issue a release at
the same time (this signal is normally not used in the zone measuring element). In
these signals, each fault type has an associated value, which represents the
corresponding zone measuring loop to be released. The values are presented in
table 132.
0= no faulted phases
1= L1E
2= L2E
3= L3E
4= -L1L2E
5= -L2L3E
6= -L3L1E
7= -L1L2L3E
8= -L1L2
9= -L2L3
10= -L3L1
11= L1L2L3
An additional logic is applied to handle the cases when phase-to-earth outputs are
to be asserted when the earth input G is not asserted.
The output signal STCNDPLE is activated when the load encroachment is operating.
STCNDPLE is connected to the input STCND for selected quadrilateral impedance

measuring zones to be blocked. The signal must be connected to the input LDCND
for selected mho impedance measuring zones .
The load encroachment at the measuring zone must be activated to

release the blocking from the load encroachment function.

FMPSPDIS
I3P* STL1
U3P* STL2
BLOCK STL3
ZSTART STPE
TR3PH STCNDPHS
1POLEAR STCNDPLE
STCNDLE
START
IEC06000429 V2 EN
Figure 145: FMPSPDIS function block
257

Table 133: FMPSPDIS Input signals
I3P GROUP - Group signal for current
SIGNAL
U3P GROUP - Group signal for voltage
SIGNAL
ZSTART BOOLEAN 0 Start from underimpdeance function
TR3PH BOOLEAN 0 Three phase tripping initiated
1POLEAR BOOLEAN 0 Single pole autoreclosing in progress
Table 134: FMPSPDIS Output signals

STL1 BOOLEAN Fault detected in phase L1
STPE BOOLEAN Earth fault detected
STCNDPHS INTEGER Binary coded starts from phase selection
STCNDPLE INTEGER Binary coded starts from ph sel with load
encroachment
STCNDLE INTEGER Binary coded starts from load encroachment only
START BOOLEAN Indicates that something has started

Table 135: FMPSPDIS Group settings (basic)
IMaxLoad 10 - 5000 %IB 1 200 Maximum load for identification of three
phase fault in % of IBase
RLd 1.00 - 3000.00 ohm/p 0.01 80.00 Load encroachment resistive reach in
ohm/phase
ArgLd 5 - 70 Deg 1 20 Load encroachment inclination of load
angular sector
258
Table 136: FMPSPDIS Group settings (advanced)

DeltaIMinOp 5 - 100 %IB 1 10 Delta current level in % of IBase
DeltaUMinOp 5 - 100 %UB 1 20 Delta voltage level in % of UBase
U1Level 5 - 100 %UB 1 80 Pos seq voltage limit for identification of 3-
ph fault
I1LowLevel 5 - 200 %IB 1 10 Pos seq current level for identification of
3-ph fault in % of IBase
U1MinOp 5 - 100 %UB 1 20 Minimum operate positive sequence
voltage for ph sel
U2MinOp 1 - 100 %UB 1 5 Minimum operate negative sequence
voltage for ph sel
INRelPE 10 - 100 %IB 1 20 3I0 limit for release ph-e measuring
loops in % of max phase current
INBlockPP 10 - 100 %IB 1 40 3I0 limit for blocking phase-to-phase
measuring loops in % of max phase
current

Table 137: FMPSPDIS technical data
Minimum operate current (5-30)% of IBase ± 1.0% of Ir
Load encroachment criteria: (0.5–3000) W/phase ± 2.0% static accuracy

Load resistance, forward and (5–70) degrees Conditions:
reverse Voltage range: (0.1–1.1) x Un
Current range: (0.5–30) x In
Angle: at 0 degrees and 85 degrees
6.9 Power swing detection ZMRPSB

Power swing detection ZMRPSB 68
Zpsb
SYMBOL-EE V1 EN
6.9.1 Introduction
Power swings may occur after disconnection of heavy loads or trip of big
generation plants.
259
Power swing detection function (ZMRPSB) is used to detect power swings and
initiate block of selected distance protection zones. Occurrence of earth-fault
currents during a power swing can block ZMRPSB function to allow fault clearance.

Power swing detection (ZMRPSB ) function comprises an inner and an outer
quadrilateral measurement characteristic with load encroachment, as shown in
figure 146.
Its principle of operation is based on the measurement of the time it takes for a
power swing transient impedance to pass through the impedance area between the
outer and the inner characteristics. Power swings are identified by transition times
longer than a transition time set on corresponding timers. The impedance
measuring principle is the same as that used for the distance protection zones. The
impedance and the characteristic passing times are measured in all three phases
separately.
One-out-of-three or two-out-of-three operating modes can be selected according to

the specific system operating conditions.
X1OutFw jX ZL R1LIn
X1InFw DFw
j
DRv
R1FInRv R1FInFw
DFw
ArgLd j
ArgLd
DRv
DFw
DFw
R
DFw
DRv
RLdInRv RLdInFw
DFw
DRv
RLdOutRv RLdOutFw
j DRv X1InRv
X1OutRv
IEC09000222 V1 EN
Figure 146: Operating characteristic for ZMRPSB function (setting parameters

in italic)
260
The impedance measurement within ZMRPSB function is performed by solving

equation 54 and equation 55 (n = 1, 2, 3 for each corresponding phase L1, L2 and
L3).
æ ULn ö
Re çç ÷÷ £ Rset
è ILn ø
æ ULn ö
Imçç ÷÷ £ Xset
è ILn ø
The Rset and Xset are R and X boundaries.
6.9.2.1 Resistive reach in forward direction
To avoid load encroachment, the resistive reach is limited in forward direction by

setting the parameter RLdOutFw which is the outer resistive load boundary value
while the inner resistive boundary is calculated according to equation 56.
RLdInFw = kLdRFw·RLdOutFw
where:
kLdRFw is a settable multiplication factor less than 1
The slope of the load encroachment inner and outer boundary is defined by setting
the parameter ArgLd.
The load encroachment in the fourth quadrant uses the same settings as in the first
quadrant (same ArgLd and RLdOutFw and calculated value RLdInFw).
The quadrilateral characteristic in the first quadrant is tilted to get a better

adaptation to the distance measuring zones. The angle is the same as the line angle
and derived from the setting of the reactive reach inner boundary X1InFw and the
line resistance for the inner boundary R1LIn. The fault resistance coverage for the
inner boundary is set by the parameter R1FInFw.
From the setting parameter RLdOutFw and the calculated value RLdInFw a
distance between the inner and outer boundary, DFw, is calculated. This value is
valid for R direction in first and fourth quadrant and for X direction in first and
second quadrant.
261
6.9.2.2 Resistive reach in reverse direction
To avoid load encroachment in reverse direction, the resistive reach is limited by

setting the parameter RLdOutRv for the outer boundary of the load encroachment
zone. The distance to the inner resistive load boundary RLdInRv is determined by
using the setting parameter kLdRRv in equation 57.
RLdInRv = kLdRRv·RLdOutRv
where:
kLdRRv is a settable multiplication factor less than 1
From the setting parameter RLdOutRv and the calculated value RLdInRv, a
distance between the inner and outer boundary, DRv, is calculated. This value is
valid for R direction in second and third quadrant and for X direction in third and
fourth quadrant.
The inner resistive characteristic in the second quadrant outside the load
encroachment part corresponds to the setting parameter R1FInRv for the inner
boundary. The outer boundary is internally calculated as the sum of DRv+R1FInRv.
The inner resistive characteristic in the third quadrant outside the load
encroachment zone consist of the sum of the settings R1FInRv and the line
resistance R1LIn. The argument of the tilted lines outside the load encroachment is
the same as the tilted lines in the first quadrant. The distance between the inner and
outer boundary is the same as for the load encroachment in reverse direction, that is
DRv.
6.9.2.3 Reactive reach in forward and reverse direction
The inner characteristic for the reactive reach in forward direction correspond to
the setting parameter X1InFw and the outer boundary is defined as X1InFw + DFw,
where:
DFw = RLdOutFw - KLdRFw · RLdOutFw
The inner characteristic for the reactive reach in reverse direction correspond to the
setting parameter X1InRv for the inner boundary and the outer boundary is defined
as X1InRv + DRv.
where:
DRv = RLdOutRv - KLdRRv · RLdOutRv
262
6.9.2.4 Basic detection logic
The operation of the Power swing detection ZMRPSB is only released if the
magnitude of the current is above the setting of the min operating current,
IMinOpPE.
ZMRPSB function can operate in two operating modes:
• The 1 out of 3 operating mode is based on detection of power swing in any of

the three phases. Figure 147 presents a composition of an internal detection
signal DET-L1 in this particular phase.
• The 2 out of 3 operating mode is based on detection of power swing in at least
two out of three phases. Figure 148 presents a composition of the detection
signals DET1of3 and DET2of3.
Signals ZOUTLn (outer boundary) and ZINLn (inner boundary) in figure 147 are
related to the operation of the impedance measuring elements in each phase
separately (n represents the corresponding L1, L2 and L3). They are internal
signals, calculated by ZMRPSB function.
The tP1 timer in figure 147 serve as detection of initial power swings, which are
usually not as fast as the later swings are. The tP2 timer become activated for the
detection of the consecutive swings, if the measured impedance exit the operate
area and returns within the time delay, set on the tW waiting timer. The upper part
of figure 147 (internal input signal ZOUTL1, ZINL1, AND-gates and tP-timers)
are duplicated for phase L2 and L3. All tP1 and tP2 timers in the figure have the
same settings.
ZOUTL1 AND
0-tP1
ZINL1 0 OR
-loop
0-tP2
-loop
AND
0
OR DET-L1
AND AND
ZOUTL2 OR
ZOUTL3
detected 0
0-tW
IEC05000113 V2 EN
Figure 147: Detection of power swing in phase L1
263
DET-L1
DET-L2 DET1of3 - int.
>1
DET-L3
&
DET2of3 - int.
& >1
&
Figure 148: Detection of power swing for 1-of-3 and 2-of-3 operating mode
ZOUTL1 ZOUT
OR
ZOUTL2 ZINL1
ZIN
ZOUTL3 AND ZINL2 OR
ZINL3
tEF
TRSP
t AND
I0CHECK
10 ms
AND t
BLKI02 OR
tR1
AND t INHIBIT
OR
-loop
tR2
BLKI01 AND t
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
tH
DET2of3 - int. OR t
REL2PH
AND
BLK2PH OR START
AND
EXTERNAL
en05000114.vsd
IEC05000114 V1 EN
Figure 149: Simplified block diagram for ZMRPSB function
264
6.9.2.5 Operating and inhibit conditions
Figure 149 presents a simplified logic diagram for the Power swing detection
function ZMRPSB. The internal signals DET1of3 and DET2of3 relate to the
detailed logic diagrams in figure 147 and figure 148 respectively.
Selection of the operating mode is possible by the proper configuration of the

functional input signals REL1PH, BLK1PH, REL2PH, and BLK2PH.
The load encroachment characteristic can be switched off by setting the parameter
OperationLdCh = Off, but notice that the DFw and DRv will still be calculated from
RLdOutFw and RLdOutRv. The characteristic will in this case be only quadrilateral.
There are four different ways to form the internal INHIBIT signal:
• Logical 1 on functional input BLOCK inhibits the output START signal

instantaneously.
• The INHIBIT internal signal is activated, if the power swing has been detected
and the measured impedance remains within its operate characteristic for the
time, which is longer than the time delay set on tR2 timer. It is possible to
disable this condition by connecting the logical 1 signal to the BLKI01
functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer,
if an earth-fault appears during the power swing (input IOCHECK is high) and
the power swing has been detected before the earth-fault (activation of the
signal I0CHECK). It is possible to disable this condition by connecting the
logical 1 signal to the BLKI02 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input
I0CHECK appears within the time delay, set on tEF timer and the impedance
has been seen within the outer characteristic of ZMRPSB operate
characteristic in all three phases. This function prevents the operation of
ZMRPSB function in cases, when the circuit breaker closes onto persistent
single-phase fault after single-phase autoreclosing dead time, if the initial single-
phase fault and single-phase opening of the circuit breaker causes the power
swing in the remaining two phases.
265

ZMRPSB
I3P* START
U3P* ZOUT
BLOCK ZIN
BLKI01
BLKI02
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXTERNAL
IEC06000264 V2 EN
Figure 150: ZMRPSB function block

Table 138: ZMRPSB Input signals
SIGNAL
SIGNAL
BLKI01 BOOLEAN 0 Block inhibit of start output for slow swing condition
BLKI02 BOOLEAN 0 Block inhibit of start output for subsequent
residual current detection
BLK1PH BOOLEAN 0 Block one-out-of-three-phase operating mode
REL1PH BOOLEAN 0 Release one-out-of-three-phase operating mode
BLK2PH BOOLEAN 0 Block two-out-of-three-phase operating mode
REL2PH BOOLEAN 0 Release two-out-of-three-phase operating mode
I0CHECK BOOLEAN 0 Residual current (3I0) detection used to inhibit
start output
TRSP BOOLEAN 0 Single-pole tripping command issued by tripping
function
EXTERNAL BOOLEAN 0 Input for external detection of power swing
Table 139: ZMRPSB Output signals

START BOOLEAN Power swing detected
ZOUT BOOLEAN Measured impedance within outer impedance
boundary
ZIN BOOLEAN Measured impedance within inner impedance
boundary
266

Table 140: ZMRPSB Group settings (basic)
Operation Off - - Off Operation Mode On / Off
On
X1InFw 0.10 - 3000.00 ohm 0.01 30.00 Inner reactive boundary, forward
R1LIn 0.10 - 1000.00 ohm 0.01 30.00 Line resistance for inner characteristic
angle
R1FInFw 0.10 - 1000.00 ohm 0.01 30.00 Fault resistance coverage to inner
resistive line, forward
X1InRv 0.10 - 3000.00 ohm 0.01 30.00 Inner reactive boundary, reverse
R1FInRv 0.10 - 1000.00 ohm 0.01 30.00 Fault resistance line to inner resistive
boundary, reverse
OperationLdCh Off - - On Operation of load discrimination
On characteristic
RLdOutFw 0.10 - 3000.00 ohm 0.01 30.00 Outer resistive load boundary, forward
ArgLd 5 - 70 Deg 1 25 Load angle determining load impedance
area
RLdOutRv 0.10 - 3000.00 ohm 0.01 30.00 Outer resistive load boundary, reverse
kLdRFw 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, forward
kLdRRv 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, reverse
tEF 0.000 - 60.000 s 0.001 3.000 Timer for overcoming single-pole
reclosing dead time
IMinOpPE 5 - 30 %IB 1 10 Minimum operate current in % of IBase
IBase 1 - 99999 A 1 3000 Base setting for current level settings
Table 141: ZMRPSB Group settings (advanced)

tP1 0.000 - 60.000 s 0.001 0.045 Timer for detection of initial power swing
tP2 0.000 - 60.000 s 0.001 0.015 Timer for detection of subsequent power
swings
tW 0.000 - 60.000 s 0.001 0.250 Waiting timer for activation of tP2 timer
tH 0.000 - 60.000 s 0.001 0.500 Timer for holding power swing START
output
tR1 0.000 - 60.000 s 0.001 0.300 Timer giving delay to inhibit by the
residual current
tR2 0.000 - 60.000 s 0.001 2.000 Timer giving delay to inhibit at very slow
swing
267

Table 142: ZMRPSB technical data
Reactive reach (0.10-3000.00) W/phase ± 2.0% static accuracy
Conditions:
Resistive reach (0.10–1000.00)W/loop Angle: at 0 degrees and 85
degrees
Timers (0.000-60.000) s ± 0.5% ± 10 ms
6.10 Power swing logic ZMRPSL

Power swing logic ZMRPSL - -
6.10.1 Introduction
Power Swing Logic (ZMRPSL) is a complementary function to Power Swing
Detection (ZMRPSB) function. It provides possibility for selective tripping of
faults on power lines during system oscillations (power swings or pole slips), when
the distance protection function should normally be blocked. The complete logic
consists of two different parts:
• Communication and tripping part: provides selective tripping on the basis of

special distance protection zones and a scheme communication logic, which
are not blocked during the system oscillations.
• Blocking part: blocks unwanted operation of instantaneous distance protection
zone 1 for oscillations, which are initiated by faults and their clearing on the
adjacent power lines and other primary elements.
6.10.2.1 Communication and tripping logic
Communication and tripping logic as used by the power swing distance protection
zones is schematically presented in figure 151.
268
STDEF
AR1P1 &
STPSD tCS
CS
BLOCK & t &
CSUR
BLKZMPS
tBlkTr &
tTrip t
t
CACC TRIP
>1
CR &
en06000236.vsd
IEC06000236 V1 EN
Figure 151: Simplified logic diagram – power swing communication and tripping
logic
The complete logic remains blocked as long as there is a logical one on the
BLOCK functional input signal. Presence of the logical one on the STDEF
functional input signal also blocks the logic as long as this block is not released by
the logical one on the AR1P1 functional input signal. The functional output signal
BLKZMPS remains logical one as long as the function is not blocked externally
(BLOCK is logical zero) and the earth-fault is detected on protected line (STDEF
is logical one), which is connected in three-phase mode (AR1P1 is logical zero).
Timer tBlkTr prolongs the duration of this blocking condition, if the measured
impedance remains within the operate area of the Power Swing Detection
(ZMRPSB) function (STPSD input active). The BLKZMPS can be used to block
the operation of the power-swing zones.
Logical one on functional input CSUR, which is normally connected to the TRIP
functional output of a power swing carrier sending zone, activates functional output
CS, if the function is not blocked by one of the above conditions. It also activates
the TRIP functional output.
Initiation of the CS functional output is possible only, if the STPSD input has been
active longer than the time delay set on the security timer tCS.
Simultaneous presence of the functional input signals PLTR_CRD and CR (local

trip condition) also activates the TRIP functional output, if the function is not
blocked by one of the above conditions and the STPSD signal has been present
longer then the time delay set on the trip timer tTrip.
6.10.2.2 Blocking logic
Figure 152 presents the logical circuits, which control the operation of the
underreaching zone (zone 1) at power swings, caused by the faults and their
clearance on the remote power lines.
269
&
BLKZMH
&
STZML tZL
STZMLL
BLOCK & t >1
&
STMZH tDZ
STZMPSD & t
>1
STPSD
&
-loop
en06000237.vsd
IEC06000237 V1 EN
Figure 152: Control of underreaching distance protection (Zone 1) at power

swings caused by the faults and their clearance on adjacent lines
and other system elements
The logic is disabled by a logical one on functional input BLOCK. It can start only
if the following conditions are simultaneously fulfilled:
• STPSD functional input signal must be a logical zero. This means, that Power
swing detection (ZMRPSB) function must not detect power swinging over the
protected power line.
• STZMPSD functional input must be a logical one. This means that the
impedance must be detected within the external boundary of ZMRPSB function.
• STZMOR functional input must be a logical one. This means that the fault
must be detected by the overreaching distance protection zone, for example
zone 2.
The STZMURPS functional output, which can be used in complete terminal logic
instead of a normal distance protection zone 1, becomes active under the following
conditions:
• If the STZMUR signal appears at the same time as the STZMOR or if it

appears with a time delay, which is shorter than the time delay set on timer
tDZ.
• If the STZMUR signal appears after the STZMOR signal with a time delay
longer than the delay set on the tDZ timer, and remains active longer than the
time delay set on the tZL timer.
The BLKZMOR functional output signal can be used to block the operation of the
higher distance protection zone, if the fault has moved into the zone 1 operate area
after tDZ time delay.
270

ZMRPSL
BLOCK TRIP
STZMUR STZMURPS
STZMOR BLKZMUR
STPSD BLKZMOR
STDEF CS
STZMPSD
CACC
AR1P1
CSUR
CR
IEC07000026 V2 EN
Figure 153: ZMRPSL function block

Table 143: ZMRPSL Input signals
STZMUR BOOLEAN 0 Start of the underreaching zone
STZMOR BOOLEAN 0 Start of the overreaching zone
STPSD BOOLEAN 0 Power swing detected
STDEF BOOLEAN 0 Start from Earth Fault Protection in forward or
reverse direction
STZMPSD BOOLEAN 0 Operation of Power Swing Detection external
characteristic
CACC BOOLEAN 0 Overreaching ZM zone to be accelerated
AR1P1 BOOLEAN 0 Single pole auto-reclosing in progress
CSUR BOOLEAN 0 Carrier send by the underreaching power-swing
zone
CR BOOLEAN 0 Carrier receive signal during power swing
detection operation
Table 144: ZMRPSL Output signals

TRIP BOOLEAN Trip through Power Swing Logic
STZMURPS BOOLEAN Start of Underreaching zone controlled by PSL to
be used in configuration
BLKZMUR BOOLEAN Block trip of underreaching impedance zone
BLKZMOR BOOLEAN Block trip of overreaching distance protection
zones
CS BOOLEAN Carrier send signal controlled by the power swing
271

Table 145: ZMRPSL Group settings (basic)
On
tDZ 0.000 - 60.000 s 0.001 0.050 Permitted max oper time diff between
higher and lower zone
tDZMUR 0.000 - 60.000 s 0.001 0.200 Delay for oper of underreach zone with
detected diff in oper time
tCS 0.000 - 60.000 s 0.001 0.100 Conditional timer for sending the CS at
power swings
tTrip 0.000 - 60.000 s 0.001 0.100 Conditional timer for tripping at power
swings
tBlkTr 0.000 - 60.000 s 0.001 0.300 Timer for blocking the overreaching
zones trip
6.11 Pole slip protection PSPPPAM

Pole slip protection PSPPPAM 78
<
SYMBOL-MM V1 EN
6.11.1 Introduction
Sudden events in an electrical power system such as large changes in load, fault
occurrence or fault clearance, can cause power oscillations referred to as power
swings. In a non-recoverable situation, the power swings become so severe that the
synchronism is lost, a condition referred to as pole slipping. The main purpose of
the pole slip protection (PSPPPAM) is to detect, evaluate, and take the required
action for pole slipping occurrences in the power system. The electrical system
parts swinging to each other can be separated with the line/s closest to the centre of
the power swing allowing the two systems to be stable as separated islands.

If the generator is faster than the power system, the rotor movement in the
impedance and voltage diagram is from right to left and generating is signalled. If
the generator is slower than the power system, the rotor movement is from left to
right and motoring is signalled (the power system drives the generator as if it were
a motor).
272
The movements in the impedance plain can be seen in figure 154. The transient
behaviour is described by the transient EMF's EA and EB, and by X'd, XT and the
transient system impedance ZS.
Zone 1 Zone 2
EB X’d XT XS EA
IED
B A
jX
XS
Pole slip
impedance XT
d Apparent generator
movement impedance R
X’d
IEC06000437 V2 EN
Figure 154: Movements in the impedance plain
where:
X'd = transient reactance of the generator
XT = short-circuit reactance of the step-up transformer
ZS = impedance of the power system A
The detection of rotor angle is enabled when:
273
• the minimum current exceeds 0.10 IN (IN is IBase parameter set under general
setting).
• the maximum voltage falls below 0.92 UBase
• the voltage Ucosφ (the voltage in phase with the generator current) has an
angular velocity of 0.2...8 Hz and
• the corresponding direction is not blocked.
en07000004.vsd
IEC07000004 V1 EN
Figure 155: Different generator quantities as function of the angle between the
equivalent generators
An alarm is given when movement of the rotor is detected and the rotor angle
exceeds the angle set for 'WarnAngle'.
Slipping is detected when:
• a change of rotor angle of min. 50 ms is recognized

• the slip line is crossed between ZA and ZB.
When the impedance crosses the slip line between ZB and ZC it counts as being in
zone 1 and between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone
1 when signal EXTZONE1 is high (external device detects the direction of the
centre of slipping).
After the first slip, the signals ZONE1 or ZONE2 and – depending on the direction
of slip - either GEN or MOTOR are issued.
274
Every time pole slipping is detected, the impedance of the point where the slip line
is crossed and the instantaneous slip frequency are displayed as measurements.
Further slips are only detected, if they are in the same direction and if the rate of
rotor movement has reduced in relation to the preceding slip or the slip line is
crossed in the opposite direction outside ZA-ZB. A further slip in the opposite
direction within ZA-ZB resets all the signals and is then signalled itself as a first slip.
The TRIP1 tripping command and signal are generated after N1 slips in zone 1,
providing the rotor angle is less than TripAngle. The TRIP2 signal is generated
after N2 slips in zone 2, providing the rotor angle is less than TripAngle.
All signals are reset if:
• the direction of movement reverses

• the rotor angle detector resets without a slip being counted or
• no rotor relative movement was detected during the time ResetTime.
Imin > 0.10 IBase
Ucosj < 0.92 UBase AND
START
AND
0.2 £ Slip.Freq. £ 8 Hz
d ³ startAngle
ZONE1
AND
Z cross line ZA - ZC
ZONE2
AND
Z cross line ZC - ZB
Counter
a
a³b
N1Limit b TRIP1
AND
d £ tripAngle TRIP
OR
Counter
a
N2Limit b a³b TRIP2
AND
en07000005.vsd
IEC07000005 V1 EN
Figure 156: Simplified logic diagram for pole slip protection PSPPPAM
275

PSPPPAM
I3P* TRIP
U3P* TRIP1
BLOCK TRIP2
BLKGEN START
BLKMOTOR ZONE1
EXTZONE1 ZONE2
GEN
MOTOR
SFREQ
SLIPZOHM
SLIPZPER
UCOSKV
UCOSPER
IEC07000030 V2 EN
Figure 157: PSPPPAM function block

Table 146: PSPPPAM Input signals
I3P GROUP - Current group connection
SIGNAL
U3P GROUP - Voltage group connection
SIGNAL
BLKGEN BOOLEAN 0 Block operation in generating direction
BLKMOTOR BOOLEAN 0 Block operation in motor direction
EXTZONE1 BOOLEAN 0 Extension of zone1 with zone2 region
Table 147: PSPPPAM Output signals

TRIP BOOLEAN Common trip signal
TRIP1 BOOLEAN Trip1 after the N1Limit slip in zone1
TRIP2 BOOLEAN Trip2 after the N2Limit slip in zone2
START BOOLEAN Common start signal
ZONE1 BOOLEAN First slip in zone1 region
ZONE2 BOOLEAN First slip in zone2 region
GEN BOOLEAN Generator is faster then the system
MOTOR BOOLEAN Generator is slower then the system
SFREQ REAL Slip frequency
SLIPZOHM REAL Slip impedance in ohms
SLIPZPER REAL Slip impedance in percent of ZBase
UCOSKV REAL UCosPhi voltage in kV
UCOSPER REAL UCosPhi voltage in percent of UBase
276

Table 148: PSPPPAM Group settings (basic)
Operation Off - - Off Operation On / Off
On
OperationZ1 Off - - On Operation Zone1 On / Off
On
OperationZ2 Off - - On Operation Zone2 On / Off
On
ImpedanceZA 0.00 - 1000.00 % 0.01 10.00 Forward impedance in % of Zbase
ImpedanceZB 0.00 - 1000.00 % 0.01 10.00 Reverse impedance in % of Zbase
ImpedanceZC 0.00 - 1000.00 % 0.01 10.00 Impedance of zone1 limit in % of Zbase
AnglePhi 72.00 - 90.00 Deg 0.01 85.00 Angle of the slip impedance line
StartAngle 0.0 - 180.0 Deg 0.1 110.0 Rotor angle for the start signal
TripAngle 0.0 - 180.0 Deg 0.1 90.0 Rotor angle for the trip1 and trip2 signals
N1Limit 1 - 20 - 1 1 Count limit for the trip1 signal
N2Limit 1 - 20 - 1 3 Count limit for the trip2 signal
Table 149: PSPPPAM Group settings (advanced)

ResetTime 0.000 - 60.000 s 0.001 5.000 Time without slip to reset all signals
Table 150: PSPPPAM Non group settings (basic)

IBase 0.1 - 99999.9 A 0.1 3000.0 Base Current (primary phase current in
Amperes)
UBase 0.1 - 9999.9 kV 0.1 20.0 Base Voltage (primary phase-to-phase
voltage in kV)
MeasureMode PosSeq - - PosSeq Measuring mode (PosSeq, L1L2, L2L3,
L1L2 L3L1)
L2L3
L3L1
InvertCTcurr No - - No Invert current direction
Yes

Table 151: PSPPPAM technical data
Impedance reach (0.00–1000.00)% of Zbase ± 2.0% of Ur/Ir
Characteristic angle (72.00–90.00) degrees ± 5.0 degrees
Start and trip angles (0.0–180.0) degrees ± 5.0 degrees
Zone 1 and Zone 2 trip counters (1-20) -
277
6.12 Automatic switch onto fault logic, voltage and

current based ZCVPSOF

Automatic switch onto fault logic, ZCVPSOF - -
voltage and current based
6.12.1 Introduction
Automatic switch onto fault logic, voltage and current based (ZCVPSOF) is a
function that gives an instantaneous trip at closing of breaker onto a fault. A dead
line detection check is provided to activate the function when the line is dead.
Mho distance protections can not operate for switch onto fault condition when the
phase voltages are close to zero. An additional logic based on UI Level is used for
this purpose.

Automatic switch onto fault logic, voltage and current based function (ZCVPSOF)
can be activated externally by Breaker Closed Input or internally (automatically)
by using UI Level Based Logic see figure 158.
The activation from the Dead line detection function is released if the internal
signal deadLine from the UILevel function is activated at the same time as the
input ZACC is not activated during at least for a duration tDLD and the setting
parameter AutoInit is set to On.
When the setting AutoInit is Off, the function is activated by an external binary
input BC. To get a trip one of the following operation modes must also be selected
by the parameter Mode:
Mode = Impedance; trip is released if the input ZACC is activated (normal

connected to non directional distance protection zone).
Mode = UILevel; trip is released if UILevel detector is activated.
Mode = UILvl&Imp; trip is initiated based on impedance measured criteria or

UILevel detection.
The internal signal deadLine from the UILevel detector is activated if all three
phase currents and voltages are below the setting IPh< and UPh<.
UI Level based measurement detects the switch onto fault condition even though
the voltage is very low. The logic is based on current and voltage levels. The
internal signal SOTF UILevel is activated if a phase voltage is below the setting
278
UPh< and corresponding phase current is above the setting IPh< longer than the
time tDuration.
ZCVPSOF can be activated externally from input BC and thus setting AutoInit is
bypassed.
The function is released during a settable time tSOTF.
The function can be blocked by activating the input BLOCK.
BLOCK 15
t TRIP
AND
BC
AutiInit=On
200 1000
OR t
ZACC AND t
IL1
deadLine
IL2
IL3
UL1 UILevel detector
UL2
UL3
Iph<
SOTFU ILevel
Uph<
AND
Mode = Impedance
AND OR
Mode = UILevel
OR
AND
Mode = UILvl&Imp
en07000084.vsd
IEC07000084 V2 EN
Figure 158: Simplified logic diagram for Automatic switch onto fault logic,
voltage and current based.
279

ZCVPSOF
I3P* TRIP
U3P*
BLOCK
BC
ZACC
IEC06000459 V2 EN
Figure 159: ZCVPSOF function block

Table 152: ZCVPSOF Input signals
I3P GROUP - Current DFT
SIGNAL
U3P GROUP - Voltage DFT
SIGNAL
BC BOOLEAN 0 External enabling of SOTF
ZACC BOOLEAN 0 Distance zone to be accelerated by SOTF
Table 153: ZCVPSOF Output signals


Table 154: ZCVPSOF Group settings (basic)
On
IBase 1 - 99999 A 1 3000 Base current (A)
UBase 0.05 - 2000.00 kV 0.05 400.00 Base voltage L-L (kV)
Mode Impedance - - UILevel Mode of operation of SOTF Function
UILevel
UILvl&Imp
AutoInit Off - - Off Automatic switchonto fault initialization
On
IPh< 1 - 100 %IB 1 20 Current level for detection of dead line in
% of IBase
UPh< 1 - 100 %UB 1 70 Voltage level for detection of dead line in
% of UBase
280

tDuration 0.000 - 60.000 s 0.001 0.020 Time delay for UI detection (s)
tSOTF 0.000 - 60.000 s 0.001 1.000 Drop off delay time of switch onto fault
function
tDLD 0.000 - 60.000 s 0.001 0.200 Delay time for activation of dead line
detection

Table 155: ZCVPSOF technical data
Parameter Range or value Accuracy
Operate voltage, detection of dead line (1–100)% of ± 1.0% of Ur
UBase
Operate current, detection of dead line (1–100)% of ± 1.0% of Ir
IBase
Delay following dead line detection input before (0.000–60.000) s ± 0.5% ± 10 ms
Automatic switch into fault logic function is
automatically turned On
Time period after circuit breaker closure in which (0.000–60.000) s ± 0.5% ± 10 ms
Automatic switch into fault logic function is active
6.13 Phase preference logic PPLPHIZ

Phase preference logic PPLPHIZ - -
6.13.1 Introduction
Phase preference logic function PPLPHIZ is intended to be used in isolated or high
impedance earthed networks where there is a requirement to trip only one of the
faulty lines at cross-country fault.
Phase preference logic inhibits tripping for single phase-to-earth faults in isolated
and high impedance earthed networks, where such faults are not to be cleared by
distance protection. For cross-country faults, the logic selects either the leading or
the lagging phase-earth loop for measurement and initiates tripping of the preferred
fault based on the selected phase preference. A number of different phase
preference combinations are available for selection.

Phase preference logic PPLPHIZ has 10 operation modes, which can be set by the
parameter OperMode. The different modes and their explanation are shown in
281
table 156 below. The difference between cyclic and acyclic operation can be
explained by the following example. Assume a L1 fault on one line and a L3 fault
on another line. For OperMode = 1231c the line with L3 fault will be tripped (L3
before L1) while for OperMode = 123a the line with L1 1 fault will be tripped (L1
before L3).
Table 156: Operation modes for Phase preference logic

OperMode Description
No filter No filter, phase-to-phase measuring loops are not blocked during single phase-to-
earth faults. Tripping is allowed without any particular phase preference at cross-
country faults
No pref No preference, trip is blocked during single phase-to-earth faults, trip is allowed
without any particular phase preference at cross-country fault
1231 c Cyclic 1231c; L1 before L2 before L3 before L1
1321 c Cyclic 1321c; L1 before L3 before L2 before L1
123 a Acyclic 123a; L1 before L2before L3
132 a Acyclic 132a; L1 before L3 before L2
The function can be divided into two parts; one labeled voltage and current
discrimination and the second one labeled phase preference evaluation, see
figure 160.
The aim with the voltage and current discrimination part is to discriminate faulty
phases and to determine if there is a cross-country fault. If cross-country fault is
detected, an internal signal “Detected cross-country fault” is created and sent to the
phase preference part to be used in the evaluation process for determining the
condition for trip.
The voltage and current discrimination part gives phase segregated start signals if
the respective measured phase voltage is below the setting parameter UPN< at the
same time as the zero sequence voltage is above the setting parameter 3U0>. If
there is a start in any phase the START out put signal will be activated.
The internal signal for detection of cross-country fault, DetectCrossCountry, that

come from the voltage and current discrimination part of the function can be
achieved in three different ways:
282
1. The magnitude of 3I0 has been above the setting parameter IN> for a time
longer than the setting of pick-up timer tIN.
2. The magnitude of 3I0 has been above the setting parameter IN> at the same
time as the magnitude of 3U0 has been above the setting parameter 3U0>
during a time longer than the setting of pick-up timer tUN.
3. The magnitude of 3I0 has been above the setting parameter IN> at the same
time as one of the following conditions are fulfilled:
• the measured phase-to-phase voltage in at least one of the phase
combinations has been below the setting parameter UPP< for more than
20 ms.
• At least two of the phase voltages are below the setting parameter UPN<
for more than 20 ms.
The second part, phase preference evaluation, uses the internal signal
DetectCrossCountry from the voltage and current evaluation together with the
input signal STCND together with phase selection start condition (from phase
selection functions) connected to input STCND, and the information from the
setting parameter OperMode are used to determine the condition for trip. To
release the Phase preference logic, at least two out of three phases must be faulty.
The fault classification whether it is a single phase-to-earth, two-phase or cross-
country fault and which phase to be tripped at cross-country fault is converted into
a binary coded signal and sent to the distance protection measuring zone to release
the correct measuring zone according to the setting of OperMode. This is done by
activating the output ZREL and it shall be connected to the input STCND on the
distance zone measuring element.
The release signals from phase selection will only be gated with the cross-country
check from IN and UN but without time delay. If no phase selection start has
occurred, the release is based on current and voltage discriminating part only.
The input signal STCND consist of binary information of fault type and is
connected to the output STCND on phase selection function. The fault must be
activated in at least two phases to be classified as a cross-country fault in the phase
preference part of the logic.
The input signals RELxxx are additional fault release signals that can be connected
to external protection functions through binary input.
The output START and trip signals can be blocked by activating the input BLOCK
283
UL1
UL2
UL3
UL1UL2
UL2UL3
UL3UL1
IN Voltage and START
AND
UN Current
Discrimination
UPN<
UPP<
IN>
Detect Cross-
UN0> Country fault
OperMode
RELL1N ZREL
Phase Preference AND
RELL2N Evaluation
RELL3N
STCND
BLOCK
IEC09000220 V2 EN
Figure 160: Simplified block diagram for Phase preference logic

PPLPHIZ
I3P* START
U3P* ZREL
BLOCK
RELL1N
RELL2N
RELL3N
STCND
IEC07000029 V2 EN
Figure 161: PPLPHIZ function block

Table 157: PPLPHIZ Input signals
SIGNAL
SIGNAL
284

RELL1N BOOLEAN 0 Release condition for the L1 to earth loop
STCND INTEGER 0 Integer coded external release signals
Table 158: PPLPHIZ Output signals

START BOOLEAN Indicates start for earth fault(s), regardless of
direction
ZREL INTEGER Integer coded output release signal

Table 159: PPLPHIZ Group settings (basic)
OperMode No Filter - - No Filter Operating mode (c=cyclic,a=acyclic)
NoPref
1231c
1321c
123a
132a
213a
231a
312a
321a
UPN< 10.0 - 100.0 %UB 1.0 70.0 Operate value of phase undervoltage (%
of UBase)
UPP< 10.0 - 100.0 %UB 1.0 50.0 Operate value of line to line
undervoltage (% of UBase)
3U0> 5.0 - 70.0 %UB 1.0 20.0 Operate value of residual voltage (% of
UBase)
IN> 10 - 200 %IB 1 20 Operate value of residual current (% of
IBase)
tUN 0.000 - 60.000 s 0.001 0.100 Pickup-delay for residual voltage
tOffUN 0.000 - 60.000 s 0.001 0.100 Dropoff-delay for residual voltage
tIN 0.000 - 60.000 s 0.001 0.150 Pickup-delay for residual current
285
Table 160: PPLPHIZ technical data

Operate value, phase-to-phase (10.0 - 100.0)% of UBase ± 0,5% of Ur
and phase-to-neutral
undervoltage
Reset ratio, undervoltage < 105% -
Operate value, residual voltage (5.0 - 70.0)% of UBase ± 0,5% of Ur
Reset ratio, residual voltage > 95% -

Operate value, residual current (10 - 200)% of IBase ± 1,0% of Ir for I < Ir
± 1,0% of I for I > Ir
Reset ratio, residual current > 95% -

Timers (0.000 - 60.000) s ± 0,5% ± 10ms
Operating mode No Filter, NoPref
Cyclic: 1231c, 1321c
Acyclic: 123a, 132a, 213a, 231a,
312a, 321a
286
Current protection
Section 7 Current protection
About this chapter

This chapter describes current protection functions. These include functions like
Instantaneous phase overcurrent protection, Four step phase overcurrent protection,
Pole discordance protection and Residual overcurrent protection.
7.1 Instantaneous phase overcurrent protection PHPIOC

Instantaneous phase overcurrent PHPIOC 50
protection
3I>>
SYMBOL-Z V1 EN
7.1.1 Introduction
The instantaneous three phase overcurrent function has a low transient overreach
and short tripping time to allow use as a high set short-circuit protection function.

The sampled analogue phase currents are pre-processed in a discrete Fourier filter
(DFT) block. The RMS value of each phase current is derived from the
fundamental frequency components, as well as sampled values of each phase
current. These phase current values are fed to the instantaneous phase overcurrent
protection function PHPIOC. In a comparator the RMS values are compared to the
set operation current value of the function (IP>>). If a phase current is larger than
the set operation current a signal from the comparator for this phase is set to true.
This signal will, without delay, activate the output signal TRLn (n=1,2,3) for this
phase and the TRIP signal that is common for all three phases.
There is an operation mode (OpMode) setting: 1 out of 3 or 2 out of 3. If the

parameter is set to 1 out of 3 any phase trip signal will be activated. If the
parameter is set to 2 out of 3 at least two phase signals must be activated for trip.
There is also a possibility to activate a preset change of the set operation current
(StValMult) via a binary input (ENMULT). In some applications the operation
value needs to be changed, for example due to transformer inrush currents.
287
Current protection
PHPIOC can be blocked from the binary input BLOCK.

PHPIOC
I3P* TRIP
BLOCK TRL1
ENMULT TRL2
TRL3
IEC04000391 V2 EN
Figure 162: PHPIOC function block

Table 161: PHPIOC Input signals
I3P GROUP - Three phase current
SIGNAL
ENMULT BOOLEAN 0 Enable current start value multiplier
Table 162: PHPIOC Output signals

TRIP BOOLEAN Trip signal from any phase

Table 163: PHPIOC Group settings (basic)
On
OpMode 2 out of 3 - - 1 out of 3 Select operation mode 2-out of 3 / 1-out
1 out of 3 of 3
IP>> 1 - 2500 %IB 1 200 Operate phase current level in % of IBase
Table 164: PHPIOC Group settings (advanced)

StValMult 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level
288
Current protection

Table 165: PHPIOC technical data
Operate current (1-2500)% of lBase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir
Reset ratio > 95% -

Operate time 25 ms typically at 0 to 2 x Iset -
Reset time 25 ms typically at 2 to 0 x Iset -
Critical impulse time 10 ms typically at 0 to 2 x Iset -
Dynamic overreach < 5% at t = 100 ms -
7.2 Four step phase overcurrent protection OC4PTOC

Four step phase overcurrent protection OC4PTOC 51/67
3I>
4
alt
4
TOC-REVA V1 EN
7.2.1 Introduction
The four step phase overcurrent protection function OC4PTOC has an inverse or
definite time delay independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an
optional user defined time characteristic.
The directional function is voltage polarized with memory. The function can be set
to be directional or non-directional independently for each of the steps.
A 2nd harmonic blocking can be set individually for each step.

The Four step overcurrent protection function OC4PTOC is divided into four
different sub-functions, one for each step. For each step x , where x is step 1, 2, 3
289
Current protection
and 4, an operation mode is set by DirModex: Off/Non-directional/Forward/

Reverse.
The protection design can be decomposed in four parts:
• The direction element

• The harmonic Restraint Blocking function
• The four step over current function
• The mode selection
If VT inputs are not available or not connected, setting parameter

DirModex shall be left to default value, Non-directional.
4 step over current

Direction dirPh1Flt element faultState
faultState
Element One element for each
dirPh2Flt step
I3P dirPh3Flt START
U3P
TRIP
Harmonic harmRestrBlock
I3P Restraint
Element
enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4
en05000740.vsd
IEC05000740 V1 EN
Figure 163: Functional overview of OC4PTOC
A common setting for all steps, StartPhSel, is used to specify the number of phase
currents to be high to enable operation. The settings can be chosen: 1 out of 3, 2 out
of 3 or 3 out of 3.
290
Current protection
The sampled analogue phase currents are processed in a pre-processing function

block. Using a parameter setting MeasType within the general settings for the four
step phase overcurrent protection function OC4PTOC, it is possible to select the
type of the measurement used for all overcurrent stages. It is possible to select
either discrete Fourier filter (DFT) or true RMS filter (RMS).
If DFT option is selected then only the RMS value of the fundamental frequency
components of each phase current is derived. Influence of DC current component
and higher harmonic current components are almost completely suppressed. If
RMS option is selected then the true RMS values is used. The true RMS value in
addition to the fundamental frequency component includes the contribution from
the current DC component as well as from higher current harmonic. The selected
current values are fed to OC4PTOC.
In a comparator, for each phase current, the DFT or RMS values are compared to
the set operation current value of the function (I1>, I2>, I3> or I4>). If a phase
current is larger than the set operation current, outputs START, STx, STL1, STL2
and STL3 are, without delay, activated. Output signals STL1, STL2 and STL3 are
common for all steps. This means that the lowest set step will initiate the
activation. The START signal is common for all three phases and all steps. It shall
be noted that the selection of measured value (DFT or RMS) do not influence the
operation of directional part of OC4PTOC.
Service value for individually measured phase currents are also available on the
local HMI for OC4PTOC function, which simplifies testing, commissioning and in
service operational checking of the function.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in
relation to the fundamental current is used. The 2nd harmonic current is taken from
the pre-processing of the phase currents and the relation is compared to a set
restrain current level.
The function can be directional. The direction of the fault current is given as
current angle in relation to the voltage angle. The fault current and fault voltage for
the directional function is dependent of the fault type. To enable directional
measurement at close in faults, causing low measured voltage, the polarization
voltage is a combination of the apparent voltage (85%) and a memory voltage
(15%). The following combinations are used.
Phase-phase short circuit:
U refL1L 2 = U L1 - U L 2 I dirL1L 2 = I L1 - I L 2
U refL 2 L 3 = U L 2 - U L 3 I dirL 2 L 3 = I L 2 - I L 3
U refL 3 L1 = U L 3 - U L1 I dirL 3 L1 = I L 3 - I L1
291
Current protection
Phase-earth short circuit:
U refL1 = U L1 I dirL1 = I L1
U refL 2 = U L 2 I dirL 2 = I L 2
U refL 3 = U L 3 I dirL 3 = I L 3

restored.
After 100 ms, the following occurs:
(between 10 and 30% of the set terminal rated current IBase), the condition
seals in.
The directional setting is given as a characteristic angle AngleRCA for the function
and an angle window AngleROA.
292
Current protection
Reverse
Uref
RCA
ROA
ROA Forward
Idir
en05000745.vsd
IEC05000745 V1 EN
Figure 164: Directional characteristic of the phase overcurrent protection
The default value of AngleRCA is –65°. The parameters AngleROA gives the angle
sector from AngleRCA for directional borders.
A minimum current for directional phase start current signal can be set:
IminOpPhSel.
If no blockings are given the start signals will start the timers of the step. The time
characteristic for each step can be chosen as definite time delay or inverse time
characteristic. A wide range of standardized inverse time characteristics is
available. It is also possible to create a tailor made time characteristic. The
possibilities for inverse time characteristics are described in section "Inverse
characteristics".
All four steps in OC4PTOC can be blocked from the binary input BLOCK. The
binary input BLKSTx (x=1, 2, 3 or 4) blocks the operation of respective step.
Different types of reset time can be selected as described in section "Inverse

characteristics".
There is also a possibility to activate a preset change (IxMult x= 1, 2, 3 or 4) of the

set operation current via a binary input (enable multiplier). In some applications the
operation value needs to be changed, for example due to changed network
switching state. The function can be blocked from the binary input BLOCK. The
start signals from the function can be blocked from the binary input BLKST. The
trip signals from the function can be blocked from the binary input BLKTR.
293
Current protection

OC4PTOC
I3P* TRIP
U3P* TR1
BLOCK TR2
BLKTR TR3
BLKST1 TR4
BLKST2 TRL1
BLKST3 TRL2
BLKST4 TRL3
ENMULT1 TR1L1
ENMULT2 TR1L2
ENMULT3 TR1L3
ENMULT4 TR2L1
TR2L2
TR2L3
TR3L1
TR3L2
TR3L3
TR4L1
TR4L2
TR4L3
START
ST1
ST2
ST3
ST4
STL1
STL2
STL3
ST1L1
ST1L2
ST1L3
ST2L1
ST2L2
ST2L3
ST3L1
ST3L2
ST3L3
ST4L1
ST4L2
ST4L3
2NDHARM
DIRL1
DIRL2
DIRL3
IEC06000187 V2 EN
Figure 165: OC4PTOC function block

Table 166: OC4PTOC Input signals
SIGNAL
SIGNAL
BLKST1 BOOLEAN 0 Block of Step1
294
Current protection

ENMULT1 BOOLEAN 0 When activated, the current multiplier is in use for
step1
step2
step3
step4
Table 167: OC4PTOC Output signals

TRIP BOOLEAN Trip
TR1 BOOLEAN Common trip signal from step1
TR1L1 BOOLEAN Trip signal from step1 phase L1
START BOOLEAN General start signal
ST1 BOOLEAN Common start signal from step1
295
Current protection

ST1L1 BOOLEAN Start signal from step1 phase L1
2NDHARM BOOLEAN Block from second harmonic detection
DIRL1 INTEGER Direction for phase1

Table 168: OC4PTOC Group settings (basic)
On
AngleRCA 40 - 65 Deg 1 55 Relay characteristic angle (RCA)
AngleROA 40 - 89 Deg 1 80 Relay operation angle (ROA)
StartPhSel Not Used - - 1 out of 3 Number of phases required for op (1 of
1 out of 3 3, 2 of 3, 3 of 3)
2 out of 3
3 out of 3
DirMode1 Off - - Non-directional Directional mode of step 1 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
296
Current protection

Characterist1 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. step 1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I1> 1 - 2500 %IB 1 1000 Phase current operate level for step1 in
% of IBase
t1 0.000 - 60.000 s 0.001 0.000 Definitive time delay of step 1
k1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the inverse time delay
for step 1
t1Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse curves
for step 1
I1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for current operate level for
step 1
Forward
Reverse
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
% of IBase
for step 2
297
Current protection

step 2
for step 2
Forward
Reverse
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
% of IBase
for step 3
for step 3
step 3
Forward
Reverse
ANSI Norm. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
298
Current protection

% of IBase
for step 4
for step 4
step 4
Table 169: OC4PTOC Group settings (advanced)

IMinOpPhSel 1 - 100 %IB 1 7 Minimum current for phase selection in
% of IBase
2ndHarmStab 5 - 100 %IB 1 20 Operate level of 2nd harm restrain op in
% of Fundamental
ResetTypeCrv1 Instantaneous - - Instantaneous Selection of reset curve type for step 1
IEC Reset
ANSI reset
tReset1 0.000 - 60.000 s 0.001 0.020 Reset time delay used in IEC Definite
Time curve step 1
tPCrv1 0.005 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
tACrv1 0.005 - 200.000 - 0.001 13.500 Parameter A for customer programmable
curve for step 1
tBCrv1 0.00 - 20.00 - 0.01 0.00 Parameter B for customer programmable
curve for step 1
tCCrv1 0.1 - 10.0 - 0.1 1.0 Parameter C for customer
programmable curve for step 1
tPRCrv1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
tTRCrv1 0.005 - 100.000 - 0.001 13.500 Parameter TR for customer
tCRCrv1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
HarmRestrain1 Off - - Off Enable block of step 1 from harmonic
On restrain
IEC Reset
ANSI reset
Time curve step 2
curve for step 2
curve for step 2
curve for step 2
299
Current protection

On restrain
IEC Reset
ANSI reset
Time curve step 3
curve for step 3
curve for step 3
curve for step 3
HarmRestrain3 Off - - Off Enable block of step3 from harmonic
On restrain
IEC Reset
ANSI reset
Time curve step 4
curve for step 4
curve for step 4
curve for step 4
300
Current protection

On restrain
Table 170: OC4PTOC Non group settings (basic)

MeasType DFT - - DFT Selection between DFT and RMS
RMS measurement

Table 171: OC4PTOC technical data
Function Setting range Accuracy
± 1.0% of I at I > Ir
Reset ratio > 95% -

Min. operating current (1-100)% of lBase ± 1.0% of Ir
Relay characteristic angle (RCA) (-70.0– -50.0) degrees ± 2.0 degrees

Maximum forward angle (40.0–70.0) degrees ± 2.0 degrees
Minimum forward angle (75.0–90.0) degrees ± 2.0 degrees
2nd harmonic blocking (5–100)% of fundamental ± 2.0% of Ir
Independent time delay (0.000-60.000) s ± 0.5% ± 10 ms

Minimum operate time (0.000-60.000) s ± 0.5% ± 10 ms
Inverse characteristics, see 19 curve types See table 644, table 645 and
table 644, table 645 and table table 646
646
Operate time, start function 25 ms typically at 0 to 2 x Iset -
Reset time, start function 25 ms typically at 2 to 0 x Iset -
Impulse margin time 15 ms typically -
7.3 Instantaneous residual overcurrent protection

EFPIOC
301
Current protection

Instantaneous residual overcurrent EFPIOC 50N
protection
IN>>
IEF V1 EN
7.3.1 Introduction
The Instantaneous residual overcurrent protection EFPIOC has a low transient
overreach and short tripping times to allow the use for instantaneous earth-fault
protection, with the reach limited to less than typical eighty percent of the line at
minimum source impedance. EFPIOC can be configured to measure the residual
current from the three-phase current inputs or the current from a separate current
input. EFPIOC can be blocked by activating the input BLOCK.

The sampled analog residual currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of the residual current,
as well as from the sample values the equivalent RMS value is derived. This
current value is fed to the Instantaneous residual overcurrent protection (EFPIOC).
In a comparator the RMS value is compared to the set operation current value of
the function (IN>>). If the residual current is larger than the set operation current a
signal from the comparator is set to true. This signal will, without delay, activate
the output signal TRIP.
There is also a possibility to activate a preset change of the set operation current
via a binary input (enable multiplier MULTEN). In some applications the operation
value needs to be changed, for example due to transformer inrush currents.
EFPIOC function can be blocked from the binary input BLOCK. The trip signals
from the function can be blocked from the binary input BLKAR, that can be
activated during single pole trip and autoreclosing sequences.

EFPIOC
I3P* TRIP
BLOCK
BLKAR
MULTEN
IEC06000269 V2 EN
Figure 166: EFPIOC function block
302
Current protection

Table 172: EFPIOC Input signals
I3P GROUP - Three phase currents
SIGNAL
BLKAR BOOLEAN 0 Block input for auto reclose
MULTEN BOOLEAN 0 Enable current multiplier
Table 173: EFPIOC Output signals


Table 174: EFPIOC Group settings (basic)
On
IN>> 1 - 2500 %IB 1 200 Operate residual current level in % of
IBase
Table 175: EFPIOC Group settings (advanced)

StValMult 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level

Table 176: EFPIOC technical data
± 1.0% of I at I > Ir
Reset ratio > 95% -

303
Current protection

Dynamic overreach < 5% at t = 100 ms -
7.4 Four step residual overcurrent protection EF4PTOC

Four step residual overcurrent EF4PTOC IN 51N/67N
protection
4
alt
4
TEF-REVA V1 EN
7.4.1 Introduction
The four step residual overcurrent protection EF4PTOC has an inverse or definite
time delay independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an
optional user defined characteristic.
The directional function is voltage polarized, current polarized or dual polarized.
EF4PTOC can be set directional or non-directional independently for each of the

steps.
A second harmonic blocking can be set individually for each step.
EF4PTOC can be used as main protection for phase-to-earth faults.
EF4PTOC can also be used to provide a system back-up for example, in the case of
the primary protection being out of service due to communication or voltage
transformer circuit failure.
Directional operation can be combined together with corresponding

communication logic in permissive or blocking teleprotection scheme. Current
reversal and weak-end infeed functionality are available as well.
EF4PTOC can be configured to measure the residual current from the three-phase
current inputs or the current from a separate current input.
304
Current protection

This function has the following three “Analog Inputs” on its function block in the
configuration tool:
1. I3P, input used for “Operating Quantity”.

2. U3P, input used for “Voltage Polarizing Quantity”.
3. I3PPOL, input used for “Current Polarizing Quantity”.
These inputs are connected from the corresponding pre-processing function blocks
in the Configuration Tool within PCM600.
7.4.2.1 Operating quantity within the function
The function always uses Residual Current (3I0) for its operating quantity. The
residual current can be:
1. directly measured (when a dedicated CT input of the IED is connected in

PCM600 to the fourth analog input of the pre-processing block connected to
EF4PTOC function input I3P). This dedicated IED CT input can be for
example, connected to:
• parallel connection of current instrument transformers in all three phases
(Holm-Green connection).
• one single core balance, current instrument transformer (cable CT).
• one single current instrument transformer located between power system
star point and earth (that is, current transformer located in the star point
of a star connected transformer winding).
• one single current instrument transformer located between two parts of a
protected object (that is, current transformer located between two star
points of double star shunt capacitor bank).
2. calculated from three-phase current input within the IED (when the fourth
analog input into the pre-processing block connected to EF4PTOC function
Analog Input I3P is not connected to a dedicated CT input of the IED in
PCM600). In such case the pre-processing block will calculate 3I0 from the
first three inputs into the pre-processing block by using the following formula:
Iop = 3I0 = IL1 + IL2 + IL3

where:
IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of
the fundamental frequency component of the residual current is derived. The
phasor magnitude is used within the EF4PTOC protection to compare it with the
305
Current protection
set operation current value of the four steps (IN1>, IN2>, IN3> or IN4>). If the
residual current is larger than the set operation current and the step is used in non-
directional mode a signal from the comparator for this step is set to true. This
signal will, without delay, activate the output signal STINx (x=step 1-4) for this
step and a common START signal.
7.4.2.2 Internal polarizing
A polarizing quantity is used within the protection in order to determine the

direction to the earth fault (Forward/Reverse).
The function can be set to use voltage polarizing, current polarizing or dual polarizing.
Voltage polarizing
When voltage polarizing is selected the protection will use the residual voltage
-3U0 as polarizing quantity U3P. This voltage can be:
1. directly measured (when a dedicated VT input of the IED is connected in

EF4PTOC function input U3P). This dedicated IED VT input shall be then
connected to open delta winding of a three phase main VT.
2. calculated from three phase voltage input within the IED (when the fourth
analog input into the pre-processing block connected to EF4PTOC analog
function input U3P is NOT connected to a dedicated VT input of the IED in
PCM600). In such case the pre-processing block will calculate -3U0 from the
UPol = -3U 0 = -(UL1 + UL2 + UL3)

where:
UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages.
Note! In order to use this all three phase-to-earth voltages must be connected to three IED VT inputs.
The residual voltage is pre-processed by a discrete fourier filter. Thus, the phasor
of the fundamental frequency component of the residual voltage is derived. This
phasor is used together with the phasor of the operating current, in order to
determine the direction to the earth fault (Forward/Reverse). In order to enable
voltage polarizing the magnitude of polarizing voltage shall be bigger than a
minimum level defined by setting parameter UpolMin.
It shall be noted that –3U0 is used to determine the location of the earth fault. This
insures the required inversion of the polarizing voltage within the earth-fault function.
306
Current protection
Current polarizing
When current polarizing is selected the function will use the residual current (3I0)
as polarizing quantity IPol. This current can be:
1. directly measured (when a dedicated CT input of the IED is connected in

EF4PTOC function input I3PPOL). This dedicated IED CT input is then
typically connected to one single current transformer located between power
system star point and earth (current transformer located in the star point of a
star connected transformer winding).
• For some special line protection applications this dedicated IED CT
input can be connected to parallel connection of current transformers in
all three phases (Holm-Green connection)
2. calculated from three phase current input within the IED (when the fourth
analog input into the pre-processing block connected to EF4PTOC function
analog input I3PPOL is NOT connected to a dedicated CT input of the IED in
PCM600). In such case the pre-processing block will calculate 3I0 from the
IPol = 3I0 = IL1 + IL2 + IL3

where:
IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
The residual polarizing current is pre-processed by a discrete fourier filter. Thus

the phasor of the fundamental frequency component of the residual current is
derived. This phasor is then multiplied with pre-set equivalent zero-sequence
source Impedance in order to calculate equivalent polarizing voltage UIPol in
accordance with the following formula:
UIPol = Z 0s × IPol = (RNPol + j × XNPol) × IPol

, which will be then used, together with the phasor of the operating current, in order
to determine the direction to the earth fault (Forward/Reverse). In order to enable
current polarizing the magnitude of polarizing current shall be bigger than a
minimum level defined by setting parameter IPolMin.
Dual polarizing
When dual polarizing is selected the function will use the vectorial sum of the
voltage based and current based polarizing in accordance with the following formula:
307
Current protection
UTotPol = UUPol + UIPol = -3U 0 + Z 0 s × IPol = -3U 0 + ( RNPol + jXNPol ) × IPol

Then the phasor of the total polarizing voltage UTotPol will be used, together with
the phasor of the operating current, to determine the direction of the earth fault
(Forward/Reverse).
7.4.2.3 External polarizing for earth-fault function
The individual steps within the protection can be set as non-directional. When this
setting is selected it is then possible via function binary input BLKSTx to provide
external directional control (that is, torque control) by for example using one of the
following functions if available in the IED:
1. Distance protection directional function.

2. Negative sequence polarized General current and voltage multi purpose
protection function.
7.4.2.4 Base quantities within the protection
The base quantities shall be entered as setting parameters for every earth-fault
function. Base current (IBase) shall be entered as rated phase current of the
protected object in primary amperes. Base voltage (UBase) shall be entered as
rated phase-to-phase voltage of the protected object in primary kV.
7.4.2.5 Internal earth-fault protection structure
The protection is internally divided into the following parts:
1. Four residual overcurrent steps.

2. Directional supervision element for residual overcurrent steps with integrated
directional comparison step for communication based earth-fault protection
schemes (permissive or blocking).
3. Second harmonic blocking element with additional feature for sealed-in
blocking during switching of parallel transformers.
4. Switch on to fault feature with integrated Under-Time logic for detection of
breaker problems during breaker opening or closing sequence.
Each part is described separately in the following sections.
7.4.2.6 Four residual overcurrent steps
Each overcurrent step uses operating quantity Iop (residual current) as measuring
quantity. Each of the four residual overcurrent steps has the following built-in
facilities:
• Directional mode can be set to Off/Non-directional/Forward/Reverse. By this

parameter setting the directional mode of the step is selected. It shall be noted
308
Current protection
that the directional decision (Forward/Reverse) is not made within the residual
overcurrent step itself. The direction of the fault is determined in common
“directional supervision element”.
• Residual current pickup value.
• Type of operating characteristic (inverse or definite time). By this parameter
setting it is possible to select inverse or definite time delay for the earth-fault
protection. Most of the standard IEC and ANSI inverse characteristics are
available. For the complete list of available inverse curves please refer to
section "Inverse characteristics".
• Type of reset characteristic (Instantaneous / IEC Reset / ANSI Reset). By this
parameter setting it is possible to select the reset characteristic of the step. For
the complete list of available reset curves please refer to section "Inverse time
characteristics".
• Time delay related settings. By these parameter settings the properties like
definite time delay, minimum operating time for inverse curves, reset time
delay and parameters to define user programmable inverse curve are defined.
• Supervision by second harmonic blocking feature (On/Off). By this parameter
setting it is possible to prevent operation of the step if the second harmonic
content in the residual current exceeds the preset level.
• Multiplier for scaling of the set residual current pickup value by external
binary signal. By this parameter setting it is possible to increase residual
current pickup value when function binary input ENMULTx has logical value
1.
Simplified logic diagram for one residual overcurrent step is shown in figure 167.
BLKTR
Characteristx=DefTime tx TRINx
|IOP| AND
a OR
a>b
b
ENMULTx
STINx
INxMult AND
X T
INx> F
Inverse
BLKSTx
BLOCK Characteristx=Inverse
2ndH_BLOCK_Int
OR
HarmRestrain1=Disabled
DirModex=Off OR STAGEx_DIR_Int
DirModex=Non-directional
DirModex=Forward
AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
en07000064.vsd
IEC07000064 V1 EN
Figure 167: Simplified logic diagram for residual overcurrent step x, where x =
step 1, 2, 3 or 4
The protection can be completely blocked from the binary input BLOCK. Output
signals for respective step, STINx and TRINx, can be blocked from the binary
309
Current protection
input BLKSTx. The trip signals from the function can be blocked from the binary
input BLKTR.
7.4.2.7 Directional supervision element with integrated directional

comparison function
It shall be noted that at least one of the four residual overcurrent

steps shall be set as directional in order to enable execution of the
directional supervision element and the integrated directional
comparison function.
The protection has integrated directional feature. As the operating quantity current
Iop is always used. The polarizing method is determined by the parameter setting
polMethod. The polarizing quantity will be selected by the function in one of the
following three ways:
1. When polMethod = Voltage, UVPol will be used as polarizing quantity.

2. When polMethod = Current, UIpol will be used as polarizing quantity.
3. WhenpolMethod = Dual, UTotPol will be used as polarizing quantity.
The operating and polarizing quantity are then used inside the directional element,
as shown in figure 168, in order to determine the direction of the earth fault.
310
Current protection
Reverse
Area
0.6·IN>Dir
AngleRCA Upol=-3Uo
IN>Dir
Forward
Area
Iop=3Io
IEC07000066 V3 EN
Figure 168: Operating characteristic for earth-fault directional element
Two relevant setting parameters for directional supervision element are:
• Directional element will be internally enabled to operate as soon as Iop is

bigger than 40% of IN>Dir and directional condition is fulfilled in set direction.
• Relay characteristic angle AngleRCA, which defines the position of forward
and reverse areas in the operating characteristic.
Directional comparison step, built-in within directional supervision element, will

set EF4PTOC function output binary signals:
1. STFW=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is

bigger than setting parameterIN>Dir and directional supervision element
detects fault in forward direction.
2. STRV=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is
bigger than 60% of setting parameter IN>Dir and directional supervision
element detects fault in reverse direction.
These signals shall be used for communication based earth-fault teleprotection

communication schemes (permissive or blocking).
Simplified logic diagram for directional supervision element with integrated

directional comparison step is shown in figure 169:
311
Current protection
|Iop|
a
a>b STRV
b AND
REVERSE_Int
0.6
X
a
a>b
AND STFW
IN>Dir b
FORWARD_Int
X
0.4
FWD
AND FORWARD_Int
AngleRCA
polMethod=Voltage
OR
UPolMin
Characteristic
Directional
polMethod=Dual UPol IPolMin
T
Iop
0.0 F
UTotPol
IPol AND REVERSE_Int
RVS
UIPol
RNPol Complex X T
XNPol Number 0.0 F STAGE1_DIR_Int
STAGE2_DIR_Int
STAGE3_DIR_Int OR
STAGE4_DIR_Int
BLOCK AND
IEC07000067 V3 EN
Figure 169: Simplified logic diagram for directional supervision element with integrated directional
comparison step
7.4.2.8 Second harmonic blocking element
A harmonic restrain of the Four step residual overcurrent protection function

EF4PTOC can be chosen. If the ratio of the 2nd harmonic component in relation to
the fundamental frequency component in the residual current exceeds the pre-set
level (defined by parameter setting 2ndHarmStab) any of the four residual
overcurrent stages can be selectively blocked by a parameter setting
HarmRestrainx. When 2nd harmonic restraint feature is active the EF4PTOC
function output signal 2NDHARMD will be set to logical value one.
In addition to the basic functionality explained above the 2nd harmonic blocking
can be set in such way to seal-in until residual current disappears. This feature
might be required to stabilize EF4PTOC during switching of parallel transformers
in the station. In case of parallel transformers there is a risk of sympathetic inrush
current. If one of the transformers is in operation, and the parallel transformer is
312
Current protection
switched in, the asymmetric inrush current of the switched in transformer will
cause partial saturation of the transformer already in service. This is called
transferred saturation. The 2nd harmonic of the inrush currents of the two
transformers will be in phase opposition. The summation of the two currents will
thus give a small 2nd harmonic current. The residual fundamental current will
however be significant. The inrush current of the transformer in service before the
parallel transformer energizing, will be a little delayed compared to the first
transformer. Therefore we will have high 2nd harmonic current component initially.
After a short period this current will however be small and the normal 2nd
harmonic blocking will reset. If the BlkParTransf function is activated the 2nd
harmonic restrain signal will be latched as long as the residual current measured by
the relay is larger than a selected step current level.
This feature has been called Block for Parallel Transformers. This 2nd harmonic seal-
in feature will be activated when all of the following three conditions are
simultaneously fulfilled:
1. Feature is enabled by entering setting parameter BlkParTransf = On.

2. Basic 2nd harmonic restraint feature has been active for at least 70ms.
3. Residual current magnitude is higher than the set start value for one of the four
residual overcurrent stages. By a parameter setting UseStartValue it is possible
to select which one of the four start values that will be used (IN1> or IN2> or
IN3> or IN4>).
Once Block for Parallel Transformers is activated the basic 2nd harmonic blocking
signal will be sealed-in until the residual current magnitude falls below a value
defined by parameter setting UseStartValue (see condition 3 above).
Simplified logic diagram for 2nd harmonic blocking feature is shown in figure 170.
313
Current protection
BLOCK
Extract second
IOP 2NDHARMD
harmonic current a
a>b
OR
component 2ndHarmStab b
X
Extract
fundamental
q-1
current component
t=70ms OR
t AN OR 2ndH_BLOCK_Int
D
BlkParTransf=On
|IOP|
a
a>b
b
UseStartValue
IN1>
IN2>
IN3>
IN4>
en07000068-2.vsd
IEC07000068 V2 EN
Figure 170: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers
feature
7.4.2.9 Switch on to fault feature
Integrated in the four step residual overcurrent protection are Switch on to fault
logic (SOTF) and Under-Time logic. The setting parameter SOTF is set to activate
either SOTF or Under-Time logic or both. When the circuit breaker is closing there
is a risk to close it onto a permanent fault, for example during an autoreclosing
sequence. The SOTF logic will enable fast fault clearance during such situations.
The time during which SOTF and Under-Time logics will be active after activation
is defined by the setting parameter t4U.
The SOTF logic uses the start signal from step 2 or step 3 for its operation, selected
by setting parameter StepForSOTF. The SOTF logic can be activated either from
change in circuit breaker position or from circuit breaker close command pulse.
The setting parameter ActivationSOTF can be set for activation of CB position
open change, CB position closed change or CB close command. In case of a
residual current start from step 2 or 3 (dependent on setting) the function will give
a trip after a set delay tSOTF. This delay is normally set to a short time (default 200
ms).
The Under-Time logic always uses the start signal from the step 4. The Under-
Time logic will normally be set to operate for a lower current level than the SOTF
314
Current protection
function. The Under-Time logic can also be blocked by the 2nd harmonic restraint
feature. This enables high sensitivity even if power transformer inrush currents can
occur at breaker closing. This logic is typically used to detect asymmetry of CB
poles immediately after switching of the circuit breaker. The Under-Time logic is
activated either from change in circuit breaker position or from circuit breaker
close and open command pulses. This selection is done by setting parameter
ActUnderTime. In case of a start from step 4 this logic will give a trip after a set
delay tUnderTime. This delay is normally set to a relatively short time (default 300
ms). Practically the Under-Time logic acts as circuit breaker pole-discordance
protection, but it is only active immediately after breaker switching. The Under-
Time logic can only be used in solidly or low impedance grounded systems.
SOTF
Open
tPulse
Closed
ActivationSOTF
Close command
tSOTF
AND
AND t
STIN2
StepForSOTF
STIN3
OperationMode
BLOCK
OFF
SOTF
UNDERTIME TRIP
UnderTime
tUnderTime
SOTF or
2nd Harmonic AND
HarmResSOFT t UnderTime
OR
Open
Close OR
tPulse
Close command
ActUnderTime
AND
STIN4
IEC06000643 V2 EN
Figure 171: Simplified logic diagram for SOTF and Under-Time features
EF4PTOC Logic Diagram Simplified logic diagram for the complete EF4PTOC
function is shown in figure 172:
315
Current protection
signal to
communication
scheme
Directional Check
Element
4 step over current

INPol Direction
operatingCurrent element TRIP
Element
3U0 One element for each
earthFaultDirection step
3I0 angleValid
DirMode
enableDir
harmRestrBlock
3I0 Harmonic
Restraint ³1
Element
start step 2, 3 and

4
Blocking at parallel
transformers
SwitchOnToFault
TRIP
CB
DirMode pos
or cmd
enableDir
Mode
Selection enableStep1-4
DirectionalMode1-4
en06000376.vsd
IEC06000376 V1 EN
Figure 172: Functional overview of EF4PTOC

EF4PTOC
I3P* TRIP
U3P* TRIN1
I3PPOL* TRIN2
BLOCK TRIN3
BLKTR TRIN4
BLKST1 TRSOTF
BLKST2 START
BLKST3 STIN1
BLKST4 STIN2
ENMULT1 STIN3
ENMULT2 STIN4
ENMULT3 STSOTF
ENMULT4 STFW
CBPOS STRV
CLOSECB 2NDHARMD
OPENCB
IEC06000424 V2 EN
Figure 173: EF4PTOC function block
316
Current protection

Table 177: EF4PTOC Input signals
I3P GROUP - Current connection
SIGNAL
U3P GROUP - Polarizing voltage connection
SIGNAL
I3PPOL GROUP - Polarizing current connection
SIGNAL
BLKST1 BOOLEAN 0 Block of step 1 (Start and trip)
step1
step2
step3
step4
CBPOS BOOLEAN 0 Breaker position
CLOSECB BOOLEAN 0 Breaker close command
OPENCB BOOLEAN 0 Breaker open command
Table 178: EF4PTOC Output signals

TRIP BOOLEAN Trip
TRIN1 BOOLEAN Trip signal from step 1
TRSOTF BOOLEAN Trip signal from earth fault switch onto fault function
STIN1 BOOLEAN Start signal step 1
STSOTF BOOLEAN Start signal from earth fault switch onto fault
function
317
Current protection

STFW BOOLEAN Forward directional start signal
STRV BOOLEAN Reverse directional start signal
2NDHARMD BOOLEAN 2nd harmonic block signal

Table 179: EF4PTOC Group settings (basic)
On
IBase 1 - 99999 A 1 3000 Base value for current settings
UBase 0.05 - 2000.00 kV 0.05 400.00 Base value for voltage settings
AngleRCA -180 - 180 Deg 1 65 Relay characteristic angle (RCA)
polMethod Voltage - - Voltage Type of polarization
Current
Dual
UPolMin 1 - 100 %UB 1 1 Minimum voltage level for polarization in
% of UBase
IPolMin 2 - 100 %IB 1 5 Minimum current level for polarization in
% of IBase
RNPol 0.50 - 1000.00 ohm 0.01 5.00 Real part of source Z to be used for
current polarisation
XNPol 0.50 - 3000.00 ohm 0.01 40.00 Imaginary part of source Z to be used for
current polarisation
IN>Dir 1 - 100 %IB 1 10 Residual current level for Direction
release in % of IBase
2ndHarmStab 5 - 100 % 1 20 Second harmonic restrain operation in %
of IN amplitude
BlkParTransf Off - - Off Enable blocking at parallel transformers
On
UseStartValue IN1> - - IN4> Current level blk at parallel transf (step1,
IN2> 2, 3 or 4)
IN3>
IN4>
SOTF Off - - Off SOTF operation mode (Off/SOTF/
SOTF Undertime/SOTF+undertime)
UnderTime
SOTF+UnderTime
ActivationSOTF Open - - Open Select signal that shall activate SOTF
Closed
CloseCommand
StepForSOTF Step 2 - - Step 2 Selection of step used for SOTF
Step 3
HarmResSOTF Off - - Off Enable harmonic restrain function in
On SOTF
tSOTF 0.000 - 60.000 s 0.001 0.200 Time delay for SOTF
t4U 0.000 - 60.000 s 0.001 1.000 Switch-onto-fault active time
318
Current protection

Forward
Reverse
Characterist1 ANSI Ext. inv. - - ANSI Def. Time Time delay curve type for step 1
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN1> 1 - 2500 %IB 1 100 Operate residual current level for step 1
in % of IBase
t1 0.000 - 60.000 s 0.001 0.000 Independent (defenite) time delay of step
1
k1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the dependent time
delay for step 1
IN1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for step 1
for step 1
HarmRestrain1 Off - - On Enable block of step 1 from harmonic
On restrain
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
319
Current protection

in % of IBase
t2 0.000 - 60.000 s 0.001 0.400 Independent (definitive) time delay of
step 2
delay for step 2
value for step 2
step 2
On restrain
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t3 0.000 - 60.000 s 0.001 0.800 Independent time delay of step 3
delay for step 3
value for step 3
for step 3
On restrain
Forward
Reverse
320
Current protection

ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
in % of IBase
t4 0.000 - 60.000 s 0.001 1.200 Independent (definitive) time delay of
step 4
delay for step 4
value for step 4
t4Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time in inverse curves
step 4
On restrain
Table 180: EF4PTOC Group settings (advanced)

ActUnderTime CB position - - CB position Select signal to activate under time (CB
CB command Pos/CBCommand)
tUnderTime 0.000 - 60.000 s 0.001 0.300 Time delay for under time
ResetTypeCrv1 Instantaneous - - Instantaneous Reset curve type for step 1
IEC Reset
ANSI reset
tReset1 0.000 - 60.000 s 0.001 0.020 Reset curve type for step 1
curve for step 1
curve for step 1
curve for step 1
321
Current protection

IEC Reset
ANSI reset
curve for step 2
curve for step 2
curve for step 2
IEC Reset
ANSI reset
curve for step 3
curve for step 3
curve for step 3
programmable curve step 3
IEC Reset
ANSI reset
curve for step 4
curve step 4
322
Current protection

curve for step 4

Table 181: EF4PTOC technical data
± 1.0% of I at I > Ir
Reset ratio > 95% -

Operate current for directional (1–100)% of lBase ± 1.0% of Ir
comparison
Timers (0.000-60.000) s ± 0.5% ± 10 ms
table 644, table 645 and table 646 table 646
Second harmonic restrain (5–100)% of fundamental ± 2.0% of Ir
operation
Relay characteristic angle (-180 to 180) degrees ± 2.0 degrees
Minimum polarizing voltage (1–100)% of UBase ± 0.5% of Ur
Minimum polarizing current (1-30)% of IBase ±0.25% of Ir
Real part of source Z used for (0.50-1000.00) W/phase -

current polarization
Imaginary part of source Z used (0.50–3000.00) W/phase -
for current polarization
7.5 Sensitive directional residual overcurrent and power

protection SDEPSDE
323
Current protection

Sensitive directional residual over SDEPSDE - 67N
current and power protection
7.5.1 Introduction
In networks with high impedance earthing, the phase-to-earth fault current is
significantly smaller than the short circuit currents. Another difficulty for earth-
fault protection is that the magnitude of the phase-to-earth fault current is almost
independent of the fault location in the network.
Directional residual current can be used to detect and give selective trip of phase-to-
earth faults in high impedance earthed networks. The protection uses the residual
current component 3I0 · cos φ, where φ is the angle between the residual current
and the residual voltage (-3U0), compensated with a characteristic angle.
Alternatively, the function can be set to strict 3I0 level with an check of angle 3I0
and cos φ.
Directional residual power can also be used to detect and give selective trip of phase-
to-earth faults in high impedance earthed networks. The protection uses the
residual power component 3I0 · 3U0 · cos φ, where φ is the angle between the
residual current and the reference residual voltage, compensated with a
characteristic angle.
A normal non-directional residual current function can also be used with definite or
inverse time delay.
A back-up neutral point voltage function is also available for non-directional

sensitive back-up protection.
In an isolated network, that is, the network is only coupled to earth via the
capacitances between the phase conductors and earth, the residual current always
has -90º phase shift compared to the reference residual voltage. The characteristic
angle is chosen to -90º in such a network.
In resistance earthed networks or in Petersen coil earthed, with a parallel resistor,

the active residual current component (in phase with the residual voltage) should be
used for the earth-fault detection. In such networks the characteristic angle is
chosen to 0º.
As the amplitude of the residual current is independent of the fault location the
selectivity of the earth-fault protection is achieved by time selectivity.
When should the sensitive directional residual overcurrent protection be used and
when should the sensitive directional residual power protection be used? Consider
the following facts:
324
Current protection
• Sensitive directional residual overcurrent protection gives possibility for better

sensitivity
• Sensitive directional residual power protection gives possibility to use inverse
time characteristics. This is applicable in large high impedance earthed
networks, with large capacitive earth-fault current
• In some power systems a medium size neutral point resistor is used, for
example, in low impedance earthed system. Such a resistor will give a resistive
earth-fault current component of about 200 - 400 A at a zero resistive phase-to-
earth fault. In such a system the directional residual power protection gives
better possibilities for selectivity enabled by inverse time power characteristics.
7.5.2.1 Function inputs
The function is using phasors of the residual current and voltage. Group signals I3P
and U3P containing phasors of residual current and voltage is taken from pre-
processor blocks.
The sensitive directional earth fault protection has the following sub-functions
included:
Directional residual current protection measuring 3I0·cos φ

φ is defined as the angle between the residual current 3I0 and the reference voltage
compensated with the set characteristic angle RCADir (φ=ang(3I0)-ang(Uref) ).
Uref = -3U0 ejRCADIr. RCADir is normally set equal to 0 in a high impedance
earthed network with a neutral point resistor as the active current component is
appearing out on the faulted feeder only. RCADir is set equal to -90° in an isolated
network as all currents are mainly capacitive. The function operates when 3I0·cos φ
gets larger than the set value.
325
Current protection
Uref
RCADir = 0o, ROADir = 0o
3I0
j = ang(3I0 ) - ang(3Uref )
-3U0 = Uref
3I0 × cosj
IEC06000648 V2 EN
Figure 174: RCADir set to 0°
Uref
RCADir = -90o, ROADir = 90o
3I0
3I0 × cos j
j = ang (3I0 ) - ang (Uref )
-3U0
IEC06000649 V2 EN
Figure 175: RCADir set to -90°
For trip, both the residual current 3I0·cos φ and the release voltage 3U0, must be
larger than the set levels: INCosPhi> and UNRel>.
Trip from this function can be blocked from the binary input BLKTRDIR.
326
Current protection
When the function is activated binary output signals START and STDIRIN are
activated. If the activation is active after the set delay tDef the binary output signals
TRIP and TRDIRIN are activated. The trip from this sub-function has definite time
delay.
There is a possibility to increase the operate level for currents where the angle φ is
larger than a set value as shown in the figure below. This is equivalent to blocking
of the function if φ > ROADir. This option is used to handle angle error for the
instrument transformers.
RCADir = 0o
3I0
Operate area
j
-3U0 = Uref
3I0 × cos j
ROADir
IEC06000650 V2 EN
Figure 176: Characteristic with ROADir restriction
The function indicates forward/reverse direction to the fault. Reverse direction is

defined as 3I0·cos (φ + 180°) ≥ the set value.
It is also possible to tilt the characteristic to compensate for current transformer

angle error with a setting RCAComp as shown in the figure 177:
327
Current protection
RCADir = 0º
Operate area
-3U0 =Uref
Instrument
transformer a
RCAcomp
angle error
Characteristic after
angle compensation
3I0 (to prot)

3I0 (prim)
en06000651.vsd
IEC06000651 V2 EN
Figure 177: Explanation of RCAComp
Directional residual power protection measuring 3I0 · 3U0 · cos φ

φ is defined as the angle between the residual current 3I0 and the reference voltage
compensated with the set characteristic angle RCADir (φ=ang(3I0)—ang(Uref) ).
Uref = -3U0 e-jRCA. The function operates when 3I0 · 3U0 · cos φ gets larger than
the set value.
For trip, both the residual power 3I0 · 3U0 · cos φ, the residual current 3I0 and the
release voltage 3U0, shall be larger than the set levels (SN>, INRel> and UNRel>).
activated. If the activation is active after the set delay tDef or after the inverse time
delay (setting kSN) the binary output signals TRIP and TRDIRIN are activated.
The function shall indicate forward/reverse direction to the fault. Reverse direction
is defined as 3I0 · 3U0·cos (φ + 180°) ³ the set value.
This variant has the possibility of choice between definite time delay and inverse
time delay.
328
Current protection
The inverse time delay is defined as:
kSN × (3I0 × 3U 0 × cos j(reference))

t inv =
3I0 × 3U 0 × cos j(measured)
Directional residual current protection measuring 3I0 and φ

The function will operate if the residual current is larger that the set value and the
angle φ = ang(3I0)-ang(Uref) is within the sector RCADir ± ROADir
RCADir = 0º
ROADir = 80º
Operate area
3I0
80 -3U0
en06000652.vsd
IEC06000652 V2 EN
Figure 178: Example of characteristic
For trip, both the residual current 3I0 and the release voltage 3U0, shall be larger
than the set levels INDir> and UNREL> and the angle φ shall be in the set sector
ROADir and RCADir.
activated. If the activation is active after the set delay tDef the binary output signals
TRIP and TRDIRIN are activated.
The function indicate forward/reverse direction to the fault. Reverse direction is

defined as φ is within the angle sector: RCADir + 180° ± ROADir
This variant shall have definite time delay.
329
Current protection
Directional functions
For all the directional functions there are directional start signals STFW: fault in
the forward direction, and STRV: start in the reverse direction. Even if the
directional function is set to operate for faults in the forward direction a fault in the
reverse direction will give the start signal STRV. Also if the directional function is
set to operate for faults in the reverse direction a fault in the forward direction will
give the start signal STFW.
Non-directional earth fault current protection

This function will measure the residual current without checking the phase angle.
The function will be used to detect cross-country faults. This function can serve as
alternative or back-up to distance protection with phase preference logic. To assure
selectivity the distance protection can block the non-directional earth fault current
function via the input BLKNDN.
If available the non-directional function is using the calculated residual current,

derived as sum of the phase currents. This will give a better ability to detect cross-
country faults with high residual current, also when dedicated core balance CT for
the sensitive earth fault protection will saturate.
This variant shall have the possibility of choice between definite time delay and
inverse time delay. The inverse time delay shall be according to IEC 60255-3.
For trip, the residual current 3I0 shall be larger than the set levels (INNonDir>).
Trip from this function can be blocked from the binary input BLKNDN.
When the function is activated binary output signal STNDIN is activated. If the
activation is active after the set delay tINNonDir or after the inverse time delay the
binary output signals TRIP and TRNDIN are activated.
Residual overvoltage release and protection

The directional function shall be released when the residual voltage gets higher
than a set level.
There shall also be a separate trip, with its own definite time delay, from this set
voltage level.
For trip, the residual voltage 3U0 shall be larger than the set levels (UN>).
Trip from this function can be blocked from the binary input BLKUN.
When the function is activated binary output signal STUN is activated. If the
activation is active after the set delay tUNNonDir TRIP and TRUN are activated. A
simplified logical diagram of the total function is shown in figure 179.
330
Current protection
INNonDir> STNDIN
t TRNDIN
UN> STUN
t TRUN
OpMODE=3I0cosfi
IN>
&
INcosPhi>
OpMODE=3I03U0cosfi
& ³1 & STARTDIRIN
INUNcosPhi> t
SN
& TRDIRIN
Phi in RCA +- ROA
TimeChar = InvTime
&
OpMODE=3I0 and fi
&
TimeChar = DefTime
DirMode = Forward & ³1

Forward STFW
DirMode = Reverse
&
Reverse STRV
en06000653.vsd
IEC06000653 V2 EN
Figure 179: Simplified logical diagram of the sensitive earth-fault current protection

SDEPSDE
I3P* TRIP
U3P* TRDIRIN
BLOCK TRNDIN
BLKTR TRUN
BLKTRDIR START
BLKNDN STDIRIN
BLKUN STNDIN
STUN
STFW
STRV
STDIR
UNREL
IEC07000032 V2 EN
Figure 180: SDEPSDE function block
331
Current protection

Table 182: SDEPSDE Input signals
I3P GROUP - Group signal for current
SIGNAL
U3P GROUP - Group signal for voltage
SIGNAL
BLOCK BOOLEAN 0 Blocks all the outputs of the function
BLKTR BOOLEAN 0 Blocks the operate outputs of the function
BLKTRDIR BOOLEAN 0 Blocks the directional operate outputs of the
function
BLKNDN BOOLEAN 0 Blocks the Non directional current residual outputs
BLKUN BOOLEAN 0 Blocks the Non directional voltage residual outputs
Table 183: SDEPSDE Output signals

TRIP BOOLEAN General trip of the function
TRDIRIN BOOLEAN Trip of the directional residual over current function
TRNDIN BOOLEAN Trip of non directional residual over current
TRUN BOOLEAN Trip of non directional residual over voltage
START BOOLEAN General start of the function
STDIRIN BOOLEAN Start of the directional residual over current
function
STNDIN BOOLEAN Start of non directional residual over current
STUN BOOLEAN Start of non directional residual over voltage
STFW BOOLEAN Start of directional function for a fault in forward
direction
STRV BOOLEAN Start of directional function for a fault in reverse
direction
STDIR INTEGER Direction of fault. A general signal common to all
three mode of residual over current protection
UNREL BOOLEAN Residual voltage release of operation of all
directional modes
332
Current protection

Table 184: SDEPSDE Group settings (basic)
On
OpMode 3I0Cosfi - - 3I0Cosfi Selection of operation mode for protection
3I03U0Cosfi
3I0 and fi
DirMode Forward - - Forward Direction of operation forward or reverse
Reverse
RCADir -179 - 180 Deg 1 -90 Relay characteristic angle RCA, in deg
RCAComp -10.0 - 10.0 Deg 0.1 0.0 Relay characteristic angle compensation
ROADir 0 - 90 Deg 1 90 Relay open angle ROA used as release
in phase mode, in deg
INCosPhi> 0.25 - 200.00 %IB 0.01 1.00 Set level for 3I0cosFi, directional res
over current, in %Ib
SN> 0.25 - 200.00 %SB 0.01 10.00 Set level for 3I03U0cosFi, starting inv
time count, in %Sb
INDir> 0.25 - 200.00 %IB 0.01 5.00 Set level for directional residual over
current prot, in %Ib
tDef 0.000 - 60.000 s 0.001 0.100 Definite time delay directional residual
overcurrent, in sec
SRef 0.03 - 200.00 %SB 0.01 10.00 Reference value of res power for inverse
time count, in %Sb
kSN 0.00 - 2.00 - 0.01 0.10 Time multiplier setting for directional
residual power mode
OpINNonDir> Off - - Off Operation of non-directional residual
On overcurrent protection
INNonDir> 1.00 - 400.00 %IB 0.01 10.00 Set level for non directional residual over
current, in %Ib
tINNonDir 0.000 - 60.000 s 0.001 1.000 Time delay for non-directional residual
over current, in sec
TimeChar ANSI Ext. inv. - - IEC Norm. inv. Operation curve selection for IDMT
ANSI Very inv. operation
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
333
Current protection

tMin 0.000 - 60.000 s 0.001 0.040 Minimum operate time for IEC IDMT
curves, in sec
kIN 0.00 - 2.00 - 0.01 1.00 IDMT time mult for non-dir res over
current protection
OpUN> Off - - Off Operation of non-directional residual
On overvoltage protection
UN> 1.00 - 200.00 %UB 0.01 20.00 Set level for non-directional residual over
voltage, in %Ub
tUN 0.000 - 60.000 s 0.001 0.100 Time delay for non-directional residual
over voltage, in sec
INRel> 0.25 - 200.00 %IB 0.01 1.00 Residual release current for all
directional modes, in %Ib
UNRel> 0.01 - 200.00 %UB 0.01 3.00 Residual release voltage for all direction
modes, in %Ub
Table 185: SDEPSDE Group settings (advanced)

tReset 0.000 - 60.000 s 0.001 0.040 Time delay used for reset of definite
timers, in sec
tPCrv 0.005 - 3.000 - 0.001 1.000 Setting P for customer programmable
curve
tACrv 0.005 - 200.000 - 0.001 13.500 Setting A for customer programmable
curve
tBCrv 0.00 - 20.00 - 0.01 0.00 Setting B for customer programmable
curve
tCCrv 0.1 - 10.0 - 0.1 1.0 Setting C for customer programmable
curve
ResetTypeCrv Immediate - - IEC Reset Reset mode when current drops off.
IEC Reset
ANSI reset
tPRCrv 0.005 - 3.000 - 0.001 0.500 Setting PR for customer programmable
curve
tTRCrv 0.005 - 100.000 - 0.001 13.500 Setting TR for customer programmable
curve
tCRCrv 0.1 - 10.0 - 0.1 1.0 Setting CR for customer programmable
curve
Table 186: SDEPSDE Non group settings (basic)

IBase 1 - 99999 A 1 100 Base Current, in A
UBase 0.05 - 2000.00 kV 0.05 63.50 Base Voltage, in kV Phase to Neutral
SBase 0.05 - kVA 0.05 6350.00 Base Power, in kVA. IBase*Ubase
200000000.00
334
Current protection
Table 187: SDEPSDE Non group settings (advanced)

RotResU 0 deg - - 180 deg Setting for rotating polarizing quantity if
180 deg necessary

Table 188: SDEPSDE technical data
Operate level for 3I0·cosj (0.25-200.00)% of lBase ± 1.0% of Ir at I £ Ir
directional residual overcurrent ± 1.0% of I at I > Ir
At low setting:
(2.5-10) mA ±1.0 mA
(10-50) mA ±0.5 mA
Operate level for 3I0·3U0 · cosj (0.25-200.00)% of SBase ± 1.0% of Sr at S £ Sr
directional residual power ± 1.0% of S at S > Sr
At low setting:
(0.25-5.00)% of SBase ± 10% of set value
Operate level for 3I0 and j (0.25-200.00)% of lBase ± 1.0% of Ir at £ Ir
residual overcurrent ± 1.0% of I at I > Ir
At low setting:
(2.5-10) mA ±1.0 mA
(10-50) mA ±0.5 mA
Operate level for non directional (1.00-400.00)% of lBase ± 1.0% of Ir at I £ Ir
overcurrent ± 1.0% of I at I > Ir
At low setting:
(10-50) mA ± 1.0 mA
Operate level for non directional (1.00-200.00)% of UBase ± 0.5% of Ur at U£Ur
residual overvoltage ± 0.5% of U at U > Ur
Residual release current for all (0.25-200.00)% of lBase ± 1.0% of Ir at I £ Ir

directional modes ± 1.0% of I at I > Ir
At low setting:
(2.5-10) mA ±1.0 mA
(10-50) mA ± 0.5 mA
Residual release voltage for all (0.01-200.00)% of UBase ± 0.5% of Ur at U£Ur
directional modes ± 0.5% of U at U > Ur
Reset ratio > 95% -

Timers (0.000-60.000) s ± 0.5% ± 10 ms
table 644, table 645 and table table 646
646
Relay characteristic angle RCA (-179 to 180) degrees ± 2.0 degrees
Relay open angle ROA (0-90) degrees ± 2.0 degrees
Operate time, non directional 60 ms typically at 0 to 2 x Iset -
residual over current
Reset time, non directional 60 ms typically at 2 to 0 x Iset -
residual over current
335
Current protection
7.6 Thermal overload protection, one time constant

LPTTR

Thermal overload protection, one time LPTTR 26
constant
SYMBOL-A V1 EN
7.6.1 Introduction
The increasing utilizing of the power system closer to the thermal limits has
generated a need of a thermal overload protection also for power lines.
A thermal overload will often not be detected by other protection functions and the
introduction of the thermal overload protection can allow the protected circuit to
operate closer to the thermal limits.
The three-phase current measuring protection has an I2t characteristic with settable
time constant and a thermal memory.
An alarm level gives early warning to allow operators to take action well before the
line is tripped.

The sampled analog phase currents are pre-processed and for each phase current
the RMS value is derived. These phase current values are fed to the thermal
overload protection, one time constant function LPTTR.
From the largest of the three-phase currents a final temperature is calculated

according to the expression:
2
æ I ö
Q final =ç ÷÷ × Tref
ç I ref
è ø
where:
I is the largest phase current,
Iref is a given reference current and
Tref is steady state temperature corresponding to Iref
336
Current protection
The ambient temperature is added to the calculated final temperature. If this

temperature is larger than the set operate temperature level, TripTemp, a START
output signal is activated.
The actual temperature at the actual execution cycle is calculated as:
æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-
è ø
where:
Qn is the calculated present temperature,
Qn-1 is the calculated temperature at the previous time step,
Qfinal is the calculated final temperature with the actual current,
Dt is the time step between calculation of the actual temperature and

t is the set thermal time constant for the protected device (line or cable)
The actual temperature of the protected component (line or cable) is calculated by

adding the ambient temperature to the calculated temperature, as shown above. The
ambient temperature can be taken from a separate sensor or can be given a constant
value. The calculated component temperature is available as a real figure signal,
TEMP.
When the component temperature reaches the set alarm level AlarmTemp the
output signal ALARM is set. When the component temperature reaches the set trip
level TripTemp the output signal TRIP is set.
There is also a calculation of the present time to operate with the present current.
This calculation is only performed if the final temperature is calculated to be above
the operation temperature:
æQ - Qoperate ö
toperate = -t × ln ç final
ç Q final - Q n ÷÷
è ø
The calculated time to trip is available as a real figure signal, TTRIP.
After a trip, caused by the thermal overload protection, there can be a lockout to
reconnect the tripped circuit. The output lockout signal LOCKOUT is activated
when the device temperature is above the set lockout release temperature setting
ReclTemp.
The time to lockout release is calculated that is, a calculation of the cooling time to
a set value. The thermal content of the function can be reset with input RESET.
337
Current protection
æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q final - Q n
è ø
Here the final temperature is equal to the set or measured ambient temperature. The
calculated time to reset of lockout is available as a real figure signal, TENRECL.
In some applications the measured current can involve a number of parallel lines.
This is often used for cable lines where one bay connects several parallel cables.
By setting the parameter IMult to the number of parallel lines (cables) the actual
current on one line is used in the protection algorithm. To activate this option the
input ENMULT must be activated.
The protection has a reset input: RESET. By activating this input the calculated
temperature is reset to its default initial value. This is useful during testing when
secondary injected current has given a calculated “false” temperature level.
Final Temp START

> TripTemp
actual temperature
Calculation
of actual
temperature
IL1, IL2, IL3 Calculation

of final
temperature
Actual Temp >

ALARM
AlarmTemp
TRIP
Actual Temp
> TripTemp
Lock-
LOCKOUT
out
logic
Actual Temp
< Recl Temp
Calculation TTRIP
of time to
trip
Calculation
of time to TENRECL
reset of
lockout
IEC09000637 V1 EN
Figure 181: Functional overview of LPTTR
338
Current protection

LPTTR
I3P* TRIP
BLOCK START
BLKTR ALARM
ENMULT LOCKOUT
AMBTEMP
SENSFLT
RESET
IEC04000396 V3 EN
Figure 182: LPTTR function block

Table 189: LPTTR Input signals
I3P GROUP - Group connection
SIGNAL
ENMULT BOOLEAN 0 Current multiplyer used when THOL is for two or
more lines
AMBTEMP REAL 0 Ambient temperature from external temperature
sensor
SENSFLT BOOLEAN 0 Validity status of ambient temperature sensor
RESET BOOLEAN 0 Reset of internal thermal load counter
Table 190: LPTTR Output signals

TRIP BOOLEAN Trip
START BOOLEAN Start Signal
ALARM BOOLEAN Alarm signal
LOCKOUT BOOLEAN Lockout signal

Table 191: LPTTR Group settings (basic)
On
IBase 0 - 99999 A 1 3000 Base current in A
TRef 0 - 600 Deg 1 90 End temperature rise above ambient of
the line when loaded with IRef
339
Current protection

IRef 0 - 400 %IB 1 100 The load current (in %of IBase) leading
to TRef temperature
IMult 1-5 - 1 1 Current multiplier when function is used
for two or more lines
Tau 0 - 1000 Min 1 45 Time constant of the line in minutes.
AlarmTemp 0 - 200 Deg 1 80 Temperature level for start (alarm)
TripTemp 0 - 600 Deg 1 90 Temperature level for trip
ReclTemp 0 - 600 Deg 1 75 Temperature for reset of lockout after trip
tPulse 0.05 - 0.30 s 0.01 0.1 Operate pulse length. Minimum one
execution cycle
AmbiSens Off - - Off External temperature sensor availiable
On
DefaultAmbTemp -50 - 250 Deg 1 20 Ambient temperature used when
AmbiSens is set to Off.
DefaultTemp -50 - 600 Deg 1 50 Temperature raise above ambient
temperature at startup

Table 192: LPTTR technical data
Reference current (0-400)% of IBase ± 1.0% of Ir
Start temperature reference (0-400)°C ± 1.0°C

Operate time: Time constant t = (0–1000) IEC 60255-8, class 5 + 200 ms
minutes
æ I 2 - I p2 ö
t = t × ln ç 2 ÷
ç I - Ib 2 ÷
è ø
I = actual measured current
Ip = load current before overload
occurs
Ib = base current, IBase
Alarm temperature (0-200)°C ± 2.0% of heat content trip

Trip temperature (0-400)°C ± 2.0% of heat content trip
Reset level temperature (0-400)°C ± 2.0% of heat content trip
7.7 Breaker failure protection CCRBRF
340
Current protection

Breaker failure protection CCRBRF 50BF
3I>BF
SYMBOL-U V1 EN
7.7.1 Introduction
Breaker failure protection (CCRBRF) ensures fast back-up tripping of surrounding
breakers in case of own breaker failure to open. CCRBRF can be current based,
contact based, or adaptive combination between these two principles.
A current check with extremely short reset time is used as check criteria to achieve
a high security against unnecessary operation.
A contact check criteria can be used where the fault current through the breaker is
small.
CCRBRF can be single- or three-phase initiated to allow use with single phase
tripping applications. For the three-phase version of CCRBRF the current criteria
can be set to operate only if two out of four for example, two phases or one phase
plus the residual current start. This gives a higher security to the back-up trip
command.
CCRBRF function can be programmed to give a single- or three-phase re-trip of

the own breaker to avoid unnecessary tripping of surrounding breakers at an
incorrect initiation due to mistakes during testing.

Breaker failure protection CCRBRF is initiated from protection trip command,
either from protection functions within the IED or from external protection devices.
The start signal can be phase selective or general (for all three phases). Phase
selective start signals enable single pole re-trip function. This means that a second
attempt to open the breaker is done. The re-trip attempt can be made after a set
time delay. For transmission lines single pole trip and autoreclosing is often used.
The re-trip function can be phase selective if it is initiated from phase selective line
protection. The re-trip function can be done with or without current check. With
the current check the re-trip is only performed if the current through the circuit
breaker is larger than the operate current level.
The start signal can be an internal or external protection trip signal. This signal will
start the back-up trip timer. If the opening of the breaker is successful this is
detected by the function, by detection of either low current through RMS
evaluation and a special adapted current algorithm or by open contact indication.
The special algorithm enables a very fast detection of successful breaker opening,
341
Current protection
that is, fast resetting of the current measurement. If the current and/or contact
detection has not detected breaker opening before the back-up timer has run its
time a back-up trip is initiated.
Further the following possibilities are available:
• The minimum length of the re-trip pulse, the back-up trip pulse and the back-
up trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the back-
up trip pulse 2 will however sustain as long as there is an indication of closed
breaker.
• In the current detection it is possible to use three different options: 1 out of 3
where it is sufficient to detect failure to open (high current) in one pole, 1 out
of 4 where it is sufficient to detect failure to open (high current) in one pole or
high residual current and 2 out of 4 where at least two current (phase current and/
or residual current) shall be high for breaker failure detection.
• The current detection level for the residual current can be set different from the
setting of phase current detection.
• It is possible to have different back-up time delays for single-phase faults and
for multi-phase faults.
• The back-up trip can be made without current check. It is possible to have this
option activated for small load currents only.
• It is possible to have instantaneous back-up trip function if a signal is high if
the circuit breaker is insufficient to clear faults, for example at low gas pressure.
START 30 ms
STL1 OR BFP Started L1

150 ms
AND S
SR Q t
Time out L1
R AND
BLOCK
OR
Reset L1
Retrip Time Out L1
BackupTrip L1 OR
IEC09000976 V1 EN
Figure 183: Simplified logic scheme of the CCRBRF starting logic
342
Current protection
IP>
a
a>b
b
FunctionMode Current
OR AND Reset L1
OR
Contact
1 Time out L1
Current and Contact OR
AND
Current High L1
IL1 CB Closed L1
AND
OR
BFP Started L1
a AND AND
a>b OR AND
I>BlkCont b
CBCLDL1 Contact Closed L1

AND
IEC09000977 V1 EN
Figure 184: Simplified logic scheme of the CCRBRF, CB position evaluation
t1 TRRETL3
BFP Started L1 From other
t Retrip Time Out L1
phases TRRETL2 OR
TRRET
tPulse
RetripMode No CBPos Check AND
OR TRRETL1
OR
1
OR AND
CB Pos Check
AND
CB Closed L1
CBFLT
IEC09000978 V1 EN
Figure 185: Simplified logic scheme of the retrip logic function
343
Current protection
IN
a
a>b AND
IN> b
BUTripMode Contact Closed L1

2 out of 4
1 out of 4 OR
1
1 out of 3 OR
Current High L2
From other
Current High L3
phases
Current High L1 AND
CBFLT
AND
t2
BFP Started L1 Backup Trip L1
t AND
OR
t2MPh
AND t
AND
OR OR
tPulse
From other Backup Trip L2 OR TRBU
OR
phases Backup Trip L3
From other BFP Started L2 2 of 3
phases BFP Started L3 tPulse
t3
OR
TRBU2
S Q t
R SR
AND
IEC09000979 V1 EN
Figure 186: Simplified logic scheme of the back-up trip logic function
Internal logical signals STIL1, STIL2, STIL3 have logical value 1 when current in
respective phase has magnitude larger than setting parameter IP>.

CCRBRF
I3P* TRBU
BLOCK TRBU2
START TRRET
STL1 TRRETL1
STL2 TRRETL2
STL3 TRRETL3
CBCLDL1 CBALARM
CBCLDL2
CBCLDL3
CBFLT
IEC06000188 V2 EN
Figure 187: CCRBRF function block
344
Current protection

Table 193: CCRBRF Input signals
SIGNAL
START BOOLEAN 0 Three phase start of breaker failure protection
function
STL1 BOOLEAN 0 Start signal of phase L1
CBCLDL1 BOOLEAN 1 Circuit breaker closed in phase L1
CBFLT BOOLEAN 0 CB faulty, unable to trip. Back-up trip
instantanously.
Table 194: CCRBRF Output signals

TRBU BOOLEAN Back-up trip by breaker failure protection function
TRBU2 BOOLEAN Second back-up trip by breaker failure protection
function
TRRET BOOLEAN Retrip by breaker failure protection function
TRRETL1 BOOLEAN Retrip by breaker failure protection function
phase L1
phase L2
phase L3
CBALARM BOOLEAN Alarm for faulty circuit breaker

Table 195: CCRBRF Group settings (basic)
On
FunctionMode Current - - Current Detection principle for back-up trip
Contact
Current&Contact
345
Current protection

BuTripMode 2 out of 4 - - 1 out of 3 Back-up trip mode
1 out of 3
1 out of 4
RetripMode Retrip Off - - Retrip Off Operation mode of re-trip logic
CB Pos Check
No CBPos Check
IP> 5 - 200 %IB 1 10 Operate phase current level in % of IBase
IN> 2 - 200 %IB 1 10 Operate residual current level in % of
IBase
t1 0.000 - 60.000 s 0.001 0.000 Time delay of re-trip
t2 0.000 - 60.000 s 0.001 0.150 Time delay of back-up trip
t2MPh 0.000 - 60.000 s 0.001 0.150 Time delay of back-up trip at multi-phase
start
tPulse 0.000 - 60.000 s 0.001 0.200 Trip pulse duration
Table 196: CCRBRF Group settings (advanced)

I>BlkCont 5 - 200 %IB 1 20 Current for blocking of CB contact
operation in % of IBase
t3 0.000 - 60.000 s 0.001 0.030 Additional time delay to t2 for a second
back-up trip
tCBAlarm 0.000 - 60.000 s 0.001 5.000 Time delay for CB faulty signal

Table 197: CCRBRF technical data
Operate phase (5-200)% of lBase ± 1.0% of Ir at I £ Ir
current ± 1.0% of I at I > Ir
Reset ratio, phase > 95% -

current
Operate residual (2-200)% of lBase ± 1.0% of Ir at I £ Ir
current ± 1.0% of I at I > Ir
Reset ratio, residual > 95% -

current
Phase current level (5-200)% of lBase ± 1.0% of Ir at I £ Ir
for blocking of ± 1.0% of I at I > Ir
contact function
Reset ratio > 95% -
Timers (0.000-60.000) s ± 0.5% ± 10 ms
Operate time for 10 ms typically -
current detection
Reset time for 15 ms maximum -
current detection
346
Current protection
7.8 Stub protection STBPTOC

Stub protection STBPTOC 50STB
3I>STUB
SYMBOL-T V1 EN
7.8.1 Introduction
When a power line is taken out of service for maintenance and the line
disconnector is opened in multi-breaker arrangements the voltage transformers will
mostly be outside on the disconnected part. The primary line distance protection
will thus not be able to operate and must be blocked.
The stub protection STBPTOC covers the zone between the current transformers
and the open disconnector. The three-phase instantaneous overcurrent function is
released from a normally open, NO (b) auxiliary contact on the line disconnector.

The sampled analog phase currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of each phase current
the RMS value of each phase current is derived. These phase current values are fed
to a comparator in the stub protection function STBPTOC. In a comparator the
RMS values are compared to the set operating current value of the function I>.
If a phase current is larger than the set operating current the signal from the
comparator for this phase is activated. This signal will, in combination with the
release signal from line disconnection (RELEASE input), activate the timer for the
TRIP signal. If the fault current remains during the timer delay t, the TRIP output
signal is activated. The function can be blocked by activation of the BLOCK input.
347
Current protection
STUB PROTECTION FUNCTION
BLOCK
TRIP
STIL1 AND
STIL2 OR
STIL3
RELEASE
en05000731.vsd
IEC05000731 V1 EN
Figure 188: Simplified logic diagram for Stub protection

STBPTOC
I3P* TRIP
BLOCK START
BLKTR
RELEASE
IEC05000678 V2 EN
Figure 189: STBPTOC function block

Table 198: STBPTOC Input signals
SIGNAL
RELEASE BOOLEAN 0 Release of stub protection
Table 199: STBPTOC Output signals

TRIP BOOLEAN Trip
START BOOLEAN General start
348
Current protection

Table 200: STBPTOC Group settings (basic)
On
ReleaseMode Release - - Release Release of stub protection
Continuous
I> 1 - 2500 %IB 1 200 Operate current level in % of IBase
Table 201: STBPTOC Group settings (advanced)

t 0.000 - 60.000 s 0.001 0.000 Time delay

Table 202: STBPTOC technical data
Operating current (1-2500)% of IBase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir
Reset ratio > 95% -

Definite time (0.000-60.000) s ± 0.5% ± 10 ms
Operating time, start 25 ms typically at 0 to 2 x Iset -
function
Resetting time, 25 ms typically at 2 to 0 x Iset -
startfunction
7.9 Pole discordance protection CCRPLD

Pole discordance protection CCRPLD 52PD
PD
SYMBOL-S V1 EN
349
Current protection
7.9.1 Introduction
Single pole operated circuit breakers can due to electrical or mechanical failures
end up with the different poles in different positions (close-open). This can cause
negative and zero sequence currents which gives thermal stress on rotating
machines and can cause unwanted operation of zero sequence or negative sequence
current functions.
Normally the own breaker is tripped to correct such a situation. If the situation
persists the surrounding breaker should be tripped to clear the unsymmetrical load
situation.
The Polediscordance protection function CCRPLD operates based on information

from auxiliary contacts of the circuit breaker for the three phases with additional
criteria from unsymmetrical phase current when required.

The detection of pole discordance can be made in two different ways. If the contact
based function is used an external logic can be made by connecting the auxiliary
contacts of the circuit breaker so that a pole discordance is indicated, see figure 190.
circuit breaker
Pole discordance signal from circuit breaker
en05000287.vsd
IEC05000287 V2 EN
Figure 190: Pole discordance external detection logic
This binary signal is connected to a binary input of the IED. The appearance of this
signal will start a timer that will give a trip signal after the set time delay.
There is also a possibility to connect all phase selective auxiliary contacts (phase
contact open and phase contact closed) to binary inputs of the IED, see figure 191.
350
Current protection
C.B.
poleOneClosed from C.B.
poleTwoClosed from C.B.
poleThreeClosed from C.B.
+
poleOneOpened from C.B.
poleTwoOpened from C.B.
poleThreeOpened from C.B.
en05000288.vsd
IEC05000288 V1 EN
Figure 191: Pole discordance signals for internal logic
In this case the logic is realized within the function. If the inputs are indicating pole
discordance the trip timer is started. This timer will give a trip signal after the set
delay.
Pole discordance can also be detected by means of phase selective current

measurement. The sampled analog phase currents are pre-processed in a discrete
Fourier filter (DFT) block. From the fundamental frequency components of each
phase current the RMS value of each phase current is derived. The smallest and the
largest phase current are derived. If the smallest phase current is lower than the
setting CurrUnsymLevel times the largest phase current the settable trip timer
(tTrip) is started. The tTrip timer gives a trip signal after the set delay. The TRIP
signal is a pulse 150 ms long. The current based pole discordance function can be
set to be active either continuously or only directly in connection to breaker open
or close command.
The function also has a binary input that can be configured from the autoreclosing
function, so that the pole discordance function can be blocked during sequences
with a single pole open if single pole autoreclosing is used.
The simplified block diagram of the current and contact based Pole discordance
protection function CCRPLD is shown in figure 192.
351
Current protection
BLOCK
OR
BLKDBYAR
PolPosAuxCont
AND
POLE1OPN
POLE1CL
POLE2OPN
Discordance
POLE2CL
detection
POLE3OPN
POLE3CL t 150 ms
t TRIP
AND
OR
PD Signal from CB
AND
EXTPDIND
CLOSECMD t+200 ms
OR
OPENCMD
AND
Unsymmetry current
detection
en05000747.vsd
IEC05000747 V1 EN
Figure 192: Simplified block diagram of pole discordance function CCRPLD -

contact and current based
CCRPLDis blocked if:
• The IED is in TEST mode and CCRPLD has been blocked from the local HMI
• The input signal BLOCK is high
• The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discordance
protection. It can be connected to a binary input in the IED in order to receive a
block command from external devices or can be software connected to other
internal functions in the IED itself in order to receive a block command from
internal functions. Through OR gate it can be connected to both binary inputs and
internal function outputs.
The BLKDBYAR signal blocks the pole discordance operation when a single
phase autoreclosing cycle is in progress. It can be connected to the output signal
1PT1 on SMBRRECfunction block. If the autoreclosing function is an external
device, then BLKDBYAR has to be connected to a binary input in the IED and this
binary input is connected to a signalization “1phase autoreclosing in progress”
from the external autoreclosing device.
If the pole discordance protection is enabled, then two different criteria can
generate a trip signal TRIP:
• Pole discordance signaling from the circuit breaker.

• Unsymmetrical current detection.
352
Current protection
7.9.2.1 Pole discordance signaling from circuit breaker
If one or two poles of the circuit breaker have failed to open or to close the pole
discordance status, then the function input EXTPDIND is activated from the pole
discordance signal derived from the circuit breaker auxiliary contacts (one NO
contact for each phase connected in parallel, and in series with one NC contact for
each phase connected in parallel) and, after a settable time interval tTrip (0-60 s), a
150 ms trip pulse command TRIP is generated by the Polediscordance function.
7.9.2.2 Unsymmetrical current detection
Unsymmetrical current indicated if:
• any phase current is lower than CurrUnsymLevel of the highest current in the
three phases.
• the highest phase current is greater than CurrRelLevel of IBase.
If these conditions are true, an unsymmetrical condition is detected and the internal
signal INPS is turned high. This detection is enabled to generate a trip after a set
time delay tTrip if the detection occurs in the next 200 ms after the circuit breaker
has received a command to open trip or close and if the unbalance persists. The 200
ms limitation is for avoiding unwanted operation during unsymmetrical load
conditions.
The pole discordance protection is informed that a trip or close command has been
given to the circuit breaker through the inputs CLOSECMD (for closing command
information) and OPENCMD (for opening command information). These inputs
can be connected to terminal binary inputs if the information are generated from
the field (that is from auxiliary contacts of the close and open push buttons) or may
be software connected to the outputs of other integrated functions (that is close
command from a control function or a general trip from integrated protections).

CCRPLD
I3P* TRIP
BLOCK START
BLKDBYAR
CLOSECMD
OPENCMD
EXTPDIND
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL
IEC06000275 V2 EN
Figure 193: CCRPLD function block
353
Current protection

Table 203: CCRPLD Input signals
SIGNAL
BLKDBYAR BOOLEAN 0 Block of function at CB single phase auto re-
closing cycle
CLOSECMD BOOLEAN 0 Close order to CB
OPENCMD BOOLEAN 0 Open order to CB
EXTPDIND BOOLEAN 0 Pole discordance signal from CB logic
POLE1OPN BOOLEAN 1 Pole one opened indication from CB
POLE1CL BOOLEAN 0 Pole one closed indication from CB
POLE2OPN BOOLEAN 1 Pole two opened indication from CB
POLE2CL BOOLEAN 0 Pole two closed indication from CB
POLE3OPN BOOLEAN 1 Pole three opened indication from CB
POLE3CL BOOLEAN 0 Pole three closed indication from CB
Table 204: CCRPLD Output signals

TRIP BOOLEAN Trip signal to CB
START BOOLEAN Trip condition TRUE, waiting for time delay

Table 205: CCRPLD Group settings (basic)
On
IBase 1 - 99999 - 1 3000 Base current
tTrip 0.000 - 60.000 s 0.001 0.300 Time delay between trip condition and
trip signal
ContSel Off - - Off Contact function selection
PD signal from CB
Pole pos aux cont.
CurrSel Off - - Off Current function selection
CB oper monitor
Continuous monitor
CurrUnsymLevel 0 - 100 % 1 80 Unsym magn of lowest phase current
compared to the highest.
CurrRelLevel 0 - 100 %IB 1 10 Current magnitude for release of the
function in % of IBase
354
Current protection

Table 206: CCRPLD technical data
Operate current (0–100)% of IBase ± 1.0% of Ir
Time delay (0.000-60.000) s ± 0.5% ± 10 ms
7.10 Directional underpower protection GUPPDUP

Directional underpower protection GUPPDUP 37
P<
SYMBOL-LL V1 EN
7.10.1 Introduction
The task of a generator in a power plant is to convert mechanical energy available
as a torque on a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that
it does not cover bearing losses and ventilation losses. Then, the synchronous
generator becomes a synchronous motor and starts to take electric power from the
rest of the power system. This operating state, where individual synchronous
machines operate as motors, implies no risk for the machine itself. If the generator
under consideration is very large and if it consumes lots of electric power, it may
be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous
state. The task of the reverse power protection is to protect the turbine and not to
protect the generator itself.
Figure 194 illustrates the reverse power protection with underpower IED and with
overpower IED. The underpower IED gives a higher margin and should provide
better dependability. On the other hand, the risk for unwanted operation
immediately after synchronization may be higher. One should set the underpower
IED to trip if the active power from the generator is less than about 2%. One
should set the overpower IED to trip if the power flow from the network to the
generator is higher than 1% depending on the type of turbine.
355
Current protection
Underpower IED Overpower IED
Operate
Q Q
Operate
Line Line
Margin Margin
P P
Operating point Operating point

without without
turbine torque turbine torque
IEC06000315 V2 EN
Figure 194: Protection with underpower IED and overpower IED

A simplified scheme showing the principle of the power protection function is
shown in figure 195. The function has two stages with individual settings.
Chosen current
phasors P
Complex Derivation of S(angle)

S(angle) < t TRIP1
power S(composant)
Chosen voltage Power1
calculation in Char angle
phasors Q
START1
S(angle) < t TRIP2

Power2
START2
P = POWRE
Q = POWIM
IEC09000018 V2 EN
Figure 195: Simplified logic diagram of the power protection function
The function will use voltage and current phasors calculated in the pre-processing
blocks. The apparent complex power is calculated according to chosen formula as
shown in table 207.
356
Current protection
Table 207: Complex power calculation

Set value: Mode Formula used for complex power calculation
L1, L2, L3
S = U L1 × I L1* + U L 2 × I L 2* + U L 3 × I L 3*
Arone
S = U L1L 2 × I L1* - U L 2 L 3 × I L 3*
PosSeq
S = 3 × U PosSeq × I PosSeq *
L1L2
S = U L1L 2 × ( I L1* - I L 2* )
L2L3
S = U L 2 L 3 × ( I L 2* - I L 3* )
L3L1
S = U L 3 L1 × ( I L 3* - I L1* )
L1
S = 3 × U L1 × I L1*
L2
S = 3 × U L 2 × I L 2*
L3
S = 3 × U L 3 × I L 3*
The active and reactive power is available from the function and can be used for
monitoring and fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is

calculated. If this angle is 0° the active power component P is calculated. If this
angle is 90° the reactive power component Q is calculated.
The calculated power component is compared to the power pick up setting

Power1(2). For directional underpower protection, a start signal START1(2) is
activated if the calculated power component is smaller than the pick up value. For
directional overpower protection, a start signal START1(2) is activated if the
calculated power component is larger than the pick up value. After a set time delay
TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At
activation of any of the two stages a common signal START will be activated. At
trip from any of the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The

absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) + drop-
power1(2)). For generator low forward power protection the power setting is very
357
Current protection
low, normally down to 0.02 p.u. of rated generator power. The hysteresis should
therefore be set to a smaller value. The drop-power value of stage1 can be
calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) +
Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-
power1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 ·
Power1(2)) is corrected to the minimal value.
If the measured power drops under the drop-power1(2) value, the function will
reset after a set time DropDelay1(2). The reset means that the start signal will drop
out and that the timer of the stage will reset.
7.10.2.1 Low pass filtering
In order to minimize the influence of the noise signal on the measurement it is

possible to introduce the recursive, low pass filtering of the measured values for S
(P, Q). This will make slower measurement response to the step changes in the
measured quantity. Filtering is performed in accordance with the following
recursive formula:
S = k × SOld + (1 - k ) × SCalculated
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalculated is the new calculated value in the present execution cycle

k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is
immediately given out without any filtering (that is without any additional delay).
When k is set to value bigger than 0, the filtering is enabled. A typical value for
k=0.92 in case of slow operating functions.
7.10.2.2 Calibration of analog inputs
Measured currents and voltages used in the Power function can be calibrated to get
class 0.5 measuring accuracy. This is achieved by amplitude and angle
compensation at 5, 30 and 100% of rated current and voltage. The compensation
below 5% and above 100% is constant and linear in between, see example in figure
196.
358
Current protection
IEC05000652 V2 EN
Figure 196: Calibration curves
The first current and voltage phase in the group signals will be used as reference
and the amplitude and angle compensation will be used for related input signals.
Analog outputs (Monitored data) from the function can be used for service values
or in the disturbance report. The active power is provided as MW value: P, or in
percent of base power: PPERCENT. The reactive power is provided as Mvar value:
Q, or in percent of base power: QPERCENT.

GUPPDUP
I3P* TRIP
U3P* TRIP1
BLOCK TRIP2
BLOCK1 START
BLOCK2 START1
START2
P
PPERCENT
Q
QPERCENT
IEC07000027 V2 EN
Figure 197: GUPPDUP function block
359
Current protection

Table 208: GUPPDUP Input signals
SIGNAL
SIGNAL
BLOCK1 BOOLEAN 0 Block of stage 1
Table 209: GUPPDUP Output signals

TRIP1 BOOLEAN Trip of stage 1
START BOOLEAN Common start
START1 BOOLEAN Start of stage 1
P REAL Active Power in MW
PPERCENT REAL Active power in % of SBASE
Q REAL Reactive power in Mvar
QPERCENT REAL Reactive power in % of SBASE

Table 210: GUPPDUP Group settings (basic)
On
OpMode1 Off - - UnderPower Operation mode 1
UnderPower
Power1 0.0 - 500.0 %SB 0.1 1.0 Power setting for stage 1 in % of Sbase
Angle1 -180.0 - 180.0 Deg 0.1 0.0 Angle for stage 1
TripDelay1 0.010 - 6000.000 s 0.001 1.000 Trip delay for stage 1
DropDelay1 0.010 - 6000.000 s 0.001 0.060 Drop delay for stage 1
OpMode2 Off - - UnderPower Operation mode 2
UnderPower
360
Current protection
Table 211: GUPPDUP Group settings (advanced)

k 0.00 - 0.99 - 0.01 0.00 Low pass filter coefficient for power
measurement, P and Q
Hysteresis1 0.2 - 5.0 pu 0.1 0.5 Absolute hysteresis of stage 1
Hysteresis2 0.2 - 5.0 pu 0.1 0.5 Absolute hysteresis of stage 2
IAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to calibrate current at
5% of Ir
30% of Ir
100% of Ir
UAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to calibrate voltage at
5% of Ur
30% of Ur
100% of Ur
IAngComp5 -10.000 - 10.000 Deg 0.001 0.000 Angle calibration for current at 5% of Ir
Table 212: GUPPDUP Non group settings (basic)

IBase 1 - 99999 A 1 3000 Current-Reference (primary current A)
UBase 0.05 - 2000.00 kV 0.05 400.00 Voltage-Reference (primary voltage kV)
Mode L1, L2, L3 - - Pos Seq Selection of measured current and
Arone voltage
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3

Table 213: GUPPDUP technical data
Power level (0.0–500.0)% of SBase ± 1.0% of Sr at S < Sr
± 1.0% of S at S > Sr
At low setting:
(0.5-2.0)% of SBase < ± 50% of set value
(2.0-10)% of SBase < ± 20% of set value
Characteristic angle (-180.0–180.0) degrees 2 degrees
Timers (0.00-6000.00) s ± 0.5% ± 10 ms
361
Current protection
7.11 Directional overpower protection GOPPDOP

Directional overpower protection GOPPDOP 32
P>
DOCUMENT172362-IMG158942
V1 EN
7.11.1 Introduction
The task of a generator in a power plant is to convert mechanical energy available
as a torque on a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that
it does not cover bearing losses and ventilation losses. Then, the synchronous
generator becomes a synchronous motor and starts to take electric power from the
rest of the power system. This operating state, where individual synchronous
machines operate as motors, implies no risk for the machine itself. If the generator
under consideration is very large and if it consumes lots of electric power, it may
be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous
state. The task of the reverse power protection is to protect the turbine and not to
protect the generator itself.
Figure 198 illustrates the reverse power protection with underpower IED and with
overpower IED. The underpower IED gives a higher margin and should provide
better dependability. On the other hand, the risk for unwanted operation
immediately after synchronization may be higher. One should set the underpower
IED to trip if the active power from the generator is less than about 2%. One
should set the overpower IED to trip if the power flow from the network to the
generator is higher than 1%.
362
Current protection
Underpower IED Overpower IED
Operate
Q Q
Operate
Line Line
Margin Margin
P P
Operating point Operating point

without without
turbine torque turbine torque
IEC06000315 V2 EN
Figure 198: Reverse power protection with underpower IED and overpower IED

A simplified scheme showing the principle of the power protection function is
shown in figure 199. The function has two stages with individual settings.
Chosen current
phasors P
Complex Derivation of S(angle)

S(angle) > t TRIP1
power S(composant)
Chosen voltage Power1
calculation in Char angle
phasors Q
START1
S(angle) > t TRIP2

Power2
START2
P = POWRE
Q = POWIM
IEC06000567 V2 EN
Figure 199: Simplified logic diagram of the power protection function
The function will use voltage and current phasors calculated in the pre-processing
blocks. The apparent complex power is calculated according to chosen formula as
shown in table 214.
363
Current protection
Table 214: Complex power calculation

Set value: Mode Formula used for complex power calculation
L1, L2, L3
S = U L1 × I L1* + U L 2 × I L 2* + U L 3 × I L 3*
Arone
S = U L1L 2 × I L1* - U L 2 L 3 × I L 3*
PosSeq
S = 3 × U PosSeq × I PosSeq *
L1L2
S = U L1L 2 × ( I L1* - I L 2* )
L2L3
S = U L 2 L 3 × ( I L 2* - I L 3* )
L3L1
S = U L 3 L1 × ( I L 3* - I L1* )
L1
S = 3 × U L1 × I L1*
L2
S = 3 × U L 2 × I L 2*
L3
S = 3 × U L 3 × I L 3*
The active and reactive power is available from the function and can be used for
monitoring and fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is

calculated. If this angle is 0° the active power component P is calculated. If this
angle is 90° the reactive power component Q is calculated.
The calculated power component is compared to the power pick up setting

Power1(2). A start signal START1(2) is activated if the calculated power
component is larger than the pick up value. After a set time delay TripDelay1(2) a
trip TRIP1(2) signal is activated if the start signal is still active. At activation of
any of the two stages a common signal START will be activated. At trip from any
of the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The

absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) – drop-
power1(2)). For generator reverse power protection the power setting is very low,
normally down to 0.02 p.u. of rated generator power. The hysteresis should
therefore be set to a smaller value. The drop-power value of stage1 can be
364
Current protection
calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) –

Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-
power1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 ·
Power1(2)) is corrected to the minimal value.
If the measured power drops under the drop-power1(2) value the function will reset
after a set time DropDelay1(2). The reset means that the start signal will drop out
ant that the timer of the stage will reset.
7.11.2.1 Low pass filtering

possible to introduce the recursive, low pass filtering of the measured values for S
(P, Q). This will make slower measurement response to the step changes in the
measured quantity. Filtering is performed in accordance with the following
recursive formula:
S = k × SOld + (1 - k ) × SCalculated
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalculated is the new calculated value in the present execution cycle
immediately given out without any filtering (that is, without any additional delay).
When k is set to value bigger than 0, the filtering is enabled. A typical value for k =
0.14.
7.11.2.2 Calibration of analog inputs
Measured currents and voltages used in the Power function can be calibrated to get
class 0.5 measuring accuracy. This is achieved by amplitude and angle
below 5% and above 100% is constant and linear in between, see example in figure
200.
365
Current protection
IEC05000652 V2 EN
Analog outputs from the function can be used for service values or in the
disturbance report. The active power is provided as MW value: P, or in percent of
base power: PPERCENT. The reactive power is provided as Mvar value: Q, or in
percent of base power: QPERCENT.

GOPPDOP
I3P* TRIP
U3P* TRIP1
BLOCK TRIP2
BLOCK1 START
BLOCK2 START1
START2
P
PPERCENT
Q
QPERCENT
IEC07000028 V2 EN
Figure 201: GOPPDOP function block
366
Current protection

Table 215: GOPPDOP Input signals
SIGNAL
SIGNAL
Table 216: GOPPDOP Output signals

START BOOLEAN Common start
P REAL Active Power in MW
PPERCENT REAL Active power in % of SBASE
Q REAL Reactive power in Mvar
QPERCENT REAL Reactive power in % of SBASE

Table 217: GOPPDOP Group settings (basic)
On
OpMode1 Off - - OverPower Operation mode 1
OverPower
OpMode2 Off - - OverPower Operation mode 2
OverPower
367
Current protection
Table 218: GOPPDOP Group settings (advanced)

measurement, P and Q
Hysteresis1 0.2 - 5.0 pu 0.1 0.5 Absolute hysteresis of stage 1 in % of
Sbase
Hysteresis2 0.2 - 5.0 pu 0.1 0.5 Absolute hysteresis of stage 2 in % of
Sbase
5% of Ir
30% of Ir
100% of Ir
5% of Ur
30% of Ur
100% of Ur
Table 219: GOPPDOP Non group settings (basic)

IBase 1 - 99999 A 1 3000 Current-Reference (primary current A)
UBase 0.05 - 2000.00 kV 0.05 400.00 Voltage-Reference (primary voltage kV)
Mode L1, L2, L3 - - Pos Seq Selection of measured current and
Arone voltage
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3
368
Current protection

Table 220: GOPPDOP technical data
Power level (0.0–500.0)% of Sbase ± 1.0% of Sr at S < Sr
± 1.0% of S at S > Sr
At low setting:
(0.5-2.0)% of Sbase < ± 50% of set value
(2.0-10)% of Sbase < ± 20% of set value
Characteristic angle (-180.0–180.0) degrees 2 degrees

Timers (0.00-6000.00) s ± 0.5% ± 10 ms
7.12 Broken conductor check BRCPTOC

Broken conductor check BRCPTOC - 46
7.12.1 Introduction
Conventional protection functions can not detect the broken conductor condition.
Broken conductor check (BRCPTOC) function, consisting of continuous current
unsymmetrical check on the line where the IED is connected will give alarm or trip
at detecting broken conductors.

Broken conductor check (BRCPTOC) detects a broken conductor condition by
detecting the asymmetry between currents in the three phases. The current-
measuring elements continuously measure the three-phase currents.
The current asymmetry signal output START is set on if:
• The difference in currents between the phase with the lowest current and the
phase with the highest current is greater than set percentage Iub> of the
highest phase current
• The highest phase current is greater than the minimum setting value IP>.
• The lowest phase current is below 50% of the minimum setting value IP>
The third condition is included to avoid problems in systems involving parallel

lines. If a conductor breaks in one phase on one line, the parallel line will
experience an increase in current in the same phase. This might result in the first
two conditions being satisfied. If the unsymmetrical detection lasts for a period
longer than the set time tOper the TRIP output is activated.
369
Current protection
The simplified logic diagram of the broken conductor check function is shown in
figure 202
BRCPTOC is disabled (blocked) if:
• The IED is in TEST status and the function has been blocked from the local
HMI test menu (BlockBRC=Yes).
• The input signal BLOCK is high.
The BLOCK input can be connected to a binary input of the IED in order to receive
a block command from external devices, or can be software connected to other
internal functions of the IED itself to receive a block command from internal
functions.
The output trip signal TRIP is a three-phase trip. It can be used to command a trip
to the circuit breaker or for alarm purpose only.
TEST
TEST-ACTIVE
&
Block BRCPTOC=Yes
START
Function Enable
BLOCK =1
t
TRIP
& t
Unsymmetrical
Current Detection
STI
IL1<50%IP>
IL2<50%IP> =1
IL3<50%IP>
IEC09000158 V1 EN
Figure 202: Simplified logic diagram for Broken conductor check BRCPTOC

BRCPTOC
I3P* TRIP
BLOCK START
BLKTR
IEC07000034 V2 EN
Figure 203: BRCPTOC function block
370
Current protection

Table 221: BRCPTOC Input signals
SIGNAL
BLKTR BOOLEAN 0 Blocks the operate output
Table 222: BRCPTOC Output signals

TRIP BOOLEAN Operate signal of the protection logic
START BOOLEAN Start signal of the protection logic

Table 223: BRCPTOC Group settings (basic)
On
IBase 0 - 99999 A 1 3000 IBase
Iub> 50 - 90 %IM 1 50 Unbalance current operation value in
percent of max current
IP> 5 - 100 %IB 1 20 Minimum phase current for operation of
Iub> in % of Ibase
tOper 0.000 - 60.000 s 0.001 5.000 Operate time delay
Table 224: BRCPTOC Group settings (advanced)

tReset 0.010 - 60.000 s 0.001 0.100 Time delay in reset

Table 225: BRCPTOC technical data
Minimum phase current for (5–100)% of IBase ± 0.1% of Ir
operation
Unbalance current operation (0–100)% of maximum current ± 0.1% of Ir
Timer (0.00-6000.00) s ± 0.5% ± 10 ms
371
372
Voltage protection
Section 8 Voltage protection
About this chapter

This chapter describes voltage related protection functions. The way the functions
work, their setting parameters, function blocks, input and output signals and
technical data are included for each function.
8.1 Two step undervoltage protection UV2PTUV

Two step undervoltage protection UV2PTUV 27
3U<
SYMBOL-R V1 EN
8.1.1 Introduction
Undervoltages can occur in the power system during faults or abnormal conditions.
Two step undervoltage protection (UV2PTUV) function can be used to open circuit
breakers to prepare for system restoration at power outages or as long-time delayed
back-up to primary protection.
UV2PTUV has two voltage steps, each with inverse or definite time delay.

Two-step undervoltage protection (UV2PTUV) is used to detect low power system
voltage. UV2PTUV has two voltage measuring steps with separate time delays. If
one, two or three phase voltages decrease below the set value, a corresponding
START signal is generated. UV2PTUV can be set to START/TRIP based on 1 out
of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being below the set point. If
the voltage remains below the set value for a time period corresponding to the
chosen time delay, the corresponding trip signal is issued. To avoid an unwanted
trip due to disconnection of the related high voltage equipment, a voltage
controlled blocking of the function is available, that is, if the voltage is lower than
the set blocking level the function is blocked and no START or TRIP signal is
generated. The time delay characteristic is individually chosen for each step and
can be either definite time delay or inverse time delay.
373
Voltage protection
UV2PTUV can be set to measure phase-to-earth fundamental value, phase-to-phase

fundamental value, phase-to-earth true RMS value or phase-to-phase true RMS
value. The choice of the measuring is done by the parameter ConnType. The
voltage related settings are made in percent of base voltage which is set in kV phase-
to-phase voltage. This means operation for phase-to-earth voltage under:
U < (%) × UBase( kV )

3
and operation for phase-to-phase voltage under:
U < (%) × UBase(kV)

8.1.2.1 Measurement principle
Depending on the set ConnType value, UV2PTUV measures phase-to-earth or phase-

to-phase voltages and compare against set values, U1< and U2<. The parameters
OpMode1 and OpMode2 influence the requirements to activate the START
outputs. Either 1 out of 3, 2 out of 3, or 3 out of 3 measured voltages have to be
lower than the corresponding set point to issue the corresponding START signal.
To avoid oscillations of the output START signal, a hysteresis has been included.
8.1.2.2 Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse
time delay (IDMT). For the inverse time delay three different modes are available:
• inverse curve A
• inverse curve B
• customer programmable inverse curve
The type A curve is described as:
k
t=
æ U < -U ö
ç ÷
è U< ø
The type B curve is described as:
374
Voltage protection
k × 480
t= 2.0
+ 0.055
æ U < -U ö
ç 32 × - 0.5 ÷
è U< ø
The customer programmable curve can be created as:
é ù
ê ú
k×A
t=ê ú+D
êæ U < -U ö ú
p
êç B × -C÷ ú
ëè U< ø û
When the denominator in the expression is equal to zero the time delay will be
infinity. There will be an undesired discontinuity. Therefore a tuning parameter
CrvSatn is set to compensate for this phenomenon. In the voltage interval U<
down to U< · (1.0 – CrvSatn/100) the used voltage will be: U< · (1.0 – CrvSatn/
100). If the programmable curve is used this parameter must be calculated so that:
CrvSatn
B× -C > 0
100
The lowest voltage is always used for the inverse time delay integration. The
details of the different inverse time characteristics are shown in section 22.3
"Inverse characteristics".
Trip signal issuing requires that the undervoltage condition continues for at least
the user set time delay. This time delay is set by the parameter t1 and t2 for definite
time mode (DT) and by some special voltage level dependent time curves for the
inverse time mode (IDMT). If the start condition, with respect to the measured
voltage ceases during the delay time, and is not fulfilled again within a user defined
reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2pickup for the inverse time) the corresponding start output is reset. Here it
should be noted that after leaving the hysteresis area, the start condition must be
fulfilled again and it is not sufficient for the signal to only return back to the
hysteresis area. Note that for the undervoltage function the IDMT reset time is
constant and does not depend on the voltage fluctuations during the drop-off
period. However, there are three ways to reset the timer, either the timer is reset
instantaneously, or the timer value is frozen during the reset time, or the timer
value is linearly decreased during the reset time. See figure 204 and figure 205.
375
Voltage protection
tReset1
Voltage tReset1
Measured
START Voltage
Hysteresis
TRIP
U1<
Time
START t1
TRIP
Time
Integrator Frozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset IEC05000010-3-en.vsd
IEC05000010 V3 EN
Figure 204: Voltage profile not causing a reset of the start signal for step 1, and inverse time delay
376
Voltage protection
tReset1
Voltage
tReset1
START
START
Hysteresis Measured Voltage
TRIP
U1<
Time
START t1
TRIP
Time Integrator
Frozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset IEC05000011-en-2.vsd
IEC05000011 V2 EN
Figure 205: Voltage profile causing a reset of the start signal for step 1, and inverse time delay
Definite timer delay
When definite time delay is selected the function will operate as shown in figure
206. Detailed information about individual stage reset/operation behavior is shown
in figure 207 and figure 208 receptively. Note that by setting tResetn = 0.0s
instantaneous reset of the definite time delayed stage is ensured.
377
Voltage protection
ST1
U tReset1 t1
a
b>a t t
TR1
U1<
b AND
OFF ON
Delay Delay
IEC09000785 V1 EN
Figure 206: Detailed logic diagram for step 1, DT operation
Un<
START
TRIP
tResetn
tn
IEC10000039 V1 EN
Figure 207: Example for Definite Time Delay stage rest
378
Voltage protection
Un<
START
TRIP
tResetn
tn
IEC10000040 V1 EN
Figure 208: Example for Definite Time Delay stage operation
8.1.2.3 Blocking
It is possible to block Two step undervoltage protection UV2PTUV partially or

completely, by binary input signals or by parameter settings, where:
BLOCK: blocks all outputs

BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
If the measured voltage level decreases below the setting of IntBlkStVal1, either the
trip output of step 1, or both the trip and the START outputs of step 1, are blocked.
The characteristic of the blocking is set by the IntBlkSel1 parameter. This internal
blocking can also be set to Off resulting in no voltage based blocking.
Corresponding settings and functionality are valid also for step 2.
In case of disconnection of the high voltage component the measured voltage will
get very low. The event will START both the under voltage function and the
blocking function, as seen in figure 209. The delay of the blocking function must
be set less than the time delay of under voltage function.
379
Voltage protection
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
IEC05000466 V1 EN
Figure 209: Blocking function
8.1.2.4 Design
The voltage measuring elements continuously measure the three phase-to-neutral

voltages or the three phase-to-phase voltages. Recursive fourier filters, true RMS
filters or input voltage signals are used. The voltages are individually compared to
the set value, and the lowest voltage is used for the inverse time characteristic
integration. A special logic is included to achieve the 1 out of 3, 2 out of 3 and 3
out of 3 criteria to fulfill the START condition. The design of Two step
undervoltage protection UV2PTUV is schematically shown in figure 210.
380
Voltage protection
UL1 Comparator ST1L1

UL1 < U1< Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 < U1< 1 out of 3
2 out of 3 ST1L3
Phase 3 Start
UL3 Comparator 3 out of 3
&
UL3 < U1< Trip ST1
OR
Output
START Logic TR1L1
Step 1
Time integrator TR1L2
MinVoltSelect t1 TRIP
or tReset1
ResetTypeCrv1 TR1L3
TR1
OR
Comparator ST2L1
UL1 < U2< Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 < U2< 1 out of 3
2 outof 3 ST2L3
Phase 3 Start
Comparator 3 out of 3
&
UL3 < U2< Trip ST2
Output OR
START Logic TR2L1
Step 2
MinVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3
TR2
OR
OR START
TRIP
OR
en05000012.vsd
IEC05000834 V1 EN
Figure 210: Schematic design of Two step undervoltage protection UV2PTUV
381
Voltage protection

UV2PTUV
U3P* TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
IEC06000276 V2 EN
Figure 211: UV2PTUV function block

Table 226: UV2PTUV Input signals
U3P GROUP - Three phase voltages
SIGNAL
BLKTR1 BOOLEAN 0 Block of operate signal, step 1
BLKST1 BOOLEAN 0 Block of step 1
Table 227: UV2PTUV Output signals

TRIP BOOLEAN Trip
382
Voltage protection


Table 228: UV2PTUV Group settings (basic)
On
OperationStep1 Off - - On Enable execution of step 1
On
Characterist1 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A step 1
Inverse curve B
Prog. inv. curve
OpMode1 1 out of 3 - - 1 out of 3 Number of phases required for op (1 of
2 out of 3 3, 2 of 3, 3 of 3) from step 1
3 out of 3
U1< 1 - 100 %UB 1 70 Voltage setting/start val (DT & IDMT) in
% of UBase, step 1
for step 1
for step 1
IntBlkSel1 Off - - Off Internal (low level) blocking mode, step 1
Block of trip
Block all
IntBlkStVal1 1 - 100 %UB 1 20 Voltage setting for internal blocking in %
of UBase, step 1
tBlkUV1 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level)
blocking for step 1
HystAbs1 0.0 - 100.0 %UB 0.1 0.5 Absolute hysteresis in % of UBase, step 1
On
Inverse curve B
Prog. inv. curve
383
Voltage protection

3 out of 3
U2< 1 - 100 %UB 1 50 Voltage setting/start val (DT & IDMT) in
% of UBase, step 2
for step 2
for step 2
IntBlkSel2 Off - - Off Internal (low level) blocking mode, step 2
Block of trip
Block all
IntBlkStVal2 1 - 100 %UB 1 20 Voltage setting for internal blocking in %
of UBase, step 2
tBlkUV2 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level)
blocking for step 2
Table 229: UV2PTUV Group settings (advanced)

Time curve step 1
Frozen timer
Linearly decreased
tIReset1 0.000 - 60.000 s 0.001 0.025 Time delay in IDMT reset (s), step 1
ACrv1 0.005 - 200.000 - 0.001 1.000 Parameter A for customer programmable
curve for step 1
BCrv1 0.50 - 100.00 - 0.01 1.00 Parameter B for customer programmable
curve for step 1
CCrv1 0.0 - 1.0 - 0.1 0.0 Parameter C for customer
DCrv1 0.000 - 60.000 - 0.001 0.000 Parameter D for customer
PCrv1 0.000 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
CrvSat1 0 - 100 % 1 0 Tuning param for prog. under voltage
IDMT curve, step 1
Time curve step 2
Frozen timer
Linearly decreased
curve for step 2
384
Voltage protection

curve for step 2
curve for step 2
CrvSat2 0 - 100 % 1 0 Tuning param for prog. under voltage
IDMT curve, step 2
Table 230: UV2PTUV Non group settings (basic)

ConnType PhN DFT - - PhN DFT Group selector for connection type
PhPh RMS
PhN RMS
PhPh DFT

Table 231: UV2PTUV technical data
Operate voltage, low (1–100)% of UBase ± 1.0% of Ur
and high step
Absolute hysteresis (0–100)% of UBase ± 1.0% of Ur
Internal blocking (1–100)% of UBase ± 1.0% of Ur

level, low and high
step
Inverse time - See table 648
characteristics for
low and high step,
see table 648
Definite time delays (0.000-60.000) s ± 0.5% ±10 ms
Minimum operate (0.000–60.000) s ± 0.5% ± 10 ms
time, inverse
characteristics
Operate time, start 25 ms typically at 2 to 0.5 x Uset -
function
Reset time, start 25 ms typically at 0 to 2 x Uset -
function
Critical impulse time 10 ms typically at 2 to 0 x Uset -
385
Voltage protection
8.2 Two step overvoltage protection OV2PTOV

Two step overvoltage protection OV2PTOV 59
3U>
SYMBOL-C V1 EN
8.2.1 Introduction
Overvoltages may occur in the power system during abnormal conditions, such as,
sudden power loss, tap changer regulating failures, open line ends on long lines.
Two step overvoltage protection OV2PTOV can be used as open line end detector,
normally then combined with directional reactive over-power function or as system
voltage supervision, normally then giving alarm only or switching in reactors or
switch out capacitor banks to control the voltage.
OV2PTOV has two voltage steps, each of them with inverse or definite time delayed.
OV2PTOV has an extremely high reset ratio to allow setting close to system
service voltage.

Two step overvoltage protection OV2PTOV is used to detect high power system
voltage. OV2PTOV has two steps with separate time delays. If one-, two- or three-
phase voltages increase above the set value, a corresponding START signal is
issued. OV2PTOV can be set to START/TRIP, based on 1 out of 3, 2 out of 3 or 3
out of 3 of the measured voltages, being above the set point. If the voltage remains
above the set value for a time period corresponding to the chosen time delay, the
corresponding trip signal is issued.
The time delay characteristic is individually chosen for the two steps and can be
either, definite time delay or inverse time delay.
The voltage related settings are made in percent of the global set base voltage,
which is set in kV, phase-to-phase.
OV2PTOV can be set to measure phase-to-earth fundamental value, phase-to-phase

fundamental value, phase-to-earth RMS value or phase-to-phase RMS value. The
choice of measuring is done by the parameter ConnType.
The setting of the analog inputs are given as primary phase-to-earth or phase-to-
phase voltage. OV2PTOV will operate if the voltage gets higher than the set
386
Voltage protection
percentage of the set base voltage UBase. This means operation for phase-to-earth
voltage over:
U > (%) × UBase( kV )

3
and operation for phase for phase voltage over:
U > (%) × UBase(kV)

All the three voltages are measured continuously, and compared with the set
values, U1> and U2>. The parameters OpMode1 and OpMode2 influence the
requirements to activate the START outputs. Either 1 out of 3, 2 out of 3 or 3 out of
3 measured voltages have to be higher than the corresponding set point to issue the
corresponding START signal.
8.2.2.2 Time delay
time delay (IDMT). For the inverse time delay four different modes are available:
• inverse curve A
• inverse curve B
• inverse curve C
k
t=
æ U -U > ö
ç ÷
è U> ø
IEC09000051 V1 EN (Equation 103)
k × 480
t= 2.0
- 0.035
æ 32 × U - U > - 0.5 ö
ç ÷
è U > ø
IECEQUATION2287 V1 EN (Equation 104)
387
Voltage protection
The type C curve is described as:
k × 480
t= 3.0
+ 0.035
æ 32 × U - U > - 0.5 ö
ç ÷
è U > ø
k×A
t= p
+D
æ U -U > ö
çB× -C÷
è U> ø
infinity. There will be an undesired discontinuity. Therefore, a tuning parameter
CrvSatn is set to compensate for this phenomenon. In the voltage interval U< down
to U< · (1.0 – CrvSatn/100) the used voltage will be: U< · (1.0 – CrvSatn/100). If
the programmable curve is used this parameter must be calculated so that:
CrvSatn
B× -C > 0
100
The highest phase (or phase-to-phase) voltage is always used for the inverse time
delay integration, see figure 212. The details of the different inverse time
characteristics are shown in section "Inverse characteristics"
388
Voltage protection
Voltage
IDMT Voltage
UL1
UL2
UL3
Time
en05000016.vsd
IEC05000016 V1 EN
Figure 212: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the overvoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite
time mode (DT) and by selected voltage level dependent time curves for the
inverse time mode (IDMT). If the START condition, with respect to the measured
voltage ceases during the delay time, and is not fulfilled again within a user defined
reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for
the inverse time) the corresponding START output is reset, after that the defined
reset time has elapsed. Here it should be noted that after leaving the hysteresis area,
the START condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area. The hysteresis value for each step is settable
(HystAbs2) to allow an high and accurate reset of the function. It should be noted
that for Two step overvoltage protection OV2PTOV the IDMT reset time is
value is linearly decreased during the reset time..
389
Voltage protection
tReset
1
tReset1
Voltage
START
TRIP
U1>
Hysteresis
Measured
Voltage
Time
START t1
TRIP
Time
Integrator Linear Decrease
Frozen Timer
t1
Instantaneous Time
IEC09000055 V1 EN
Figure 213: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay
390
Voltage protection
tReset1
Voltage tReset1
START TRIP
START
Hysteresis
U1>
Measured Voltage
Time
START t1
TRIP
Time Integrator
Frozen Timer
t1
Time
Instantaneous IEC05000020-en-2.vsd
Linear Decrease
Reset
IEC05000020 V2 EN
Figure 214: Voltage profile causing a reset of the START signal for step 1, and inverse time delay
Definite time delay
instantaneous reset of the definite time delayed stage is ensured
391
Voltage protection
ST1
U tReset1 t1
a
b<a t t
TR1
U1>
b AND
OFF ON
Delay Delay
IEC10000100 V1 EN
Un>
START
TRIP
tResetn
tn
IEC10000037 V1 EN
392
Voltage protection
Un>
START
TRIP
tResetn
tn
IEC10000038 V1 EN
8.2.2.3 Blocking
It is possible to block Two step overvoltage protection OV2PTOV partially or

completely, by binary input signals where:

8.2.2.4 Design
The voltage measuring elements continuously measure the three phase-to-earth

voltages or the three phase-to-phase voltages. Recursive Fourier filters filter the
input voltage signals. The phase voltages are individually compared to the set
value, and the highest voltage is used for the inverse time characteristic integration.
A special logic is included to achieve the 1 out of 3, 2 out of 3 or 3 out of 3 criteria
to fulfill the START condition. The design of Two step overvoltage protection
(OV2PTOV) is schematically described in figure 218.
393
Voltage protection
UL1 Comparator ST1L1

UL1 > U1> Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 > U1> 1 out of 3
2 outof 3 ST1L3
3 out of 3 Phase 3 Start
UL3 Comparator &
UL3 > U1> Trip ST1
OR
Output
START Logic TR1L1
Step 1
MaxVoltSelect t1 TRIP
or tReset1
ResetTypeCrv1 TR1L3
OR TR1
Comparator ST2L1
UL1 > U2> Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 > U2> 1 out of 3
2 outof 3 ST2L3
Phase 3 Start
3 out of 3
Comparator &
UL3 > U2> Trip ST2
OR
Output
START Logic TR2L1
Step 2
MaxVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3
TR2
OR
START
OR
TRIP
OR
en05000013.vsd
IEC05000013-WMF V1 EN
Figure 218: Schematic design of Two step overvoltage protection OV2PTOV
394
Voltage protection

OV2PTOV
U3P* TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
IEC06000277 V2 EN
Figure 219: OV2PTOV function block

Table 232: OV2PTOV Input signals
U3P GROUP - Group signal for three phase voltage input
SIGNAL
Table 233: OV2PTOV Output signals

TRIP BOOLEAN Trip
395
Voltage protection


Table 234: OV2PTOV Group settings (basic)
On
On
Inverse curve B
Inverse curve C
Prog. inv. curve
3 out of 3
U1> 1 - 200 %UB 1 120 Voltage setting/start val (DT & IDMT) in
% of UBase, step 1
for step 1
for step 1
On
Inverse curve B
Inverse curve C
Prog. inv. curve
3 out of 3
U2> 1 - 200 %UB 1 150 Voltage setting/start val (DT & IDMT) in
% of UBase, step 2
396
Voltage protection

for step 2
for step 2
Table 235: OV2PTOV Group settings (advanced)

Time curve step 1
Frozen timer
Linearly decreased
curve for step 1
curve for step 1
curve for step 1
CrvSat1 0 - 100 % 1 0 Tuning param for prog. over voltage
IDMT curve, step 1
Time curve step 2
Frozen timer
Linearly decreased
curve for step 2
curve for step 2
curve for step 2
IDMT curve, step 2
397
Voltage protection
Table 236: OV2PTOV Non group settings (basic)

ConnType PhN DFT - - PhN DFT TBD
PhPh DFT
PhN RMS
PhPh RMS

Table 237: OV2PTOV technical data
Operate voltage, low (1-200)% of UBase ± 1.0% of Ur at U < Ur
and high step ± 1.0% of U at U > Ur
Absolute hysteresis (0–100)% of UBase ± 1.0% of Ur at U < Ur

± 1.0% of U at U > Ur

characteristics for
low and high step,
see table 647
Definite time delays (0.000-60.000) s ± 0.5% ± 10 ms
Minimum operate (0.000-60.000) s ± 0.5% ± 10 ms
time, Inverse
characteristics
Operate time, start 25 ms typically at 0 to 2 x Uset -
function
function
8.3 Two step residual overvoltage protection

ROV2PTOV

Two step residual overvoltage ROV2PTOV 59N
protection
3U0
TRV V1 EN
8.3.1 Introduction
Residual voltages may occur in the power system during earth faults.
398
Voltage protection
Two step residual overvoltage protection ROV2PTOV calculates the residual

voltage from the three-phase voltage input transformers or from a single-phase
voltage input transformer fed from an open delta or neutral point voltage transformer.
ROV2PTOV has two voltage steps, each with inverse or definite time delayed.

Two step residual overvoltage protection ROV2PTOV is used to detect high single-
phase voltage, such as high residual voltage, also called 3U0. The residual voltage
can be measured directly from a voltage transformer in the neutral of a power
transformer or from a three-phase voltage transformer, where the secondary
windings are connected in an open delta. Another possibility is to measure the three-
phase voltages and internally in the IED calculate the corresponding residual
voltage and connect this calculated residual voltage to ROV2PTOV. ROV2PTOV
has two steps with separate time delays. If the single-phase (residual) voltage
remains above the set value for a time period corresponding to the chosen time
delay, the corresponding TRIP signal is issued.
The time delay characteristic is individually chosen for the two steps and can be
either, definite time delay or inverse time delay.
The voltage related settings are made in percent of the base voltage, which is set in
kV, phase-phase.
The residual voltage is measured continuously, and compared with the set values,
U1> and U2>.
8.3.2.2 Time delay
time delay (IDMT). For the inverse time delay four different modes are available:
• inverse curve A
• inverse curve B
• inverse curve C
k
t=
æ U -U > ö
ç ÷
è U> ø
IEC09000051 V1 EN (Equation 108)
399
Voltage protection
k × 480
t= 2.0
- 0.035
æ 32 × U - U > - 0.5 ö
ç ÷
è U > ø
The type C curve is described as:
k × 480
t= 3.0
+ 0.035
æ 32 × U - U > - 0.5 ö
ç ÷
è U > ø
k×A
t= p
+D
æ U -U > ö
çB× -C÷
è U> ø
infinity. There will be an undesired discontinuity. Therefore a tuning parameter
CrvSatn is set to compensate for this phenomenon. In the voltage interval U> up to
U> · (1.0 + CrvSatn/100) the used voltage will be: U> · (1.0 + CrvSatn/100). If the
programmable curve is used this parameter must be calculated so that:
CrvSatn
B× -C > 0
100
The details of the different inverse time characteristics are shown in section
"Inverse characteristics".
TRIP signal issuing requires that the residual overvoltage condition continues for at
least the user set time delay. This time delay is set by the parameter t1 and t2 for
definite time mode (DT) and by some special voltage level dependent time curves
for the inverse time mode (IDMT).
If the START condition, with respect to the measured voltage ceases during the
delay time, and is not fulfilled again within a user defined reset time (tReset1 and
tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the
corresponding START output is reset, after that the defined reset time has elapsed.
Here it should be noted that after leaving the hysteresis area, the START condition
must be fulfilled again and it is not sufficient for the signal to only return back to
400
Voltage protection
the hysteresis area. Also notice that for the overvoltage function IDMT reset time is
value is linearly decreased during the reset time. See figure 213 and figure 214.
tReset
1
tReset1
Voltage
START
TRIP
U1>
Hysteresis
Measured
Voltage
Time
START t1
TRIP
Time
Integrator Linear Decrease
Frozen Timer
t1
Instantaneous Time
IEC09000055 V1 EN
Figure 220: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay
401
Voltage protection
tReset1
Voltage tReset1
START TRIP
START
Hysteresis
U1>
Measured Voltage
Time
START t1
TRIP
Time Integrator
Frozen Timer
t1
Time
Instantaneous IEC05000020-en-2.vsd
Linear Decrease
Reset
IEC05000020 V2 EN
Figure 221: Voltage profile causing a reset of the START signal for step 1, and inverse time delay
Definite timer delay
instantaneous reset of the definite time delayed stage is ensured
402
Voltage protection
ST1
U tReset1 t1
a
b<a t t
TR1
U1>
b AND
OFF ON
Delay Delay
IEC10000100 V1 EN
Un<
START
TRIP
tResetn
tn
IEC10000039 V1 EN
403
Voltage protection
Un<
START
TRIP
tResetn
tn
IEC10000040 V1 EN
8.3.2.3 Blocking
It is possible to block Two step residual overvoltage protection ROV2PTOV

partially or completely, by binary input signals where:

BLKST2: blocks all START and trip inputs related to step 2
8.3.2.4 Design
The voltage measuring elements continuously measure the residual voltage.

Recursive Fourier filters filter the input voltage signal. The single input voltage is
compared to the set value, and is also used for the inverse time characteristic
integration. The design of Two step residual overvoltage protection (ROV2PTOV)
is schematically described in figure 225.
404
Voltage protection
UN Comparator Phase 1 ST1

UN > U1>
TR1
START Start
&
Trip
Time integrator Output
t1 Logic
TRIP
tReset1
ResetTypeCrv1 Step 1
ST2
Comparator Phase 1
UN > U2> TR2
Start
START &
Trip START
Output OR
Time integrator
Logic
t2 TRIP
tReset2
Step 2
ResetTypeCrv2 TRIP
OR
en05000748.vsd
IEC05000748 V1 EN
Figure 225: Schematic design of Two step residual overvoltage protection

ROV2PTOV

ROV2PTOV
U3P* TRIP
BLOCK TR1
BLKTR1 TR2
BLKST1 START
BLKTR2 ST1
BLKST2 ST2
IEC06000278 V2 EN
Figure 226: ROV2PTOV function block
405
Voltage protection

Table 238: ROV2PTOV Input signals
U3P GROUP - Three phase voltages
SIGNAL
Table 239: ROV2PTOV Output signals

TRIP BOOLEAN Trip

Table 240: ROV2PTOV Group settings (basic)
On
On
Inverse curve B
Inverse curve C
Prog. inv. curve
U1> 1 - 200 %UB 1 30 Voltage setting/start val (DT & IDMT),
step 1 in % of UBase
for step 1
for step 1
406
Voltage protection

On
Inverse curve B
Inverse curve C
Prog. inv. curve
U2> 1 - 100 %UB 1 45 Voltage setting/start val (DT & IDMT),
step 2 in % of UBase
for step 2
for step 2
Table 241: ROV2PTOV Group settings (advanced)

Time curve step 1
Frozen timer
Linearly decreased
curve for step 1
curve for step 1
curve for step 1
IDMT curve, step 1
tReset2 0.000 - 60.000 s 0.001 0.025 Time delay in DT reset (s), step 2
Frozen timer
Linearly decreased
curve for step 2
curve for step 2
407
Voltage protection

curve for step 2
IDMT curve, step 2

Table 242: ROV2PTOV technical data
Operate voltage, low (1-200)% of UBase ± 1.0% of Ur at U < Ur
and high step ± 1.0% of U at U > Ur
Absolute hysteresis (0–100)% of UBase ± 1.0% of Ur at U < Ur

± 1.0% of U at U > Ur

characteristics for
low and high step,
see table 649
Definite time setting (0.000–60.000) s ± 0.5% ± 10 ms
Minimum operate (0.000-60.000) s ± 0.5% ± 10 ms
time
function
function
8.4 Overexcitation protection OEXPVPH

Overexcitation protection OEXPVPH 24
U/f >
SYMBOL-Q V1 EN
8.4.1 Introduction
When the laminated core of a power transformer or generator is subjected to a
magnetic flux density beyond its design limits, stray flux will flow into non-
laminated components not designed to carry flux and cause eddy currents to flow.
408
Voltage protection
The eddy currents can cause excessive heating and severe damage to insulation and
adjacent parts in a relatively short time. Overexcitation protection OEXPVPH has
settable inverse operating curve and independent alarm stage.

The importance of Overexcitation protection OEXPVPH is growing as the power
transformers as well as other power system elements today operate most of the
time near their designated limits.
Modern design transformers are more sensitive to overexcitation than earlier types.
This is a result of the more efficient designs and designs which rely on the
improvement in the uniformity of the excitation level of modern systems. Thus, if
emergency that includes overexcitation does occur, transformers may be damaged
unless corrective action is promptly taken. Transformer manufacturers recommend
an overexcitation protection as a part of the transformer protection system.
Overexcitation results from excessive applied voltage, possibly in combination

with below-normal frequency. Such condition may occur when a transformer unit
is on load, but are more likely to arise when it is on open circuit, or at a loss of load
occurrence. Transformers directly connected to generators are in particular danger
to experience overexcitation condition. It follows from the fundamental
transformer equation, see equation 113, that peak flux density Bmax is directly
proportional to induced voltage E, and inversely proportional to frequency f, and
turns n.
E = 4.44 × f × n × Bmax× A
The relative excitation M is therefore according to equation 114.
E f
M ( p.u.) =
( Ur ) ( fr )
Disproportional variations in quantities E and f may give rise to core overfluxing.

If the core flux density Bmax increases to a point above saturation level (typically
1.9 Tesla), the flux will no longer be contained within the core only but will extend
into other (non-laminated) parts of the power transformer and give rise to eddy
current circulations.
Overexcitation will result in:
• overheating of the non-laminated metal parts

• a large increase in magnetizing currents
• an increase in core and winding temperature
• an increase in transformer vibration and noise
409
Voltage protection
Protection against overexcitation is based on calculation of the relative volt per

hertz (V/Hz) ratio. The action of the protection is usually to initiate a reduction of
excitation and, if this should fail, or is not possible, to trip the transformer after a
delay which can be from seconds to minutes, typically 5 - 10 seconds.
Overexcitation protection may be of particular concern on directly connected

generator unit transformers. Directly connected generator-transformers are
subjected to a wide range of frequencies during the acceleration and deceleration of
the turbine. In such cases, the overexcitation protection may trip the field breaker
during a start-up of a machine, by means of the overexcitation ALARM signal. If
this is not possible, the power transformer can be disconnected from the source,
after a delay, by the TRIP signal.
The IEC 60076 - 1 standard requires that transformers shall be capable of operating
continuously at 10% above rated voltage at no load, and rated frequency. At no
load, the ratio of the actual generator terminal voltage to the actual frequency
should not exceed 1.1 times the ratio of transformer rated voltage to the rated
frequency on a sustained basis, see equation 115.
---- £ 1.1 × Ur
E ------
f fr
or equivalently, with 1.1 · Ur = V/Hz> according to equation 116.
E V Hz>
£
f fr
where:
V/Hz> is the maximum continuously allowed voltage at no load, and rated frequency.
V/Hz> is a setting parameter. The setting range is 100% to 180%. If the user does
not know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the
default value V/Hz> = 110% shall be used.
In OEXPVPH, the relative excitation M is expressed according to equation 117.
E f
M ( p.u. ) =
Ur fr
It is clear from the above formula that, for an unloaded power transformer, M = 1
for any E and f, where the ratio E/f is equal to Ur/fr. A power transformer is not
overexcited as long as the relative excitation is M ≤ V/Hz>, V/Hz> expressed in %
of Ur/fr.
410
Voltage protection
The overexcitation protection algorithm is fed with an input voltage U which is in

general not the induced voltage E from the fundamental transformer equation. For
no load condition, these two voltages are the same, but for a loaded power
transformer the internally induced voltage E may be lower or higher than the
voltage U which is measured and fed to OEXPVPH , depending on the direction of
the power flow through the power transformer, the power transformer side where
OEXPVPH is applied, and the power transformer leakage reactance of the winding.
It is important to specify in the application configuration on which side of the
power transformer OEXPVPH is placed.
As an example, at a transformer with a 15% short circuit impedance Xsc, the full
load, 0.8 power factor, 105% voltage on the load side, the actual flux level in the
transformer core, will not be significantly different from that at the 110% voltage,
no load, rated frequency, provided that the short circuit impedance X can be
equally divided between the primary and the secondary winding: Xleak = Xleak1 =
Xleak2 = Xsc / 2 = 0.075 pu.
OEXPVPH calculates the internal induced voltage E if Xleak (meaning the leakage
reactance of the winding where OEXPVPH is connected) is known to the user. The
assumption taken for two-winding power transformers that Xleak = Xsc / 2 is
unfortunately most often not true. For a two-winding power transformer the
leakage reactances of the two windings depend on how the windings are located on
the core with respect to each other. In the case of three-winding power transformers
the situation is still more complex. If a user has the knowledge on the leakage
reactance, then it should applied. If a user has no idea about it, Xleak can be set to
Xc/2. OEXPVPH protection will then take the given measured voltage U, as the
induced voltage E.
It is assumed that overexcitation is a symmetrical phenomenon, caused by events

such as loss-of-load, and so on. It will be observed that a high phase-to-earth
voltage does not mean overexcitation. For example, in an unearthed power system,
a single phase-to-earth fault means high voltages of the “healthy” two phases-to-
earth, but no overexcitation on any winding. The phase-to-phase voltages will
remain essentially unchanged. The important voltage is the voltage between the
two ends of each winding.
8.4.2.1 Measured voltage
If one phase-to-phase voltage is available from the side where overexcitation

protection is applied, then Overexcitation protection OEXPVPH shall be set to
measure this voltage, MeasuredU. The particular voltage which is used determines
the two currents that must be used. This must be chosen with the setting MeasuredI.
It is extremely important that MeasuredU and MeasuredI are set to

same value.
If, for example, voltage UL1L2 is fed to OEXPVPH, then currents IL1, and IL2
must be applied. From these two input currents, current IL1L2 = IL1 - IL2 is
411
Voltage protection
calculated internally by the OEXPVPH algorithm. The phase-to-phase voltage

must be higher than 70% of the rated value, otherwise the protection algorithm
exits without calculating the excitation. ERROR output is set to 1, and the
displayed value of relative excitation V/Hz shows 0.000.
If three phase-to-earth voltages are available from the side where overexcitation is
connected, then OEXPVPH shall be set to measure positive sequence voltage and
current. In this case the positive sequence voltage and the positive sequence current
are used by OEXPVPH. A check is made if the positive sequence voltage is higher
than 70% of rated phase-to-earth voltage, when below this value, OEXPVPH exits
immediately, and no excitation is calculated. ERROR output is set to 1, and the
displayed value of relative excitation V/Hz shows 0.000.
The frequency value is received from the pre-processing block. The function is in
operation for frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and
60 Hz respectively.
• OEXPVPH can be connected to any power transformer side, independent from

the power flow.
• The side with a possible load tap changer must not be used.
8.4.2.2 Operate time of the overexcitation protection
The operate time of the overexcitation protection OEXPVPH is a function of the

relative overexcitation.
Basically there are two different delay laws available to choose between:
• the so called IEEE law, and

• a tailor-made law.
The so called IEEE law approximates a square law and has been chosen based on
analysis of the various transformers’ overexcitation capability characteristics. They
can match well a transformer core capability.
The square law is according to equation 118.
0.18 × k
top = 2
æ M ö
ç V Hz> - 1 ÷
è ø
where:
M the relative excitation
V/Hz> is maximum continuously allowed voltage at no load, and rated frequency, in pu and
k is time multiplier for inverse time functions, see figure 228.
Parameter k (“time multiplier setting”) selects one delay curve from the family of curves.
412
Voltage protection
An analog overexcitation relay would have to evaluate the following integral

expression, which means to look for the instant of time t = top according to
equation 119.
top
ò (M (t) - V Hz > ) dt ³ 0.18 × k

2
A digital, numerical relay will instead look for the lowest j (that is, j = n) where it
becomes true that:
n
2
Dt × å ( M(j) – V/Hz> ) ³ 0.18 × k
j=k
where:
Dt is the time interval between two successive executions of OEXPVPH and
M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which is
given as Ur/fr.
As long as M > V/Hz> (that is, overexcitation condition), the above sum can only
be larger with time, and if the overexcitation persists, the protected transformer will
be tripped at j = n.
Inverse delays as per figure 228, can be modified (limited) by two special definite
delay settings, namely tMax and tMin, see figure 227.
delay in s
tMax
under - inverse delay law

excitation
overexcitation
tMin
0 Mmax - V/Hz> Overexcitation M-V/Hz>
M=V/Hz> Mmax Excitation M
V/Hz> Emax E (only if f = fr = const)
99001067.vsd
IEC99001067 V1 EN
Figure 227: Restrictions imposed on inverse delays by tMax and tMin
413
Voltage protection
A definite maximum time, tMax, can be used to limit the operate time at low
degrees of overexcitation. Inverse delays longer than tMax will not be allowed. In
case the inverse delay is longer than tMax, OEXPVPH trips after tMax seconds.
A definite minimum time, tMin, can be used to limit the operate time at high
degrees of overexcitation. In case the inverse delay is shorter than tMin,
OEXPVPH function trips after tMin seconds. Also, the inverse delay law is no
more valid beyond excitation Mmax. Beyond Mmax (for excitation M > V/Hz>),
the delay will always be tMin, irrespective of the overexcitation level.
Time (s) IEEE OVEREXCITATION CURVES
1000
100
k = 60
k = 20
k = 10
10 k=9
k=8
k=7
k=6
k=5
k=4
k=3
k=2
k=1
1
1 2 3 4 5 10 20 30 40
OVEREXCITATION IN % (M-Emaxcont)*100)
en01000373.vsd
IEC01000373 V1 EN
Figure 228: Delays inversely proportional to the square of the overexcitation
The critical value of excitation M is determined indirectly via OEXPVPH setting V/

Hz>>. V/Hz>> can be thought of as a no-load-rated-frequency voltage, where the
inverse law should be replaced by a short definite delay, tMin. If, for example, V/
Hz>> = 140 %, then M is according to equation 121.
414
Voltage protection
(V Hz>> ) / f
M= = 1.40
Ur/fr
The Tailor-Made law allows a user to design an arbitrary delay characteristic. In

this case the interval between M = V/Hz>, and M = Mmax is automatically divided
into five equal subintervals, with six delays. (settings t1, t2, t3, t4, t5 and t6) as
shown in figure 229. These times should be set so that t1 => t2 => t3 => t4 => t5
=> t6.
delay in s
tMax
under- tMin
excitation Overexcitation M-Emaxcont
0 Mmax - Emaxcont Excitation M
Emaxcont Mmax
99001068.vsd
IEC99001068 V1 EN
Figure 229: An example of a Tailor-Made delay characteristic
Delays between two consecutive points, for example t3 and t4, are obtained by
linear interpolation.
Should it happen that tMax be lower than, for example, delays t1, and t2, the actual
delay would be tMax. Above Mmax, the delay can only be tMin.
8.4.2.3 Cooling
Overexcitation protection OEXPVPH is basically a thermal protection; therefore a

cooling process has been introduced. Exponential cooling process is applied.
Parameter Setting tool is an OEXPVPH setting, with a default time constant
tCooling of 20 minutes. This means that if the voltage and frequency return to their
previous normal values (no more overexcitation), the normal temperature is
assumed to be reached not before approximately 5 times tCooling minutes. If an
overexcitation condition would return before that, the time to trip will be shorter
than it would be otherwise.
8.4.2.4 Overexcitation protection function measurands
A monitored data value, TMTOTRIP, is available on the local HMI and in

PCM600. This value is an estimation of the remaining time to trip (in seconds), if
the overexcitation remained on the level it had when the estimation was done. This
information can be useful with small or moderate overexcitations.
415
Voltage protection
If the overexcitation is so low that the valid delay is tMax, then the estimation of
the remaining time to trip is done against tMax.
The relative excitation M, shown on the local HMI and in PCM600 as a monitored
data value VPERHZ, is calculated from the expression:
E f
M ( p.u. ) =
Ur fr
If VPERHZ value is less than setting V/Hz> (in %), the power transformer is
underexcited. If VPERHZ is equal to V/Hz> (in %), the excitation is exactly equal
to the power transformer continuous capability. If VPERHZ is higher than V/Hz>,
the protected power transformer is overexcited. For example, if VPERHZ = 1.100,
while V/Hz> = 110 %, then the power transformer is exactly on its maximum
continuous excitation limit.
Monitored data value THERMSTA shows the thermal status of the protected
power transformer iron core. THERMSTA gives the thermal status in % of the trip
value which corresponds to 100%. THERMSTA should reach 100% at the same
time, as TMTOTRIP reaches 0 seconds. If the protected power transformer is then
for some reason not switched off, THERMSTA shall go over 100%.
If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or tMin,
then the Thermal status will generally not reach 100% at the same time, when
tTRIP reaches 0 seconds. For example, if, at low degrees of overexcitation, the
very long delay is limited by tMax, then the OEXPVPH TRIP output signal will be
set to 1 before the Thermal status reaches 100%.
8.4.2.5 Overexcitation alarm
A separate step, AlarmLevel, is provided for alarming purpose. It is normally set

2% lower than (V/Hz>) and has a definite time delay, tAlarm. This will give the
operator an early abnormal voltages warning.
416
Voltage protection
BLOCK
AlarmLevel
ALARM
t>tAlarm &
t
tAlarm
M>V/Hz>
t>tMin TRIP
t &
V/Hz> tMin
U3P Calculation
Ei k
M
of internal M=
I3P induced (Ei / f) M IEEE law
voltage Ei (Ur / fr)
³1
M t
Tailor-made law
M>V/Hz>> tMax
Xleak
V/Hz>>
M = relative V/Hz as service value

IEC05000162 V2 EN
Figure 230: A simplified logic diagram of the Overexcitation protection

OEXPVPH
Simplification of the diagram is in the way the IEEE and Tailor-made delays are
calculated. The cooling process is not shown. It is not shown that voltage and
frequency are separately checked against their respective limit values.

OEXPVPH
I3P* TRIP
U3P* START
BLOCK ALARM
RESET
IEC05000329 V3 EN
Figure 231: OEXPVPH function block

Table 243: OEXPVPH Input signals
SIGNAL
U3P GROUP - Voltage connection
SIGNAL
RESET BOOLEAN 0 Reset operation
417
Voltage protection
Table 244: OEXPVPH Output signals

TRIP BOOLEAN Trip from overexcitation function
START BOOLEAN Overexcitation above set operate level
(instantaneous)
ALARM BOOLEAN Overexcitation above set alarm level (delayed)

Table 245: OEXPVPH Group settings (basic)
On
IBase 1 - 99999 A 1 3000 Base current (rated phase current) in A
UBase 0.05 - 2000.00 kV 0.05 400.00 Base voltage (main voltage) in kV
V/Hz> 100.0 - 180.0 %UB/f 0.1 110.0 Operate level of V/Hz at no load and
rated freq in % of (Ubase/frated)
V/Hz>> 100.0 - 200.0 %UB/f 0.1 140.0 High level of V/Hz above which tMin is
used, in % of (Ubase/frated)
XLeak 0.000 - 200.000 ohm 0.001 0.000 Winding leakage reactance in primary
ohms
TrPulse 0.000 - 60.000 s 0.001 0.100 Length of the pulse for trip signal (in sec)
tMin 0.000 - 60.000 s 0.001 7.000 Minimum trip delay for V/Hz inverse
curve, in sec
tMax 0.00 - 9000.00 s 0.01 1800.00 Maximum trip delay for V/Hz inverse
curve, in sec
tCooling 0.10 - 9000.00 s 0.01 1200.00 Transformer magnetic core cooling time
constant, in sec
CurveType IEEE - - IEEE Inverse time curve selection, IEEE/Tailor
Tailor made made
kForIEEE 1 - 60 - 1 1 Time multiplier for IEEE inverse type
curve
AlarmLevel 50.0 - 120.0 % 0.1 100.0 Alarm operate level as % of operate level
tAlarm 0.00 - 9000.00 s 0.01 5.00 Alarm time delay, in sec
Table 246: OEXPVPH Group settings (advanced)

t1Tailor 0.00 - 9000.00 s 0.01 7200.00 Time delay t1 (longest) for tailor made
curve, in sec
t2Tailor 0.00 - 9000.00 s 0.01 3600.00 Time delay t2 for tailor made curve, in sec
t6Tailor 0.00 - 9000.00 s 0.01 225.00 Time delay t6 (shortest) for tailor made
curve, in sec
418
Voltage protection
Table 247: OEXPVPH Non group settings (basic)

MeasuredU PosSeq - - L1L2 Selection of measured voltage
L1L2
L2L3
L3L1
MeasuredI L1L2 - - L1L2 Selection of measured current
L2L3
L3L1
PosSeq

Table 248: OEXPVPH technical data
Operate value, start (100–180)% of (UBase/frated) ± 1.0% of U
Operate value, alarm (50–120)% of start level ± 1.0% of Ur at U ≤ Ur

± 1.0% of U at U > Ur
Operate value, high level (100–200)% of (UBase/frated) ± 1.0% of U
Curve type IEEE or customer defined Class 5 + 40 ms
(0.18 × k )
IEEE : t =
( M - 1) 2
where M = (E/f)/(Ur/fr)
Minimum time delay for inverse (0.000–60.000) s ± 0.5% ± 10 ms
function
Maximum time delay for inverse (0.00–9000.00) s ± 0.5% ± 10 ms
function
Alarm time delay (0.000–60.000) s ± 0.5% ± 10 ms
8.5 Voltage differential protection VDCPTOV

Voltage differential protection VDCPTOV - 60
8.5.1 Introduction
A voltage differential monitoring function is available. It compares the voltages
from two three phase sets of voltage transformers and has one sensitive alarm step
and one trip step. It can be used to supervise the voltage from two fuse groups or
two different voltage transformers fuses as a fuse/MCB supervision function.
419
Voltage protection

The Voltage differential protection function VDCPTOV (60) is based on
comparison of the amplitudes of the two voltages connected in each phase.
Possible differences between the ratios of the two Voltage/Capacitive voltage
transformers can be compensated for with a ratio correction factors RFLx. The
voltage difference is evaluated and if it exceeds the alarm level UDAlarm or trip
level UDATrip signals for alarm (ALARM output) or trip (TRIP output) is given
after definite time delay tAlarm respectively tTrip. The two three phase voltage
supplies are also supervised with undervoltage settings U1Low and U2Low. The
outputs for loss of voltage U1LOW resp U2LOW will be activated. The U1 voltage
is supervised for loss of individual phases whereas the U2 voltage is supervised for
loss of all three phases.
Loss of all U1or all U2 voltages will block the differential measurement. This
blocking can be switched off with setting BlkDiffAtULow = No.
VDCPTOV function can be blocked from an external condition with the binary
BLOCK input. It can for example, be activated from Fuse failure supervision
function SDDRFUF.
To allow easy commissioning the measured differential voltage is available as

service value. This allows simple setting of the ratio correction factor to achieve
full balance in normal service.
The principle logic diagram is shown in figure 232.
420
Voltage protection
UDTripL1>
AND
UDTripL1> O tReset tTrip

AND
R t t
AND TRIP
UDTripL1>
AND
AND START
UDAlarmL1>
AND
UDAlarmL1> O tAlarm
AND
R t AND ALARM
UDAlarmL1>
AND
U1<L1
tAlarm
U1<L2 AND t U1LOW
AND
AND
U1<L3
OR
BlkDiffAtULow
U2<L1
t1
U2<L2 AND t U2LOW
AND
U2<L3
BLOCK
en06000382-1.vsd
IEC06000382 V2 EN
Figure 232: Principle logic for Voltage differential function VDCPTOV

VDCPTOV
U3P1* TRIP
U3P2* START
BLOCK ALARM
U1LOW
U2LOW
UL1DIFF
UL2DIFF
UL3DIFF
IEC06000528 V2 EN
Figure 233: VDCPTOV function block
421
Voltage protection

Table 249: VDCPTOV Input signals
U3P1 GROUP - Bus voltage
SIGNAL
U3P2 GROUP - Capacitor voltage
SIGNAL
Table 250: VDCPTOV Output signals

TRIP BOOLEAN Voltage differential protection operated
START BOOLEAN Start of voltage differential protection
ALARM BOOLEAN Voltage differential protection alarm
U1LOW BOOLEAN Loss of U1 voltage
U2LOW BOOLEAN Loss of U2 voltage
UL1DIFF REAL Differential Voltage phase L1

Table 251: VDCPTOV Group settings (basic)
Operation Off - - Off Operation Off/On
On
BlkDiffAtULow No - - Yes Block operation at low voltage
Yes
UDTrip 0.0 - 100.0 %UB 0.1 5.0 Operate level, in % of UBase
tTrip 0.000 - 60.000 s 0.001 1.000 Time delay for voltage differential
operate, in milliseconds
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for voltage differential reset,
in seconds
U1Low 0.0 - 100.0 %UB 0.1 70.0 Input 1 undervoltage level, in % of UBase
U2Low 0.0 - 100.0 %UB 0.1 70.0 Input 2 undervoltage level, in % of UBase
tBlock 0.000 - 60.000 s 0.001 0.000 Reset time for undervoltage block
UDAlarm 0.0 - 100.0 %UB 0.1 2.0 Alarm level, in % of UBase
tAlarm 0.000 - 60.000 s 0.001 2.000 Time delay for voltage differential alarm,
in seconds
422
Voltage protection
Table 252: VDCPTOV Group settings (advanced)

RFL1 0.000 - 3.000 - 0.001 1.000 Ratio compensation factor phase L1
U2L1*RFL1=U1L1
U2L2*RFL2=U1L2
U2L3*RFL3=U1L3

Table 253: VDCPTOV technical data
Voltage difference for alarm and (0.0–100.0) % of UBase ± 0.5 % of Ur
trip
Under voltage level (0.0–100.0) % of UBase ± 0.5% of Ur
Timers (0.000–60.000)s ± 0.5% ± 10 ms
8.6 Loss of voltage check LOVPTUV

Loss of voltage check LOVPTUV - 27
8.6.1 Introduction
Loss of voltage check (LOVPTUV) is suitable for use in networks with an
automatic system restoration function. LOVPTUV issues a three-pole trip
command to the circuit breaker, if all three phase voltages fall below the set value
for a time longer than the set time and the circuit breaker remains closed.

The operation of Loss of voltage check LOVPTUV is based on line voltage
measurement. LOVPTUV is provided with a logic, which automatically recognises
if the line was restored for at least tRestore before starting the tTrip timer. All three
phases are required to be low before the output TRIP is activated. The START
output signal indicates start.
Additionally, LOVPTUV is automatically blocked if only one or two phase

voltages have been detected low for more than tBlock.
423
Voltage protection
LOVPTUV operates again only if the line has been restored to full voltage for at
least tRestore. Operation of the function is also inhibited by fuse failure and open
circuit breaker information signals, by their connection to dedicated inputs of the
function block.
Due to undervoltage conditions being continuous the trip pulse is limited to a

length set by setting tPulse.
The operation of LOVPTUV is supervised by the fuse-failure function (VTSU

input) and the information about the open position (CBOPEN) of the associated
circuit breaker.
The BLOCK input can be connected to a binary input of the IED in order to receive
a block command from external devices or can be software connected to other
internal functions of the IED itself in order to receive a block command from
internal functions. LOVPTUV is also blocked when the IED is in TEST status and
the function has been blocked from the HMI test menu. (Blocked=Yes).
424
Voltage protection
TEST
TEST-ACTIVE
&
Blocked = Yes
START
BLOCK >1
Function Enable tTrip tPulse TRIP
STUL1N & t
STUL2N &
only 1 or 2 phases are low for
Latched at least 10 s (not three)
STUL3N Enable
&
tBlock
>1 t
CBOPEN Reset Enable

>1
&
VTSU
tRestore
>1 Set Enable
t
>1
Line restored for
at least 3 s
IEC07000089 V2 EN
Figure 234: Simplified diagram of Loss of voltage check LOVPTUV

LOVPTUV
U3P* TRIP
BLOCK START
CBOPEN
VTSU
IEC07000039 V2 EN
Figure 235: LOVPTUV function block
425
Voltage protection

Table 254: LOVPTUV Input signals
SIGNAL
BLOCK BOOLEAN 0 Block the all outputs
CBOPEN BOOLEAN 0 Circuit breaker open
VTSU BOOLEAN 0 Block from voltage circuit supervision
Table 255: LOVPTUV Output signals

START BOOLEAN Start signal

Table 256: LOVPTUV Group settings (basic)
On
UPE 1 - 100 %UB 1 70 Operate voltagein% of base voltage
Ubase
tTrip 0.000 - 60.000 s 0.001 7.000 Operate time delay
Table 257: LOVPTUV Group settings (advanced)

tPulse 0.050 - 60.000 s 0.001 0.150 Duration of TRIP pulse
tBlock 0.000 - 60.000 s 0.001 5.000 Time delay to block when all 3ph
voltages are not low
tRestore 0.000 - 60.000 s 0.001 3.000 Time delay for enable the function after
restoration

Table 258: LOVPTUV technical data
Operate voltage (0–100)% of UBase ± 0.5% of Ur
Pulse timer (0.050–60.000) s ± 0.5% ± 10 ms

Timers (0.000–60.000) s ± 0.5% ± 10 ms
426
Frequency protection
Section 9 Frequency protection
About this chapter

This chapter describes the frequency protection functions. The way the functions
work, their setting parameters, function blocks, input and output signals and
technical data are included for each function.
9.1 Underfrequency protection SAPTUF

Underfrequency protection SAPTUF 81
f<
SYMBOL-P V1 EN
9.1.1 Introduction
Underfrequency occurs as a result of lack of generation in the network.
Underfrequency protection SAPTUF is used for load shedding systems, remedial

action schemes, gas turbine startup and so on.
SAPTUF is provided with an under voltage blocking.
The operation may be based on single-phase, phase-to-phase or positive-sequence

voltage measurement.

Underfrequency protection SAPTUF is used to detect low power system frequency.
SAPTUF can either have a definite time delay or a voltage magnitude dependent
time delay. If the voltage magnitude dependent time delay is applied, the time
delay will be longer if the voltage is higher, and the delay will be shorter if the
voltage is lower. If the frequency remains below the set value for a time period
corresponding to the chosen time delay, the corresponding trip signal is issued. To
avoid an unwanted trip due to uncertain frequency measurement at low voltage
magnitude, a voltage controlled blocking of the function is available, that is, if the
427
voltage is lower than the set blocking voltage IntBlockLevel the function is blocked
and no START or TRIP signal is issued.
The fundamental frequency of the measured input voltage is measured

continuously, and compared with the set value, StartFrequency. The frequency
function is dependent on the voltage magnitude. If the voltage magnitude decreases
the setting IntBlockLevel, SAPTUF gets blocked, and the output BLKDMAGN is
issued. All voltage settings are made in percent of the setting UBase, which should
be set as a phase-phase voltage in kV.
9.1.2.2 Time delay
The time delay for underfrequency protection SAPTUF can be either a settable
definite time delay or a voltage magnitude dependent time delay, where the time
delay depends on the voltage level; a high voltage level gives a longer time delay
and a low voltage level causes a short time delay. For the definite time delay, the
setting TimeDlyOperate sets the time delay.
For the voltage dependent time delay the measured voltage level and the settings
UNom, UMin, Exponent, tMax and tMin set the time delay according to figure 236
and equation 124. The setting TimerOperation is used to decide what type of time
delay to apply.
Trip signal issuing requires that the underfrequency condition continues for at least
the user set time delay TimeDlyOperate. If the START condition, with respect to
the measured frequency ceases during this user set delay time, and is not fulfilled
again within a user defined reset time, TimeDlyReset, the START output is reset,
after that the defined reset time has elapsed. Here it should be noted that after
leaving the hysteresis area, the START condition must be fulfilled again and it is
not sufficient for the signal to only return back to the hysteresis area.
On the output of SAPTUF a 100ms pulse is issued, after a time delay

corresponding to the setting of TimeDlyRestore, when the measured frequency
returns to the level corresponding to the setting RestoreFreq.
9.1.2.3 Voltage dependent time delay
Since the fundamental frequency in a power system is the same all over the system,
except some deviations during power oscillations, another criterion is needed to
decide, where to take actions, based on low frequency. In many applications the
voltage level is very suitable, and in most cases is load shedding preferable in areas
with low voltage. Therefore, a voltage dependent time delay has been introduced,
to make sure that load shedding, or other actions, take place at the right location. At
constant voltage, U, the voltage dependent time delay is calculated according to
equation 124. At non-constant voltage, the actual time delay is integrated in a
428
similar way as for the inverse time characteristic for the undervoltage and
overvoltage functions.
Exponent
é U - UMin ù
t=ê × ( tMax - tMin ) + tMin
ë UNom - UMin úû
where:
t is the voltage dependent time delay (at constant voltage),
U is the measured voltage
Exponent is a setting,
UMin, UNom are voltage settings corresponding to
tMax, tMin are time settings.
The inverse time characteristics are shown in figure 236, for:
UMin = 90%
UNom = 100%
tMax = 1.0 s
tMin = 0.0 s
Exponent = 0, 1, 2, 3 and 4
1
0
1
Exponenent
TimeDlyOperate [s]
2
3
0.5 4
0
90 95 100
U [% of UBase]
en05000075.vsd
IEC05000075 V1 EN
Figure 236: Voltage dependent inverse time characteristics for underfrequency

protection SAPTUF. The time delay to operate is plotted as a
function of the measured voltage, for the Exponent = 0, 1, 2, 3, 4
respectively.
429
9.1.2.4 Blocking
It is possible to block underfrequency protection SAPTUF partially or completely,

by binary input signals or by parameter settings, where:

BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output
If the measured voltage level decreases below the setting of IntBlockLevel, both the
START and the TRIP outputs, are blocked.
9.1.2.5 Design
The frequency measuring element continuously measures the frequency of the

positive sequence voltage and compares it to the setting StartFrequency. The
frequency signal is filtered to avoid transients due to switchings and faults. The
time integrator can operate either due to a definite delay time or to the special
voltage dependent delay time. When the frequency has returned back to the setting
of RestoreFreq, the RESTORE output is issued after the time delay
TimeDlyRestore. The design of underfrequency protection SAPTUF is
schematically described in figure 237.
Block
BLOCK BLKDMAGN
OR
Comparator
U < IntBlockLevel
Voltage Time integrator

Start
TimerOperation Mode & START
Selector START
Frequency Comparator Trip
f < StartFrequency Output
TimeDlyOperate TRIP Logic
TimeDlyReset TRIP
100 ms
Comparator RESTORE
TimeDlyRestore
f > RestoreFreq
en05000726.vsd
IEC05000726 V1 EN
Figure 237: Simplified logic diagram for SAPTUF
430

SAPTUF
U3P* TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
FREQ
IEC06000279 V2 EN
Figure 238: SAPTUF function block

Table 259: SAPTUF Input signals
SIGNAL
BLKTRIP BOOLEAN 0 Blocking operate output.
BLKREST BOOLEAN 0 Blocking restore output.
Table 260: SAPTUF Output signals

TRIP BOOLEAN Operate/trip signal for frequency.
START BOOLEAN Start/pick-up signal for frequency.
RESTORE BOOLEAN Restore signal for load restoring purposes.
BLKDMAGN BOOLEAN Blocking indication due to low amplitude.
FREQ REAL Measured frequency

Table 261: SAPTUF Group settings (basic)
On
StartFrequency 35.00 - 75.00 Hz 0.01 48.80 Frequency setting/start value.
IntBlockLevel 0 - 100 %UB 1 50 Internal blocking level in % of UBase.
TimeDlyOperate 0.000 - 60.000 s 0.001 0.200 Operate time delay in over/under-
frequency mode.
TimeDlyReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset.
TimeDlyRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay.
431

RestoreFreq 45.00 - 65.00 Hz 0.01 50.10 Restore frequency if frequency is above
frequency value.
TimerOperation Definite timer - - Definite timer Setting for choosing timer mode.
Volt based timer
UNom 50 - 150 %UB 1 100 Nominal voltage in % of UBase for
voltage based timer.
UMin 50 - 150 %UB 1 90 Lower operation limit in % of UBase for
Exponent 0.0 - 5.0 - 0.1 1.0 For calculation of the curve form for
tMax 0.010 - 60.000 s 0.001 1.000 Maximum time operation limit for voltage
based timer.
tMin 0.010 - 60.000 s 0.001 1.000 Minimum time operation limit for voltage
based timer.

Table 262: SAPTUF technical data
Operate value, start function (35.00-75.00) Hz ± 2.0 mHz
Operate time, start function 100 ms typically -
Reset time, start function 100 ms typically -
Operate time, definite time function (0.000-60.000)s ± 0.5% ±
10 ms
Reset time, definite time function (0.000-60.000)s ± 0.5% ±
10 ms
Voltage dependent time delay Settings: Class 5 +
UNom=(50-150)% of Ubase 200 ms
é U - UMin ù
Exponent
UMin=(50-150)% of Ubase
t=ê × ( tMax - tMin ) + tMin
ë UNom - UMin ú û Exponent=0.0-5.0
tMax=(0.000-60.000)s
tMin=(0.000-60.000)s
U=Umeasured
9.2 Overfrequency protection SAPTOF

Overfrequency protection SAPTOF 81
f>
SYMBOL-O V1 EN
432
9.2.1 Introduction
Overfrequency protection function SAPTOF is applicable in all situations, where
reliable detection of high fundamental power system frequency is needed.
Overfrequency occurs at sudden load drops or shunt faults in the power network.
Close to the generating plant, generator governor problems can also cause over
frequency.
SAPTOF is used mainly for generation shedding and remedial action schemes. It is
also used as a frequency stage initiating load restoring.
SAPTOF is provided with an undervoltage blocking. The operation is based on single-

phase, phase-to-phase or positive-sequence voltage measurement.

Overfrequency protection SAPTOF is used to detect high power system frequency.
SAPTOF has a settable definite time delay. If the frequency remains above the set
value for a time period corresponding to the chosen time delay, the corresponding
TRIP signal is issued. To avoid an unwanted TRIP due to uncertain frequency
measurement at low voltage magnitude, a voltage controlled blocking of the
function is available from the preprocessing function, that is, if the voltage is lower
than the set blocking voltage in the preprocessing function, the function is blocked
and no START or TRIP signal is issued.
The fundamental frequency of the positive sequence voltage is measured

continuously, and compared with the set value, StartFrequency. Overfrequency
protection SAPTOF is dependent on the voltage magnitude. If the voltage
magnitude decreases below the setting IntBlockLevel, SAPTOF is blocked, and the
output BLKDMAGN is issued. All voltage settings are made in percent of the
UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations
of the output START signal, a hysteresis has been included.
9.2.2.2 Time delay
The time delay for Overfrequency protection SAPTOF (81) is a settable definite
time delay, specified by the setting TimeDlyOperate.
TRIP signal issuing requires that the overfrequency condition continues for at least
the user set time delay, TimeDlyReset. If the START condition, with respect to the
measured frequency ceases during this user set delay time, and is not fulfilled again
within a user defined reset time, TimeDlyReset, the START output is reset, after
that the defined reset time has elapsed. It is to be noted that after leaving the
hysteresis area, the START condition must be fulfilled again and it is not sufficient
for the signal to only return back to the hysteresis area.
433
9.2.2.3 Blocking
It is possible to block overfrequency protection SAPTOF partially or completely,


9.2.2.4 Design
The frequency measuring element continuously measures the frequency of the

positive sequence voltage and compares it to the setting StartFrequency. The
frequency signal is filtered to avoid transients due to switchings and faults in the
power system. The time integrator operates due to a definite delay time. The design
of overfrequency protection SAPTOF is schematically described in figure 239.
BLOCK
BLKTRIP BLOCK
OR BLKDMAGN
Comparator
U < IntBlockLevel
Start
&
Trip
Voltage Time integrator Output
Logic
Definite Time Delay START START
Frequency Comparator
f > StartFrequency TimeDlyOperate
TRIP
TimeDlyReset
TRIP
en05000735.vsd
IEC05000735 V1 EN
Figure 239: Schematic design of overfrequency protection SAPTOF
434

SAPTOF
U3P* TRIP
BLOCK START
BLKTRIP BLKDMAGN
FREQ
IEC06000280 V2 EN
Figure 240: SAPTOF function block

Table 263: SAPTOF Input signals
SIGNAL
Table 264: SAPTOF Output signals

TRIP BOOLEAN Operate/trip signal for frequency.
START BOOLEAN Start/pick-up signal for frequency.
FREQ REAL Measured frequency

Table 265: SAPTOF Group settings (basic)
On
StartFrequency 35.00 - 75.00 Hz 0.01 51.20 Frequency setting/start value.
TimeDlyOperate 0.000 - 60.000 s 0.001 0.000 Operate time delay in over/under-
frequency mode.
TimeDlyReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset.
435

Table 266: SAPTOF technical data
Operate value, start function (35.00-75.00) Hz ± 2.0 mHz at symmetrical three-
phase voltage
Reset time, start function 100 ms typically -
Operate time, definite time (0.000-60.000)s ± 0.5% ± 10 ms
function
Reset time, definite time (0.000-60.000)s ± 0.5% ± 10 ms
function
9.3 Rate-of-change frequency protection SAPFRC

Rate-of-change frequency protection SAPFRC 81
df/dt >
<
SYMBOL-N V1 EN
9.3.1 Introduction
Rate-of-change frequency protection function (SAPFRC) gives an early indication
of a main disturbance in the system. SAPFRC can be used for generation shedding,
load shedding, remedial action schemes. SAPFRC can discriminate between
positive or negative change of frequency.
SAPFRC is provided with an undervoltage blocking. The operation may be based

on single-phase, phase-to-phase or positive-sequence voltage measurement.

Rate-of-change frequency protection SAPFRC is used to detect fast power system
frequency changes, increase as well as, decrease at an early stage. SAPFRC has a
settable definite time delay. If the rate-of-change of frequency remains below the
set value, for negative rate-of-change, for a time period equal to the chosen time
delay, the TRIP signal is issued. If the rate-of-change of frequency remains above
the set value, for positive rate-of-change, for a time period equal to the chosen time
delay, the TRIP signal is issued. To avoid an unwanted TRIP due to uncertain
frequency measurement at low voltage magnitude, a voltage controlled blocking of
the function is available, that is if the voltage is lower than the set blocking voltage
436
IntBlockLevel, the function is blocked and no START or TRIP signal is issued. If

the frequency recovers, after a frequency decrease, a restore signal is issued.
The rate-of-change of the fundamental frequency of the selected voltage is

measured continuously, and compared with the set value, StartFreqGrad. Rate-of-
change frequency protection SAPFRC is also dependent on the voltage magnitude.
If the voltage magnitude decreases below the setting IntBlockLevel, SAPFRC is
blocked, and the output BLKDMAGN is issued. The sign of the setting
StartFreqGrad, controls if SAPFRC reacts on a positive or on a negative change in
frequency. If SAPFRC is used for decreasing frequency that is, the setting
StartFreqGrad has been given a negative value, and a trip signal has been issued,
then a 100 ms pulse is issued on the RESTORE output, when the frequency
recovers to a value higher than the setting RestoreFreq. A positive setting of
StartFreqGrad, sets SAPFRC to START and TRIP for frequency increases.
9.3.2.2 Time delay
Rate-of-change frequency protection SAPFRC has a settable definite time delay,

tTrip. .
Trip signal issuing requires that the rate-of-change of frequency condition

continues for at least the user set time delay, tTrip. If the START condition, with
respect to the measured frequency ceases during the delay time, and is not fulfilled
again within a user defined reset time, tReset, the START output is reset, after that
the defined reset time has elapsed. Here it should be noted that after leaving the
hysteresis area, the START condition must be fulfilled again and it is not sufficient
for the signal to only return back into the hysteresis area.
The RESTORE output of SAPFRC is set, after a time delay equal to the setting of
tRestore, when the measured frequency has returned to the level corresponding to
RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s
the restore functionality is disabled, and no output will be given. The restore
functionality is only active for lowering frequency conditions and the restore
sequence is disabled if a new negative frequency gradient is detected during the
restore period, defined by the settings RestoreFreq and tRestore.
9.3.2.3 Blocking
Rate-of-change frequency protection (SAPFRC) can be partially or totally blocked,


BLKREST: blocks the RESTORE output
437
9.3.2.4 Design
Rate-of-change frequency protection (SAPFRC) measuring element continuously

measures the frequency of the selected voltage and compares it to the setting
StartFreqGrad. The frequency signal is filtered to avoid transients due to power
system switchings and faults. The time integrator operates with a definite delay
time. When the frequency has returned back to the setting of RestoreFreq, the
RESTORE output is issued after the time delay tRestore, if the TRIP signal has
earlier been issued. The sign of the setting StartFreqGrad is essential, and controls
if the function is used for raising or lowering frequency conditions. The design of
SAPFRC is schematically described in figure 241.
BLOCK
BLKTRIP
BLKRESET BLOCK
OR
Voltage Comparator BLKDMAGN

U < IntBlockLevel
Start
Rate-of-Change Time integrator &
Comparator
of Frequency Trip
If
Definite Time Delay Output
[StartFreqGrad<0 START START
Logic
AND
TimeDlyOperate
df/dt < StartFreqGrad]
OR
TimeDlyReset
[StartFreqGrad>0
AND
TRIP
df/dt > StartFreqGrad]
Then
START
100 ms
Frequency Comparator RESTORE

TimeDlyRestore
f > RestoreFreq
en05000835.vsd
IEC05000835 V1 EN
Figure 241: Schematic design of Rate-of-change frequency protection SAPFRC
438

SAPFRC
U3P* TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
IEC06000281 V2 EN
Figure 242: SAPFRC function block

Table 267: SAPFRC Input signals
SIGNAL
BLKREST BOOLEAN 0 Blocking restore output.
Table 268: SAPFRC Output signals

TRIP BOOLEAN Operate/trip signal for frequencyGradient
START BOOLEAN Start/pick-up signal for frequencyGradient
RESTORE BOOLEAN Restore signal for load restoring purposes.

Table 269: SAPFRC Group settings (basic)
On
UBase 0.05 - 2000.00 kV 0.05 400.00 Base setting for the phase-phase voltage
in kV
StartFreqGrad -10.00 - 10.00 Hz/s 0.01 0.50 Frequency gradient start value. Sign
defines direction.
tTrip 0.000 - 60.000 s 0.001 0.200 Operate time delay in pos./neg.
frequency gradient mode.
RestoreFreq 45.00 - 65.00 Hz 0.01 49.90 Restore frequency if frequency is above
frequency value (Hz)
tRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay.
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset.
439

Table 270: SAPFRC Technical data
Operate value, start function (-10.00-10.00) Hz/s ± 10.0 mHz/s
Operate value, internal (0-100)% of UBase ± 1.0% of Ur
blocking level
440
Multipurpose protection
Section 10 Multipurpose protection
About this chapter

This chapter describes Multipurpose protection and includes the General current
and voltage function. The way the functions work, their setting parameters,
function blocks, input and output signals and technical data are included for each
function.
10.1 General current and voltage protection CVGAPC

General current and voltage protection CVGAPC - -
10.1.1 Introduction
The General current and voltage protection (CVGAPC) can be utilized as a
negative sequence current protection detecting unsymmetrical conditions such as
open phase or unsymmetrical faults.
CVGAPC can also be used to improve phase selection for high resistive earth
faults, outside the distance protection reach, for the transmission line. Three
functions are used, which measures the neutral current and each of the three phase
voltages. This will give an independence from load currents and this phase
selection will be used in conjunction with the detection of the earth fault from the
directional earth fault protection function.
10.1.2.1 Measured quantities within CVGAPC
General current and voltage protection (CVGAPC) function is always connected to

three-phase current and three-phase voltage input in the configuration tool, but it
will always measure only one current and one voltage quantity selected by the end
user in the setting tool.
The user can select to measure one of the current quantities shown in table 271.
441
Table 271: Current selection for CVGAPC function

Set value for the
parameter Comment
CurrentInput
1 Phase1 CVGAPC function will measure the phase L1 current phasor
4 PosSeq CVGAPC function will measure internally calculated positive sequence
current phasor
5 NegSeq CVGAPC function will measure internally calculated negative
sequence current phasor
6 3ZeroSeq CVGAPC function will measure internally calculated zero sequence
current phasor multiplied by factor 3
7 MaxPh CVGAPC function will measure current phasor of the phase with
maximum magnitude
8 MinPh CVGAPC function will measure current phasor of the phase with
minimum magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance current, which
is internally calculated as the algebraic magnitude difference between
the current phasor of the phase with maximum magnitude and current
phasor of the phase with minimum magnitude. Phase angle will be set
to 0° all the time
10 Phase1-Phase2 CVGAPC function will measure the current phasor internally calculated
as the vector difference between the phase L1 current phasor and
phase L2 current phasor (IL1-IL2)
phase L3 current phasor (IL2-IL3)
phase L1 current phasor ( IL3-IL1)
13 MaxPh-Ph CVGAPC function will measure ph-ph current phasor with the
maximum magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph current phasor with the
minimum magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance current, which
is internally calculated as the algebraic magnitude difference between
the ph-ph current phasor with maximum magnitude and ph-ph current
phasor with minimum magnitude. Phase angle will be set to 0° all the
time
The user can select to measure one of the voltage quantities shown in table 272:
Table 272: Voltage selection for CVGAPC function

Set value for the
parameter Comment
VoltageInput
1 Phase1 CVGAPC function will measure the phase L1 voltage phasor
442
Set value for the

parameter Comment
VoltageInput
voltage phasor
5 -NegSeq CVGAPC function will measure internally calculated negative
sequence voltage phasor. This voltage phasor will be intentionally
rotated for 180° in order to enable easier settings for the directional
feature when used.
6 -3ZeroSeq CVGAPC function will measure internally calculated zero sequence
voltage phasor multiplied by factor 3. This voltage phasor will be
intentionally rotated for 180° in order to enable easier settings for the
directional feature when used.
7 MaxPh CVGAPC function will measure voltage phasor of the phase with
maximum magnitude
8 MinPh CVGAPC function will measure voltage phasor of the phase with
minimum magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance voltage,
which is internally calculated as the algebraic magnitude difference
between the voltage phasor of the phase with maximum magnitude
and voltage phasor of the phase with minimum magnitude. Phase
angle will be set to 0° all the time
10 Phase1-Phase2 CVGAPC function will measure the voltage phasor internally
calculated as the vector difference between the phase L1 voltage
phasor and phase L2 voltage phasor (UL1-UL2)

phasor and phase L3 voltage phasor (UL2-UL3)

phasor and phase L1 voltage phasor ( UL3-UL1)
13 MaxPh-Ph CVGAPC function will measure ph-ph voltage phasor with the
maximum magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph voltage phasor with the
minimum magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance voltage,
which is internally calculated as the algebraic magnitude difference
between the ph-ph voltage phasor with maximum magnitude and ph-
ph voltage phasor with minimum magnitude. Phase angle will be set to
0° all the time
It is important to notice that the voltage selection from table 272 is always
applicable regardless the actual external VT connections. The three-phase VT
inputs can be connected to IED as either three phase-to-ground voltages UL1, UL2
& UL3 or three phase-to-phase voltages UL1L2, UL2L3 & UL3L1). This information
about actual VT connection is entered as a setting parameter for the pre-processing
block, which will then take automatic care about it.
The user can select one of the current quantities shown in table 273 for built-in
current restraint feature:
443
Table 273: Restraint current selection for CVGAPC function

Set value for the
parameter RestrCurr Comment
current phasor
2 NegSeq CVGAPC function will measure internally calculated negative
sequence current phasor
3 3ZeroSeq CVGAPC function will measure internally calculated zero sequence
current phasor multiplied by factor 3
4 MaxPh CVGAPC function will measure current phasor of the phase with
maximum magnitude
10.1.2.2 Base quantities for CVGAPC function
The parameter settings for the base quantities, which represent the base (100%) for
pickup levels of all measuring stages, shall be entered as setting parameters for
every CVGAPC function.
Base current shall be entered as:
1. rated phase current of the protected object in primary amperes, when the
measured Current Quantity is selected from 1 to 9, as shown in table 271.
2. rated phase current of the protected object in primary amperes multiplied by
√3 (1.732 · Iphase), when the measured Current Quantity is selected from 10
to 15, as shown in table 271.
Base voltage shall be entered as:
1. rated phase-to-earth voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 1 to 9, as shown in table 272.
2. rated phase-to-phase voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 10 to 15, as shown in table 272.
10.1.2.3 Built-in overcurrent protection steps
Two overcurrent protection steps are available. They are absolutely identical and
therefore only one will be explained here.
Overcurrent step simply compares the magnitude of the measured current quantity
(see table 271) with the set pickup level. Non-directional overcurrent step will
pickup if the magnitude of the measured current quantity is bigger than this set
level. Reset ratio is settable, with default value of 0.96. However depending on
other enabled built-in features this overcurrent pickup might not cause the
overcurrent step start signal. Start signal will only come if all of the enabled built-
in features in the overcurrent step are fulfilled at the same time.
444
Second harmonic feature

The overcurrent protection step can be restrained by a second harmonic component
in the measured current quantity (see table 271). However it shall be noted that this
feature is not applicable when one of the following measured currents is selected:
• PosSeq (positive sequence current)

• NegSeq (negative sequence current)
• UnbalancePh (unbalance phase current)
• UnbalancePh-Ph (unbalance ph-ph current)
This feature will simple prevent overcurrent step start if the second-to-first
harmonic ratio in the measured current exceeds the set level.
Directional feature
The overcurrent protection step operation can be can be made dependent on the
relevant phase angle between measured current phasor (see table 271) and
measured voltage phasor (see table 272). In protection terminology it means that
the General currrent and voltage protection (CVGAPC) function can be made
directional by enabling this built-in feature. In that case overcurrent protection step
will only operate if the current flow is in accordance with the set direction
(Forward, which means towards the protected object, or Reverse, which means
from the protected object). For this feature it is of the outmost importance to
understand that the measured voltage phasor (see table 272) and measured current
phasor (see table 271) will be used for directional decision. Therefore it is the sole
responsibility of the end user to select the appropriate current and voltage signals in
order to get a proper directional decision. CVGAPC function will NOT do this
automatically. It will just simply use the current and voltage phasors selected by
the end user to check for the directional criteria.
Table 274 gives an overview of the typical choices (but not the only possible ones)
for these two quantities for traditional directional relays.
Table 274: Typical current and voltage choices for directional feature
Set value for the Set value for the
parameter parameter Comment
CurrentInput VoltageInput
PosSeq PosSeq Directional positive sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to
-90° depending on the power
NegSeq -NegSeq Directional negative sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to
-90° depending on the power system voltage level (X/
R ratio)
3ZeroSeq -3ZeroSeq Directional zero sequence overcurrent function is
obtained. Typical setting for RCADir is from 0° to
-90° depending on the power system earthing (that
is, solidly earthed, earthed via resistor)
445
Set value for the Set value for the

parameter parameter Comment
CurrentInput VoltageInput
Phase1 Phase2-Phase3 Directional overcurrent function for the first phase is
obtained. Typical setting for RCADir is +30° or +45°
Phase2 Phase3-Phase1 Directional overcurrent function for the second phase
is obtained. Typical setting for RCADir is +30° or +45°
Phase3 Phase1-Phase2 Directional overcurrent function for the third phase is
obtained. Typical setting for RCADir is +30° or +45°
Unbalance current or voltage measurement shall not be used when the directional
feature is enabled.
Two types of directional measurement principles are available, I & U and

IcosPhi&U. The first principle, referred to as "I & U" in the parameter setting tool,
checks that:
• the magnitude of the measured current is bigger than the set pick-up level
• the phasor of the measured current is within the operating region (defined by
the relay operate angle, ROADir parameter setting; see figure 243).
U=-3U0
RCADir
Ipickup ROADir I=3Io
Operate region
mta line
en05000252.vsd
IEC05000252 V1 EN
Figure 243: I & U directional operating principle for CVGAPC function
where:
RCADir is -75°
ROADir is 50°
The second principle, referred to as "IcosPhi&U" in the parameter setting tool,

checks that:
446
• that the product I·cos(Φ) is bigger than the set pick-up level, where Φ is angle
between the current phasor and the mta line
• that the phasor of the measured current is within the operating region (defined
by the I·cos(Φ) straight line and the relay operate angle, ROADir parameter
setting; see figure 243).
U=-3U0
RCADir
Ipickup ROADir F I=3Io
Operate region
mta line
en05000253.vsd
IEC05000253 V1 EN
Figure 244: CVGAPC, IcosPhi&U directional operating principle
where:
RCADir is -75°
ROADir is 50°
Note that it is possible to decide by a parameter setting how the directional feature
shall behave when the magnitude of the measured voltage phasor falls below the pre-
set value. User can select one of the following three options:
• Non-directional (operation allowed for low magnitude of the reference voltage)

• Block (operation prevented for low magnitude of the reference voltage)
• Memory (memory voltage shall be used to determine direction of the current)
It shall also be noted that the memory duration is limited in the algorithm to 100
ms. After that time the current direction will be locked to the one determined
during memory time and it will re-set only if the current fails below set pickup
level or voltage goes above set voltage memory limit.
Voltage restraint/control feature

The overcurrent protection step operation can be can be made dependent of a
measured voltage quantity (see table 272). Practically then the pickup level of the
overcurrent step is not constant but instead decreases with the decrease in the
magnitude of the measured voltage quantity. Two different types of dependencies
are available:
• Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)
447
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
ULowLimit_OC1 UHighLimit_OC1
Selected Voltage
Magnitude
en05000324.vsd
IEC05000324 V1 EN
Figure 245: Example for OC1 step current pickup level variation as function of
measured voltage magnitude in Slope mode of operation
• Voltage controlled overcurrent (when setting parameter

VDepMode_OC1=Step)
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
UHighLimit_OC1 Selected Voltage Magnitude
en05000323.vsd
IEC05000323 V1 EN
Figure 246: Example for OC1 step current pickup level variation as function of
measured voltage magnitude in Step mode of operation
This feature will simply change the set overcurrent pickup level in accordance with
magnitude variations of the measured voltage. It shall be noted that this feature will
as well affect the pickup current value for calculation of operate times for IDMT
448
curves (overcurrent with IDMT curve will operate faster during low voltage
conditions).
Current restraint feature

The overcurrent protection step operation can be made dependent of a restraining
current quantity (see table 273). Practically then the pickup level of the overcurrent
step is not constant but instead increases with the increase in the magnitude of the
restraining current.
IMeasured
ea ain
ar tr
te es
ra ff *Ir
pe e
O Co
es tr
I>R
IsetHigh
IsetLow
atan(RestrCoeff)
Restraint
en05000255.vsd
IEC05000255 V1 EN
Figure 247: Current pickup variation with restraint current magnitude
This feature will simply prevent overcurrent step to start if the magnitude of the
measured current quantity is smaller than the set percentage of the restrain current
magnitude. However this feature will not affect the pickup current value for
calculation of operate times for IDMT curves. This means that the IDMT curve
operate time will not be influenced by the restrain current magnitude.
When set, the start signal will start definite time delay or inverse (IDMT) time
delay in accordance with the end user setting. If the start signal has value one for
longer time than the set time delay, the overcurrent step will set its trip signal to
one. Reset of the start and trip signal can be instantaneous or time delay in
accordance with the end user setting.
10.1.2.4 Built-in undercurrent protection steps
Two undercurrent protection steps are available. They are absolutely identical and
therefore only one will be explained here. Undercurrent step simply compares the
magnitude of the measured current quantity (see table 271) with the set pickup
level. The undercurrent step will pickup and set its start signal to one if the
magnitude of the measured current quantity is smaller than this set level. The start
signal will start definite time delay with set time delay. If the start signal has value
one for longer time than the set time delay the undercurrent step will set its trip
449
signal to one. Reset of the start and trip signal can be instantaneous or time delay in
accordance with the setting.
10.1.2.5 Built-in overvoltage protection steps
Two overvoltage protection steps are available. They are absolutely identical and
Overvoltage step simply compares the magnitude of the measured voltage quantity
(see table 272) with the set pickup level. The overvoltage step will pickup if the
magnitude of the measured voltage quantity is bigger than this set level. Reset ratio
is settable, with default value of 0.99.
The start signal will start definite time delay or inverse (IDMT) time delay in
accordance with the end user setting. If the start signal has value one for longer
time than the set time delay, the overvoltage step will set its trip signal to one.
Reset of the start and trip signal can be instantaneous or time delay in accordance
with the end user setting.
10.1.2.6 Built-in undervoltage protection steps
Two undervoltage protection steps are available. They are absolutely identical and
Undervoltage step simply compares the magnitude of the measured voltage

quantity (see table 272) with the set pickup level. The undervoltage step will
pickup if the magnitude of the measured voltage quantity is smaller than this set
level. Reset ratio is settable, with default value of 1.01.
The start signal will start definite time delay or inverse (IDMT) time delay in
accordance with the end user setting. If the start signal has value one for longer
time than the set time delay, the undervoltage step will set its trip signal to one.
Reset of the start and trip signal can be instantaneous or time delay in accordance
with the end user setting.
The simplified internal logics, for CVGAPC function are shown in the following
figures.
450
IED
ADM CVGAPC function
Current and voltage selection

settings
Phasor calculation of
scaling with CT ratio
individual currents
A/D conversion
Selection of which current Selected current
and voltage shall be given to
Phasors &
samples
the built-in protection Selected voltage
elements
Restraint current selection
Selected restraint current

A/D conversion scaling
Selection of restraint current

Phasor calculation of
individual voltages
with CT ratio
Phasors &
samples
IEC05000169 V2 EN
Figure 248: Treatment of measured currents within IED for CVGAPC function
Figure 248 shows how internal treatment of measured currents is done for
multipurpose protection function
The following currents and voltages are inputs to the multipurpose protection
function. They must all be expressed in true power system (primary) Amperes and
kilovolts.
1. Instantaneous values (samples) of currents & voltages from one three-phase

current and one three-phase voltage input.
2. Fundamental frequency phasors from one three-phase current and one three-
phase voltage input calculated by the pre-processing modules.
3. Sequence currents & voltages from one three-phase current and one three-
phase voltage input calculated by the pre-processing modules.
The multipurpose protection function:
1. Selects one current from the three-phase input system (see table 271) for
internally measured current.
2. Selects one voltage from the three-phase input system (see table 272) for
internally measured voltage.
3. Selects one current from the three-phase input system (see table 273) for
internally measured restraint current.
451
CURRENT
UC1
nd TRUC1
2 Harmonic
Selected current restraint
STUC2
UC2
TRUC2
2nd Harmonic
restraint
STOC1
OC1 TROC1
2nd Harmonic BLK2ND

restraint ³1
Selected restraint current
Current restraint
DIROC1
Directionality
Voltage control /
restraint
STOC2
OC2 TROC2
2nd Harmonic
restraint
Current restraint ³1
UDIRLOW
Directionality DIROC2
Voltage control /
restraint
STOV1
OV1 TROV1
STOV2
OV2 TROV2
STUV1
Selected voltage
UV1 TRUV1
STUV2
UV2 TRUV2
VOLTAGE
en05000170.vsd
IEC05000170 V1 EN
Figure 249: CVGAPC function main logic diagram for built-in protection elements
452
Logic in figure 249 can be summarized as follows:
1. The selected currents and voltage are given to built-in protection elements.
Each protection element and step makes independent decision about status of
its START and TRIP output signals.
2. More detailed internal logic for every protection element is given in the
following four figures
3. Common START and TRIP signals from all built-in protection elements &
steps (internal OR logic) are available from multipurpose function as well.
Enable
second
harmonic Second
harmonic check
1 DEF time BLKTROC
selected DEF 1 TROC1
AND
OR
Selected current a
a>b
b
OC1=On STOC1
AND
StartCurr_OC1 BLKOC1
X
Inverse
Voltage Directionality DIR_OK Inverse

control or time
check selected
restraint
feature
Selected voltage
Current
Restraint
Feature
Selected restrain current Imeasured > k Irestraint
en05000831.vsd
IEC05000831 V1 EN
Figure 250: Simplified internal logic diagram for built-in first overcurrent step that is, OC1 (step OC2 has the
same internal logic)
453
Bin input: BLKUC1TR
Selected current a TRUC1

b>a
DEF AND
b
StartCurr_UC1
AND
Operation_UC1=On
STUC1
Bin input: BLKUC1
en05000750.vsd
IEC05000750 V1 EN
Figure 251: Simplified internal logic diagram for built-in first undercurrent step that is, UC1 (step UC2 has
the same internal logic)
DEF time BLKTROV1

selected DEF TROV1
AND
OR
Selected voltage a
a>b
b STOV1
StartVolt_OV1
AND
Inverse
Operation_OV1=On
Inverse time
BLKOV1 selected
en05000751.vsd
IEC05000751 V1 EN
Figure 252: Simplified internal logic diagram for built-in first overvoltage step OV1 (step OV2 has the same
internal logic)
454
DEF time BLKTRUV

selected DEF 1 TRUV1
AND
OR
Selected voltage a
b>a
b STUV1
AND
StartVolt_UV1
Inverse
Operation_UV1=On
Inverse time
BLKUV1 selected
en05000752.vsd
IEC05000752 V1 EN
Figure 253: Simplified internal logic diagram for built-in first undervoltage step UV1 (step UV2 has the same
internal logic)

CVGAPC
I3P* TRIP
U3P* TROC1
BLOCK TROC2
BLKOC1 TRUC1
BLKOC1TR TRUC2
ENMLTOC1 TROV1
BLKOC2 TROV2
BLKOC2TR TRUV1
ENMLTOC2 TRUV2
BLKUC1 START
BLKUC1TR STOC1
BLKUC2 STOC2
BLKUC2TR STUC1
BLKOV1 STUC2
BLKOV1TR STOV1
BLKOV2 STOV2
BLKOV2TR STUV1
BLKUV1 STUV2
BLKUV1TR BLK2ND
BLKUV2 DIROC1
BLKUV2TR DIROC2
UDIRLOW
CURRENT
ICOSFI
VOLTAGE
UIANGLE
IEC05000372 V2 EN
Figure 254: CVGAPC function block
455

Table 275: CVGAPC Input signals
SIGNAL
SIGNAL
BLKOC1 BOOLEAN 0 Block of over current function OC1
BLKOC1TR BOOLEAN 0 Block of trip for over current function OC1
ENMLTOC1 BOOLEAN 0 When activated, the current multiplier is in use for
OC1
BLKOC2 BOOLEAN 0 Block of over current function OC2
BLKOC2TR BOOLEAN 0 Block of trip for over current function OC2
ENMLTOC2 BOOLEAN 0 When activated, the current multiplier is in use for
OC2
BLKUC1 BOOLEAN 0 Block of under current function UC1
BLKUC1TR BOOLEAN 0 Block of trip for under current function UC1
BLKUC2 BOOLEAN 0 Block of under current function UC2
BLKUC2TR BOOLEAN 0 Block of trip for under current function UC2
BLKOV1 BOOLEAN 0 Block of over voltage function OV1
BLKOV1TR BOOLEAN 0 Block of trip for over voltage function OV1
BLKOV2 BOOLEAN 0 Block of over voltage function OV2
BLKOV2TR BOOLEAN 0 Block of trip for over voltage function OV2
BLKUV1 BOOLEAN 0 Block of under voltage function UV1
BLKUV1TR BOOLEAN 0 Block of trip for under voltage function UV1
BLKUV2 BOOLEAN 0 Block of under voltage function UV2
BLKUV2TR BOOLEAN 0 Block of trip for under voltage function UV2
Table 276: CVGAPC Output signals

TRIP BOOLEAN General trip signal
TROC1 BOOLEAN Trip signal from overcurrent function OC1
TROC2 BOOLEAN Trip signal from overcurrent function OC2
TRUC1 BOOLEAN Trip signal from undercurrent function UC1
TRUC2 BOOLEAN Trip signal from undercurrent function UC2
TROV1 BOOLEAN Trip signal from overvoltage function OV1
TROV2 BOOLEAN Trip signal from overvoltage function OV2
TRUV1 BOOLEAN Trip signal from undervoltage function UV1
TRUV2 BOOLEAN Trip signal from undervoltage function UV2
456

STOC1 BOOLEAN Start signal from overcurrent function OC1
STOC2 BOOLEAN Start signal from overcurrent function OC2
STUC1 BOOLEAN Start signal from undercurrent function UC1
STUC2 BOOLEAN Start signal from undercurrent function UC2
STOV1 BOOLEAN Start signal from overvoltage function OV1
STOV2 BOOLEAN Start signal from overvoltage function OV2
STUV1 BOOLEAN Start signal from undervoltage function UV1
STUV2 BOOLEAN Start signal from undervoltage function UV2
BLK2ND BOOLEAN Block from second harmonic detection
DIROC1 INTEGER Directional mode of OC1 (nondir, forward,reverse)
DIROC2 INTEGER Directional mode of OC2 (nondir, forward,reverse)
UDIRLOW BOOLEAN Low voltage for directional polarization
CURRENT REAL Measured current value
ICOSFI REAL Measured current multiplied with cos (Phi)
VOLTAGE REAL Measured voltage value
UIANGLE REAL Angle between voltage and current

Table 277: CVGAPC Group settings (basic)
On
CurrentInput phase1 - - MaxPh Select current signal which will be
phase2 measured inside function
phase3
PosSeq
NegSeq
3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
IBase 1 - 99999 A 1 3000 Base Current
457

VoltageInput phase1 - - MaxPh Select voltage signal which will be
phase2 measured inside function
phase3
PosSeq
-NegSeq
-3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
OperHarmRestr Off - - Off Operation of 2nd harmonic restrain Off /
On On
l_2nd/l_fund 10.0 - 50.0 % 1.0 20.0 Ratio of second to fundamental current
harmonic in %
BlkLevel2nd 10 - 5000 %IB 1 5000 Harm analyse disabled above this
current level in % of Ibase
EnRestrainCurr Off - - Off Enable current restrain function On / Off
On
RestrCurrInput PosSeq - - PosSeq Select current signal which will be used
NegSeq for curr restrain
3*ZeroSeq
Max
RestrCurrCoeff 0.00 - 5.00 - 0.01 0.00 Restraining current coefficient
RCADir -180 - 180 Deg 1 -75 Relay Characteristic Angle
ROADir 1 - 90 Deg 1 75 Relay Operate Angle
LowVolt_VM 0.0 - 5.0 %UB 0.1 0.5 Below this level in % of Ubase setting
ActLowVolt takes over
Operation_OC1 Off - - Off Operation OC1 Off / On
On
StartCurr_OC1 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC1 in % of
Ibase
CurveType_OC1 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for OC1
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
458

tDef_OC1 0.00 - 6000.00 s 0.01 0.50 Independent (definitive) time delay of
OC1
k_OC1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OC1
tMin_OC1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IEC IDMT
curves for OC1
VCntrlMode_OC1 Voltage control - - Off Control mode for voltage controlled OC1
Input control function
Volt/Input control
Off
VDepMode_OC1 Step - - Step Voltage dependent mode OC1 (step,
Slope slope)
VDepFact_OC1 0.02 - 5.00 - 0.01 1.00 Multiplying factor for I pickup when OC1
is U dependent
ULowLimit_OC1 1.0 - 200.0 %UB 0.1 50.0 Voltage low limit setting OC1 in % of
Ubase
UHighLimit_OC1 1.0 - 200.0 %UB 0.1 100.0 Voltage high limit setting OC1 in % of
Ubase
HarmRestr_OC1 Off - - Off Enable block of OC1 by 2nd harmonic
On restrain
DirMode_OC1 Non-directional - - Non-directional Directional mode of OC1 (nondir,
Forward forward,reverse)
Reverse
DirPrinc_OC1 I&U - - I&U Measuring on IandU or IcosPhiandU for
IcosPhi&U OC1
ActLowVolt1_VM Non-directional - - Non-directional Low voltage level action for Dir_OC1
Block (Nodir, Blk, Mem)
Memory
Operation_OC2 Off - - Off Operation OC2 Off / On
On
StartCurr_OC2 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC2 in % of
Ibase
CurveType_OC2 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for OC2
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
tDef_OC2 0.00 - 6000.00 s 0.01 0.50 Independent (definitive) time delay of
OC2
k_OC2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OC2
459

tMin_OC2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IEC IDMT
curves for OC2
VCntrlMode_OC2 Voltage control - - Off Control mode for voltage controlled OC2
Input control function
Volt/Input control
Off
VDepMode_OC2 Step - - Step Voltage dependent mode OC2 (step,
Slope slope)
VDepFact_OC2 0.02 - 5.00 - 0.01 1.00 Multiplying factor for I pickup when OC2
is U dependent
ULowLimit_OC2 1.0 - 200.0 %UB 0.1 50.0 Voltage low limit setting OC2 in % of
Ubase
UHighLimit_OC2 1.0 - 200.0 %UB 0.1 100.0 Voltage high limit setting OC2 in % of
Ubase
HarmRestr_OC2 Off - - Off Enable block of OC2 by 2nd harmonic
On restrain
DirMode_OC2 Non-directional - - Non-directional Directional mode of OC2 (nondir,
Forward forward,reverse)
Reverse
DirPrinc_OC2 I&U - - I&U Measuring on IandU or IcosPhiandU for
IcosPhi&U OC2
ActLowVolt2_VM Non-directional - - Non-directional Low voltage level action for Dir_OC2
Block (Nodir, Blk, Mem)
Memory
Operation_UC1 Off - - Off Operation UC1 Off / On
On
EnBlkLowI_UC1 Off - - Off Enable internal low current level blocking
On for UC1
BlkLowCurr_UC1 0 - 150 %IB 1 20 Internal low current blocking level for
UC1 in % of Ibase
StartCurr_UC1 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC1 in %
of Ibase
tDef_UC1 0.00 - 6000.00 s 0.01 0.50 Independent (definitive) time delay of UC1
tResetDef_UC1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve UC1
HarmRestr_UC1 Off - - Off Enable block of UC1 by 2nd harmonic
On restrain
Operation_UC2 Off - - Off Operation UC2 Off / On
On
EnBlkLowI_UC2 Off - - Off Enable internal low current level blocking
On for UC2
BlkLowCurr_UC2 0 - 150 %IB 1 20 Internal low current blocking level for
UC2 in % of Ibase
StartCurr_UC2 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC2 in %
of Ibase
tDef_UC2 0.00 - 6000.00 s 0.01 0.50 Independent (definitive) time delay of UC2
HarmRestr_UC2 Off - - Off Enable block of UC2 by 2nd harmonic
On restrain
Operation_OV1 Off - - Off Operation OV1 Off / On
On
460

StartVolt_OV1 2.0 - 200.0 %UB 0.1 150.0 Operate voltage level for OV1 in % of
Ubase
CurveType_OV1 Definite time - - Definite time Selection of time delay curve type for OV1
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
tDef_OV1 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of OV1
tMin_OV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for OV1
k_OV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OV1
Operation_OV2 Off - - Off Operation OV2 Off / On
On
StartVolt_OV2 2.0 - 200.0 %UB 0.1 150.0 Operate voltage level for OV2 in % of
Ubase
CurveType_OV2 Definite time - - Definite time Selection of time delay curve type for OV2
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
tDef_OV2 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of OV2
tMin_OV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for OV2
k_OV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OV2
Operation_UV1 Off - - Off Operation UV1 Off / On
On
StartVolt_UV1 2.0 - 150.0 %UB 0.1 50.0 Operate undervoltage level for UV1 in %
of Ubase
CurveType_UV1 Definite time - - Definite time Selection of time delay curve type for UV1
Inverse curve A
Inverse curve B
Prog. inv. curve
tDef_UV1 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of UV1
tMin_UV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for UV1
k_UV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for UV1
EnBlkLowV_UV1 Off - - On Enable internal low voltage level
On blocking for UV1
BlkLowVolt_UV1 0.0 - 5.0 %UB 0.1 0.5 Internal low voltage blocking level for
UV1 in % of Ubase
Operation_UV2 Off - - Off Operation UV2 Off / On
On
StartVolt_UV2 2.0 - 150.0 %UB 0.1 50.0 Operate undervoltage level for UV2 in %
of Ubase
461

CurveType_UV2 Definite time - - Definite time Selection of time delay curve type for UV2
Inverse curve A
Inverse curve B
Prog. inv. curve
tDef_UV2 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of UV2
tMin_UV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for UV2
k_UV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for UV2
EnBlkLowV_UV2 Off - - On Enable internal low voltage level
On blocking for UV2
BlkLowVolt_UV2 0.0 - 5.0 %UB 0.1 0.5 Internal low voltage blocking level for
UV2 in % of Ubase
Table 278: CVGAPC Group settings (advanced)

CurrMult_OC1 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for OC1
ResCrvType_OC1 Instantaneous - - Instantaneous Selection of reset curve type for OC1
IEC Reset
ANSI reset
tResetDef_OC1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve OC1
P_OC1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OC1
A_OC1 0.000 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OC1
B_OC1 0.000 - 99.000 - 0.001 0.000 Parameter B for customer programmable
curve for OC1
C_OC1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for OC1
PR_OC1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
TR_OC1 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer
CR_OC1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
CurrMult_OC2 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for OC2
ResCrvType_OC2 Instantaneous - - Instantaneous Selection of reset curve type for OC2
IEC Reset
ANSI reset
tResetDef_OC2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve OC2
P_OC2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OC2
A_OC2 0.000 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OC2
462

B_OC2 0.000 - 99.000 - 0.001 0.000 Parameter B for customer programmable
curve for OC2
C_OC2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
PR_OC2 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
TR_OC2 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer
CR_OC2 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
tResetDef_UC2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve UC2
ResCrvType_OV1 Instantaneous - - Instantaneous Selection of reset curve type for OV1
Frozen timer
Linearly decreased
tResetDef_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of OV1
tResetIDMT_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT curves
for OV1
A_OV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OV1
B_OV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for OV1
C_OV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for OV1
D_OV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_OV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OV1
ResCrvType_OV2 Instantaneous - - Instantaneous Selection of reset curve type for OV2
Frozen timer
Linearly decreased
tResetDef_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of OV2
tResetIDMT_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT curves
for OV2
A_OV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OV2
B_OV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for OV2
C_OV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
D_OV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_OV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OV2
ResCrvType_UV1 Instantaneous - - Instantaneous Selection of reset curve type for UV1
Frozen timer
Linearly decreased
463

tResetDef_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of UV1
tResetIDMT_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT curves
for UV1
A_UV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for UV1
B_UV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for UV1
C_UV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for UV1
D_UV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_UV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for UV1
ResCrvType_UV2 Instantaneous - - Instantaneous Selection of reset curve type for UV2
Frozen timer
Linearly decreased
tResetDef_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of UV2
tResetIDMT_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT curves
for UV2
A_UV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for UV2
B_UV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for UV2
C_UV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
D_UV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_UV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for UV2

Table 279: CVGAPC technical data
Measuring current phase1, phase2, phase3, PosSeq, -
input NegSeq, 3*ZeroSeq, MaxPh, MinPh,
UnbalancePh, phase1-phase2, phase2-
phase3, phase3-phase1, MaxPh-Ph,
MinPh-Ph, UnbalancePh-Ph
Base current (1 - 99999) A -
Measuring voltage phase1, phase2, phase3, PosSeq, - -
input NegSeq, -3*ZeroSeq, MaxPh, MinPh,
UnbalancePh, phase1-phase2, phase2-
phase3, phase3-phase1, MaxPh-Ph,
MinPh-Ph, UnbalancePh-Ph
Base voltage (0.05 - 2000.00) kV -
464

Start overcurrent, (2 - 5000)% of IBase ± 1.0% of Ir for I<Ir
step 1 and 2 ± 1.0% of I for I>Ir
Start undercurrent, (2 - 150)% of IBase ± 1.0% of Ir for I<Ir

step 1 and 2 ± 1.0% of I for I>Ir
Definite time delay (0.00 - 6000.00) s ± 0.5% ± 10 ms

Operate time start 25 ms typically at 0 to 2 x Iset -
overcurrent
Reset time start 25 ms typically at 2 to 0 x Iset -
overcurrent
Operate time start 25 ms typically at 2 to 0 x Iset -
undercurrent
Reset time start 25 ms typically at 0 to 2 x Iset -
undercurrent
See table 644 and Parameter ranges for customer defined See table 644 and table 645
table 645 characteristic no 17:
k: 0.05 - 999.00
A: 0.0000 - 999.0000
B: 0.0000 - 99.0000
C: 0.0000 - 1.0000
P: 0.0001 - 10.0000
PR: 0.005 - 3.000
TR: 0.005 - 600.000
CR: 0.1 - 10.0
Voltage level where (0.0 - 5.0)% of UBase ± 1.0% of Ur
voltage memory
takes over
Start overvoltage, (2.0 - 200.0)% of UBase ± 1.0% of Ur for U<Ur
step 1 and 2 ± 1.0% of U for U>Ur
Start undervoltage, (2.0 - 150.0)% of UBase ± 1.0% of Ur for U<Ur

step 1 and 2 ± 1.0% of U for U>Ur

overvoltage
overvoltage
Operate time start 25 ms typically 2 to 0 x Uset -
undervoltage
Reset time start 25 ms typically at 0 to 2 x Uset -
undervoltage
High and low voltage (1.0 - 200.0)% of UBase ± 1.0% of Ur for U<Ur
limit, voltage ± 1.0% of U for U>Ur
dependent operation
Directional function Settable: NonDir, forward and reverse -
Relay characteristic (-180 to +180) degrees ± 2.0 degrees
angle
Relay operate angle (1 to 90) degrees ± 2.0 degrees
Reset ratio, > 95% -
overcurrent
Reset ratio, < 105% -
undercurrent
465

Reset ratio, > 95% -
overvoltage
Reset ratio, < 105% -
undervoltage
Overcurrent:

Undercurrent:

Overvoltage:

Undervoltage:
466
Secondary system supervision
Section 11 Secondary system supervision
About this chapter

This chapter describes functions like Current circuit supervision and Fuse failure
supervision. The way the functions work, their setting parameters, function blocks,
input and output signals and technical data are included for each function.
11.1 Current circuit supervision CCSRDIF

Current circuit supervision CCSRDIF - 87
11.1.1 Introduction
Open or short circuited current transformer cores can cause unwanted operation of
many protection functions such as differential, earth-fault current and negative-
sequence current functions.
It must be remembered that a blocking of protection functions at an occurrence of

open CT circuit will mean that the situation will remain and extremely high
voltages will stress the secondary circuit.
Current circuit supervision (CCSRDIF) compares the residual current from a three
phase set of current transformer cores with the neutral point current on a separate
input taken from another set of cores on the current transformer.
A detection of a difference indicates a fault in the circuit and is used as alarm or to

block protection functions expected to give unwanted tripping.

Current circuit supervision CCSRDIF compares the absolute value of the vectorial
sum of the three phase currents |ΣIphase| and the numerical value of the residual
current |Iref| from another current transformer set, see figure 255.
The FAIL output will be set to a logical one when the following criteria are fulfilled:
467
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of
the numerical value of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than
the set operate value IMinOp.
• No phase current has exceeded Ip>Block during the last 10 ms.
• CCSRDIF is enabled by setting Operation = On.
The FAIL output remains activated 100 ms after the AND-gate resets when being
activated for more than 20 ms. If the FAIL lasts for more than 150 ms an ALARM
will be issued. In this case the FAIL and ALARM will remain activated 1 s after
the AND-gate resets. This prevents unwanted resetting of the blocking function
when phase current supervision element(s) operate, for example, during a fault.
IEC05000463 V1 EN
Figure 255: Simplified logic diagram for Current circuit supervision CCSRDIF
The operate characteristic is percentage restrained, see figure 256.
468
| åI phase | - | I ref |
Slope = 1
Operation
Slope = 0.8
area
I MinOp
| åI phase | + | I ref |
99000068.vsd
IEC99000068 V1 EN
Figure 256: Operate characteristics
Due to the formulas for the axis compared, |SIphase | - |I ref | and |S
I phase | + | I ref | respectively, the slope can not be above 2.

CCSRDIF
I3P* FAIL
IREF* ALARM
BLOCK
IEC05000389 V2 EN
Figure 257: CCSRDIF function block

Table 280: CCSRDIF Input signals
I3P GROUP - Group signal for three phase current input
SIGNAL
IREF GROUP - TBD
SIGNAL
469
Table 281: CCSRDIF Output signals

FAIL BOOLEAN Detection of current circuit failure
ALARM BOOLEAN Alarm for current circuit failure

Table 282: CCSRDIF Group settings (basic)
On
IBase 1 - 99999 A 1 3000 IBase value for current level detectors
IMinOp 5 - 200 %IB 1 20 Minimum operate current differential
level in % of IBase
Table 283: CCSRDIF Group settings (advanced)

Ip>Block 5 - 500 %IB 1 150 Block of the function at high phase
current, in % of IBase

Table 284: CCSRDIF technical data
Operate current (5-200)% of Ir ± 10.0% of Ir at I £ Ir
± 10.0% of I at I > Ir
Block current (5-500)% of Ir ± 5.0% of Ir at I £ Ir

± 5.0% of I at I > Ir
11.2 Fuse failure supervision SDDRFUF

Fuse failure supervision SDDRFUF - -
11.2.1 Introduction
The aim of the fuse failure supervision function (SDDRFUF) is to block voltage
measuring functions at failures in the secondary circuits between the voltage
470
transformer and the IED in order to avoid unwanted operations that otherwise
might occur.
The fuse failure supervision function basically has two different algorithms,
negative sequence and zero sequence based algorithm and an additional delta
voltage and delta current algorithm.
The negative sequence detection algorithm is recommended for IEDs used in

isolated or high-impedance earthed networks. It is based on the negative-sequence
measuring quantities, a high value of voltage 3U2 without the presence of the
negative-sequence current 3I2.
The zero sequence detection algorithm is recommended for IEDs used in directly
or low impedance earthed networks. It is based on the zero sequence measuring
quantities, a high value of voltage 3U0 without the presence of the residual current
3I0.
A criterion based on delta current and delta voltage measurements can be added to
the fuse failure supervision function in order to detect a three phase fuse failure,
which in practice is more associated with voltage transformer switching during
station operations.
For better adaptation to system requirements, an operation mode setting has been
introduced which makes it possible to select the operating conditions for negative
sequence and zero sequence based function. The selection of different operation
modes makes it possible to choose different interaction possibilities between the
negative sequence and zero sequence based algorithm.
11.2.2.1 Zero and negative sequence detection
The zero and negative sequence function continuously measures the currents and
voltages in all three phases and calculates, see figure 258:
• the zero-sequence voltage 3U0

• the zero-sequence current 3I0
• the negative sequence current 3I2
• the negative sequence voltage 3U2
The measured signals are compared with their respective set values 3U0< and
3I0>, 3U2< and 3I2>.
The function enable the internal signal FuseFailDetZeroSeq if the measured zero-
sequence voltage is higher than the set value 3U0> and the measured zero-
sequence current is below the set value 3I0<.
471
The function enable the internal signal FuseFailDetNegSeq if the measured

negative sequence voltage is higher than the set value 3U2> and the measured
negative sequence current is below the set value 3I2<.
A drop off delay of 100 ms for the measured zero-sequence and negative sequence
current will prevent a false fuse failure detection at un-equal breaker opening at the
two line ends.
Sequence Detection
3I0< CurrZeroSeq
IL1
Zero 3I0
sequence
filter 100 ms CurrNegSeq
a
IL2 a>b t
b
Negative 3I2
sequence
IL3 filter FuseFailDetZeroSeq
AND
100 ms
a
a>b t
3I2
VoltZeroSeq
UL1
Zero
sequence a 3U0
a>b
b
filter
UL2 VoltNegSeq
Negative
sequence a 3U2
a>b
UL3 filter b
3U2>
IEC10000036 V1 EN
Figure 258: Simplified logic diagram for sequence detection part
The calculated values 3U0, 3I0, 3I2 and 3U2 are available as service values on local
HMI and monitoring tool in PCM600.
Input and output signals

The output signals 3PH, BLKU and BLKZ can be blocked in the following conditions:
• The input BLOCK is activated

• The input BLKTRIP is activated at the same time as the internal signal
fufailStarted is not present
• The operation mode selector OpMode is set to Off.
• The IED is in TEST status (TEST-ACTIVE is high) and the function has been
blocked from the HMI (BlockFUSE=Yes)
The input BLOCK signal is a general purpose blocking signal of the fuse failure
supervision function. It can be connected to a binary input of the IED in order to
receive a block command from external devices or can be software connected to
other internal functions of the IED itself in order to receive a block command from
472
internal functions. Through OR gate it can be connected to both binary inputs and
internal function outputs.
The input BLKSP is intended to be connected to the trip output at any of the
protection functions included in the IED. When activated for more than 20 ms, the
operation of the fuse failure is blocked during a fixed time of 100 ms. The aim is to
increase the security against unwanted operations during the opening of the
breaker, which might cause unbalance conditions for which the fuse failure might
operate.
The output signal BLKZ will also be blocked if the internal dead line detection is
activated. The block signal has a 200 ms drop-off time delay.
The input signal MCBOP is supposed to be connected via a terminal binary input
to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT
secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in
order to block all the voltage related functions when the MCB is open independent
of the setting of OpMode selector. The additional drop-off timer of 150 ms
prolongs the presence of MCBOP signal to prevent the unwanted operation of
voltage dependent function due to non simultaneous closing of the main contacts of
the miniature circuit breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input
to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the
output signal BLKU in order to block the voltage related functions when the line
disconnector is open. The impedance protection function is not affected by the
position of the line disconnector since there will be no line currents that can cause
maloperation of the distance protection. If DISCPOS=0 it signifies that the line is
connected to the system and when the DISCPOS=1 it signifies that the line is
disconnected from the system and the block signal BLKU is generated.
The output BLKU can be used for blocking the voltage related measuring functions
(undervoltage protection, synchro-check etc.) except for the impedance protection.
The function output BLKZ can be used for blocking the impedance protection
function.
The BLKZ will only be activated if not the internal dead line detection is activated
at the same time.
The fuse failure condition is unlatched when the normal voltage conditions are
restored.
When the output 3PH is activated, all three voltage are low.
11.2.2.2 Delta current and delta voltage detection
A simplified diagram for the functionality is found in figure 259. The calculation of
the change is based on vector change which means that it detects both amplitude
and phase angle changes. The calculated delta quantities are compared with their
473
respective set values DI< and DU> and the algorithm, detects a fuse failure if a
sufficient change in voltage without a sufficient change in current is detected in
each phase separately. The following quantities are calculated in all three phases:
• The change in voltage DU

• The change in current DI
The internal FuseFailDetDUDI signal is activated if the following conditions are

fulfilled for a phase:
• The magnitude of the phase-ground voltage has been above UPh> for more
than 1.5 cycle
• The magnitude of DU is higher than the corresponding setting DU>
• The magnitude of DI is below the setting DI>
and at least one of the following conditions are fulfilled:
• The magnitude of the phase current in the same phase is higher than the setting
IPh>
• The circuit breaker is closed (CBCLOSED = True)
The first criterion means that detection of failure in one phase together with high
current for the same phase will set the output. The measured phase current is used
to reduce the risk of false fuse failure detection. If the current on the protected line
is low, a voltage drop in the system (not caused by fuse failure) is not by certain
followed by current change and a false fuse failure might occur
The second criterion requires that the delta condition shall be fulfilled in any phase
at the same time as circuit breaker is closed. Opening circuit breaker at one end and
energizing the line from other end onto a fault could lead to wrong start of the fuse
failure function at the end with the open breaker. If this is considering to be an
important disadvantage, connect the CBCLOSED input to FALSE. In this way
only the first criterion can activate the delta function.
474
DUDI Detection
DUDI detection Phase 1
IL1 One cycle
delay
|DI|
a
a>b
DIb AND
DU> b
20 ms 1.5 cycle
a
a>b t t
UPh> b
IL2 DUDI detection Phase 2

UL2
Same logic as for phase 1
IL3 DUDI detection Phase 3

UL3
Same logic as for phase 1
UL1
a
ab
IPh> b AND
OR AND
CBCLOSED AND OR
UL2
a
ab
b AND
OR AND
AND OR
UL3
a
ab
b AND
OR AND FuseFailDetDUDI
AND OR
OR
IEC10000034 V1 EN
Figure 259: Simplified logic diagram for DU/DI detection part
475
11.2.2.3 Dead line detection
A simplified diagram for the functionality is found in figure 260. A dead phase
condition is indicated if both the voltage and the current in one phase is below their
respective setting values UDLD< and IDLD<. If at least one phase is considered to
be dead the output DLD1PH and the internal signal DeadLineDet1Ph is activated.
If all three phases are considered to be dead the output DLD3PH is activated
Dead Line Detection

IL1
a
a<b AllCurrLow
b
AND
IL2
a
a<b
b
IL3
a
a<b
b
IDLD<
DeadLineDet1Ph
UL1
a AND
a<b
b OR DLD1PH
AND
UL2
a AND
a<b
b
AND DLD3PH
UL3 AND
a AND
a<b
b
UDLD<
intBlock
IEC10000035 V1 EN
Figure 260: Simplified logic diagram for Dead Line detection part
11.2.2.4 Main logic
A simplified diagram for the functionality is found in figure 261. The fuse failure
supervision function (SDDRFUF) can be switched on or off by the setting
parameter Operation to On or Off.
For increased flexibility and adaptation to system requirements an operation mode

selector, OpMode, has been introduced to make it possible to select different
operating modes for the negative and zero sequence based algorithms. The
different operation modes are:
• Off; The negative and zero sequence function is switched off

• UNsINs; Negative sequence is selected
• UZsIZs; Zero sequence is selected
476
• UZsIZsORUNsINs; Both negative and zero sequence is activated and working

in parallel in an OR-condition
• UZsIZs AND UNsINs; Both negative and zero sequence is activated and
working in series (AND-condition for operation)
• OptimZsNs; Optimum of negative and zero sequence (the function that has the
highest magnitude of measured negative and zero sequence current will be
activated)
The delta function can be activated by setting the parameter OpDUDI to On. When
selected it operates in parallel with the sequence based algorithms.
As soon as any fuse failure situation is detected, signals FuseFailDetZeroSeq,

FuseFailDetNegSeq or FuseFailDetDUDI, and the specific functionality is
released, the function will activate the output signal BLKU. The output signal
BLKZ will be activated as well if not the internal dead phase detection,
DeadLineDet1Ph, is activated at the same time. The output BLKU can be used for
blocking voltage related measuring functions (under voltage protection, synchro-
check, and so on). For blocking of impedance protection functions output BLKZ
shall be used.
If the fuse failure situation is present for more than 5 seconds and the setting
parameter SealIn is set to On it will be sealed in over under-voltage as long as at
least one phase voltages is below the set value USealIn<. This will keep the BLKU
and BLKZ signals activated as long as any phase voltage is below the set value
USealIn<. If all three phase voltages drop below the set value USealIn< and the
setting parameter SealIn is set to On also the output signal 3PH will be activated.
The signals 3PH, BLKU and BLKZ signals will now be active as long as any phase
voltage is below the set value USealIn<.
If SealIn is set to On fuse failure condition is stored in the non volatile memory in
the IED. At start-up (due to auxiliary power interruption or re-start due to
configuration change) the IED checks the stored value in its non volatile memory
and re-establishes the conditions present before the shut down. All phase voltages
must became above USealIn< before fuse failure is de-activated and inhibits the
block of different protection functions.
The output signal BLKU will also be active if all phase voltages have been above
the setting USealIn< for more than 60 seconds, the zero or negative sequence
voltage has been above the set value 3U0> and 3U2> for more than 5 seconds, all
phase currents are below the setting IDLD< (operate level for dead line detection)
and the circuit breaker is closed (input CBCLOSED is activated).
The input signal MCBOP is supposed to be connected via a terminal binary input
to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT
secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in
order to block all the voltage related functions when the MCB is open independent
of the setting of OpMode or OpDUDI. An additional drop-out timer of 150 ms
prolongs the presence of MCBOP signal to prevent the unwanted operation of
477
voltage dependent function due to non simultaneous closing of the main contacts of
the miniature circuit breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input
to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the
output signal BLKU in order to block the voltage related functions when the line
disconnector is open. The impedance protection function does not have to be
affected since there will be no line currents that can cause malfunction of the
distance protection.
The output signals 3PH, BLKU and BLKZ as well as the signals DLD1PH and
DLD3PH from dead line detections are blocked if any of the following conditions
occur:
• The operation mode selector OpMode is set to Off

• The input BLOCK is activated
• The IED is in TEST status (TEST-ACTIVE is high) and the function has been
blocked from the HMI (BlockFUSE=Yes)
The input BLOCK is a general purpose blocking signal of the fuse failure
supervision function. It can be connected to a binary input of the IED in order to
receive a block command from external devices or can be software connected to
other internal functions of the IED. Through OR gate it can be connected to both
binary inputs and internal function outputs.
The input BLKTRIP is intended to be connected to the trip output of any of the
protection functions included in the IED and/or trip from external equipments via
binary inputs. When activated for more than 20 ms without any fuse fail detected,
the operation of the fuse failure is blocked during a fixed time of 100 ms. The aim
is to increase the security against unwanted operations during the opening of the
breaker, which might cause unbalance conditions for which the fuse failure might
operate.
478
Fuse failure detection

Main logic
TEST
TEST ACTIVE
AND
BlocFuse = Yes
BLOCK intBlock
OR
BLKTRIP 20 ms 100 ms
AND t t
All UL < USealIn<

OR
AND
3PH
AND
SealIn = On AND
AND
Any UL < UsealIn<
FuseFailDetDUDI
AND 5s
OpDUDI = On
OR t
FuseFailDetZeroSeq
AND
AND
FuseFailDetNegSeq
AND
UNsINs OR
UZsIZs OR
UZsIZs OR UNsINs
OpMode
UZsIZs AND UNsINs
OptimZsNs
OR
CurrZeroSeq
a AND
CurrNegSeq a>b
b
AND
200 ms
DeadLineDet1Ph AND BLKZ
t OR AND
150 ms
MCBOP t
AND BLKU
60 sec
t OR OR
All UL > UsealIn<
AND
VoltZeroSeq 5 sec
VoltNegSeq OR t
AllCurrLow
CBCLOSED
DISCPOS
IEC10000033 V1 EN
Figure 261: Simplified logic diagram for fuse failure supervision function, Main
logic
479

SDDRFUF
I3P* BLKZ
U3P* BLKU
BLOCK 3PH
CBCLOSED DLD1PH
MCBOP DLD3PH
DISCPOS
BLKTRIP
IEC05000700 V3 EN
Figure 262: SDDRFUF function block

Table 285: SDDRFUF Input signals
SIGNAL
SIGNAL
CBCLOSED BOOLEAN 0 Active when circuit breaker is closed
MCBOP BOOLEAN 0 Active when external MCB opens protected
voltage circuit
DISCPOS BOOLEAN 0 Active when line disconnector is open
BLKTRIP BOOLEAN 0 Blocks operation of function when active
Table 286: SDDRFUF Output signals

BLKZ BOOLEAN Start of current and voltage controlled function
BLKU BOOLEAN General start of function
3PH BOOLEAN Three-phase start of function
DLD1PH BOOLEAN Dead line condition in at least one phase
DLD3PH BOOLEAN Dead line condition in all three phases

Table 287: SDDRFUF Group settings (basic)
On
480

OpMode Off - - UZsIZs Operating mode selection
UNsINs
UZsIZs
UZsIZs OR UNsINs
UZsIZs AND
UNsINs
OptimZsNs
3U0> 1 - 100 %UB 1 30 Operate level of residual overvoltage
element in % of UBase
3I0< 1 - 100 %IB 1 10 Operate level of residual undercurrent
element in % of IBase
3U2> 1 - 100 %UB 1 30 Operate level of neg seq overvoltage
element in % of UBase
3I2< 1 - 100 %IB 1 10 Operate level of neg seq undercurrent
element in % of IBase
OpDUDI Off - - Off Operation of change based function Off/
On On
DU> 1 - 100 %UB 1 60 Operate level of change in phase voltage
in % of UBase
DI< 1 - 100 %IB 1 15 Operate level of change in phase current
in % of IBase
UPh> 1 - 100 %UB 1 70 Operate level of phase voltage in % of
UBase
IPh> 1 - 100 %IB 1 10 Operate level of phase current in % of
IBase
SealIn Off - - On Seal in functionality Off/On
On
USealln< 1 - 100 %UB 1 70 Operate level of seal-in phase voltage in
% of UBase
IDLD< 1 - 100 %IB 1 5 Operate level for open phase current
detection in % of IBase
UDLD< 1 - 100 %UB 1 60 Operate level for open phase voltage
detection in % of UBase

Table 288: SDDRFUF technical data
Operate voltage, zero sequence (1-100)% of UBase ± 1.0% of Ur
Operate current, zero sequence (1–100)% of IBase ± 1.0% of Ir
Operate voltage, negative sequence (1–100)% of UBase ± 1.0% of Ur
Operate current, negative sequence (1–100)% of IBase ± 1.0% of Ir
Operate voltage change level (1–100)% of UBase ± 5.0% of Ur
Operate current change level (1–100)% of IBase ± 5.0% of Ir
481
482
Control
Section 12 Control
About this chapter

This chapter describes the control functions. The way the functions work, their
setting parameters, function blocks, input and output signals and technical data are
included for each function.
12.1 Synchrocheck, energizing check, and synchronizing

SESRSYN

Synchrocheck, energizing check, and SESRSYN 25
synchronizing
sc/vc
SYMBOL-M V1 EN
12.1.1 Introduction
The Synchronizing function allows closing of asynchronous networks at the correct
moment including the breaker closing time. The systems can thus be reconnected
after an autoreclose or manual closing, which improves the network stability.
Synchrocheck, energizing check (SESRSYN) function checks that the voltages on

both sides of the circuit breaker are in synchronism, or with at least one side dead
to ensure that closing can be done safely.
SESRSYN function includes a built-in voltage selection scheme for double bus and
1½ breaker or ring busbar arrangements.
Manual closing as well as automatic reclosing can be checked by the function and
can have different settings.
For systems which are running asynchronous a synchronizing function is provided.

The main purpose of the synchronizing function is to provide controlled closing of
circuit breakers when two asynchronous systems are going to be connected. It is
used for slip frequencies that are larger than those for synchrocheck and lower than
a set maximum level for the synchronizing function.
483
Control
12.1.2.1 Basic functionality
The synchrocheck function measures the conditions across the circuit breaker and
compares them to set limits. The output is only given when all measured quantities
are simultaneously within their set limits.
The energizing check function measures the bus and line voltages and compares
them to both high and low threshold detectors. The output is given only when the
actual measured quantities match the set conditions.
The synchronizing function measures the conditions across the circuit breaker, and
also determines the angle change occurring during the closing delay of the circuit
breaker, from the measured slip frequency. The output is given only when all
measured conditions are simultaneously within their set limits. The issue of the
output is timed to give closure at the optimal time including the time for the circuit
breaker and the closing circuit.
For single circuit breaker and 1½ breaker circuit breaker arrangements, the
SESRSYN function blocks have the capability to make the necessary voltage
selection. For single circuit breaker arrangements, selection of the correct voltage
is made using auxiliary contacts of the bus disconnectors. For 1½ breaker circuit
breaker arrangements, correct voltage selection is made using auxiliary contacts of
the bus disconnectors as well as the circuit breakers.
The internal logic for each function block as well as, the input and outputs, and the
setting parameters with default setting and setting ranges is described in this
document. For application related information, please refer to the application manual.
12.1.2.2 Logic diagrams
Logic diagrams
The logic diagrams that follow illustrate the main principles of the synchronizing
function components such as Synchrocheck, Energizing check and Voltage
selection, and are intended to simplify the understanding of the function.
Synchrocheck
The voltage difference, frequency difference and phase angle difference values are
measured in the IED centrally and are available for the synchrocheck function for
evaluation. If the bus voltage is connected as phase-phase and the line voltage as
phase-neutral (or the opposite), this need to be compensated. This is done with a
setting, which scales up the line voltage to a level equal to the bus voltage.
When the function is set to OperationSC = On, the measuring will start.
The function will compare the bus and line voltage values with the set values for
UHighBusSC and UHighLineSC.
484
Control
If both sides are higher than the set values, the measured values are compared with
the set values for acceptable frequency, phase angle and voltage difference:
FreqDiff, PhaseDiff and UDiff. If a compensation factor is set due to the use of
different voltages on the bus and line, the factor is deducted from the line voltage
before the comparison of the phase angle values.
The frequency on both sides of the circuit breaker is also measured. The
frequencies must not deviate from the rated frequency more than +/-5Hz. The
frequency difference between the bus frequency and the line frequency is measured
and may not exceed the set value.
Two sets of settings for frequency difference and phase angle difference are
available and used for the manual closing and autoreclose functions respectively, as
required.
The inputs BLOCK and BLKSC are available for total block of the complete
Synchrocheck function and block of the Synchrocheck function respectively. Input
TSTSC will allow testing of the function where the fulfilled conditions are
connected to a separate test output.
The outputs MANSYOK and AUTOSYOK are activated when the actual measured
conditions match the set conditions for the respective output. The output signal can
be delayed independently for MANSYOK and AUTOSYOK conditions.
A number of outputs are available as information about fulfilled checking

conditions. UOKSC shows that the voltages are high, UDIFFSC, FRDIFFA,
FRDIFFM, PHDIFFA, PHDIFFM shows when the voltage difference, frequency
difference and phase angle difference conditions are met.
485
Control
Note! Similar logic for Manual Synchrocheck.
OperationSC = On
AND TSTAUTSY
AND
TSTSC
BLKSC AND
BLOCK OR
AUTOSYOK
AND
0-60 s
AND t
tSCA
UDiffSC 50 ms
AND t
UHighBusSC
UOKSC
AND
UHighLineSC
UDIFFSC
1
FRDIFFA
FreqDiffA 1
PHDIFFA
PhaseDiffA 1
UDIFFME
voltageDifferenceValue
FRDIFFME
frequencyDifferenceValue
PHDIFFME
phaseAngleDifferenceValue
IEC07000114 V2 EN
Figure 263: Simplified logic diagram for the Synchrocheck function
Synchronizing
When the function is set to OperationSynch = On the measuring will be performed.
The function will compare the values for the bus and line voltage with the set
values for UHighBusSynch and UHighLineSynch, which is a supervision that the
voltages are both live. If both sides are higher than the set values the measured
values are compared with the set values for acceptable frequency, rate of change of
frequency, phase angle and voltage difference FreqDiffMax, FreqDiffMin and
UDiffSynch.
Measured frequencies between the settings for the maximum and minimum
frequency will initiate the measuring and the evaluation of the angle change to
allow operation to be sent in the right moment including the set tBreaker time.
There is a phase angle release internally to block any incorrect closing pulses. At
operation the SYNOK output will be activated with a pulse tClosePulse and the
function reset. The function will also reset if the synchronizing conditions are not
fulfilled within the set tMaxSynch time. This prevents that the functions are, by
mistake, maintained in operation for a long time, waiting for conditions to be fulfilled.
486
Control
The inputs BLOCK and BLKSYNCH are available for total block of the complete
function respective of the synchronizing part. TSTSYNCH will allow testing of the
function where the fulfilled conditions are connected to a separate output.
SYN1
OPERATION SYNCH
OFF
ON
TEST MODE
OFF
ON
STARTSYN SYNPROGR
AND
AND
S
BLKSYNCH
OR R
UDiffSynch
50 ms SYNOK
AND
UHighBusSynch AND t
UHighLineSynch OR
FreqDiffMax
AND
TSTSYNOK
FreqDiffMin OR
tClose
FreqRateChange Pulse
AND
fBus&fLine ± 5 Hz tMax
AND
Synch
PhaseDiff < 15 deg SYNFAIL
PhaseDiff=closing angle
IEC06000636 V2 EN
Figure 264: Simplified logic diagram for the synchronizing function
Energizing check
Voltage values are measured in the IED centrally and are available for evaluation
by the Energizing check function. If the bus voltage is connected as phase-phase
and the line voltage as phase-neutral, (or the opposite) this needs to be
compensated. This is done with a setting, which scales the line voltage to a level
equal to the bus voltage.
The function measures voltages on the busbar and the line to verify whether they
are live or dead. This is done by comparing with the set values UHighBusEnerg
and ULowBusEnerg for bus energizing and UHighLineEnerg and ULowLineEnerg
for line energizing.
The frequency on both sides of the circuit breaker is also measured. The
frequencies must not deviate from the rated frequency more than +/-5Hz. The
frequency difference between the bus frequency and the line frequency is measured
and shall not exceed a set value.
487
Control
The Energizing direction can be selected individually for the Manual and the
Automatic functions respectively. When the conditions are met the outputs
AUTOENOK and MANENOK respectively will be activated if the fuse
supervision conditions are fulfilled. The output signal can be delayed
independently for MANENOK and AUTOENOK conditions. The Energizing
direction can also be selected by an integer input AENMODE respective
MENMODE, which for example, can be connected to a Binary to Integer function
block (B16I). Integers supplied shall be 1=off, 2=DLLB, 3=DBLL and 4= Both.
Not connected input with connection of INTZERO output from Fixed Signals
(FIXDSIGN) function block will mean that the setting is done from Parameter
Setting tool. The active position can be read on outputs MODEAEN resp
MODEMEN. The modes are 0=OFF, 1=DLLB, 2=DBLL and 3=Both.
The inputs BLOCK and BLKENERG are available for total block of the complete
Synchronizing function respective block of the Energizing check function.
TSTENERG will allow testing of the function where the fulfilled conditions are
connected to a separate test output.
Voltage selection
The voltage selection module including supervision of included voltage
transformer fuses for the different arrangements is a basic part of the
Synchronizing function and determines the parameters fed to the Synchronizing,
Synchrocheck and Energizing check functions. This includes the selection of the
appropriate Line and Bus voltages and fuse supervision.
The voltage selection type to be used is set with the parameter CBConfig.
If No voltage sel. is set the default voltages used will be ULine1 and UBus1. This
is also the case when external voltage selection is provided. Fuse failure
supervision for the used inputs must also be connected.
The voltage selection function, selected voltages, and fuse conditions are the
Synchronizing, Synchrocheck and Energizing check inputs.
For the disconnector positions it is advisable to use (NO) a and (NC) b type
contacts to supply Disconnector Open and Closed positions but, it is also possible
to use an inverter for one of the positions.
Voltage selection for a single circuit breaker with double busbars

This function uses the binary input from the disconnectors auxiliary contacts
B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select
between bus 1 and bus 2 voltages. If the disconnector connected to bus 2 is closed
and the disconnector connected to bus 1 is opened the bus 2 voltage is used. All
other combinations use the bus 1 voltage. The Outputs B1SEL and B2SEL
respectively indicate the selected Bus voltage.
The function checks the fuse-failure signals for bus 1, bus 2 and line voltage
transformers. Inputs UB1OK-UB1FF supervise the fuse for Bus 1 and UB2OK-
UB2FF supervises the fuse for Bus 2. ULN1OK-ULN1FF supervises the fuse for
the Line voltage transformer. The inputs fail (FF) or healthy (OK) can alternatively
488
Control
be used dependent on the available signal. If a fuse-failure is detected in the

selected voltage source an output signal USELFAIL is set. This output signal is
true if the selected bus or line voltages have a fuse failure. This output as well as
the function can be blocked with the input signal BLOCK. The function logic
diagram is shown in figure 265.
B1QOPEN
B1SEL
B1QCLD AND
B2QOPEN B2SEL
1
B2QCLD AND
AND invalidSelection
bus1Voltage
busVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR
AND selectedFuseOK
UB2OK AND
UB2FF OR USELFAIL
AND
ULN1OK
ULN1FF OR
BLOCK
en05000779.vsd
IEC05000779 V1 EN
Figure 265: Logic diagram for the voltage selection function of a single circuit breaker with double busbars
Voltage selection for a 1 1/2 circuit breaker arrangement

Note that with 1½ breaker schemes two Synchrocheck functions must be used in
the IED (three for two IEDs in a complete bay). Below, the scheme for one Bus
breaker and the Tie breakers is described.
This voltage selection function uses the binary inputs from the disconnectors and
circuit breakers auxiliary contacts to select the right voltage for the Synchrocheck
(Synchronism and Energizing check) function. For the bus circuit breaker one side
of the circuit breaker is connected to the busbar and the other side is connected
either to line 1, line 2 or the other busbar depending on the arrangement.
Inputs LN1QOPEN-LN1QCLD, B1QOPEN-B1QCLD, B2QOPEN-B2QCLD,

LN2QOPEN-LN2QCLD are inputs for the position of the Line disconnectors
489
Control
respectively the Bus and Tie breakers. The Outputs LN1SEL, LN2SEL and B2SEL
will give indication of the selected Line voltage as a reference to the fixed Bus 1
voltage.
The fuse supervision is connected to ULNOK-ULNFF, and with alternative

Healthy or Failing fuse signals depending on what is available for each of fuse (MCB).
The tie circuit breaker is connected either to bus 1 or line 1 on one side and the
other side is connected either to bus 2 or line 2. Four different output combinations
are possible, bus to bus, bus to line, line to bus and line to line.
• The line 1 voltage is selected if the line 1 disconnector is closed.

• The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1
circuit breaker is closed.
• The line 2 voltage is selected if the line 2 disconnector is closed.
• The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2
Circuit breaker is closed.
The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2.
If a fuse-failure is detected in the selected voltage an output signal USELFAIL is
set. This output signal is true if the selected bus or line voltages have a fuse failure.
This output as well as the function can be blocked with the input signal BLOCK.
The function block diagram for the voltage selection of a bus circuit breaker is
shown in figure 266 and for the tie circuit breaker in figure 267
490
Control
LN1QOPEN
AND
LN1SEL
LN1QCLD
B1QOPEN
LN2SEL
B1QCLD AND AND
OR
B2SEL
LN2QOPEN
LN2QCLD AND
AND invalidSelection
AND
B2QOPEN
B2QCLD AND
line1Voltage
lineVoltage
line2Voltage
bus2Voltage
UB1OK
UB1FF OR
OR
UB2OK AND
AND selectedFuseOK
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000780.vsd
IEC05000780 V1 EN
Figure 266: Simplified logic diagram for the voltage selection function for a bus circuit breaker in a 1 1/2
breaker arrangement
491
Control
LN1QOPEN
LN1SEL
LN1QCLD AND
B1SEL
1
B1QOPEN AND
AND
B1QCLD AND
line1Voltage
busVoltage
bus1Voltage
LN2QOPEN
LN2SEL
LN2QCLD AND
B2SEL
1
OR invalidSelection
B2QOPEN AND
AND
B2QCLD AND
line2Voltage
lineVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR
UB2OK AND selectedFuseOK
AND
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000781.vsd
IEC05000781 V1 EN
Figure 267: Simplified logic diagram for the voltage selection function for the tie circuit breaker in 1 1/2
breaker arrangement.
Fuse failure supervision

External fuse failure signals or signals from a tripped fuse switch/MCB are
connected to binary inputs that are configured to the inputs of the synchronizing
functions in the IED. Alternatively, the internal signals from fuse failure
supervision can be used when available. There are two alternative connection
possibilities. Inputs labelled OK must be connected if the available contact
indicates that the voltage circuit is healthy. Inputs labelled FF must be connected if
the available contact indicates that the voltage circuit is faulty.
492
Control
The UB1OK/UB2OK and UB1FF/UB2FF inputs are related to the busbar voltage
and the ULN1OK/ULN2OK and ULN1FF/ULN2FF inputs are related to the line
voltage. Configure them to the binary input or function outputs that indicate the
status of the external fuse failure of the busbar and line voltages. In the event of a
fuse failure, the energizing check functions are blocked. The synchronizing and the
synchrocheck function requires full voltage on both sides and will be blocked
automatically in the event of fuse failures.

SESRSYN
U3PBB1* SYNOK
U3PBB2* AUTOSYOK
U3PLN1* AUTOENOK
U3PLN2* MANSYOK
BLOCK MANENOK
BLKSYNCH TSTSYNOK
BLKSC TSTAUTSY
BLKENERG TSTMANSY
B1QOPEN TSTENOK
B1QCLD USELFAIL
B2QOPEN B1SEL
B2QCLD B2SEL
LN1QOPEN LN1SEL
LN1QCLD LN2SEL
LN2QOPEN SYNPROGR
LN2QCLD SYNFAIL
UB1OK UOKSYN
UB1FF UDIFFSYN
UB2OK FRDIFSYN
UB2FF FRDIFFOK
ULN1OK FRDERIVA
ULN1FF UOKSC
ULN2OK UDIFFSC
ULN2FF FRDIFFA
STARTSYN PHDIFFA
TSTSYNCH FRDIFFM
TSTSC PHDIFFM
TSTENERG UDIFFME
AENMODE FRDIFFME
MENMODE PHDIFFME
MODEAEN
MODEMEN
IEC06000534 V2 EN
Figure 268: SESRSYN function block

Table 289: SESRSYN Input signals
U3PBB1 GROUP - Group signal for voltage input busbar 1
SIGNAL
U3PBB2 GROUP - Group signal for voltage input busbar 2
SIGNAL
U3PLN1 GROUP - Group signal for voltage input line 1
SIGNAL
U3PLN2 GROUP - Group signal for voltage input line 2
SIGNAL
493
Control

BLOCK BOOLEAN 0 General block
BLKSYNCH BOOLEAN 0 Block synchronizing
BLKSC BOOLEAN 0 Block synchro check
BLKENERG BOOLEAN 0 Block energizing check
B1QOPEN BOOLEAN 0 Open status for CB or disconnector connected to
bus1
B1QCLD BOOLEAN 0 Close status for CB or disconnector connected to
bus1
B2QOPEN BOOLEAN 0 Open status for CB or disconnector connected to
bus2
B2QCLD BOOLEAN 0 Close status for CB or disconnector connected to
bus2
LN1QOPEN BOOLEAN 0 Open status for CB or disconnector connected to
line1
LN1QCLD BOOLEAN 0 Close status for CB or disconnector connected to
line1
LN2QOPEN BOOLEAN 0 Open status for CB or disconnector connected to
line2
LN2QCLD BOOLEAN 0 Close status for CB or disconnector connected to
line2
UB1OK BOOLEAN 0 Bus1 voltage transformer OK
UB1FF BOOLEAN 0 Bus1 voltage transformer fuse failure
UB2OK BOOLEAN 0 Bus2 voltage transformer OK
UB2FF BOOLEAN 0 Bus2 voltage transformer fuse failure
ULN1OK BOOLEAN 0 Line1 voltage transformer OK
ULN1FF BOOLEAN 0 Line1 voltage transformer fuse failure
ULN2OK BOOLEAN 0 Line2 voltage transformer OK
ULN2FF BOOLEAN 0 Line2 voltage transformer fuse failure
STARTSYN BOOLEAN 0 Start synchronizing
TSTSYNCH BOOLEAN 0 Set synchronizing in test mode
TSTSC BOOLEAN 0 Set synchro check in test mode
TSTENERG BOOLEAN 0 Set energizing check in test mode
AENMODE INTEGER 0 Input for setting of automatic energizing mode
MENMODE INTEGER 0 Input for setting of manual energizing mode
Table 290: SESRSYN Output signals

SYNOK BOOLEAN Synchronizing OK output
AUTOSYOK BOOLEAN Auto synchro check OK
AUTOENOK BOOLEAN Automatic energizing check OK
MANSYOK BOOLEAN Manual synchro check OK
MANENOK BOOLEAN Manual energizing check OK
494
Control

TSTSYNOK BOOLEAN Synchronizing OK test output
TSTAUTSY BOOLEAN Auto synchro check OK test output
TSTMANSY BOOLEAN Manual synchro check OK test output
TSTENOK BOOLEAN Energizing check OK test output
USELFAIL BOOLEAN Selected voltage transformer fuse failed
B1SEL BOOLEAN Bus1 selected
B2SEL BOOLEAN Bus2 selected
LN1SEL BOOLEAN Line1 selected
LN2SEL BOOLEAN Line2 selected
SYNPROGR BOOLEAN Synchronizing in progress
SYNFAIL BOOLEAN Synchronizing failed
UOKSYN BOOLEAN Voltage amplitudes for synchronizing above set
limits
UDIFFSYN BOOLEAN Voltage difference out of limit for synchronizing
FRDIFSYN BOOLEAN Frequency difference out of limit for synchronizing
FRDIFFOK BOOLEAN Frequency difference in band for synchronizing
FRDERIVA BOOLEAN Frequency derivative out of limit for synchronizing
UOKSC BOOLEAN Voltage amplitudes above set limits
UDIFFSC BOOLEAN Voltage difference out of limit
FRDIFFA BOOLEAN Frequency difference out of limit for Auto operation
PHDIFFA BOOLEAN Phase angle difference out of limit for Auto
operation
FRDIFFM BOOLEAN Frequency difference out of limit for Manual
operation
PHDIFFM BOOLEAN Phase angle difference out of limit for Manual
Operation
UDIFFME REAL Calculated difference in voltage
FRDIFFME REAL Calculated difference in frequency
PHDIFFME REAL Calculated difference of phase angle
MODEAEN INTEGER Selected mode for automatic energizing
MODEMEN INTEGER Selected mode for manual energizing
495
Control

Table 291: SESRSYN Group settings (basic)
On
SelPhaseBus1 phase1 - - phase2 Select phase for bus1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
SelPhaseBus2 phase1 - - phase2 Select phase for bus2
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
SelPhaseLine1 phase1 - - phase2 Select phase for line1
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
SelPhaseLine2 phase1 - - phase2 Select phase for line2
phase2
phase3
phase1-phase2
phase2-phase3
phase3-phase1
CBConfig No voltage sel. - - No voltage sel. Select CB configuration
Double bus
1 1/2 bus CB
1 1/2 bus alt. CB
Tie CB
UBase 0.001 - 9999.999 kV 0.001 400.000 Base voltage in kV
PhaseShift -180 - 180 Deg 5 0 Phase shift
URatio 0.040 - 25.000 - 0.001 1.000 Voltage ratio
OperationSynch Off - - Off Operation for synchronizing function Off/
On On
UHighBusSynch 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit bus for synchronizing
in % of UBase
UHighLineSynch 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit line for synchronizing
in % of UBase
UDiffSynch 2.0 - 50.0 %UB 1.0 10.0 Voltage difference limit for synchronizing
in % of UBase
FreqDiffMin 0.003 - 0.250 Hz 0.001 0.010 Minimum frequency difference limit for
synchronizing
FreqDiffMax 0.050 - 0.250 Hz 0.001 0.200 Maximum frequency difference limit for
synchronizing
FreqRateChange 0.000 - 0.500 Hz/s 0.001 0.300 Maximum allowed frequency rate of
change
tBreaker 0.000 - 60.000 s 0.001 0.080 Closing time of the breaker
496
Control

tClosePulse 0.050 - 60.000 s 0.001 0.200 Breaker closing pulse duration
tMaxSynch 0.00 - 6000.00 s 0.01 600.00 Resets synch if no close has been made
before set time
tMinSynch 0.000 - 60.000 s 0.001 2.000 Minimum time to accept synchronizing
conditions
OperationSC Off - - On Operation for synchronism check
On function Off/On
UHighBusSC 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit bus for synchrocheck
in % of UBase
UHighLineSC 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit line for synchrocheck
in % of UBase
UDiffSC 2.0 - 50.0 %UB 1.0 15.0 Voltage difference limit in % of UBase
FreqDiffA 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between bus
and line Auto
FreqDiffM 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between bus
and line Manual
PhaseDiffA 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between
bus and line Auto
PhaseDiffM 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between
bus and line Manual
tSCA 0.000 - 60.000 s 0.001 0.100 Time delay output for synchrocheck Auto
tSCM 0.000 - 60.000 s 0.001 0.100 Time delay output for synchrocheck
Manual
AutoEnerg Off - - DBLL Automatic energizing check mode
DLLB
DBLL
Both
ManEnerg Off - - Both Manual energizing check mode
DLLB
DBLL
Both
ManEnergDBDL Off - - Off Manual dead bus, dead line energizing
On
UHighBusEnerg 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit bus for energizing
check in % of UBase
UHighLineEnerg 50.0 - 120.0 %UB 1.0 80.0 Voltage high limit line for energizing
check in % of UBase
ULowBusEnerg 10.0 - 80.0 %UB 1.0 40.0 Voltage low limit bus for energizing
check in % of UBase
ULowLineEnerg 10.0 - 80.0 %UB 1.0 40.0 Voltage low limit line for energizing
check in % of UBase
UMaxEnerg 50.0 - 180.0 %UB 1.0 115.0 Maximum voltage for energizing in % of
UBase
tAutoEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for automatic energizing
check
tManEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for manual energizing check
497
Control

Table 292: SESRSYN technical data
Phase shift, jline - jbus (-180 to 180) degrees -
Voltage ratio, Ubus/Uline (0.40-25.000) % of UBase -
Voltage high limit for (50.0-120.0)% of UBase ± 1.0% of Ur at U ≤ Ur

synchronizing and ± 1.0% of U at U >Ur
synchrocheck
Reset ratio, synchrocheck > 95% -
Frequency difference limit (0.003-1.000) Hz ± 2.0 mHz
between bus and line
Phase angle difference limit (5.0-90.0) degrees ± 2.0 degrees
Voltage difference limit (2.0-50.0)% of UBase ± 1.0% of Ur
Time delay output for (0.000-60.000) s ± 0.5% ± 10 ms
synchrocheck
Voltage high limit for (50.0-120.0)% of UBase ± 1.0% of Ur at U ≤ Ur
energizing check ± 1.0% of U at U >Ur
Reset ratio, voltage high limit > 95% -

Voltage low limit for (10.0-80.0)% of UBase ± 1.0% of Ur
energizing check
Reset ratio, voltage low limit < 105% -
Maximum voltage for (50.0-180.0)% of UBase ± 1.0% of Ur at U ≤ Ur
energizing ± 1.0% of U at U >Ur
Time delay for energizing (0.000-60.000) s ± 0.5% ± 10 ms

check
Operate time for 160 ms typically -
synchrocheck function
Operate time for energizing 80 ms typically -
function
12.2 Autorecloser SMBRREC
Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2

Autorecloser SMBRREC 79
O->I
SYMBOL-L V1 EN
498
Control
12.2.1 Introduction
The autorecloser (SMBRREC) function provides high-speed and/or delayed auto-
reclosing for single or multi-breaker applications.
Up to five reclosing attempts can be programmed. The first attempt can be single-,
two and/or three phase for single phase or multi-phase faults respectively.
Multiple autoreclosing functions are provided for multi-breaker arrangements. A

priority circuit allows one circuit breaker to close first and the second will only
close if the fault proved to be transient.
Each autoreclosing function can be configured to co-operate with a synchrocheck

function.
12.2.2.1 Logic Diagrams
The logic diagrams below illustrate the principles applicable in the understanding
of the functionality.
12.2.2.2 Auto-reclosing operation Off and On
Operation of the automatic reclosing can be set to Off or On via the setting
parameters and through external control. With the setting Operation = On, the
function is activated while with the setting Operation = Off the function is
deactivated. With the setting Operation = External ctrl, the activation/deactivation
is made by input signal pulses, for example, from a control system.
When the function is set On and is operative the output SETON is activated (high).
Other input conditions such as CBPOS and CBREADY must also be fulfilled. At
this point the automatic recloser is prepared to start the reclosing cycle and the
output signal READY on the SMBRREC function block is activated (high).
12.2.2.3 Auto-reclosing mode selection
The Auto-reclosing mode is selected with setting ARMode = 3phase(0), 1/2/3ph(1),

1/2ph(2), 1ph+1*2ph(3), 1/2ph+1*3ph(4), 1ph+1*2/3ph(5). The selected mode
can be read as integer as per above list on output MODE.
As an alternative to setting the mode can be selected by connecting an integer, for

example from function block B16I to input MODEINT.
Following integers shall be used: 1=3phase, 2=1/2/3ph, 3=1/2ph, 4=1ph+1*2ph,

5=1/2ph+1*3ph or 6=1ph+1*2/3ph.
When INTZERO from Fixed signal function block is connected to the input
MODEINT the parameter setting selected will be valid.
499
Control
12.2.2.4 Start auto-reclosing and conditions for start of a reclosing cycle
The usual way in which to start a reclosing cycle, or sequence, is to start it when a
line protection tripping has occurred, by applying a signal to the START input. It
should be necessary to adjust three-phase auto-reclosing open time, (dead time) for
different power system configurations or during tripping at different protection
stages, the input STARTHS (start high-speed reclosing) can also be used.
For a new auto-reclosing cycle to be started, a number of conditions need to be

met. They are linked to dedicated inputs. The inputs are:
• CBREADY: CB ready for a reclosing cycle, for example, charged operating gear
• CBPOS: to ensure that the CB was closed when the line fault occurred and
start was applied
• No blocking or inhibit signal shall be present.
After the start has been accepted, it is latched in and an internal signal “Started” is
set. It can be interrupted by certain events, like an inhibit signal.
To start auto-reclosing by CB position Open instead of from protection trip signals,

one has to configure the CB Open position signal to inputs CBPOS and START
and set a parameter StartByCBOpen = On and CBAuxContType = NormClosed
(normally closed). One also has to configure and connect signals from manual trip
commands to input INHIBIT.
The logic for switching the auto-recloser On/Off and the starting of the reclosing is
shown in figure 269. The following should be considered:
• Setting Operation can be set to Off, External ctrl or On. External ctrl offers
the possibility of switching by external switches to inputs ON and OFF,
communication commands to the same inputs, and so on.
• SMBRREC is normally started by tripping. It is either a Zone 1 and
Communication aided trip, or a general trip. If the general trip is used the
function must be blocked from all back-up tripping connected to INHIBIT. In
both alternatives the breaker failure function must be connected to inhibit the
function. START makes a first attempt with synchrocheck, STARTHS makes
its first attempt without synchrocheck. TRSOTF starts shots 2-5.
• Circuit breaker checks that the breaker was closed for a certain length of time
before the starting occurred and that the CB has sufficient stored energy to
perform an auto-reclosing sequence and is connected to inputs CBPOS and
CBREADY.
500
Control
Operation:On
Operation:Off
Operation:External Ctrl
OR
ON AND SETON
AND S
OR
OFF AND R
START
STARTHS OR
OR initiate
autoInitiate
Additional conditions
TRSOTF AND
start
120 ms
CBREADY AND
t AND
AND S
tCBClosedMin
CBPOS CB Closed
t R
AND
Blocking conditions READY
AND
OR
Inhibit condistions
count 0
en05000782.vsd
IEC05000782 V1 EN
Figure 269: Auto-reclosing Off/On and start
12.2.2.5 Control of the auto-reclosing open time for shot 1
It is possible to use up to four different time settings for the first shot, and one
extension time. There are separate settings for single- , two- and three-phase auto-
reclosing open times, t1 1Ph, t1 2Ph, t1 3Ph. If no particular input signal is applied,
and an auto-reclosing program with single-phase reclosing is selected, the auto-
reclosing open time t1 1Ph will be used. If one of the inputs TR2P or TR3P is
activated in connection with the input START, the auto-reclosing open time for two-
phase or three-phase reclosing is used. There is also a separate time setting facility
for three-phase high-speed auto-reclosing, t1 3PhHS available for use when
required. It is activated by input STARTHS.
An auto-reclosing open time extension delay, tExtended t1, can be added to the
normal shot 1 delay. It is intended to come into use if the communication channel
for permissive line protection is lost. In a case like this there can be a significant
time difference in fault clearance at the two line ends. A longer auto-reclosing open
time can then be useful. This extension time is controlled by setting parameter
Extended t1 = On and the input PLCLOST.
12.2.2.6 Long trip signal
In normal circumstances the trip command resets quickly due to fault clearing. The
user can set a maximum trip pulse duration tTrip. When trip signals are longer, the
501
Control
auto-reclosing open time is extended by tExtended t1. If Extended t1 = Off, a long

trip signal interrupts the reclosing sequence in the same way as a signal to input
INHIBIT.
Extended t1
PLCLOST Extend t1
initiate AND OR AND
AND
tTrip
t
AND
start
long duration
AND
(block SMBRREC)
IEC05000783 V2 EN
Figure 270: Control of extended auto-reclosing open time and long trip pulse detection
Reclosing checks and the reclaim timer

When dead time has elapsed during the auto-reclosing procedure certain conditions
must be fulfilled before the CB closing command is issued. To achieve this, signals
are exchanged between program modules to check that these conditions are met. In
three-phase reclosing a synchronizing and/or energizing check can be used. It is
possible to use a synchrocheck function in the same physical device or an external
one. The release signal is configured by connecting to the auto-reclosing function
input SYNC. If reclosing without checking is preferred the SYNC input can be set
to TRUE (set high). Another possibility is to set the output of the synchro-check
function to a permanently activated state. At confirmation from the synchro-check,
or if the reclosing is of single-phase or two-phase type, the signal passes on. At single-
phase, two-phase reclosing and at three-phase high-speed reclosing started by
STARTHS, synchronization is not checked, and the state of the SYNC input is
disregarded.
By choosing CBReadyType = CO (CB ready for a Close-Open sequence) the

readiness of the circuit breaker is also checked before issuing the CB closing
command. If the CB has a readiness contact of type CBReadyType = OCO (CB
ready for an Open-Close-Open sequence) this condition may not be complied with
after the tripping and at the moment of reclosure. The Open-Close-Open condition
was however checked at the start of the reclosing cycle and it is then likely that the
CB is prepared for a Close-Open sequence.
502
Control
The synchro-check or energizing check must be fulfilled within a set time interval,
tSync. If it is not, or if other conditions are not met, the reclosing is interrupted and
blocked.
The reclaim timer defines a time from the issue of the reclosing command, after
which the reclosing function resets. Should a new trip occur during this time, it is
treated as a continuation of the first fault. The reclaim timer is started when the CB
closing command is given.
A number of outputs for Autoreclosing state control keeps track of the actual state
in the reclosing sequence.
503
Control
t1 1Ph
"SMBRREC Open time" timers
t
1P2PTO
From logic for t1 2Ph OR
reclosing t
programs
1P2PTO t1 3Ph HS
t
3PHSTO
3PHSTO
3PT1TO
t1 3Ph
3PT2TO t
3PT1TO
3PT3TO OR
AND
3PT4TO OR Pulse AR
3PT5TO AND
SYNC
initiate AND Blocking out
CBREADY AND OR
SMRREC State
tSync Control
AND t COUNTER
0 Shot 0
CL Shot 1
1
2 Shot 2
3 Shot 3
tReclaim
Pulse SMBRREC (above) AND t R 4 Shot 4
OR Shot 5
5
TR2P LOGIC Reclaim Timer On
TR3P reclosing
1PT1
programs
start 2PT1
initiate 3PHS INPROGR
Shot 0 3PT1 OR
Shot 1 3PT2
Shot 2
Shot 3 3PT3
Shot 4
Shot 5 3PT4
PERMIT1P
3PT5
PREP3P
1
Blocking out tInhibit
OR Inhibit (internal)
INHIBIT t
IEC05000784 V2 EN
Figure 271: Reclosing Reclaim and Inhibit timers
Pulsing of the CB closing command

The CB closing command, CLOSECB is a pulse with a duration set by parameter
tPulse. For circuit-breakers without anti-pumping function, the close pulse cutting
described below can be used. This is done by selecting the parameter
504
Control
CutPulse=On. In case of a new trip pulse, the closing command pulse is cut
(interrupted). The minimum duration of the pulse is always 50 ms. See figure 272
When a reclosing command is issued, the appropriate reclosing operation counter is

incremented. There is a counter for each type of reclosing and one for the total
number of reclosing commands issued.
tPulse
pulse
**) AND CLOSECB
OR
initiate
50 ms
1PT1 AND COUNT1P

counter
2PT1 AND
counter
COUNT2P
3PT1 AND COUNT3P1

counter
3PT2 AND COUNT3P2

counter
3PT3 AND COUNT3P3

counter
3PT4 AND COUNT3P4

counter
3PT5 AND COUNT3P5

counter
counter COUNTAR
RSTCOUNT
**) Only if "CutPulse" = On
en05000785.vsd
IEC05000785 V1 EN
Figure 272: Pulsing of closing command and driving the operation counters
Transient fault
After the reclosing command the reclaim timer tReclaim starts running for the set
time. If no tripping occurs within this time, the auto-reclosing will reset.
Permanent fault and reclosing unsuccessful signal

If a new trip occurs after the CB closing command, and a new input signal START
or TRSOTF appears, the output UNSUCCL (unsuccessful closing) is set high. The
timers for the first shot can no longer be started. Depending on the setting for the
number of reclosing shots, further shots may be made or the reclosing sequence
505
Control
will be ended. After the reclaim time has elapsed, the auto-reclosing function resets
but the CB remains open. The CB closed data at the CBPOS input will be missing.
Because of this, the reclosing function will not be ready for a new reclosing cycle.
Normally the signal UNSUCCL appears when a new trip and start is received after
the last reclosing shot has been made and the auto-reclosing function is blocked.
The signal resets once the reclaim time has elapsed. The “unsuccessful“ signal can
also be made to depend on CB position input. The parameter UnsucClByCBChk
should then be set to CBCheck, and a timer tUnsucCl should also be set. If the CB
does not respond to the closing command and does not close, but remains open, the
output UNSUCCL is set high after time tUnsucCl.
initiate
block start AND
OR UNSUCCL
AND S
shot 0
R
UnsucClByCBchk = CBcheck
Pulse AR (Closing) OR tUnsucCl

AND
AND t
CBPOS CBclosed
eno5000786.vsd
IEC05000786 V1 EN
Figure 273: Issue of signal UNSUCCL, unsuccessful reclosing
Automatic continuation of the reclosing sequence

The auto-reclosing function can be programmed to proceed to the following
reclosing shots (if selected) even if the start signals are not received from the
protection functions, but the breaker is still not closed. This is done by setting
parameter AutoCont = On and tAutoContWait to the required delay for the function
to proceed without a new start.
506
Control
tAutoContWait
t
AND
CLOSECB
AND
S Q
AND
CBPOS CBClosed
OR
initiate
START OR
en05000787.vsd
IEC05000787 V1 EN
Figure 274: Automatic proceeding of shot 2 to 5
Start of reclosing from CB open information

If a user wants to apply starting of auto-reclosing from CB open position instead of
from protection trip signals, the function offers such a possibility. This starting
mode is selected by a setting parameter StartByCBOpen = On. One needs then to
block reclosing at all manual trip operations. Typically, one also set
CBAuxContType = NormClosed and connect a CB auxiliary contact of type NC
(normally closed) to inputs CBPOS and START. When the signal changes from
CB closed to CB open an auto-reclosing start pulse of limited length is generated
and latched in the function, subject to the usual checks. Then the reclosing
sequence continues as usual. One needs to connect signals from manual tripping
and other functions, which shall prevent reclosing, to the input INHIBIT.
507
Control
StartByCBOpen = On
START AND
STARTHS AND
start
³1
100 ms
AND
100 ms
AND
en05000788.vsd
IEC05000788 V1 EN
Figure 275: Pulsing of the start inputs
12.2.2.7 Time sequence diagrams
Some examples of the timing of internal and external signals at typical transient
and permanent faults are shown below in figures 276 to 279.
Fault
CB POS
Closed Open Closed
CB READY
START (Trip)
SYNC
tReclaim
READY
INPROG
1PT1
ACTIVE
CLOSE CB t1 1Ph tPulse
PREP3P
SUCCL
Time
en04000196-2-en.vsd
IEC04000196 V2 EN
Figure 276: Transient single-phase fault. Single -phase reclosing
508
Control
Fault
CB POS Open
Closed Open C C
CB READY
START (Trip)
TR3P
SYNC
READY
INPROGR
3PT1 t1 3Ph
3PT2 t2 3Ph
ACTIVE tReclaim
CLOSE CB tPulse tPulse
PREP3P
UNSUCCL
Time
en04000197.vsd
IEC04000197 V1 EN
Figure 277: Permanent fault. Three-phase trip. Two-shot reclosing
509
Control
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-START
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
AR01-CLOSECB t1s
AR01-P3P
AR01-UNSUC
tReclaim
en04000198.vsd
IEC04000198 V1 EN
Figure 278: Permanent single-phase fault. Program 1/2/3ph, single-phase

single-shot reclosing
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-START
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
t2
AR01-CLOSECB t1s
AR01-P3P
AR01-UNSUC
tReclaim
en04000199.vsd
IEC04000199 V1 EN
Figure 279: Permanent single-phase fault. Program 1ph + 3ph or 1/2ph + 3ph,
two-shot reclosing
510
Control

SMBRREC
ON BLOCKED
OFF SETON
BLKON READY
BLKOFF ACTIVE
RESET SUCCL
INHIBIT UNSUCCL
START INPROGR
STARTHS 1PT1
TRSOTF 2PT1
SKIPHS 3PT1
ZONESTEP 3PT2
TR2P 3PT3
TR3P 3PT4
THOLHOLD 3PT5
CBREADY PERMIT1P
CBPOS PREP3P
PLCLOST CLOSECB
SYNC WFMASTER
WAIT COUNT1P
RSTCOUNT COUNT2P
MODEINT COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
COUNT3P5
COUNTAR
MODE
IEC06000189 V2 EN
Figure 280: SMBRREC function block

Table 293: SMBRREC Input signals
ON BOOLEAN 0 Switches the AR On (at Operation = ExternalCtrl)
OFF BOOLEAN 0 Switches the AR Off (at Operation = ExternalCtrl)
BLKON BOOLEAN 0 Sets the AR in blocked state
BLKOFF BOOLEAN 0 Releases the AR from the blocked state
RESET BOOLEAN 0 Resets the AR to initial conditions
INHIBIT BOOLEAN 0 Interrupts and inhibits reclosing sequence
START BOOLEAN 0 Reclosing sequence starts by a protection trip
signal
STARTHS BOOLEAN 0 Start HS reclosing without SC: t13PhHS
TRSOTF BOOLEAN 0 Makes AR to continue to shots 2-5 at a trip from
SOTF
SKIPHS BOOLEAN 0 Will skip the high speed shot and continue on
delayed shots
ZONESTEP BOOLEAN 0 Coordination between local AR and down stream
devices
TR2P BOOLEAN 0 Signal to the AR that a two-phase tripping occurred
TR3P BOOLEAN 0 Signal to the AR that a three-phase tripping
occurred
511
Control

THOLHOLD BOOLEAN 0 Hold the AR in wait state
CBREADY BOOLEAN 0 CB must be ready for CO/OCO operation to allow
start / close
CBPOS BOOLEAN 0 Status of the circuit breaker Closed/Open
PLCLOST BOOLEAN 0 Power line carrier or other form of permissive sig‐
nal lost
SYNC BOOLEAN 0 Synchronizing check fulfilled (for 3Ph attempts)
WAIT BOOLEAN 0 Wait for master (in Multi-breaker arrangements)
RSTCOUNT BOOLEAN 0 Resets all counters
MODEINT INTEGER 0 Integer input used to set the reclosingMode,
alternative to setting
Table 294: SMBRREC Output signals

BLOCKED BOOLEAN The AR is in blocked state
SETON BOOLEAN The AR operation is switched on, operative
READY BOOLEAN Indicates that the AR function is ready for a new
sequence
ACTIVE BOOLEAN Reclosing sequence in progress
SUCCL BOOLEAN Activated if CB closes during the time tUnsucCl
UNSUCCL BOOLEAN Reclosing unsuccessful, signal resets after the
reclaim time
INPROGR BOOLEAN Reclosing shot in progress, activated during open
time
1PT1 BOOLEAN Single-phase reclosing is in progress, shot 1
2PT1 BOOLEAN Two-phase reclosing is in progress, shot 1
3PT1 BOOLEAN Three-phase reclosing in progress, shot 1
PERMIT1P BOOLEAN Permit single-phase trip, inverse signal to PREP3P
PREP3P BOOLEAN Prepare three-phase trip, control of the next trip
operation
CLOSECB BOOLEAN Closing command for CB
WFMASTER BOOLEAN Signal to Slave issued by Master for sequential
reclosing
COUNT1P INTEGER Counting the number of single-phase reclosing
shots
COUNT2P INTEGER Counting the number of two-phase reclosing shots
COUNT3P1 INTEGER Counting the number of three-phase reclosing
shot 1
512
Control

shot 2
shot 3
shot 4
shot 5
COUNTAR INTEGER Counting total number of reclosing shots
MODE INTEGER Integer output for reclosing mode

Table 295: SMBRREC Group settings (basic)
Operation Off - - External ctrl Off, ExternalCtrl, On
External ctrl
On
ARMode 3 phase - - 1/2/3ph The AR mode selection e.g. 3ph, 1/3ph
1/2/3ph
1/2ph
1ph+1*2ph
1/2ph+1*3ph
1ph+1*2/3ph
t1 1Ph 0.000 - 60.000 s 0.001 1.000 Open time for shot 1, single-phase
t1 3Ph 0.000 - 60.000 s 0.001 6.000 Open time for shot 1, delayed reclosing
3ph
t1 3PhHS 0.000 - 60.000 s 0.001 0.400 Open time for shot 1, high speed
reclosing 3ph
tReclaim 0.00 - 6000.00 s 0.01 60.00 Duration of the reclaim time
tSync 0.00 - 6000.00 s 0.01 30.00 Maximum wait time for synchrocheck OK
tTrip 0.000 - 60.000 s 0.001 0.200 Maximum trip pulse duration
tPulse 0.000 - 60.000 s 0.001 0.200 Duration of the circuit breaker closing
pulse
tCBClosedMin 0.00 - 6000.00 s 0.01 5.00 Min time that CB must be closed before
new sequence allows
tUnsucCl 0.00 - 6000.00 s 0.01 30.00 Wait time for CB before indicating
Unsuccessful/Successful
Priority None - - None Priority selection between adjacent
Low terminals None/Low/High
High
tWaitForMaster 0.00 - 6000.00 s 0.01 60.00 Maximum wait time for release from
Master
513
Control
Table 296: SMBRREC Group settings (advanced)

NoOfShots 1 - - 1 Max number of reclosing shots 1-5
2
3
4
5
StartByCBOpen Off - - Off To be set ON if AR is to be started by
On CB open position
CBAuxContType NormClosed - - NormOpen Select the CB aux contact type NC/NO
NormOpen for CBPOS input
CBReadyType CO - - CO Select type of circuit breaker ready
OCO signal CO/OCO
t1 2Ph 0.000 - 60.000 s 0.001 1.000 Open time for shot 1, two-phase
t2 3Ph 0.00 - 6000.00 s 0.01 30.00 Open time for shot 2, three-phase
Extended t1 Off - - Off Extended open time at loss of
On permissive channel Off/On
tExtended t1 0.000 - 60.000 s 0.001 0.500 3Ph Dead time is extended with this
value at loss of perm ch
tInhibit 0.000 - 60.000 s 0.001 5.000 Inhibit reclosing reset time
CutPulse Off - - Off Shorten closing pulse at a new trip Off/On
On
Follow CB Off - - Off Advance to next shot if CB has been
On closed during dead time
AutoCont Off - - Off Continue with next reclosing-shot if
On breaker did not close
tAutoContWait 0.000 - 60.000 s 0.001 2.000 Wait time after close command before
proceeding to next shot
UnsucClByCBChk NoCBCheck - - NoCBCheck Unsuccessful closing signal obtained by
CB check checking CB position
BlockByUnsucCl Off - - Off Block AR at unsuccessful reclosing
On
ZoneSeqCoord Off - - Off Coordination of down stream devices to
On local prot unit’s AR
514
Control

Table 297: SMBRREC technical data
Number of autoreclosing shots 1-5 -
Autoreclosing open time:
shot 1 - t1 1Ph (0.000-60.000) s ± 0.5% ± 10 ms
shot 1 - t1 2Ph
shot 1 - t1 3PhHS
shot 1 - t1 3PhDld
shot 2 - t2 (0.00-6000.00) s
shot 3 - t3
shot 4 - t4
shot 5 - t5
Extended autorecloser open time (0.000-60.000) s
Autorecloser maximum wait time for sync (0.00-6000.00) s
Maximum trip pulse duration (0.000-60.000) s
Inhibit reset time (0.000-60.000) s
Reclaim time (0.00-6000.00) s
Minimum time CB must be closed before AR (0.00-6000.00) s
becomes ready for autoreclosing cycle
Circuit breaker closing pulse length (0.000-60.000) s
CB check time before unsuccessful (0.00-6000.00) s
Wait for master release (0.00-6000.00) s
Wait time after close command before (0.000-60.000) s
proceeding to next shot
12.3 Apparatus control APC
12.3.1 Introduction
The apparatus control is a function for control and supervision of circuit breakers,
disconnectors and earthing switches within a bay. Permission to operate is given
after evaluation of conditions from other functions such as interlocking,
synchrocheck, operator place selection and external or internal blockings.

A bay can handle, for example a power line, a transformer, a reactor, or a capacitor
bank. The different primary apparatuses within the bay can be controlled via the
apparatus control function directly by the operator or indirectly by automatic
sequences.
515
Control
Because a primary apparatus can be allocated to many functions within a

Substation Automation system, the object-oriented approach with a function
module that handles the interaction and status of each process object ensures
consistency in the process information used by higher-level control functions.
Primary apparatuses such as breakers and disconnectors are controlled and

supervised by one software module (SCSWI) each. Because the number and type
of signals connected to a breaker and a disconnector are almost the same, the same
software is used to handle these two types of apparatuses.
The software module is connected to the physical process in the switchyard via an
interface module by means of a number of digital inputs and outputs. One type of
interface module is intended for a circuit breaker (SXCBR) and another type is
intended for a disconnector or earthing switch (SXSWI). Four types of function
blocks are available to cover most of the control and supervision within the bay.
These function blocks are interconnected to form a control function reflecting the
switchyard configuration. The total number used depends on the switchyard
configuration. These four types are:
• Bay control QCBAY

• Switch controller SCSWI
• Circuit breaker SXCBR
• Circuit switch SXSWI
The three latter functions are logical nodes according to IEC 61850. The functions
Local Remote (LOCREM) and Local Remote Control (LOCREMCTRL), to handle
the local/remote switch, and the functions Bay reserve (QCRSV) and Reservation
input (RESIN), for the reservation function, also belong to the apparatus control
function. The principles of operation, function block, input and output signals and
setting parameters for all these functions are described below.
12.3.3 Error handling

Depending on the error that occurs during the command sequence the error signal
will be set with a value. Table 298 describes vendor specific cause values in
addition to these specified in IEC 61850-8-1 standard. The list of values of the
“cause” are in order of priority. The values are available over the IEC 61850. An
output L_CAUSE on the function block for Switch controller (SCSWI), Circuit
breaker (SXCBR) and Circuit switch (SXSWI) indicates the latest value of the
error during the command.
516
Control
Table 298: Values for "cause" signal in priority order

Attribute value Description Supported
Defined in IEC 61850 0 no error X
1 serviceError-type
2 blocked-by-switching- X
hierarchy
3 select-failed X
4 invalid-position X
5 position-reached X
6 parameter-change-in- X
execution
7 step-limit X
8 blocked-by-mode X
9 blocked-by-process X
10 blocked-by-interlocking X
11 blocked-by- X
synchrocheck
12 command-already-in- X
execution
13 blocked-by-health X
14 1-of-n-control X
15 abortion-by-cancel X
16 time-limit-over X
17 abortion-by-trip X
18 object-not-selected X
19 Not in use
517
Control
Attribute value Description Supported

Vendor specific -20 Not in use
-21 Not in use
-23 blocked-for-command X
-24 blocked-for-open- X
command
-25 blocked-for-close- X
command
-26 Not in use
-27 Not in use
-28 Not in use
-29 Not in use
-30 long-operation-time X
-31 switch-not-start-moving X
-32 persisting-intermediate- X
state
-33 switch-returned-to-initial- X
position
-34 switch-in-bad-state X
-35 not-expected-final- X
position
12.3.4 Bay control QCBAY
The bay control (QCBAY) function is used to handle the selection of the operator
place per bay. QCBAY also provides blocking functions that can be distributed to
different apparatuses within the bay.
The functionality of the Bay control (QCBAY) function is not defined in the IEC
61850–8–1 standard, which means that the function is a vendor specific logical node.
The function sends information about the Permitted Source To Operate (PSTO)
and blocking conditions to other functions within the bay for example, switch
control functions, voltage control functions and measurement functions.
Local panel switch

The local panel switch is a switch that defines the operator place selection. The
switch connected to this function can have three positions remote/local/off. The
positions are here defined so that remote means that operation is allowed from station/
remote level and local from the IED level. The local/remote switch is normally
situated on the control/protection IED itself, which means that the position of the
518
Control
switch and its validity information are connected internally, and not via I/O boards.
When the switch is mounted separately on the IED the signals are connected to the
function via I/O boards.
When the local panel switch is in Off position all commands from remote and local
level will be ignored. If the position for the local/remote switch is not valid the
PSTO output will always be set to faulty state (3), which means no possibility to
operate.
To adapt the signals from the local HMI or from an external local/remote switch,
the function blocks LOCREM and LOCREMCTRL are needed and connected to
QCBAY.
Permitted Source To Operate (PSTO)

The actual state of the operator place is presented by the value of the Permitted
Source To Operate, PSTO signal. The PSTO value is evaluated from the local/
remote switch position according to table 299. In addition, there is one
configuration parameter that affects the value of the PSTO signal. If the parameter
AllPSTOValid is set and LR-switch position is in Local or Remote state, the PSTO
value is set to 5 (all), that is, it is permitted to operate from both local and remote
level without any priority. When the external panel switch is in Off position the
PSTO value shows the actual state of switch that is, 0. In this case it is not possible
to control anything.
Table 299: PSTO values for different Local panel switch positions
Local panel switch PSTO value AllPSTOValid Possible locations that shall be able to
positions (configuration operate
parameter)
0 = Off 0 -- Not possible to operate
1 = Local 1 FALSE Local Panel
1 = Local 5 TRUE Local or Remote level without any
priority
2 = Remote 2 FALSE Remote level
2 = Remote 5 TRUE Local or Remote level without any
priority
3 = Faulty 3 -- Not possible to operate
Blockings
The blocking states for position indications and commands are intended to provide
the possibility for the user to make common blockings for the functions configured
within a complete bay.
The blocking facilities provided by the bay control function are the following:
519
Control
• Blocking of position indications, BL_UPD. This input will block all inputs
related to apparatus positions for all configured functions within the bay.
• Blocking of commands, BL_CMD. This input will block all commands for all
configured functions within the bay.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC
61850–8–1). If DO Behavior is set to "blocked" it means that the function is
active, but no outputs are generated, no reporting, control commands are
rejected and functional and configuration data is visible.
The switching of the Local/Remote switch requires at least system operator level.
The password will be requested at an attempt to operate if authority levels have
been defined in the IED. Otherwise the default authority level, SuperUser, can
handle the control without LogOn. The users and passwords are defined in PCM600.

QCBAY
LR_OFF PSTO
LR_LOC UPD_BLKD
LR_REM CMD_BLKD
LR_VALID
BL_UPD
BL_CMD
IEC05000796 V2 EN
Figure 281: QCBAY function block

Table 300: QCBAY Input signals
LR_OFF BOOLEAN 0 External Local/Remote switch is in Off position
LR_LOC BOOLEAN 0 External Local/Remote switch is in Local position
LR_REM BOOLEAN 0 External Local/Remote switch is in Remote
position
LR_VALID BOOLEAN 0 Data representing the L/R switch position is valid
BL_UPD BOOLEAN 0 Steady signal to block the position updates
BL_CMD BOOLEAN 0 Steady signal to block the command
Table 301: QCBAY Output signals

PSTO INTEGER The value for the operator place allocation
UPD_BLKD BOOLEAN The update of position is blocked
CMD_BLKD BOOLEAN The function is blocked for commands
520
Control

Table 302: QCBAY Non group settings (basic)
AllPSTOValid Priority - - Priority The priority of originators
No priority
12.3.5 Local/Remote switch
The signals from the local HMI or from an external local/remote switch are applied
via function blocks LOCREM and LOCREMCTRL to the Bay control (QCBAY)
function block. A parameter in function block LOCREM is set to choose if the
switch signals are coming from the local HMI or from an external hardware switch
connected via binary inputs.
The function block Local remote (LOCREM) handles the signals coming from the
local/remote switch. The connections are seen in figure 282, where the inputs on
function block LOCREM are connected to binary inputs if an external switch is
used. When a local HMI is used, the inputs are not used and are set to FALSE in
the configuration. The outputs from the LOCREM function block control the
output PSTO (Permitted Source To Operate) on Bay control (QCBAY).
521
Control
LOCREM QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LOCREM QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LOCREMCTRL
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO10 HMICTR10
PSTO11 HMICTR11
PSTO12 HMICTR12
IEC05000250 V2 EN
Figure 282: Configuration for the local/remote handling for a local HMI with two
bays and two screen pages
If the IED contains control functions for several bays, the local/remote position can
be different for the included bays. When the local HMI is used the position of the
local/remote switch can be different depending on which single line diagram screen
page that is presented on the local HMI. The function block Local remote control
(LOCREMCTRL) controls the presentation of the LEDs for the local/remote
position to applicable bay and screen page.
The switching of the local/remote switch requires at least system operator level.
The password will be requested at an attempt to operate if authority levels have
been defined in the IED. Otherwise the default authority level, SuperUser, can
handle the control without LogOn. The users and passwords are defined in PCM600.

LOCREM
CTRLOFF OFF
LOCCTRL LOCAL
REMCTRL REMOTE
LHMICTRL VALID
IEC05000360 V2 EN
Figure 283: LOCREM function block
522
Control
LOCREMCTRL
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO10 HMICTR10
PSTO11 HMICTR11
PSTO12 HMICTR12
IEC05000361 V2 EN
Figure 284: LOCREMCTRL function block

Table 303: LOCREM Input signals
CTRLOFF BOOLEAN 0 Disable control
LOCCTRL BOOLEAN 0 Local in control
REMCTRL BOOLEAN 0 Remote in control
LHMICTRL INTEGER 0 LHMI control
Table 304: LOCREM Output signals

OFF BOOLEAN Control is disabled
LOCAL BOOLEAN Local control is activated
REMOTE BOOLEAN Remote control is activated
VALID BOOLEAN Outputs are valid
Table 305: LOCREMCTRL Input signals

PSTO1 INTEGER 0 PSTO input channel 1
523
Control

Table 306: LOCREMCTRL Output signals

HMICTR1 INTEGER Bitmask output 1 to local remote LHMI input

Table 307: LOCREM Non group settings (basic)
ControlMode Internal LR-switch - - Internal LR-switch Control mode for internal/external LR-
External LR-switch switch
12.3.6 Switch controller SCSWI
The Switch controller (SCSWI) initializes and supervises all functions to properly
select and operate switching primary apparatuses. The Switch controller may
handle and operate on one three-phase device.
The Switch controller (SCSWI) is provided with verification checks for the select -
execute sequence, that is, checks the conditions prior each step of the operation.
The involved functions for these condition verifications are interlocking,
reservation, blockings and synchrocheck.
524
Control
Control handling
.
Two types of control models can be used. The two control models are "direct with
normal security" and "SBO (Select-Before-Operate) with enhanced security". The
parameter CtlModel defines which one of the two control models is used. The
control model "direct with normal security" does not require a select whereas, the
"SBO with enhanced security" command model requires a select before execution.
The parameter CtlModel's alternative settings Dir Norm and Dir

Norm (ABB) have identical functionality and so have SBO Enh
(ABB) and SBO Enh.
Normal security means that only the command is evaluated and the resulting
position is not supervised. Enhanced security means that the command sequence is
supervised in three steps, the selection, command evaluation and the supervision of
position. Each step ends up with a pulsed signal to indicate that the respective step
in the command sequence is finished. If an error occurs in one of the steps in the
command sequence, the sequence is terminated and the error is mapped into the
enumerated variable "cause" attribute belonging to the pulsed response signal for
the IEC 61850 communication. The last cause L_CAUSE can be read from the
function block and used for example at commissioning.
There is no relation between the command direction and the actual

position. For example, if the switch is in close position it is possible
to execute a close command.
Before an execution command, an evaluation of the position is done. If the

parameter PosDependent is true and the position is in intermediate state or in bad
state no execution command is sent. If the parameter is false the execution
command is sent independent of the position value.
Evaluation of position
In the case when there are three one-phase switches connected to the switch control
function, the switch control will "merge" the position of the three switches to the
resulting three-phase position. In the case when the position differ between the one-
phase switches, following principles will be applied:
The position output from switch (SXCBR or SXSWI) is connected to SCSWI.

With the group signal connection the SCSWI obtains the position, time stamps and
quality attributes of the position which is used for further evaluation.
All switches in open position: switch control position = open

All switches in close position: switch control position = close
One switch =open, two switches= close (or switch control position = intermediate
inversely):
Any switch in intermediate position: switch control position = intermediate
Any switch in bad state: switch control position = bad state
525
Control
The time stamp of the output three-phase position from switch control will have the
time stamp of the last changed phase when it goes to end position. When it goes to
intermediate position or bad state, it will get the time stamp of the first changed phase.
In addition, there is also the possibility that one of the one-phase switches will
change position at any time due to a trip. Such situation is here called pole
discordance and is supervised by this function. In case of a pole discordance
situation, that is, the position of the one-phase switches are not equal for a time
longer than the setting tPoleDiscord, an error signal POLEDISC will be set.
In the supervision phase, the switch controller function evaluates the "cause"
values from the switch modules Circuit breaker (SXCBR)/ Circuit switch
(SXSWI). At error the "cause" value with highest priority is shown.
Blocking principles
The blocking signals are normally coming from the bay control function (QCBAY)
and via the IEC 61850 communication from the operator place.
The different blocking possibilities are:
• Block/deblock of command. It is used to block command for operation of

position.
61850). If DO Behavior is set to "blocked" it means that the function is active,
but no outputs are generated, no reporting, control commands are rejected and
functional and configuration data is visible.
The different block conditions will only affect the operation of this
function, that is, no blocking signals will be "forwarded" to other
functions. The above blocking outputs are stored in a non-volatile
memory.
Interaction with synchrocheck and synchronizing functions

The Switch controller (SCSWI) works in conjunction with the synchrocheck and
the synchronizing function (SESRSYN). It is assumed that the synchrocheck
function is continuously in operation and gives the result to SCSWI. The result
from the synchrocheck function is evaluated during the close execution. If the
operator performs an override of the synchrocheck, the evaluation of the
synchrocheck state is omitted. When there is a positive confirmation from the
synchrocheck function, SCSWI will send the close signal EXE_CL to the switch
function Circuit breaker (SXCBR).
When there is no positive confirmation from the synchrocheck function, SCSWI

will send a start signal START_SY to the synchronizing function, which will send
the closing command to SXCBR when the synchronizing conditions are fulfilled,
see figure 285. If no synchronizing function is included, the timer for supervision
of the "synchronizing in progress signal" is set to 0, which means no start of the
526
Control
synchronizing function. SCSWI will then set the attribute "blocked-by-

synchrocheck" in the "cause" signal. See also the time diagram in figure 289.
SCSWI SXCBR
EXE_CL
OR CLOSE
SYNC_OK
START_SY
SY_INPRO
SESRSYN
CLOSECB
Synchro Synchronizing
check function
IEC09000209 V1 EN
Figure 285: Example of interaction between SCSWI, SESRSYN (synchrocheck

and synchronizing function) and SXCBR function
Time diagrams
The Switch controller (SCSWI) function has timers for evaluating different time
supervision conditions. These timers are explained here.
The timer tSelect is used for supervising the time between the select and the
execute command signal, that is, the time the operator has to perform the command
execution after the selection of the object to operate.
select
execute command
tSelect
timer t1 t1>tSelect, then long-
operation-time in 'cause'
is set
en05000092.vsd
IEC05000092 V1 EN
Figure 286: tSelect
The parameter tResResponse is used to set the maximum allowed time to make the
reservation, that is, the time between reservation request and the feedback
reservation granted from all bays involved in the reservation function.
527
Control
select
reservation request RES_RQ
reservation granted RES_GRT
command termination
tResResponse t1>tResResponse, then
timer 1-of-n-control in 'cause'
t1 is set
en05000093.vsd
IEC05000093 V1 EN
Figure 287: tResResponse
The timer tExecutionFB supervises the time between the execute command and the
command termination, see figure 288.
execute command
position L1 open
close
position L2 open
close
position L3 open
close
cmd termination L1
cmd termination L2
cmd termination L3
cmd termination *
position open
close
tExecutionFB t1>tExecutionFB, then

timer long-operation-time in
t1 'cause' is set
* The cmd termination will be delayed one execution sample.

en05000094.vsd
IEC05000094 V1 EN
Figure 288: tExecutionFB
The parameter tSynchrocheck is used to define the maximum allowed time between
the execute command and the input SYNC_OK to become true. If SYNC_OK=true
at the time the execute command signal is received, the timer "tSynchrocheck" will
not start. The start signal for the synchronizing is obtained if the synchrocheck
conditions are not fulfilled.
528
Control
execute command
SYNC_OK
tSynchrocheck
t1
START_SY
SY_INPRO
tSynchronizing t2>tSynchronizing, then

t2 blocked-by-synchrocheck in
'cause' is set
en05000095.vsd
IEC05000095 V1 EN
Figure 289: tSynchroCheck and tSynchronizing

SCSWI
BLOCK EXE_OP
PSTO EXE_CL
L_SEL SELECTED
L_OPEN RES_RQ
L_CLOSE START_SY
AU_OPEN POSITION
AU_CLOSE OPENPOS
BL_CMD CLOSEPOS
RES_GRT POLEDISC
RES_EXT CMD_BLK
SY_INPRO L_CAUSE
SYNC_OK XOUT
EN_OPEN POS_INTR
EN_CLOSE
XPOS1
XPOS2
XPOS3
IEC05000337 V2 EN
Figure 290: SCSWI function block

Table 308: SCSWI Input signals
PSTO INTEGER 2 Operator place selection
L_SEL BOOLEAN 0 Select signal from local panel
L_OPEN BOOLEAN 0 Open signal from local panel
L_CLOSE BOOLEAN 0 Close signal from local panel
AU_OPEN BOOLEAN 0 Used for local automation function
AU_CLOSE BOOLEAN 0 Used for local automation function
BL_CMD BOOLEAN 0 Steady signal for block of the command
529
Control

RES_GRT BOOLEAN 0 Positive acknowledge that all reservations are
made
RES_EXT BOOLEAN 0 Reservation is made externally
SY_INPRO BOOLEAN 0 Synchronizing function in progress
SYNC_OK BOOLEAN 0 Closing is permitted at set to true by the
synchrocheck
EN_OPEN BOOLEAN 0 Enables open operation
EN_CLOSE BOOLEAN 0 Enables close operation
XPOS1 GROUP - Pos 1
SIGNAL
XPOS2 GROUP - Pos 2
SIGNAL
XPOS3 GROUP - Pos 3
SIGNAL
Table 309: SCSWI Output signals

EXE_OP BOOLEAN Execute command for open direction
EXE_CL BOOLEAN Execute command for close direction
SELECTED BOOLEAN The select conditions are fulfilled
RES_RQ BOOLEAN Request signal to the reservation function
START_SY BOOLEAN Starts the synchronizing function
POSITION INTEGER Position indication
OPENPOS BOOLEAN Open position indication
CLOSEPOS BOOLEAN Closed position indication
POLEDISC BOOLEAN The positions for poles L1-L3 are not equal after
a set time
CMD_BLK BOOLEAN Commands are blocked
L_CAUSE INTEGER Latest value of the error indication during command
XOUT BOOLEAN Execution information to XCBR/XSWI
POS_INTR BOOLEAN Stopped in intermediate position
530
Control

Table 310: SCSWI Non group settings (basic)
CtlModel Dir Norm - - SBO Enh Specifies the type for control model
SBO Enh (ABB) according to IEC 61850
Dir Norm (ABB)
SBO Enh
PosDependent Always permitted - - Always permitted Permission to operate depending on the
Not perm at 00/11 position
tSelect 0.000 - 60.000 s 0.001 30.000 Max time between select and execute
signals
tResResponse 0.000 - 60.000 s 0.001 5.000 Allowed time from reservation request to
reservation granted
tSynchrocheck 0.00 - 600.00 s 0.01 10.00 Allowed time for synchrocheck to fulfil
close conditions
tSynchronizing 0.00 - 600.00 s 0.01 0.00 Supervision time to get the signal
synchronizing in progress
tExecutionFB 0.00 - 600.00 s 0.01 30.00 Max time from command execution to
termination
tPoleDiscord 0.000 - 60.000 s 0.001 2.000 Allowed time to have discrepancy
between the poles
12.3.7 Circuit breaker SXCBR
The purpose of Circuit breaker (SXCBR) is to provide the actual status of positions
and to perform the control operations, that is, pass all the commands to primary
apparatuses in the form of circuit breakers via output boards and to supervise the
switching operation and position.
The users of the Circuit breaker function (SXCBR) is other functions such as for
example, switch controller, protection functions, autorecloser function or an IEC
61850 client residing in another IED or the operator place. This switch function
executes commands, evaluates block conditions and evaluates different time
supervision conditions. Only if all conditions indicate a switch operation to be
allowed, the function performs the execution command. In case of erroneous
conditions, the function indicates an appropriate "cause" value.
SXCBR has an operation counter for closing and opening commands. The counter
value can be read remotely from the operator place. The value is reset from a
binary input or remotely from the operator place by configuring a signal from the
Single Point Generic Control 8 signals (SPC8GGIO) for example.
531
Control
Local/Remote switch
One binary input signal LR_SWI is included in SXCBR to indicate the local/
remote switch position from switchyard provided via the I/O board. If this signal is
set to TRUE it means that change of position is allowed only from switchyard
level. If the signal is set to FALSE it means that command from IED or higher
level is permitted. When the signal is set to TRUE all commands (for change of
position) from internal IED clients are rejected, even trip commands from
protection functions are rejected. The functionality of the local/remote switch is
described in figure 291.
Local= Operation at
RU
E switch yard level
T
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
IEC05000096 V1 EN
Figure 291: Local/Remote switch
Blocking principles
SXCBR includes several blocking principles. The basic principle for all blocking
signals is that they will affect commands from all other clients for example,
operators place, protection functions, autoreclosure and so on.
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for open

command. Note that this block signal also affects the input OPEN for
immediate command.
• Block/deblock for close command. It is used to block operation for close
command. Note that this block signal also affects the input CLOSE for
immediate command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
The above blocking outputs are stored in a non-volatile memory.
Substitution
The substitution part in SXCBR is used for manual set of the position for the
switch. The typical use of substitution is that an operator enters a manual value
because that the real process value is erroneous for some reason. SXCBR will then
532
Control
use the manually entered value instead of the value for positions determined by the
process.
It is always possible to make a substitution, independently of the

position indication and the status information of the I/O board.
When substitution is enabled, the position values are blocked for
updating and other signals related to the position are reset. The
substituted values are stored in a non-volatile memory.
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and
tIntermediate. tStartMove supervises that the primary device starts moving after the
execute output pulse is sent. tIntermediate defines the maximum allowed time for
intermediate position. Figure 292 explains these two timers during the execute phase.
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
t1 attribute in 'cause' is set
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
IEC05000097 V1 EN
Figure 292: The timers tStartMove and tIntermediate
The timers tOpenPulse and tClosePulse are the length of the execute output pulses
to be sent to the primary equipment. Note that the output pulses for open and close
command can have different pulse lengths. The pulses can also be set to be
adaptive with the configuration parameter AdaptivePulse. Figure 293 shows the
principle of the execute output pulse. The AdaptivePulse parameter will have affect
on both execute output pulses.
533
Control
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
IEC05000098 V1 EN
Figure 293: Execute output pulse
If the pulse is set to be adaptive, it is not possible for the pulse to exceed
tOpenPulse or tClosePulse.
The execute output pulses are reset when:
• the new expected final position is reached and the configuration parameter
AdaptivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, that is, tStartMove has
elapsed.
There is one exception from the first item above. If the primary device is in open
position and an open command is executed or if the primary device is in closed
position and a close command is executed. In these cases, with the additional
condition that the configuration parameter AdaptivePulse is true, the execute output
pulse is always activated and resets when tStartMove has elapsed. If the
configuration parameter AdaptivePulse is set to false the execution output remains
active until the pulse duration timer has elapsed.
If the start position indicates bad state (OPENPOS=1 and

CLOSEPOS =1) when a command is executed the execute output
pulse resets only when timer tOpenPulse or tClosePulse has elapsed.
An example of when a primary device is open and an open command is executed is

shown in figure 294 .
534
Control
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
IEC05000099 V1 EN
Figure 294: Open command with open position indication

SXCBR
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOPEN POSITION
POSCLOSE OPENPOS
TR_OPEN CLOSEPOS
TR_CLOSE TR_POS
RS_CNT CNT_VAL
XIN L_CAUSE
IEC05000338 V2 EN
Figure 295: SXCBR function block

Table 311: SXCBR Input signals
LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
535
Control

POSOPEN BOOLEAN 0 Signal for open position of apparatus from I/O
POSCLOSE BOOLEAN 0 Signal for close position of apparatus from I/O
TR_OPEN BOOLEAN 0 Signal for open position of truck from I/O
TR_CLOSE BOOLEAN 0 Signal for close position of truck from I/O
RS_CNT BOOLEAN 0 Resets the operation counter
XIN BOOLEAN 0 Execution information from CSWI
Table 312: SXCBR Output signals

XPOS GROUP SIGNAL Group signal for XCBR output
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
OP_BLKD BOOLEAN Indication that the function is blocked for open
commands
CL_BLKD BOOLEAN Indication that the function is blocked for close
commands
UPD_BLKD BOOLEAN The update of position indication is blocked
POSITION INTEGER Apparatus position indication
OPENPOS BOOLEAN Apparatus open position
CLOSEPOS BOOLEAN Apparatus closed position
TR_POS INTEGER Truck position indication
CNT_VAL INTEGER The value of the operation counter

Table 313: SXCBR Non group settings (basic)
tStartMove 0.000 - 60.000 s 0.001 0.100 Supervision time for the apparatus to
move after a command
tIntermediate 0.000 - 60.000 s 0.001 0.150 Allowed time for intermediate position
AdaptivePulse Not adaptive - - Not adaptive The output resets when a new correct
Adaptive end position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close command
12.3.8 Circuit switch SXSWI
536
Control
The purpose of Circuit switch (SXSWI) function is to provide the actual status of
positions and to perform the control operations, that is, pass all the commands to
primary apparatuses in the form of disconnectors or earthing switches via output
boards and to supervise the switching operation and position.
The users of the Circuit switch (SXSWI) is other functions such as for example,
switch controller, protection functions, autorecloser function, or a 61850 client
residing in another IED or the operator place. SXSWI executes commands,
evaluates block conditions and evaluates different time supervision conditions.
Only if all conditions indicate a switch operation to be allowed, SXSWI performs
the execution command. In case of erroneous conditions, the function indicates an
appropriate "cause" value.
SXSWI has an operation counter for closing and opening commands. The counter
value can be read remotely from the operator place. The value is reset from a
binary input or remotely from the operator place by configuring a signal from the
Single Point Generic Control 8 signals (SPC8GGIO) for example.
Local/Remote switch
One binary input signal LR_SWI is included in SXSWI to indicate the local/remote
switch position from switchyard provided via the I/O board. If this signal is set to
TRUE it means that change of position is allowed only from switchyard level. If
the signal is set to FALSE it means that command from IED or higher level is
permitted. When the signal is set to TRUE all commands (for change of position)
from internal IED clients are rejected, even trip commands from protection
functions are rejected. The functionality of the local/remote switch is described in
figure 296.
Local= Operation at
RU
E switch yard level
T
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
IEC05000096 V1 EN
Figure 296: Local/Remote switch
Blocking principles
SXSWI includes several blocking principles. The basic principle for all blocking
signals is that they will affect commands from all other clients for example,
operators place, protection functions, autorecloser and so on.
537
Control
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for open

command. Note that this block signal also affects the input OPEN for
immediate command.
• Block/deblock for close command. It is used to block operation for close
command. Note that this block signal also affects the input CLOSE for
immediate command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
The above blocking outputs are stored in a non-volatile memory.
Substitution
The substitution part in SXSWI is used for manual set of the position for the
switch. The typical use of substitution is that an operator enters a manual value
because the real process value is erroneous of some reason. SXSWI will then use
the manually entered value instead of the value for positions determined by the
process.
It is always possible to make a substitution, independently of the

position indication and the status information of the I/O board.
When substitution is enabled, the position values are blocked for
updating and other signals related to the position are reset. The
substituted values are stored in a non-volatile memory.
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and
tIntermediate. tStartMove supervises that the primary device starts moving after the
execute output pulse is sent. tIntermediate defines the maximum allowed time for
intermediate position. Figure 297 explains these two timers during the execute phase.
538
Control
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
IEC05000097 V1 EN
Figure 297: The timers tStartMove and tIntermediate
The timers tOpenPulse and tClosePulse are the length of the execute output pulses
to be sent to the primary equipment. Note that the output pulses for open and close
command can have different pulse lengths. The pulses can also be set to be
adaptive with the configuration parameter AdaptivePulse. Figure 298 shows the
principle of the execute output pulse. The AdaptivePulse parameter will have affect
on both execute output pulses.
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
IEC05000098 V1 EN
Figure 298: Execute output pulse
If the pulse is set to be adaptive, it is not possible for the pulse to exceed
tOpenPulse or tClosePulse.
The execute output pulses are reset when:
539
Control
If the start position indicates bad state (OPENPOS=1 and

CLOSEPOS =1) when a command is executed the execute output
pulse resets only when timer tOpenPulse or tClosePulse has elapsed.
• the new expected final position is reached and the configuration parameter
AdaptivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, that is, tStartMove has
elapsed.
There is one exception from the first item above. If the primary device is in open
position and an open command is executed or if the primary device is in close
position and a close command is executed. In these cases, with the additional
condition that the configuration parameter AdaptivePulse is true, the execute output
pulse is always activated and resets when tStartMove has elapsed. If the
configuration parameter AdaptivePulse is set to false the execution output remains
active until the pulse duration timer has elapsed.
An example when a primary device is open and an open command is executed is

OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
IEC05000099 V1 EN
Figure 299: Open command with open position indication
540
Control

SXSWI
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOPEN POSITION
POSCLOSE OPENPOS
RS_CNT CLOSEPOS
XIN CNT_VAL
L_CAUSE
IEC05000339 V2 EN
Figure 300: SXSWI function block

Table 314: SXSWI Input signals
LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
POSOPEN BOOLEAN 0 Signal for open position of apparatus from I/O
POSCLOSE BOOLEAN 0 Signal for close position of apparatus from I/O
RS_CNT BOOLEAN 0 Resets the operation counter
XIN BOOLEAN 0 Execution information from CSWI
Table 315: SXSWI Output signals

XPOS GROUP SIGNAL Group signal for XSWI output
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
OP_BLKD BOOLEAN Indication that the function is blocked for open
commands
CL_BLKD BOOLEAN Indication that the function is blocked for close
commands
UPD_BLKD BOOLEAN The update of position indication is blocked
POSITION INTEGER Apparatus position indication
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Control

OPENPOS BOOLEAN Apparatus open position
CLOSEPOS BOOLEAN Apparatus closed position
CNT_VAL INTEGER The value of the operation counter

Table 316: SXSWI Non group settings (basic)
tStartMove 0.000 - 60.000 s 0.001 3.000 Supervision time for the apparatus to
move after a command
tIntermediate 0.000 - 60.000 s 0.001 15.000 Allowed time for intermediate position
AdaptivePulse Not adaptive - - Not adaptive The output resets when a new correct
Adaptive end position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close command
SwitchType Load Break - - Disconnector Switch Type
Disconnector
Earthing Switch
HS Earthing Switch
12.3.9 Bay reserve QCRSV
The purpose of the reservation function is primarily to transfer interlocking

information between IEDs in a safe way and to prevent double operation in a bay,
switchyard part, or complete substation.
The Bay reserve (QCRSV) function handles the reservation. QCRSV function
starts to operate in two ways. It starts when there is a request for reservation of the
own bay or if there is a request for reservation from another bay. It is only possible
to reserve the function if it is not currently reserved. The signal that can reserve the
own bay is the input signal RES_RQx (x=1-8) coming from switch controller
(SCWI). The signals for request from another bay are the outputs RE_RQ_B and
V_RE_RQ from function block RESIN. These signals are included in signal
EXCH_OUT from RESIN and are connected to RES_DATA in QCRSV.
The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay
only (TRUE) or other bays (FALSE). To reserve the own bay only means that no
reservation request RES_BAYS is created.
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Control
Reservation request of own bay

If the reservation request comes from the own bay, the function QCRSV has to
know which apparatus the request comes from. This information is available with
the input signal RES_RQx and parameter ParamRequestx (where x=1-8 is the
number of the requesting apparatus). In order to decide if a reservation request of
the current bay can be permitted QCRSV has to know whether the own bay already
is reserved by itself or another bay. This information is available in the output
signal RESERVED.
If the RESERVED output is not set, the selection is made with the output
RES_GRTx (where x=1-8 is the number of the requesting apparatus), which is
connected to switch controller SCSWI. If the bay already is reserved the command
sequence will be reset and the SCSWI will set the attribute "1-of-n-control" in the
"cause" signal.
Reservation of other bays

When the function QCRSV receives a request from an apparatus in the own bay
that requires other bays to be reserved as well, it checks if it already is reserved. If
not, it will send a request to the other bays that are predefined (to be reserved) and
wait for their response (acknowledge). The request of reserving other bays is done
by activating the output RES_BAYS.
When it receives acknowledge from the bays via the input RES_DATA, it sets the
output RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not
acknowledgement from all bays is received within a certain time defined in SCSWI
(tResResponse), the SCSWI will reset the reservation and set the attribute "1-of-n-
control" in the "cause" signal.
Reservation request from another bay

When another bay requests for reservation, the input BAY_RES in corresponding
function block RESIN is activated. The signal for reservation request is grouped
into the output signal EXCH_OUT in RESIN, which is connected to input
RES_DATA in QCRSV. If the bay is not reserved, the bay will be reserved and the
acknowledgment from output ACK_T_B is sent back to the requested bay. If the
bay already is reserved the reservation is kept and no acknowledgment is sent.
Blocking and overriding of reservation

If QCRSV function is blocked (input BLK_RES is set to true) the reservation is
blocked. That is, no reservation can be made from the own bay or any other bay.
This can be set, for example, via a binary input from an external device to prevent
operations from another operator place at the same time.
The reservation function can also be overridden in the own bay with the
OVERRIDE input signal, that is, reserving the own bay without waiting for the
external acknowledge.
Bay with more than eight apparatuses

If only one instance of QCRSV is used for a bay that is, use of up to eight
apparatuses, the input EXCH_IN must be set to FALSE.
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If there are more than eight apparatuses in the bay there has to be one additional
QCRSV. The two QCRSV functions have to communicate and this is done through
the input EXCH_IN and EXCH_OUT according to figure 301. If more then one
QCRSV are used, the execution order is very important. The execution order must
be in the way that the first QCRSV has a lower number than the next one.
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_BAYS
RES_RQ2 RES_GRT3 ³1
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6 ACK_TO_B
RES_RQ6 RES_GRT7 ³1
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B RESERVED
³1
OVERRIDE RESERVED
RES_DATA EXCH_OUT
IEC05000088 V2 EN
Figure 301: Connection of two QCRSV function blocks

QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
IEC05000340 V2 EN
Figure 302: QCRSV function block
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Control

Table 317: QCRSV Input signals
EXCH_IN INTEGER 0 Used for exchange signals between different
BayRes blocks
RES_RQ1 BOOLEAN 0 Signal for app. 1 that requests to do a reservation
BLK_RES BOOLEAN 0 Reservation is not possible and the output signals
are reset
OVERRIDE BOOLEAN 0 Signal to override the reservation
RES_DATA INTEGER 0 Reservation data coming from function block ResIn
Table 318: QCRSV Output signals

RES_GRT1 BOOLEAN Reservation is made and the app. 1 is allowed to
operate
operate
operate
operate
operate
operate
operate
operate
RES_BAYS BOOLEAN Request for reservation of other bays
ACK_TO_B BOOLEAN Acknowledge to other bays that this bay is reserved
RESERVED BOOLEAN Indicates that the bay is reserved
EXCH_OUT INTEGER Used for exchange signals between different
BayRes blocks
545
Control

Table 319: QCRSV Non group settings (basic)
tCancelRes 0.000 - 60.000 s 0.001 10.000 Supervision time for canceling the
reservation
ParamRequest1 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 1
12.3.10 Reservation input RESIN
The Reservation input (RESIN) function receives the reservation information from
other bays. The number of instances is the same as the number of involved bays
(up to 60 instances are available).
The reservation input (RESIN) function is based purely on Boolean logic

conditions. The logic diagram in figure 303 shows how the output signals are
created. The inputs of the function block are connected to a receive function block
representing signals transferred over the station bus from another bay.
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Control
EXCH_IN INT
BIN
ACK_F_B
&
FutureUse
³1
ANY_ACK
BAY_ACK ³1
VALID_TX
&
BAY_VAL ³1
RE_RQ_B
³1
BAY_RES &
V _RE_RQ
³1
BIN
EXCH_OUT
INT
en05000089.vsd
IEC05000089 V1 EN
Figure 303: Logic diagram for RESIN
Figure 304 describes the principle of the data exchange between all RESIN
modules in the current bay. There is one RESIN function block per "other bay"
used in the reservation mechanism. The output signal EXCH_OUT in the last
RESIN functions are connected to the module bay reserve (QCRSV) that handles
the reservation function in the own bay. The value to the input EXCH_IN on the
first RESIN module in the chain has the integer value 5. This is provided by the use
of instance number one of the function block RESIN, where the input EXCH_IN is
set to #5, but is hidden for the user.
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Control
RESIN
BAY_ACK ACK_F_B
Bay 1 BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay 2 BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay n BAY_VAL VALID_TX
BAY_RES RE_RQ_B QCRSV
V_RE_RQ
EXCH_OUT RES_DATA
en05000090.vsd
IEC05000090 V2 EN
Figure 304: Diagram of the chaining principle for RESIN

RESIN1
BAY_ACK ACK_F_B
BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
IEC05000341 V2 EN
Figure 305: RESIN1 function block
RESIN2
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
IEC09000807 V1 EN
Figure 306: RESIN2 function block
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Control

Table 320: RESIN1 Input signals
BAY_ACK BOOLEAN 0 Another bay has acknow. the reservation req.
from this bay
BAY_VAL BOOLEAN 0 The reserv. and acknow. signals from another
bay are valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay
Table 321: RESIN1 Output signals

ACK_F_B BOOLEAN All other bays have acknow. the reserv. req. from
this bay
ANY_ACK BOOLEAN Any other bay has acknow. the reserv. req. from
this bay
VALID_TX BOOLEAN The reserv. and acknow. signals from other bays
are valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
ResIn blocks
Table 322: RESIN2 Input signals

EXCH_IN INTEGER 5 Used for exchange signals between different
ResIn blocks
BAY_ACK BOOLEAN 0 Another bay has acknow. the reservation req.
from this bay
BAY_VAL BOOLEAN 0 The reserv. and acknow. signals from another
bay are valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay
Table 323: RESIN2 Output signals

ACK_F_B BOOLEAN All other bays have acknow. the reserv. req. from
this bay
ANY_ACK BOOLEAN Any other bay has acknow. the reserv. req. from
this bay
VALID_TX BOOLEAN The reserv. and acknow. signals from other bays
are valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
ResIn blocks
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Control

Table 324: RESIN1 Non group settings (basic)
FutureUse Bay in use - - Bay in use The bay for this ResIn block is for future
Bay future use use
Table 325: RESIN2 Non group settings (basic)

FutureUse Bay in use - - Bay in use The bay for this ResIn block is for future
Bay future use use
12.4 Interlocking
12.4.1 Introduction
The interlocking function blocks the possibility to operate high-voltage switching
devices, for instance when a disconnector is under load, in order to prevent
material damage and/or accidental human injury.
Each control IED has interlocking functions for different switchyard arrangements,
each handling the interlocking of one bay. The function is distributed to each
control IED and not dependent on any central function. For the station-wide
interlocking, the IEDs communicate via the station bus or by using hard wired
binary inputs/outputs.
The interlocking conditions depend on the circuit configuration and status of the
installation at any given time.

The interlocking function consists of software modules located in each control
IED. The function is distributed and not dependent on any central function.
Communication between modules in different bays is performed via the station bus.
The reservation function (see section "Introduction") is used to ensure that HV

apparatuses that might affect the interlock are blocked during the time gap, which
arises between position updates. This can be done by means of the communication
system, reserving all HV apparatuses that might influence the interlocking
condition of the intended operation. The reservation is maintained until the
operation is performed.
After the selection and reservation of an apparatus, the function has complete data
on the status of all apparatuses in the switchyard that are affected by the selection.
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Control
Other operators cannot interfere with the reserved apparatus or the status of
switching devices that may affect it.
The open or closed positions of the HV apparatuses are inputs to software modules
distributed in the control IEDs. Each module contains the interlocking logic for a
bay. The interlocking logic in a module is different, depending on the bay function
and the switchyard arrangements, that is, double-breaker or 1 1/2 breaker bays have
different modules. Specific interlocking conditions and connections between
standard interlocking modules are performed with an engineering tool. Bay-level
interlocking signals can include the following kind of information:
• Positions of HV apparatuses (sometimes per phase)

• Valid positions (if evaluated in the control module)
• External release (to add special conditions for release)
• Line voltage (to block operation of line earthing switch)
• Output signals to release the HV apparatus
The interlocking module is connected to the surrounding functions within a bay as

Apparatus control
Interlocking
modules
modules in
SCILO SCSWI
other bays SXSWI
Apparatus control
modules
Interlocking SCILO SCSWI SXCBR
module
Apparatus control
modules
en04000526.vsd SCILO SCSWI SXSWI
IEC04000526 V1 EN
Figure 307: Interlocking module on bay level
Bays communicate via the station bus and can convey information regarding the
following:
• Unearthed busbars
• Busbars connected together
• Other bays connected to a busbar
• Received data from other bays is valid
Figure 308 illustrates the data exchange principle.
551
Control
Station bus
Bay 1 Bay n Bus coupler
Disc QB1 and QB2 closed Disc QB1 and QB2 closed WA1 unearthed
WA1 unearthed
WA1 and WA2 interconn
...
WA1 not earthed WA1 not earthed
WA2 not earthed WA2 not earthed WA1 and WA2 interconn
WA1 and WA2 interconn WA1 and WA2 interconn in other bay
..
WA1
WA2
QB1 QB2 QB1 QB2 QB1 QB2 QC1 QC2
QA1 QA1 QA1
QB9 QB9
en05000494.vsd
IEC05000494 V1 EN
Figure 308: Data exchange between interlocking modules
When invalid data such as intermediate position, loss of a control IED, or input
board error are used as conditions for the interlocking condition in a bay, a release
for execution of the function will not be given.
On the local HMI an override function exists, which can be used to bypass the
interlocking function in cases where not all the data required for the condition is valid.
For all interlocking modules these general rules apply:
• The interlocking conditions for opening or closing of disconnectors and

earthing switches are always identical.
• Earthing switches on the line feeder end, for example, rapid earthing switches,
are normally interlocked only with reference to the conditions in the bay where
they are located, not with reference to switches on the other side of the line. So
a line voltage indication may be included into line interlocking modules. If
there is no line voltage supervision within the bay, then the appropriate inputs
must be set to no voltage, and the operator must consider this when operating.
• Earthing switches can only be operated on isolated sections for example,
without load/voltage. Circuit breaker contacts cannot be used to isolate a
section, that is, the status of the circuit breaker is irrelevant as far as the
earthing switch operation is concerned.
• Disconnectors cannot break power current or connect different voltage
systems. Disconnectors in series with a circuit breaker can only be operated if
the circuit breaker is open, or if the disconnectors operate in parallel with other
closed connections. Other disconnectors can be operated if one side is
completely isolated, or if the disconnectors operate in parallel to other closed
connections, or if they are earthed on both sides.
• Circuit breaker closing is only interlocked against running disconnectors in its
bay or additionally in a transformer bay against the disconnectors and earthing
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Control
switch on the other side of the transformer, if there is no disconnector between

CB and transformer.
• Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar
transfer is in progress.
To make the implementation of the interlocking function easier, a number of

standardized and tested software interlocking modules containing logic for the
interlocking conditions are available:
• Line for double and transfer busbars, ABC_LINE

• Bus for double and transfer busbars, ABC_BC
• Transformer bay for double busbars, AB_TRAFO
• Bus-section breaker for double busbars, A1A2_BS
• Bus-section disconnector for double busbars, A1A2_DC
• Busbar earthing switch, BB_ES
• Double CB Bay, DB_BUS_A, DB_LINE, DB_BUS_B
• 1 1/2-CB diameter, BH_LINE_A, BH_CONN, BH_LINE_B
The interlocking conditions can be altered, to meet the customer specific

requirements, by adding configurable logic by means of the graphical configuration
tool PCM600. The inputs Qx_EXy on the interlocking modules are used to add
these specific conditions.
The input signals EXDU_xx shall be set to true if there is no transmission error at
the transfer of information from other bays. Required signals with designations
ending in TR are intended for transfer to other bays.
12.4.3 Logical node for interlocking SCILO
The Logical node for interlocking SCILO function is used to enable a switching
operation if the interlocking conditions permit. SCILO function itself does not
provide any interlocking functionality. The interlocking conditions are generated in
separate function blocks containing the interlocking logic.
The function contains logic to enable the open and close commands respectively if
the interlocking conditions are fulfilled. That means also, if the switch has a
defined end position for example, open, then the appropriate enable signal (in this
case EN_OPEN) is false. The enable signals EN_OPEN and EN_CLOSE can be
true at the same time only in the intermediate and bad position state and if they are
enabled by the interlocking function. The position inputs come from the logical
nodes Circuit breaker/Circuit switch (SXCBR/SXSWI) and the enable signals
553
Control
come from the interlocking logic. The outputs are connected to the logical node
Switch controller (SCSWI). One instance per switching device is needed.
POSOPEN SCILO
POSCLOSE =1 1
EN_OPEN
&
>1
&
OPEN_EN
CLOSE_EN & EN_CLOSE
>1
&
en04000525.vsd
IEC04000525 V1 EN
Figure 309: SCILO function logic diagram

SCILO
POSOPEN EN_OPEN
POSCLOSE EN_CLOSE
OPEN_EN
CLOSE_EN
IEC05000359 V2 EN
Figure 310: SCILO function block

Table 326: SCILO Input signals
POSOPEN BOOLEAN 0 Open position of switch device
POSCLOSE BOOLEAN 0 Closed position of switch device
OPEN_EN BOOLEAN 0 Open operation from interlocking logic is enabled
CLOSE_EN BOOLEAN 0 Close operation from interlocking logic is enabled
Table 327: SCILO Output signals

EN_OPEN BOOLEAN Open operation at closed or interm. or bad pos. is
enabled
EN_CLOSE BOOLEAN Close operation at open or interm. or bad pos. is
enabled
12.4.4 Interlocking for busbar earthing switch BB_ES
554
Control
The interlocking for busbar earthing switch (BB_ES) function is used for one
busbar earthing switch on any busbar parts according to figure 311.
QC
en04000504.vsd
IEC04000504 V1 EN
Figure 311: Switchyard layout BB_ES

BB_ES
QC_OP QCREL
QC_CL QCITL
BB_DC_OP BBESOPTR
VP_BB_DC BBESCLTR
EXDU_BB
IEC05000347 V2 EN
Figure 312: BB_ES function block

BB_ES
VP_BB_DC QCREL
BB_DC_OP QCITL
EXDU_BB & 1
QC_OP BBESOPTR
QC_CL BBESCLTR
en04000546.vsd
IEC04000546 V1 EN

Table 328: BB_ES Input signals
QC_OP BOOLEAN 0 Busbar earthing switch QC is in open position
QC_CL BOOLEAN 0 Busbar earthing switch QC is in closed position
BB_DC_OP BOOLEAN 0 All disconnectors on this busbar part are open
VP_BB_DC BOOLEAN 0 Status for all disconnectors on this busbar part
are valid
EXDU_BB BOOLEAN 0 No transm error from bays with disc on this
busbar part
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Control
Table 329: BB_ES Output signals

QCREL BOOLEAN Switching of QC is allowed
QCITL BOOLEAN Switching of QC is forbidden
BBESOPTR BOOLEAN QC on this busbar part is in open position
BBESCLTR BOOLEAN QC on this busbar part is in closed position
12.4.5 Interlocking for bus-section breaker A1A2_BS
The interlocking for bus-section breaker (A1A2_BS) function is used for one bus-
section circuit breaker between section 1 and 2 according to figure 313. The
function can be used for different busbars, which includes a bus-section circuit
breaker.
WA1 (A1) WA2 (A2)
QC1 QB1 QB2 QC2
QA1
QC3 QC4
en04000516.vsd
A1A2_BS
IEC04000516 V1 EN
Figure 313: Switchyard layout A1A2_BS
556
Control

A1A2_BS
QA1_OP QA1OPREL
QA1_CL QA1OPITL
QB1_OP QA1CLREL
QB1_CL QA1CLITL
QB2_OP QB1REL
QB2_CL QB1ITL
QC3_OP QB2REL
QC3_CL QB2ITL
QC4_OP QC3REL
QC4_CL QC3ITL
S1QC1_OP QC4REL
S1QC1_CL QC4ITL
S2QC2_OP S1S2OPTR
S2QC2_CL S1S2CLTR
BBTR_OP QB1OPTR
VP_BBTR QB1CLTR
EXDU_12 QB2OPTR
EXDU_ES QB2CLTR
QA1O_EX1 VPS1S2TR
QA1O_EX2 VPQB1TR
QA1O_EX3 VPQB2TR
QB1_EX1
QB1_EX2
QB2_EX1
QB2_EX2
IEC05000348 V2 EN
Figure 314: A1A2_BS function block
557
Control

A1A2_BS
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC3_OP
QC3_CL =1 VPQC3
QC4_OP
QC4_CL =1 VPQC4
S1QC1_OP
S1QC1_CL =1 VPS1QC1
S2QC2_OP
S2QC2_CL =1 VPS2QC2
VPQB1
QB1_OP QA1OPREL
& >1
QA1O_EX1 QA1OPITL
1
VPQB2
QB2_OP
&
QA1O_EX2
VP_BBTR
BBTR_OP
&
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 & QA1CLITL
1
VPQA1
VPQC3 QB1REL
& >1
VPQC4 QB1ITL
1
VPS1QC1
QA1_OP
QC3_OP
QC4_OP
S1QC1_OP
EXDU_ES
QB1_EX1
VPQC3
VPS1QC1
&
QC3_CL
S1QC1_CL
EXDU_ES
QB1_EX2
en04000542.vsd
IEC04000542 V1 EN
558
Control
VPQA1
VPQC3 QB2REL
VPQC4 & >1
QB2ITL
VPS2QC2 1
QA1_OP
QC3_OP
QC4_OP
S2QC2_OP
EXDU_ES
QB2_EX1
VPQC4
VPS2QC2
&
QC4_CL
S2QC2_CL
EXDU_ES
QB2_EX2
VPQB1 QC3REL
VPQB2 QC3ITL
QB1_OP & 1
QC4REL
QB2_OP
QC4ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP S1S2OPTR
QB2_OP >1 S1S2CLTR
QA1_OP 1
VPQB1
VPS1S2TR
VPQB2 &
VPQA1
en04000543.vsd
IEC04000543 V1 EN

Table 330: A1A2_BS Input signals
QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB1_OP BOOLEAN 0 QB1 is in open position
QB1_CL BOOLEAN 0 QB1 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
S1QC1_OP BOOLEAN 0 QC1 on bus section 1 is in open position
S1QC1_CL BOOLEAN 0 QC1 on bus section 1 is in closed position
BBTR_OP BOOLEAN 0 No busbar transfer is in progress
VP_BBTR BOOLEAN 0 Status are valid for app. involved in the busbar
transfer
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Control

EXDU_12 BOOLEAN 0 No transm error from any bay connected to
busbar 1 and 2
EXDU_ES BOOLEAN 0 No transm error from bays containing earth. sw.
QC1 or QC2
QA1O_EX1 BOOLEAN 0 External open condition for apparatus QA1
QB1_EX1 BOOLEAN 0 External condition for apparatus QB1
Table 331: A1A2_BS Output signals

QA1OPREL BOOLEAN Opening of QA1 is allowed
QA1OPITL BOOLEAN Opening of QA1 is forbidden
QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB1REL BOOLEAN Switching of QB1 is allowed
QB1ITL BOOLEAN Switching of QB1 is forbidden
QC3REL BOOLEAN Switching of QC3 is allowed
QC3ITL BOOLEAN Switching of QC3 is forbidden
S1S2OPTR BOOLEAN No bus section connection between bus section 1
and 2
S1S2CLTR BOOLEAN Bus coupler connection between bus section 1
and 2 exists
QB1OPTR BOOLEAN QB1 is in open position
QB1CLTR BOOLEAN QB1 is in closed position
VPS1S2TR BOOLEAN Status of the app. between bus section 1 and 2
are valid
VPQB1TR BOOLEAN Switch status of QB1 is valid (open or closed)
12.4.6 Interlocking for bus-section disconnector A1A2_DC
560
Control
The interlocking for bus-section disconnector (A1A2_DC) function is used for one
bus-section disconnector between section 1 and 2 according to figure 315.
A1A2_DC function can be used for different busbars, which includes a bus-section
disconnector.
QB
WA1 (A1) WA2 (A2)
QC1 QC2
A1A2_DC en04000492.vsd
IEC04000492 V1 EN
Figure 315: Switchyard layout A1A2_DC

A1A2_DC
QB_OP QBOPREL
QB_CL QBOPITL
S1QC1_OP QBCLREL
S1QC1_CL QBCLITL
S2QC2_OP DCOPTR
S2QC2_CL DCCLTR
S1DC_OP VPDCTR
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_ES
EXDU_BB
QBCL_EX1
QBCL_EX2
QBOP_EX1
QBOP_EX2
QBOP_EX3
IEC05000349 V2 EN
Figure 316: A1A2_DC function block
561
Control

A1A2_DC
QB_OP
VPQB VPDCTR
QB_CL =1
DCOPTR
DCCLTR
S1QC1_OP
VPS1QC1
S1QC1_CL =1
S2QC2_OP
VPS2QC2
S2QC2_CL =1
VPS1QC1
VPS2QC2
VPS1_DC & >1 QBOPREL
S1QC1_OP QBOPITL
1
S2QC2_OP
S1DC_OP
EXDU_ES
EXDU_BB
QBOP_EX1
VPS1QC1
VPS2QC2
VPS2_DC &
S1QC1_OP
S2QC2_OP
S2DC_OP
EXDU_ES
EXDU_BB
QBOP_EX2
VPS1QC1
VPS2QC2
S1QC1_CL &
S2QC2_CL
EXDU_ES
QBOP_EX3
en04000544.vsd
IEC04000544 V1 EN
IEC04000545 V1 EN

Table 332: A1A2_DC Input signals
QB_OP BOOLEAN 0 QB is in open position
QB_CL BOOLEAN 0 QB is in closed position
562
Control

S1DC_OP BOOLEAN 0 All disconnectors on bus section 1 are in open
position
S2DC_OP BOOLEAN 0 All disconnectors on bus section 2 are in open
position
VPS1_DC BOOLEAN 0 Switch status of disconnectors on bus section 1
are valid
VPS2_DC BOOLEAN 0 Switch status of disconnectors on bus section 2
are valid
EXDU_ES BOOLEAN 0 No transm error from bays containing earth. sw.
QC1 or QC2
EXDU_BB BOOLEAN 0 No transm error from bays with disc conn to
section 1 and 2
QBCL_EX1 BOOLEAN 0 External close condition for section disconnector
QB
QBCL_EX2 BOOLEAN 0 External close condition for section disconnector
QB
QBOP_EX1 BOOLEAN 0 External open condition for section disconnector
QB
QB
QB
Table 333: A1A2_DC Output signals

QBOPREL BOOLEAN Opening of QB is allowed
QBOPITL BOOLEAN Opening of QB is forbidden
QBCLREL BOOLEAN Closing of QB is allowed
QBCLITL BOOLEAN Closing of QB is forbidden
DCOPTR BOOLEAN The bus section disconnector is in open position
DCCLTR BOOLEAN The bus section disconnector is in closed position
VPDCTR BOOLEAN Switch status of QB is valid (open or closed)
12.4.7 Interlocking for bus-coupler bay ABC_BC
The interlocking for bus-coupler bay (ABC_BC) function is used for a bus-coupler
bay connected to a double busbar arrangement according to figure 317. The
function can also be used for a single busbar arrangement with transfer busbar or
double busbar arrangement without transfer busbar.
563
Control
WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB20 QB7
QC1
QA1
QC2
en04000514.vsd
IEC04000514 V1 EN
Figure 317: Switchyard layout ABC_BC

ABC_BC
QA1_OP QA1OPREL
QA1_CL QA1OPITL
QB1_OP QA1CLREL
QB1_CL QA1CLITL
QB2_OP QB1REL
QB2_CL QB1ITL
QB7_OP QB2REL
QB7_CL QB2ITL
QB20_OP QB7REL
QB20_CL QB7ITL
QC1_OP QB20REL
QC1_CL QB20ITL
QC2_OP QC1REL
QC2_CL QC1ITL
QC11_OP QC2REL
QC11_CL QC2ITL
QC21_OP QB1OPTR
QC21_CL QB1CLTR
QC71_OP QB220OTR
QC71_CL QB220CTR
BBTR_OP QB7OPTR
BC_12_CL QB7CLTR
VP_BBTR QB12OPTR
VP_BC_12 QB12CLTR
EXDU_ES BC12OPTR
EXDU_12 BC12CLTR
EXDU_BC BC17OPTR
QA1O_EX1 BC17CLTR
QA1O_EX2 BC27OPTR
QA1O_EX3 BC27CLTR
QB1_EX1 VPQB1TR
QB1_EX2 VQB220TR
QB1_EX3 VPQB7TR
QB2_EX1 VPQB12TR
QB2_EX2 VPBC12TR
QB2_EX3 VPBC17TR
QB20_EX1 VPBC27TR
QB20_EX2
QB7_EX1
QB7_EX2
IEC05000350 V2 EN
Figure 318: ABC_BC function block
564
Control

ABC_BC
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB20_OP
QB20_CL =1 VPQB20
QB7_OP
QB7_CL =1 VPQB7
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VPQB1
QB1_OP QA1OPREL
& >1 QA1OPITL
QA1O_EX1 1
VPQB20
QB20_OP &
QA1O_EX2
VP_BBTR
BBTR_OP &
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQB7 & 1
VPQB20
en04000533.vsd
IEC04000533 V1 EN
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VP_BC_12
&
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000534.vsd
IEC04000534 V1 EN
565
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VP_BC_12
&
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000535.vsd
IEC04000535 V1 EN
VPQA1
VPQB20 QB7REL
& >1
VPQC1 QB7ITL
VPQC2 1
VPQC71
QA1_OP
QB20_OP
QC1_OP
QC2_OP
QC71_OP
EXDU_ES
QB7_EX1
VPQC2
VPQC71
&
QC2_CL
QC71_CL
EXDU_ES
QB7_EX2
VPQA1
VPQB7 QB20REL
& >1
VPQC1 QB20ITL
VPQC2 1
VPQC21
QA1_OP
QB7_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB20_EX1
VPQC2
VPQC21
&
QC2_CL
QC21_CL
EXDU_ES
QB20_EX2
en04000536.vsd
IEC04000536 V1 EN
566
Control
VPQB1 QC1REL
VPQB20 QC1ITL
& 1
VPQB7
QC2REL
VPQB2
QB1_OP QC2ITL
1
QB20_OP
QB7_OP
QB2_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB20_OP QB220OTR
QB2_OP & QB220CTR
VPQB20 1
VQB220TR
VPQB2 &
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
QA1_OP BC12OPTR
QB1_OP >1 BC12CLTR
QB20_OP 1
VPQA1
VPBC12TR
VPQB1 &
VPQB20
QA1_OP BC17OPTR
QB1_OP >1 BC17CLTR
QB7_OP 1
VPQA1
VPBC17TR
VPQB1 &
VPQB7
QA1_OP BC27OPTR
QB2_OP >1 BC27CLTR
QB7_OP 1
VPQA1
VPBC27TR
VPQB2 &
VPQB7
en04000537.vsd
IEC04000537 V1 EN

Table 334: ABC_BC Input signals
QC11_OP BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in open
position
567
Control

QC11_CL BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in closed
position
position
position
position
position
BBTR_OP BOOLEAN 0 No busbar transfer is in progress
BC_12_CL BOOLEAN 0 A bus coupler connection exists between busbar
WA1 and WA2
VP_BBTR BOOLEAN 0 Status are valid for app. involved in the busbar
transfer
VP_BC_12 BOOLEAN 0 Status of the bus coupler app. between WA1 and
WA2 are valid
EXDU_ES BOOLEAN 0 No transm error from any bay containing earthing
switches
EXDU_12 BOOLEAN 0 No transm error from any bay connected to WA1/
WA2 busbars
EXDU_BC BOOLEAN 0 No transmission error from any other bus coupler
bay
Table 335: ABC_BC Output signals

QA1OPREL BOOLEAN Opening of QA1 is allowed
QA1OPITL BOOLEAN Opening of QA1 is forbidden
568
Control

QB220OTR BOOLEAN QB2 and QB20 are in open position
QB220CTR BOOLEAN QB2 or QB20 or both are not in open position
QB12OPTR BOOLEAN QB1 or QB2 or both are in open position
QB12CLTR BOOLEAN QB1 and QB2 are not in open position
BC12OPTR BOOLEAN No connection via the own bus coupler between
WA1 and WA2
BC12CLTR BOOLEAN Conn. exists via the own bus coupler between
WA1 and WA2
WA1 and WA7
WA1 and WA7
WA2 and WA7
WA2 and WA7
VQB220TR BOOLEAN Switch status of QB2 and QB20 are valid (open
or closed)
VPQB12TR BOOLEAN Switch status of QB1 and QB2 are valid (open or
closed)
VPBC12TR BOOLEAN Status of the bus coupler app. between WA1 and
WA2 are valid
WA7 are valid
WA7 are valid
569
Control
12.4.8 Interlocking for 1 1/2 CB BH
Introduction
The interlocking for 1 1/2 breaker diameter (BH_CONN, BH_LINE_A,
BH_LINE_B) functions are used for lines connected to a 1 1/2 breaker diameter
according to figure 319.
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC1
QA1 QA1
QC2 QC2
QB6 QB6
QC3 QC3
BH_LINE_A BH_LINE_B
QB61 QA1 QB62
QB9 QB9
QC1 QC2
QC9 QC9
BH_CONN
en04000513.vsd
IEC04000513 V1 EN
Figure 319: Switchyard layout 1 1/2 breaker
Three types of interlocking modules per diameter are defined. BH_LINE_A and
BH_LINE_B are the connections from a line to a busbar. BH_CONN is the
connection between the two lines of the diameter in the 1 1/2 breaker switchyard
layout.
570
Control
12.4.8.2 Function blocks

BH_LINE_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB6_OP QB6REL
QB6_CL QB6ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QC3REL
QC3_CL QC3ITL
QB9_OP QB9REL
QB9_CL QB9ITL
QC9_OP QC9REL
QC9_CL QC9ITL
CQA1_OP QB1OPTR
CQA1_CL QB1CLTR
CQB61_OP VPQB1TR
CQB61_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC11_OP
QC11_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB1_EX1
QB1_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
IEC05000352 V2 EN
Figure 320: BH_LINE_A function block
571
Control
BH_LINE_B
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB6_OP QB6REL
QB6_CL QB6ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QC3REL
QC3_CL QC3ITL
QB9_OP QB9REL
QB9_CL QB9ITL
QC9_OP QC9REL
QC9_CL QC9ITL
CQA1_OP QB2OPTR
CQA1_CL QB2CLTR
CQB62_OP VPQB2TR
CQB62_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC21_OP
QC21_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB2_EX1
QB2_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
IEC05000353 V2 EN
Figure 321: BH_LINE_B function block
BH_CONN
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB61_OP QB61REL
QB61_CL QB61ITL
QB62_OP QB62REL
QB62_CL QB62ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
1QC3_OP
1QC3_CL
2QC3_OP
2QC3_CL
QB61_EX1
QB61_EX2
QB62_EX1
QB62_EX2
IEC05000351 V2 EN
Figure 322: BH_CONN function block
572
Control

BH_CONN
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB62_OP
QB62_CL =1 VPQB62
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
1QC3_OP
1QC3_CL =1 VP1QC3
2QC3_OP
2QC3_CL =1 VP2QC3
VPQB61 QA1CLREL
VPQB62 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VP1QC3
QA1_OP
QC1_OP
QC2_OP
1QC3_OP
QB61_EX1
VPQC1
VP1QC3
&
QC1_CL
1QC3_CL
QB61_EX2
VPQA1
VPQC1 QB62REL
& >1
VPQC2 QB62ITL
1
VP2QC3
QA1_OP
QC1_OP
QC2_OP
2QC3_OP
QB62_EX1
VPQC2
VP2QC3
&
QC2_CL
2QC3_CL
QB62_EX2
VPQB61 QC1REL
VPQB62 QC1ITL
& 1
QB61_OP QC2REL
QB62_OP QC2ITL
1
en04000560.vsd
IEC04000560 V1 EN
573
Control
BH_LINE_A
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB61_OP
CQB61_CL =1 VPCQB61
QC11_OP
QC11_CL =1 VPQC11
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB1 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000554.vsd
IEC04000554 V1 EN
574
Control
VPQA1
VPQC1 QB1REL
VPQC2 & >1
QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
VPQB1 QC1REL
VPQB6 QC1ITL
QB1_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB61 &
QC3ITL
1
QB6_OP
QB9_OP
CQB61_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB61
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000555.vsd
IEC04000555 V1 EN
CQB61_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000556.vsd
IEC04000556 V1 EN
575
Control
BH_LINE_B
QA1_OP
QA1_CL =1 VPQA1
QB2_OP
QB2_CL =1 VPQB2
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB62_OP
CQB62_CL =1 VPCQB62
QC21_OP
QC21_CL =1 VPQC21
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB2 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000557.vsd
IEC04000557 V1 EN
576
Control
VPQA1
VPQC1 QB2REL
VPQC2 & >1
QB2ITL
1
VPQC21
QA1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX2
VPQB2 QC1REL
VPQB6 QC1ITL
QB2_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB62 &
QC3ITL
1
QB6_OP
QB9_OP
CQB62_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB62
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000558.vsd
IEC04000558 V1 EN
CQB62_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000559.vsd
IEC04000559 V1 EN
577
Control

Table 336: BH_LINE_A Input signals
QB6_CL BOOLEAN 0 QB6 is in close position
CQA1_OP BOOLEAN 0 QA1 in module BH_CONN is in open position
CQA1_CL BOOLEAN 0 QA1 in module BH_CONN is in closed position
CQB61_OP BOOLEAN 0 QB61 in module BH_CONN is in open position
CQB61_CL BOOLEAN 0 QB61 in module BH_CONN is in closed position
CQC1_OP BOOLEAN 0 QC1 in module BH_CONN is in open position
CQC1_CL BOOLEAN 0 QC1 in module BH_CONN is in closed position
position
position
VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
VOLT_ON BOOLEAN 0 There is voltage on the line or there is a VT (fuse)
failure
EXDU_ES BOOLEAN 0 No transm error from bay containing earthing
switch QC11
578
Control

Table 337: BH_LINE_A Output signals

Table 338: BH_LINE_B Input signals

QB6_CL BOOLEAN 0 QB6 is in close position
579
Control

CQA1_OP BOOLEAN 0 QA1 in module BH_CONN is in open position
CQA1_CL BOOLEAN 0 QA1 in module BH_CONN is in closed position
CQB62_OP BOOLEAN 0 QB62 in module BH_CONN is in open position
CQB62_CL BOOLEAN 0 QB62 in module BH_CONN is in closed position
position
position
VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
failure
switch QC21
580
Control
Table 339: BH_LINE_B Output signals

Table 340: BH_CONN Input signals

1QC3_OP BOOLEAN 0 QC3 on line 1 is in open position
1QC3_CL BOOLEAN 0 QC3 on line 1 is in closed position
2QC3_OP BOOLEAN 0 QC3 on line 2 is in open position
2QC3_CL BOOLEAN 0 QC3 on line 2 is in closed position
581
Control

Table 341: BH_CONN Output signals

12.4.9 Interlocking for double CB bay DB
The interlocking for 1 1/2 breaker diameter including DB_BUS_A, DB_BUS_B,

DB_LINEfunctions are used for a line connected to a double circuit breaker
arrangement according to figure 323.
582
Control
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC4
QA1 QA2
DB_BUS_A DB_BUS_B
QC2 QC5
QB61 QB62
QC3
QB9
DB_LINE
QC9
en04000518.vsd
IEC04000518 V1 EN
Figure 323: Switchyard layout double circuit breaker
Three types of interlocking modules per double circuit breaker bay are defined.
DB_LINE is the connection from the line to the circuit breaker parts that are
connected to the busbars. DB_BUS_A and DB_BUS_B are the connections from
the line to the busbars.

IB01-
DB_BUS_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB61REL
QB1_CL QB61ITL
QB61_OP QB1REL
QB61_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QB1OPTR
QC3_CL QB1CLTR
QC11_OP VPQB1TR
QC11_CL
EXDU_ES
QB61_EX1
QB61_EX2
QB1_EX1
QB1_EX2
en05000354.vsd
IEC05000354 V1 EN
Figure 324: IB function block
583
Control
DB_LINE
QA1_OP QB9REL
QA1_CL QB9ITL
QA2_OP QC3REL
QA2_CL QC3ITL
QB61_OP QC9REL
QB61_CL QC9ITL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QB62_OP
QB62_CL
QC4_OP
QC4_CL
QC5_OP
QC5_CL
QB9_OP
QB9_CL
QC3_OP
QC3_CL
QC9_OP
QC9_CL
VOLT_OFF
VOLT_ON
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
IEC05000356 V2 EN
Figure 325: DB_LINE function block
DB_BUS_B
QA2_OP QA2CLREL
QA2_CL QA2CLITL
QB2_OP QB62REL
QB2_CL QB62ITL
QB62_OP QB2REL
QB62_CL QB2ITL
QC4_OP QC4REL
QC4_CL QC4ITL
QC5_OP QC5REL
QC5_CL QC5ITL
QC3_OP QB2OPTR
QC3_CL QB2CLTR
QC21_OP VPQB2TR
QC21_CL
EXDU_ES
QB62_EX1
QB62_EX2
QB2_EX1
QB2_EX2
IEC05000355 V2 EN
Figure 326: DB_BUS_B function block
584
Control

DB_BUS_A
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB1_OP
QB1_CL =1 VPQB1
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
VPQB61 QA1CLREL
VPQB1 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB61_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB61_EX2
VPQA1
VPQC1 QB1REL
& >1
VPQC2 QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
en04000547.vsd
IEC04000547 V1 EN
VPQB61 QC1REL
VPQB1 QC1ITL
& 1
QB61_OP QC2REL
QB1_OP QC2ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000548.vsd
IEC04000548 V1 EN
585
Control
DB_BUS_B
QA2_OP
QA2_CL =1 VPQA2
QB62_OP
QB62_CL =1 VPQB62
QB2_OP
QB2_CL =1 VPQB2
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QC3_OP
QC3_CL =1 VPQC3
QC21_OP
QC21_CL =1 VPQC21
VPQB62 QA2CLREL
VPQB2 & QA2CLITL
1
VPQA2
VPQC4 QB62REL
& >1
VPQC5 QB62ITL
1
VPQC3
QA2_OP
QC4_OP
QC5_OP
QC3_OP
QB62_EX1
VPQC5
VPQC3
&
QC5_CL
QC3_CL
QB62_EX2
VPQA2
VPQC4 QB2REL
& >1
VPQC5 QB2ITL
1
VPQC21
QA2_OP
QC4_OP
QC5_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC4
VPQC21
&
QC4_CL
QC21_CL
EXDU_ES
QB2_EX2
en04000552.vsd
IEC04000552 V1 EN
VPQB62 QC4REL
VPQB2 QC4ITL
& 1
QB62_OP QC5REL
QB2_OP QC5ITL
1
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000553.vsd
IEC04000553 V1 EN
586
Control
DB_LINE
QA1_OP
QA1_CL =1 VPQA1
QA2_OP
QA2_CL =1 VPQA2
QB61_OP
QB61_CL =1 VPQB61
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB62_OP
QB62_CL =1 VPQB62
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QB9_OP
QB9_CL =1 VPQB9
QC3_OP
QC3_CL =1 VPQC3
QC9_OP
QC9_CL =1 VPQC9
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQA2 QB9REL
VPQC1 & >1
QB9ITL
1
VPQC2
VPQC3
VPQC4
VPQC5
VPQC9
QA1_OP
QA2_OP
QC1_OP
QC2_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX1
& en04000549.vsd
IEC04000549 V1 EN
VPQA1
VPQC1
VPQC2 & >1
VPQC3
VPQC9
VPQB62
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QC9_OP
QB62_OP
QB9_EX2
VPQA2
VPQB61
&
VPQC3
VPQC4
VPQC5
VPQC9
QA2_OP
QB61_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX3
VPQC3
VPQC9
&
VPQB61
VPQB62
QC3_OP
QC9_OP
QB61_OP
QB62_OP
QB9_EX4
VPQC3
VPQC9
&
QC3_CL
QC9_CL
QB9_EX5
en04000550.vsd
IEC04000550 V1 EN
587
Control
VPQB61
VPQB62 QC3REL
VPQB9 &
QC3ITL
1
QB61_OP
QB62_OP
QB9_OP
VPQB9
VPVOLT QC9REL
QB9_OP &
QC9ITL
1
VOLT_OFF
en04000551.vsd
IEC04000551 V1 EN

Table 342: DB_BUS_A Input signals
position
position
switch QC11
Table 343: DB_BUS_A Output signals

588
Control

Table 344: DB_LINE Input signals

VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse)
failure
failure
589
Control

Table 345: DB_LINE Output signals

Table 346: DB_BUS_B Input signals

position
position
switch QC21
590
Control
Table 347: DB_BUS_B Output signals

12.4.10 Interlocking for line bay ABC_LINE
The interlocking for line bay (ABC_LINE) function is used for a line connected to
a double busbar arrangement with a transfer busbar according to figure 327. The
function can also be used for a double busbar arrangement without transfer busbar
or a single busbar arrangement with/without transfer busbar.
WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB7
QC1
QA1
QC2
QB9
QC9
en04000478.vsd
IEC04000478 V1 EN
Figure 327: Switchyard layout ABC_LINE
591
Control

ABC_LINE
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB9_OP QB9REL
QB9_CL QB9ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QB7_OP QB7REL
QB7_CL QB7ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC9_OP QC9REL
QC9_CL QC9ITL
QC11_OP QB1OPTR
QC11_CL QB1CLTR
QC21_OP QB2OPTR
QC21_CL QB2CLTR
QC71_OP QB7OPTR
QC71_CL QB7CLTR
BB7_D_OP QB12OPTR
BC_12_CL QB12CLTR
BC_17_OP VPQB1TR
BC_17_CL VPQB2TR
BC_27_OP VPQB7TR
BC_27_CL VPQB12TR
VOLT_OFF
VOLT_ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_ES
EXDU_BPB
EXDU_BC
QB9_EX1
QB9_EX2
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QB7_EX1
QB7_EX2
QB7_EX3
QB7_EX4
IEC05000357 V2 EN
Figure 328: ABC_LINE function block
592
Control
ABC_LINE
QA1_OP
QA1_CL =1 VPQA1
QB9_OP
QB9_CL =1 VPQB9
QA1CLREL
QB1_OP
QB1_CL =1 VPQB1 QA1CLITL
& 1
QB2_OP
QB2_CL =1 VPQB2
QB7_OP
QB7_CL =1 VPQB7
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC9_OP
QC9_CL =1 VPQC9
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQC1 QB9REL
VPQC2 & >1
QB9ITL
1
VPQC9
QA1_OP
QC1_OP
QC2_OP
QC9_OP
QB9_EX1
VPQC2
VPQC9
&
QC2_CL
QC9_CL
QB9_EX2
en04000527.vsd
IEC04000527 V1 EN
593
Control
VPQA1 QB1REL
& ³1
VPQB2
VPQC1 1 QB1ITL
VPQC2
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2 &
VP_BC_12
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1 &
VPQC11
QC1_CL
QC11_CL
EXDU_ES
QB1EX3
en04000528.vsd
IEC04000528 V1 EN
594
Control
VPQA1 QB2REL
& ³1
VPQB1
VPQC1 1 QB2ITL
VPQC2
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1 &
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1 &
VPQC21
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000529.vsd
IEC04000529 V1 EN
595
Control
VPQC9 QB7REL
& >1
VPQC71
VP_BB7_D 1 QB7ITL
VP_BC_17
VP_BC_27
QC9_OP
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_OP
BC_27_OP
EXDU_BC
QB7_EX1
VPQA1
VPQB1
VPQC9
&
VPQB9
VPQC71
VP_BB7_D
VP_BC_17
QA1_CL
QB1_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_CL
EXDU_BC
QB7_EX2
IEC04000530 V1 EN
596
Control
VPQA1
VPQB2
& >1
VPQC9
VPQB9
VPQC71
VP_BB7_D
VP_BC_27
QA1_CL
QB2_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_27_CL
EXDU_BC
QB7_EX3
VPQC9
VPQC71
&
QC9_CL
QC71_CL
EXDU_ES
QB7_EX4
VPQB1 QC1REL
VPQB2 QC1ITL
VPQB9 & 1
QC2REL
QB1_OP
QB2_OP QC2ITL
1
QB9_OP
VPQB7
VPQB9 QC9REL
VPVOLT &
QC9ITL
QB7_OP 1
QB9_OP
VOLT_OFF
en04000531.vsd
IEC04000531 V1 EN
597
Control
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000532.vsd
IEC04000532 V1 EN

Table 348: ABC_LINE Input signals
position
position
position
598
Control

position
position
position
BB7_D_OP BOOLEAN 0 Disconnectors on busbar WA7 except in the own
bay are open
WA1 and WA2
BC_17_OP BOOLEAN 0 No bus coupler connection exists between busbar
WA1 and WA7
WA1 and WA7
BC_27_OP BOOLEAN 0 No bus coupler connection exists between busbar
WA2 and WA7
WA2 and WA7
VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse)
failure
failure
VP_BB7_D BOOLEAN 0 Switch status of the disconnectors on busbar
WA7 are valid
WA2 are valid
WA7 are valid
WA7 are valid
switches
EXDU_BPB BOOLEAN 0 No transm error from any bay with disconnectors
on WA7
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
599
Control

Table 349: ABC_LINE Output signals

closed)
12.4.11 Interlocking for transformer bay AB_TRAFO
600
Control
The interlocking for transformer bay (AB_TRAFO) function is used for a

transformer bay connected to a double busbar arrangement according to figure 329.
The function is used when there is no disconnector between circuit breaker and
transformer. Otherwise, the interlocking for line bay (ABC_LINE) function can be
used. This function can also be used in single busbar arrangements.
WA1 (A)
WA2 (B)
QB1 QB2
QC1
QA1
AB_TRAFO
QC2
QC3
QA2
QA2 and QC4 are not
QC4 used in this interlocking
QB3 QB4
en04000515.vsd
IEC04000515 V1 EN
Figure 329: Switchyard layout AB_TRAFO
601
Control

AB_TRAFO
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB1REL
QB1_CL QB1ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QB3_OP QB1OPTR
QB3_CL QB1CLTR
QB4_OP QB2OPTR
QB4_CL QB2CLTR
QC3_OP QB12OPTR
QC3_CL QB12CLTR
QC11_OP VPQB1TR
QC11_CL VPQB2TR
QC21_OP VPQB12TR
QC21_CL
BC_12_CL
VP_BC_12
EXDU_ES
EXDU_BC
QA1_EX1
QA1_EX2
QA1_EX3
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
IEC05000358 V2 EN
Figure 330: AB_TRAFO function block
602
Control

AB_TRAFO
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB3_OP
QB3_CL =1 VPQB3
QB4_OP
QB4_CL =1 VPQB4
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQC1 & 1
VPQC2
VPQB3
VPQB4
VPQC3
QA1_EX2
QC3_OP
QA1_EX3
QC1_CL >1
QC2_CL
QC3_CL &
QA1_EX1
en04000538.vsd
IEC04000538 V1 EN
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC3
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC3_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VPQC3
&
VP_BC_12
QB2_CL
QC3_OP
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC2
&
VPQC3
VPQC11
QC1_CL
QC2_CL
QC3_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000539.vsd
IEC04000539 V1 EN
603
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC3
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC3_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VPQC3
&
VP_BC_12
QB1_CL
QC3_OP
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC2
&
VPQC3
VPQC21
QC1_CL
QC2_CL
QC3_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000540.vsd
IEC04000540 V1 EN
VPQB1 QC1REL
VPQB2 QC1ITL
& 1
VPQB3
QC2REL
VPQB4
QB1_OP QC2ITL
1
QB2_OP
QB3_OP
QB4_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000541.vsd
IEC04000541 V1 EN

Table 350: AB_TRAFO Input signals
604
Control

QC11_OP BOOLEAN 0 QC11 on busbar WA1 is in open position
QC11_CL BOOLEAN 0 QC11 on busbar WA1 is in closed position
QC21_OP BOOLEAN 0 QC21 on busbar WA2 is in open position
QC21_CL BOOLEAN 0 QC21 on busbar WA2 is in closed position
WA1 and WA2
WA2 are valid
switches
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
QA1_EX1 BOOLEAN 0 External condition for apparatus QA1
Table 351: AB_TRAFO Output signals

605
Control

closed)
12.4.12 Position evaluation POS_EVAL
Position evaluation (POS_EVAL) function converts the input position data signal
POSITION, consisting of value, time and signal status, to binary signals
OPENPOS or CLOSEPOS.
The output signals are used by other functions in the interlocking scheme.

POS_EVAL
Position including quality POSITION OPENPOS
Open/close position of
CLOSEPOS switch device
IEC08000469-1-EN V1 EN
Only the value, open/close, and status is used in this function. Time information is
not used.
Input position (Value) Signal quality Output OPENPOS Output CLOSEPOS
0 (Breaker Good 0 0
intermediate)
1 (Breaker open) Good 1 0
2 (Breaker closed) Good 0 1
3 (Breaker faulty) Good 0 0
Any Invalid 0 0
Any Oscillatory 0 0
606
Control

POS_EVAL
POSITION OPENPOS
CLOSEPOS
IEC09000079 V1 EN
Figure 331: POS_EVAL function block

Table 352: POS_EVAL Input signals
POSITION INTEGER 0 Position status including quality
Table 353: POS_EVAL Output signals

OPENPOS BOOLEAN Open position
CLOSEPOS BOOLEAN Close position
12.5 Logic rotating switch for function selection and

LHMI presentation SLGGIO

Logic rotating switch for function SLGGIO - -
selection and LHMI presentation
12.5.1 Introduction
The logic rotating switch for function selection and LHMI presentation function
(SLGGIO) (or the selector switch function block) is used to get a selector switch
functionality similar with the one provided by a hardware selector switch.
Hardware selector switches are used extensively by utilities, in order to have
different functions operating on pre-set values. Hardware switches are however
sources for maintenance issues, lower system reliability and extended purchase
portfolio. The virtual selector switches eliminate all these problems.

The logic rotating switch for function selection and LHMI presentation (SLGGIO)
function has two operating inputs – UP and DOWN. When a signal is received on
the UP input, the block will activate the output next to the present activated output,
607
Control
in ascending order (if the present activated output is 3 – for example and one
operates the UP input, then the output 4 will be activated). When a signal is
received on the DOWN input, the block will activate the output next to the present
activated output, in descending order (if the present activated output is 3 – for
example and one operates the DOWN input, then the output 2 will be activated).
Depending on the output settings the output signals can be steady or pulsed. In case
of steady signals, in case of UP or DOWN operation, the previously active output
will be deactivated. Also, depending on the settings one can have a time delay
between the UP or DOWN activation signal positive front and the output activation.
Besides the inputs visible in the application configuration in the Application

Configuration tool, there are other possibilities that will allow an user to set the
desired position directly (without activating the intermediate positions), either
locally or remotely, using a “select before execute” dialog. One can block the
function operation, by activating the BLOCK input. In this case, the present
position will be kept and further operation will be blocked. The operator place
(local or remote) is specified through the PSTO input. If any operation is allowed
the signal INTONE from the Fixed signal function block can be connected.
SLGGIO function block has also an integer value output, that generates the actual
position number. The positions and the block names are fully settable by the user.
These names will appear in the menu, so the user can see the position names
instead of a number.
608
Control
12.5.2.1 Functionality and behaviour
Control
Control Single Line Diagram Ctrl/Com
Measurements Commands Single Command
Events Selector Switch (GGIO)
Disturbance records
Settings
Diagnostics
Test
Reset
Authorization
Language
1 2 3
../Com/Sel Sw/ ../Com/Sel Sw/
../Ctrl/Com/Sel Sw SLGGIO3
SLGGIO1 SLGGIO3
Damage ctrl 4 Damage ctrl 4
SLGGIO2
..
..
SLGGIO15
P:Disc All N: Disc Fe
OK Cancel
4
5
The dialog window that appears
../Com/Sel Sw/ shows the present position (P:)
DmgCtrl 7
and the new position (N:), both
Damage ctrl: in clear names, given by the
user (max. 13 characters).
E
Modify the position with arrows.
The pos will not be modified (outputs
will not be activated) until you press
the E-button for O.K. IEC06000420-2-en.vsd
IEC06000420 V2 EN
Figure 332: Example 1 on handling the switch from the local HMI.
From the local HMI:
1 SLGGIO instances in the ACT application configuration

2 Switch name given by the user (max 13 characters)
3 Position number, up to 32 positions
4 Change position
5 New position
12.5.2.2 Graphical display
There are two possibilities for SLGGIO
609
Control
• if it is used just for the monitoring, the switches will be listed with their actual
position names, as defined by the user (max. 13 characters).
• if it is used for control, the switches will be listed with their actual positions,
but only the first three letters of the name will be used.
In both cases, the switch full name will be shown, but the user has to redefine it
when building the Graphical Display Editor, under the "Caption". If used for the
control, the following sequence of commands will ensure:
From the graphical display:
Control
Control Single Line Diagram
Measurements Commands
Events
Disturbance records
Settings
Diagnostics
Test
Change to the "Switches" page Reset
of the SLD by left-right arrows. Authorization
Select switch by up-down Language
arrows
../Control/SLD/Switch
O I ../Control/SLD/Switch
SMBRREC control SMBRREC control
WFM Select switch. Press the
WFM
I or O key. A dialog box
Pilot setup appears.
Pilot setup
OFF OFF
Damage control E P: Disc N: Disc Fe
DAL
The pos will not be modified
(outputs will not be activated) until OK Cancel
you press the E-button for O.K.
../Control/SLD/Switch
SMBRREC control
WFM
Pilot setup
OFF
Damage control
DFW
IEC06000421 V2 EN
Figure 333: Example 2 on handling the switch from the local HMI.
From the single line diagram on local HMI.
610
Control

SLGGIO
BLOCK ^SWPOS01
PSTO ^SWPOS02
UP ^SWPOS03
DOWN ^SWPOS04
^SWPOS05
^SWPOS06
^SWPOS07
^SWPOS08
^SWPOS09
^SWPOS10
^SWPOS11
^SWPOS12
^SWPOS13
^SWPOS14
^SWPOS15
^SWPOS16
^SWPOS17
^SWPOS18
^SWPOS19
^SWPOS20
^SWPOS21
^SWPOS22
^SWPOS23
^SWPOS24
^SWPOS25
^SWPOS26
^SWPOS27
^SWPOS28
^SWPOS29
^SWPOS30
^SWPOS31
^SWPOS32
SWPOSN
IEC05000658 V2 EN
Figure 334: SLGGIO function block

Table 354: SLGGIO Input signals
UP BOOLEAN 0 Binary "UP" command
DOWN BOOLEAN 0 Binary "DOWN" command
Table 355: SLGGIO Output signals

SWPOS01 BOOLEAN Selector switch position 1
611
Control

SWPOSN INTEGER Switch position (integer)

Table 356: SLGGIO Non group settings (basic)
On
NrPos 2 - 32 - 1 32 Number of positions in the switch
OutType Pulsed - - Steady Output type, steady or pulse
Steady
612
Control

tPulse 0.000 - 60.000 s 0.001 0.200 Operate pulse duration, in [s]
tDelay 0.000 - 60000.000 s 0.010 0.000 Time delay on the output, in [s]
StopAtExtremes Disabled - - Disabled Stop when min or max position is reached
Enabled
12.6 Selector mini switch VSGGIO

Selector mini switch VSGGIO - -
12.6.1 Introduction
Selector mini switch (VSGGIO) function block is a multipurpose function used in
the configuration tool in PCM600 for a variety of applications, as a general purpose
switch.
VSGGIO can be controlled from the menu or from a symbol on the single line
diagram (SLD) on the local HMI.

Selector mini switch (VSGGIO) function can be used for double purpose, in the
same way as switch controller (SCSWI) functions are used:
• for indication on the single line diagram (SLD). Position is received through
the IPOS1 and IPOS2 inputs and distributed in the configuration through the
POS1 and POS2 outputs, or to IEC 61850 through reporting, or GOOSE.
• for commands that are received via the local HMI or IEC 61850 and
distributed in the configuration through outputs CMDPOS12 and CMDPOS21.
The output CMDPOS12 is set when the function receives a CLOSE command
from the local HMI when the SLD is displayed and the object is chosen.
The output CMDPOS21 is set when the function receives an OPEN command
from the local HMI when the SLD is displayed and the object is chosen.
It is important for indication in the SLD that the a symbol is

associated with a controllable object, otherwise the symbol won't be
displayed on the screen. A symbol is created and configured in
GDE tool in PCM600.
The PSTO input is connected to the Local remote switch to have a selection of
operators place , operation from local HMI (Local) or through IEC 61850
613
Control
(Remote). An INTONE connection from Fixed signal function block (FXDSIGN)

will allow operation from local HMI.
As it can be seen, both indications and commands are done in double-bit

representation, where a combination of signals on both inputs/outputs generate the
desired result.
The following table shows the relationship between IPOS1/IPOS2 inputs and the
name of the string that is shown on the SLD. The value of the strings are set in PST.
IPOS1 IPOS2 Name of displayed string Default string value
0 0 PosUndefined P00
1 0 Position1 P01
0 1 Position2 P10
1 1 PosBadState P11

VSGGIO
BLOCK BLOCKED
PSTO POSITION
IPOS1 POS1
IPOS2 POS2
CMDPOS12
CMDPOS21
IEC06000508 V3 EN
Figure 335: VSGGIO function block

Table 357: VSGGIO Input signals
IPOS1 BOOLEAN 0 Position 1 indicating input
IPOS2 BOOLEAN 0 Position 2 indicating input
Table 358: VSGGIO Output signals

BLOCKED BOOLEAN The function is active but the functionality is
blocked
POSITION INTEGER Position indication, integer
POS1 BOOLEAN Position 1 indication, logical signal
614
Control

POS2 BOOLEAN Position 2 indication, logical signal
CMDPOS12 BOOLEAN Execute command from position 1 to position 2
CMDPOS21 BOOLEAN Execute command from position 2 to position 1

Table 359: VSGGIO Non group settings (basic)
On
CtlModel Dir Norm - - Dir Norm Specifies the type for control model
SBO Enh according to IEC 61850
Mode Steady - - Pulsed Operation mode
Pulsed
tSelect 0.000 - 60.000 s 0.001 30.000 Max time between select and execute
signals
tPulse 0.000 - 60.000 s 0.001 0.200 Command pulse lenght
12.7 Generic double point function block DPGGIO

IEC 61850 generic communication I/O DPGGIO - -
functions
12.7.1 Introduction
The IEC 61850 generic communication I/O functions (DPGGIO) function block is
used to send three logical signals to other systems or equipment in the substation. It
is especially used in the interlocking and reservation station-wide logics.

Upon receiving the input signals, the IEC 61850 generic communication I/O
functions (DPGGIO) function block will send the signals over IEC 61850-8-1 to
the equipment or system that requests these signals. To be able to get the signals,
other tools must be used, as described in the application manual, to PCM600 must
be used to define which function block in which equipment or system should
receive this information.
615
Control

DPGGIO
OPEN POSITION
CLOSE
VALID
IEC07000200 V2 EN
Figure 336: DPGGIO function block

Table 360: DPGGIO Input signals
OPEN BOOLEAN 0 Open indication
CLOSE BOOLEAN 0 Close indication
VALID BOOLEAN 0 Valid indication
Table 361: DPGGIO Output signals

POSITION INTEGER Double point indication
12.7.5 Settings
12.8 Single point generic control 8 signals SPC8GGIO

Single point generic control 8 signals SPC8GGIO - -
12.8.1 Introduction
The Single point generic control 8 signals (SPC8GGIO) function block is a
collection of 8 single point commands, designed to bring in commands from
REMOTE (SCADA) to those parts of the logic configuration that do not need
complicated function blocks that have the capability to receive commands (for
example, SCSWI). In this way, simple commands can be sent directly to the IED
outputs, without confirmation. Confirmation (status) of the result of the commands
616
Control
is supposed to be achieved by other means, such as binary inputs and SPGGIO

function blocks.

The PSTO input will determine which the allowed position for the operator
(LOCAL, REMOTE, ALL) is. Upon sending a command from an allowed operator
position, one of the 8 outputs will be activated. The settings Latchedx and tPulsex
(where x is the respective output) will determine if the signal will be pulsed (and
how long the pulse is) or latched (steady). BLOCK will block the operation of the
function – in case a command is sent, no output will be activated.
PSTO is the universal operator place selector for all control

functions. Even if PSTO can be configured to allow LOCAL or
ALL operator positions, the only functional position usable with the
SPC8GGIO function block is REMOTE.

SPC8GGIO
BLOCK ÔUT1
PSTO ÔUT2
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7
ÔUT8
IEC07000143 V2 EN
Figure 337: SPC8GGIO function block

Table 362: SPC8GGIO Input signals
BLOCK BOOLEAN 0 Blocks the function operation
Table 363: SPC8GGIO Output signals

OUT1 BOOLEAN Output 1
OUT2 BOOLEAN Output2
617
Control


Table 364: SPC8GGIO Non group settings (basic)
On
Latched1 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 1
tPulse1 0.01 - 6000.00 s 0.01 0.10 Output1 Pulse Time
Latched output 2
Latched output 3
Latched output 4
Latched output 5
Latched output 6
Latched output 7
Latched output 8
tPulse8 0.01 - 6000.00 s 0.01 0.10 Output8 pulse time
12.9 AutomationBits, command function for DNP3.0

AUTOBITS
618
Control

AutomationBits, command function for
AUTOBITS - -
DNP3.0
12.9.1 Introduction
AutomationBits function for DNP3 (AUTOBITS) is used within PCM600 to get
into the configuration of the commands coming through the DNP3 protocol. The
AUTOBITS function plays the same role as functions GOOSEBINRCV (for IEC
61850) and MULTICMDRCV (for LON).

AutomationBits function (AUTOBITS) has 32 individual outputs which each can
be mapped as a Binary Output point in DNP3. The output is operated by a "Object
12" in DNP3. This object contains parameters for control-code, count, on-time and
off-time. To operate an AUTOBITS output point, send a control-code of latch-On,
latch-Off, pulse-On, pulse-Off, Trip or Close. The remaining parameters will be
regarded were appropriate. ex: pulse-On, on-time=100, off-time=300, count=5
would give 5 positive 100 ms pulses, 300 ms apart.
There is a BLOCK input signal, which will disable the operation of the function, in
the same way the setting Operation: On/Off does. That means that, upon activation
of the BLOCK input, all 32 CMDBITxx outputs will be set to 0. The BLOCK acts
like an overriding, the function still receives data from the DNP3 master. Upon
deactivation of BLOCK, all the 32 CMDBITxx outputs will be set by the DNP3
master again, momentarily. For AUTOBITS , the PSTO input determines the
operator place. The command can be written to the block while in “Remote”. If
PSTO is in “Local” then no change is applied to the outputs.
619
Control

AUTOBITS
BLOCK ^CMDBIT1
PSTO ^CMDBIT2
^CMDBIT3
^CMDBIT4
^CMDBIT5
^CMDBIT6
^CMDBIT7
^CMDBIT8
^CMDBIT9
^CMDBIT10
^CMDBIT11
^CMDBIT12
^CMDBIT13
^CMDBIT14
^CMDBIT15
^CMDBIT16
^CMDBIT17
^CMDBIT18
^CMDBIT19
^CMDBIT20
^CMDBIT21
^CMDBIT22
^CMDBIT23
^CMDBIT24
^CMDBIT25
^CMDBIT26
^CMDBIT27
^CMDBIT28
^CMDBIT29
^CMDBIT30
^CMDBIT31
^CMDBIT32
IEC09000925 V1 EN
Figure 338: AUTOBITS function block

Table 365: AUTOBITS Input signals
Table 366: AUTOBITS Output signals

CMDBIT1 BOOLEAN Command out bit 1
620
Control


Table 367: AUTOBITS Non group settings (basic)
On
Table 368: DNPGEN Non group settings (basic)

Operation Off - - Off Operation mode Off / On
On
621
Control
Table 369: CHSERRS485 Non group settings (basic)

Operation Off - - Off Operation mode
Serial-Mode
BaudRate 300 Bd - - 9600 Bd Baud-rate for serial port
600 Bd
1200 Bd
2400 Bd
4800 Bd
9600 Bd
19200 Bd
WireMode Four-wire - - Two-wire RS485 wire mode
Two-wire
Table 370: CHSERRS485 Non group settings (advanced)

DLinkConfirm Never - - Never Data-link confirm
Sometimes
Always
tDLinkTimeout 0.000 - 60.000 s 0.001 2.000 Data-link confirm timeout in s
DLinkRetries 0 - 255 - 1 3 Data-link maximum retries
tRxToTxMinDel 0.000 - 60.000 s 0.001 0.000 Rx to Tx minimum delay in s
ApLayMaxRxSize 20 - 2048 - 1 2048 Application layer maximum Rx fragment
size
ApLayMaxTxSize 20 - 2048 - 1 2048 Application layer maximum Tx fragment
size
StopBits 1-2 - 1 1 Stop bits
Parity No - - Even Parity
Even
Odd
tRTSWarmUp 0.000 - 60.000 s 0.001 0.000 RTS warm-up in s
tRTSWarmDown 0.000 - 60.000 s 0.001 0.000 RTS warm-down in s
tBackOffDelay 0.000 - 60.000 s 0.001 0.050 RS485 back-off delay in s
tMaxRndDelBkOf 0.000 - 60.000 s 0.001 0.100 RS485 maximum back-off random delay
in s
Table 371: CH2TCP Non group settings (basic)

TCP/IP
UDP-Only
TCPIPLisPort 1 - 65535 - 1 20000 TCP/IP listen port
UDPPortAccData 1 - 65535 - 1 20000 UDP port to accept UDP datagrams from
master
UDPPortInitNUL 1 - 65535 - 1 20000 UDP portfor initial NULL response
UDPPortCliMast 0 - 65535 - 1 0 UDP port to remote client/master
622
Control
Table 372: CH2TCP Non group settings (advanced)

size
size

TCP/IP
UDP-Only
master
UDPPortInitNUL 1 - 65535 - 1 20000 UDP port for initial NULL response

size
size

TCP/IP
UDP-Only
master

size
size
623
Control

TCP/IP
UDP-Only
master

size
size
Table 379: MSTRS485 Non group settings (basic)

On
SlaveAddress 0 - 65519 - 1 1 Slave address
MasterAddres 0 - 65519 - 1 1 Master address
Obj1DefVar 1:BISingleBit - - 1:BISingleBit Object 1, default variation
2:BIWithStatus
Obj2DefVar 1:BIChWithoutTim - - 3:BIChWithRelTim Object 2, default variation
e e
2:BIChWithTime
3:BIChWithRelTim
e
Obj4DefVar 1:DIChWithoutTim - - 3:DIChWithRelTim Object 4, default variation
e e
2:DIChWithTime
3:DIChWithRelTim
e
Obj10DefVar 1:BO - - 2:BOStatus Object 10, default variation
2:BOStatus
Obj20DefVar 1:BinCnt32 - - 5:BinCnt32WoutF Object 20, default variation
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
624
Control

Obj22DefVar 1:BinCnt32EvWout - - 1:BinCnt32EvWou Object 22, default variation
T tT
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
Obj30DefVar 1:AI32Int - - 3:AI32IntWithoutF Object 30, default variation
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
Obj32DefVar 1:AI32IntEvWoutF - - 1:AI32IntEvWoutF Object 32, default variation
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
Table 380: MSTRS485 Non group settings (advanced)

ValMasterAddr No - - Yes Validate source (master) address
Yes
AddrQueryEnbl No - - Yes Address query enable
Yes
tApplConfTout 0.00 - 300.00 s 0.01 10.00 Application layer confim timeout
ApplMultFrgRes No - - Yes Enable application for multiple fragment
Yes response
ConfMultFrag No - - Yes Confirm each multiple fragment
Yes
UREnable No - - Yes Unsolicited response enabled
Yes
URSendOnline No - - No Unsolicited response sends when on-line
Yes
UREvClassMask Off - - Off Unsolicited response, event class mask
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
UROfflineRetry 0 - 10 - 1 5 Unsolicited response retries before off-
line retry mode
tURRetryDelay 0.00 - 60.00 s 0.01 5.00 Unsolicited response retry delay in s
tUROfflRtryDel 0.00 - 60.00 s 0.01 30.00 Unsolicited response off-line retry delay
in s
UREvCntThold1 1 - 100 - 1 5 Unsolicited response class 1 event count
report treshold
625
Control

tUREvBufTout1 0.00 - 60.00 s 0.01 5.00 Unsolicited response class 1 event
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
DelOldBufFull No - - No Delete oldest event when buffer is full
Yes
tSynchTimeout 30 - 3600 s 1 1800 Time synch timeout before error status is
generated
TSyncReqAfTout No - - No Time synchronization request after
Yes timeout
DNPToSetTime No - - Yes Allow DNP to set time in IED
Yes
Averag3TimeReq No - - No Use average of 3 time requests
Yes
PairedPoint No - - Yes Enable paired point
Yes
tSelectTimeout 1.0 - 60.0 s 0.1 30.0 Select timeout
Table 381: MST1TCP Non group settings (basic)

On
Yes
MasterIP-Addr 0 - 18 - 1 0.0.0.0 Master IP-address
MasterIPNetMsk 0 - 18 - 1 255.255.255.255 Master IP net mask
2:BIWithStatus
e e
2:BIChWithTime
3:BIChWithRelTim
e
e e
2:DIChWithTime
3:DIChWithRelTim
e
2:BOStatus
626
Control

2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T tT
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
Table 382: MST1TCP Non group settings (advanced)

Yes
Yes response
Yes
Yes
Yes
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
line retry mode
in s
627
Control

report treshold
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
Yes
generated
Yes timeout
DNPToSetTime No - - No Allow DNP to set time in IED
Yes
Yes
Yes
tBrokenConTout 0 - 3600 s 1 0 Broken connection timeout
tKeepAliveT 0 - 3600 s 1 10 Keep-Alive timer

On
Yes
2:BIWithStatus
e e
2:BIChWithTime
3:BIChWithRelTim
e
628
Control

e e
2:DIChWithTime
3:DIChWithRelTim
e
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T tT
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT

Yes
Yes response
Yes
Yes
Yes
629
Control

Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
line retry mode
in s
report treshold
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
Yes
generated
Yes timeout
Yes
Yes
Yes

On
630
Control

Yes
2:BIWithStatus
e e
2:BIChWithTime
3:BIChWithRelTim
e
e e
2:DIChWithTime
3:DIChWithRelTim
e
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T tT
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT

Yes
Yes response
631
Control

Yes
Yes
Yes
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
line retry mode
in s
report treshold
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
Yes
generated
Yes timeout
Yes
Yes
Yes
632
Control

On
Yes
2:BIWithStatus
e e
2:BIChWithTime
3:BIChWithRelTim
e
e e
2:DIChWithTime
3:DIChWithRelTim
e
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T tT
2:BinCnt16EvWout
T
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithFT
633
Control

Yes
Yes response
Yes
Yes
Yes
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
line retry mode
in s
report treshold
buffer timeout
report treshold
buffer timeout
report treshold
buffer timeout
Yes
generated
Yes timeout
Yes
Yes
Yes
634
Control

12.10 Single command, 16 signals SINGLECMD

Single command, 16 signals SINGLECMD - -
12.10.1 Introduction
The IEDs can receive commands either from a substation automation system or
from the local HMI. The command function block has outputs that can be used, for
example, to control high voltage apparatuses or for other user defined functionality.

Single command, 16 signals (SINGLECMD) function has 16 binary output signals.
The outputs can be individually controlled from a substation automation system or
from the local HMI. Each output signal can be given a name with a maximum of
13 characters in PCM600.
The output signals can be of the types Off, Steady, or Pulse. This configuration
setting is done via the local HMI or PCM600 and is common for the whole
function block. The length of the output pulses are 100 ms. In steady mode,
SINGLECMD function has a memory to remember the output values at power
interruption of the IED. Also a BLOCK input is available used to block the
updating of the outputs.
The output signals, OUT1 to OUT16, are available for configuration to built-in
functions or via the configuration logic circuits to the binary outputs of the IED.
635
Control

SINGLECMD
BLOCK ÔUT1
ÔUT2
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7
ÔUT8
ÔUT9
ÔUT10
ÔUT11
ÔUT12
ÔUT13
ÔUT14
ÔUT15
ÔUT16
IEC05000698 V3 EN
Figure 339: SINGLECMD function block

Table 389: SINGLECMD Input signals
BLOCK BOOLEAN 0 Block single command function
Table 390: SINGLECMD Output signals

OUT1 BOOLEAN Single command output 1
636
Control

Table 391: SINGLECMD Non group settings (basic)
Mode Off - - Off Operation mode
Steady
Pulsed
637
638
Scheme communication
Section 13 Scheme communication
About this chapter

This chapter describes the scheme communication logic that is used in distance and
earth fault protection function to obtain almost instantaneous fault clearance for
faults on the protected line. The chapter considers scheme communication logic
(ZCPSCH), current reversal and weak-end in-feed logic (ZCRWPSCH) for the
distance protection function and scheme communication logic for residual
overcurrent protection (ECPSCH) and current reversal and weak-end in-feed logic
(ECRWPSCH) for the residual overcurrent function.
Also Local acceleration logic (ZCLCPLAL) is discussed which is a function that

can generate instantaneous tripping as a result of remote end faults without any
telecommunication.
The chapter contains a short description of the design, simplified logical block
diagrams, figure of the function block, input and output signals and setting
parameters.
13.1 Scheme communication logic for distance or

overcurrent protection ZCPSCH

Scheme communication logic for ZCPSCH - 85
distance or overcurrent protection
13.1.1 Introduction
To achieve instantaneous fault clearance for all line faults, a scheme
communication logic is provided. All types of communication schemes for
example, permissive underreaching, permissive overreaching, blocking,
unblocking, intertrip are available.
The built-in communication module (LDCM) can be used for scheme

communication signaling when included.
Phase segregated communication is also available for correct operation at

simultaneous faults when three distance protection communication channels are
available between the line ends.
639

Depending on whether a reverse or forward directed impedance zone is used to
issue the send signal, the communication schemes are divided into Blocking and
Permissive schemes, respectively.
A permissive scheme is inherently faster and has better security against false
tripping than a blocking scheme. On the other hand, a permissive scheme depends
on a received signal for a fast trip, so its dependability is lower than that of a
blocking scheme.
13.1.2.1 Blocking scheme
The principle of operation for a blocking scheme is that an overreaching zone is

allowed to trip instantaneously after the settable co-ordination time tCoord has
elapsed, when no signal is received from the remote IED.
The received signal, which shall be connected to CR, is used to not release the zone
to be accelerated to clear the fault instantaneously (after time tCoord). The
overreaching zone to be accelerated is connected to the input CACC, see figure 340.
In case of external faults, the blocking signal (CR) must be received before the
settable timer tCoord elapses, to prevent a false trip, see figure 340.
The function can be totally blocked by activating the input BLOCK, block of trip
by activating the input BLKTR, Block of signal send by activating the input BLKCS.
tCoord
CACC
t TRIP
CR AND
en05000512.vsd
IEC05000512 V1 EN
Figure 340: Basic logic for trip signal in blocking scheme
Channels for communication in each direction must be available.
13.1.2.2 Permissive underreaching scheme
In a permissive underreaching scheme, a forward directed underreach measuring

element (normally zone1) sends a permissive signal CS to the remote end if a fault
is detected in forward direction. The received signal CR is used to allow an
overreaching zone to trip after the tCoord timer has elapsed. The tCoord in
permissive underreaching schemes is normally set to zero.
The logic for trip signal in permissive scheme is shown in figure 341.
640
tCoord
CACC
t TRIP
CR AND
en05000513.vsd
IEC05000513 V1 EN
Figure 341: Logic for trip signal in permissive scheme
The permissive underreaching scheme has the same blocking possibilities as

mentioned for blocking scheme.
13.1.2.3 Permissive overreaching scheme
In a permissive overreaching scheme, a forward directed overreach measuring

element (normally zone2) sends a permissive signal CS to the remote end if a fault
is detected in forward direction. The received signal CR is used to allow an
overreaching zone to trip after the settable tCoord timer has elapsed. The tCoord in
permissive overreaching schemes is normally set to zero.
The logic for trip signal is the same as for permissive underreaching, as in
figure 341.
The permissive overreaching scheme has the same blocking possibilities as

mentioned for blocking scheme.
13.1.2.4 Unblocking scheme
In unblocking scheme, the lower dependability in permissive scheme is overcome

by using the loss of guard signal from the communication equipment to locally
create a receive signal. It is common or suitable to use the function when older, less
reliable, power-line carrier (PLC) communication is used.
The unblocking function uses a guard signal CRG, which must always be present,
even when no CR signal is received. The absence of the CRG signal for a time
longer than the setting tSecurity time is used as a CR signal, see figure 342. This
also enables a permissive scheme to operate when the line fault blocks the signal
transmission.
The received signal created by the unblocking function is reset 150 ms after the
security timer has elapsed. When that occurs an output signal LCG is activated for
signalling purpose. The unblocking function is reset 200 ms after that the guard
signal is present again.
641
CR
tSecurity CRL
t >1
1
CRG
200 ms 150 ms
t OR t AND
AND
LCG
en05000746.vsd
IEC05000746 V1 EN
Figure 342: Guard signal logic with unblocking scheme
The unblocking function can be set in three operation modes (setting Unblock):
Off The unblocking function is out of operation

No restart Communication failure shorter than tSecurity will be ignored
If CRG disappears a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signalling
13.1.2.5 Intertrip scheme
In the direct intertrip scheme, the send signal CS is sent from an underreaching
zone that is tripping the line.
The received signal CR is directly transferred to a TRIP for tripping without local
criteria. The signal is further processed in the tripping logic.
In case of single-pole tripping in multi-phase systems, a phase selection is performed.
13.1.2.6 Simplified logic diagram
The simplified logic diagram for the complete logic is shown in figure 343.
642
Unblock =Off
CR
Unblock =
OR CRL
NoRestart AND
CRL
Unblock =
tSecurit
Restart
y
CRG 1 t AND
200 ms 150 ms LCG

AND
t OR AND t
SchemeType =
Intertrip
CSUR
tSendMi
n AND
OR
BLOCK AND
CSBLK OR
CRL
Schemetype =
Permissive UR AND CS
OR
tCoord
AND 25 ms
OR
t TRIP
CACC t
Schemetype =
Permissive OR
CSOR OR AND
AND
tSendMin
OR
AND
SchemeType =
Blocking
BLKCS
AND
IEC05000515 V2 EN
Figure 343: Scheme communication logic for distance or overcurrent

protection, simplified logic diagram
643

ZCPSCH
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
IEC06000286 V2 EN
Figure 344: ZCPSCH function block

Table 392: ZCPSCH Input signals
BLKTR BOOLEAN 0 Signal for block of trip output from communication
logic
BLKCS BOOLEAN 0 Block of carrier send in permissive OR and
blocking schemes
CSBLK BOOLEAN 0 Reverse directed distance protection zone signal
CACC BOOLEAN 0 Permissive distance protection zone signal
CSOR BOOLEAN 0 Overreaching distance protection zone signal
CSUR BOOLEAN 0 Underreaching distance protection zone signal
CR BOOLEAN 0 Carrier Signal Received
CRG BOOLEAN 0 Carrier guard signal received
Table 393: ZCPSCH Output signals

CS BOOLEAN Carrier Send signal
CRL BOOLEAN Carrier signal received or missing carrier guard
signal
LCG BOOLEAN Loss of carrier guard signal
644

Table 394: ZCPSCH Group settings (basic)
On
SchemeType Off - - Permissive UR Scheme type
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 s 0.001 0.035 Co-ordination time for blocking
communication scheme
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send signal
Table 395: ZCPSCH Group settings (advanced)

Unblock Off - - Off Operation mode of unblocking logic
NoRestart
Restart
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection

Table 396: ZCPSCH technical data
Scheme type Intertrip -
Permissive Underreach
Permissive Overreach
Blocking
Co-ordination time for blocking (0.000-60.000) s ± 0.5% ± 10 ms
Minimum duration of a send signal (0.000-60.000) s ± 0.5% ± 10 ms
Security timer for loss of guard (0.000-60.000) s ± 0.5% ± 10 ms
signal detection
Operation mode of unblocking logic Off -
NoRestart
Restart
645
13.2 Phase segregated scheme communication logic for

distance protection ZC1PPSCH

Phase segregated Scheme ZC1PPSCH - 85
communication logic for distance
protection
13.2.1 Introduction
Communication between line ends is used to achieve fault clearance for all faults
on a power line. All possible types of communication schemes for example,
permissive underreach, permissive overreach and blocking schemes are available.
To manage problems with simultaneous faults on parallel power lines phase
segregated communication is needed. This will then replace the standard Scheme
communication logic for distance or Overcurrent protection (ZCPSCH) on
important lines where three communication channels (in each subsystem) are
available for the distance protection communication.
The main purpose of the Phase segregated scheme communication logic for
distance protection (ZC1PPSCH) function is to supplement the distance protection
function such that:
• fast clearance of faults is also achieved at the line end for which the faults are
on the part of the line not covered by its underreaching zone.
• correct phase selection can be maintained to support single-pole tripping for
faults occurring anywhere on the entire length of a double circuit line.
To accomplish this, three separate communication channels, that is, one per phase,
each capable of transmitting a signal in each direction is required.
ZC1PPSCH can be completed with the current reversal and WEI logic for phase
segregated communication, when found necessary in Blocking and Permissive
overreaching schemes.

Depending on whether a reverse or forward directed impedance zone is used to
issue the send signal, the communication schemes are divided into Blocking and
Permissive schemes, respectively.
A permissive scheme is inherently faster and has better security against false
tripping than a blocking scheme. On the other hand, a permissive scheme depends
on a received signal for a fast trip, so its dependability is lower than that of a
blocking scheme.
646
The Phase segregated scheme communication logic for distance protection

(ZC1PPSCH) function is a logical function built-up from logical elements. It is a
supplementary function to the distance protection, requiring for its operation inputs
from the distance protection and the communication equipment.
The type of communication-aided scheme to be used can be selected by way of the

settings.
The ability to select which distance protection zone is assigned to which input of
ZC1PPSCH makes this logic able to support practically any scheme
communication requirements regardless of their basic operating principle. The
outputs to initiate tripping and sending of the teleprotection signal are given in
accordance with the type of communication-aided scheme selected and the zone(s)
and phase(s) of the distance protection which have operated.
When power line carrier communication channels are used for permissive schemes
communication, unblocking logic which uses the loss of guard signal as a receive
criteria is provided. This logic compensates for the lack of dependability due to the
transmission of the command signal over the faulted line.
The principle of operation for a blocking scheme is that an overreaching zone is

allowed to trip instantaneously after the settable co-ordination time tCoord has
elapsed, when no signal is received from the remote IED. The received signal (sent
by a reverse looking element in the remote IED), which shall be connected to
CRLx, is used to not release the zone to be accelerated to clear the fault
instantaneously (after time tCoord). The overreaching zone to be accelerated is
connected to the input CACCLx, see figure 345. In case of external faults, the
blocking signal (CRLx) must be received before the settable timer tCoord elapses,
to prevent an unneccesary trip, see figure 345.
ZC1PPSCH can be totally blocked by activating the input BLOCK, block of trip is
achieved by activating the input BLKTRLx, Block of carrier send is done by
activating the input BLKCSLx.
tCoord 25 ms
CACCLx
t t TRLx
CRLx AND
IEC06000310 V2 EN
Figure 345: Basic logic for trip carrier in one phase of a blocking scheme
13.2.2.2 Permissive underreach scheme
In a permissive underreach scheme, a forward directed underreach measuring

element (normally zone1) sends a permissive signal CSLx to the remote end if a
fault is detected in forward direction. The received signal CRLx is used to allow an
647
overreaching zone (connected to CACCLx) to trip after the tCoord timer has
elapsed. The tCoord is in permissive underreach schemes normally set to zero. The
logic for trip carrier in permissive scheme is shown in figure 346. Three channels
for communication in each direction must be available.
tCoord 25 ms
CACCLx t t TRLx
CRLx AND
IEC07000088 V2 EN
Figure 346: Basic logic for trip carrier in one phase of a permissive underreach
scheme
13.2.2.3 Permissive overreach scheme
In a permissive overreach scheme, a forward directed overreach measuring element

(normally zone2) sends a permissive signal CSLx to the remote end if a fault is
detected in forward direction. The received signal CRLx is used to allow an
overreaching zone to trip after the settable tCoord timer has elapsed. The tCoord is
in permissive overreach schemes normally set to zero. The logic for trip carrier is
the same as for permissive underreach, see figure 345.
The permissive overreach scheme has the same blocking possibilities as mentioned
for blocking scheme above. The blocking inputs are activated from the current
reversal logic when this function is included.
Three channels for communication in each direction must be available.
In an unblocking scheme, the lower dependability in permissive scheme is

overcome by using the loss of guard signal from the communication equipment to
locally create a carrier receive signal. It is common or suitable to use the function
when older, less reliable, power-line carrier (PLC) communication is used. As
phase segregated communication schemes uses phases individually and the PLC is
typically connected single-phase or phase-to-phase it is not possible to evaluate
which of the phases to release and the unblocking scheme has thus not been supported.
13.2.2.5 Intertrip scheme
In the direct intertrip scheme, the carrier send signal CS is sent from an
underreaching zone that is tripping the line.
The received signal per phase is directly transferred to the trip function block for
tripping without local criteria. The signal is not further processed in the phase
segregated communication logic. In case of single-pole tripping the phase selection
and logic for tripping the three phases is performed in the trip function block.
648
13.2.2.6 Simplified logic diagram
The simplified logic diagram for one phase is shown in figure 347.
SchemeType =
Intertrip
CSURLx
tSendMin AND
OR
BLOCK
AND
CSBLKLx OR
CRLx
Scheme Type =
Permissive UR AND CSLx
OR
tCoord
25 ms
AND t TRLx
OR t
CACCLx
Scheme Type =
Permissive OR
CSORLx OR AND
AND
tSendMin
OR
AND
Scheme Type =
Blocking
BLKCSx
AND
CSL1
CSL2 AND
CSL2
OR CSMPH
CSL3 AND
CSL3
CSL1 AND
CSL1
CSL2 GENERAL
OR
CSL3
IEC06000311 V2 EN
Figure 347: Simplified logic diagram for one phase
649

ZC1PPSCH
BLOCK TRIP
BLKTR TRL1
BLKTRL1 TRL2
BLKTRL2 TRL3
BLKTRL3 CSL1
CACCL1 CSL2
CACCL2 CSL3
CACCL3 CSMPH
CSURL1 CRLL1
CSURL2 CRLL2
CSURL3 CRLL3
CSORL1
CSORL2
CSORL3
CSBLKL1
CSBLKL2
CSBLKL3
BLKCSL1
BLKCSL2
BLKCSL3
CRL1
CRL2
CRL3
CRMPH
IEC06000427 V2 EN
Figure 348: ZC1PPSCH function block

Table 397: ZC1PPSCH Input signals
BLKTR BOOLEAN 0 Common signal for block of trip output from
communication logic in all phases
BLKTRL1 BOOLEAN 0 Signal for block of trip output from communication
logic in Phase L1
logic in Phase L2
logic in Phase L3
CACCL1 BOOLEAN 0 Accelerated Distance protection zone start in
Phase L1
CACCL2 BOOLEAN 0 Accelerated Distance protection zone signal in
Phase L2
CACCL3 BOOLEAN 0 Accelerated Distance protection zone signal in
Phase L3
CSURL1 BOOLEAN 0 Underreaching distance protection zone signal in
Phase L1
Phase L2
Phase L3
650

CSORL1 BOOLEAN 0 Overreaching distance protection zone signal in
Phase L1
Phase L2
Phase L3
CSBLKL1 BOOLEAN 0 Reverse directed distance protection zone signal
in Phase L1
in Phase L2
in Phase L3
BLKCSL1 BOOLEAN 0 Block of carrier send in POR and Blocking
schemes in Phase L1
schemes in Phase L2
schemes in Phase L3
CRL1 BOOLEAN 0 Carrier signal received in Phase L1
CRMPH BOOLEAN 0 Carrier Signal received for multiphase fault
Table 398: ZC1PPSCH Output signals

TRIP BOOLEAN Common trip output in any of the phase
TRL1 BOOLEAN Trip output in Phase L1
CSL1 BOOLEAN Carrier Send in phase L1
CSMPH BOOLEAN carrier Send for multi phase fault
CRLL1 BOOLEAN Carrier signal received in Phase L1
651

Table 399: ZC1PPSCH Group settings (basic)
Operation Off - - Off Operation On / Off
On
Scheme Type Off - - Permissive UR Scheme type
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 s 0.001 0.000 Trip coordinate time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of Carrier Send signal

Table 400: ZC1PPSCH technical data
Scheme type Intertrip -
Permissive UR
Permissive OR
Blocking
Co-ordination time for blocking (0.000-60.000) s ± 0.5% ± 10 ms
Minimum duration of a carrier send (0.000-60.000) s ± 0.5% ± 10 ms
signal
Security timer for loss of carrier (0.000-60.000) s ± 0.5% ± 10 ms
guard detection
Operation mode of unblocking logic Off -
NoRestart
Restart
13.3 Current reversal and weak-end infeed logic for

distance protection ZCRWPSCH

Current reversal and weak-end infeed ZCRWPSCH - 85
logic for distance protection
13.3.1 Introduction
The current reversal function is used to prevent unwanted operations due to current
reversal when using permissive overreach protection schemes in application with
parallel lines when the overreach from the two ends overlap on the parallel line.
652
The weak-end infeed logic is used in cases where the apparent power behind the
protection can be too low to activate the distance protection function. When
activated, received carrier signal together with local under voltage criteria and no
reverse zone operation gives an instantaneous trip. The received signal is also
echoed back to accelerate the sending end.
Three phase or phase segregated scheme logic is available.
13.3.2.1 Current reversal logic
The current reversal logic uses a reverse zone connected to the input IRV to
recognize the fault on the parallel line in any of the phases. When the reverse zone
has been activated for a certain settable time tPickUpRev it prevents sending of a
communication signal and activation of trip signal for a predefined time tDelayRev.
This makes it possible for the receive signal to reset before the trip signal is
activated due to the current reversal by the forward directed zone, see figure 349.
tPickUpRev 10 ms tPickUpRev
IRV t t t
tDelayRev
IRVL
IRVBLK AND t
en05000122_2_en.vsd
IEC05000122 V2 EN
Figure 349: Current reversal logic
The preventing of sending the send signal CS and activating of the TRIP in the
scheme communication block ZCPSCH is carried out by connecting the IRVL
signal to input BLOCK in the ZCPSCH function.
The function has an internal 10 ms drop-off timer which secure that the current
reversal logic will be activated for short input signals even if the pick-up timer is
set to zero.
13.3.2.2 Weak-end infeed logic
The weak-end infeed logic (WEI) function sends back (echoes) the received signal
under the condition that no fault has been detected on the weak-end by different
fault detection elements (distance protection in forward and reverse direction).
The WEI function returns the received signal, see figure 350, when:
653
• No active signal present on the input BLOCK.

• The functional input CRL is active. This input is usually connected to the CRL
output on the scheme communication logic ZCPSCH .
• The WEI function is not blocked by the active signal connected to the
WEIBLK1 functional input or to the VTSZ functional input. The later is
usually configured to the BLOCK functional output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2
functional input. An OR combination of all fault detection functions (not
undervoltage) as present within the IED is usually used for this purpose.
IEC05000123 V1 EN
Figure 350: Echo of a received signal by the WEI function
When an echo function is used in both IEDs (should generally be avoided), a

spurious signal can be looped round by the echo logics. To avoid a continuous lock-
up of the system, the duration of the echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria, when the tripping

of the local breaker is selected, setting WEI = Echo&Trip, together with the WEI
function and ECHO signal has been issued by the echo logic, see figure 351.
Figure 351: Tripping part of the WEI logic, simplified diagram
654

ZCRWPSCH
U3P* IRVL
BLOCK TRWEI
IRVBLK TRWEIL1
IRV TRWEIL2
WEIBLK1 TRWEIL3
WEIBLK2 ECHO
VTSZ
CBOPEN
CRL
IEC06000287 V2 EN
Figure 352: ZCRWPSCH function block

Table 401: ZCRWPSCH Input signals
SIGNAL
IRVBLK BOOLEAN 0 Block of current reversal function
IRV BOOLEAN 0 Activation of current reversal logic
WEIBLK1 BOOLEAN 0 Block of WEI logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other
protections
VTSZ BOOLEAN 0 Block of trip from WEI logic through fuse-failure
function
CBOPEN BOOLEAN 0 Block of trip from WEI logic by an open breaker
CRL BOOLEAN 0 POR Carrier receive for WEI logic
Table 402: ZCRWPSCH Output signals

IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip of WEI logic
TRWEIL1 BOOLEAN Trip of WEI logic in phase L1
ECHO BOOLEAN Carrier send by WEI logic
655

Table 403: ZCRWPSCH Group settings (basic)
CurrRev Off - - Off Operating mode of Current Reversal
On Logic
tPickUpRev 0.000 - 60.000 s 0.001 0.020 Pickup time for current reversal logic
tDelayRev 0.000 - 60.000 s 0.001 0.060 Time Delay to prevent Carrier send and
local trip
WEI Off - - Off Operating mode of WEI logic
Echo
Echo & Trip
tPickUpWEI 0.000 - 60.000 s 0.001 0.010 Coordination time for the WEI logic
UPP< 10 - 90 %UB 1 70 Phase to Phase voltage for detection of
fault condition
UPN< 10 - 90 %UB 1 70 Phase to Neutral voltage for detection of
fault condition

Table 404: ZCRWPSCH technical data
Detection level phase-to-neutral (10-90)% of UBase ± 1.0% of Ur
voltage
Detection level phase-to-phase (10-90)% of UBase ± 1.0% of Ur
voltage
Reset ratio <105% -
Operate time for current reversal (0.000-60.000) s ± 0.5% ± 10 ms
logic
Delay time for current reversal (0.000-60.000) s ± 0.5% ± 10 ms
Coordination time for weak-end (0.000-60.000) s ± 0.5% ± 10 ms
infeed logic
13.4 Local acceleration logic ZCLCPLAL

Local acceleration logic ZCLCPLAL - -
656
13.4.1 Introduction
To achieve fast clearing of faults on the whole line, when no communication
channel is available, local acceleration logic (ZCLCPLAL) can be used. This logic
enables fast fault clearing during certain conditions, but naturally, it can not fully
replace a communication channel.
The logic can be controlled either by the autorecloser (zone extension) or by the loss-
of-load current (loss-of-load acceleration).
13.4.2.1 Zone extension
The overreaching zone is connected to the input EXACC. For this reason,
configure the ARREADY functional input to a READY functional output of a used
autoreclosing function or via the selected binary input to an external autoreclosing
device, see figure 353.
This will allow the overreaching zone to trip instantaneously.
IEC05000157 V1 EN
Figure 353: Simplified logic diagram for local acceleration logic
After the autorecloser initiates the close command and remains in the reclaim state,
there will be no ARREADY signal, and the protection will trip normally with step
distance time functions.
In case of a fault on the adjacent line within the overreaching zone range, an
unwanted autoreclosing cycle will occur. The step distance function at the
reclosing attempt will prevent an unwanted retrip when the breaker is reclosed.
On the other hand, at a persistent line fault on line section not covered by
instantaneous zone (normally zone 1) only the first trip will be "instantaneous".
The function will be blocked if the input BLOCK is activated (common with loss-of-
load acceleration).
657
13.4.2.2 Loss-of-Load acceleration
When the "acceleration" is controlled by a loss-of-load, the overreaching zone used

for "acceleration" connected to input LLACC is not allowed to trip
"instantaneously" during normal non-fault system conditions. When all three-phase
currents have been above the set value MinCurr for more than setting tLowCurr, an
overreaching zone will be allowed to trip "instantaneously" during a fault condition
when one or two of the phase currents will become low due to a three-phase trip at
the opposite IED, see figure 354. The current measurement is performed internally
and the internal STILL signal becomes logical one under the described conditions.
The load current in a healthy phase is in this way used to indicate the tripping at the
opposite IED. Note that this function will not operate in case of three-phase faults,
because none of the phase currents will be low when the opposite IED is tripped.
IEC05000158 V1 EN
Figure 354: Loss-of-load acceleration - simplified logic diagram
Breaker closing signals can if decided be connected to block the function during
normal closing.

ZCLCPLAL
I3P* TRZE
BLOCK TRLL
ARREADY
NDST
EXACC
BC
LLACC
IEC05000333 V2 EN
Figure 355: ZCLCPLAL function block
658

Table 405: ZCLCPLAL Input signals
SIGNAL
ARREADY BOOLEAN 0 Autoreclosure ready, releases function used for
fast trip
NDST BOOLEAN 0 Non directional criteria used to prevent
instantaneous trip
EXACC BOOLEAN 0 Connected to function used for tripping at zone
xtension
BC BOOLEAN 0 Breaker Close
LLACC BOOLEAN 0 Connected to function used for tripping at loss of
load
Table 406: ZCLCPLAL Output signals

TRZE BOOLEAN Trip by zone extension
TRLL BOOLEAN Trip by loss of load

Table 407: ZCLCPLAL Group settings (basic)
On
IBase 1 - 99999 A 1 3000 Base setting for current values
LoadCurr 1 - 100 %IB 1 10 Load current before disturbance in % of
IBase
LossOfLoad Off - - Off Enable/Disable operation of Loss of load.
On
ZoneExtension Off - - Off Enable/Disable operation of Zone
On extension
MinCurr 1 - 100 %IB 1 5 Lev taken as curr loss due to remote CB
trip in % of IBase
tLowCurr 0.000 - 60.000 s 0.001 0.200 Time delay on pick-up for MINCURR
value
tLoadOn 0.000 - 60.000 s 0.001 0.000 Time delay on pick-up for load current
release
tLoadOff 0.000 - 60.000 s 0.001 0.300 Time delay on drop off for load current
release
659
13.5 Scheme communication logic for residual

overcurrent protection ECPSCH

Scheme communication logic for ECPSCH - 85
residual overcurrent protection
13.5.1 Introduction
To achieve fast fault clearance of earth faults on the part of the line not covered by
the instantaneous step of the residual overcurrent protection, the directional
residual overcurrent protection can be supported with a logic that uses
communication channels.
In the directional scheme, information of the fault current direction must be

transmitted to the other line end. With directional comparison, a short operates time
of the protection including a channel transmission time, can be achieved. This short
operate time enables rapid autoreclosing function after the fault clearance.
The communication logic module for directional residual current protection

enables blocking as well as permissive under/overreaching schemes. The logic can
also be supported by additional logic for weak-end infeed and current reversal,
included in Current reversal and weak-end infeed logic for residual overcurrent
protection Current reversal and weak-end infeed logic for residual overcurrent
protection (ECRWPSCH) function.

The four step directional residual overcurrent protection EF4PTOC is configured to
give input information, that is directional fault detection signals, to the ECPSCH
logic:
660
• Input signal CACC is used for tripping of the communication scheme,

normally the start signal of a forward overreaching step of STFW.
• Input signal CSBLK is used for sending block signal in the blocking
communication scheme, normally the start signal of a reverse overreaching
step of STRV.
• Input signal CSUR is used for sending permissive signal in the underreaching
permissive communication scheme, normally the start signal of a forward
underreaching step of STINn, where n corresponds to the underreaching step.
• Input signal CSOR is used for sending permissive signal in the overreaching
permissive communication scheme, normally the start signal of a forward
overreaching step of STINn, where n corresponds to the overreaching step.
In addition to this a signal from the autoreclosing function should be configured to

the BLKCS input for blocking of the function at a single phase reclosing cycle.
In the blocking scheme a signal is sent to the other line end if the directional
element detects an earth fault in the reverse direction. When the forward directional
element operates, it trips after a short time delay if no blocking signal is received
from the opposite line end. The time delay, normally 30 – 40 ms, depends on the
communication transmission time and a chosen safety margin.
One advantage of the blocking scheme is that only one channel (carrier frequency)
is needed if the ratio of source impedances at both end is approximately equal for
zero and positive sequence source impedances, the channel can be shared with the
impedance measuring system, if that system also works in the blocking mode. The
communication signal is transmitted on a healthy line and no signal attenuation will
occur due to the fault.
Blocking schemes are particular favorable for three-terminal applications if there is

no zero-sequence outfeed from the tapping. The blocking scheme is immune to
current reversals because the received signal is maintained long enough to avoid
unwanted operation due to current reversal. There is never any need for weak-end
infeed logic, because the strong end trips for an internal fault when no blocking
signal is received from the weak end. The fault clearing time is however generally
longer for a blocking scheme than for a permissive scheme.
If the fault is on the line, the forward direction measuring element operates. If no
blocking signal comes from the other line end via the CR binary input (received
signal) the TRIP output is activated after the tCoord set time delay.
661
IEC05000448 V1 EN
Figure 356: Simplified logic diagram for blocking scheme
13.5.2.2 Permissive under/overreaching scheme
In the permissive scheme the forward directed earth-fault measuring element sends
a permissive signal to the other end, if an earth fault is detected in the forward
direction. The directional element at the other line end must wait for a permissive
signal before activating a trip signal. Independent channels must be available for
the communication in each direction.
An impedance measuring IED, which works in the same type of permissive mode,
with one channel in each direction, can share the channels with the communication
scheme for residual overcurrent protection. If the impedance measuring IED works
in the permissive overreaching mode, common channels can be used in single line
applications. In case of double lines connected to a common bus at both ends, use
common channels only if the ratio Z1S/Z0S (positive through zero-sequence source
impedance) is about equal at both ends. If the ratio is different, the impedance
measuring and the directional earth-fault current system of the healthy line may
detect a fault in different directions, which could result in unwanted tripping.
Common channels cannot be used when the weak-end infeed function is used in
the distance or earth-fault protection.
In case of an internal earth-fault, the forward directed measuring element operates

and sends a permissive signal to the remote end via the CS output (sent signal).
Local tripping is permitted when the forward direction measuring element operates
and a permissive signal is received via the CR binary input (received signal).
The permissive scheme can be of either underreaching or overreaching type. In the

underreaching alternative, an underreaching directional residual overcurrent
measurement element will be used as sending criterion of the permissive input
signal CSUR.
662
In the overreaching alternative, an overreaching directional residual overcurrent

measurement element will be used as sending criterion of the permissive input
signal CSOR. Also the underreaching input signal CSUR can initiate sending.
BLOCK
CRL
CR AND
25 ms
t TRIP
0 - 60 s
CACC AND AND t

50 ms
tCoord
t
AND
BLKCS OR CS
AND
Overreach
CSOR AND
CSUR OR
en05000280_2_en.vsd
IEC05000280 V2 EN
In unblocking scheme, the lower dependability in permissive scheme is overcome

by using the loss of guard signal from the communication equipment to locally
create a receive signal. It is common or suitable to use the function when older, less
reliable, power line carrier (PLC) communication is used.
The unblocking function uses a guard signal CRG, which must always be present,
even when no CR signal is received. The absence of the CRG signal for a time
longer than the setting tSecurity time is used as a CR signal, see figure 357. This
also enables a permissive scheme to operate when the line fault blocks the signal
transmission.
The received signal created by the unblocking function is reset 150 ms after the
security timer has elapsed. When that occurs an output signal LCG is activated for
signaling purpose. The unblocking function is reset 200 ms after that the guard
signal is present again.
663
CR
tSecurity CRL
t >1
1
CRG
200 ms 150 ms
t OR t AND
AND
LCG
en05000746.vsd
IEC05000746 V1 EN
Figure 357: Guard signal logic with unblocking scheme
The unblocking function can be set in three operation modes (setting Unblock):
Off: The unblocking function is out of operation

No restart: Communication failure shorter than tSecurity will be ignored
If CRG disappears, a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signaling

ECPSCH
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
IEC06000288 V2 EN
Figure 358: ECPSCH function block
664

Table 408: ECPSCH Input signals
BLKTR BOOLEAN 0 Signal for blocking trip due to communication logic
BLKCS BOOLEAN 0 Signal for blocking CS in Overreach and Blocking
schemes
CSBLK BOOLEAN 0 Reverse residual overcurrent signal for Carrier
Send
CACC BOOLEAN 0 Signal to be used for tripping by Communication
Scheme
CSOR BOOLEAN 0 Overreaching residual overcurrent signal for
Carrier Send
CSUR BOOLEAN 0 Underreaching residual overcurrent signal for
Carrier Send
CR BOOLEAN 0 Carrier Receive for Communication Scheme Logic
CRG BOOLEAN 0 Carrier guard signal received
Table 409: ECPSCH Output signals

TRIP BOOLEAN Trip by Communication Scheme Logic
CS BOOLEAN Carrier Send by Communication Scheme Logic
CRL BOOLEAN Carrier Receive from Communication Scheme
Logic
LCG BOOLEAN loss of carrier guard signal

Table 410: ECPSCH Group settings (basic)
On
SchemeType Off - - Permissive UR Scheme type, Mode of Operation
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 s 0.001 0.035 Communication scheme coordination
time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send signal
665
Table 411: ECPSCH Group settings (advanced)

Unblock Off - - Off Operation mode of unblocking logic
NoRestart
Restart
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection

Table 412: ECPSCH technical data
Scheme type Permissive Underreaching -
Permissive Overreaching
Blocking
Communication scheme (0.000-60.000) s ± 0.5% ± 10 ms
coordination time

residual overcurrent protection ECRWPSCH

Current reversal and weak-end infeed ECRWPSCH - 85
logic for residual overcurrent protection
13.6.1 Introduction
The Current reversal and weak-end infeed logic for residual overcurrent protection
ECRWPSCH is a supplement to Scheme communication logic for residual
overcurrent protection ECPSCH.
To achieve fast fault clearing for all earth faults on the line, the directional earth-
fault protection function can be supported with logic that uses communication
channels.
The 670 series IEDs have for this reason available additions to scheme
communication logic.
If parallel lines are connected to common busbars at both terminals, overreaching

permissive communication schemes can trip unselectively due to fault current
reversal. This unwanted tripping affects the healthy line when a fault is cleared on
the other line. This lack of security can result in a total loss of interconnection
between the two buses. To avoid this type of disturbance, a fault current reversal
logic (transient blocking logic) can be used.
666
Permissive communication schemes for residual overcurrent protection can

basically operate only when the protection in the remote IED can detect the fault.
The detection requires a sufficient minimum residual fault current, out from this
IED. The fault current can be too low due to an opened breaker or high-positive and/
or zero-sequence source impedance behind this IED. To overcome these
conditions, weak-end infeed (WEI) echo logic is used.
13.6.2.1 Directional comparison logic function
The directional comparison function contains logic for blocking overreaching and
permissive overreaching schemes.
The circuits for the permissive overreaching scheme contain logic for current
reversal and weak-end infeed functions. These functions are not required for the
blocking overreaching scheme.
Use the independent or inverse time functions in the directional earth-fault

protection module to get back-up tripping in case the communication equipment
malfunctions and prevents operation of the directional comparison logic.
Figure 359 and figure 360 show the logic circuits.
Connect the necessary signal from the autorecloser for blocking of the directional
comparison scheme, during a single-phase autoreclosing cycle, to the BLOCK
input of the directional comparison module.
13.6.2.2 Fault current reversal logic
The fault current reversal logic uses a reverse directed element, connected to input
signal IRV, which recognizes that the fault is in reverse direction. When the
reverse direction element is activated during the tPickUpRev time, the output signal
IRVL is activated, see figure 359. The logic is now ready to handle a current
reversal without tripping. Output signal IRVL will be connected to the block input
on the permissive overreaching scheme.
When the fault current is reversed on the non faulty line, IRV is deactivated and
IRVBLK is activated. The reset of IRVL is delayed by the tDelayRev time, see
figure 359. This ensures the reset of the received CR signal.
667
BLOCK
0-60 s 10 ms 0-60 s 0-60 s
IRV AND IRVL
t t t t
IRVBLK tPickUpRev tPickUpRev tDelayRev
IEC09000031 V1 EN
Figure 359: Simplified logic diagram, current reversal
13.6.2.3 Weak-end infeed logic
The weak-end infeed function can be set to send only an echo signal (WEI=Echo)
or an echo signal and a trip signal (WEI=Echo & Trip). See figure 360 and figure
361.
The weak-end infeed logic uses normally a reverse and a forward direction
element, connected to WEIBLK1 via an OR-gate. See figure 360. If neither the
forward nor the reverse directional measuring element is activated during the last
200 ms, the weak-end infeed logic echoes back the received permissive signal. See
figure 360.
If the forward or the reverse directional measuring element is activated during the
last 200 ms, the fault current is sufficient for the IED to detect the fault with the
earth-fault function that is in operation.
BLOCK
200 ms
WEIBLK1 t
50 ms 200 ms
AND
ECHO
& t t
CRL
WEI = Echo
IEC09000032 V1 EN
Figure 360: Simplified logic diagram, weak-end infeed - Echo
With the Echo & Trip setting, the logic sends an echo according to above. Further,
it activates the TRWEI signal to trip the breaker if the echo conditions are fulfilled
and the neutral point voltage is above the set operate value for 3U0>.
The voltage signal that is used to calculate the zero sequence voltage is set in the
earth-fault function that is in operation.
668
BLOCK
200 ms
WEIBLK1 50 ms 200 ms
AND
ECHO
t
AND t t
CRL
TRWEI
WEI = Echo&Trip AND
ST3U0
AND
CBOPEN
IEC09000020 V1 EN
Figure 361: Simplified logic diagram, weak-end infeed - Echo & Trip
The weak-end infeed echo sent to the strong line end has a maximum duration of
200 ms. When this time period has elapsed, the conditions that enable the echo
signal to be sent are set to zero for a time period of 50 ms. This avoids ringing
action if the weak-end echo is selected for both line ends.

ECRWPSCH
U3P* IRVL
BLOCK TRWEI
IRVBLK ECHO
IRV CR
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL
IEC06000289 V2 EN
Figure 362: ECRWPSCH function block

Table 413: ECRWPSCH Input signals
SIGNAL
IRVBLK BOOLEAN 0 Block of current reversal function
IRV BOOLEAN 0 Activation of current reversal logic
WEIBLK1 BOOLEAN 0 Block of WEI Logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other
protections
VTSZ BOOLEAN 0 Block of trip from WEI logic through fuse-failure
function
CRL BOOLEAN 0 POR Carrier receive for WEI logic
669
Table 414: ECRWPSCH Output signals

IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip of WEI logic
ECHO BOOLEAN Carrier send by WEI logic
CR BOOLEAN POR Carrier signal received from remote end

Table 415: ECRWPSCH Group settings (basic)
CurrRev Off - - Off Operating mode of Current Reversal
On Logic
local trip
WEI Off - - Off Operating mode of WEI logic
Echo
Echo & Trip
3U0> 5 - 70 %UB 1 25 Neutral voltage setting for fault
conditions measurement

Table 416: ECRWPSCH technical data
Operating mode of WEI logic Off -
Echo
Echo & Trip
Operate voltage 3Uo for WEI trip (5-70)% of UBase ± 1.0% of Ur
Reset ratio >95% -

logic
Coordination time for weak-end (0.000–60.000) s ± 0.5% ± 10 ms
infeed logic
670

phase segregated communication ZC1WPSCH

Current reversal and weak-end infeed ZC1WPSCH - 85
logic for phase segregated
communication
13.7.1 Introduction
Current reversal and weak-end infeed logic for phase segregated communication
(ZC1WPSCH) function is used to prevent unwanted operations due to current
reversal when using permissive overreach protection schemes in application with
parallel lines when the overreach from the two ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the
protection can be too low to activate the distance protection function. When
activated, received carrier signal together with local under voltage criteria and no
reverse zone operation gives an instantaneous trip. The received signal is also
echoed back to accelerate the sending end.
13.7.2.1 Current reversal logic
The current reversal logic uses a reverse zone connected to the input IRVLx to
recognize the fault on the parallel line in phase Lx. When the reverse zone has been
activated for a certain settable time tPickUpRev it prevents sending of a
communication signal and activation of trip signal for a predefined time tDelayRev.
This makes it possible for the carrier receive signal to reset before the carrier aided
trip signal is activated due to the current reversal by the forward directed zone, see
figure 363.
tPickUpRev 10 ms tPickUpRev
IRVLn t t t
tDelayRev
IRVOPLn
IRVBLKLn & t
IEC06000474 V2 EN
Figure 363: Current reversal logic
The preventing of sending carrier send signal CSLn and activating of the TRIPLn
in the Scheme communication logic for distance or Overcurrent protection
671
(ZCPSCH) is carried out by connecting the IRVOPLn signal to input BLOCKLn in

ZCPSCH function.
The Current reversal and weak-end infeed logic for phase segregated
communication (ZC1WPSCH) function has an internal 10 ms drop-off timer which
secure that the current reversal logic will be activated for short input signals even if
the pick-up timer is set to zero.
Weak-end infeed logic
The WEI function sends back (echoes) the received carrier signal under the
condition that no fault has been detected at the weak end by different fault
detection elements (distance protection in forward and reverse direction).
VTSZ
BLOCK >1
tWEI 50 ms 200 ms ECHOLn - cont.

CRLn
t & t t ECHOLn
&
200 ms
WEIBLKL1
t
200 ms
WEIBLKL2
t
IEC07000085 V2 EN
Figure 364: Weak-end infeed logic
The WEI function returns the received carrier signal, see figure 364, when:
• The input CRLx is active. This input is usually connected to the CRLx output
on the scheme communication logic for distance or Overcurrent protection
(ZCPSCH).
• The WEI function is not blocked by the active signal connected to the
WEIBLKLx input or to the VTSZ input. The later is usually configured to the
STGEN output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 input.
An OR combination of all fault detection functions (not undervoltage) as
present within the IED is usually used for this purpose.
When an echo function is used in both IEDs (should generally be avoided), a

spurious signal can be looped round by the echo logics. To avoid a continuous lock-
up of the system, the duration of the echoed signal is limited to 200 ms. An
undervoltage criteria is used as an additional tripping criteria, when the tripping of
the local breaker is selected, setting WEI = Echo &Trip, together with the WEI
function and ECHO signal has been issued by the echo logic, see figure 365.
672
WEI = Echo&Trip
ECHOLn - cont.
CBOPEN
STUL1N
100 ms TRWEI
OR OR
STUL2N AND t
STUL3N 15 ms
TRWEIL1
AND t
15 ms
TRWEIL2
AND t
15 ms
TRWEIL3
AND t
en00000551.vsd
Figure 365: Tripping part of the WEI logic, simplified diagram

ZC1WPSCH
U3P* TRPWEI
BLOCK TRPWEIL1
BLKZ TRPWEIL2
CBOPEN TRPWEIL3
CRL1 IRVOP
CRL2 IRVOPL1
CRL3 IRVOPL2
IRVL1 IRVOPL3
IRVL2 ECHO
IRVL3 ECHOL1
IRVBLKL1 ECHOL2
IRVBLKL2 ECHOL3
IRVBLKL3
WEIBLK
WEIBLKL1
WEIBLKL2
WEIBLKL3
WEIBLKOP
WEIBLKO1
WEIBLKO2
WEIBLKO3
IEC06000477 V2 EN
Figure 366: ZC1WPSCH function block
673

Table 417: ZC1WPSCH Input signals
U3P GROUP - Voltage
SIGNAL
BLKZ BOOLEAN 0 Block of trip from WEI logic by the fuse-failure
function
CRL1 BOOLEAN 0 Carrier receive for WEI logic in Phase L1
IRVL1 BOOLEAN 0 Activation of current reversal logic in Phase L1
IRVL2 BOOLEAN 0 Activation of current reversal logic in Phase L2
IRVL3 BOOLEAN 0 Activation of current reversal logic in phase L3
IRVBLKL1 BOOLEAN 0 Block of current reversal function in Phase L1
WEIBLK BOOLEAN 0 Block of WEI logic
WEIBLKL1 BOOLEAN 0 Block of WEI logic in Phase L1
WEIBLKOP BOOLEAN 0 Block of WEI logic due to operation of other
protection
WEIBLKO1 BOOLEAN 0 Block of WEI logic in Phase L1 due to operation
of other protection
of other protections
of other protections
Table 418: ZC1WPSCH Output signals

TRPWEI BOOLEAN Trip of WEI logic
TRPWEIL1 BOOLEAN Trip of WEI logic in Phase L1
IRVOP BOOLEAN Operation of current reversal logic
IRVOPL1 BOOLEAN Operation of current reversal logic in Phase L1
674

ECHO BOOLEAN Carrier Send by WEI logic
ECHOL1 BOOLEAN Carrier Send by WEI logic in Phase L1

Table 419: ZC1WPSCH Group settings (basic)
UBase 0.05 - 2000.00 kV 0.05 400.00 Base setting for Voltage level
OperCurrRev Off - - Off Operating mode of Current Reversal
On Logic
local trip
OperationWEI Off - - Off Operating mode of WEI logic
Echo
Echo & Trip
UPE< 10 - 90 %UB 1 70 Phase to Earth voltage for detection of
fault condition
UPP< 10 - 90 %UB 1 70 Phase to Phase voltage for detection of
fault condition

Table 420: ZC1WPSCH technical data
Detection level phase to neutral (10-90)% of UBase ± 1.0% of Ur
voltage
Detection level phase to phase (10-90)% of UBase ± 1.0% of Ur
voltage
Reset ratio <105% -
Coordination time for weak-end (0.000-60.000) s ± 0.5% ± 10 ms
infeed logic
675
676
Logic
Section 14 Logic
About this chapter

This chapter describes primarily tripping and trip logic functions. The way the
functions work, their setting parameters, function blocks, input and output signals
and technical data are included for each function.
14.1 Tripping logic SMPPTRC

Tripping logic SMPPTRC 94
I->O
SYMBOL-K V1 EN
14.1.1 Introduction
A function block for protection tripping is provided for each circuit breaker
involved in the tripping of the fault. It provides the pulse prolongation to ensure a
trip pulse of sufficient length, as well as all functionality necessary for correct co-
operation with autoreclosing functions.
The trip function block includes functionality for evolving faults and breaker lock-
out.

The duration of a trip output signal from tripping logic SMPPTRC is settable
(tTripMin). The pulse length should be long enough to secure the breaker opening.
For three-phase tripping, SMPPTRC has a single input (TRIN) through which all
trip output signals from the protection functions within the IED, or from external
protection functions via one or more of the IEDs binary inputs, are routed. It has a
single trip output (TRIP) for connection to one or more of the IEDs binary outputs,
as well as to other functions within the IED requiring this signal.
677
Logic
BLOCK
tTripMin TRIP
TRIN OR
AND t
Operation Mode = On
Program = 3Ph
en05000789.vsd
IEC05000789 V1 EN
Figure 367: Simplified logic diagram for three phase trip
SMPPTRC function for single-phase and two-phase tripping has additional phase
segregated inputs for this, as well as inputs for faulted phase selection. The latter
inputs enable single- phase and two-phase tripping for those functions which do not
have their own phase selection capability, and therefore which have just a single
trip output and not phase segregated trip outputs for routing through the phase
segregated trip inputs of the expanded SMPPTRC function. Examples of such
protection functions are the residual overcurrent protections. The expanded
SMPPTRC function has two inputs for these functions, one for impedance tripping
(for example, carrier-aided tripping commands from the scheme communication
logic), and one for earth fault tripping (for example, tripping output from a residual
overcurrent protection).
The expanded SMPPTRC function has three trip outputs TRL1, TRL2, TRL3
(besides the trip output TRIP), one per phase, for connection to one or more of the
IEDs binary outputs, as well as to other functions within the IED requiring these
signals. There are also separate output signals indicating single-phase, two-phase or
three-phase trip. These signals are important for cooperation with the autorecloser
SMBRREC function.
The expanded SMPPTRC function is equipped with logic which secures correct
operation for evolving faults as well as for reclosing on to persistent faults. A
special input is also provided which disables single- phase and two-phase tripping,
forcing all tripping to be three-phase.
In multi-breaker arrangements, one SMPPTRC function block is used for each

breaker. This can be the case if single pole tripping and autoreclosing is used.
The breaker close lockout function can be activated from an external trip signal
from another protection function via input (SETLKOUT) or internally at a three-
phase trip, if desired.
It is possible to lockout seal in the tripping output signals or use blocking of

closing only the choice is by setting TripLockout.
The TRPx function for single- and two-pole tripping has additional phase
segregated inputs for this, as well as inputs for faulted phase selection. The latter
inputs enable single- and two-pole tripping for those functions which do not have
678
Logic
their own phase selection capability, and therefore which have just a single trip
output and not phase segregated trip outputs for routing through the phase
segregated trip inputs of the expanded TRPx function. Examples of such protection
functions are the residual overcurrent protections. The expanded TRPx function
has two inputs for these functions, one for impedance tripping (e.g. carrier-aided
tripping commands from the scheme communication logic), and one for earth fault
tripping (e.g. tripping output from a residual overcurrent protection). Additional
logic secures a three-pole final trip command for these protection functions in the
absence of the required phase selection signals.
The expanded TRPx function has three trip outputs TRL1, TRL2, TRL3 (besides
the trip output TRIP), one per phase, for connection to one or more of the IEDs
binary outputs, as well as to other functions within the IED requiring these signals.
There are also separate output signals indicating single pole, two pole or three pole
trip. These signals are important for cooperation with the auto-reclosing function.
The expanded TRPx function is equipped with logic which secures correct
operation for evolving faults as well as for reclosing on to persistent faults. A
special input is also provided which disables single- and two-pole tripping, forcing
all tripping to be three-pole.
In multi-breaker arrangements, one TRPx function block is used for each breaker.
This can be the case if single pole tripping and auto-reclosing is used.
The breaker close lockout function can be activated from an external trip signal
from another protection function via input (SETLKOUT) or internally at a three
pole trip, if desired.
It is possible to lockout seal in the tripping output signals or use blocking of

closing only the choice is by setting TripLockout.
TRINL1
TRINL2
OR
TRINL3
1PTRZ OR
1PTREF
OR
TRIN RSTTRIP - cont.
AND
Program = 3ph
en05000517.vsd
IEC05000517 V1 EN
Figure 368: Three-phase front logic — simplified logic diagram
679
Logic
TRIN
TRINL1
PSL1 L1TRIP
OR
AND
TRINL2
PSL2 L2TRIP
OR
AND
TRINL3
PSL3 L3TRIP
OR
AND
OR
OR OR
-loop
-loop
OR
AND AND
AND
1PTREF AND 50 ms
1PTRZ OR t
en05000518.vsd
Figure 369: Phase segregated front logic
680
Logic
150 ms
L1TRIP OR
t RTRIP
OR
2000 ms
t
OR
AND
150 ms
L2TRIP OR
t STRIP
OR
2000 ms
t
OR
AND
150 ms
L3TRIP OR
t TTRIP
OR
2000 ms
t
OR
AND
OR
OR AND
P3PTR
OR
-loop
en05000519.vsd
Figure 370: Additional logic for the 1ph/3ph operating mode
681
Logic
150 ms
L1TRIP - cont.
t OR RTRIP
OR
2000 ms
t
AND
150 ms
L2TRIP
t OR STRIP
OR
2000 ms
t AND
AND
150 ms
L3TRIP
t OR TTRIP
OR
2000 ms
t
AND
OR
AND
TRIP OR
OR
-loop
en05000520.vsd
Figure 371: Additional logic for the 1ph/2ph/3ph operating mode
682
Logic
BLOCK
RTRIP TRL1
AND
OR
STRIP TRL2
AND
OR
TTRIP TRL3
AND
OR
RSTTRIP
TRIP
OR
TR3P
AND AND
OR
-loop
AND 10 ms
TR1P
AND t
AND 5 ms
TR2P
AND t
OR
AND
-loop
en05000521.vsd
Figure 372: Final tripping circuits

SMPPTRC
BLOCK TRIP
BLKLKOUT TRL1
TRIN TRL2
TRINL1 TRL3
TRINL2 TR1P
TRINL3 TR2P
PSL1 TR3P
PSL2 CLLKOUT
PSL3
1PTRZ
1PTREF
P3PTR
SETLKOUT
RSTLKOUT
IEC05000707 V2 EN
Figure 373: SMPPTRC function block

Table 421: SMPPTRC Input signals
BLKLKOUT BOOLEAN 0 Blocks circuit breaker lockout output (CLLKOUT)
TRIN BOOLEAN 0 Trip all phases
683
Logic

TRINL1 BOOLEAN 0 Trip phase 1
PSL1 BOOLEAN 0 Functional input for phase selection in phase L1
1PTRZ BOOLEAN 0 Zone Trip with a separate phase selection
1PTREF BOOLEAN 0 Single phase DEF Trip for separate phase
selection
P3PTR BOOLEAN 0 Prepare all tripping to be three-phase
SETLKOUT BOOLEAN 0 Input for setting the circuit breaker lockout function
RSTLKOUT BOOLEAN 0 Input for resetting the circuit breaker lockout
function
Table 422: SMPPTRC Output signals

TRIP BOOLEAN General trip output signal
TR1P BOOLEAN Tripping single-pole
TR2P BOOLEAN Tripping two-pole
TR3P BOOLEAN Tripping three-pole
CLLKOUT BOOLEAN Circuit breaker lockout output (set until reset)

Table 423: SMPPTRC Group settings (basic)
On
Program 3 phase - - 1ph/3ph Three ph; single or three ph; single, two
1ph/3ph or three ph trip
1ph/2ph/3ph
tTripMin 0.000 - 60.000 s 0.001 0.150 Minimum duration of trip output signal
Table 424: SMPPTRC Group settings (advanced)

TripLockout Off - - Off On: activate output (CLLKOUT) and trip
On latch, Off: only outp
AutoLock Off - - Off On: lockout from input (SETLKOUT) and
On trip, Off: only inp
684
Logic

Table 425: SMPPTRC technical data
Trip action 3-ph, 1/3-ph, 1/2/3-ph -
Minimum trip pulse length (0.000-60.000) s ± 0.5% ± 10 ms
Timers (0.000-60.000) s ± 0.5% ± 10 ms
14.2 Trip matrix logic TMAGGIO

Trip matrix logic TMAGGIO - -
14.2.1 Introduction
Trip matrix logic (TMAGGIO) function is used to route trip signals and/or other
logical output signals to different output contacts on the IED.
TMAGGIO output signals and the physical outputs are available in PCM600 and
this allows the user to adapt the signals to the physical tripping outputs according
to the specific application needs.

Trip matrix logic (TMAGGIO) block is provided with 32 input signals and 3
output signals. The function block incorporates internal logic OR gates in order to
provide the necessary grouping of connected input signals (for example, for
tripping and alarming purposes) to the three output signals from the function block.
Internal built-in OR logic is made in accordance with the following three rules:
1. when any one of first 16 inputs signals (INPUT1 to INPUT16) has logical
value 1 (TRUE) the first output signal (OUTPUT1) will get logical value 1
(TRUE).
2. when any one of second 16 inputs signals (INPUT17 to INPUT32) has logical
value 1 (TRUE) the second output signal (OUTPUT2) will get logical value 1
(TRUE).
3. when any one of all 32 input signals (INPUT1 to INPUT32) has logical value
1 (TRUE) the third output signal (OUTPUT3) will get logical value 1 (TRUE).
By use of the settings ModeOutput1, ModeOutput2, ModeOutput3, PulseTime,

OnDelay and OffDelay the behavior of each output can be customized. The
OnDelay is always active and will delay the input to output transition by the set
685
Logic
time. The ModeOutput for respective output decides wether the output shall be
steady with an drop-off delay as set by OffDelay or if it shall give a pulse with
duration set by PulseTime. Note that for pulsed operation since the inputs are
connected in an OR-function a new pulse will only be given on the output if all
related inputs are reset and then one is activated again. And for steady operation
the of delay will start when all related inputs have reset. Detailed logical diagram is
shown in figure 374
PulseTime
t
&
ModeOutput1
Input 1
Output 1
Ondelay Offdelay
&
³1
³1 t t
Input 16
PulseTime
t
&
ModeOutput2
Input 17
Output 2
Ondelay Offdelay
&
³1
³1 t t
Input 32
PulseTime
t
&
ModeOutput3
Output 3
Ondelay Offdelay
&
³1
³1 t t
IEC09000612 V1 EN
Figure 374: Trip matrix internal logic
Output signals from TMAGGIO are typically connected to other logic blocks or
directly to output contacts in the IED. When used for direct tripping of the circuit
breaker(s) the pulse time delay shall be set to approximately 0.150 seconds in order
to obtain satisfactory minimum duration of the trip pulse to the circuit breaker trip
coils.
686
Logic

TMAGGIO
INPUT1 OUTPUT1
INPUT2 OUTPUT2
INPUT3 OUTPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
INPUT17
INPUT18
INPUT19
INPUT20
INPUT21
INPUT22
INPUT23
INPUT24
INPUT25
INPUT26
INPUT27
INPUT28
INPUT29
INPUT30
INPUT31
INPUT32
IEC09000830 V1 EN
Figure 375: TMAGGIO function block

Table 426: TMAGGIO Input signals
INPUT1 BOOLEAN 0 Binary input 1
687
Logic

Table 427: TMAGGIO Output signals

OUTPUT1 BOOLEAN OR function betweeen inputs 1 to 16
OUTPUT2 BOOLEAN OR function between inputs 17 to 32
OUTPUT3 BOOLEAN OR function between inputs 1 to 32

Table 428: TMAGGIO Group settings (basic)
On
PulseTime 0.050 - 60.000 s 0.001 0.150 Output pulse time
OnDelay 0.000 - 60.000 s 0.001 0.000 Output on delay time
OffDelay 0.000 - 60.000 s 0.001 0.000 Output off delay time
ModeOutput1 Steady - - Steady Mode for output ,1 steady or pulsed
Pulsed
ModeOutput2 Steady - - Steady Mode for output 2, steady or pulsed
Pulsed
ModeOutput3 Steady - - Steady Mode for output 3, steady or pulsed
Pulsed
688
Logic
14.3 Configurable logic blocks
14.3.1 Introduction
A number of logic blocks and timers are available for user to adapt the
configuration to the specific application needs.
• OR function block.
• INVERTER function blocks that inverts the input signal.
• PULSETIMER function block can be used, for example, for pulse extensions
or limiting of operation of outputs.
• GATE function block is used for controlling if a signal should be able to pass
from the input to the output or not depending on a setting.
• XOR function block.
• LOOPDELAY function block used to delay the output signal one execution
cycle.
• TIMERSET function has pick-up and drop-out delayed outputs related to the
input signal. The timer has a settable time delay.
• AND function block.
• SRMEMORY function block is a flip-flop that can set or reset an output from
two inputs respectively. Each block has two outputs where one is inverted. The
memory setting controls if the block after a power interruption should return to
the state before the interruption, or be reset. Set input has priority.
• RSMEMORY function block is a flip-flop that can reset or set an output from
two inputs respectively. Each block has two outputs where one is inverted. The
memory setting controls if the block after a power interruption should return to
the state before the interruption, or be reset. Reset input has priority.
14.3.2 Inverter function block INV

INV
INPUT OUT
IEC04000404 V2 EN
Figure 376: INV function block
689
Logic
Table 429: INV Input signals

INPUT BOOLEAN 0 Input
Table 430: INV Output signals

OUT BOOLEAN Output
14.3.3 OR function block OR

The OR function is used to form general combinatory expressions with boolean
variables. The OR function block has six inputs and two outputs. One of the
outputs is inverted.
OR
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
IEC04000405 V2 EN
Figure 377: OR function block
Table 431: OR Input signals

INPUT1 BOOLEAN 0 Input 1 to OR gate
Table 432: OR Output signals

OUT BOOLEAN Output from OR gate
NOUT BOOLEAN Inverted output from OR gate
690
Logic
14.3.4 AND function block AND

The AND function is used to form general combinatory expressions with boolean
variables. The AND function block has four inputs and two outputs. One of the
outputs are inverted.
AND
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4N
IEC04000406 V2 EN
Figure 378: AND function block
Table 433: AND Input signals

INPUT1 BOOLEAN 0 Input 1
INPUT4N BOOLEAN 1 Input 4 inverted
Table 434: AND Output signals

OUT BOOLEAN Output
NOUT BOOLEAN Output inverted
14.3.5 Timer function block TIMER

The function block TIMER has drop-out and pick-up delayed outputs related to the
input signal. The timer has a settable time delay (T).
TIMER
INPUT ON
T OFF
IEC04000378 V2 EN
Figure 379: TIMER function block
Table 435: TIMER Input signals

INPUT BOOLEAN 0 Input to timer
691
Logic
Table 436: TIMER Output signals

ON BOOLEAN Output from timer , pick-up delayed
OFF BOOLEAN Output from timer, drop-out delayed
Table 437: TIMER Non group settings (basic)

T 0.000 - 90000.000 s 0.001 0.000 Time delay of function
14.3.6 Pulse timer function block PULSETIMER

The pulse (PULSETIMER) function can be used, for example, for pulse extensions
or limiting of operation of outputs. The pulse timer TP has a settable length.
PULSETIMER
INPUT OUT
T
IEC04000407 V2 EN
Figure 380: PULSETIMER function block
Table 438: PULSETIMER Input signals

INPUT BOOLEAN 0 Input to pulse timer
Table 439: PULSETIMER Output signals

OUT BOOLEAN Output from pulse timer
Table 440: PULSETIMER Non group settings (basic)

T 0.000 - 90000.000 s 0.001 0.010 Time delay of function
14.3.7 Exclusive OR function block XOR

The exclusive OR function (XOR) is used to generate combinatory expressions
with boolean variables. XOR has two inputs and two outputs. One of the outputs is
inverted. The output signal is 1 if the input signals are different and 0 if they are equal.
692
Logic
XOR
INPUT1 OUT
INPUT2 NOUT
IEC04000409 V2 EN
Figure 381: XOR function block
Table 441: XOR Input signals

INPUT1 BOOLEAN 0 Input 1 to XOR gate
INPUT2 BOOLEAN 0 Input 2 to XOR gate
Table 442: XOR Output signals

OUT BOOLEAN Output from XOR gate
NOUT BOOLEAN Inverted output from XOR gate
14.3.8 Loop delay function block LOOPDELAY

The Logic loop delay function block (LOOPDELAY) function is used to delay the
output signal one execution cycle.
LOOPDELAY
INPUT OUT
IEC09000296 V1 EN
Figure 382: LOOPDELAY function block
Table 443: LOOPDELAY Input signals

INPUT BOOLEAN 0 Input signal
Table 444: LOOPDELAY Output signals

OUT BOOLEAN Output signal, signal is delayed one execution
cycle
14.3.9 Set-reset with memory function block SRMEMORY

The Set-reset with memory function block (SRMEMORY) is a flip-flop with
memory that can set or reset an output from two inputs respectively. Each
SRMEMORY function block has two outputs, where one is inverted. The memory
693
Logic
setting controls if the flip-flop after a power interruption will return the state it had
before or if it will be reset.
Table 445: Truth table for SRMEMORY function block

SET RESET OUT NOUT
0 0 Last Inverted
value last value
0 1 0 1
1 0 1 0
1 1 1 0
SRMEMORY
SET OUT
RESET NOUT
IEC04000408 V2 EN
Figure 383: SRMEMORY function block
Table 446: SRM Input signals

SET BOOLEAN 0 Set input
RESET BOOLEAN 0 Reset input
Table 447: SRM Output signals

OUT BOOLEAN Output
NOUT BOOLEAN Output inverted
Table 448: SRM Group settings (basic)

Memory Off - - On Operating mode of the memory function
On
14.3.10 Controllable gate function block GATE

The Controllable gate function block (GATE) is used for controlling if a signal
should be able to pass from the input to the output or not depending on a setting.
GATE
INPUT OUT
IEC04000410 V2 EN
Figure 384: GATE function block
694
Logic
Table 449: GATE Input signals

INPUT BOOLEAN 0 Input to gate
Table 450: GATE Output signals

OUT BOOLEAN Output from gate
Table 451: GATE Group settings (basic)

On
14.3.11 Settable timer function block TIMERSET

The Settable timer function block (TIMERSET) timer has outputs for delayed input
signal at drop-out and at pick-up. The timer has a settable time delay. It also has an
Operation setting On/, Off/ that controls the operation of the timer.
TIMERSET
INPUT ON
OFF
IEC04000411 V2 EN
Figure 385: TIMERSET function block
Table 452: TIMERSET Input signals

INPUT BOOLEAN 0 Input to timer
Table 453: TIMERSET Output signals

ON BOOLEAN Output from timer, pick-up delayed
OFF BOOLEAN Output from timer, drop-out delayed
Table 454: TIMERSET Group settings (basic)

On
t 0.000 - 90000.000 s 0.001 0.000 Delay for settable timer n
695
Logic

Table 455: Configurable logic blocks
Logic block Quantity with cycle time Range or Accuracy
fast medium normal value
LogicAND 60 60 160 - -
LogicOR 60 60 160 - -
LogicXOR 10 10 20 - -
LogicInverter 30 30 80 - -
LogicSRMemory 10 10 20 - -
LogicGate 10 10 20 - -
LogicTimer 10 10 20 (0.000– ± 0.5% ± 10 ms
90000.000) s
LogicPulseTimer 10 10 20 (0.000– ± 0.5% ± 10 ms
90000.000) s
LogicTimerSet 10 10 20 (0.000– ± 0.5% ± 10 ms
90000.000) s
LogicLoopDelay 10 10 20 (0.000– ± 0.5% ± 10 ms
90000.000) s
14.4 Fixed signal function block FXDSIGN

Fixed signals FXDSIGN - -
The Fixed signals function (FXDSIGN) generates a number of pre-set (fixed)

signals that can be used in the configuration of an IED, either for forcing the
unused inputs in other function blocks to a certain level/value, or for creating
certain logic.

There are eight outputs from FXDSIGN function block:
• OFF is a boolean signal, fixed to OFF (boolean 0) value
• ON is a boolean signal, fixed to ON (boolean 1) value
• INTZERO is an integer number, fixed to integer value 0
• INTONE is an integer number, fixed to integer value 1
• REALZERO is a floating point real number, fixed to 0.0 value
• STRNULL is a string, fixed to an empty string (null) value
• ZEROSMPL is a channel index, fixed to 0 value
• GRP_OFF is a group signal, fixed to 0 value
696
Logic

FXDSIGN
OFF
ON
INTZERO
INTONE
REALZERO
STRNULL
ZEROSMPL
GRP_OFF
IEC05000445 V2 EN
Figure 386: FXDSIGN function block

Table 456: FXDSIGN Output signals
OFF BOOLEAN Boolean signal fixed off
ON BOOLEAN Boolean signal fixed on
INTZERO INTEGER Integer signal fixed zero
INTONE INTEGER Integer signal fixed one
REALZERO REAL Real signal fixed zero
STRNULL STRING String signal with no characters
ZEROSMPL GROUP SIGNAL Channel id for zero sample
GRP_OFF GROUP SIGNAL Group signal fixed off

14.5 Boolean 16 to Integer conversion B16I

Boolean 16 to integer conversion B16I - -
14.5.1 Introduction
Boolean 16 to integer conversion function (B16I) is used to transform a set of 16
binary (logical) signals into an integer.
697
Logic

Boolean 16 to integer conversion function (B16I) is used to transform a set of 16
binary (logical) signals into an integer. The BLOCK input will freeze the output at
the last value.

B16I
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
IEC07000128 V2 EN
Figure 387: B16I function block

Table 457: B16I Input signals
IN1 BOOLEAN 0 Input 1
698
Logic
Table 458: B16I Output signals

OUT INTEGER Output value

14.6 Boolean 16 to Integer conversion with logic node

representation B16IGGIO

Boolean 16 to integer conversion with B16IGGIO - -
logic node representation
14.6.1 Introduction
Boolean 16 to integer conversion with logic node representation function
(B16IGGIO) is used to transform a set of 16 binary (logical) signals into an integer.
B16IGGIO can receive remote values via IEC 61850 depending on the operator
position input (PSTO).

Boolean 16 to integer conversion with logic node representation function
(B16IGGIO) is used to transform a set of 16 binary (logical) signals into an integer.
The BLOCK input will freeze the output at the last value.
699
Logic

B16IGGIO
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
IEC07000129 V2 EN
Figure 388: B16IGGIO function block

Table 459: B16IGGIO Input signals
Table 460: B16IGGIO Output signals

OUT INTEGER Output value
700
Logic

14.7 Integer to Boolean 16 conversion IB16

Integer to boolean 16 conversion IB16 - -
14.7.1 Introduction
Integer to boolean 16 conversion function (IB16) is used to transform an integer
into a set of 16 binary (logical) signals.

Integer to boolean 16 conversion function (IB16) is used to transform an integer
into a set of 16 binary (logical) signals. IB16 function is designed for receiving the
integer input locally. The BLOCK input will freeze the logical outputs at the last
value.

IB16
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
IEC06000501 V2 EN
Figure 389: IB16 function block
701
Logic

Table 461: IB16 Input signals
INP INTEGER 0 Integer Input
Table 462: IB16 Output signals


14.8 Integer to Boolean 16 conversion with logic node

representation IB16GGIO
Function description IEC 61850 ANSI/IEEE C37.2

identification device number
Integer to boolean 16 conversion with IB16GGIO - -
logic node representation
702
Logic
14.8.1 Introduction
Integer to boolean conversion with logic node representation function (IB16GGIO)
is used to transform an integer to 16 binary (logic) signals.
IB16GGIO function can receive remote values over IEC61850 depending on the
operator position input (PSTO).

Integer to boolean conversion with logic node representation function (IB16GGIO)
is used to transform an integer into a set of 16 binary (logical) signals. IB16GGIO
function can receive an integer from a station computer – for example, over IEC
61850. The BLOCK input will freeze the logical outputs at the last value.
The operator position input (PSTO) determines the operator place. The integer
number can be written to the block while in “Remote”. If PSTO is in ”Off”
or ”Local”, then no change is applied to the outputs.

IB16GGIO
BLOCK OUT1
PSTO OUT2
IN OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
IEC06000502 V2 EN
Figure 390: IB16GGIO function block

Table 463: IB16GGIO Input signals
IN INTEGER 0 input
703
Logic
Table 464: IB16GGIO Output signals


This function does not have any setting parameters.
704
Monitoring
Section 15 Monitoring
About this chapter

This chapter describes the functions that handle measurements, events and
disturbances. The way the functions work, their setting parameters, function
blocks, input and output signals, and technical data are included for each function.
15.1 Measurements

Measurements CVMMXU -
P, Q, S, I, U, f
SYMBOL-RR V1 EN
Phase current measurement CMMXU -

I
SYMBOL-SS V1 EN
Phase-phase voltage measurement VMMXU -

U
SYMBOL-UU V1 EN
Current sequence component CMSQI -

measurement
I1, I2, I0
SYMBOL-VV V1 EN
Voltage sequence measurement VMSQI -

U1, U2, U0
SYMBOL-TT V1 EN
Phase-neutral voltage measurement VNMMXU -

U
SYMBOL-UU V1 EN
705
Monitoring
15.1.1 Introduction
Measurement functions is used for power system measurement, supervision and
reporting to the local HMI, monitoring tool within PCM600 or to station level for
example, via IEC 61850. The possibility to continuously monitor measured values
of active power, reactive power, currents, voltages, frequency, power factor etc. is
vital for efficient production, transmission and distribution of electrical energy. It
provides to the system operator fast and easy overview of the present status of the
power system. Additionally, it can be used during testing and commissioning of
protection and control IEDs in order to verify proper operation and connection of
instrument transformers (CTs and VTs). During normal service by periodic
comparison of the measured value from the IED with other independent meters the
proper operation of the IED analog measurement chain can be verified. Finally, it
can be used to verify proper direction orientation for distance or directional
overcurrent protection function.
The available measured values of an IED are depending on the

actual hardware (TRM) and the logic configuration made in PCM600.
All measured values can be supervised with four settable limits that is, low-low
limit, low limit, high limit and high-high limit. A zero clamping reduction is also
supported, that is, the measured value below a settable limit is forced to zero which
reduces the impact of noise in the inputs.
Dead-band supervision can be used to report measured signal value to station level
when change in measured value is above set threshold limit or time integral of all
changes since the last time value updating exceeds the threshold limit. Measure
value can also be based on periodic reporting.
The measurement function, CVMMXU, provides the following power system

quantities:
• P, Q and S: three phase active, reactive and apparent power

• PF: power factor
• U: phase-to-phase voltage amplitude
• I: phase current amplitude
• F: power system frequency
The measuring functions CMMXU, VNMMXU and VMMXU provide physical

quantities:
• I: phase currents (amplitude and angle) (CMMXU)

• U: voltages (phase-to-earth and phase-to-phase voltage, amplitude and angle)
(VMMXU, VNMMXU)
It is possible to calibrate the measuring function above to get better then class 0.5
presentation. This is accomplished by angle and amplitude compensation at 5, 30
and 100% of rated current and at 100% of rated voltage.
706
Monitoring
The power system quantities provided, depends on the actual

hardware, (TRM) and the logic configuration made in PCM600.
The measuring functions CMSQI and VMSQI provide sequential quantities:
• I: sequence currents (positive, zero, negative sequence, amplitude and angle)

• U: sequence voltages (positive, zero and negative sequence, amplitude and
angle).
The CVMMXU function calculates three-phase power quantities by using

fundamental frequency phasors (DFT values) of the measured current respectively
voltage signals. The measured power quantities are available either, as
instantaneously calculated quantities or, averaged values over a period of time (low
pass filtered) depending on the selected settings.
15.1.2.1 Measurement supervision
The protection, control, and monitoring IEDs have functionality to measure and
further process information for currents and voltages obtained from the pre-
processing blocks. The number of processed alternate measuring quantities
depends on the type of IED and built-in options.
The information on measured quantities is available for the user at different locations:
• Locally by means of the local HMI

• Remotely using the monitoring tool within PCM600 or over the station bus
• Internally by connecting the analogue output signals to the Disturbance Report
function
Phase angle reference

All phase angles are presented in relation to a defined reference channel. The
General setting parameter PhaseAngleRef defines the reference, see section
"Analog inputs".
Zero point clamping

Measured value below zero point clamping limit is forced to zero. This allows the
noise in the input signal to be ignored. The zero point clamping limit is a general
setting (XZeroDb where X equals S, P, Q, PF, U, I, F, IL1-3, UL1-3, UL12-31, I1,
I2, 3I0, U1, U2 or 3U0). Observe that this measurement supervision zero point
clamping might be overridden by the zero point clamping used for the
measurement values within CVMMXU.
707
Monitoring
Continuous monitoring of the measured quantity

Users can continuously monitor the measured quantity available in each function
block by means of four defined operating thresholds, see figure 391. The
monitoring has two different modes of operating:
• Overfunction, when the measured current exceeds the High limit (XHiLim) or
High-high limit (XHiHiLim) pre-set values
• Underfunction, when the measured current decreases under the Low limit
(XLowLim) or Low-low limit (XLowLowLim) pre-set values.
X_RANGE is illustrated in figure 391.
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
en05000657.vsd
IEC05000657 V1 EN
Figure 391: Presentation of operating limits
Each analogue output has one corresponding supervision level output

(X_RANGE). The output signal is an integer in the interval 0-4 (0: Normal, 1:
High limit exceeded, 3: High-high limit exceeded, 2: below Low limit and 4: below
Low-low limit). The output may be connected to a measurement expander block
(XP (RANGE_XP)) to get measurement supervision as binary signals.
The logical value of the functional output signals changes according to figure 391.
The user can set the hysteresis (XLimHyst), which determines the difference
between the operating and reset value at each operating point, in wide range for
each measuring channel separately. The hysteresis is common for all operating
values within one channel.
Actual value of the measured quantity

The actual value of the measured quantity is available locally and remotely. The
measurement is continuous for each measured quantity separately, but the reporting
of the value to the higher levels depends on the selected reporting mode. The
following basic reporting modes are available:
708
Monitoring
• Cyclic reporting (Cyclic)

• Amplitude dead-band supervision (Dead band)
• Integral dead-band supervision (Int deadband)
Cyclic reporting
The cyclic reporting of measured value is performed according to chosen setting
(XRepTyp). The measuring channel reports the value independent of amplitude or
integral dead-band reporting.
In addition to the normal cyclic reporting the IED also report spontaneously when
measured value passes any of the defined threshold limits.
Y
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t (*) t (*) t (*) t (*)
t
Value 1
Value 2
Value 3
Value 4
Value 5
en05000500.vsd
(*)Set value for t: XDbRepInt
IEC05000500 V1 EN
Figure 392: Periodic reporting
Amplitude dead-band supervision

If a measuring value is changed, compared to the last reported value, and the
change is larger than the ±ΔY pre-defined limits that are set by user (XZeroDb),
then the measuring channel reports the new value to a higher level, if this is
detected by a new measured value. This limits the information flow to a minimum
necessary. Figure 393 shows an example with the amplitude dead-band
supervision. The picture is simplified: the process is not continuous but the values
are evaluated with a time interval of one execution cycle from each other.
709
Monitoring
Value Reported
Y

Value Reported
(1st)
Y3 DY
DY
Y2 DY
DY
DY
DY
Y1
99000529.vsd
IEC99000529 V1 EN
Figure 393: Amplitude dead-band supervision reporting
After the new value is reported, the ±ΔY limits for dead-band are automatically set
around it. The new value is reported only if the measured quantity changes more
than defined by the ±ΔY set limits. Even if amplitude dead-band reporting is
selected, there will be a 30 s "back-ground" cyclic reporting as well.
Integral dead-band reporting

The measured value is reported if the time integral of all changes exceeds the pre-
set limit (XZeroDb), figure 394, where an example of reporting with integral dead-
band supervision is shown. The picture is simplified: the process is not continuous
but the values are evaluated with a time interval of one execution cycle from each
other.
The last value reported, Y1 in figure 394 serves as a basic value for further
measurement. A difference is calculated between the last reported and the newly
measured value and is multiplied by the time increment (discrete integral). The
absolute values of these integral values are added until the pre-set value is
exceeded. This occurs with the value Y2 that is reported and set as a new base for
the following measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals

with small variations that can last for relatively long periods. Even if integral dead-
band reporting is selected, there will be a 30 s "back-ground" cyclic reporting as well.
710
Monitoring
Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
(1st) Value
Value Reported Y5
A Reported Value
Reported Value
Y1 Reported
t
99000530.vsd
IEC99000530 V1 EN
Figure 394: Reporting with integral dead-band supervision
15.1.2.2 Measurements CVMMXU
Mode of operation
The measurement function must be connected to three-phase current and three-
phase voltage input in the configuration tool (group signals), but it is capable to
measure and calculate above mentioned quantities in nine different ways depending
on the available VT inputs connected to the IED. The end user can freely select by
a parameter setting, which one of the nine available measuring modes shall be used
within the function. Available options are summarized in the following table:
Set value for Formula used for complex, three- Formula used for voltage and Comment
parameter phase power calculation current magnitude calculation
“Mode”
1 L1, L2, L3 Used when
* * *
S = U L1 × I L1 + U L 2 × I L 2 + U L 3 × I L 3 U = ( U L1 + U L 2 + U L 3 ) / 3
three phase-
EQUATION1385 V1 EN
to-earth
I = ( I L1 + I L 2 + I L 3 ) / 3
voltages are
EQUATION1386 V1 EN available
2 Arone Used when
S = U L1 L 2 × I L1 - U L 2 L 3 × I L 3
* *
U = ( U L1 L 2 + U L 2 L 3 ) / 2 three two
phase-to-
(Equation 126)
I = ( I L1 + I L 3 ) / 2 phase
EQUATION1387 V1 EN
voltages are
EQUATION1388 V1 EN (Equation 127) available
3 PosSeq Used when
S = 3 × U PosSeq × I PosSeq
*
U = 3 × U PosSeq only
symmetrical
(Equation 128) three phase
EQUATION1389 V1 EN
I = I PosSeq
power shall
EQUATION1390 V1 EN (Equation 129) be measured
711
Monitoring
Set value for Formula used for complex, three- Formula used for voltage and Comment
parameter phase power calculation current magnitude calculation
“Mode”
4 L1L2 Used when
S = U L1 L 2 × ( I L1 - I L 2 )
* *
U = U L1 L 2 only UL1L2
phase-to-
(Equation 130)
I = ( I L1 + I L 2 ) / 2
EQUATION1391 V1 EN
phase
voltage is
5 L2L3 Used when
S = U L 2 L3 × ( I L 2 - I L3 )
* *
U = U L2 L3 only UL2L3
phase-to-
(Equation 132)
I = ( I L2 + I L3 ) / 2
EQUATION1393 V1 EN
phase
voltage is
6 L3L1 Used when
S = U L 3 L1 × ( I L 3 - I L1 )
* *
U = U L 3 L1 only UL3L1
phase-to-
(Equation 134)
I = ( I L 3 + I L1 ) / 2
EQUATION1395 V1 EN
phase
voltage is
7 L1 Used when
S = 3 × U L1 × I L1
*
U = 3 × U L1 only UL1
phase-to-
(Equation 136) earth voltage
I = I L1
EQUATION1397 V1 EN
is available
8 L2 Used when
S = 3 ×U L2 × I L2
*
phase-to-
(Equation 138) earth voltage
I = IL2
EQUATION1399 V1 EN
is available
9 L3 Used when
S = 3 ×U L3 × I L3
*
phase-to-
(Equation 140)
I = I L3 earth voltage
EQUATION1401 V1 EN
is available
* means complex conjugated value
It shall be noted that only in the first two operating modes that is, 1 & 2 the
measurement function calculates exact three-phase power. In other operating
modes that is, from 3 to 9 it calculates the three-phase power under assumption that
the power system is fully symmetrical. Once the complex apparent power is
calculated then the P, Q, S, & PF are calculated in accordance with the following
formulas:
P = Re( S )
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Monitoring
Q = Im( S )
S = S = P +Q
2 2
PF = cosj = P
S
Additionally to the power factor value the two binary output signals from the
function are provided which indicates the angular relationship between current and
voltage phasors. Binary output signal ILAG is set to one when current phasor is
lagging behind voltage phasor. Binary output signal ILEAD is set to one when
current phasor is leading the voltage phasor.
Each analogue output has a corresponding supervision level output (X_RANGE).

The output signal is an integer in the interval 0-4, see section "Measurement
supervision".
Calibration of analog inputs

Measured currents and voltages used in the CVMMXU function can be calibrated
to get class 0.5 measuring accuracy. This is achieved by amplitude and angle
below 5% and above 100% is constant and linear in between, see example in
figure 395.
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Monitoring
IEC05000652 V2 EN
Low pass filtering

possible to introduce the recursive, low pass filtering of the measured values for P,
Q, S, U, I and power factor. This will make slower measurement response to the
step changes in the measured quantity. Filtering is performed in accordance with
the following recursive formula:
X = k × X Old + (1 - k ) × X Calculated
where:
X is a new measured value (that is P, Q, S, U, I or PF) to be given out from the function
XOld is the measured value given from the measurement function in previous execution cycle
XCalculated is the new calculated value in the present execution cycle
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Monitoring
immediately given out without any filtering (that is, without any additional delay).
When k is set to value bigger than 0, the filtering is enabled. Appropriate value of k
shall be determined separately for every application. Some typical value for k =0.14.
Zero point clamping

In order to avoid erroneous measurements when either current or voltage signal is
not present, it is possible for the end user to set the amplitudeIGenZeroDb level for
current and voltage measurement UGenZeroDb is forced to zero. When either
current or voltage measurement is forced to zero automatically the measured values
for power (P, Q and S) and power factor are forced to zero as well. Since the
measurement supervision functionality, included in CVMMXU, is using these
values the zero clamping will influence the subsequent supervision (observe the
possibility to do zero point clamping within measurement supervision, see section
"Measurement supervision").
Compensation facility
In order to compensate for small amplitude and angular errors in the complete
measurement chain (CT error, VT error, IED input transformer errors and so on.) it
is possible to perform on site calibration of the power measurement. This is
achieved by setting the complex constant which is then internally used within the
function to multiply the calculated complex apparent power S. This constant is set
as amplitude (setting parameter PowAmpFact, default value 1.000) and angle
(setting parameter PowAngComp, default value 0.0 degrees). Default values for
these two parameters are done in such way that they do not influence internally
calculated value (complex constant has default value 1). In this way calibration, for
specific operating range (for example, around rated power) can be done at site.
However, to perform this calibration it is necessary to have an external power
meter with high accuracy class available.
Directionality
If CT earthing parameter is set as described in section "Analog inputs", active and
reactive power will be measured always towards the protected object. This is
shown in the following figure 396.
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Monitoring
Busbar
IED
P Q
Protected
Object
IEC09000038-1-EN V1 EN
Figure 396: Internal IED directionality convention for P & Q measurements
Practically, it means that active and reactive power will have positive values when
they flow from the busbar towards the protected object and they will have negative
values when they flow from the protected object towards the busbar.
In some application, for example, when power is measured on the secondary side
of the power transformer it might be desirable, from the end client point of view, to
have actually opposite directional convention for active and reactive power
measurements. This can be easily achieved by setting parameter PowAngComp to
value of 180.0 degrees. With such setting the active and reactive power will have
positive values when they flow from the protected object towards the busbar.
Frequency
Frequency is actually not calculated within measurement block. It is simply
obtained from the pre-processing block and then just given out from the
measurement block as an output.
15.1.2.3 Phase current measurement CMMXU
The Phase current measurement (CMMXU) function must be connected to three-

phase current input in the configuration tool to be operable. Currents handled in the
function can be calibrated to get better then class 0.5 measuring accuracy for
internal use, on the outputs and IEC 61850. This is achieved by amplitude and
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Monitoring
angle compensation at 5, 30 and 100% of rated current. The compensation below

5% and above 100% is constant and linear in between, see figure 395.
Phase currents (amplitude and angle) are available on the outputs and each
amplitude output has a corresponding supervision level output (ILx_RANG). The
supervision output signal is an integer in the interval 0-4, see section
"Measurement supervision".
15.1.2.4 Phase-phase and phase-neutral voltage measurements VMMXU,

VNMMXU
The voltage function must be connected to three-phase voltage input in the

configuration tool to be operable. Voltages are handled in the same way as currents
when it comes to class 0.5 calibrations, see above.
The voltages (phase or phase-phase voltage, amplitude and angle) are available on
the outputs and each amplitude output has a corresponding supervision level output
(ULxy_RANG). The supervision output signal is an integer in the interval 0-4, see
section "Measurement supervision".
15.1.2.5 Voltage and current sequence measurements VMSQI, CMSQI
The measurement functions must be connected to three-phase current (CMSQI) or

voltage (VMSQI) input in the configuration tool to be operable. No outputs, but
XRANG, are calculated within the measuring block and it is not possible to
calibrate the signals. Input signals are obtained from the pre-processing block and
transferred to corresponding output.
Positive, negative and three times zero sequence quantities are available on the
outputs (voltage and current, amplitude and angle). Each amplitude output has a
corresponding supervision level output (X_RANGE). The output signal is an
integer in the interval 0-4, see section "Measurement supervision".

The available function blocks of an IED are depending on the actual hardware
(TRM) and the logic configuration made in PCM600.
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Monitoring
CVMMXU
I3P* S
U3P* S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
U
U_RANGE
I
I_RANGE
F
F_RANGE
IEC05000772 V2 EN
Figure 397: CVMMXU function block
CMMXU
I3P* IL1
IL1RANG
IL1ANGL
IL2
IL2RANG
IL2ANGL
IL3
IL3RANG
IL3ANGL
IEC05000699 V2 EN
Figure 398: CMMXU function block
VNMMXU
U3P* UL1
UL1RANG
UL1ANGL
UL2
UL2RANG
UL2ANGL
UL3
UL3RANG
UL3ANGL
IEC09000850 V1 EN
Figure 399: VNMMXU function block
VMMXU
U3P* UL12
UL12RANG
UL12ANGL
UL23
UL23RANG
UL23ANGL
UL31
UL31RANG
UL31ANGL
IEC05000701 V2 EN
Figure 400: VMMXU function block
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Monitoring
CMSQI
I3P* 3I0
3I0RANG
3I0ANGL
I1
I1RANG
I1ANGL
I2
I2RANG
I2ANGL
IEC05000703 V2 EN
Figure 401: CMSQI function block
VMSQI
U3P* 3U0
3U0RANG
3U0ANGL
U1
U1RANG
U1ANGL
U2
U2RANG
U2ANGL
IEC05000704 V2 EN
Figure 402: VMSQI function block

Table 465: CVMMXU Input signals
SIGNAL
SIGNAL
Table 466: CVMMXU Output signals

S REAL Apparent Power magnitude of deadband value
S_RANGE INTEGER Apparent Power range
P_INST REAL Active Power
P REAL Active Power magnitude of deadband value
P_RANGE INTEGER Active Power range
Q_INST REAL Reactive Power
Q REAL Active Power magnitude of deadband value
Q_RANGE INTEGER Reactive Power range
PF REAL Power Factor magnitude of deadband value
PF_RANGE INTEGER Power Factor range
ILAG BOOLEAN Current is lagging voltage
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Monitoring

ILEAD BOOLEAN Current is leading voltage
U REAL Calculate voltage magnitude of deadband value
U_RANGE INTEGER Calcuate voltage range
I REAL Calculated current magnitude of deadband value
I_RANGE INTEGER Calculated current range
F REAL System frequency magnitude of deadband value
F_RANGE INTEGER System frequency range
Table 467: CMMXU Input signals

I3P GROUP - Group connection abstract block 1
SIGNAL
Table 468: CMMXU Output signals

IL1 REAL IL1 Amplitude, magnitude of reported value
IL1RANG INTEGER IL1 Amplitude range
IL1ANGL REAL IL1 Angle, magnitude of reported value
Table 469: VNMMXU Input signals

U3P GROUP - Group connection abstract block 5
SIGNAL
Table 470: VNMMXU Output signals

UL1 REAL UL1 Amplitude, magnitude of reported value
UL1RANG INTEGER UL1 Amplitude range
UL1ANGL REAL UL1 Angle, magnitude of reported value
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Monitoring

Table 471: VMMXU Input signals

SIGNAL
Table 472: VMMXU Output signals

Table 473: CMSQI Input signals

I3P GROUP - Group connection abstract block 3
SIGNAL
Table 474: CMSQI Output signals

3I0 REAL 3I0 Amplitude, magnitude of reported value
3I0RANG INTEGER 3I0 Amplitude range
3I0ANGL REAL 3I0 Angle, magnitude of reported value
I1 REAL I1 Amplitude, magnitude of reported value
I1RANG INTEGER I1 Amplitude range
I1ANGL REAL I1 Angle, magnitude of reported value
I2 REAL I2 Amplitude, magnitude of reported value
I2RANG INTEGER I2 Amplitude range
I2ANGL REAL I2 Angle, magnitude of reported value
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Monitoring
Table 475: VMSQI Input signals

SIGNAL
Table 476: VMSQI Output signals

3U0 REAL 3U0 Amplitude, magnitude of reported value
3U0RANG INTEGER 3U0 Amplitude range
3U0ANGL REAL 3U0 Angle, magnitude of reported value
U1 REAL U1 Amplitude, magnitude of reported value
U1RANG INTEGER U1 Amplitude range
U1ANGL REAL U1 Angle, magnitude of reported value
U2 REAL U2 Amplitude, magnitude of reported value
U2RANG INTEGER U2 Amplitude range
U2ANGL REAL U2 Angle, magnitude of reported value

The available setting parameters of the measurement function (MMXU, MSQI) are
depending on the actual hardware (TRM) and the logic configuration made in
PCM600.
Table 477: CVMMXU Non group settings (basic)

SLowLim 0.000 - VA 0.001 0.000 Low limit (physical value)
10000000000.000
SLowLowLim 0.000 - VA 0.001 0.000 Low Low limit (physical value)
10000000000.000
SMin 0.000 - VA 0.001 0.000 Minimum value
10000000000.000
SMax 0.000 - VA 0.001 1000000000.000 Maximum value
10000000000.000
SRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
PMin -10000000000.000 W 0.001 -1000000000.000 Minimum value
- 10000000000.000
PMax -10000000000.000 W 0.001 1000000000.000 Maximum value
- 10000000000.000
PRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
QMin -10000000000.000 VAr 0.001 -1000000000.000 Minimum value
- 10000000000.000
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Monitoring

On
IBase 1 - 99999 A 1 3000 Base setting for current level in A
QMax -10000000000.000 VAr 0.001 1000000000.000 Maximum value
- 10000000000.000
QRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
Mode L1, L2, L3 - - L1, L2, L3 Selection of measured current and
Arone voltage
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3
PowAmpFact 0.000 - 6.000 - 0.001 1.000 Amplitude factor to scale power
calculations
PowAngComp -180.0 - 180.0 Deg 0.1 0.0 Angle compensation for phase shift
between measured I & U
measurement, U and I
PFMin -1.000 - 0.000 - 0.001 -1.000 Minimum value
PFMax 0.000 - 1.000 - 0.001 1.000 Maximum value
PFRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
UMin -10000000000.000 V 0.001 0.000 Minimum value
- 10000000000.000
UMax -10000000000.000 V 0.001 400000.000 Maximum value
- 10000000000.000
URepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
IMin -10000000000.000 A 0.001 0.000 Minimum value
- 10000000000.000
IMax -10000000000.000 A 0.001 1000.000 Maximum value
- 10000000000.000
IRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
FrMin -10000000000.000 Hz 0.001 0.000 Minimum value
- 10000000000.000
FrMax -10000000000.000 Hz 0.001 70.000 Maximum value
- 10000000000.000
FrRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
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Monitoring
Table 478: CVMMXU Non group settings (advanced)

SDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
range, Int Db: In %s
SZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
SHiHiLim 0.000 - VA 0.001 900000000.000 High High limit (physical value)
10000000000.000
SHiLim 0.000 - VA 0.001 800000000.000 High limit (physical value)
10000000000.000
SLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
PDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
PZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
PHiHiLim -10000000000.000 W 0.001 900000000.000 High High limit (physical value)
- 10000000000.000
PHiLim -10000000000.000 W 0.001 800000000.000 High limit (physical value)
- 10000000000.000
PLowLim -10000000000.000 W 0.001 -800000000.000 Low limit (physical value)
- 10000000000.000
PLowLowLim -10000000000.000 W 0.001 -900000000.000 Low Low limit (physical value)
- 10000000000.000
PLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
QDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
QZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
QHiHiLim -10000000000.000 VAr 0.001 900000000.000 High High limit (physical value)
- 10000000000.000
QHiLim -10000000000.000 VAr 0.001 800000000.000 High limit (physical value)
- 10000000000.000
QLowLim -10000000000.000 VAr 0.001 -800000000.000 Low limit (physical value)
- 10000000000.000
QLowLowLim -10000000000.000 VAr 0.001 -900000000.000 Low Low limit (physical value)
- 10000000000.000
QLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
PFDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
PFZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
UGenZeroDb 1 - 100 % 1 5 Zero point clamping in % of Ubase
PFHiHiLim -3.000 - 3.000 - 0.001 3.000 High High limit (physical value)
IGenZeroDb 1 - 100 % 1 5 Zero point clamping in % of Ibase
PFHiLim -3.000 - 3.000 - 0.001 2.000 High limit (physical value)
PFLowLim -3.000 - 3.000 - 0.001 -2.000 Low limit (physical value)
PFLowLowLim -3.000 - 3.000 - 0.001 -3.000 Low Low limit (physical value)
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Monitoring

PFLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
UDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
UZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
UHiHiLim -10000000000.000 V 0.001 460000.000 High High limit (physical value)
- 10000000000.000
UHiLim -10000000000.000 V 0.001 450000.000 High limit (physical value)
- 10000000000.000
ULowLim -10000000000.000 V 0.001 380000.000 Low limit (physical value)
- 10000000000.000
ULowLowLim -10000000000.000 V 0.001 350000.000 Low Low limit (physical value)
- 10000000000.000
ULimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
IDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
IZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
IHiHiLim -10000000000.000 A 0.001 900.000 High High limit (physical value)
- 10000000000.000
IHiLim -10000000000.000 A 0.001 800.000 High limit (physical value)
- 10000000000.000
ILowLim -10000000000.000 A 0.001 -800.000 Low limit (physical value)
- 10000000000.000
ILowLowLim -10000000000.000 A 0.001 -900.000 Low Low limit (physical value)
- 10000000000.000
ILimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
FrDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
FrZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
FrHiHiLim -10000000000.000 Hz 0.001 65.000 High High limit (physical value)
- 10000000000.000
FrHiLim -10000000000.000 Hz 0.001 63.000 High limit (physical value)
- 10000000000.000
FrLowLim -10000000000.000 Hz 0.001 47.000 Low limit (physical value)
- 10000000000.000
FrLowLowLim -10000000000.000 Hz 0.001 45.000 Low Low limit (physical value)
- 10000000000.000
FrLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
5% of Ur
30% of Ur
100% of Ur
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Monitoring

5% of Ir
30% of Ir
100% of Ir
Table 479: CMMXU Non group settings (basic)

IL1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
On
IBase 1 - 99999 A 1 3000 Base setting for current level in A
IL1Max 0.000 - A 0.001 1000.000 Maximum value
10000000000.000
IL1RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
IL1AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
10000000000.000
Dead band
Int deadband
10000000000.000
Dead band
Int deadband
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Monitoring
Table 480: CMMXU Non group settings (advanced)

IL1ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
IL1HiHiLim 0.000 - A 0.001 900.000 High High limit (physical value)
10000000000.000
IL1HiLim 0.000 - A 0.001 800.000 High limit (physical value)
10000000000.000
5% of Ir
30% of Ir
IL1LowLim 0.000 - A 0.001 0.000 Low limit (physical value)
10000000000.000
IL1LowLowLim 0.000 - A 0.001 0.000 Low Low limit (physical value)
10000000000.000
100% of Ir
IL1Min 0.000 - A 0.001 0.000 Minimum value
10000000000.000
IL1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
common for all limits
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
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Monitoring

10000000000.000
10000000000.000
Table 481: VNMMXU Non group settings (basic)

UL1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
On
UL1Max 0.000 - V 0.001 300000.000 Maximum value
10000000000.000
UL1RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
UL1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
UL1AnDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
10000000000.000
Dead band
Int deadband
10000000000.000
Dead band
Int deadband
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Monitoring
Table 482: VNMMXU Non group settings (advanced)

UL1ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
UL1HiHiLim 0.000 - V 0.001 260000.000 High High limit (physical value)
10000000000.000
UL1HiLim 0.000 - V 0.001 240000.000 High limit (physical value)
10000000000.000
UL1LowLim 0.000 - V 0.001 220000.000 Low limit (physical value)
10000000000.000
UL1LowLowLim 0.000 - V 0.001 200000.000 Low Low limit (physical value)
10000000000.000
100% of Ur
UL1Min 0.000 - V 0.001 0.000 Minimum value
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
Table 483: VMMXU Non group settings (basic)

On
10000000000.000
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Monitoring

Dead band
Int deadband
10000000000.000
Dead band
Int deadband
10000000000.000
Dead band
Int deadband
Table 484: VMMXU Non group settings (advanced)

10000000000.000
10000000000.000
10000000000.000
10000000000.000
100% of Ur
10000000000.000
10000000000.000
10000000000.000
10000000000.000
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Monitoring

10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
10000000000.000
Table 485: CMSQI Non group settings (basic)

3I0DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
3I0Min 0.000 - A 0.001 0.000 Minimum value
10000000000.000
3I0Max 0.000 - A 0.001 1000.000 Maximum value
10000000000.000
3I0RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
3I0LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
3I0AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
On
3I0AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
3I0AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
3I0AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
I1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
I1Min 0.000 - A 0.001 0.000 Minimum value
10000000000.000
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Monitoring

I1Max 0.000 - A 0.001 1000.000 Maximum value
10000000000.000
I1RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
I1AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
I1AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
I1AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
I2DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
I2Min 0.000 - A 0.001 0.000 Minimum value
10000000000.000
I2Max 0.000 - A 0.001 1000.000 Maximum value
10000000000.000
I2RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
I2LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
I2AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
I2AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
I2AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
Table 486: CMSQI Non group settings (advanced)

3I0ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
3I0HiHiLim 0.000 - A 0.001 900.000 High High limit (physical value)
10000000000.000
3I0HiLim 0.000 - A 0.001 800.000 High limit (physical value)
10000000000.000
3I0LowLim 0.000 - A 0.001 0.000 Low limit (physical value)
10000000000.000
3I0LowLowLim 0.000 - A 0.001 0.000 Low Low limit (physical value)
10000000000.000
3I0AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I1ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I1HiHiLim 0.000 - A 0.001 900.000 High High limit (physical value)
10000000000.000
I1HiLim 0.000 - A 0.001 800.000 High limit (physical value)
10000000000.000
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Monitoring

I1LowLim 0.000 - A 0.001 0.000 Low limit (physical value)
10000000000.000
I1LowLowLim 0.000 - A 0.001 0.000 Low Low limit (physical value)
10000000000.000
I1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
I1AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I1AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
I2ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I2HiHiLim 0.000 - A 0.001 900.000 High High limit (physical value)
10000000000.000
I2HiLim 0.000 - A 0.001 800.000 High limit (physical value)
10000000000.000
I2LowLim 0.000 - A 0.001 0.000 Low limit (physical value)
10000000000.000
I2LowLowLim 0.000 - A 0.001 0.000 Low Low limit (physical value)
10000000000.000
I2AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
I2AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
Table 487: VMSQI Non group settings (basic)

3U0DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
3U0Min 0.000 - V 0.001 0.000 Minimum value
10000000000.000
3U0Max 0.000 - V 0.001 300000.000 Maximum value
10000000000.000
3U0RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
3U0LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
3U0AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
On
3U0AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
3U0AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
3U0AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
3U0AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
U1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
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Monitoring

U1Min 0.000 - V 0.001 0.000 Minimum value
10000000000.000
U1Max 0.000 - V 0.001 300000.000 Maximum value
10000000000.000
U1RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
U1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
U1AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
U2DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
U2Min 0.000 - V 0.001 0.000 Minimum value
10000000000.000
U2Max 0.000 - V 0.001 300000.000 Maximum value
10000000000.000
U2RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
U2LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
U2AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
U2AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
U2AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
U2AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
UAmpPreComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to pre-calibrate voltage
at 5% of Ir
at 30% of Ir
at 100% of Ir
Table 488: VMSQI Non group settings (advanced)

3U0ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
3U0HiHiLim 0.000 - V 0.001 260000.000 High High limit (physical value)
10000000000.000
3U0HiLim 0.000 - V 0.001 240000.000 High limit (physical value)
10000000000.000
3U0LowLim 0.000 - V 0.001 220000.000 Low limit (physical value)
10000000000.000
3U0LowLowLim 0.000 - V 0.001 200000.000 Low Low limit (physical value)
10000000000.000
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Monitoring

U1ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
U1HiHiLim 0.000 - V 0.001 260000.000 High High limit (physical value)
10000000000.000
U1HiLim 0.000 - V 0.001 240000.000 High limit (physical value)
10000000000.000
U1LowLim 0.000 - V 0.001 220000.000 Low limit (physical value)
10000000000.000
U1LowLowLim 0.000 - V 0.001 200000.000 Low Low limit (physical value)
10000000000.000
U1AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
U1AngMin -180.000 - 180.000 Deg 0.001 -180.000 Minimum value
U1AngMax -180.000 - 180.000 Deg 0.001 180.000 Maximum value
U1AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
U2ZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range
U2HiHiLim 0.000 - V 0.001 260000.000 High High limit (physical value)
10000000000.000
U2HiLim 0.000 - V 0.001 240000.000 High limit (physical value)
10000000000.000
U2LowLim 0.000 - V 0.001 220000.000 Low limit (physical value)
10000000000.000
U2LowLowLim 0.000 - V 0.001 200000.000 Low Low limit (physical value)
10000000000.000
U2AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0,001% of range

Table 489: CVMMXU technical data
Frequency (0.95-1.05) × fr ± 2.0 mHz
Voltage (0.1-1.5) ×Ur ± 0.5% of Ur at U£Ur

± 0.5% of U at U > Ur
Connected current (0.2-4.0) × Ir ± 0.5% of Ir at I £ Ir

± 0.5% of I at I > Ir
Active power, P 0.1 x Ur Sr
Conditions:
Reactive power, Q 0.1 x Ur< U < 1.5 x Ur 0.8 x Ur < U < 1.2 Ur
0.2 x Ir < I < 4.0 x Ir 0.2 x Ir < I < 1.2 Ir
Apparent power, S 0.1 x Ur < U < 1.5 x Ur
0.2 x Ir< I < 4.0 x Ir
Power factor, cos (φ) 0.1 x Ur < U < 1.5 x Ur ± 0.02

0.2 x Ir< I < 4.0 x Ir
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Monitoring
15.2 Event counter CNTGGIO

Event counter CNTGGIO -
S00946 V1 EN
15.2.1 Introduction
Event counter (CNTGGIO) has six counters which are used for storing the number
of times each counter input has been activated.

Event counter (CNTGGIO) has six counter inputs. CNTGGIO stores how many
times each of the inputs has been activated. The counter memory for each of the six
inputs is updated, giving the total number of times the input has been activated, as
soon as an input is activated. The maximum count up speed is 10 pulses per
second. The maximum counter value is 10 000. For counts above 10 000 the
counter will stop at 10 000 and no restart will take place.
To not risk that the flash memory is worn out due to too many writings, a
mechanism for limiting the number of writings per time period is included in the
product. This however gives as a result that it can take long time, up to several
minutes, before a new value is stored in the flash memory. And if a new
CNTGGIO value is not stored before auxiliary power interruption, it will be lost.
CNTGGIO stored values in flash memory will however not be lost at an auxiliary
power interruption.
The function block also has an input BLOCK. At activation of this input all six
counters are blocked. The input can for example, be used for blocking the counters
at testing.The function block has an input RESET. At activation of this input all six
counters are set to 0.
All inputs are configured via PCM600.
15.2.2.1 Reporting
The content of the counters can be read in the local HMI.
Reset of counters can be performed in the local HMI and a binary input.
Reading of content can also be performed remotely, for example from a IEC 61850
client. The value can also be presented as a measuring value on the local HMI
graphical display.
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Monitoring
15.2.2.2 Design
The function block has six inputs for increasing the counter values for each of the
six counters respectively. The content of the counters are stepped one step for each
positive edge of the input respectively.
The function block also has an input BLOCK. At activation of this input all six
counters are blocked and are not updated. Valid number is held.
The function block has an input RESET. At activation of this input all six counters
are set to 0.

CNTGGIO
BLOCK VALUE1
COUNTER1 VALUE2
COUNTER2 VALUE3
COUNTER3 VALUE4
COUNTER4 VALUE5
COUNTER5 VALUE6
COUNTER6
RESET
IEC05000345 V2 EN
Figure 403: CNTGGIO function block
15.2.4 Input signals

Table 490: CNTGGIO Input signals
COUNTER1 BOOLEAN 0 Input for counter1
RESET BOOLEAN 0 Reset of function
Table 491: CNTGGIO Output signals

VALUE1 INTEGER Output of counter1
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Monitoring


Table 492: CNTGGIO Group settings (basic)
On

Table 493: CNTGGIO technical data
Counter value 0-10000 -
Max. count up speed 10 pulses/s -
15.3 Event function EVENT

Event function EVENT -
S00946 V1 EN
15.3.1 Introduction
When using a Substation Automation system with LON or SPA communication,
time-tagged events can be sent at change or cyclically from the IED to the station
level. These events are created from any available signal in the IED that is
connected to the Event function (EVENT). The event function block is used for
LON and SPA communication.
Analog and double indication values are also transferred through EVENT function.

The main purpose of the event function (EVENT) is to generate events when the
state or value of any of the connected input signals is in a state, or is undergoing a
state transition, for which event generation is enabled.
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Each EVENT function has 16 inputs INPUT1 - INPUT16. Each input can be given
a name from the Application Configuration tool. The inputs are normally used to
create single events, but are also intended for double indication events.
EVENT function also has an input BLOCK to block the generation of events.
The events that are sent from the IED can originate from both internal logical
signals and binary input channels. The internal signals are time-tagged in the main
processing module, while the binary input channels are time-tagged directly on the
input module. The time-tagging of the events that are originated from internal
logical signals have a resolution corresponding to the execution cyclicity of
EVENT function. The time-tagging of the events that are originated from binary
input signals have a resolution of 1 ms.
The outputs from EVENT function are formed by the reading of status, events and
alarms by the station level on every single input. The user-defined name for each
input is intended to be used by the station level.
All events according to the event mask are stored in a buffer, which contains up to
1000 events. If new events appear before the oldest event in the buffer is read, the
oldest event is overwritten and an overflow alarm appears.
The events are produced according to the set-event masks. The event masks are
treated commonly for both the LON and SPA communication. The EventMask can
be set individually for each input channel. These settings are available:
• NoEvents
• OnSet
• OnReset
• OnChange
• AutoDetect
It is possible to define which part of EVENT function generates the events. This
can be performed individually for the SPAChannelMask and LONChannelMask
respectively. For each communication type these settings are available:
• Off
• Channel 1-8
• Channel 9-16
• Channel 1-16
For LON communication the events normally are sent to station level at change. It
is possibly also to set a time for cyclic sending of the events individually for each
input channel.
To protect the SA system from signals with a high change rate that can easily
saturate the event system or the communication subsystems behind it, a quota
limiter is implemented. If an input creates events at a rate that completely consume
the granted quota then further events from the channel will be blocked. This block
will be removed when the input calms down and the accumulated quota reach 66%
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Monitoring
of the maximum burst quota. The maximum burst quota per input channel is 45
events per second.

EVENT
BLOCK
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
IEC05000697 V2 EN
Figure 404: EVENT function block

Table 494: EVENT Input signals
INPUT1 GROUP 0 Input 1
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
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SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL

Table 495: EVENT Non group settings (basic)
SPAChannelMask Off - - Off SPA channel mask
Channel 1-8
Channel 9-16
Channel 1-16
LONChannelMask Off - - Off LON channel mask
Channel 1-8
Channel 9-16
Channel 1-16
EventMask1 NoEvents - - AutoDetect Reporting criteria for input 1
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
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OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
MinRepIntVal1 0 - 3600 s 1 2 Minimum reporting interval input 1
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15.4 Logical signal status report BINSTATREP

Logical signal status report BINSTATREP - -
15.4.1 Introduction
The Logical signal status report (BINSTATREP) function makes it possible for a
SPA master to poll signals from various other functions.

The Logical signal status report (BINSTATREP) function has 16 inputs and 16
outputs. The output status follows the inputs and can be read from the local HMI or
via SPA communication.
When an input is set, the respective output is set for a user defined time. If the
input signal remains set for a longer period, the output will remain set until the
input signal resets.
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INPUTn
OUTPUTn
t t
IEC09000732 V1 EN
Figure 405: BINSTATREP logical diagram

BINSTATREP
BLOCK OUTPUT1
ÎNPUT1 OUTPUT2
ÎNPUT2 OUTPUT3
ÎNPUT3 OUTPUT4
ÎNPUT4 OUTPUT5
ÎNPUT5 OUTPUT6
ÎNPUT6 OUTPUT7
ÎNPUT7 OUTPUT8
ÎNPUT8 OUTPUT9
ÎNPUT9 OUTPUT10
ÎNPUT10 OUTPUT11
ÎNPUT11 OUTPUT12
ÎNPUT12 OUTPUT13
ÎNPUT13 OUTPUT14
ÎNPUT14 OUTPUT15
ÎNPUT15 OUTPUT16
ÎNPUT16
IEC09000730 V1 EN
Figure 406: BINSTATREP function block

Table 496: BINSTATREP Input signals
INPUT1 BOOLEAN 0 Single status report input 1
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Table 497: BINSTATREP Output signals

OUTPUT1 BOOLEAN Logical status report output 1

Table 498: BINSTATREP Non group settings (basic)
t 0.000 - 60000.000 s 0.001 10.000 Time delay of function
15.5 Fault locator LMBRFLO

Fault locator LMBRFLO - -
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Monitoring
15.5.1 Introduction
The accurate fault locator is an essential component to minimize the outages after a
persistent fault and/or to pin-point a weak spot on the line.
The fault locator is an impedance measuring function giving the distance to the
fault in percent, km or miles. The main advantage is the high accuracy achieved by
compensating for load current and for the mutual zero-sequence effect on double
circuit lines.
The compensation includes setting of the remote and local sources and calculation
of the distribution of fault currents from each side. This distribution of fault
current, together with recorded load (pre-fault) currents, is used to exactly calculate
the fault position. The fault can be recalculated with new source data at the actual
fault to further increase the accuracy.
Especially on heavily loaded long lines (where the fault locator is most important)
where the source voltage angles can be up to 35-40 degrees apart the accuracy can
be still maintained with the advanced compensation included in fault locator.

The Fault locator (LMBRFLO) in the IED is an essential complement to other
monitoring functions, since it measures and indicates the distance to the fault with
great accuracy.
When calculating distance to fault, pre-fault and fault phasors of currents and
voltages are selected from the Trip value recorder data, thus the analog signals used
by the fault locator must be among those connected to the disturbance report
function. The analog configuration (channel selection) is performed using the
parameter setting tool within PCM600.
The calculation algorithm considers the effect of load currents, double-end infeed
and additional fault resistance.
R0L+jX0L
R1L+jX1L
R1A+jX1A R1B+jX1B
Z0m=Z0m+jX0m
R0L+jX0L
R1L+jX1L
DRPRDRE
LMBRFLO
IEC05000045 V2 EN
Figure 407: Simplified network configuration with network data, required for
settings of the fault location-measuring function
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If source impedance in the near and far end of the protected line have changed in a
significant manner relative to the set values at fault location calculation time (due
to exceptional switching state in the immediate network, power generation out of
order, and so on), new values can be entered via the local HMI and a recalculation
of the distance to the fault can be ordered using the algorithm described below. It’s
also possible to change fault loop. In this way, a more accurate location of the fault
can be achieved.
The function indicates the distance to the fault as a percentage of the line length, in
kilometers or miles as selected on the local HMI. The fault location is stored as a
part of the disturbance report information (ER, DR, IND, TVR and FL) and
managed via the local HMI or PCM600.
15.5.2.1 Measuring Principle
For transmission lines with voltage sources at both line ends, the effect of double-
end infeed and additional fault resistance must be considered when calculating the
distance to the fault from the currents and voltages at one line end. If this is not
done, the accuracy of the calculated figure will vary with the load flow and the
amount of additional fault resistance.
The calculation algorithm used in the fault locator in compensates for the effect of
double-end infeed, additional fault resistance and load current.
15.5.2.2 Accurate algorithm for measurement of distance to fault
Figure 408 shows a single-line diagram of a single transmission line, that is fed
from both ends with source impedances ZA and ZB. Assume that the fault occurs at
a distance F from IED A on a line with the length L and impedance ZL. The fault
resistance is defined as RF. A single-line model is used for better clarification of
the algorithm.
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A B
ZA IA pZL IB (1-p).ZL ZB
IF
UA RF
xx01000171.vsd
IEC01000171 V1 EN
Figure 408: Fault on transmission line fed from both ends
From figure 408 it is evident that:
U A = I A × p × Z L + IF × R F
Where:
IA is the line current after the fault, that is, pre-fault current plus current change due to the fault,
IF is the fault current and
p is a relative distance to the fault
The fault current is expressed in measurable quantities by:
IF A
IF = --------
DA
Where:
IFA is the change in current at the point of measurement, IED A and
DA is a fault current-distribution factor, that is, the ratio between the fault current at line end A
and the total fault current.
For a single line, the value is equal to:
( 1 – p ) × Z L + ZB
DA = -----------------------------------------
Z A + Z L + ZB
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Monitoring
Thus, the general fault location equation for a single line is:
I FA
U A = I A × p × Z L + -------
- × RF
DA
Table 499: Expressions for UA, IA and IFA for different types of faults
Fault type: UA IA IFA

L1-N UL1A IL1A + KN x INA 3
--- ´ D ( I L1A – I 0A )
2
EQUATION110 V1 EN
L2-N UL2A IL2A + KN x INA

3
--- ´ D ( I L2A – I 0A )
2
EQUATION111 V1 EN
L3-N UL3A IL3A + KN x INA 3

--- ´ D ( I L3A – I0A )
2
EQUATION112 V1 EN
L1-L2-L3, L1-L2,L1-L2- UL1A-UL2A IL1A - IL2A DIL 1 L 2 A

N
EQUATION113 V1 EN
L2-L3, L2-L3-N UL2A-UL3A IL2A - IL3A DIL2L3A

EQUATION114 V1 EN
L3-L1, L3-L1-N UL3A-UL1A IL3A - IL1A

DIL3L1A
EQUATION115 V1 EN
The KN complex quantity for zero-sequence compensation for the single line is
equal to:
Z0L – Z 1L
K N = ------------------------
3 × Z1L
DI is the change in current, that is the current after the fault minus the current
before the fault.
In the following, the positive sequence impedance for ZA, ZB and ZL is inserted
into the equations, because this is the value used in the algorithm.
For double lines, the fault equation is:
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Monitoring
I FA
U A = I A × p × Z 1L + -------- × RF + I 0P × Z 0M
DA
Where:
I0P is a zero sequence current of the parallel line,
Z0M is a mutual zero sequence impedance and
DA is the distribution factor of the parallel line, which is:
( 1 – p ) × ( ZA + ZA L + ZB ) + Z B
DA = ----------------------------------------------------------------------------
-
2 × ZA + Z L + 2 × Z B
EQUATION101 V1 EN
The KN compensation factor for the double line becomes:
Z0L – Z 1L Z 0M I 0P
K N = ----------------------- - × -------
- + ----------------
3 × Z1L 3 × Z1L I 0A
From these equations it can be seen, that, if Z0m = 0, then the general fault location
equation for a single line is obtained. Only the distribution factor differs in these
two cases.
Because the DA distribution factor according to equation 150 or 152 is a function

of p, the general equation 152 can be written in the form:
2
p – p × K1 + K2 – K3 × RF = 0
Where:
UA ZB
K 1 = ---------------
- + --------------------------
-+1
I A × ZL Z L + ZA DD
UA ZB
K2 = --------------- × æè --------------------------- + 1öø
IA × Z L Z L + Z A DD
IF A æ ZA + ZB
- × --------------------------- + 1ö
K 3 = ---------------
I A × Z L è Z 1 + ZA DD ø
and:
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Monitoring
• ZADD = ZA + ZB for parallel lines.

• IA, IFA and UA are given in the above table.
• KN is calculated automatically according to equation 153.
• ZA, ZB, ZL, Z0L and Z0M are setting parameters.
For a single line, Z0M = 0 and ZADD = 0. Thus, equation 154 applies to both single
and parallel lines.
Equation 154 can be divided into real and imaginary parts:

2
p – p × Re ( K 1 ) + Re ( K 2 ) – R F × Re ( K 3 ) = 0
– p × Im × ( K1 ) + Im × ( K 2 ) – R F × Im × ( K3 ) = 0
If the imaginary part of K3 is not zero, RF can be solved according to equation 159,
and then inserted to equation 158. According to equation 158, the relative distance
to the fault is solved as the root of a quadratic equation.
Equation 158 gives two different values for the relative distance to the fault as a
solution. A simplified load compensated algorithm, which gives an unequivocal
figure for the relative distance to the fault, is used to establish the value that should
be selected.
If the load compensated algorithms according to the above do not give a reliable
solution, a less accurate, non-compensated impedance model is used to calculate
the relative distance to the fault.
15.5.2.3 The non-compensated impedance model
In the non-compensated impedance model, IA line current is used instead of IFA

fault current:
U A = p × Z 1 L × IA + R F × IA
Where:
IA is according to table 499.
The accuracy of the distance-to-fault calculation, using the non-compensated

impedance model, is influenced by the pre-fault load current. So, this method is
only used if the load compensated models do not function.
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Monitoring
15.5.2.4 IEC 60870-5-103
The communication protocol IEC 60870-5-103 may be used to poll fault location
information from the IED to a master (that is station HSI). There are two outputs
that must be connected to appropriate inputs on the function block I103StatFltDis,
FLTDISTX gives distance to fault (reactance, according the standard) and
CALCMADE gives a pulse (100 ms) when a result is obtainable on FLTDISTX
output.

LMBRFLO
PHSELL1* FLTDISTX
PHSELL2* CALCMADE
PHSELL3* BCD_80
CALCDIST* BCD_40
BCD_20
BCD_10
BCD_8
BCD_4
BCD_2
BCD_1
IEC05000679 V3 EN
Figure 409: FLO function block

Table 500: LMBRFLO Input signals
PHSELL1 BOOLEAN 0 Phase selecton L1
CALCDIST BOOLEAN 0 Do calculate fault distance (release)
Table 501: LMBRFLO Output signals

FLTDISTX REAL Reactive distance to fault
CALCMADE BOOLEAN Fault calculation made
BCD_80 BOOLEAN Distance in binary coded data, bit represents 80%
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Monitoring

Table 502: LMBRFLO Group settings (basic)
R1A 0.001 - 1500.000 ohm/p 0.001 2.000 Source resistance A (near end)
X1A 0.001 - 1500.000 ohm/p 0.001 12.000 Source reactance A (near end)
R1B 0.001 - 1500.000 ohm/p 0.001 2.000 Source resistance B (far end)
X1B 0.001 - 1500.000 ohm/p 0.001 12.000 Source reactance B (far end)
R1L 0.001 - 1500.000 ohm/p 0.001 2.000 Positive sequence line resistance
X1L 0.001 - 1500.000 ohm/p 0.001 12.500 Positive sequence line reactance
R0L 0.001 - 1500.000 ohm/p 0.001 8.750 Zero sequence line resistance
X0L 0.001 - 1500.000 ohm/p 0.001 50.000 Zero sequence line reactance
R0M 0.000 - 1500.000 ohm/p 0.001 0.000 Zero sequence mutual resistance
X0M 0.000 - 1500.000 ohm/p 0.001 0.000 Zero sequence mutual reactance
LineLength 0.0 - 10000.0 - 0.1 40.0 Length of line
Table 503: LMBRFLO Non group settings (basic)

DrepChNoIL1 1 - 30 Ch 1 1 Recorder input number recording phase
current, IL1
current, IL2
current, IL3
DrepChNoIN 0 - 30 Ch 1 4 Recorder input number recording
residual current, IN
DrepChNoIP 0 - 30 Ch 1 0 Recorder input number recording 3I0 on
parallel line
DrepChNoUL1 1 - 30 Ch 1 5 Recorder input number recording phase
voltage, UL1
voltage, UL2
voltage, UL3
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Table 504: LMBRFLO technical data
Function Value or range Accuracy
Reactive and resistive reach (0.001-1500.000) Ω/phase ± 2.0% static accuracy
± 2.0% degrees static
angular accuracy
Conditions:
Phase selection According to input signals -

Maximum number of fault 100 -
locations
15.6 Measured value expander block RANGE_XP

Measured value expander block RANGE_XP - -
15.6.1 Introduction
The current and voltage measurements functions (CVMMXU, CMMXU, VMMXU
and VNMMXU), current and voltage sequence measurement functions (CMSQI
and VMSQI) and IEC 61850 generic communication I/O functions (MVGGIO) are
provided with measurement supervision functionality. All measured values can be
supervised with four settable limits that is low-low limit, low limit, high limit and
high-high limit. The measure value expander block (RANGE_XP) has been
introduced to be able to translate the integer output signal from the measuring
functions to 5 binary signals that is below low-low limit, below low limit, normal,
above high-high limit or above high limit. The output signals can be used as
conditions in the configurable logic.

The input signal must be connected to a range output of a measuring function block
(CVMMXU, CMMXU, VMMXU, VNMMXU, CMSQI, VMSQ or MVGGIO).
The function block converts the input integer value to five binary output signals
according to table 505.
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Monitoring
Table 505: Input integer value converted to binary output signals

Measured supervised below low-low between low‐ between low between high- above high-
value is: limit low and low and high limit high and high high limit
Output: limit limit
LOWLOW High
LOW High
NORMAL High
HIGH High
HIGHHIGH High

RANGE_XP
RANGE* HIGHHIGH
HIGH
NORMAL
LOW
LOWLOW
IEC05000346 V2 EN
Figure 410: RANGE_XP function block

Table 506: RANGE_XP Input signals
RANGE INTEGER 0 Measured value range
Table 507: RANGE_XP Output signals

HIGHHIGH BOOLEAN Measured value is above high-high limit
HIGH BOOLEAN Measured value is between high and high-high limit
NORMAL BOOLEAN Measured value is between high and low limit
LOW BOOLEAN Measured value is between low and low-low limit
LOWLOW BOOLEAN Measured value is below low-low limit
15.7 Disturbance report DRPRDRE
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Monitoring

Analog input signals A41RADR - -
Disturbance report DRPRDRE - -
Disturbance report A1RADR - -
Disturbance report A4RADR - -
Disturbance report B1RBDR - -
15.7.1 Introduction
Complete and reliable information about disturbances in the primary and/or in the
secondary system together with continuous event-logging is accomplished by the
disturbance report functionality.
Disturbance report DRPRDRE, always included in the IED, acquires sampled data
of all selected analog input and binary signals connected to the function block that
is, maximum 40 analog and 96 binary signals.
Disturbance report functionality is a common name for several functions:
• Event list
• Indications
• Event recorder
• Trip value recorder
• Disturbance recorder
• Fault locator
Disturbance report function is characterized by great flexibility regarding

configuration, starting conditions, recording times and large storage capacity.
A disturbance is defined as an activation of an input in the AxRADR or BxRBDR

function blocks, which is set to trigger the disturbance recorder. All signals from
start of pre-fault time to the end of post-fault time will be included in the recording.
Every disturbance report recording is saved in the IED in the standard Comtrade
format. The same applies to all events, which are continuously saved in a ring-
buffer. The local HMI is used to get information about the recordings, but the
disturbance report files may be uploaded to PCM600 and further analysis using the
disturbance handling tool.

Disturbance report DRPRDRE is a common name for several functions to supply
the operator, analysis engineer, and so on, with sufficient information about events
in the system.
The functions included in the disturbance report are:
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• Event list (EL)

• Indications (IND)
• Event recorder (ER)
• Trip value recorder(TVR)
• Disturbance recorder (DR)
Figure 411 shows the relations between Disturbance Report, included functions
and function blocks. Event list (EL), Event recorder (ER) and Indications (IND)
uses information from the binary input function blocks (BxRBDR). Trip value
recorder (TVR) uses analog information from the analog input function blocks
(AxRADR). Disturbance recorder DRPRDRE acquires information from both
AxRADR and BxRBDR.
A1-4RADR Disturbance Report
A4RADR DRPRDRE FL
Analog signals
Trip value rec Fault locator
B1-6RBDR Disturbance
recorder
Binary signals B6RBDR

Event list
Event recorder
Indications
IEC09000336 V2 EN
Figure 411: Disturbance report functions and related function blocks
The whole disturbance report can contain information for a number of recordings,
each with the data coming from all the parts mentioned above. The event list
function is working continuously, independent of disturbance triggering, recording
time, and so on. All information in the disturbance report is stored in non-volatile
flash memories. This implies that no information is lost in case of loss of auxiliary
power. Each report will get an identification number in the interval from 0-999.
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Disturbance report
Record no. N Record no. N+1 Record no. N+100
General dist. Trip Event Disturbance

Indications Fault locator Event list
information values recordings recording
en05000125.vsd
IEC05000125 V1 EN
Figure 412: Disturbance report structure
Up to 100 disturbance reports can be stored. If a new disturbance is to be recorded

when the memory is full, the oldest disturbance report is overwritten by the new
one. The total recording capacity for the disturbance recorder is depending of
sampling frequency, number of analog and binary channels and recording time.
Figure 413 shows the number of recordings versus the total recording time tested
for a typical configuration, that is, in a 50 Hz system it is possible to record 100
where the average recording time is 3.4 seconds. The memory limit does not affect
the rest of the disturbance report (Event list (EL), Event recorder (ER), Indications
(IND) and Trip value recorder (TVR)).
Number of recordings
100
3,4 s
80 3,4 s 20 analog
96 binary
40 analog
96 binary
60 6,3 s
6,3 s
6,3 s 50 Hz
40
60 Hz
Total recording time
250 300 350 400 s
en05000488.vsd
IEC05000488 V1 EN
Figure 413: Number of recordings
Disturbance information
Date and time of the disturbance, the indications, events, fault location and the trip
values are available on the local HMI. To acquire a complete disturbance report the
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user must use a PC and - either the PCM600 Disturbance handling tool - or a FTP
or MMS (over 61850) client. The PC can be connected to the IED front, rear or
remotely via the station bus (Ethernet ports).
Indications (IND)
Indications is a list of signals that were activated during the total recording time of
the disturbance (not time-tagged), see section "Indications" for more detailed
information.
Event recorder (ER)

The event recorder may contain a list of up to 150 time-tagged events, which have
occurred during the disturbance. The information is available via the local HMI or
PCM600, see section "Event recorder" for more detailed information.
Event list (EL)

The event list may contain a list of totally 1000 time-tagged events. The list
information is continuously updated when selected binary signals change state. The
oldest data is overwritten. The logged signals may be presented via local HMI or
PCM600, see section "Event list" for more detailed information.
Trip value recorder (TVR)

The recorded trip values include phasors of selected analog signals before the fault
and during the fault, see section "Trip value recorder" for more detailed information.
Disturbance recorder (DR)

Disturbance recorder records analog and binary signal data before, during and after
the fault, see section "Disturbance recorder" for more detailed information.
Fault locator (FL)

The fault location function calculates the distance to fault, see section "Fault
locator LMBRFLO" for more detailed information.
Time tagging
The IED has a built-in real-time calendar and clock. This function is used for all
time tagging within the disturbance report
Recording times
Disturbance report DRPRDRE records information about a disturbance during a
settable time frame. The recording times are valid for the whole disturbance report.
Disturbance recorder (DR), event recorder (ER) and indication function register
disturbance data and events during tRecording, the total recording time.
The total recording time, tRecording, of a recorded disturbance is:
tRecording = PreFaultrecT + tFault + PostFaultrecT or PreFaultrecT + TimeLimit, depending on

which criterion stops the current disturbance recording
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Trig point
TimeLimit
PreFaultRecT PostFaultRecT
1 2 3
en05000487.vsd
IEC05000487 V1 EN
Figure 414: The recording times definition
PreFaultRecT, 1 Pre-fault or pre-trigger recording time. The time before the fault including the
operate time of the trigger. Use the setting PreFaultRecT to set this time.
tFault, 2 Fault time of the recording. The fault time cannot be set. It continues as long as
any valid trigger condition, binary or analog, persists (unless limited by TimeLimit
the limit time).
PostFaultRecT, 3 Post fault recording time. The time the disturbance recording continues after all
activated triggers are reset. Use the setting PostFaultRecT to set this time.
TimeLimit Limit time. The maximum allowed recording time after the disturbance recording
was triggered. The limit time is used to eliminate the consequences of a trigger
that does not reset within a reasonable time interval. It limits the maximum
recording time of a recording and prevents subsequent overwriting of already
stored disturbances. Use the setting TimeLimit to set this time.
Analog signals
Up to 40 analog signals can be selected for recording by the Disturbance recorder
and triggering of the Disturbance report function. Out of these 40, 30 are reserved
for external analog signals from analog input modules (TRM) and line data
communication module (LDCM) via preprocessing function blocks (SMAI) and
summation block (3PHSUM). The last 10 channels may be connected to internally
calculated analog signals available as function block output signals (mA input
signals, phase differential currents, bias currents and so on).
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SMAI A1RADR
Block AI3P A2RADR
^GRP2L1 AI1 INPUT1 A3RADR
External
analogue ^GRP2L2 AI2 INPUT2
signals ^GRP2L3 AI3 INPUT3
^GRP2N AI4 INPUT4
Type AIN INPUT5
INPUT6
...
A4RADR
INPUT31
INPUT32
INPUT33
Internal analogue signals INPUT34
INPUT35
INPUT36
...
INPUT40
IEC10000029 V1 EN
Figure 415: Analog input function blocks
The external input signals will be acquired, filtered and skewed and (after
configuration) available as an input signal on the AxRADR function block via the
SMAI function block. The information is saved at the Disturbance report base
sampling rate (1000 or 1200 Hz). Internally calculated signals are updated
according to the cycle time of the specific function. If a function is running at
lower speed than the base sampling rate, Disturbance recorder will use the latest
updated sample until a new updated sample is available.
If the IED is preconfigured the only tool needed for analog configuration of the
Disturbance report is the Signal Matrix Tool (SMT, external signal configuration).
In case of modification of a preconfigured IED or general internal configuration the
Application Configuration tool within PCM600 is used.
The preprocessor function block (SMAI) calculates the residual quantities in cases
where only the three phases are connected (AI4-input not used).SMAI makes the
information available as a group signal output, phase outputs and calculated
residual output (AIN-output). In situations where AI4-input is used as an input
signal the corresponding information is available on the non-calculated output
(AI4) on the SMAI function block. Connect the signals to the AxRADR accordingly.
For each of the analog signals, Operation = On means that it is recorded by the
disturbance recorder. The trigger is independent of the setting of Operation, and
triggers even if operation is set to Off. Both undervoltage and overvoltage can be
used as trigger conditions. The same applies for the current signals.
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If Operation = Off, no waveform (samples) will be recorded and reported in graph.

However, Trip value, pre-fault and fault value will be recorded and reported. The
input channel can still be used to trig the disturbance recorder.
If Operation = On, waveform (samples) will also be recorded and reported in graph.
The analog signals are presented only in the disturbance recording, but they affect
the entire disturbance report when being used as triggers.
Binary signals
Up to 96 binary signals can be selected to be handled by disturbance report. The
signals can be selected from internal logical and binary input signals. A binary
signal is selected to be recorded when:
• the corresponding function block is included in the configuration

• the signal is connected to the input of the function block
Each of the 96 signals can be selected as a trigger of the disturbance report

(Operation = Off). A binary signal can be selected to activate the red LED on the
local HMI (SetLED = On/Off).
The selected signals are presented in the event recorder, event list and the
disturbance recording. But they affect the whole disturbance report when they are
used as triggers. The indications are also selected from these 96 signals with local
HMI IndicationMask=Show/Hide.
Trigger signals
The trigger conditions affect the entire disturbance report, except the event list,
which runs continuously. As soon as at least one trigger condition is fulfilled, a
complete disturbance report is recorded. On the other hand, if no trigger condition
is fulfilled, there is no disturbance report, no indications, and so on. This implies
the importance of choosing the right signals as trigger conditions.
A trigger can be of type:
• Manual trigger
• Binary-signal trigger
• Analog-signal trigger (over/under function)
Manual trigger
A disturbance report can be manually triggered from the local HMI, PCM600 or
via station bus (IEC 61850). When the trigger is activated, the manual trigger
signal is generated. This feature is especially useful for testing. Refer to the
operator's manual for procedure.
Binary-signal trigger
Any binary signal state (logic one or a logic zero) can be selected to generate a
trigger (Triglevel = Trig on 0/Trig on 1). When a binary signal is selected to
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generate a trigger from a logic zero, the selected signal will not be listed in the
indications list of the disturbance report.
Analog-signal trigger
All analog signals are available for trigger purposes, no matter if they are recorded
in the disturbance recorder or not. The settings are OverTrigOp, UnderTrigOp,
OverTrigLe and UnderTrigLe.
The check of the trigger condition is based on peak-to-peak values. When this is
found, the absolute average value of these two peak values is calculated. If the
average value is above the threshold level for an overvoltage or overcurrent trigger,
this trigger is indicated with a greater than (>) sign with the user-defined name.
If the average value is below the set threshold level for an undervoltage or
undercurrent trigger, this trigger is indicated with a less than (<) sign with its name.
The procedure is separately performed for each channel.
This method of checking the analog start conditions gives a function which is
insensitive to DC offset in the signal. The operate time for this start is typically in
the range of one cycle, 20 ms for a 50 Hz network.
All under/over trig signal information is available on the local HMI and PCM600.
Post Retrigger
Disturbance report function does not respond to any new trig condition, during a
recording. Under certain circumstances the fault condition may reoccur during the
post-fault recording, for instance by automatic reclosing to a still faulty power line.
In order to capture the new disturbance it is possible to allow retriggering

(PostRetrig = On) during the post-fault time. In this case a new, complete
recording will start and, during a period, run in parallel with the initial recording.
When the retrig parameter is disabled (PostRetrig = Off), a new recording will not
start until the post-fault (PostFaultrecT or TimeLimit) period is terminated. If a
new trig occurs during the post-fault period and lasts longer than the proceeding
recording a new complete recording will be fetched.
Disturbance report function can handle maximum 3 simultaneous disturbance

recordings.

DRPRDRE
DRPOFF
RECSTART
RECMADE
CLEARED
MEMUSED
IEC05000406 V3 EN
Figure 416: DRPRDRE function block
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A1RADR
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
IEC05000430 V3 EN
Figure 417: A1RADR function block
A4RADR
ÎNPUT31
ÎNPUT32
ÎNPUT33
ÎNPUT34
ÎNPUT35
ÎNPUT36
ÎNPUT37
ÎNPUT38
ÎNPUT39
ÎNPUT40
IEC05000431 V3 EN
Figure 418: A4RADR function block, derived analog inputs
B1RBDR
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
IEC05000432 V3 EN
Figure 419: B1RBDR function block, binary inputs, example for B1RBDR -
B6RBDR
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Table 508: RDRE Output signals
DRPOFF BOOLEAN Disturbance report function turned off
RECSTART BOOLEAN Disturbance recording started
RECMADE BOOLEAN Disturbance recording made
CLEARED BOOLEAN All disturbances in the disturbance report cleared
MEMUSED BOOLEAN More than 80% of memory used
Table 509: A1RADR Input signals

INPUT1 GROUP - Group signal for input 1
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
Table 510: A4RADR Input signals

INPUT31 REAL 0 Analogue channel 31
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Table 511: B1RBDR Input signals

INPUT1 BOOLEAN 0 Binary channel 1

Table 512: RDRE Non group settings (basic)
On
PreFaultRecT 0.05 - 1.00 s 0.01 0.10 Pre-fault recording time
PostFaultRecT 0.1 - 10.0 s 0.1 0.5 Post-fault recording time
TimeLimit 0.5 - 10.0 s 0.1 1.0 Fault recording time limit
PostRetrig Off - - Off Post-fault retrig enabled (On) or not (Off)
On
ZeroAngleRef 1 - 30 Ch 1 1 Trip value recorder, phasor reference
channel
OpModeTest Off - - Off Operation mode during test mode
On
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Table 513: A1RADR Non group settings (basic)

Operation01 Off - - Off Operation On/Off
On
NomValue01 0.0 - 999999.9 - 0.1 0.0 Nominal value for analogue channel 1
UnderTrigOp01 Off - - Off Use under level trig for analogue cha 1
On (on) or not (off)
UnderTrigLe01 0 - 200 % 1 50 Under trigger level for analogue cha 1 in
% of signal
OverTrigOp01 Off - - Off Use over level trig for analogue cha 1
OverTrigLe01 0 - 5000 % 1 200 Over trigger level for analogue cha 1 in
% of signal
On
% of signal
% of signal
On
% of signal
OverTrigLe03 0 - 5000 % 1 200 Overtrigger level for analogue cha 3 in %
of signal
On
% of signal
% of signal
On
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% of signal
% of signal
On
% of signal
% of signal
On
% of signal
% of signal
On
% of signal
% of signal
On
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% of signal
% of signal
On
UnderTrigLe10 0 - 200 % 1 50 Under trigger level for analogue cha 10
in % of signal
% of signal
Table 514: A4RADR Non group settings (basic)

Operation31 Off - - Off Operation On/off
On
in % of signal
% of signal
On
in % of signal
% of signal
On
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in % of signal
OverTrigLe33 0 - 5000 % 1 200 Overtrigger level for analogue cha 33 in
% of signal
On
in % of signal
% of signal
On
in % of signal
% of signal
On
in % of signal
% of signal
On
in % of signal
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% of signal
On
in % of signal
% of signal
On
in % of signal
% of signal
On
in % of signal
% of signal
Table 515: B1RBDR Non group settings (basic)

Operation01 Off - - Off Trigger operation On/Off
On
TrigLevel01 Trig on 0 - - Trig on 1 Trig on positiv (1) or negative (0) slope
Trig on 1 for binary inp 1
IndicationMa01 Hide - - Hide Indication mask for binary channel 1
Show
SetLED01 Off - - Off Set red-LED on HMI for binary channel 1
On
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On
Show
On
On
Show
On
On
Show
On
On
Show
On
On
Show
On
On
Show
On
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On
Show
On
On
Show
On
On
Show
On
On
Show
On
On
Show
SetLED12 Off - - Off Set red-LED on HMI for binary input 12
On
On
Show
On
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On
Show
On
On
Show
On
On
Show
On
FUNT1 0 - 255 FunT 1 0 Function type for binary channel 1 (IEC
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
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-60870-5-103)
-60870-5-103)
-60870-5-103)
-60870-5-103)
INFNO1 0 - 255 InfNo 1 0 Information number for binary channel 1
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
(IEC -60870-5-103)
INFNO10 0 - 255 InfNo 1 0 Information number for binary channel
10 (IEC -60870-5-103)
11 (IEC -60870-5-103)
12 (IEC -60870-5-103)
13 (IEC -60870-5-103)
14 (IEC -60870-5-103)
15 (IEC -60870-5-103)
16 (IEC -60870-5-103)
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Table 516: DRPRDRE technical data
Pre-fault time (0.05–1.00) s -
Post-fault time (0.1–10.0) s -
Limit time (0.5–10.0) s -
Maximum number of recordings 100 -
Time tagging resolution 1 ms See table 28
Maximum number of analog inputs 30 + 10 (external + internally -
derived)
Maximum number of binary inputs 96 -
Maximum number of phasors in the 30 -
Trip Value recorder per recording
Maximum number of indications in a 96 -
disturbance report
Maximum number of events in the 150 -
Event recording per recording
Maximum number of events in the 1000, first in - first out -
Event list
Maximum total recording time (3.4 s 340 seconds (100 recordings) at -
recording time and maximum 50 Hz, 280 seconds (80
number of channels, typical value) recordings) at 60 Hz
Sampling rate 1 kHz at 50 Hz -
1.2 kHz at 60 Hz
Recording bandwidth (5-300) Hz -
15.8 Event list
15.8.1 Introduction
Continuous event-logging is useful for monitoring of the system from an overview
perspective and is a complement to specific disturbance recorder functions.
The event list logs all binary input signals connected to the Disturbance report
function. The list may contain of up to 1000 time-tagged events stored in a ring-buffer.

When a binary signal, connected to the disturbance report function, changes status,
the event list function stores input name, status and time in the event list in
chronological order. The list can contain up to 1000 events from both internal logic
signals and binary input channels. If the list is full, the oldest event is overwritten
when a new event arrives.
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The list can be configured to show oldest or newest events first with a setting on
the local HMI.
The event list function runs continuously, in contrast to the event recorder function,
which is only active during a disturbance.
The name of the binary input signal that appears in the event recording is the user-
defined name assigned when the IED is configured. The same name is used in the
disturbance recorder function (DR), indications (IND)and the event recorder
function (ER).
The event list is stored and managed separate from the disturbance report
information (ER, DR, IND, TVR and FL).

The Event list has no function block of it’s own. It is included in the DRPRDRE
block and uses information from the BxRBDR block.

The Event list logs the same binary input signals as configured for the Disturbance
report function.

Table 517: technical data
Function Value
Buffer capacity Maximum number of events in the list 1000
Resolution 1 ms
Accuracy Depending on time
synchronizing
15.9 Indications
15.9.1 Introduction
To get fast, condensed and reliable information about disturbances in the primary
and/or in the secondary system it is important to know, for example binary signals
that have changed status during a disturbance. This information is used in the short
perspective to get information via the local HMI in a straightforward way.
There are three LEDs on the local HMI (green, yellow and red), which will display
status information about the IED and the Disturbance report function (trigged).
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The Indication list function shows all selected binary input signals connected to the
Disturbance report function that have changed status during a disturbance.

The LED indications display this information:
Green LED:
Steady light In Service

Flashing light Internal fail
Dark No power supply
Yellow LED:
Steady light A disturbance report is triggered

Flashing light The IED is in test mode or in configuration mode
Red LED:
Steady light Trigged on binary signal N with SetLEDN=On
Indication list:
The possible indicated signals are the same as the ones chosen for the disturbance
report function and disturbance recorder.
The indication function tracks 0 to 1 changes of binary signals during the recording
period of the collection window. This means that constant logic zero, constant logic
one or state changes from logic one to logic zero will not be visible in the list of
indications. Signals are not time tagged. In order to be recorded in the list of
indications the:
• the signal must be connected to binary input(DRB1-6)

• the DRPparameter Operation must be set On
• the DRP must be trigged (binary or analog)
Indications are selected with the indication mask (IndicationMask) when

configuring the binary inputs.
The name of the binary input signal that appears in the Indication function is the user-
defined name assigned at configuration of the IED. The same name is used in
disturbance recorder function (DR), indications (IND) and event recorder function
(ER).
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The Indications function has no function block of it’s own. It is included in the
DRPRDRE block and uses information from the BxRBDR block.

The Indications function may log the same binary input signals as the Disturbance
report function.

Function Value
Buffer capacity Maximum number of indications 96
presented for single disturbance
Maximum number of recorded 100
disturbances
15.10 Event recorder
Quick, complete and reliable information about disturbances in the primary and/or
in the secondary system is vital, for example, time tagged events logged during
disturbances. This information is used for different purposes in the short term (for
example corrective actions) and in the long term (for example Functional Analysis).
The event recorder logs all selected binary input signals connected to the
Disturbance report function. Each recording can contain up to 150 time-tagged events.
The event recorder information is available for the disturbances locally in the IED.
The event recording information is an integrated part of the disturbance record

(Comtrade file).

When one of the trig conditions for the disturbance report is activated, the event
recorder logs every status change in the 96 selected binary signals. The events can
be generated by both internal logical signals and binary input channels. The
internal signals are time-tagged in the main processor module, while the binary
input channels are time-tagged directly in each I/O module. The events are
collected during the total recording time (pre-, post-fault and limit time), and are
stored in the disturbance report flash memory at the end of each recording.
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In case of overlapping recordings, due to PostRetrig = On and a new trig signal

appears during post-fault time, events will be saved in both recording files.
The name of the binary input signal that appears in the event recording is the user-
defined name assigned when configuring the IED. The same name is used in the
disturbance recorder function (DR), indications (IND) and event recorder function
(ER).
The event record is stored as a part of the disturbance report information (ER, DR,
IND, TVR and FL) and managed via the local HMI or PCM600.

The Event recorder has no function block of it’s own. It is included in the

The Event recorder function logs the same binary input signals as the Disturbance
report function.

Function Value
Buffer capacity Maximum number of events in disturbance 150
report
Maximum number of disturbance reports 100
Resolution 1 ms
Accuracy Depending on time
synchronizing
15.11 Trip value recorder
Information about the pre-fault and fault values for currents and voltages are vital
for the disturbance evaluation.
The Trip value recorder calculates the values of all selected analog input signals
connected to the Disturbance report function. The result is magnitude and phase
angle before and during the fault for each analog input signal.
The trip value recorder information is available for the disturbances locally in the
IED.
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The trip value recorder information is an integrated part of the disturbance record
(Comtrade file).

Trip value recorder (TVR)calculates and presents both fault and pre-fault
amplitudes as well as the phase angles of all the selected analog input signals. The
parameter ZeroAngleRef points out which input signal is used as the angle
reference. The calculated data is input information to the fault locator (FL).
When the disturbance report function is triggered the sample for the fault
interception is searched for, by checking the non-periodic changes in the analog
input signals. The channel search order is consecutive, starting with the analog
input with the lowest number.
When a starting point is found, the Fourier estimation of the pre-fault values of the
complex values of the analog signals starts 1.5 cycle before the fault sample. The
estimation uses samples during one period. The post-fault values are calculated
using the Recursive Least Squares (RLS) method. The calculation starts a few
samples after the fault sample and uses samples during 1/2 - 2 cycles depending on
the shape of the signals.
If no starting point is found in the recording, the disturbance report trig sample is
used as the start sample for the Fourier estimation. The estimation uses samples
during one cycle before the trig sample. In this case the calculated values are used
both as pre-fault and fault values.
The name of the analog input signal that appears in the Trip value recorder function
is the user-defined name assigned when the IED is configured. The same name is
used in the Disturbance recorder function (DR).
The trip value record is stored as a part of the disturbance report information (ER,
DR, IND, TVR and fault locator) and managed in via the local HMI or PCM600.

The Trip value recorder has no function block of it’s own. It is included in the

The trip value recorder function uses analog input signals connected to A1RADR
to A3RADR (not A4RADR).
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Function Value
Buffer capacity Maximum number of analog inputs 30
15.12 Disturbance recorder
The Disturbance recorder function supplies fast, complete and reliable information
about disturbances in the power system. It facilitates understanding system
behavior and related primary and secondary equipment during and after a
disturbance. Recorded information is used for different purposes in the short
perspective (for example corrective actions) and long perspective (for example
Functional Analysis).
The Disturbance recorder acquires sampled data from all selected analog input and
binary signals connected to the Disturbance report function (maximum 40 analog
and 96 binary signals). The binary signals are the same signals as available under
the event recorder function.
The function is characterized by great flexibility and is not dependent on the

operation of protection functions. It can record disturbances not detected by
protection functions.
The disturbance recorder information for the last 100 disturbances are saved in the
IED and the local HMI is used to view the list of recordings.

Disturbance recording (DR) is based on the acquisition of binary and analog
signals. The binary signals can be either true binary input signals or internal logical
signals generated by the functions in the IED. The analog signals to be recorded are
input channels from the Transformer Input Module (TRM), Line Differential
communication Module (LDCM) through the Signal Matrix Analog Input (SMAI)
and possible summation (Sum3Ph) function blocks and some internally derived
analog signals. For details, refer to section "Disturbance report DRPRDRE".
Disturbance recorder collects analog values and binary signals continuously, in a

cyclic buffer. The pre-fault buffer operates according to the FIFO principle; old
data will continuously be overwritten as new data arrives when the buffer is full.
The size of this buffer is determined by the set pre-fault recording time.
782
Monitoring
Upon detection of a fault condition (triggering), the disturbance is time tagged and
the data storage continues in a post-fault buffer. The storage process continues as
long as the fault condition prevails - plus a certain additional time. This is called
the post-fault time and it can be set in the disturbance report.
The above mentioned two parts form a disturbance recording. The whole memory,
intended for disturbance recordings, acts as a cyclic buffer and when it is full, the
oldest recording is overwritten. The last 100 recordings are stored in the IED.
The time tagging refers to the activation of the trigger that starts the disturbance
recording. A recording can be trigged by, manual start, binary input and/or from
analog inputs (over-/underlevel trig).
A user-defined name for each of the signals can be set. These names are common
for all functions within the disturbance report functionality.
15.12.2.1 Memory and storage
When a recording is completed, a post recording processing occurs.
This post-recording processing comprises:
• Saving the data for analog channels with corresponding data for binary signals
• Add relevant data to be used by the Disturbance handling tool (part of PCM 600)
• Compression of the data, which is performed without losing any data accuracy
• Storing the compressed data in a non-volatile memory (flash memory)
The recorded disturbance is now ready for retrieval and evaluation.
The recording files comply with the Comtrade standard IEC 60255-24 and are
divided into three files; a header file (HDR), a configuration file (CFG) and a data
file (DAT).
The header file (optional in the standard) contains basic information about the
disturbance, that is, information from the Disturbance report sub-functions (ER,
TVR and FL). The Disturbance handling tool use this information and present the
recording in a user-friendly way.
General:
• Station name, object name and unit name

• Date and time for the trig of the disturbance
• Record number
• Sampling rate
• Time synchronization source
• Recording times
• Activated trig signal
• Active setting group
Analog:
783
Monitoring
• Signal names for selected analog channels

• Information e.g. trig on analog inputs
• Primary and secondary instrument transformer rating
• Over- or Undertrig: level and operation
• Over- or Undertrig status at time of trig
• CT direction
Binary:
• Signal names
• Status of binary input signals
The configuration file is a mandatory file containing information needed to

interpret the data file. For example sampling rate, number of channels, system
frequency, channel info etc.
The data file, which also is mandatory, containing values for each input channel for
each sample in the record (scaled value). The data file also contains a sequence
number and time stamp for each set of samples.
15.12.2.2 IEC 60870-5-103
The communication protocol IEC 60870-5-103 may be used to poll disturbance

recordings from the IED to a master (station HSI). The standard describes how to
handle 8 disturbance recordings, 8 analog channels (4 currents and 4 voltages)
using the public range and binary signals.
The last 8 recordings, out of maximum 100, are available for transfer to the master.
When the last one is transferred and acknowledged new recordings in the IED will
appear, in the master points of view (even if they already where stored in the IED).
To be able to report 40 analog channels from the IED using IEC 60870-5-103 the
first 8 channels are placed in the public range and the next 32 are placed in the
private range. To comply the standard the first 8 must be configured according to
table 521.
Table 521: Configuration of analog channels

Signal Disturbance recorder
IL1 A1RADR INPUT1
IL2 A1RADR INPUT2
IL3 A1RADR INPUT3
IN A1RADR INPUT4
UL1 A1RADR INPUT5
UL2 A1RADR INPUT6
UL3 A1RADR INPUT7
UN A1RADR INPUT8
784
Monitoring
The binary signals connected to BxRBDR are reported by polling. The function
blocks include function type and information number.

The Disturbance recorder has no function block of it’s own. It is included in the
DRPRDRE, AxRADR and BxRBDR block.

For signals see section, in Disturbance report, "Input and output signals".

For Setting parameters see section "Disturbance report DRPRDRE".

Function Value
Buffer capacity Maximum number of analog inputs 40
Maximum number of binary inputs 96
Maximum total recording time (3.4 s recording time and maximum number 340 seconds (100
of channels, typical value) recordings) at 50 Hz
280 seconds (80
recordings) at 60 Hz
785
786
Metering
Section 16 Metering
About this chapter

This chapter describes among others, Pulse counter logic which is a function used
to meter externally generated binary pulses. The way the functions work, their
setting parameters, function blocks, input and output signals, and technical data are
16.1 Pulse-counter logic PCGGIO

Pulse-counter logic PCGGIO -
S00947 V1 EN
16.1.1 Introduction
Pulse counter (PCGGIO) function counts externally generated binary pulses, for
instance pulses coming from an external energy meter, for calculation of energy
consumption values. The pulses are captured by the binary input module and then
read by the pulse counter function. A scaled service value is available over the
station bus. The special Binary input module with enhanced pulse counting
capabilities must be ordered to achieve this functionality.

The registration of pulses is done for positive transitions (0->1) on one of the 16
binary input channels located on the Binary Input Module (BIM). Pulse counter
values are sent to the station HMI with predefined cyclicity without reset.
The reporting time period can be set in the range from 1 second to 60 minutes and
is synchronized with absolute system time. Interrogation of additional pulse
counter values can be done with a command (intermediate reading) for a single
counter. All active counters can also be read by the LON General Interrogation
command (GI) or IEC 61850.
787
Metering
Pulse counter (PCGGIO) function in the IED supports unidirectional incremental

counters. That means only positive values are possible. The counter uses a 32 bit
format, that is, the reported value is a 32-bit, signed integer with a range
0...+2147483647. The counter is reset at initialization of the IED.
The reported value to station HMI over the station bus contains Identity, Scaled
Value (pulse count x scale), Time, and Pulse Counter Quality. The Pulse Counter
Quality consists of:
• Invalid (board hardware error or configuration error)

• Wrapped around
• Blocked
• Adjusted
The transmission of the counter value by SPA can be done as a service value, that
is, the value frozen in the last integration cycle is read by the station HMI from the
database. PCGGIO updates the value in the database when an integration cycle is
finished and activates the NEW_VAL signal in the function block. This signal can
be connected to an Event function block, be time tagged, and transmitted to the
station HMI. This time corresponds to the time when the value was frozen by the
function.
The pulse counter function requires a binary input card, BIMp, that
is specially adapted to the pulse counter function.
Figure 420 shows the pulse counter function block with connections of the inputs
and outputs.
SingleCmdFunc PulseCounter EVENT

OUTx BLOCK
INVALID INPUT1
SingleCmdFunc Pulse RESTART INPUT2
OUTx INPUT OUT READ_VAL
Pulse length >1s BLOCKED INPUT3
I/O-module NEW_VAL INPUT4
BI_PULSE
”Reset counter” RS_CNT
NAME
SCAL_VAL IEC EVENT
SMS settings Database

1.Operation = Off/On Pulse counter value:
2.tReporting = 0s...60min 0...2147483647
3.Event Mask = No Events/Report Events
4.Scale = 1-90000
en05000744.vsd
IEC05000744 V1 EN
Figure 420: Overview of the pulse counter function
788
Metering
The BLOCK and READ_VAL inputs can be connected to Single Command

blocks, which are intended to be controlled either from the station HMI or/and the
local HMI. As long as the BLOCK signal is set, the pulse counter is blocked. The
signal connected to READ_VAL performs one additional reading per positive
flank. The signal must be a pulse with a length >1 second.
The BI_PULSE input is connected to the used input of the function block for the
Binary Input Module (BIM).
The NAME input is used for a user-defined name with up to 13 characters.
The RS_CNT input is used for resetting the counter.
Each pulse counter function block has four binary output signals that can be
connected to an Event function block for event recording: INVALID, RESTART,
BLOCKED and NEW_VAL. The SCAL_VAL signal can be connected to the IEC
Event function block.
The INVALID signal is a steady signal and is set if the Binary Input Module,
where the pulse counter input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not
comprise a complete integration cycle. That is, in the first message after IED start-
up, in the first message after deblocking, and after the counter has wrapped around
during last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked.
There are two reasons why the counter is blocked:
• The BLOCK input is set, or

• The Binary Input Module, where the counter input is situated, is inoperative.
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was
updated since last report.
The SCAL_VAL signal consists of scaled value (according to parameter Scale),

time and status information.

PCGGIO
BLOCK INVALID
READ_VAL RESTART
BI_PULSE* BLOCKED
RS_CNT NEW_VAL
SCAL_VAL
IEC05000709 V3 EN
Figure 421: PCGGIO function block
789
Metering

Table 523: PCGGIO Input signals
READ_VAL BOOLEAN 0 Initiates an additional pulse counter reading
BI_PULSE BOOLEAN 0 Connect binary input channel for metering
RS_CNT BOOLEAN 0 Resets pulse counter value
Table 524: PCGGIO Output signals

INVALID BOOLEAN The pulse counter value is invalid
RESTART BOOLEAN The reported value does not comprise a complete
integration cycle
BLOCKED BOOLEAN The pulse counter function is blocked
NEW_VAL BOOLEAN A new pulse counter value is generated
SCAL_VAL REAL Scaled value with time and status information

Table 525: PCGGIO Non group settings (basic)
On
EventMask NoEvents - - NoEvents Report mask for analog events from
ReportEvents pulse counter
CountCriteria Off - - RisingEdge Pulse counter criteria
RisingEdge
Falling edge
OnChange
Scale 1.000 - 90000.000 - 0.001 1.000 Scaling value for SCAL_VAL output to
unit per counted value
Quantity Count - - Count Measured quantity for SCAL_VAL output
ActivePower
ApparentPower
ReactivePower
ActiveEnergy
ApparentEnergy
ReactiveEnergy
tReporting 0 - 3600 s 1 60 Cycle time for reporting of counter value
790
Metering

Table 526: PCGGIO technical data
Function Setting range Accuracy
Input frequency See Binary Input Module (BIM) -
Cycle time for report of (1–3600) s -
counter value
16.2 Function for energy calculation and demand

handling ETPMMTR

Energy calculation and demand ETPMMTR - -
handling
16.2.1 Introduction
Outputs from Measurements (CVMMXU) function can be used to calculate
energy. Active as well as reactive values are calculated in import and export
direction. Values can be read or generated as pulses. Maximum demand power
values are also calculated by the function.

The instantaneous output values of active and reactive power from the
Measurements (CVMMXU) function block are used and integrated over a selected
time tEnergy to measure the integrated energy. The energy values (in MWh and
MVarh) are available as output signals and also as pulsed output which can be
connected to a pulse counter. Outputs are available for forward as well as reverse
direction. The accumulated energy values can be reset from the local HMI reset
menu or with input signal RSTACC.
The maximum demand values for active and reactive power are calculated for the
set time tEnergy and the maximum value is stored in a register available over
communication and from outputs MAXPAFD, MAXPARD, MAXPRFD,
MAXPRRD for the active and reactive power forward and reverse direction until
reset with input signal RSTDMD or from the local HMI reset menu.
791
Metering
CVMMXU ETPMMTR
PINST P
QINST Q
STACC
TRUE
RSTACC
FALSE
RSTDMD
FALSE
IEC07000121 V2 EN
Figure 422: Connection of Energy calculation and demand handling function

(ETPMMTR) to the Measurements function (CVMMXU)

ETPMMTR
P ACCST
Q EAFPULSE
STACC EARPULSE
RSTACC ERFPULSE
RSTDMD ERRPULSE
EAFALM
EARALM
ERFALM
ERRALM
EAFACC
EARACC
ERFACC
ERRACC
MAXPAFD
MAXPARD
MAXPRFD
MAXPRRD
IEC07000120 V2 EN
Figure 423: ETPMMTR function block

Table 527: ETPMMTR Input signals
P REAL 0 Measured active power
Q REAL 0 Measured reactive power
STACC BOOLEAN 0 Start to accumulate energy values
RSTACC BOOLEAN 0 Reset of accumulated enery reading
RSTDMD BOOLEAN 0 Reset of maximum demand reading
Table 528: ETPMMTR Output signals

ACCST BOOLEAN Start of accumulating energy values.
EAFPULSE BOOLEAN Accumulated forward active energy pulse
EARPULSE BOOLEAN Accumulated reverse active energy pulse
792
Metering

ERFPULSE BOOLEAN Accumulated forward reactive energy pulse
ERRPULSE BOOLEAN Accumulated reverse reactive energy pulse
EAFALM BOOLEAN Alarm for active forward energy exceed limit in
set interval
EARALM BOOLEAN Alarm for active reverse energy exceed limit in
set interval
ERFALM BOOLEAN Alarm for reactive forward energy exceed limit in
set interval
ERRALM BOOLEAN Alarm for reactive reverse energy exceed limit in
set interval
EAFACC REAL Accumulated forward active energy value in Ws
EARACC REAL Accumulated reverse active energy value in Ws
ERFACC REAL Accumulated forward reactive energy value in
VArS
ERRACC REAL Accumulated reverse reactive energy value in
VArS
MAXPAFD REAL Maximum forward active power demand value for
set interval
MAXPARD REAL Maximum reverse active power demand value for
set interval
MAXPRFD REAL Maximum forward reactive power demand value
for set interval
MAXPRRD REAL Maximum reactive power demand value in
reverse direction

Table 529: ETPMMTR Non group settings (basic)
On
StartAcc Off - - Off Activate the accumulation of energy
On values
tEnergy 1 Minute - - 1 Minute Time interval for energy calculation
5 Minutes
10 Minutes
15 Minutes
30 Minutes
60 Minutes
180 Minutes
tEnergyOnPls 0.000 - 60.000 s 0.001 1.000 Energy accumulated pulse ON time in
secs
tEnergyOffPls 0.000 - 60.000 s 0.001 0.500 Energy accumulated pulse OFF time in
secs
EAFAccPlsQty 0.001 - 10000.000 MWh 0.001 100.000 Pulse quantity for active forward
accumulated energy value
793
Metering

EARAccPlsQty 0.001 - 10000.000 MWh 0.001 100.000 Pulse quantity for active reverse
ERFAccPlsQty 0.001 - 10000.000 MVArh 0.001 100.000 Pulse quantity for reactive forward
ERVAccPlsQty 0.001 - 10000.000 MVArh 0.001 100.000 Pulse quantity for reactive reverse
Table 530: ETPMMTR Non group settings (advanced)

EALim 0.001 - MWh 0.001 1000000.000 Active energy limit
10000000000.000
ERLim 0.001 - MVArh 0.001 1000.000 Reactive energy limit
10000000000.000
DirEnergyAct Forward - - Forward Direction of active energy flow Forward/
Reverse Reverse
DirEnergyReac Forward - - Forward Direction of reactive energy flow Forward/
Reverse Reverse
EnZeroClamp Off - - On Enable of zero point clamping detection
On function
LevZeroClampP 0.001 - 10000.000 MW 0.001 10.000 Zero point clamping level at active Power
LevZeroClampQ 0.001 - 10000.000 MVAr 0.001 10.000 Zero point clamping level at reactive
Power
EAFPrestVal 0.000 - 10000.000 MWh 0.001 0.000 Preset Initial value for forward active
energy
EARPrestVal 0.000 - 10000.000 MWh 0.001 0.000 Preset Initial value for reverse active
energy
ERFPresetVal 0.000 - 10000.000 MVArh 0.001 0.000 Preset Initial value for forward reactive
energy
ERVPresetVal 0.000 - 10000.000 MVArh 0.001 0.000 Preset Initial value for reverse reactive
energy
794
Station communication
Section 17 Station communication
About this chapter

This chapter describes the functions and protocols used on the interfaces to the
substation automation and substation monitoring buses. The way these work, their
setting parameters, function blocks, input and output signals and technical data are
17.1 Overview
Each IED is provided with a communication interface, enabling it to connect to one

or many substation level systems or equipment, either on the Substation
Automation (SA) bus or Substation Monitoring (SM) bus.
Following communication protocols are available:
• IEC 61850-8-1 communication protocol

• IEC 61850-9-2LE communication protocol
• LON communication protocol
• SPA or IEC 60870-5-103 communication protocol
• DNP3.0 communication protocol
Theoretically, several protocols can be combined in the same IED.
17.2 IEC 61850-8-1 communication protocol
17.2.1 Introduction
The IED is equipped with single or double optical Ethernet rear ports (order
dependent) for IEC 61850-8-1 station bus communication. IEC 61850-8-1
communication is also possible from the optical Ethernet front port. IEC 61850-8-1
protocol allows intelligent electrical devices (IEDs) from different vendors to
exchange information and simplifies system engineering. Peer-to-peer
communication according to GOOSE is part of the standard. Disturbance files
uploading is provided.
17.2.2 IEC 61850 generic communication I/O functions SPGGIO,

SP16GGIO
795
IEC61850 generic communication I/O functions (SPGGIO) is used to send one

single logical signal to other systems or equipment in the substation.
Upon receiving a signal at its input, IEC61850 generic communication I/O

functions (SPGGIO) function sends the signal over IEC 61850-8-1 to the
equipment or system that requests this signal. To get the signal, PCM600 must be
used to define which function block in which equipment or system should receive
this information.

SPGGIO
BLOCK
ÎN
IEC07000124 V2 EN
Figure 424: SPGGIO function block
SP16GGIO
BLOCK
ÎN1
ÎN2
ÎN3
ÎN4
ÎN5
ÎN6
ÎN7
ÎN8
ÎN9
ÎN10
ÎN11
ÎN12
ÎN13
ÎN14
ÎN15
ÎN16
IEC07000125 V2 EN
Figure 425: SP16GGIO function block

Table 531: SPGGIO Input signals
IN BOOLEAN 0 Input status
796
Table 532: SP16GGIO Input signals

IN1 BOOLEAN 0 Input 1 status
17.2.3 IEC 61850 generic communication I/O functions MVGGIO
IEC61850 generic communication I/O functions (MVGGIO) function is used to

send the instantaneous value of an analog output to other systems or equipment in
the substation. It can also be used inside the same IED, to attach a RANGE aspect
to an analog value and to permit measurement supervision on that value.
Upon receiving an analog signal at its input, IEC61850 generic communication I/O
functions (MVGGIO) will give the instantaneous value of the signal and the range,
as output values. In the same time, it will send over IEC 61850-8-1 the value, to
other IEC 61850 clients in the substation.
797

MVGGIO
BLOCK ^VALUE
ÎN RANGE
IEC05000408 V2 EN
Figure 426: MVGGIO function block

Table 533: MVGGIO Input signals
IN REAL 0 Analogue input value
Table 534: MVGGIO Output signals

VALUE REAL Magnitude of deadband value
RANGE INTEGER Range

Table 535: MVGGIO Non group settings (basic)
MV db 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of
MV zeroDb 0 - 100000 m% 1 500 Zero point clamping in 0,001% of range
MV hhLim -10000000000.000 - 0.001 90.000 High High limit
- 10000000000.000
MV hLim -10000000000.000 - 0.001 80.000 High limit
- 10000000000.000
MV lLim -10000000000.000 - 0.001 -80.000 Low limit
- 10000000000.000
MV llLim -10000000000.000 - 0.001 -90.000 Low Low limit
- 10000000000.000
MV min -10000000000.000 - 0.001 -100.000 Minimum value
- 10000000000.000
MV max -10000000000.000 - 0.001 100.000 Maximum value
- 10000000000.000
MV dbType Cyclic - - Dead band Reporting type
Dead band
Int deadband
MV limHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
798

Table 536: IEC61850-8-1 Non group settings (basic)
On
GOOSE Front - - OEM311_AB Port for GOOSE communication
OEM311_AB
OEM311_CD

Table 537: IEC 61850-8-1 communication protocol
Function Value
Protocol IEC 61850-8-1
Communication speed for the IEDs 100BASE-FX
17.3 IEC 61850-9-2LE communication protocol
17.3.1 Introduction
The IEC 61850-9-2LE process bus communication protocol enables an IED to
communicate with devices providing measured values in digital format, commonly
known as Merging Units (MU). The physical interface in the IED that is used for
the communication is the OEM modules (the two port module version) "CD" port.

The ABB merging units (MUs) are situated close to primary equipment, like circuit
breakers, isolators, etc. The MUs have the capability to gather measured values
from measuring transformers, non-conventional transducers or both. The gathered
data are then transmitted to subscribers over the process bus, utilizing the IEC
61850-9-2LE protocol.
ABB "physical MU" contains up to 3 logical MUs, each capable of sampling 4

currents and 4 voltages.
The IED communicates with the MUs over the process bus via the OEM module
port "CD". For the user, the MU appears in the IED as a normal analogue input
module and is engineered in the very same way.
799
IED
Application
Station Wide
Preprocessing blocks Preprocessing blocks GPS Clock
SMAI SMAI
MU1 MU2
Splitter
Electrical-to-
Optical Converter
1PPS
TRM module OEM Module
CD
110 V 1A 1A
IEC61850-9-2LE
Ethernet Switch
IEC61850-9-2LE
IEC61850-9-2LE
ABB ABB
1PPS 1PPS
Merging Merging
Unit Unit
Combi Combi
CT CT
Sensor Sensor
Conventional VT
en08000072-2.vsd
IEC08000072 V2 EN
Figure 427: Example of signal path for sampled analogue values from MU and
conventional CT/VT
The function has the following alarm signals:
800
• MUDATA: Indicates when sample sequence needs to be realigned. that is the

application soon needs to be restarted. The signal is raised to 2 s before the
application is restarted.
• SYNCH: Indicates that the time quality of the hardware is out of the set value
from parameter synchAccLevel (1 μs, 4 μs or unspecified) and the parameter
AppSynch is set to Synch. In case of AppSynch is set to NoSynch the SYNCH
output will never go high.
• SMPLLOST: Indicates that more than one sample has been lost/been marked
invalid/ overflow/ been marked failed, and the sample has thereafter been
substituted. When SMPLLOST is high, protection is blocked.
• MUSYNCH: Indicates that the MU connected is not synchronized. Received
from quality flag in datastream. No IED setting affects this signal.
• TESTMODE: Indicates that the MU connected is in TestMode. Received from
quality flag in datastream. No IED setting affects this signal.
Timeout
TSYNCERR Indicates that there is some timeout on any configured time source or
the time quality is worse than specified in SynchAccLevel. The timeout is
individually specified per time source (PPS, IRIG-B, SNTP etc.) See section
"Time synchronization"
Blocking condition
Blocking of protection functions is indicated by (SAMPLOST is high) or

(MUSYNCH is high and AppSynch is set to Synch) or (SYNCH is high)
Application synch is not required for differential protection based on ECHO mode.
A missing PPS however will lead to a drift between MU and IED. Therefore
protection functions in this case will be blocked.
The function blocks are not represented in the configuration tool.

The signals appear only in the SMT tool when merging units (MU)
are included in the configuration with the function selector tool. In
the SMT tool they can be mapped to the desired virtual input
(SMAI) of the IED and used internally in the configuration.
801

Table 538: MU_4I_4U Output signals
I1 STRING Analogue input I1
U1 STRING Analogue input U1
MUDATA BOOLEAN Fatal error, serious data loss
SYNCH BOOLEAN Protection functions block due to loss of internal
time synchronisation in IED
SMPLLOST BOOLEAN Sample lost
MUSYNCH BOOLEAN Synchronization lost in MU
TESTMODE BOOLEAN MU in test mode

Table 539: MU_4I_4U Non group settings (basic)
SVId 0 - 40 - 1 ABB_MU0101 MU identifier
SmplGrp 0 - 65535 - 1 0 Sampling group
Table 540: MU_4I_4U Non group settings (advanced)

SynchMode NoSynch - - Init Synchronization mode
Init
Operation
802

Table 541: IEC 61850-9-2LE communication protocol
Functions Value
Protocol IEC 61850-9-2LE
Communication speed for the IEDs 100BASE-FX
17.4 LON communication protocol
17.4.1 Introduction
An optical network can be used within the substation automation system. This
enables communication with the IED through the LON bus from the operator’s
workplace, from the control center and also from other terminals.
LON communication protocol is specified in LonTalkProtocol Specification

Version 3 from Echelon Corporation and is designed for communication in control
networks. These networks are characterized by high speed for data transfer, short
messages (few bytes), peer-to-peer communication, multiple communication
media, low maintenance, multivendor equipment, and low support costs. LonTalk
supports the needs of applications that cover a range of requirements. The protocol
follows the reference model for open system interconnection (OSI) designed by the
International Standardization Organization (ISO).
In this document the most common addresses for commands and events are
available. For other addresses, refer to section "Related documents".
It is assumed that the reader is familiar with LON communication protocol in general.

The speed of the network depends on the medium and transceiver design. With
protection and control devices, fibre optic media is used, which enables the use of
the maximum speed of 1.25 Mbits/s. The protocol is a peer-to-peer protocol where
all the devices connected to the network can communicate with each other. The
own subnet and node number are identifying the nodes (max. 255 subnets, 127
nodes per one subnet).
The LON bus links the different parts of the protection and control system. The
measured values, status information, and event information are spontaneously sent
to the higher-level devices. The higher-level devices can read and write memorized
values, setting values, and other parameter data when required. The LON bus also
enables the bay level devices to communicate with each other to deliver, for
example, interlocking information among the terminals without the need of a bus
master.
803
The LonTalk protocol supports two types of application layer objects: network
variables and explicit messages. Network variables are used to deliver short
messages, such as measuring values, status information, and interlocking/blocking
signals. Explicit messages are used to transfer longer pieces of information, such as
events and explicit read and write messages to access device data.
The benefits achieved from using the LON bus in protection and control systems
include direct communication among all terminals in the system and support for
multi-master implementations. The LON bus also has an open concept, so that the
terminals can communicate with external devices using the same standard of
network variables.
Introduction of LON protocol

For more information, refer to LON bus, LonWorks Network in Protection and
Control, User’s manual and Technical description.
LON protocol
Configuration of LON
Lon Network Tool (LNT 505) is a multi-purpose tool for LonWorks network
configuration. All the functions required for setting up and configuring a
LonWorks network, is easily accessible on a single tool program. For more
information, refer to the operator's manual.
Activate LON Communication

Activate LON communication in the Parameter Setting tool under Main menu/
Communication/ SLM configuration/ Rear optical LON port/ Horizontal
communication, where Operation must be set to ON.
Add LON Device Types LNT

A new device is added to LON Network Tool from the Device menu or by
installing the device from the ABB LON Device Types package for LNT 505, with
the SLDT 670 series package version 1p2 r03.
LON net address

To establish a LON connection with the 670 series IEDs, the IED has to be given a
unique net address. The net address consists of a subnet and node number. This is
accomplished with the LON Network Tool by creating one device for each IED.
Vertical communication
Vertical communication describes communication between the monitoring devices
and protection and control IEDs. This communication includes sending of changed
process data to monitoring devices as events and transfer of commands, parameter
data and disturbance recorder files. This communication is implemented using
explicit messages.
Events and indications

Events sent to the monitoring devices are using explicit messages (message code
44H) with unacknowledged transport service of the LonTalk protocol. When a
804
signal is changed in the IED, one message with the value, quality and time is
transmitted from terminal.
Binary events
Binary events are generated in event function blocks EVENT:1 to EVENT:20 in
the 670 series IEDs. The event function blocks have predefined LON addresses.
table 542 shows the LON addresses to the first input on the event function blocks.
The addresses to the other inputs on the event function block are consecutive after
the first input. For example, input 15 on event block EVENT:17 has the address
1280 + 14 (15-1) = 1294.
For double indications only the first eight inputs 1–8 must be used. Inputs 9–16 can
be used for other type of events at the same event block.
As basic, three event function blocks EVENT:1 to EVENT:3 running with a fast
loop time (3 ms) is available in the 670 series IEDs. The remaining event function
blocks EVENT:4 to EVENT:9 runs with a loop time on 8 ms and EVENT:10 to
EVENT:20 runs with a loop time on 100 ms. The event blocks are used to send
binary signals, integers, real time values like analogue data from measuring
functions and mA input modules as well as pulse counter signals.
16 pulse counter value function blocks PCGGIO:1 to PCGGIO:16 and 24 mA input

service values function blocks SMMI1_In1 to 6 – SMMI4_In1 to 6 are available in
the 670 series IEDs.
The first LON address in every event function block is found in table 542
Table 542: LON adresses for Event functions

Function block First LON address in
function block
EVENT:1 1024
EVENT:2 1040
EVENT:3 1056
EVENT:4 1072
EVENT:5 1088
EVENT:6 1104
EVENT:7 1120
EVENT:8 1136
EVENT:9 1152
EVENT:10 1168
EVENT:11 1184
EVENT:12 1200
EVENT:13 1216
EVENT:14 1232
EVENT:15 1248
EVENT:16 1264
805
Function block First LON address in

function block
EVENT:17 1280
EVENT:18 1296
EVENT:19 1312
EVENT:20 1328
Event masks
The event mask for each input can be set individually from Parameter Setting Tool
(PST) under: Settings/ General Settings/ Monitoring / EventFunction as follows:
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
The following type of signals from application functions can be connected to the
event function block.
Single indication
Directly connected binary IO signal via binary input function block (SMBI) is
always reported on change, no changed detection is done in the event function
block. Other Boolean signals, for example a start or a trip signal from a protection
function is event masked in the event function block.
Double indications
Double indications can only be reported via switch-control (SCSWI) functions, the
event reporting is based on information from switch-control, no change detection is
done in the event function block.
Directly connected binary IO signal via binary input function block (SMBI) is not
possible to handle as double indication. Double indications can only be reported for
the first 8 inputs on an event function block.
• 00 generates an intermediate event with the read status 0

• 01 generates an open event with the read status 1
• 10 generates a close event with the read status 2
• 11 generates an undefined event with the read status 3
Analog value
All analog values are reported cyclic, the reporting interval is taken from the
connected function if there is a limit supervised signal, otherwise it is taken from
the event function block.
Command handling
806
Commands are transferred using transparent SPA-bus messages. The transparent

SPA-bus message is an explicit LON message, which contains an ASCII character
message following the coding rules of the SPA-bus protocol. The message is sent
using explicit messages with message code 41H and using acknowledged transport
service.
Both the SPA-bus command messages (R or W) and the reply messages (D, A or
N) are sent using the same message code. It is mandatory that one device sends out
only one SPA-bus message at a time to one node and waits for the reply before
sending the next message.
For commands from the operator workplace to the IED for apparatus control, That
is, the function blocks type SCSWI 1 to 32, SXCBR 1 to 18 and SXSWI 1 to 28;
the SPA addresses are according to table 543.
Horizontal communication
Network variables are used for communication between 500 series and 670 series
IEDs. The supported network variable type is SNVT_state (NV type 83).
SNVT_state is used to communicate the state of a set of 1 to 16 Boolean values.
Multiple command send function block (MULTICMDSND) is used to pack the

information to one value. This value is transmitted to the receiving node and
presented for the application by a multiple command function block
(MULTICMDRCV). At horizontal communication the input BOUND on the event
function block (MULTICMDSND) must be set to 1. There are 10
MULTICMDSND and 60 MULTICMDRCV function blocks available. The
MULTICMDSND and MULTICMDRCV function blocks are connected using Lon
Network Tool (LNT 505). This tool also defines the service and addressing on LON.
This is an overview for configuring the network variables for 670 series IEDs.
Configuration of LON network variables

Configure the Network variables according to the specific application using the
LON network Tool. For more information, refer to LNT 505 in Operation manual.
The following is an example of how to configure network variables concerning, for
example, interlocking between two IEDs.
807
LON
BAY E1 BAY E3 BAY E4

MULTICMDSND: 7 MULTICMDSND: 9 MULTICMDSND: 9
en05000718.vsd
IEC05000718 V2 EN
Figure 428: Examples connections between MULTICMDSND and

MULTICMDRCV function blocks in three IEDs
The network variable connections are done from the NV Connection window.
From LNT window select Connections/ NVConnections/ New.
en05000719.vsd
IEC05000719 V1 EN
Figure 429: The network variables window in LNT
There are two ways of downloading NV connections. Either the users can use the
drag-and-drop method where they can select all nodes in the device window, drag
them to the Download area in the bottom of the program window and drop them
808
there; or, they can perform it by selecting the traditional menu, Configuration/
Download.
en05000720.vsd
IEC05000720 V1 EN
Figure 430: The download configuration window in LNT
Communication ports
The serial communication module (SLM) is used for SPA or IEC60870-5-103 and
LON communication. This module is a mezzanine module, and can be placed on
the Main Processing Module (NUM). The serial communication module can have
connectors for two plastic fibre cables (snap-in) or two glass fibre cables (ST,
bayonet) or a combination of plastic and glass fibre. Three different types are
available depending on type of fibre. The incoming optical fibre is connected to the
RX receiver input, and the outgoing optical fibre to the TX transmitter output.
When the fibre optic cables are laid out, pay special attention to the instructions
concerning the handling and connection of the optical fibres. The module is
identified with a number on the label on the module.
Table 543: SPA addresses for commands from the operator workplace to the IED for apparatus
control
Name Function SPA Description
block address
BL_CMD SCSWI01 1 I 5115 SPA parameters for block
command
command
command
command
809

block address
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
810

block address
command
command
command
command
CANCEL SCSWI01 1 I 5107 SPA parameters for cancel
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
811

block address
command
command
command
command
command
command
command
command
command
command
command
command
SELECTOpen=00, SCSWI01 1 I 5105 SPA parameters for select (Open/
SELECTClose=01, Close) command
SELOpen+ILO=10, Note: Send select command
SELClose+ILO=11, before operate command
SELOpen+SCO=20,
SELClose+SCO=21,
SELOpen+ILO+SCO=30,
SELClose+ILO+SCO=31
SELECTClose=01, so on. Close) command
812

block address
813

block address
ExcOpen=00, SCSWI01 1 I 5106 SPA parameters for operate (Open/
ExcClose=01, Close) command
ExcOpen+ILO=10, Note: Send select command
ExcClose+ILO=11, before operate command
ExcOpen+SCO=20,
ExcClose+SCO=21,
ExcOpen+ILO+SCO=30,
ExcClose+ILO+SCO=31
ExcClose=01, so on. Close) command
814

block address
Sub Value SXCBR01 2 I 7854 SPA parameter for position to be
substituted
Note: Send the value before Enable
substituted
substituted
substituted
substituted
substituted
substituted
substituted
Sub Value SXCBR09 3I7 SPA parameter for position to be
substituted
substituted
substituted
substituted
substituted
substituted
815

block address
substituted
substituted
substituted
substituted
Sub Value SXSWI01 3 I 196 SPA parameter for position to be
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
816

block address
substituted
substituted
substituted
substituted
substituted
substituted
substituted
substituted
Sub Enable SXCBR01 2 I 7855 SPA parameter for substitute
enable command
Note: Send the Value before
Enable
enable command
enable command
enable command
enable command
enable command
enable command
enable command
Sub Enable SXCBR09 3I8 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
817

block address
enable command
enable command
enable command
Sub Enable SXSWI01 3 I 197 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
Sub Enable SXSWI11 3I 379 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
818

block address
enable command
enable command
enable command
enable command
enable command
enable command
enable command
Update Block SXCBR01 2 I 7853 SPA parameter for update block
command
command
command
command
command
command
command
command
Update Block SXCBR09 3I6 SPA parameter for update block
command
command
command
command
command
command
command
command
command
819

block address
command
Update Block SXSWI01 3 I 198 SPA parameter for update block
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
820

block address
command
command
command
command
command

Table 544: HORZCOMM Non group settings (basic)
Operation Off - - Off Operation
On
Table 545: ADE Non group settings (basic)

On
TimerClass Slow - - Slow Timer class
Normal
Fast

Table 546: LON communication protocol
Function Value
Protocol LON
Communication speed 1.25 Mbit/s
17.5 SPA communication protocol
17.5.1 Introduction
In this section the most common addresses for commands and events are available.
For other addresses, refer to section "Related documents".
821
It is assumed that the reader is familiar with the SPA communication protocol in
general.

The SPA bus uses an asynchronous serial communications protocol (1 start bit, 7
data bits + even parity, 1 stop bit) with data transfer rate up to 38400 bit/s. For
more information on recommended baud rate for each type of IED, refer to
Technical reference manual. Messages on the bus consist of ASCII characters.
Introduction of SPA protocol

The basic construction of the protocol assumes that the slave has no self-initiated
need to talk to the master but the master is aware of the data contained in the slaves
and, consequently, can request required data. In addition, the master can send data
to the slave. Requesting by the master can be performed either by sequenced
polling (for example, for event information) or only on demand.
The master requests slave information using request messages and sends
information to the slave in write messages. Furthermore, the master can send all
slaves in common a broadcast message containing time or other data. The inactive
state of bus transmit and receive lines is a logical "1".
SPA protocol
The tables below specify the SPA addresses for reading data from and writing data
to an IED with the SPA communication protocol implemented.
The SPA addresses for the mA input service values (MIM3 to MIM16) are found
in table 547.
Table 547: SPA addresses for the MIM function

Function block SPA address
MIM3-CH1 4-O-6508
MIM3-CH2 4-O-6511
MIM3-CH3 4-O-6512
MIM3-CH4 4-O-6515
MIM3-CH5 4-O-6516
MIM3-CH6 4-O-6519
MIM4-CH1 4-O-6527
MIM4-CH2 4-O-6530
MIM4-CH3 4-O-6531
MIM4-CH4 4-O-6534
MIM4-CH5 4-O-6535
MIM4-CH6 4-O-6538
MIM5-CH1 4-O-6546
MIM5-CH2 4-O-6549
822

MIM5-CH3 4-O-6550
MIM5-CH4 4-O-6553
MIM5-CH5 4-O-6554
MIM5-CH6 4-O-6557
MIM6-CH1 4-O-6565
MIM6-CH2 4-O-6568
MIM6-CH3 4-O-6569
MIM6-CH4 4-O-6572
MIM6-CH5 4-O-6573
MIM6-CH6 4-O-6576
MIM7-CH1 4-O-6584
MIM7-CH2 4-O-6587
MIM7-CH3 4-O-6588
MIM7-CH4 4-O-6591
MIM7-CH5 4-O-6592
MIM7-CH6 4-O-6595
MIM8-CH1 4-O-6603
MIM8-CH2 4-O-6606
MIM8-CH3 4-O-6607
MIM8-CH4 4-O-6610
MIM8-CH5 4-O-6611
MIM8-CH6 4-O-6614
MIM9-CH1 4-O-6622
MIM9-CH2 4-O-6625
MIM9-CH3 4-O-6626
MIM9-CH4 4-O-6629
MIM9-CH5 4-O-6630
MIM9-CH6 4-O-6633
MIM10-CH1 4-O-6641
MIM10-CH2 4-O-6644
MIM10-CH3 4-O-6645
MIM10-CH4 4-O-6648
MIM10-CH5 4-O-6649
MIM10-CH6 4-O-6652
MIM11-CH1 4-O-6660
MIM11-CH2 4-O-6663
MIM11-CH3 4-O-6664
MIM11-CH4 4-O-6667
MIM11-CH5 4-O-6668
823

MIM11-CH6 4-O-6671
MIM12-CH1 4-O-6679
MIM12-CH2 4-O-6682
MIM12-CH3 4-O-6683
MIM12-CH4 4-O-6686
MIM12-CH5 4-O-6687
MIM12-CH6 4-O-6690
MIM13-CH1 4-O-6698
MIM13-CH2 4-O-6701
MIM13-CH3 4-O-6702
MIM13-CH4 4-O-6705
MIM13-CH5 4-O-6706
MIM13-CH6 4-O-6709
MIM14-CH1 4-O-6717
MIM14-CH2 4-O-6720
MIM14-CH3 4-O-6721
MIM14-CH4 4-O-6724
MIM14-CH5 4-O-6725
MIM14-CH6 4-O-6728
MIM15-CH1 4-O-6736
MIM15-CH2 4-O-6739
MIM15-CH3 4-O-6740
MIM15-CH4 4-O-6743
MIM15-CH5 4-O-6744
MIM15-CH6 4-O-6747
MIM16-CH1 4-O-6755
MIM16-CH2 4-O-6758
MIM16-CH3 4-O-6759
MIM16-CH4 4-O-6762
MIM16-CH5 4-O-6763
MIM16-CH6 4-O-6766
The SPA addresses for the pulse counter values PCGGIO:1 to PCGGIO:16 are
found in table 548.
Table 548: SPA addresses for the PCGGIO function

Function block SPA address CNT_VAL SPA address NEW_VAL
PCGGIO:1 3-O-5834 3-O-5833
PCGGIO:2 3-O-5840 3-O-5839
PCGGIO:3 3-O-5846 3-O-5845
824
Function block SPA address CNT_VAL SPA address NEW_VAL

PCGGIO:4 3-O-5852 3-O-5851
PCGGIO:5 3-O-5858 3-O-5857
PCGGIO:6 3-O-5864 3-O-5863
PCGGIO:7 3-O-5870 3-O-5869
PCGGIO:8 3-O-5876 3-O-5875
PCGGIO:9 3-O-5882 3-O-5881
PCGGIO:10 3-O-5888 3-O-5887
PCGGIO:11 3-O-5894 3-O-5893
PCGGIO:12 3-O-5900 3-O-5899
PCGGIO:13 3-O-5906 3-O-5905
PCGGIO:14 3-O-5912 3-O-5911
PCGGIO:15 3-O-5918 3-O-5917
PCGGIO:16 3-O-5924 3-O-5923
I/O modules
To read binary inputs, the SPA-addresses for the outputs of the I/O-module
function block are used, that is, the addresses for BI1 – BI16. For SPA addresses,
refer to section "Related documents".
Single command, 16 signals

The IEDs can be provided with a function to receive signals either from a
substation automation system or from the local HMI. That receiving function block
has 16 outputs that can be used, for example, to control high voltage apparatuses in
switchyards. For local control functions, the local HMI can also be used.
Single command, 16 signals function consists of three function blocks;

SINGLECMD:1 to SINGLECMD:3 for 16 binary output signals each.
The signals can be individually controlled from the operator station, remote-control
gateway, or from the local HMI on the IED. For Single command, 16 signals
function block, SINGLECMD:1 to SINGLECMD:3, the address is for the first
output. The other outputs follow consecutively after the first one. For example,
output 7 on the SINGLECMD:2 function block has the 5O533 address.
The SPA addresses for Single command, 16 signals functions SINGLECMD:1 to

SINGLECMD:3 are found in table 549.
Table 549: SPA addresses for SINGLECMD function

Function block SPA address CMD Input SPA address CMD output
SINGLECMD1-Cmd1 4-S-4639 5-O-511
825
SINGLECMD1-Cmdt13 4-S-4651 5-O-523
SINGLECMD2-Cmdt3 4-S-4674 5-O-529
826
Figure 431 shows an application example of how the user can, in a simplified way,
connect the command function via the configuration logic circuit in a protection
IED for control of a circuit breaker.
A pulse via the binary outputs of the IED normally performs this type of command
control. The SPA addresses to control the outputs OUT1 – OUT16 in SINGLECMD:
1 are shown in table 549.
SINGLECMD PULSETIMER
BLOCK ÔUT1 INPUT OUT To output board, CLOSE
ÔUT2 #1.000 T
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7 AND PULSETIMER
ÔUT8 INPUT1 OUT INPUT OUT To output board, OPEN
INPUT2 NOUT T
ÔUT9 #1.000
INPUT3
ÔUT10
INPUT4N
ÔUT11
ÔUT12
ÔUT13
ÔUT14
ÔUT15
ÔUT16
SYNCH OK
IEC05000717 V2 EN
Figure 431: Application example showing a simplified logic diagram for control
of a circuit breaker
The MODE input defines if the output signals from SINGLECMD:1 is off, steady
or pulsed signals. This is set in Parameter Setting Tool (PST) under: Setting /
General Settings / Control / Commands / Single Command.
Event function
Event function is intended to send time-tagged events to the station level (for
example, operator workplace) over the station bus. The events are there presented
in an event list. The events can be created from both internal logical signals and
binary input channels. All the internal signals are time tagged in the main
processing module, while the binary input channels are time tagged directly on
each I/O module. The events are produced according to the set event masks. The
event masks are treated commonly for both the LON and SPA channels. All events
according to the event mask are stored in a buffer, which contains up to 1000
events. If new events appear before the oldest event in the buffer is read, the oldest
event is overwritten and an overflow alarm appears.
827
Two special signals for event registration purposes are available in the IED,
Terminal Restarted (0E50) and Event buffer overflow (0E51).
The input parameters can be set individually from the Parameter Setting Tool
(PST) under: Setting / General Setting / Monitoring / Event Function as follows:
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
The Status and event codes for the Event functions are found in table 550.
Table 550: Status and event codes
Single indication1) Double indication

Event block Status Set event Reset Intermedi Closed 10 Open 01 Undefined
event ate 00 11
EVENT:1
Input 1 22O1 22E33 22E32 22E0 22E1 22E2 22E3
Input 2 22O2 22E35 22E34 22E4 22E5 22E6 22E7
Input 3 22O3 22E37 22E36 22E8 22E9 22E10 22E11
Input 4 22O4 22E39 22E38 22E12 22E13 22E14 22E15
Input 5 22O5 22E41 22E40 22E16 22E17 22E18 22E19
Input 6 22O6 22E43 22E42 22E20 22E21 22E22 22E23
Input 7 22O7 22E45 22E44 22E24 22E25 22E26 22E27
Input 8 22O8 22E47 22E46 22E28 22E29 22E30 22E31
Input 9 22O9 22E49 22E48 - - - -
Input 10 22O10 22E51 22E50 - - - -
Input 11 22O11 22E53 22E52 - - - -
Input 12 22O12 22E55 22E54 - - - -
Input 13 22O13 22E57 22E56 - - - -
Input 14 22O14 22E59 22E58 - - - -
Input 15 22O15 22E61 22E60 - - - -
Input 16 22O16 22E63 22E62 - - - -
EVENT:2 230.. 23E.. 23E.. 23E.. 23E.. 23E.. 23E..

EVENT:3 240.. 24E.. 24E.. 24E.. 23E.. 24E.. 24E..
- - - - - - - -
- - - - - - - -
- - - - - - - -
EVENT:20 410.. 41E.. 41E.. 41E.. 41E.. 41E.. 41E..
These values are only applicable if the Event mask is masked ≠ OFF.
Connection of signals as events

Signals coming from different protection and control functions and must be sent as
events to the station level over the SPA-bus (or LON-bus) are connected to the
Event function block according to figure 432.
828
EVENT
Block BLOCK
ILRANG ÎNPUT1
PSTO ÎNPUT2
UL12RANG ÎNPUT3
UL23RANG ÎNPUT4
UL31RANG ÎNPUT5
3I0RANG ÎNPUT6
3U0RANG ÎNPUT7
FALSE ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
IEC07000065 V2 EN
Figure 432: Connection of protection signals for event handling
17.5.2.1 Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and
the Analog/Digital conversion module (ADM). The serial communication module
can have connectors for two plastic fibre cables (snap-in) or two glass fibre cables
(ST, bayonet) or a combination of plastic and glass fibre. Three different types are
available depending on type of fibre.
The incoming optical fibre is connected to the RX receiver input, and the outgoing
optical fibre to the TX transmitter output. When the fibre optic cables are laid out,
pay special attention to the instructions concerning the handling and connection of
the optical fibres. The module is identified with a number on the label on the module.
The procedure to set the transfer rate and slave number can be found in the
Installation and commissioning manual for respective IEDs.
17.5.3 Design
When communicating locally with a computer (PC) in the station, using the rear
SPA port, the only hardware needed for a station monitoring system is:
• Optical fibres
• Opto/electrical converter for the PC
• PC
When communicating remotely with a PC using the rear SPA port, the same
hardware and telephone modems are needed.
The software needed in the PC, either local or remote, is PCM600.
When communicating between the local HMI and a PC, the only hardware required
is a front-connection cable.
829

Table 551: SPA Non group settings (basic)
BaudRate 300 Bd - - 9600 Bd Baudrate on serial line
1200 Bd
4800 Bd
9600 Bd
19200 Bd
38400 Bd
Table 552: LONSPA Non group settings (basic)

On

Table 553: SPA communication protocol
Function Value
Protocol SPA
Communication speed 300, 1200, 2400, 4800, 9600, 19200 or 38400
Bd
Slave number 1 to 899
17.6 IEC 60870-5-103 communication protocol
17.6.1 Introduction
IEC 60870-5-103 communication protocol is mainly used when a protection IED
communicates with a third party control or monitoring system. This system must
have software that can interpret the IEC 60870-5-103 communication messages.
17.6.2.1 General
IEC 60870-5-103 is an unbalanced (master-slave) protocol for coded-bit serial

communication exchanging information with a control system, and with a data
transfer rate up to 38400 bit/s. In IEC terminology, a primary station is a master
and a secondary station is a slave. The communication is based on a point-to-point
830
principle. The master must have software that can interpret IEC 60870-5-103
communication messages.
Introduction to IEC 60870–5–103 protocol

IEC 60870-5-103 protocol functionality consists of the following functions:
• Event handling
• Report of analog service values (measurements)
• Fault location
• Command handling
• Autorecloser ON/OFF
• Teleprotection ON/OFF
• Protection ON/OFF
• LED reset
• Characteristics 1 - 4 (Setting groups)
• File transfer (disturbance files)
• Time synchronization
For detailed information about IEC 60870-5-103, refer to the IEC 60870 standard
part 5: Transmission protocols, and to the section 103: Companion standard for the
informative interface of protection equipment.
IEC 60870-5-103
The tables in the following sections specify the information types supported by the
IEDs with the communication protocol IEC 60870-5-103 implemented.
To support the information, corresponding functions must be included in the

protection and control IED.
Commands in control direction

Commands in control direction, I103IEDCMD
Command block in control direction with defined output signals.
Number of instances: 1
Command block use PARAMETER as FUNCTION TYPE.
INFORMATION NUMBER is defined for each output signals.

Info. no Message Supported
19 LED Reset Yes
23 Activate setting group 1 Yes
Function commands in control direction, pre-defined I103CMD
831
Function command block in control direction with defined output signals.
FUNCTION TYPE parameter for each block.
INFORMATION NUMBER is defined for each output signals.

Info. no. Message Supported
16 Auto-recloser on/off Yes
17 Teleprotection on/off Yes
18 Protection on/off Yes
Function commands in control direction, user-defined, I103UserCMD

Function command blocks in control direction with user-defined output signals.
FUNCTION TYPE parameter for each block in private range. Default values are
defined in private range 1 - 4. One for each instance.
INFORMATION NUMBER is required for each output signal. Default values are 1
- 8.
1 Output signal 01 Yes
Status
Terminal status indications in monitor direction, I103IED
Indication block for status in monitor direction with defined IED functions.
Indication block use PARAMETER as FUNCTION TYPE.
INFORMATION NUMBER is defined for each input signals.
832

19 LED reset Yes
23 Setting group 1 active Yes
21 Test mode active Yes
Function status indications in monitor direction, user-defined, I103UserDef

Function indication blocks in monitor direction with user-defined input signals.
defined in private range 5 - 24. One for each instance.
INFORMATION NUMBER is required for each input signal. Default values are
defined in range 1 - 8.
1 Input signal 01 Yes
Supervision indications in monitor direction, I103Superv

Indication block for supervision in monitor direction with defined functions.
INFORMATION NUMBER is defined for output signals.

32 Measurand supervision I Yes
33 Measurand supervision U Yes
37 I>>back-up operation Yes
38 VT fuse failure Yes
46 Group warning Yes
47 Group alarm Yes
833
Earth fault indications in monitor direction, I103EF

Indication block for earth fault in monitor direction with defined functions.
INFORMATION NUMBER is defined for each output signal.

51 Earth fault forward Yes
52 Earth fault reverse Yes
Fault indications in monitor direction, type 1, I103FltDis

Fault indication block for faults in monitor direction with defined functions.
The instance type is suitable for distance protection function.
INFORMATION NUMBER is defined for each input signal.
64 Start L1 Yes
65 Start L2 Yes
66 Start L3 Yes
67 Start IN Yes
84 General start Yes
69 Trip L1 Yes
70 Trip L2 Yes
71 Trip L3 Yes
68 General trip Yes
74 Fault forward/line Yes
75 Fault reverse/busbar Yes
78 Zone 1 Yes
79 Zone 2 Yes
80 Zone 3 Yes
81 Zone 4 Yes
82 Zone 5 Yes
76 Signal transmitted Yes
77 Signal received Yes
73 SCL, Fault location in ohm Yes
834
Fault indications in monitor direction, type 2, I103FltStd

Fault indication block for faults in monitor direction with defined functions.
The instance type is suitable for line differential, transformer differential,

overcurrent and earth fault protection functions.
FUNCTION TYPE setting for each block.
INFORMATION NUMBER is defined for each input signal.
64 Start L1 Yes
65 Start L2 Yes
66 Start L3 Yes
67 Start IN Yes
84 General start Yes
69 Trip L1 Yes
70 Trip L2 Yes
71 Trip L3 Yes
68 General trip Yes
74 Fault forward/line Yes
75 Fault reverse/busbar Yes
85 Breaker failure Yes
86 Trip measuring system L1 Yes
89 Trip measuring system N Yes
90 Over current trip I> Yes
91 Over current trip I>> Yes
92 Earth fault trip IN> Yes
93 Earth fault trip IN>> Yes
Autorecloser indications in monitor direction, I103AR

Indication block for autorecloser in monitor direction with defined functions.
INFORMATION NUMBER is defined for each output signal.
835

16 Autorecloser active Yes
128 CB on by Autorecloser Yes
130 Autorecloser blocked Yes
Measurands
Function blocks in monitor direction for input measurands. Typically connected to
monitoring function, for example to power measurement .
Measurands in public range, I103Meas

The IED reports all valid measuring types depending on connected signals.
Upper limit for measured currents, active/reactive-power is 2.4 times rated value.
Upper limit for measured voltages and frequency is 1.2 times rated value.
148 IL1 Yes
144, 145, IL2 Yes
148
148 IL3 Yes
147 IN, Neutral current Yes
148 UL1 Yes
148 UL2 Yes
148 UL3 Yes
145, 146 UL1-UL2 Yes
147 UN, Neutral voltage Yes
146, 148 P, active power Yes
146, 148 Q, reactive power Yes
148 f, frequency Yes
Measurands in private range, I103MeasUsr

defined in private range 25 – 27. One for each instance.
INFORMATION NUMBER parameter for each block. Default value 1.

- Meas1 Yes
- Meas2 Yes
- Meas3 Yes
836

- Meas4 Yes
- Meas5 Yes
- Meas6 Yes
- Meas7 Yes
- Meas8 Yes
- Meas9 Yes
Disturbance recordings
The following elements are used in the ASDUs (Application Service Data Units)
defined in the standard.
Analog signals, 40-channels: the channel number for each channel has to be
specified. Channels used in the public range are 1 to 8 and with:
• IL1 connected to channel 1 on disturbance function block A1RADR

• IN connected to channel 4 on disturbance function block A1RADR
• VL1E connected to channel 5 on disturbance function block A1RADR
• VEN connected to channel 8 on disturbance function block A1RADR
Channel number used for the remaining 32 analog signals are numbers in the
private range 64 to 95.
Binary signals, 96-channels: for each channel the user can specify a FUNCTION
TYPE and an INFORMATION NUMBER.
Disturbance upload
All analog and binary signals that are recorded with disturbance recorder can be
reported to the master. The last eight disturbances that are recorded are available
for transfer to the master. A successfully transferred disturbance (acknowledged by
the master) will not be reported to the master again.
When a new disturbance is recorded by the IED a list of available recorded

disturbances will be sent to the master, an updated list of available disturbances can
be sent whenever something has happened to disturbances in this list. For example,
when a disturbance is deteceted (by other client, for example, SPA) or when a new
disturbance has been recorded or when the master has uploaded a disturbance.
Deviations from the standard
837
Information sent in the disturbance upload is specified by the standard; however,

some of the information are adapted to information available in disturbance
recorder in 670 series.
This section describes all data that is not exactly as specified in the standard.
ASDU23
In ‘list of recorded disturbances’ (ASDU23) an information element named SOF

(status of fault) exists. This information element consists of 4 bits and indicates
whether:
• Bit TP: the protection equipment has tripped during the fault
• Bit TM: the disturbance data are currently being transmitted
• Bit TEST: the disturbance data have been recorded during normal operation or
test mode.
• Bit OTEV: the disturbance data recording has been initiated by another event
than start
The only information that is easily available is test-mode status. The other
information is always set (hard coded) to:
TP Recorded fault with trip. [1]

TM Disturbance data waiting for transmission [0]
OTEV Disturbance data initiated by other events [1]
Another information element in ASDU23 is the FAN (fault number). According to

the standard this is a number that is incremented when a protection function takes
action. In 670 series FAN is equal to disturbance number, which is incremented for
each disturbance.
ASDU26
When a disturbance has been selected by the master; (by sending ASDU24), the
protection equipment answers by sending ASDU26, which contains an information
element named NOF (number of grid faults). This number must indicate fault
number in the power system,that is, a fault in the power system with several trip
and auto-reclosing has the same NOF (while the FAN must be incremented). NOF
is in 670 series, just as FAN, equal to disturbance number.
To get INF and FUN for the recorded binary signals there are parameters on the
disturbance recorder for each input. The user must set these parameters to whatever
he connects to the corresponding input.
838
Interoperability, physical layer

Supported
Electrical Interface
EIA RS-485 No
number of loads No
Optical interface
glass fibre Yes
plastic fibre Yes
Transmission speed
96000 bit/s Yes
19200 bit/s Yes
Link Layer
DFC-bit used Yes
Connectors
connector F-SMA No
connector BFOC/2.5 Yes
Interoperability, application layer

Supported
Selection of standard ASDUs in monitoring direction
ASDU Yes
1 Time-tagged message Yes
2 Time-tagged message with rel. time Yes
3 Measurands I Yes
4 Time-tagged message with rel. time Yes
5 Identification Yes
6 Time synchronization Yes
8 End of general interrogation Yes
9 Measurands II Yes
10 Generic data No
11 Generic identification No
23 List of recorded disturbances Yes
26 Ready for transm. of disturbance data Yes
27 Ready for transm. of a channel Yes
28 Ready for transm of tags Yes
29 Transmission of tags Yes
30 Transmission fo disturbance data Yes
31 End of transmission Yes
Selection of standard ASDUs in control direction
839
Supported
ASDU Yes
6 Time synchronization Yes
7 General interrogation Yes
10 Generic data No
20 General command Yes
21 Generic command No
24 Order for disturbance data transmission Yes
25 Acknowledgement for distance data transmission Yes
Selection of basic application functions
Test mode No
Blocking of monitoring direction Yes
Disturbance data Yes
Private data Yes
Generic services No
17.6.2.2 Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and
the Analog/Digital conversion module (ADM). The serial communication module
can have connectors for two plastic fibre cables (snap-in) or two glass fibre cables
(ST, bayonet) or a combination of plastic and glass fibre. Three different types are
available depending on type of fibre.
The incoming optical fibre is connected to the RX receiver input, and the outgoing
optical fibre to the TX transmitter output. When the fibre optic cables are laid out,
pay special attention to the instructions concerning the handling and connection of
the optical fibres. The module is identified with a number on the label on the module.

I103IEDCMD
BLOCK 19-LEDRS
FUNTYPE 23-GRP1
24-GRP2
25-GRP3
26-GRP4
IEC05000689 V2 EN
I103CMD
BLOCK 16-AR
FUNTYPE 17-DIFF
18-PROT
IEC05000684 V2 EN
840
I103USRCMD
BLOCK OUTPUT1
PULSEMOD OUTPUT2
T OUTPUT3
FUNTYPE OUTPUT4
INFNO_1 OUTPUT5
INFNO_2 OUTPUT6
INFNO_3 OUTPUT7
INFNO_4 OUTPUT8
INFNO_5
INFNO_6
INFNO_7
INFNO_8
IEC05000693 V2 EN
I103IED
BLOCK
19_LEDRS
23_GRP1
24_GRP2
25_GRP3
26_GRP4
21_TESTM
FUNTYPE
IEC05000688 V2 EN
I103USRDEF
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
FUNTYPE
INFNO_1
INFNO_2
INFNO_3
INFNO_4
INFNO_5
INFNO_6
INFNO_7
INFNO_8
IEC05000694 V2 EN
I103SUPERV
BLOCK
32_MEASI
33_MEASU
37_IBKUP
38_VTFF
46_GRWA
47_GRAL
FUNTYPE
IEC05000692 V2 EN
I103EF
BLOCK
51_EFFW
52_EFREV
FUNTYPE
IEC05000685 V2 EN
841
I103FLTDIS
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
78_ZONE1
79_ZONE2
80_ZONE3
81_ZONE4
82_ZONE5
76_TRANS
77_RECEV
73_SCL
FLTLOC
ARINPROG
FUNTYPE
IEC05000686 V2 EN
I103FLTSTD
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
85_BFP
86_MTRL1
87_MTRL2
88_MTRL3
89_MTRN
90_IOC
91_IOC
92_IEF
93_IEF
ARINPROG
FUNTYPE
IEC05000687 V2 EN
I103AR
BLOCK
16_ARACT
128_CBON
130_UNSU
FUNTYPE
IEC05000683 V2 EN
842
I103MEAS
BLOCK
IL1
IL2
IL3
IN
UL1
UL2
UL3
UL1L2
UN
P
Q
F
FUNTYPE
IEC05000690 V2 EN
I103MEASUSR
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
FUNTYPE
INFNO
IEC05000691 V2 EN

Table 554: I103IEDCMD Input signals
BLOCK BOOLEAN 0 Block of commands
Table 555: I103IEDCMD Output signals

19-LEDRS BOOLEAN Information number 19, reset LEDs
23-GRP1 BOOLEAN Information number 23, activate setting group 1
Table 556: I103CMD Input signals

843
Table 557: I103CMD Output signals

16-AR BOOLEAN Information number 16, block of autorecloser
17-DIFF BOOLEAN Information number 17, block of differential
protection
18-PROT BOOLEAN Information number 18, block of protection
Table 558: I103USRCMD Input signals

Table 559: I103USRCMD Output signals

OUTPUT1 BOOLEAN Command output 1
Table 560: I103IED Input signals

BLOCK BOOLEAN 0 Block of status reporting
19_LEDRS BOOLEAN 0 Information number 19, reset LEDs
23_GRP1 BOOLEAN 0 Information number 23, setting group 1 is active
21_TESTM BOOLEAN 0 Information number 21, test mode is active
Table 561: I103USRDEF Input signals

INPUT1 BOOLEAN 0 Binary signal Input 1
INPUT2 BOOLEAN 0 Binary signal input 2
844

Table 562: I103SUPERV Input signals

32_MEASI BOOLEAN 0 Information number 32, measurand supervision of
I
33_MEASU BOOLEAN 0 Information number 33, measurand supervision of
U
37_IBKUP BOOLEAN 0 Information number 37, I high-high back-up
protection
38_VTFF BOOLEAN 0 Information number 38, fuse failure VT
46_GRWA BOOLEAN 0 Information number 46, group warning
47_GRAL BOOLEAN 0 Information number 47, group alarm
Table 563: I103EF Input signals

51_EFFW BOOLEAN 0 Information number 51, earth-fault forward
52_EFREV BOOLEAN 0 Information number 52, earth-fault reverse
Table 564: I103FLTDIS Input signals

64_STL1 BOOLEAN 0 Information number 64, start phase L1
67_STIN BOOLEAN 0 Information number 67, start residual current IN
84_STGEN BOOLEAN 0 Information number 84, start general
69_TRL1 BOOLEAN 0 Information number 69, trip phase L1
68_TRGEN BOOLEAN 0 Information number 68, trip general
74_FW BOOLEAN 0 Information number 74, forward/line
75_REV BOOLEAN 0 Information number 75, reverse/bus
845

78_ZONE1 BOOLEAN 0 Information number 78, zone 1
76_TRANS BOOLEAN 0 Information number 76, signal transmitted
77_RECEV BOOLEAN 0 Information number 77, signal recevied
73_SCL REAL 0 Information number 73, fault location in ohm
FLTLOC BOOLEAN 0 Faultlocator faultlocation valid (LMBRFLO-
CALCMADE)
ARINPROG BOOLEAN 0 Autorecloser in progress (SMBRREC- INPROGR)
Table 565: I103FLTSTD Input signals

67_STIN BOOLEAN 0 Information number 67, start residual curent IN
84_STGEN BOOLEAN 0 Information number 84, start general
68_TRGEN BOOLEAN 0 Information number 68, trip general
74_FW BOOLEAN 0 Information number 74, forward/line
75_REV BOOLEAN 0 Information number 75, reverse/bus
85_BFP BOOLEAN 0 Information number 85, breaker failure
86_MTRL1 BOOLEAN 0 Information number 86, trip measuring system
phase L1
phase L2
phase L3
89_MTRN BOOLEAN 0 Information number 89, trip measuring system
neutral N
90_IOC BOOLEAN 0 Information number 90, over current trip, stage low
91_IOC BOOLEAN 0 Information number 91, over current trip, stage high
92_IEF BOOLEAN 0 Information number 92, earth-fault trip, stage low
93_IEF BOOLEAN 0 Information number 93, earth-fault trip, stage high
ARINPROG BOOLEAN 0 Autorecloser in progress (SMBRREC- INPROGR)
846
Table 566: I103AR Input signals

16_ARACT BOOLEAN 0 Information number 16, auto-recloser active
128_CBON BOOLEAN 0 Information number 128, circuit breaker on by auto-
recloser
130_UNSU BOOLEAN 0 Information number 130, unsuccessful reclosing
Table 567: I103MEAS Input signals

BLOCK BOOLEAN 0 Block of service value reporting
IL1 REAL 0.0 Service value for current phase L1
IN REAL 0.0 Service value for residual current IN
UL1 REAL 0.0 Service value for voltage phase L1
UL1L2 REAL 0.0 Service value for voltage phase-phase L1-L2
UN REAL 0.0 Service value for residual voltage UN
P REAL 0.0 Service value for active power
Q REAL 0.0 Service value for reactive power
F REAL 0.0 Service value for system frequency
Table 568: I103MEASUSR Input signals

BLOCK BOOLEAN 0 Block of service value reporting
INPUT1 REAL 0.0 Service value for measurement on input 1
847

Table 569: I103IEDCMD Non group settings (basic)
FUNTYPE 1 - 255 FunT 1 255 Function type (1-255)
Table 570: I103CMD Non group settings (basic)

Table 571: I103USRCMD Non group settings (basic)

PULSEMOD 0-1 Mode 1 1 Pulse mode 0=Steady, 1=Pulsed
T 0.200 - 60.000 s 0.001 0.400 Pulse length
INFNO_1 1 - 255 InfNo 1 1 Information number for output 1 (1-255)
Table 572: I103IED Non group settings (basic)

Table 573: I103USRDEF Non group settings (basic)

INFNO_1 1 - 255 InfNo 1 1 Information number for binary input 1
(1-255)
(1-255)
(1-255)
(1-255)
848

(1-255)
(1-255)
(1-255)
(1-255)
Table 574: I103SUPERV Non group settings (basic)

Table 575: I103EF Non group settings (basic)

Table 576: I103FLTDIS Non group settings (basic)

Table 577: I103FLTSTD Non group settings (basic)

Table 578: I103AR Non group settings (basic)

Table 579: I103MEAS Non group settings (basic)

RatedIL1 1 - 99999 A 1 3000 Rated current phase L1
RatedIN 1 - 99999 A 1 3000 Rated residual current IN
RatedUL1 0.05 - 2000.00 kV 0.05 230.00 Rated voltage for phase L1
849

RatedUL1-UL2 0.05 - 2000.00 kV 0.05 400.00 Rated voltage for phase-phase L1-L2
RatedUN 0.05 - 2000.00 kV 0.05 230.00 Rated residual voltage UN
RatedP 0.00 - 2000.00 MW 0.05 1200.00 Rated value for active power
RatedQ 0.00 - 2000.00 MVA 0.05 1200.00 Rated value for reactive power
RatedF 50.0 - 60.0 Hz 10.0 50.0 Rated system frequency
Table 580: I103MEASUSR Non group settings (basic)

INFNO 1 - 255 InfNo 1 1 Information number for measurands
(1-255)
RatedMeasur1 0.05 - - 0.05 1000.00 Rated value for measurement on input 1
10000000000.00
10000000000.00
10000000000.00
10000000000.00
10000000000.00
10000000000.00
10000000000.00
10000000000.00
10000000000.00

Table 581: IEC60870-5-103 communication protocol
Function Value
Protocol IEC 60870-5-103
Communication speed 9600, 19200 Bd
850
17.7 Horizontal communication via GOOSE for

interlocking GOOSEINTLKRCV

GOOSEINTLKRCV
BLOCK ^RESREQ
^RESGRANT
ÂPP1_OP
ÂPP1_CL
APP1VAL
ÂPP2_OP
ÂPP2_CL
APP2VAL
ÂPP3_OP
ÂPP3_CL
APP3VAL
ÂPP4_OP
ÂPP4_CL
APP4VAL
ÂPP5_OP
ÂPP5_CL
APP5VAL
ÂPP6_OP
ÂPP6_CL
APP6VAL
ÂPP7_OP
ÂPP7_CL
APP7VAL
ÂPP8_OP
ÂPP8_CL
APP8VAL
ÂPP9_OP
ÂPP9_CL
APP9VAL
ÂPP10_OP
ÂPP10_CL
APP10VAL
ÂPP11_OP
ÂPP11_CL
APP11VAL
ÂPP12_OP
ÂPP12_CL
APP12VAL
ÂPP13_OP
ÂPP13_CL
APP13VAL
ÂPP14_OP
ÂPP14_CL
APP14VAL
ÂPP15_OP
ÂPP15_CL
APP15VAL
COM_VAL
IEC07000048 V2 EN
Figure 433: GOOSEINTLKRCV function block

Table 582: GOOSEINTLKRCV Input signals
BLOCK BOOLEAN 0 Block of output signals
851
Table 583: GOOSEINTLKRCV Output signals

RESREQ BOOLEAN Reservation request
RESGRANT BOOLEAN Reservation granted
APP1_OP BOOLEAN Apparatus 1 position is open
APP1_CL BOOLEAN Apparatus 1 position is closed
APP1VAL BOOLEAN Apparatus 1 position is valid
852

COM_VAL BOOLEAN Receive communication status is valid

Table 584: GOOSEINTLKRCV Non group settings (basic)
On
853
17.8 Goose binary receive GOOSEBINRCV

GOOSEBINRCV
BLOCK ÔUT1
OUT1VAL
ÔUT2
OUT2VAL
ÔUT3
OUT3VAL
ÔUT4
OUT4VAL
ÔUT5
OUT5VAL
ÔUT6
OUT6VAL
ÔUT7
OUT7VAL
ÔUT8
OUT8VAL
ÔUT9
OUT9VAL
ÔUT10
OUT10VAL
ÔUT11
OUT11VAL
ÔUT12
OUT12VAL
ÔUT13
OUT13VAL
ÔUT14
OUT14VAL
ÔUT15
OUT15VAL
ÔUT16
OUT16VAL
IEC07000047 V2 EN
Figure 434: GOOSEBINRCV function block

Table 585: GOOSEBINRCV Input signals
BLOCK BOOLEAN 0 Block of output signals
Table 586: GOOSEBINRCV Output signals

OUT1 BOOLEAN Binary output 1
OUT1VAL BOOLEAN Valid data on binary output 1
854


Table 587: GOOSEBINRCV Non group settings (basic)
On
17.9 Multiple command and transmit MULTICMDRCV,

MULTICMDSND
855

Multiple command and transmit MULTICMDRCV - -
Multiple command and transmit MULTICMDSND - -
17.9.1 Introduction
The IED can be provided with a function to send and receive signals to and from
other IEDs via the interbay bus. The send and receive function blocks has 16 outputs/
inputs that can be used, together with the configuration logic circuits, for control
purposes within the IED or via binary outputs. When it is used to communicate
with other IEDs, these IEDs have a corresponding Multiple transmit function block
with 16 outputs to send the information received by the command block.

Two multiple transmit function blocks MULTICMDSND:1 and MULTICMDSND:
2 and 8 slow multiple transmit function blocks MULTICMDSND:3 to
MULTICMDSND:10 are available in the IED.
Sixteen signals can be connected and they will then be sent to the multiple
command block in the other IED. The connections are set with the LON Network
Tool (LNT).
Twelve multiple command function blocks MULTICMDRCV:1 to

MULTICMDRCV:12 with fast execution time and 48 multiple command function
blocks MULTICMDRCV:13 to MULTICMDRCV:60 with slower execution time
are available in the IED.
Multiple command function block MULTICMDRCV has 16 outputs combined in

one block, which can be controlled from other IEDs.
The output signals, here OUTPUT1 to OUTPUT16, are then available for
configuration to built-in functions or via the configuration logic circuits to the
binary outputs of the IED.
MULTICMDRCV also has a supervision function, which sets the output VALID to
0 if the block does not receive data within set maximum time.
17.9.3 Design
17.9.3.1 General
The output signals can be of the types Off, Steady, or Pulse. The setting is done on
the MODE settings, common for the whole block, from PCM600.
856
• 0 = Off sets all outputs to 0, independent of the values sent from the station
level, that is, the operator station or remote-control gateway.
• 1 = Steady sets the outputs to a steady signal 0 or 1, depending on the values
sent from the station level.
• 2 = Pulse gives a pulse with one execution cycle duration, if a value sent from
the station level is changed from 0 to 1. That means that the configured logic
connected to the command function blocks may not have a cycle time longer
than the execution cycle time for the command function block.

MULTICMDRCV
BLOCK ERROR
NEWDATA
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
OUTPUT10
OUTPUT11
OUTPUT12
OUTPUT13
OUTPUT14
OUTPUT15
OUTPUT16
VALID
IEC06000007 V2 EN
Figure 435: MULTICMDRCV function block
MULTICMDSND
BLOCK ERROR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
IEC06000008 V2 EN
Figure 436: MULTICMDSND function block
857

Table 588: MULTICMDRCV Input signals
Table 589: MULTICMDSND Input signals

Table 590: MULTICMDRCV Output signals

ERROR BOOLEAN MultiReceive error
NEWDATA BOOLEAN New data is received
OUTPUT1 BOOLEAN Output 1
858

VALID BOOLEAN Output data is valid
Table 591: MULTICMDSND Output signals

ERROR BOOLEAN MultiSend error

Table 592: MULTICMDRCV Non group settings (basic)
tMaxCycleTime 0.050 - 200.000 s 0.001 11.000 Maximum cycle time between receptions
of input data
tMinCycleTime 0.000 - 200.000 s 0.001 0.000 Minimum cycle time between receptions
of input data
Mode Steady - - Steady Mode for output signals
Pulsed
tPulseTime 0.000 - 60.000 s 0.001 0.200 Pulse length for multi command outputs
Table 593: MULTICMDSND Non group settings (basic)

tMaxCycleTime 0.000 - 200.000 s 0.001 5.000 Maximum time interval between
transmission of output data
tMinCycleTime 0.000 - 200.000 s 0.001 0.000 Minimum time interval between
transmission of output data
859
860
Remote communication
Section 18 Remote communication
About this chapter

This chapter describes the Binary signal transfer function and associated hardware
functionality. The way the functions work, their setting parameters, function
blocks, input and output signals, and technical data are included for each function.
18.1 Binary signal transfer

Binary signal transfer BinSignReceive - -
Binary signal transfer BinSignTransm - -
18.1.1 Introduction
The remote end data communication is used either for the transmission of current
values together with maximum 8 binary signals in the line differential protection,
or for transmission of only binary signals, up to 192 signals, in the other 670 series
IEDs. The binary signals are freely configurable and can, thus, be used for any
purpose, for example, communication scheme related signals, transfer trip and/or
other binary signals between IEDs.
Communication between two IEDs requires that each IED is equipped with an
LDCM (Line Data Communication Module). The LDCMs are then interfaces to a
64 kbit/s communication channel for duplex communication between the IEDs.
The IED can be equipped with up to four short range, medium range or long range
LDCM.

The communication is made on standard ITU (CCITT) PCM digital 64 kbit/s
channels. It is a two-way communication where telegrams are sent every 5 ms
(same in 50 Hz and 60 Hz), exchanging information between two IEDs. The format
used is C37.94 and one telegram consists of start and stop flags, address, data to be
transmitted, Cyclic Redundancy Check (CRC) and Yellow bit (which is associated
with C37.94).
861
Start Stop
Information CRC
flag flag
8 bits n x 16 bits 16 bits 8 bits

en01000134.vsd
IEC01000134 V1 EN
Figure 437: Data message structure
The start and stop flags are the 0111 1110 sequence (7E hexadecimal), defined in
the HDLC standard. The CRC is designed according to the standard CRC16
definition. The optional address field in the HDLC frame is not used instead a
separate addressing is included in the data field.
The address field is used for checking that the received message originates from
the correct equipment. There is always a risk that multiplexers occasionally mix the
messages up. Each terminal in the system is given a number. The terminal is then
programmed to accept messages from a specific terminal number. If the CRC
function detects a faulty message, the message is thrown away and not used in the
evaluation.
When the communication is used for line differential purpose, the transmitted data
consists of three currents, clock information, trip-, block- and alarm-signals and
eight binary signals which can be used for any purpose. The three currents are
represented as sampled values.
When the communication is used exclusively for binary signals, the full data
capacity of the communication channel is used for the binary signal purpose which
gives the capacity of 192 signals.
862

LDCMRecBinStat1
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
REMCOMF
LOWLEVEL
IEC07000043 V2 EN
LDCMRecBinStat2
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
IEC07000044 V2 EN
Figure 438: LDCMRecBinStat function blocks
LDCMRecBinStat3
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
IEC05000451 V2 EN
Figure 439: LDCMRecBinStat function block

Table 594: LDCMRecBinStat1 Output signals
COMFAIL BOOLEAN Detected error in the differential communication
YBIT BOOLEAN Detected error in remote end with incoming
message
NOCARR BOOLEAN No carrier is detected in the incoming message
863

NOMESS BOOLEAN No start and stop flags identified for the incoming
message
ADDRERR BOOLEAN Incoming message from a wrong terminal
LNGTHERR BOOLEAN Wrong length of the incoming message
CRCERROR BOOLEAN Identified error by CRC check in incoming message
REMCOMF BOOLEAN Remote terminal indicates problem with received
message
LOWLEVEL BOOLEAN Low signal level on the receive link

message
message
TRDELERR BOOLEAN Transmission time is longer than permitted
SYNCERR BOOLEAN Indicates when echo synchronication is used
message
REMGPSER BOOLEAN Remote terminal indicates problem with GPS
synchronization
SUBSTITU BOOLEAN Link error, values are substituted

message
message
TRDELERR BOOLEAN Transmission time is longer than permitted
864

SYNCERR BOOLEAN Indicates when echo synchronication is used
message
REMGPSER BOOLEAN Remote terminal indicates problem with GPS
synchronization
SUBSTITU BOOLEAN Link error, values are substituted

Table 597: LDCMRecBinStat1 Non group settings (basic)
ChannelMode Off - - On Channel mode of LDCM, 0=OFF, 1=ON,
On 2=OutOfService
OutOfService
TerminalNo 0 - 255 - 1 0 Terminal number used for line differential
communication
RemoteTermNo 0 - 255 - 1 0 Terminal number on remote terminal
CommSync Slave - - Slave Com Synchronization mode of LDCM,
Master 0=Slave, 1=Master
OptoPower LowPower - - LowPower Transmission power for LDCM, 0=Low,
HighPower 1=High
ComFailAlrmDel 5 - 500 ms 5 100 Time delay before communication error
signal is activated
ComFailResDel 5 - 500 ms 5 100 Reset delay before communication error
signal is reset
InvertPolX21 Off - - Off Invert polarization for X21 communication
On

On 2=OutOfService
OutOfService
communication
DiffSync Echo - - Echo Diff Synchronization mode of LDCM,
GPS 0=ECHO, 1=GPS
GPSSyncErr Block - - Block Operation mode when GPS
Echo synchroniation signal is lost
HighPower 1=High
865

TransmCurr CT-GRP1 - - CT-GRP1 Summation mode for transmitted current
CT-GRP2 values
CT-SUM
CT-DIFF1
CT-DIFF2
signal is activated
signal is reset
RedChSwTime 5 - 500 ms 5 5 Time delay before switching in
redundant channel
RedChRturnTime 5 - 500 ms 5 100 Time delay before switching back from
redundant channel
AsymDelay -20.00 - 20.00 ms 0.01 0.00 Asymmetric delay when communication
use echo synch.
MaxTransmDelay 0 - 40 ms 1 20 Max allowed transmission delay
CompRange 0-10kA - - 0-25kA Compression range
0-25kA
0-50kA
0-150kA
MaxtDiffLevel 200 - 2000 us 1 600 Maximum time diff for ECHO back-up
DeadbandtDiff 200 - 1000 us 1 300 Deadband for t Diff
On

On 2=OutOfService
OutOfService
communication
DiffSync Echo - - Echo Diff Synchronization mode of LDCM,
GPS 0=ECHO, 1=GPS
GPSSyncErr Block - - Block Operation mode when GPS
Echo synchroniation signal is lost
HighPower 1=High
TransmCurr CT-GRP1 - - CT-GRP1 Summation mode for transmitted current
CT-GRP2 values
CT-SUM
CT-DIFF1
CT-DIFF2
RedundantChannel
signal is activated
866

signal is reset
RedChSwTime 5 - 500 ms 5 5 Time delay before switching in
redundant channel
RedChRturnTime 5 - 500 ms 5 100 Time delay before switching back from
redundant channel
AsymDelay -20.00 - 20.00 ms 0.01 0.00 Asymmetric delay when communication
use echo synch.
MaxTransmDelay 0 - 40 ms 1 20 Max allowed transmission delay
CompRange 0-10kA - - 0-25kA Compression range
0-25kA
0-50kA
0-150kA
MaxtDiffLevel 200 - 2000 us 1 600 Maximum time diff for ECHO back-up
DeadbandtDiff 200 - 1000 us 1 300 Deadband for t Diff
On
18.2 Transmission of analog data from LDCM

LDCMTransmit

LDCMTRN
^CT1L1
^CT1L2
^CT1L3
^CT1N
^CT2L1
^CT2L2
^CT2L3
^CT2N
IEC10000017 V1 EN
Figure 440: LDCMTransmit function block
The function blocks are not represented in the Application

Configuration tool except for the LDCMTRN function block that is
visible in ACT. The signals appear only in the Signal Matrix tool
when a LDCM is included in the configuration with the function
selector tool.
867

Table 600: LDCMTRN Input signals
CT1L1 STRING 0 Input to be used for transmit CT-group1 line L1 to
remote end
remote end
remote end
CT1N STRING 0 Input to be used for transmit CT-group1 neutral N
to remote end
remote end
remote end
remote end
CT2N STRING 0 Input to be used for transmit CT-group2 neutral N
to remote end
868
Hardware
Section 19 Hardware
About this chapter

This chapter includes descriptions of the different hardware modules. It includes
diagrams from different elevations indicating the location of connection terminals
and modules.
19.1 Overview
19.1.1 Variants of case and local HMI display size
xx04000458.eps
IEC04000458 V1 EN
Figure 441: 1/2 19” case with medium local HMI display.
869
Hardware
xx04000459.eps
IEC04000459 V1 EN
Figure 442: 1/2 19” case with small local HMI display.
IEC05000762 V1 EN
xx05000763.eps
IEC05000763 V1 EN
870
Hardware
xx04000460.eps
IEC04000460 V1 EN
xx04000461.eps
IEC04000461 V1 EN
871
Hardware
19.1.2 Case from the rear side

Table 601: Designations for 1/2 x 19” casing with 1 TRM slot
Module Rear Positions

PSM X11
BIM, BOM, SOM or IOM X31 and X32 etc. to X51
and X52
BIM, BOM, SOM, IOM or X51, X52
GSM
SLM X301:A, B, C, D
IRIG-B 1) X302
IEC08000471 BG V1 EN
OEM X311:A, B, C, D
RS485 or LDCM 2) 3) X312
LDCM 2) X313
TRM X401
1) IRIG-B installation, when included in seat P30:2

2) LDCM installation sequence: P31:2 or P31:3
3) RS485 installation, when included in seat P31:2
Note!
1 One LDCM can be included depending of availability of
IRIG-B respective RS485 modules.
872
Hardware

PSM X11
BIM, BOM, SOM, IOM or X31 and X32 etc. to
MIM X101 and X102
BIM, BOM, SOM, IOM, X101, X102
MIM or GSM
SLM X301:A, B, C, D
IRIG-B or LDCM 1) 2) X302
LDCM 2) X303
OEM 4) X311:A, B, C, D
RS485 or LDCM 2) 3) X312
LDCM 2) X313
TRM X401

2) LDCM installation sequence: P31:2, P31:3,
P30:2 and P30:3
3) RS485 installation, when included in seat P31:2
or P31:3
4) OEM X311:A, B (IEC 61850-8-1). X311:C, D
(IEC 61850-8-1 or IEC 61850-9-2 LE)
Note!
2-4 LDCM can be included depending of availability
of IRIG-B respective RS485 modules.
873
Hardware

PSM X11
BIM, BOM, SOM, IOM or X31 and X32 etc. to X71 and
MIM X72
BIM, BOM, SOM, IOM, X71, X72
MIM or GSM
SLM X301:A, B, C, D
IRIG-B or LDCM 1,2) X302
LDCM 2) X303
OEM 4) X311:A, B, C, D
RS485 or LDCM 2) 3) X312
LDCM 2) X313
LDCM 2) X322
LDCM 2) X323
TRM 1 X401
TRM 2 X411

2) LDCM installation sequence: P31:2, P31:3, P32:2,
P32:3, P30:2 and P30:3
3) RS485 installation, when included in seat P31:2, P31:3,
P32:2 or P32:3
4) OEM X311:A, B (IEC 61850-8-1). (X311:C, D IEC
61850-8-1 or IEC 61850-9-2 LE)
Note!
2-4 LDCM can be included depending of availability of IRIG-
B respective RS485 modules.
When IRIG-B, RS485 and 4 pc of LDCM are in use, needs
a second ADM.
874
Hardware

PSM X11
BIM, BOM, X31 and X32 etc. to X161
SOM, IOM or and X162
MIM
BIM, BOM, X161 and X162
SOM, IOM, MIM
or GSM
SLM X301:A, B, C, D
IRIG-B X302
LDCM 1) X312, X313, X302 and X303
OEM 2) X311:A, B, C, D
RS485 X312, X313

TRM X401
Note!
1) 2-4 LDCM can be included. First LDCM
always in position X313, second LDCM always in
position X303. LDCM can also be in position
X302 and X312 if IRIG-B respective RS485
modules are not included.
2) OEM X311:A, B (IEC 61850-8-1). OEM
X311:C, D (IEC 61850-8-1)(IEC 61850-9-2LE)
875
Hardware
Table 605: Designations for 1/1 x 19” casing with 2 TRM slots

PSM X11
BIM, BOM, X31 and X32 etc. to X131
SOM, IOM or and X132
MIM
BIM, BOM, X131, X132
SOM, IOM, MIM
or GSM
SLM X301:A, B, C, D
IRIG-B or LDCM X302
1,2)
LDCM 2) X303
OEM 4) X311:A, B, C, D
RS485 or LDCM X312
2) 3)
LDCM 2) X313
LDCM 2) X322
LDCM 2) X323
TRM 1 X401
TRM 2 X411

2) LDCM installation sequence: P31:2, P31:3,
P32:2, P32:3, P30:2 and P30:3
3) RS485 installation, when included in seat
P31:2, P31:3, P32:2 or P32:4
4) OEM X311:A, B (IEC 61850-8-1). OEM
X311:C, D (IEC 61850-9-2 or IEC 61850-9-2 LE)
Note!
2-4 LDCM can be included depending of
availability of IRIG-B respective RS485 modules.
When IRIG-B, RS485 and 4 pc of LDCM are in
use, needs a second ADM.
876
Hardware
19.2 Hardware modules
19.2.1 Overview
Table 606: Basic modules
Module Description
Combined backplane module (CBM) A backplane PCB that carries all internal signals
between modules in an IED. Only the TRM (when
included) is not connected directly to this board.
Universal backplane module (UBM) A backplane PCB that forms part of the IED
backplane with connectors for TRM (when
included), ADM etc.
Power supply module (PSM) Including a regulated DC/DC converter that
supplies auxiliary voltage to all static circuits.
• An internal fail alarm output is available.
Numerical module (NUM) Module for overall application control. All

information is processed or passed through this
module, such as configuration, settings and
communication.
Local Human machine interface (LHMI) The module consists of LED:s, an LCD, a push
button keyboard and an ethernet connector used
to connect a PC to the IED.
Transformer input module (TRM) Transformer module that galvanically separates
the internal circuits from the VT and CT circuits. It
has 12 analog inputs.
Analog digital conversion module (ADM) Slot mounted PCB with A/D conversion.
Table 607: Application specific modules

Module Description
Binary input module (BIM) Module with 16 optically isolated binary inputs
Binary output module (BOM) Module with 24 single outputs or 12 double-pole
command outputs including supervision function
Binary I/O module (IOM) Module with 8 optically isolated binary inputs, 10
outputs and 2 fast signalling outputs.
Line data communication modules (LDCM), Modules used for digital communication to remote
short range, medium range, long range, X21 terminal.
Serial SPA/LON/IEC 60870-5-103 Used for SPA/LON/IEC 60870–5–103
communication modules (SLM) communication
Optical ethernet module (OEM) PMC board for IEC 61850 based communication.
mA input module (MIM) Analog input module with 6 independent,
galvanically separated channels.
877
Hardware
Module Description
GPS time synchronization module (GSM) Used to provide the IED with GPS time
synchronization.
Static output module (SOM) Module with 6 fast static outputs and 6 change
over output relays.
IRIG-B Time synchronization module (IRIG-B) Module with 2 inputs. One is used for handling
both pulse-width modulated signals and
amplitude modulated signals and one is used for
optical input type ST for PPS time synchronization.
19.2.2 Combined backplane module (CBM)
The combined backplane module (CBM) carries signals between modules in an IED.
19.2.2.2 Functionality
The Compact PCI makes 3.3V or 5V signaling in the backplane possible. The
CBM backplane and connected modules are 5V PCI-compatible.
Some pins on the Compact PCI connector are connected to the CAN bus, to be able
to communicate with CAN based modules.
If a modules self test discovers an error it informs other modules using the Internal
Fail signal IRF.
19.2.2.3 Design
There are two basic versions of the CBM:
• with 3 Compact PCI connectors and a number of euro connectors depending

on the IED case size. One Compact PCI connector is used by NUM and two
are used by other PCI modules, for example two ADMs in IEDs with two
TRMs. See figure 448
• with 2 Compact PCI connectors and a number of euro connectors depending
on the IED case size. One Compact PCI connector is used by NUM and one is
used by for example an ADM in IEDs with one TRM. See figure 447
Each PCI connector consists of 2 compact PCI receptacles. The euro connectors
are connected to the CAN bus and used for I/O modules and power supply.
878
Hardware
1 2
en05000516.vsd
IEC05000516 V1 EN
Figure 447: CBM for 1 TRM.
Pos Description
1 CAN slots
2 CPCI slots
1 2
en05000755.vsd
IEC05000755 V1 EN
Figure 448: CBM for 2 TRM.
Pos Description
1 CAN slots
2 CPCI slots
879
Hardware
en05000756.vsd
IEC05000756 V1 EN
Figure 449: CBM position, rear view.
Pos Description
1 CBM
19.2.3 Universal backplane module (UBM)
The Universal Backplane Module (UBM) is part of the IED backplane and is
mounted above the CBM. It connects the Transformer input module (TRM) to the
Analog digital conversion module (ADM) and the Numerical module (NUM).
The Universal Backplane Module connects the CT and VT analog signals from the
transformer input module to the analog digital converter module. The Numerical
processing module (NUM) is also connected to the UBM. The ethernet contact on
the front panel as well as the internal ethernet contacts are connected to the UBM
which provides the signal path to the NUM board.
19.2.3.3 Design
It connects the Transformer input module (TRM) to the Analog digital conversion
module (ADM) and the Numerical module (NUM).
The UBM exists in 2 versions.
880
Hardware
• for IEDs with two TRM and two ADM. It has four 48 pin euro connectors and
one 96 pin euro connector, see figure 451
• for IEDs with one TRM and one ADM. It has two 48 pin euro connectors and
one 96 pin euro connector, see figure 452.
The 96 pin euro connector is used to connect the NUM board to the backplane. The
48 pin connectors are used to connect the TRM and ADM.
TRM ADM
NUM
AD Data
X1 X2
X3 X4
RS485
X10 X10
Front Ethernet
LHMI connection
port
Ethernet X5
en05000489.vsd
IEC05000489 V1 EN
Figure 450: UBM block diagram.
en05000757.vsd
IEC05000757 V1 EN
Figure 451: UBM for 1 TRM.
881
Hardware
en05000758.vsd
IEC05000758 V1 EN
Figure 452: UBM for 2 TRM.
en05000759.vsd
IEC05000759 V1 EN
Figure 453: UBM position, rear view.
Pos Description
1 UBM
19.2.4 Numeric processing module (NUM)
The Numeric processing module (NUM), is a CPU-module that handles all

protection functions and logic.
882
Hardware
For communication with high speed modules, e.g. analog input modules and high
speed serial interfaces, the NUM is equipped with a Compact PCI bus. The NUM
is the compact PCI system card i.e. it controls bus mastering, clock distribution and
receives interrupts.
The NUM, Numeric processing module is a high performance, standard off-the-

shelf compact-PCI CPU module. It is 6U high and occupies one slot. Contact with
the backplane is via two compact PCI connectors and an euro connector.
The NUM has one PMC slot (32-bit IEEE P1386.1 compliant) and two PC-MIP
slots onto which mezzanine cards such as SLM or LDCM can be mounted.
To reduce bus loading of the compact PCI bus in the backplane the NUM has one
internal PCI bus for internal resources and the PMC/PC-MIP slots and external PCI
accesses through the backplane are buffered in a PCI/PCI bridge.
The application code and configuration data are stored in flash memory using a
flash file system.
The NUM is equipped with a real time clock. It uses a capacitor for power backup
of the real time clock.
No forced cooling is used on this standard module because of the low power
dissipation.
883
Hardware
19.2.4.3 Block diagram
Compact
Flash Logic
PMC
connector
PC-MIP
connector
UBM
Memory Ethernet
North
bridge
Backplane
PCI-PCI-
connector
bridge
CPU
en04000473.vsd
IEC04000473 V1 EN
Figure 454: Numeric processing module block diagram
19.2.5 Power supply module (PSM)
The power supply module is used to provide the correct internal voltages and full
isolation between the terminal and the battery system. An internal fail alarm output
is available.
19.2.5.2 Design
There are two types of the power supply module. They are designed for different
DC input voltage ranges see table 608. The power supply module contains a built-
884
Hardware
in, self-regulated DC/DC converter that provides full isolation between the
terminal and the external battery system.
Block diagram
Input connector
Power
Filter supply
Backplane connector
Supervision
99000516.vsd
IEC99000516 V1 EN
Figure 455: PSM Block diagram.

Table 608: PSM - Power supply module
Quantity Rated value Nominal range
Auxiliary dc voltage, EL (input) EL = (24 - 60) V EL ± 20%
EL = (90 - 250) V EL ± 20%
Power consumption 50 W typically -
Auxiliary DC power in-rush < 5 A during 0.1 s -
19.2.6 Local human-machine interface (Local HMI)

Refer to section "Local HMI" for information.
19.2.7 Transformer input module (TRM)
885
Hardware
The transformer input module is used to galvanically separate and transform the
secondary currents and voltages generated by the measuring transformers. The
module has twelve inputs in different combinations of currents and voltage inputs.
Alternative connectors of Ring lug or Compression type can be ordered.
19.2.7.2 Design
The transformer module has 12 input transformers. There are several versions of
the module, each with a different combination of voltage and current input
transformers.
Basic versions:
• 6 current channels and 6 voltage channels

• 12 current channels
• 6 current channels
The rated values of the current inputs are selected at order.
The TRM is connected to the ADM and NUM via the UBM.
For configuration of the input and output signals, refer to section "Signal matrix
for analog inputs SMAI".

Table 609: TRM - Energizing quantities, rated values and limits for protection transformer
modules
Current Ir = 1 or 5 A (0.2-40) × Ir
Operative range (0-100) x Ir
Permissive overload 4 × Ir cont.

100 × Ir for 1 s *)
Burden < 150 mVA at Ir = 5 A

< 20 mVA at Ir = 1 A
Ac voltage Ur = 110 V 0.5–288 V
Operative range (0–340) V

Permissive overload 420 V cont.
450 V 10 s
Burden < 20 mVA at 110 V
Frequency fr = 50/60 Hz ± 5%
*) max. 350 A for 1 s when COMBITEST test switch is included.
886
Hardware
19.2.8 Analog digital conversion module, with time

synchronization (ADM)
The Analog/Digital module has twelve analog inputs, 2 PC-MIP slots and 1 PMC
slot. The PC-MIP slot is used for PC-MIP cards and the PMC slot for PMC cards
according to table 610. The OEM card should always be mounted on the ADM
board. The UBM connects the ADM to the transformer input module (TRM).
Table 610: PC-MIP cards and PMC cards

PC-MIP cards PMC cards
LDCM SLM
LR-LDCM OEM 1 ch
MR-LDCM OEM 2 ch
X21-LDCM
IRIG-B
RS485
19.2.8.2 Design
The Analog digital conversion module input signals are voltage and current from
the transformer module. Shunts are used to adapt the current signals to the
electronic voltage level. To gain dynamic range for the current inputs, two shunts
with separate A\D channels are used for each input current. In this way a 20 bit
dynamic range is obtained with a 16 bit A\D converter.
Input signals are sampled with a sampling freqency of 5 kHz at 50 Hz system

frequency and 6 kHz at 60 Hz system frequency.
The A\D converted signals goes through a filter with a cut off frequency of 500 Hz
and are reported to the numerical module (NUM) with 1 kHz at 50 Hz system
frequency and 1,2 kHz at 60 Hz system frequency.
887
Hardware
Channel 1
AD1 Channel 2
Channel 3
Channel 4
AD2
Channel 5
1.2v Channel 6
AD3 Channel 7
Channel 8
Channel 9
AD4 Channel 10
Channel 11
Channel 12
PMC
level shift
PC-MIP
2.5v
PCI to PCI
PC-MIP
en05000474.vsd
IEC05000474 V1 EN
Figure 456: The ADM layout
888
Hardware
19.2.9 Binary input module (BIM)
The binary input module has 16 optically isolated inputs and is available in two
versions, one standard and one with enhanced pulse counting capabilities on the
inputs to be used with the pulse counter function. The binary inputs are freely
programmable and can be used for the input of logical signals to any of the
functions. They can also be included in the disturbance recording and event-
recording functions. This enables extensive monitoring and evaluation of operation
of the IED and for all associated electrical circuits.
19.2.9.2 Design
The Binary input module contains 16 optical isolated binary inputs. The voltage
level of the binary input is selected at order.
For configuration of the input signals, refer to section "Signal matrix for binary
inputs SMBI".
A signal discriminator detects and blocks oscillating signals. When blocked, a

hysteresis function may be set to release the input at a chosen frequency, making it
possible to use the input for pulse counting. The blocking frequency may also be set.
Figure 457 shows the operating characteristics of the binary inputs of the four
voltage levels.
The standard version of binary inputs gives an improved capability to withstand

disturbances and should generally be used when pulse counting is not required.
889
Hardware
[V]
300
176
144
88
72
38
32
19
18
24/30V 48/60V 110/125V 220/250V
xx06000391.vsd
IEC06000391 V1 EN
Figure 457: Voltage dependence for the binary inputs
Guaranteed operation
Operation uncertain
No operation
IEC99000517-ABC V1 EN
This binary input module communicates with the Numerical module (NUM) via
the CAN-bus on the backplane.
The design of all binary inputs enables the burn off of the oxide of the relay contact
connected to the input, despite the low, steady-state power consumption, which is
shown in figure 458 and 459.
890
Hardware
[mA]
30 / 50
1
35 70 [ms]
en07000104-2.vsd
IEC07000104 V2 EN
Figure 458: Approximate binary input inrush current for the two standard
versions of BIM.
[mA]
30
1
3.5 7.0 [ms]
en07000105.vsd
IEC07000105 V1 EN
Figure 459: Approximate binary input inrush current for the BIM version with
enhanced pulse counting capabilities.
891
Hardware
Opto isolated input
Opto isolated input
Process connector Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input
Opto isolated input

Micro-
Opto isolated input controller
Opto isolated input
Opto isolated input

Memory
Opto isolated input
Backplane connector
Process connector
Opto isolated input
Opto isolated input CAN
Opto isolated input
Opto isolated input
Opto isolated input
99000503.vsd
IEC99000503 V1 EN
Figure 460: Block diagram of the Binary input module.
892
Hardware

Table 611: BIM - Binary input module
Binary inputs 16 -
DC voltage, RL 24/30 V RL ± 20%
48/60 V RL ± 20%
110/125 V RL ± 20%
220/250 V RL ± 20%
Power consumption
24/30 V max. 0.05 W/input -
48/60 V max. 0.1 W/input
110/125 V max. 0.2 W/input
220/250 V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
Table 612: BIM - Binary input module with enhanced pulse counting capabilities
Binary inputs 16 -
48/60 V RL ± 20%
110/125 V RL ± 20%
220/250 V RL ± 20%
Power consumption
24/30 V max. 0.05 W/input -
110/125 V max. 0.2 W/input
220/250 V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Balanced counter input frequency 40 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
19.2.10 Binary output modules (BOM)
The binary output module has 24 independent output relays and is used for trip
output or any signaling purpose.
19.2.10.2 Design
The binary output module (BOM) has 24 software supervised output relays. Each
pair of relays have a common power source input to the contacts, see figure 461.
893
Hardware
This should be considered when connecting the wiring to the connection terminal
on the back of the IED.
The high closing and carrying current capability allows connection directly to
breaker trip and closing coils. If breaking capability is required to manage fail of
the breaker auxiliary contacts normally breaking the trip coil current, a parallel
reinforcement is required.
For configuration of the output signals, refer to section "Signal matrix for binary
outputs SMBO".
Output module
xx00000299.vsd
IEC00000299 V1 EN
Figure 461: Relay pair example
1 Output connection from relay 1

2 Output signal power source connection
3 Output connection from relay 2
894
Hardware
Relay
Relay
Relay
Relay
Relay
Process connector
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Backplane connector
Process connector
Relay Micro-
controller
Relay
Relay
CAN
Relay
Relay Memory
Relay
Relay
99000505.vsd
IEC99000505 V1 EN
Figure 462: Block diagram of the Binary Output Module

Table 613: BOM - Binary output module contact data (reference standard: IEC 61810-2)
Function or quantity Trip and Signal relays
Binary outputs 24
Max system voltage 250 V AC, DC
Test voltage across open contact, 1 min 1000 V rms
Current carrying capacity
Continuous 8A
1s 10 A
895
Hardware
Function or quantity Trip and Signal relays

Making capacity at inductive load with L/R>10 ms
0.2 s 30 A
1.0 s 10 A
Breaking capacity for AC, cos j>0.4 250 V/8.0 A
Breaking capacity for DC with L/R < 40 ms 48 V/1 A
110 V/0.4 A
125 V/0.35 A
220 V/0.2 A
250 V/0.15 A
19.2.11 Static binary output module (SOM)
The static binary output module has six fast static outputs and six change over
output relays for use in applications with high speed requirements.
19.2.11.2 Design
The Static output module (SOM) have 6 normally open (NO) static outputs and 6
electromechanical relay outputs with change over contacts.
The SOM consists mainly of:
• An MCU
• A CAN-driver
• 6 static relays outputs
• 6 electromechanical relay outputs
• A DC/DC converter
• Connectors interfacing
• CAN-bus to backplane CBM
• IO-connectors to binary outputs (2 pcs.)
The following parts are supervised:
• Interruption in relay coil

• Short circuit of relay coil
• Driver failure
896
Hardware
Drive &
Read back
Drive &
Read back
Process connector
Drive &
Read back
Drive &
Read back
Drive & Code-

Read back flash
Drive &
Read back
MCU
CAN-
driver
Drive &
Read back
Drive &
Read back
Process connector
Backplane connector
DC/DC
Drive &
Read back
Internal_fail_n
Drive & AC_fail_n
Read back RCAN_ID
Sync
Drive &
Read back
Reset
Drive &
Read back
en07000115.vsd
IEC07000115 V1 EN
Figure 463: Block diagram of the static output module
897
Hardware
IEC09000974 V1 EN
Figure 464: SOM Static output principle
IEC09000975 V1 EN
Figure 465: Connection diagram of the static output module

Table 614: SOM - Static Output Module (reference standard: IEC 61810-2): Static binary outputs
Function of quantity Static binary output trip
Rated voltage 48 - 60 VDC 110 - 250 VDC
Number of outputs 6 6
Impedance open state ~300 kΩ ~810 kΩ
Test voltage across open contact, No galvanic separation No galvanic separation
1 min
Current carrying capacity:
898
Hardware
Function of quantity Static binary output trip

Continuous 5A 5A
1.0s 10A 10A
Making capacity at capacitive load
with the maximum capacitance of
0.2 μF :
0.2s 30A 30A
1.0s 10A 10A
Breaking capacity for DC with L/R 48V / 1A 110V / 0.4A
≤ 40ms
60V / 0,75A 125V / 0.35A
220V / 0.2A
250V / 0.15A
Operating time <1ms <1ms
Table 615: SOM - Static Output module data (reference standard: IEC 61810-2):
Electromechanical relay outputs
Function of quantity Trip and signal relays
Max system voltage 250V AC/DC
Number of outputs 6
Test voltage across open contact, 1 min 1000V rms
Current carrying capacity:
Continuous 8A
1.0s 10A
Making capacity at capacitive load with the
maximum capacitance of 0.2 μF:
0.2s 30A
1.0s 10A
Breaking capacity for DC with L/R ≤ 40ms 48V / 1A
110V / 0.4A
125V / 0,35A
220V / 0,2A
250V / 0.15A
19.2.12 Binary input/output module (IOM)
The binary input/output module is used when only a few input and output channels
are needed. The ten standard output channels are used for trip output or any
signaling purpose. The two high speed signal output channels are used for
applications where short operating time is essential. Eight optically isolated binary
inputs cater for required binary input information.
899
Hardware
19.2.12.2 Design
The binary input/output module is available in two basic versions, one with
unprotected contacts and one with MOV (Metal Oxide Varistor) protected contacts.
Inputs are designed to allow oxide burn-off from connected contacts, and increase
the disturbance immunity during normal protection operate times. This is achieved
with a high peak inrush current while having a low steady-state current, see figure
458. Inputs are debounced by software.
Well defined input high and input low voltages ensures normal operation at battery
supply earth faults, see figure 457.
The voltage level of the inputs is selected when ordering.
I/O events are time stamped locally on each module for minimum time deviance
and stored by the event recorder if present.
The binary I/O module, IOM, has eight optically isolated inputs and ten output
relays. One of the outputs has a change-over contact. The nine remaining output
contacts are connected in two groups. One group has five contacts with a common
and the other group has four contacts with a common, to be used as single-output
channels, see figure 466.
The binary I/O module also has two high speed output channels where a reed relay
is connected in parallel to the standard output relay.
For configuration of the input and output signals, refer to sections "Signal matrix
for binary inputs SMBI" and "Signal matrix for binary outputs SMBO".
The making capacity of the reed relays are limited.
900
Hardware
IEC1MRK002801-AA11-UTAN-RAM V1 EN
Figure 466: Binary in/out module (IOM), input contacts named XA corresponds
to rear position X31, X41, and so on, and output contacts named
XB to rear position X32, X42, and so on
The binary input/output module version with MOV protected contacts can for
example be used in applications where breaking high inductive load would cause
excessive wear of the contacts.
The test voltage across open contact is lower for this version of the
binary input/output module.
901
Hardware
xx04000069.vsd
IEC04000069 V1 EN
Figure 467: IOM with MOV protection, relay example

Table 616: IOM - Binary input/output module
Binary inputs 8 -
48/60 V RL ± 20%
110/125 V RL ± 20%
220/250 V RL ± 20%
Power consumption -
110/125 V max. 0.2 W/input
220/250 V max. 0.4 W/input
Table 617: IOM - Binary input/output module contact data (reference standard: IEC 61810-2)
Function or quantity Trip and signal relays Fast signal relays (parallel reed
relay)
Binary outputs 10 2
Max system voltage 250 V AC, DC 250 V AC, DC
Test voltage across open contact, 1000 V rms 800 V DC
1 min
Continuous 8A 8A
1s 10 A 10 A
Making capacity at inductive load
with L/R>10 ms
0.2 s 30 A 0.4 A
1.0 s 10 A 0.4 A
Breaking capacity for AC, cos φ > 250 V/8.0 A 250 V/8.0 A
0.4
Breaking capacity for DC with L/R 48 V/1 A 48 V/1 A
< 40 ms 110 V/0.4 A 110 V/0.4 A
125 V/0.35 A 125 V/0.35 A
220 V/0.2 A 220 V/0.2 A
250 V/0.15 A 250 V/0.15 A
Maximum capacitive load - 10 nF
902
Hardware
Table 618: IOM with MOV - contact data (reference standard: IEC 60255-23)
Function or quantity Trip and Signal relays Fast signal relays (parallel
reed relay)
Binary outputs IOM: 10 IOM: 2
Max system voltage 250 V AC, DC 250 V AC, DC
Test voltage across open 250 V rms 250 V DC
contact, 1 min
Continuous 8A 8A
1s 10 A 10 A
Making capacity at inductive
loadwith L/R>10 ms
0.2 s 30 A 0.4 A
1.0 s 10 A 0.4 A
Breaking capacity for AC, cos 250 V/8.0 A 250 V/8.0 A
j>0.4
Breaking capacity for DC with L/ 48 V/1 A 48 V/1 A
R < 40 ms 110 V/0.4 A 110 V/0.4 A
220 V/0.2 A 220 V/0.2 A
250 V/0.15 A 250 V/0.15 A
Maximum capacitive load - 10 nF
19.2.13 mA input module (MIM)
The milli-ampere input module is used to interface transducer signals in the –20 to
+20 mA range from for example OLTC position, temperature or pressure
transducers. The module has six independent, galvanically separated channels.
19.2.13.2 Design
The Milliampere Input Module has six independent analog channels with separated
protection, filtering, reference, A/D-conversion and optical isolation for each input
making them galvanically isolated from each other and from the rest of the module.
For configuration of the input signals, refer to section "Signal matrix for mA
inputs SMMI".
The analog inputs measure DC current in the range of +/- 20 mA. The A/D
converter has a digital filter with selectable filter frequency. All inputs are
calibrated separately The filter parameters and the calibration factors are stored in a
non-volatile memory on the module.
The calibration circuitry monitors the module temperature and starts an automatical
calibration procedure if the temperature drift is outside the allowed range. The
module communicates, like the other I/O-modules on the serial CAN-bus.
903
Hardware
A/D Converter Opto-

Protection isolation
& filter
Volt-ref DC/DC
Process connector
A/D Converter Opto-
& filter
Volt-ref DC/DC
A/D Converter Opto-

& filter
Volt-ref DC/DC
A/D Converter Opto-

& filter
Volt-ref DC/DC
A/D Converter Opto-

& filter
Volt-ref DC/DC
Backplane connector
A/D Converter Opto-
& filter
Volt-ref DC/DC
CAN
Memory Micro-
controller
99000504.vsd
IEC99000504 V1 EN
Figure 468: MIM block diagram

Table 619: MIM - mA input module
Quantity: Rated value: Nominal range:
Input resistance Rin = 194 Ohm -
Input range ± 5, ± 10, ± 20mA -

0-5, 0-10, 0-20, 4-20mA
Power consumption -
each mA-board £2W
each mA input £ 0.1 W
904
Hardware
19.2.14 Serial and LON communication module (SLM)
The serial and LON communication module (SLM) is used for SPA, IEC
60870-5-103 and LON communication. The module has two optical
communication ports for plastic/plastic, plastic/glass or glass/glass. One port is
used for serial communication (SPA and IEC 60870-5-103) and one port is
dedicated for LON communication.
19.2.14.2 Design
The SLM is a PMC card and it is factory mounted as a mezzanine card on the
NUM module. Three variants of the SLM is available with different combinations
of optical fiber connectors, see figure 469. The plastic fiber connectors are of snap-
in type and the glass fiber connectors are of ST type.
IEC05000760 V1 EN
Figure 469: The SLM variants
A Snap in connector for plastic fiber

B ST connector for glass fiber
1 LON port
2 SPA/IEC 60870-5-103 port
905
Hardware
IEC05000761 V1 EN
Figure 470: The SLM layout overview
1 Receiver, LON
2 Transmitter, LON
3 Receiver, SPA/IEC 60870-5-103
4 Transmitter, SPA/IEC 60870-5-103
Observe that when the SLM is mounted on the NUM module, then
contact 4 above will be in the uppermost and contact 1 in the lowest
position.

Table 620: SLM – LON port
Quantity Range or value
Optical connector Glass fibre: type ST
Plastic fibre: type HFBR snap-in
Fibre, optical budget Glass fibre: 11 dB (1000 m typically *)
Plastic fibre: 7 dB (10 m typically *)
Fibre diameter Glass fibre: 62.5/125 mm
Plastic fibre: 1 mm
*) depending on optical budget calculation
906
Hardware
Table 621: SLM – SPA/IEC 60870-5-103 port

Optical connector Glass fibre: type ST
Plastic fibre: type HFBR snap-in
Fibre, optical budget Glass fibre: 11 dB (3000ft/1000 m typically *)
Plastic fibre: 7 dB (80ft/25 m typically *)
Fibre diameter Glass fibre: 62.5/125 mm
Plastic fibre: 1 mm
19.2.15 Galvanic RS485 communication module
The Galvanic RS485 communication module (RS485) is used for DNP3.0

communication. The module has one RS485 communication port. The RS485 is a
balanced serial communication that can be used either in 2-wire or 4-wire
connections. A 2-wire connection uses the same signal for RX and TX and is a
multidrop communication with no dedicated Master or slave. This variant requires
however a control of the output. The 4-wire connection has separated signals for
RX and TX multidrop communication with a dedicated Master and the rest are
slaves. No special control signal is needed in this case.
19.2.15.2 Design
The RS485 is a PMC card and it is factory mounted as a mezzanine card on the
NUM module. The internal structure of the RS485 can be seen in figure 471:
FPGA
32 MHz
Wishbone interconnect switch
Tx
PCI-con
Isolation
6-pole-connector
Internal UART RS485
bus tranceiver
PCI-bus Rx
Local bus Isolation
PCI-
to
Controller
wishbone
PCI-con
Isolation
Status
Register Termination
connector
Info
2-pole
Register
Control
ID-chip
Register Isolated Soft
DC/DC ground
IEC06000516 V1 EN
Figure 471: The internal structure of the RS485 card
RS485 connector pinouts

The arrangement for the pins in the RS485 connector (figure 472) are presented in
table 622:
907
Hardware
Table 622: The arrangement for the pins
Pin Name 2-wire Name 4-wire Description

1 RS485+ TX+ Receive/transmit high or transmit high
2 RS485– TX– Receive/transmit
3 Term T-Term Termination resistor for transmitter (and receiver
in 2–wir case) (connect to TX+)
4 N.A. R-Term Termination resistor for receiver (connect to RX
+)
5 N.A. RX– Receive low
6 N.A. RX+ Receive high
Angle
bracket
Screw
1
terminal
X3 2
1
2 RS485
3 PWB
Screw
4
terminal
5
X1
6
Backplane
IEC06000517 V1 EN
Figure 472: RS485 connector
• 2-wire: Connect pin 1 to pin 6 and pin 2 to pin 5
• Termination (2-wire): Connect pin 1 to pin 3
• Termination (4-wire): Connect pin 1 to pin 3 and pin 4 to pin 6
Soft ground connector pinouts

A second 2-pole screw connector is used for the connection of IO-ground. It can be
used in two combinations like:
• Unconnected: No ground of the IO-part · .
• Soft grounded: The IO is connected to the GND with an RC net parallel with a
MOV
908
Hardware

Table 623: Galvanic RS485 communication module
Communication speed 2400–19200 bauds
External connectors RS-485 6-pole connector
Soft ground 2-pole connector
19.2.16 Optical ethernet module (OEM)
The optical fast-ethernet module is used to connect an IED to the communication

buses (like the station bus) that use the IEC 61850-8-1 protocol (OEM rear port A,
B). The process bus use the IEC 61850-9-2LE protocol (OEM rear port C, D). The
module has one or two optical ports with ST connectors.
The Optical Ethernet module (OEM) is used when communication systems

according to IEC61850–8–1 have been implemented.
19.2.16.3 Design
The Optical Ethernet module (OEM) is a PMC card and mounted as a mezzanine
card on the ADM. The OEM is a 100base Fx module and available as a single
channel or double channel unit.
PCI - bus Connector
100Base-FX
EEPROM
Transmitter ST fiber optic
Ethernet Controller connectors
100Base-FX
Receiver
PCI - PCI Bridge
100Base-FX
Transmitter
ID chip ST fiber optic
Ethernet Controller
connectors
100Base-FX
EEPROM
IO - bus Connector Receiver
en04000472.vsd
IEC04000472 V1 EN
Figure 473: OEM block diagram.
909
Hardware
ID chip
Receiver
IO bus
LED
Ethernet cont.
25MHz oscillator
Transmitter
Receiver
LED
PCI bus
Ethernet cont. PCI to PCI
bridge
25MHz oscillator
Transmitter
en05000472.vsd
IEC05000472 V1 EN
Figure 474: OEM layout, standard PMC format 2 channels

Table 624: OEM - Optical ethernet module
Quantity Rated value
Number of channels 1 or 2 (port A, B for IEC61850-8-1 and port C, D
for IEC 61850-9-2LE)
Standard IEEE 802.3u 100BASE-FX
Type of fiber 62.5/125 mm multimode fibre
Wave length 1300 nm
Optical connector Type ST
Communication speed Fast Ethernet 100 MB
19.2.17 Line data communication module (LDCM)
The line data communication module (LDCM) is used for communication between
the IEDs situated at distances <110 km or from the IED to optical to electrical
converter with G.703 interface located on a distances <3 km away. The LDCM
module sends and rereceives data, to and from another LDCM module. The IEEE/
ANSI standard format is used.
The line data communication module is used for binary signal transfer. The module
has one optical port with ST connectors see figure 475.
Line data communication module LDCM

Each module has one optical port, one for each remote end to which the IED
communicates.
910
Hardware
Alternative cards for Long range (1550 nm single mode), Medium range (1310 nm
single mode) and Short range (850 nm multi mode) are available.
Class 1 laser product. Take adequate measures to protect the eyes.

Never look into the laser beam.
19.2.17.2 Design
The LDCM is a PCMIP type II single width format module. The LDCM can be
mounted on:
• the ADM
• the NUM
ID
ST
16.000
IO-connector
MHz
32,768
MHz
ST
en07000087.vsd
IEC07000087 V1 EN
Figure 475: The SR-LDCM layout. PCMIP type II single width format with two
PCI connectors and one I/O ST type connector
911
Hardware
X1
C
ADN 2.5V
ID
2841
PCI9054
FPGA TQ176
DS DS
256 FBGA
3904 3904
3645
MAX
3
2
en06000393.vsd
IEC06000393 V1 EN
Figure 476: The MR-LDCM and LR-LDCM layout. PCMIP type II single width
format with two PCI connectors and one I/O FC/PC type connector
Table 625: Line data communication module

Characteristic Range or value
Type of LDCM Short range (SR) Medium range (MR) Long range (LR)
Type of fibre Graded-index Singlemode 9/125 Singlemode 9/125 µm
multimode µm
62.5/125 µm or
50/125 µm
Wave length 850 nm 1310 nm 1550 nm
Optical budget 13 dB (typical 22 dB (typical 26 dB (typical distance 110 km *)
Graded-index distance about 3 distance 80 km *)
multimode 62.5/125 km *)
mm, 9 dB (typical
distance about 2
km *)
Graded-index
multimode 50/125
mm
Optical connector Type ST Type FC/PC Type FC/PC

Protocol C37.94 C37.94 C37.94 implementation **)
implementation **)
Data transmission Synchronous Synchronous Synchronous
Transmission rate / 2 Mb/s / 64 kbit/s 2 Mb/s / 64 kbit/s 2 Mb/s / 64 kbit/s
Data rate
Clock source Internal or Internal or derived Internal or derived from received
derived from from received signal signal
received signal
**) C37.94 originally defined just for multimode; using same header, configuration and data format as
C37.94
912
Hardware
19.2.18 Galvanic X.21 line data communication (X.21-LDCM)
The galvanic X.21 line data communication module is used for connection to
telecommunication equipment, for example leased telephone lines. The module
supports 64 kbit/s data communication between IEDs.
Examples of applications:
• Line differential protection

• Binary signal transfer
19.2.18.2 Design
The galvanic X.21 line data communication module uses a ABB specific PC*MIP
Type II format.
C
en07000196.vsd
IEC07000196 V1 EN
Figure 477: Overview of the X.21 LDCM module
913
Hardware
1 4
1 8
9 15
3 2
en07000239.wmf
IEC07000239 V1 EN
Figure 478: The X.21 LDCM module external connectors
1. Ground selection connector for IO, screw terminals, 2-pole

2. Ground pin
3. Soft ground pin, see figure 479
4. X.21 Micro D-sub 15 pole male connector according to the V11 (X:27)
balanced version
I/O
100kW 100nF
Soft ground
en07000242.vsd
IEC07000242 V1 EN
Figure 479: Schematic view of soft ground
Grounding
At special problems with ground loops, the soft ground connection for the IO-
ground can be tested.
Three different kinds of grounding principles can be set (used for fault tracing):
1. Direct ground - The normal grounding is direct ground, connect terminal 2
direct to the chassi.
2. No ground - Leave the connector without any connection.
3. Soft ground - Connect soft ground pin (3), see figure 478
914
Hardware
X.21 connector
Table 626: Pinout for the X.21 communication connector
Pin number Signal

1 Shield (ground)
2 TXD A
3 Control A
4 RXD A
6 Signal timing A
8 Ground
9 TXD B
10 Control B
11 RXD B
13 Signal timing B
5,7,12,14,15 Not used
The data format is HDLC. The speed for the transmission of the messages used is
64 kbit/s.
A maximum of 100 meter of cable is allowed to ensure the quality of the data
(deviation from X.21 standard cable length).
Synchronization
The X.21 LDCM works like a DTE (Data Terminal Equipment) and is normally
expecting synchronization from the DCE (Data Circuit Equipment). The
transmission is normally synchronized to the Signal Element Timing signal when a
device is a DTE. When the signal is high it will read the data at the receiver and
when the signal is low it will write data to the transmitter. This behaviour can be
inverted in the control register.
Normally an external multiplexer is used and it should act like the master.
When two X.21 LDCM is directly communicating with each other one must be set
as a master generating the synchronization for the other (the slave). The DTE
Signal Element Timing is created from the internal 64 kHz clock.
The Byte Timing signal is not used in ABB devices.
915
Hardware

Table 627: Galvanic X.21 line data communication module (X.21-LDCM)
Connector, X.21 Micro D-sub, 15-pole male, 1.27 mm (0.050") pitch
Connector, ground selection 2 pole screw terminal
Standard CCITT X21
Communication speed 64 kbit/s
Insulation 1 kV
Maximum cable length 100 m
19.2.19 GPS time synchronization module (GSM)
This module includes the GPS receiver used for time synchronization. The GPS
has one SMA contact for connection to an antenna.
19.2.19.2 Design
The GPS time synchronization module is 6U high and occupies one slot. The slot
closest to the NUM shall always be used.
The GSM consists of
• CAN carrier module (CCM)

• GPS clock module (GCM)
• GPS receiver unit
The CCM is a carrier board for the GCM mezzanine PMC card and GPS unit, see
figure 481. There is a cable between the external antenna input on the back of the
GCM and the GPS-receiver. This is a galvanic connection vulnerable to electro-
magnetic interference. The connector is shielded and directly attached to a
grounded plate to reduce the risk. The second cable is a flat cable that connects the
GPS and the GCM. It is used for communication between the GCM and the GPS-
receiver. All communication between the GCM and the NUM is via the CAN-bus.
The CMPPS signal is sent from the GCM to the rest of the time system to provide
1µs accuracy at sampling level.
916
Hardware
PMC
GPS GPS clock
GPS antenna
receiver module
CMPPS
Backplane CAN
CAN
connector
controller CAN
en05000675.vsd
IEC05000675 V1 EN
Figure 480: GSM block diagram
917
Hardware
en07000086.vsd
IEC07000086 V1 EN
Figure 481: A CCM with the GCM and GPS mounted with cables
1 GPS receiver
2 GPS Clock module (GCM)
3 CAN carrier module (CCM)
4 Antenna connector

Table 628: GPS time synchronization module (GSM)
Receiver – ±1µs relative UTC
Time to reliable time reference with antenna in new <30 minutes –
position or after power loss longer than 1 month
Time to reliable time reference after a power loss <15 minutes –
longer than 48 hours
Time to reliable time reference after a power loss <5 minutes –
shorter than 48 hours
918
Hardware
19.2.20 GPS antenna
In order to receive GPS signals from the satellites orbiting the earth a GPS antenna
with applicable cable must be used.
19.2.20.2 Design
The antenna with a console for mounting on a horizontal or vertical flat surface or
on an antenna mast. See figure 482
1 6
4 7
xx04000155.vsd
IEC04000155 V1 EN
Figure 482: Antenna with console
where:
1 GPS antenna
2 TNC connector
3 Console, 78x150 mm
4 Mounting holes 5.5 mm
5 Tab for securing of antenna cable
6 Vertical mounting position
7 Horizontal mounting position
Always position the antenna and its console so that a continuous clear line-of-sight
visibility to all directions is obtained, preferably more than 75%. A minimum of
50% clear line-of-sight visibility is required for un-interrupted operation.
919
Hardware
99001046.vsd
IEC99001046 V1 EN
Figure 483: Antenna line-of-sight
Antenna cable
Use a 50 ohm coaxial cable with a male TNC connector in the antenna end and a
male SMA connector in the receiver end to connect the antenna to GSM. Choose
cable type and length so that the total attenuation is max. 26 dB at 1.6 GHz.
Make sure that the antenna cable is not charged when connected to
the antenna or to the receiver. Short-circuit the end of the antenna
cable with some metal device, when first connected to the antenna.
When the antenna is connected to the cable, connect the cable to the
receiver. REx670 must be switched off when the antenna cable is
connected.

Table 629: GPS – Antenna and cable
Function Value
Max antenna cable attenuation 26 db @ 1.6 GHz
Antenna cable impedance 50 ohm
Lightning protection Must be provided externally
Antenna cable connector SMA in receiver end
TNC in antenna end
920
Hardware
19.2.21 IRIG-B time synchronization module IRIG-B
The IRIG-B time synchronizing module is used for accurate time synchronizing of
the IED from a station clock.
The Pulse Per Second (PPS) input shall be used for synchronizing when IEC
61850-9-2LE is used.
Electrical (BNC) and optical connection (ST) for 0XX and 12X IRIG-B support.
19.2.21.2 Design
The IRIG-B module have two inputs. One input is for the IRIG-B that can handle
both a pulse-width modulated signal (also called unmodulated) and an amplitude
modulated signal (also called sine wave modulated). The other is an optical input
type ST for PPS to synchronize the time between several protections.
32 MHz FPGA
connector
PCI-con
OPTO_INPUT
ST-
PCI-bus
Registers
PCI-Controller
PCI-con
4 mm barrier
IRIG- IRIG_INPUT
connector
Amplitude
ID-chip Decoder
BNC-
modulator
Capture1 Isolated
ZXING
receiver
Zero-cross
Capture2 detector
MPPS
IO-con
PPS
TSU Isolated
DC/DC
CMPPS 5 to +- 12V
en06000303.vsd
IEC06000303 V1 EN
Figure 484: IRIG-B block diagram
921
Hardware
A1
DC//DC
ST
C
Y2
C
C
A1
C
O
T
3
2
O
en06000304.vsd
IEC06000304 V1 EN
Figure 485: IRIG-B PC-MIP board with top left ST connector for PPS 820 nm
multimode fibre optic signal input and lower left BNC connector for
IRIG-B signal input

Table 630: IRIG-B
Quantity Rated value
Number of channels IRIG-B 1
Number of channels PPS 1
Electrical connector IRIG-B BNC
Optical connector PPS and IRIG-B Type ST
Type of fibre 62.5/125 μm multimode fibre
922
Hardware
19.3 Dimensions
19.3.1 Case without rear cover
A
D
B C
xx08000164.vsd
IEC08000164 V1 EN
Figure 486: Case without rear cover
923
Hardware
K
F
G
H J
xx08000166.vsd
IEC08000166 V1 EN
Figure 487: Case without rear cover with 19” rack mounting kit
Case size (mm) A B C D E F G H J K

6U, 1/2 x 19” 265.9 223.7 201.1 252.9 205.7 190.5 203.7 - 187.6 -
6U, 3/4 x 19” 265.9 336.0 201.1 252.9 318.0 190.5 316.0 - 187.6 -
6U, 1/1 x 19” 265.9 448.3 201.1 252.9 430.3 190.5 428.3 465.1 187.6 482.6
The H and K dimensions are defined by the 19” rack mounting kit
924
Hardware
19.3.2 Case with rear cover
A
D
B
C
xx08000163.vsd
IEC08000163 V1 EN
Figure 488: Case with rear cover
925
Hardware
K
F
G
J
H
xx08000165.vsd
IEC08000165 V1 EN
Figure 489: Case with rear cover and 19” rack mounting kit
xx05000503.vsd
IEC05000503 V1 EN
Figure 490: Rear cover case with details
Case size (mm) A B C D E F G H J K

6U, 1/2 x 19” 265.9 223.7 242.1 255.8 205.7 190.5 203.7 - 228.6 -
6U, 3/4 x 19” 265.9 336.0 242.1 255.8 318.0 190.5 316.0 - 228.6 -
6U, 1/1 x 19” 265.9 448.3 242.1 255.8 430.3 190.5 428.3 465.1 228.6 482.6
The H and K dimensions are defined by the 19” rack mounting kit.
926
Hardware
19.3.3 Flush mounting dimensions
A C
B
E
D
xx08000162.vsd
IEC08000162 V1 EN
Figure 491: Flush mounting
Cut-out dimensions (mm)

Case size
Tolerance A B C D
+/-1 +/-1
6U, 1/2 x 19" 210.1 254.3 4.0-10.0 12.5
6U, 3/4 x 19" 322.4 254.3 4.0-10.0 12.5
6U, 1/1 x 19" 434.7 254.3 4.0-10.0 12.5
E = 188.6 mm without rear protection cover, 229.6 mm with rear protection cover
927
Hardware
19.3.4 Side-by-side flush mounting dimensions
xx06000182.vsd
IEC06000182 V1 EN
Figure 492: A 1/2 x 19” size 670 series IED side-by-side with RHGS6.
G
D
B
E
F
C
xx05000505.vsd
IEC05000505 V1 EN
Figure 493: Panel-cut out dimensions for side-by-side flush mounting
928
Hardware
19.3.5 Wall mounting dimensions
B
E
C
D
en04000471.vsd
IEC04000471 V1 EN
Figure 494: Wall mounting
Case size (mm) A B C D E

6U, 1/2 x 19” 292.0 267.1 272.8 390.0 243.0
6U, 3/4 x 19” 404.3 379.4 272.8 390.0 243.0
6U, 1/1 x 19” 516.0 491.1 272.8 390.0 243.0
19.3.6 External resistor unit for high impedance differential

protection
WARNING! - USE EXTREME CAUTION!Dangerously high

voltages might be present on this equipment, especially on the plate
with resistors. Do any maintenance ONLY if the primary object
protected with this equipment is de-energized. If required by
national low/standard enclose the plate with resistors with a
protective cover or in a separate box!
929
Hardware
[1.48]
[6.97]
[4.02]
[0.33] [18.31] [0.79] [7.68]

[18.98]
Dimension
mm [inches] xx06000232.eps
IEC06000232 V1 EN
Figure 495: Dimension drawing of a one phase impedance resistor unit

[1.50]
[10.47]
[7.50]
[0.33] [18.31] [0.79] [7.68]

[18.98]
en06000234.eps
[inches]
IEC06000234 V1 EN
Figure 496: Dimension drawing of a three phase high impedance resistor unit
19.4 Mounting alternatives
19.4.1 Flush mounting
19.4.1.1 Overview
The flush mounting kit are utilized for case sizes:
• 1/2 x 19”
• 3/4 x 19”
• 1/1 x 19”
• 1/4 x 19” (RHGS6 6U)
930
Hardware
Only a single case can be mounted in each cut-out on the cubicle panel, for class
IP54 protection.
Flush mounting cannot be used for side-by-side mounted IEDs

when IP54 class must be fulfilled. Only IP20 class can be obtained
when mounting two cases side-by-side in one (1) cut-out.
To obtain IP54 class protection, an additional factory mounted

sealing must be ordered when ordering the IED.
931
Hardware
19.4.1.2 Mounting procedure for flush mounting
xx08000161.vsd
IEC08000161 V1 EN
Figure 497: Flush mounting details.
PosNo Description Quantity Type

1 Sealing strip, used to obtain IP54 class. The sealing strip is factory - -
mounted between the case and front plate.
2 Fastener 4 -
3 Groove - -
4 Screw, self tapping 4 2.9x9.5 mm
5 Joining point of sealing strip - -
6 Panel - -
932
Hardware
19.4.2 19” panel rack mounting
19.4.2.1 Overview
All IED sizes can be mounted in a standard 19” cubicle rack by using the for each
size suited mounting kit which consists of two mounting angles and fastening
screws for the angles.
The mounting angles are reversible which enables mounting of IED size 1/2 x 19”
or 3/4 x 19” either to the left or right side of the cubicle.
Please note that the separately ordered rack mounting kit for side-by-
side mounted IEDs, or IEDs together with RHGS cases, is to be
selected so that the total size equals 19”.
When mounting the mounting angles, be sure to use screws that

follows the recommended dimensions. Using screws with other
dimensions than the original may damage the PCBs inside the IED.
933
Hardware
19.4.2.2 Mounting procedure for 19” panel rack mounting
1a
1b
xx08000160.vsd
IEC08000160 V1 EN
Figure 498: 19” panel rack mounting details
Pos Description Quantity Type

1a, 1b Mounting angels, which can be mounted, either to 2 -
the left or right side of the case.
2 Screw 8 M4x6
19.4.3 Wall mounting
19.4.3.1 Overview
All case sizes, 1/2 x 19”, 3/4 x 19” and 1/1 x 19”, can be wall mounted. It is also
possible to mount the IED on a panel or in a cubicle.
934
Hardware
When mounting the side plates, be sure to use screws that follows
the recommended dimensions. Using screws with other dimensions
than the original may damage the PCBs inside the IED.
If fiber cables are bent too much, the signal can be weakened. Wall
mounting is therefore not recommended for communication
modules with fiber connection; Serial SPA/IEC 60870-5-103 and
LON communication module (SLM), Optical Ethernet module
(OEM) and Line data communication module (LDCM).
19.4.3.2 Mounting procedure for wall mounting
3
4
2
6
xx04000453.vs d
DOCUMENT127716-IMG2265 V1 EN
Figure 499: Wall mounting details.

1 Bushing 4 -
2 Screw 8 M4x10
3 Screw 4 M6x12 or
corresponding
935
Hardware
4 Mounting bar 2 -
5 Screw 6 M5x8
6 Side plate 2 -
19.4.3.3 How to reach the rear side of the IED
The IED can be equipped with a rear protection cover, which is recommended to
use with this type of mounting. See figure 500.
To reach the rear side of the IED, a free space of 80 mmis required on the unhinged
side.
View from above
3
1
80 mm 2
en06000135.vsd
IEC06000135 V1 EN
Figure 500: How to reach the connectors on the rear side of the IED.
PosNo Description Type

1 Screw M4x10
2 Screw M5x8
3 Rear protection cover -
19.4.4 Side-by-side 19” rack mounting
19.4.4.1 Overview
IED case sizes, 1/2 x 19” or 3/4 x 19” and RHGS cases, can be mounted side-by-
side up to a maximum size of 19”. For side-by-side rack mounting, the side-by-side
mounting kit together with the 19” rack panel mounting kit must be used. The
mounting kit has to be ordered separately.
936
Hardware
When mounting the plates and the angles on the IED, be sure to use
screws that follows the recommended dimensions. Using screws
with other dimensions than the original may damage the PCBs
inside the IED.
19.4.4.2 Mounting procedure for side-by-side rack mounting
2
1
xx04000456.vsd
IEC04000456 V1 EN
Figure 501: Side-by-side rack mounting details.

1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
19.4.4.3 IED in the 670 series mounted with a RHGS6 case
An 1/2 x 19” or 3/4 x 19” size IED can be mounted with a RHGS (6 or 12
depending on IED size) case. The RHGS case can be used for mounting a test
switch of type RTXP 24. It also has enough space for a terminal base of RX 2 type
for mounting of, for example, a DC-switch or two trip IEDs.
937
Hardware
1 2
1 2 1 2
1 1 1 1
2 2 2 2
3 3 3 3
4 4 4 4
5 5 5 5
6 6 6 6
7 7 7 7
8 8 8 8
xx06000180.vsd
IEC06000180 V1 EN
Figure 502: IED in the 670 series (1/2 x 19”) mounted with a RHGS6 case
containing a test switch module equipped with only a test switch
and a RX2 terminal base
19.4.5 Side-by-side flush mounting
19.4.5.1 Overview
It is not recommended to flush mount side by side mounted cases if IP54 is

required. If your application demands side-by-side flush mounting, the side-by-side
mounting details kit and the 19” panel rack mounting kit must be used. The
mounting kit has to be ordered separately. The maximum size of the panel cut out
is 19”.
With side-by-side flush mounting installation, only IP class 20 is

obtained. To reach IP class 54, it is recommended to mount the
IEDs separately. For cut out dimensions of separately mounted
IEDs, see section "Flush mounting".
When mounting the plates and the angles on the IED, be sure to use
screws that follows the recommended dimensions. Using screws
with other dimensions than the original may damage the PCBs
inside the IED.
938
Hardware
Please contact factory for special add on plates for mounting FT

switches on the side (for 1/2 19" case) or bottom of the relay.
19.4.5.2 Mounting procedure for side-by-side flush mounting
1 2
xx06000181.vsd
IEC06000181 V1 EN
Figure 503: Side-by-side flush mounting details (RHGS6 side-by-side with 1/2 x
19” IED).

1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
19.5 Technical data
19.5.1 Enclosure
Table 631: Case
Material Steel sheet
Front plate Steel sheet profile with cut-out for HMI
Surface treatment Aluzink preplated steel
Finish Light grey (RAL 7035)
939
Hardware
Table 632: Water and dust protection level according to IEC 60529
Front IP40 (IP54 with sealing strip)

Rear, sides, top and IP20
bottom
Table 633: Weight

Case size Weight
6U, 1/2 x 19” £ 10 kg
6U, 3/4 x 19” £ 15 kg
6U, 1/1 x 19” £ 18 kg
19.5.2 Connection system

Table 634: CT and VT circuit connectors
Connector type Rated voltage and current Maximum conductor area
Screw compression type 250 V AC, 20 A 4 mm2 (AWG12)
2 x 2.5 mm2 (2 x AWG14)
Terminal blocks suitable for 250 V AC, 20 A 4 mm2 (AWG12)
ring lug terminals
Table 635: Binary I/O connection system

Connector type Rated voltage Maximum conductor area
Screw compression type 250 V AC 2.5 mm2
2 × 1 mm2
Terminal blocks suitable for 300 V AC 3 mm2
ring lug terminals
Because of limitations of space, when ring lug terminal is ordered

for Binary I/O connections, one blank slot is necessary between two
adjacent IO cards. Please refer to the ordering particulars for details.
19.5.3 Influencing factors

Table 636: Temperature and humidity influence
Parameter Reference value Nominal range Influence
Ambient temperature, +20 °C -10 °C to +55 °C 0.02% /°C
operate value
Relative humidity 10%-90% 10%-90% -
Operative range 0%-95%
Storage temperature -40 °C to +70 °C - -
940
Hardware
Table 637: Auxiliary DC supply voltage influence on functionality during operation

Dependence on Reference value Within nominal range Influence
Ripple, in DC auxiliary voltage max. 2% 12% of EL 0.01% /%
Operative range Full wave rectified
Auxiliary voltage dependence, operate ± 20% of EL 0.01% /%
value
Interrupted auxiliary DC voltage 24-60 V DC ± 20%
90-250 V DC ± 20%
Interruption
interval
0–50 ms No restart
0–∞ s Correct
behaviour at
power down
Restart time <180 s
Table 638: Frequency influence (reference standard: IEC 60255–6)

Dependence on Within nominal range Influence
Frequency dependence, fr ± 2.5 Hz for 50 Hz ± 1.0% / Hz
operate value fr ± 3.0 Hz for 60 Hz
Harmonic frequency 2nd, 3rd and 5th harmonic of fr ± 1.0%

dependence (20%
content)
Harmonic frequency 2nd, 3rd and 5th harmonic of fr ± 6.0%
dependence for distance
protection (10% content)
Harmonic frequency 2nd, 3rd and 5th harmonic of fr ±5.0%
dependence for high
impedance differential
protection (10% content)
19.5.4 Type tests according to standard

Table 639: Electromagnetic compatibility
Test Type test values Reference standards
1 MHz burst disturbance 2.5 kV IEC 60255-22-1, Class III
Ring wave immunity test 2-4 kV IEC 61000-4-12, Class III
Surge withstand capability 2.5 kV, oscillatory IEEE/ANSI C37.90.1
test 4.0 kV, fast transient
Electrostatic discharge 15 kV air discharge IEC 60255-22-2, Class IV
Direct application 8 kV contact discharge
Indirect application 8 kV contact discharge IEC 61000-4-2, Class IV
Electrostatic discharge 15 kV air discharge IEEE/ANSI C37.90.1
Direct application 8 kV contact discharge
Indirect application 8 kV contact discharge
Fast transient disturbance 4 kV IEC 60255-22-4, Class A
941
Hardware

Surge immunity test 1-2 kV, 1.2/50 ms IEC 60255-22-5
high energy
Power frequency immunity 150-300 V, IEC 60255-22-7, Class A
test 50 Hz
Conducted common mode 15 Hz-150 kHz IEC 61000-4-16, Class IV
immunity test
Power frequency magnetic 1000 A/m, 3 s IEC 61000-4-8, Class V
field test
Damped oscillatory magnetic 100 A/m IEC 61000-4-10, Class V
field test
Radiated electromagnetic 20 V/m, 80-1000 MHz IEC 60255-22-3
field disturbance
Radiated electromagnetic 20 V/m, 80-2500 MHz EN 61000-4-3
field disturbance
Radiated electromagnetic 35 V/m IEEE/ANSI C37.90.2
field disturbance 26-1000 MHz
Conducted electromagnetic 10 V, 0.15-80 MHz IEC 60255-22-6
field disturbance
Radiated emission 30-1000 MHz IEC 60255-25
Conducted emission 0.15-30 MHz IEC 60255-25
Table 640: Insulation

Test Type test values Reference standard
Dielectric test 2.0 kV AC, 1 min. IEC 60255-5
Impulse voltage test 5 kV, 1.2/50 ms, 0.5 J
Insulation resistance >100 MW at 500 VDC
Table 641: Environmental tests

Test Type test value Reference standard
Cold test Test Ad for 16 h at -25°C IEC 60068-2-1
Storage test Test Ad for 16 h at -40°C IEC 60068-2-1
Dry heat test Test Bd for 16 h at +70°C IEC 60068-2-2
Damp heat test, steady state Test Ca for 4 days at +40 °C IEC 60068-2-78
and humidity 93%
Damp heat test, cyclic Test Db for 6 cycles at +25 IEC 60068-2-30
to +55 °C and humidity 93 to
95% (1 cycle = 24 hours)
Table 642: CE compliance

Test According to
Immunity EN 50263
Emissivity EN 50263
Low voltage directive EN 50178
942
Hardware
Table 643: Mechanical tests

Vibration response test Class II IEC 60255-21-1
Vibration endurance test Class I IEC 60255-21-1
Shock response test Class II IEC 60255-21-2
Shock withstand test Class I IEC 60255-21-2
Bump test Class I IEC 60255-21-2
Seismic test Class II IEC 60255-21-3
943
944
Labels
Section 20 Labels
About this chapter

This chapter includes descriptions of the different labels and where to find them on
the IED.
20.1 Different labels
2
3
6
6 5
7
xx06000574.eps
IEC06000574 V1 EN
945
Labels
1 Product type, description and serial number

2 Order number, dc supply voltage and rated
frequency
3 Optional, customer specific information
4 Manufacturer
5 Transformer input module, rated currents
and voltages
6 Transformer designations
IEC06000577-CUSTOMER-SPECIFIC V1 EN
7 Ordering and serial number
IEC06000576-POS-NO V1 EN
946
Labels
4
en06000573.eps
IEC06000573 V1 EN
1 Warning label
2 Caution label
3 Class 1 laser product label
IEC06000575 V1 EN
4 Warning label
947
948
Connection diagrams
Section 21 Connection diagrams
This chapter includes diagrams of the IED with all slot, terminal block and optical
connector designations. It is a necessary guide when making electrical and optical
connections to the IED.
949
Connection diagrams
IEC08000470 V1 EN
950
Connection diagrams
IEC08000471 V1 EN
951
Connection diagrams
IEC08000472 V1 EN
952
Connection diagrams
IEC08000473 V1 EN
953
Connection diagrams
IEC08000474 V1 EN
954
Connection diagrams
IEC08000475 V1 EN
955
Connection diagrams
IEC08000476 V1 EN
956
Connection diagrams
IEC08000477 V1 EN
957
Connection diagrams
IEC08000478 V1 EN
958
Connection diagrams
IEC08000479 V1 EN
959
Connection diagrams
IEC08000480 V1 EN
960
Connection diagrams
IEC08000481 V1 EN
961
Connection diagrams
IEC08000482 V1 EN
962
Connection diagrams
IEC08000483 V1 EN
963
Connection diagrams
IEC08000484 V1 EN
964
Inverse time characteristics
Section 22 Inverse time characteristics
About this chapter

This chapter describes current and voltage dependant time functionality. Both
ANSI and IEC Inverse time curves and tables are included.
22.1 Application
In order to assure time selectivity between different overcurrent protections at

different points in the network different time delays for the different protections are
normally used. The simplest way to do this is to use definite time-lag. In more
sophisticated applications current dependent time characteristics are used. Both
alternatives are shown in a simple application with three overcurrent protections
operating in series.
I> I> I>

xx05000129.vsd
IEC05000129 V1 EN
Figure 504: Three overcurrent protections operating in series
Stage 3
Time
Stage 2 Stage 2
Stage 1 Stage 1 Stage 1
Fault point
position
en05000130.vsd
IEC05000130 V1 EN
Figure 505: Definite time overcurrent characteristics
965
Time
Fault point
position
en05000131.vsd
IEC05000131 V1 EN
Figure 506: Inverse time overcurrent characteristics with inst. function
The inverse time characteristic makes it possible to minimize the fault clearance
time and still assure the selectivity between protections.
To assure selectivity between protections there must be a time margin between the
operation time of the protections. This required time margin is dependent of
following factors, in a simple case with two protections in series:
• Difference between pickup time of the protections to be co-ordinated

• Opening time of the breaker closest to the studied fault
• Reset times of the protections
• Margin dependent of the time delay inaccuracy of the protections
Assume we have the following network case.
966
A1 B1
Feeder
I> I>
Time axis
t=0 t=t1 t=t2 t=t3
en05000132.vsd
IEC05000132 V1 EN
Figure 507: Selectivity steps for a fault on feeder B1
where:
t=0 is The fault occurs
t=t1 is Protection B1 trips
t=t2 is Breaker at B1 opens
t=t3 is Protection A1 resets
In the case protection B1 shall operate without any intentional delay

(instantaneous). When the fault occurs the protections start to detect the fault
current. After the time t1 the protection B1 send a trip signal to the circuit breaker.
The protection A1 starts its delay timer at the same time, with some deviation in
time due to differences between the two protections. There is a possibility that A1
will start before the trip is sent to the B1 circuit breaker. At the time t2 the circuit
breaker B1 has opened its primary contacts and thus the fault current is interrupted.
The breaker time (t2 - t1) can differ between different faults. The maximum
opening time can be given from manuals and test protocols. Still at t2 the timer of
protection A1 is active. At time t3 the protection A1 is reset, that is the timer is stopped.
In most applications it is required that the times shall reset as fast as possible when
the current fed to the protection drops below the set current level, the reset time
shall be minimized. In some applications it is however beneficial to have some type
of delayed reset time of the overcurrent function. This can be the case in the
following applications:
967
• If there is a risk of intermittent faults. If the current IED, close to the faults,
starts and resets there is a risk of unselective trip from other protections in the
system.
• Delayed resetting could give accelerated fault clearance in case of automatic
reclosing to a permanent fault.
• Overcurrent protection functions are sometimes used as release criterion for
other protection functions. It can often be valuable to have a reset delay to
assure the release function.
22.2 Principle of operation
22.2.1 Mode of operation

The function can operate in a definite time-lag mode or in a current definite inverse
time mode. For the inverse time characteristic both ANSI and IEC based standard
curves are available. Also programmable curve types are supported via the
component inputs: p, A, B, C pr, tr, and cr.
Different characteristics for reset delay can also be chosen.
If current in any phase exceeds the set start current value (here internal signal
startValue), a timer, according to the selected operating mode, is started. The
component always uses the maximum of the three phase current values as the
current level used in timing calculations.
In case of definite time-lag mode the timer will run constantly until the time is
reached or until the current drops below the reset value (start value minus the
hysteresis) and the reset time has elapsed.
For definite time delay curve ANSI/IEEE Definite time or IEC Definite time are
chosen.
The general expression for inverse time curves is according to equation 161.
æ ö
ç A
÷
t[ s ] = ç + B ÷×k
ç æ i öp ÷
çç ÷ -C ÷
è è in > ø ø
where:
p, A, B, C are constants defined for each curve type,
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current.
968
For inverse time characteristics a time will be initiated when the current reaches the
set start level. From the general expression of the characteristic the following can
be seen:
ææ i öp ö
(top - B × k ) × ç ç ÷ - C ÷ = A×k
è è in > ø ø
where:
top is the operating time of the protection
The time elapsed to the moment of trip is reached when the integral fulfils
according to equation 163, in addition to the constant time delay:
t
ææ i öp ö
ò ç çè in > ÷ø - C ÷ × dt ³ A × k
0 è ø
For the numerical protection the sum below must fulfil the equation for trip.
n æ æ i( j ) ö p ö
Dt × å ç ç ÷ - C ÷ ³ A× k
j =1 è è in > ø ø
where:
j=1 is the first protection execution cycle when a fault has been
detected, that is, when
i
>1
in >
EQUATION1193 V1 EN
Dt is the time interval between two consecutive executions of the

protection algorithm,
n is the number of the execution of the algorithm when the trip
time equation is fulfilled, that is, when a trip is given and
i (j) is the fault current at time j
For inverse time operation, the inverse time characteristic is selectable. Both the
IEC and ANSI/IEEE standardized inverse time characteristics are supported.
For the IEC curves there is also a setting of the minimum time-lag of operation, see
figure 508.
969
Operate
time
tMin
Current
IMin
IEC05000133 V2 EN
Figure 508: Minimum time-lag operation for the IEC curves
In order to fully comply with IEC curves definition setting parameter tMin shall be
set to the value which is equal to the operating time of the selected IEC inverse
time curve for measured current of twenty times the set current pickup value. Note
that the operating time value is dependent on the selected setting value for time
multiplier k.
In addition to the ANSI and IEC standardized characteristics, there are also two
additional inverse curves available; the RI curve and the RD curve.
The RI inverse time curve emulates the characteristic of the electromechanical

ASEA relay RI. The curve is described by equation 166:
æ ö
ç k ÷
t[ s ] = ç
in > ÷
ç 0.339 - 0.235 × ÷
è i ø
where:
in> is the set start current for step n
k is set time multiplier for step n
i is the measured current
970
The RD inverse curve gives a logarithmic delay, as used in the Combiflex

protection RXIDG. The curve enables a high degree of selectivity required for
sensitive residual earth-fault current protection, with ability to detect high-resistive
earth faults. The curve is described by equation 167:
æ i ö
t[ s ] = 5.8 - 1.35 × ln ç ÷
è k × in > ø
where:
in> is the set start current for step n,
k is set time multiplier for step n and
i is the measured current
If the curve type programmable is chosen, the user can make a tailor made inverse
time curve according to the general equation 168.
æ ö
ç A
÷
t[ s ] = ç + B÷×k
ç æ i öp ÷
çç ÷ -C ÷
è è in > ø ø
Also the reset time of the delayed function can be controlled. There is the
possibility to choose between three different reset time-lags.
• Instantaneous Reset
• IEC Reset
• ANSI Reset.
If instantaneous reset is chosen the timer will be reset directly when the current
drops below the set start current level minus the hysteresis.
If IEC reset is chosen the timer will be reset after a set constant time when the
current drops below the set start current level minus the hysteresis.
If ANSI reset time is chosen the reset time will be dependent of the current after
fault clearance (when the current drops below the start current level minus the
hysteresis). The timer will reset according to equation 169.
971
æ ö
ç tr ÷
t [s] = ç ÷×k
çæ i ö ÷
2
çç ÷ -1 ÷
è è in > ø ø
where:
The set value tr is the reset time in case of zero current after fault clearance.
The possibility of choice of reset characteristics is to some extent dependent of the

choice of time delay characteristic.
For the definite time delay characteristics the possible reset time settings are
instantaneous and IEC constant time reset.
For ANSI inverse time delay characteristics all three types of reset time
characteristics are available; instantaneous, IEC constant time reset and ANSI
current dependent reset time.
For IEC inverse time delay characteristics the possible delay time settings are
instantaneous and IEC set constant time reset).
For the programmable inverse time delay characteristics all three types of reset
time characteristics are available; instantaneous, IEC constant time reset and ANSI
current dependent reset time. If the current dependent type is used settings pr, tr
and cr must be given, see equation 170:
æ ö
ç tr ÷
t [s] = ç ÷×k
çæ i ö ÷
pr
çç ÷ - cr ÷
è è in > ø ø
For RI and RD inverse time delay characteristics the possible delay time settings
are instantaneous and IEC constant time reset.
972
22.3 Inverse characteristics
Table 644: ANSI Inverse time characteristics

Operating characteristic: k = (0.05-999) in steps of -
0.01 unless otherwise stated
æ A ö
t = ç P + B÷ × k
ç ( I - 1) ÷
è ø
EQUATION1249-SMALL V1 EN
Reset characteristic:
tr
t = ×k
(I 2
)
-1
I = Imeasured/Iset
ANSI Extremely Inverse A=28.2, B=0.1217, P=2.0 , ANSI/IEEE C37.112,

tr=29.1 class 5 + 30 ms
ANSI Very inverse A=19.61, B=0.491, P=2.0 ,
tr=21.6
ANSI Normal Inverse A=0.0086, B=0.0185,
P=0.02, tr=0.46
ANSI Moderately Inverse A=0.0515, B=0.1140,
P=0.02, tr=4.85
ANSI Long Time Extremely Inverse A=64.07, B=0.250, P=2.0,
tr=30
ANSI Long Time Very Inverse A=28.55, B=0.712, P=2.0,
tr=13.46
ANSI Long Time Inverse k=(0.05-999) in steps of 0.01
A=0.086, B=0.185, P=0.02,
tr=4.6
973
Table 645: IEC Inverse time characteristics

Operating characteristic: k = (0.05-999) in steps of 0.01 -
æ A ö
t = ç P ÷×k
ç ( I - 1) ÷
è ø
I = Imeasured/Iset
Time delay to reset, IEC inverse time (0.000-60.000) s ± 0.5% of set time ± 10
ms
IEC Normal Inverse A=0.14, P=0.02 IEC 60255-3, class 5 +
40 ms
IEC Very inverse A=13.5, P=1.0
IEC Inverse A=0.14, P=0.02
IEC Extremely inverse A=80.0, P=2.0
IEC Short time inverse A=0.05, P=0.04
IEC Long time inverse A=120, P=1.0
Programmable characteristic k = (0.05-999) in steps of 0.01 IEC 60255, class 5 + 40
Operate characteristic: A=(0.005-200.000) in steps ms
of 0.001
æ A ö B=(0.00-20.00) in steps of
t = ç P + B÷ × k 0.01
ç (I - C ) ÷ C=(0.1-10.0) in steps of 0.1
è ø
P=(0.005-3.000) in steps of
0.001
Reset characteristic: TR=(0.005-100.000) in steps
of 0.001
TR CR=(0.1-10.0) in steps of 0.1
t = ×k PR=(0.005-3.000) in steps of
(I PR
- CR ) 0.001
I = Imeasured/Iset
Table 646: RI and RD type inverse time characteristics

RI type inverse characteristic k = (0.05-999) in steps of 0.01 IEC 60255-3, class 5 +
40 ms
1
t = ×k
0.236
0.339 -
I
I = Imeasured/Iset
RD type logarithmic inverse characteristic k = (0.05-999) in steps of 0.01 IEC 60255-3, class 5 +
40 ms
æ I ö
t = 5.8 - ç 1.35 × In ÷
è k ø
I = Imeasured/Iset
974
Table 647: Inverse time characteristics for overvoltage protection

Type A curve: k = (0.05-1.10) in Class 5 +40 ms
steps of 0.01 unless
k otherwise stated
t =
æU -U >ö
ç ÷
è U> ø
U> = Uset
U = Umeasured
Type B curve: k = (0.05-1.10) in

k × 480 otherwise stated
t =
2.0
æ 32 × U - U > - 0.5 ö
ç ÷ - 0.035
è U > ø
Type C curve: k = (0.05-1.10) in

t =
3.0
æ 32 × U - U > - 0.5 ö
ç ÷ - 0.035
è U > ø
Programmable curve: k = (0.05-1.10) in

k×A otherwise stated
t = +D A = (0.005-200.000)
P
æB × U - U > ö in steps of 0.001
ç -C÷
B = (0.50-100.00) in
è U > ø
steps of 0.01
C = (0.0-1.0) in
steps of 0.1
D = (0.000-60.000)
in steps of 0.001
P = (0.000-3.000) in
steps of 0.001
975
Table 648: Inverse time characteristics for undervoltage protection

Type A curve: k = (0.05-1.10) in Class 5 +40 ms
k otherwise stated
t =
æ U < -U
ö
ç ÷
è U< ø
U< = Uset
U = UVmeasured
Type B curve: k = (0.05-1.10) in

t = + 0.055
2.0
æ 32 × U < -U - 0.5 ö
ç ÷
è U < ø
U< = Uset
U = Umeasured
Programmable curve: k = (0.05-1.10) in

é ù otherwise stated
ê ú A = (0.005-200.000)
k×A in steps of 0.001
t =ê ú+D
ê æ U < -U P
ú B = (0.50-100.00) in
ö
êçB × -C÷ ú steps of 0.01
ëè U < ø û C = (0.0-1.0) in
steps of 0.1
U< = Uset D = (0.000-60.000)
in steps of 0.001
U = Umeasured
P = (0.000-3.000) in
steps of 0.001
976
Table 649: Inverse time characteristics for residual overvoltage protection

Type A curve: k = (0.05-1.10) in steps of Class 5 +40 ms
0.01
k
t =
æU -U >ö
ç ÷
è U> ø
U> = Uset
U = Umeasured
Type B curve: k = (0.05-1.10) in steps of

0.01
k × 480
t =
2.0
æ 32 × U - U > - 0.5 ö
ç ÷ - 0.035
è U > ø
Type C curve: k = (0.05-1.10) in steps of

0.01
k × 480
t =
3.0
æ 32 × U - U > - 0.5 ö
ç ÷ - 0.035
è U > ø
Programmable curve: k = (0.05-1.10) in steps of

0.01
k×A A = (0.005-200.000) in
t = +D steps of 0.001
P
æB × U - U > ö B = (0.50-100.00) in
ç -C÷
steps of 0.01
è U > ø
C = (0.0-1.0) in steps of
0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in
steps of 0.001
977
A070750 V2 EN
Figure 509: ANSI Extremely inverse time characteristics
978
A070751 V2 EN
Figure 510: ANSI Very inverse time characteristics
979
A070752 V2 EN
Figure 511: ANSI Normal inverse time characteristics
980
A070753 V2 EN
Figure 512: ANSI Moderately inverse time characteristics
981
A070817 V2 EN
Figure 513: ANSI Long time extremely inverse time characteristics
982
A070818 V2 EN
Figure 514: ANSI Long time very inverse time characteristics
983
A070819 V2 EN
Figure 515: ANSI Long time inverse time characteristics
984
A070820 V2 EN
Figure 516: IEC Normal inverse time characteristics
985
A070821 V2 EN
Figure 517: IEC Very inverse time characteristics
986
A070822 V2 EN
Figure 518: IEC Inverse time characteristics
987
A070823 V2 EN
Figure 519: IEC Extremely inverse time characteristics
988
A070824 V2 EN
Figure 520: IEC Short time inverse time characteristics
989
A070825 V2 EN
Figure 521: IEC Long time inverse time characteristics
990
A070826 V2 EN
Figure 522: RI-type inverse time characteristics
991
A070827 V2 EN
Figure 523: RD-type inverse time characteristics
992
GUID-ACF4044C-052E-4CBD-8247-C6ABE3796FA6 V1 EN
Figure 524: Inverse curve A characteristic of overvoltage protection
993
GUID-F5E0E1C2-48C8-4DC7-A84B-174544C09142 V1 EN
Figure 525: Inverse curve B characteristic of overvoltage protection
994
GUID-A9898DB7-90A3-47F2-AEF9-45FF148CB679 V1 EN
Figure 526: Inverse curve C characteristic of overvoltage protection
995
GUID-35F40C3B-B483-40E6-9767-69C1536E3CBC V1 EN
Figure 527: Inverse curve A characteristic of undervoltage protection
996
GUID-B55D0F5F-9265-4D9A-A7C0-E274AA3A6BB1 V1 EN
Figure 528: Inverse curve B characteristic of undervoltage protection
997
998
Glossary
Section 23 Glossary
About this chapter

This chapter contains a glossary with terms, acronyms and abbreviations used in
ABB technical documentation.
AC Alternating current
ACT Application configuration tool within PCM600
A/D converter Analog to digital converter
ADBS Amplitude dead-band supervision
ADM Analog digital conversion module, with time synchronization
ANSI American National Standards Institute
AR Autoreclosing
ArgNegRes Setting parameter/ZD/
ArgDir Setting parameter/ZD/
ASCT Auxiliary summation current transformer
ASD Adaptive signal detection
AWG American Wire Gauge standard
BBP Busbar protection
BFP Breaker failure protection
BIM Binary input module
BOM Binary output module
BR External bi-stable relay
BS British standard
BSR Binary signal transfer function, receiver blocks
BST Binary signal transfer function, transmit blocks
C37.94 IEEE/ANSI protocol used when sending binary signals
between IEDs
CAN Controller Area Network. ISO standard (ISO 11898) for
serial communication
CB Circuit breaker
CBM Combined backplane module
999
Glossary
CCITT Consultative Committee for International Telegraph and

Telephony. A United Nations sponsored standards body
within the International Telecommunications Union.
CCM CAN carrier module
CCVT Capacitive Coupled Voltage Transformer
Class C Protection Current Transformer class as per IEEE/ ANSI
CMPPS Combined mega pulses per second
CO cycle Close-open cycle
Co-directional Way of transmitting G.703 over a balanced line. Involves
two twisted pairs making it possible to transmit information
in both directions
COMTRADE Standard format according to IEC 60255-24
Contra-directional Way of transmitting G.703 over a balanced line. Involves
four twisted pairs of with two are used for transmitting data
in both directions, and two pairs for transmitting clock signals
CPU Central processor unit
CR Carrier receive
CRC Cyclic redundancy check
CS Carrier send
CT Current transformer
CVT Capacitive voltage transformer
DAR Delayed auto-reclosing
DARPA Defense Advanced Research Projects Agency (The US
developer of the TCP/IP protocol etc.)
DBDL Dead bus dead line
DBLL Dead bus live line
DC Direct current
DFT Discrete Fourier transform
DIP-switch Small switch mounted on a printed circuit board
DLLB Dead line live bus
DNP Distributed Network Protocol as per IEEE/ANSI Std.
1379-2000
DR Disturbance recorder
DRAM Dynamic random access memory
DRH Disturbance report handler
DSP Digital signal processor
DTT Direct transfer trip scheme
1000
Glossary
EHV network Extra high voltage network

EIA Electronic Industries Association
EMC Electro magnetic compatibility
EMF Electro motive force
EMI Electro magnetic interference
EnFP End fault protection
ESD Electrostatic discharge
FOX 20 Modular 20 channel telecommunication system for speech,
data and protection signals
FOX 512/515 Access multiplexer
FOX 6Plus Compact, time-division multiplexer for the transmission of
up to seven duplex channels of digital data over optical fibers
G.703 Electrical and functional description for digital lines used by
local telephone companies. Can be transported over balanced
and unbalanced lines
GCM Communication interface module with carrier of GPS
receiver module
GDE Graphical display editor within PCM600
GI General interrogation command
GIS Gas insulated switchgear
GOOSE Generic object oriented substation event
GPS Global positioning system
GSM GPS time synchronization module
HDLC protocol High level data link control, protocol based on the HDLC
standard
HFBR connector Plastic fiber connector
type
HMI Human machine interface
HSAR High speed auto reclosing
HV High voltage
HVDC High voltage direct current
IDBS Integrating dead band supervision
IEC International Electrical Committee
IEC 60044-6 IEC Standard, Instrument transformers – Part 6:
Requirements for protective current transformers for
transient performance
1001
Glossary
IEC 60870-5-103 Communication standard for protective equipment. A serial

master/slave protocol for point-to-point communication
IEC 61850 Substation Automation communication standard
IEEE Institute of Electrical and Electronics Engineers
IEEE 802.12 A network technology standard that provides 100 Mbits/s on
twisted-pair or optical fiber cable
IEEE P1386.1 PCI Mezzanine card (PMC) standard for local bus modules.
References the CMC (IEEE P1386, also known as Common
mezzanine card) standard for the mechanics and the PCI
specifications from the PCI SIG (Special Interest Group) for
the electrical EMF Electro Motive Force.
IED Intelligent electronic device
I-GIS Intelligent gas insulated switchgear
IOM Binary input/output module
Instance When several occurrences of the same function are available
in the IED they are referred to as instances of that function.
One instance of a function is identical to another of the same
kind but will have a different number in the IED user
interfaces. The word instance is sometimes defined as an
item of information that is representative of a type. In the
same way an instance of a function in the IED is
representative of a type of function.
IP 1. Internet protocol. The network layer for the TCP/IP
protocol suite widely used on Ethernet networks. IP is a
connectionless, best-effort packet switching protocol. It
provides packet routing, fragmentation and re-assembly
through the data link layer.
2. Ingression protection according to IEC standard
IP 20 Ingression protection, according to IEC standard, level 20
IRF Internal fail signal
IRIG-B: InterRange Instrumentation Group Time code format B,
standard 200
ITU International Telecommunications Union
LAN Local area network
LIB 520 High voltage software module
LCD Liquid crystal display
LDCM Line differential communication module
LDD Local detection device
1002
Glossary
LED Light emitting diode

LNT LON network tool
LON Local operating network
MCB Miniature circuit breaker
MCM Mezzanine carrier module
MIM Milli-ampere module
MPM Main processing module
MVB Multifunction vehicle bus. Standardized serial bus originally
developed for use in trains.
NCC National Control Centre
NUM Numerical module
OCO cycle Open-close-open cycle
OCP Overcurrent protection
OEM Optical ethernet module
OLTC On load tap changer
OV Over voltage
Overreach A term used to describe how the relay behaves during a fault
condition. For example a distance relay is over-reaching
when the impedance presented to it is smaller than the
apparent impedance to the fault applied to the balance point,
i.e. the set reach. The relay “sees” the fault but perhaps it
should not have seen it.
PCI Peripheral component interconnect, a local data bus
PCM Pulse code modulation
PCM600 Protection and control IED manager
PC-MIP Mezzanine card standard
PISA Process interface for sensors & actuators
PMC PCI Mezzanine card
POTT Permissive overreach transfer trip
Process bus Bus or LAN used at the process level, that is, in near
proximity to the measured and/or controlled components
PSM Power supply module
PST Parameter setting tool within PCM600
PT ratio Potential transformer or voltage transformer ratio
PUTT Permissive underreach transfer trip
RASC Synchrocheck relay, COMBIFLEX
1003
Glossary
RCA Relay characteristic angle

REVAL Evaluation software
RFPP Resistance for phase-to-phase faults
RFPE Resistance for phase-to-earth faults
RISC Reduced instruction set computer
RMS value Root mean square value
RS422 A balanced serial interface for the transmission of digital
data in point-to-point connections
RS485 Serial link according to EIA standard RS485
RTC Real time clock
RTU Remote terminal unit
SA Substation Automation
SC Switch or push-button to close
SCS Station control system
SCT System configuration tool according to standard IEC 61850
SLM Serial communication module. Used for SPA/LON/IEC
communication.
SMA connector Subminiature version A, A threaded connector with constant
impedance.
SMT Signal matrix tool within PCM600
SMS Station monitoring system
SNTP Simple network time protocol – is used to synchronize
computer clocks on local area networks. This reduces the
requirement to have accurate hardware clocks in every
embedded system in a network. Each embedded node can
instead synchronize with a remote clock, providing the
required accuracy.
SPA Strömberg protection acquisition, a serial master/slave
protocol for point-to-point communication
SRY Switch for CB ready condition
ST Switch or push-button to trip
Starpoint Neutral point of transformer or generator
SVC Static VAr compensation
TC Trip coil
TCS Trip circuit supervision
TCP Transmission control protocol. The most common transport
layer protocol used on Ethernet and the Internet.
1004
Glossary
TCP/IP Transmission control protocol over Internet Protocol. The de

facto standard Ethernet protocols incorporated into 4.2BSD
Unix. TCP/IP was developed by DARPA for internet
working and encompasses both network layer and transport
layer protocols. While TCP and IP specify two protocols at
specific protocol layers, TCP/IP is often used to refer to the
entire US Department of Defense protocol suite based upon
these, including Telnet, FTP, UDP and RDP.
TEF Time delayed earth-fault protection function
TNC connector Threaded Neill Concelman, A threaded constant impedance
version of a BNC connector
TPZ, TPY, TPX, Current transformer class according to IEC
TPS
Underreach A term used to describe how the relay behaves during a fault
condition. For example a distance relay is under-reaching
when the impedance presented to it is greater than the
apparent impedance to the fault applied to the balance point,
i.e. the set reach. The relay does not “see” the fault but
perhaps it should have seen it. See also Overreach.
U/I-PISA Process interface components that deliver measured voltage
and current values
UTC Coordinated universal time. A coordinated time scale,
maintained by the Bureau International des Poids et Mesures
(BIPM), which forms the basis of a coordinated
dissemination of standard frequencies and time signals. UTC
is derived from International Atomic Time (TAI) by the
addition of a whole number of "leap seconds" to synchronize
it with Universal Time 1 (UT1), thus allowing for the
eccentricity of the Earth"s orbit, the rotational axis tilt (23.5
degrees), but still showing the Earth"s irregular rotation, on
which UT1 is based. The Coordinated Universal Time is
expressed using a 24-hour clock and uses the Gregorian
calendar. It is used for aeroplane and ship navigation, where
it also sometimes known by the military name, "Zulu time".
"Zulu" in the phonetic alphabet stands for "Z" which stands
for longitude zero.
UV Undervoltage
WEI Weak end infeed logic
VT Voltage transformer
X.21 A digital signalling interface primarily used for telecom
equipment
3IO Three times zero-sequence current. Often referred to as the
residual or the earth-fault current
1005
Glossary
3UO Three times the zero sequence voltage. Often referred to as

the residual voltage or the neutral point voltage
1006
1007
Contact us
1MRK505183-UEN C © Copyright 2010 ABB. All rights reserved.

ABB AB
Substation Automation Products
SE-721 59 Västerås, Sweden
Phone +46 (0) 21 32 50 00
Fax +46 (0) 21 14 69 18
www.abb.com/substationautomation

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Relion® 670 series

Line differential protection RED670

© Copyright 2010 ABB. All rights reserved

The software or hardware described in this document is furnished under a license

This conformity is proved by tests conducted by ABB AB in accordance with the

This product is designed and produced for industrial use.

Section 2 Analog inputs..................................................................37

Section 3 Local HMI.......................................................................45

Input and output signals.........................................................54

Section 4 Basic IED functions........................................................65

Test mode functionality TEST..........................................................88

Section 5 Differential protection...................................................107

Section 6 Impedance protection ..................................................145

Directional impedance element for quadrilateral

Input and output signals............................................................216

Section 7 Current protection.........................................................287

Instantaneous phase overcurrent protection PHPIOC ..................287

Input and output signals............................................................332

Section 8 Voltage protection........................................................373

Section 9 Frequency protection....................................................427

Input and output signals............................................................431

Section 10 Multipurpose protection................................................441

Section 11 Secondary system supervision.....................................467

Apparatus control APC...................................................................515

Section 13 Scheme communication...............................................639

Weak-end infeed logic..........................................................653

Section 17 Station communication.................................................795

IEC 61850 generic communication I/O functions SPGGIO,

Section 18 Remote communication................................................861

Optical ethernet module (OEM).................................................909

Mounting procedure for wall mounting.................................935

Section 21 Connection diagrams...................................................949

Section 22 Inverse time characteristics..........................................965

About this chapter

1.1 Introduction to the technical reference manual

1.1.1 About the complete set of manuals for an IED

deinstalling & disposal

The Application Manual (AM) contains application descriptions, setting

The Technical Reference Manual (TRM) contains application and functionality

manual should be used as a technical reference during the engineering phase,

The Installation and Commissioning Manual (ICM) contains instructions on

The Operator’s Manual (OM) contains instructions on how to operate the

1.1.2 About the technical reference manual

• Logic describes trip logic and related functions.

1.1.3 This manual

Outlines the implementation of a particular protection function.

1.1.3.2 Principle of operation

Describes how the function works, presents a general background to algorithms

Input and output signals

Figure 1: Logic diagram example with -int signals

Figure 2: Logic diagram example with an outgoing -cont signal

Figure 3: Logic diagram example with an incoming -cont signal

1.1.3.3 Input and output signals

1.1.3.4 Function block

Each function block is illustrated graphically.

Figure 4: Example of a function block

1.1.3.5 Setting parameters

1.1.3.6 Technical data

1.1.4 Intended audience

1.1.5 Related documents

Connection and Installation components 1MRK 513 003-BEN

More information can be found on www.abb.com/substationautomation.

1.1.6 Revision notes