A Carrier-based Adjustable Discontinuous PWM for
Three-Phase Voltage Source Inverter
Hak-Jun Lee, Anno Yoo, Chanook Hong, and Jeongjoon Lee
Corporate Technology R&D Center
LSIS Co., Ltd.
Anyang-si, Republic of Korea
hjleea@lsis.com
Abstract— PWM strategy is classified into a Continuous
PWM (CPWM) and a Discontinuous PWM (DPWM). Because
the conventional DPWM has constant non-switching period
which is 120° of fundamental period, DPWM could bring
about the high Total Harmonic Distortion (THD) compared to
CPWM and the lower switching loss than CPWM. This paper
presents a carrier-based Adjustable Discontinuous Pulse
Width Modulation (ADPWM) for 3-phase Voltage Source
Inverter (VSI). The non-switching period can be controlled
from 0° to 120° of fundamental period using the proposed
PWM strategy. Thus, it can be noted that the ADPWM offers
tradeoff between THD and switching loss. This paper also
proposes a seamless transfer method from CPWM to DPWM
with the proposed PWM strategy. With the proposed method,
the non-switching period is variable according to Modulation
Index (MI). The validity of the proposed strategies is verified
by the experimental results with 3.7 kW induction machine
drive.
Keywords— Discontinuous PWM, Voltage Source Inverter,
Carrier-based PWM.
I. INTRODUCTION
Due to the improvement of fast switching power semi-
conductor devices, various voltage modulation methods for
three-phase Voltage Source Inverter (VSI) have been
researched and developed. Among those voltage modulation
methods for VSI, Space Vector PWM (SVPWM) and
carrier-based PWM have been widely employed for
commercialized VSIs [1]. SVPWM can be implemented with
carrier-based PWM using an offset voltage which means a
common mode voltage or a zero sequence voltage [2]. In this
paper, the proposed PWM strategy is implemented on the
basis of the carrier-based PWM.
The switching losses of power semi-conductor are a
significant issue for increasing a power density of VSI,
especially with a high switching frequency of power devices.
In order to reduce the switching loss, various Discontinuous
PWM (DPWM) schemes have been developed. The PWM
strategy is classified into a Continuous PWM (CPWM) and a
DPWM. DPWM usually have relatively higher Total
Harmonic Distortion (THD) and a lower switching loss than
that of CPWM because the conventional DPWM has
constant non-switching period which is 120° of fundamental
978-1-4673-7151-3/15/$31.00 ©2015 IEEE
period [3]-[6]. It can be noted that the non-switching period
provides the tradeoff between THD and the switching loss.
Based on this characteristic of conventional PWM scheme,
this paper presents an Adjustable DPWM (ADPWM) which
is capable of adjusting the non-switching period. The non-
switching period of proposed PWM strategy can be
controlled from 0° to 120° of fundamental period. Thus, the
proposed ADPWM offers tradeoff between THD and
switching loss automatically.
In general, the electric machine drive system such as a
fan, pump, or blowers, a load torque is proportional to the
square of rotor speed. It means that the required power is
proportional to the cubic of speed. The THD of current is
more important in the low speed and light load region, and
the efficiency is more critical in the high speed and heavy
load region, because the Modulation Index (MI) is
proportional to the frequency, and the THD of current
decreases as the MI increases. In order to meet the THD in
low speed region and the efficiency in high speed region, this
paper proposes a seamless transfer method from CPWM to
DPWM using the proposed ADPWM. With the proposed
method, the non-switching period increases gradually
according to the increase of MI. To evaluate the
effectiveness of proposed PWM strategy, the V/f operation
of 3.7 kW induction machine has been performed, and the
results are discussed.
II. ADJUSTABLE DISCONTINUOUS PWM
Fig.1 shows the typical circuit diagram of 2-level three-
phase VSI. Vdc stands for the DC-link voltage, and ‘n’
represents a virtual neutral point of DC-link. Sa, Sb, and Sc
stand for the switching function of a, b, and c phase,
respectively. The three-phase VSI can modulate the 3 pole
voltages (Van, Vbn, Vcn). Each pole voltage can be comprised
by the phase voltage (Vas, Vbs, Vcs) and the offset voltage
(Vsn) which means a common mode voltage or a zero
sequence voltage.
Van = Vas + Vsn , Vbn = Vbs + Vsn , Vcn = Vcs + Vsn . (1)
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 ­−0.5Vdc ≤ Van ≤ 0.5Vdc ­ Vdc § π Vdc ·
° ° Vsn = − Vmax ¨ Vmax ≥ MI cos 6 2 ¸
® −0.5Vdc ≤ Vbn ≤ 0.5Vdc . (2) ° 2 © ¹
° −0.5V ≤ V ≤ 0.5V ® . (5)
¯ °V = − Vdc − V § π Vdc ·
¨ Vmin ≤ − MI cos 6 2 ¸
dc cn dc
°¯ sn 2
min
© ¹

−0.5Vdc − Vmin ≤ Vsn ≤ 0.5Vdc + Vmax , (3) B. Proposed ADPWM(Adjustable Discontinuous PWM)
Based on the implementation of 60° DPWM, the
( ) (
where Vmin = min Vas ,Vbs ,Vcs , and Vmax = max Vas ,Vbs ,Vcs . ) proposed ADPWM can be implemented with a weighing
Hence, the various PWM schemes can be established by factor, k. And the k can be calculated by MI and
appropriate Vsn [7]. discontinuous angle, șD. The offset voltage for ADPWM can
be calculated by following equations, and the non-switching
region can be adjusted by șD.

­ Vdc § Vdc ·
° Vsn = − Vmax ¨ Vmax ≥ k 2 ¸
° 2 © ¹
® . (6)
°V = − Vdc − V § Vdc ·
°¯ sn 2
min ¨ Vmin ≤ −k 2 ¸
© ¹

k = MI cos θ D ( 0° ≤ θ D ≤ 30° ) . (7)

Fig. 1. Circuit diagram of 3-phase VSI.

Fig. 3 shows the non-switching period and switching
period under the proposed ADPWM. In the non-switching
A. Implementation of 60q DPWM period, the offset voltage is fixed as (Vdc/2-Vmax) or (–Vdc/2-
Vmin), but, in the switching period, the offset voltage can be
selected as any value satisfying (2).

Non-switching peroid

Sa=0 Sc=1 Sb=0 Sa=1 Sc=0 Sb=1

Fig. 2. Phase voltage references and switching patterns of 60° DPWM.

Fig. 2 shows the phase voltage references and

corresponding switching patterns of 60° DPWM. In Fig. 2,
MI stands for the Modulation Index which is expresses by Switching peroid
(4).
Fig. 3. Phase voltage references and switching patterns of proposed
ADPWM.
2Vm
MI = , (4) In this paper, the offset voltage in the switching period is
Vdc employed as –(Vmax+Vmin)/2, which the value is used for
symmetrical SVPWM. Thus, the offset voltage for the
where Vm represents the magnitude of phase voltage proposed ADPWM can be calculated as (8).
references. As the figure shown, the offset voltage for 60°
DPWM could be calculated by following equation.

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 ­ Vdc § Vdc ·
° Vsn = − Vmax ¨ Vmax ≥ k 2 ¸ 30൤
° 2 © ¹
°° Vdc § Vdc ·
® Vsn = − − Vmin ¨ Vmin ≤ −k 2 ¸ . (8)
° 2 © ¹
° V + Vmin § Vdc Vdc ·
°Vsn = − max ¨ Vmax < k 2 ,Vmin > −k 2 ¸
¯° 2 © ¹

The tolerance range of k can be described as Fig. 4,

because the range of șD is set as (7). 0൤
MIStart
It can be noted that ADPWM can be established if the MI
weighting factor, k, is selected as appropriate value in
tolerance range as shown in Fig. 4. (a)

MIStart

MIStart MI

MI (b)

Fig. 5. Proposed seamless transfer method. (a) variation of șD . (b)

Fig. 4. Tolerance range of the weighting factor, k. variation of weighting factor, k.

III. SEAMLESS TRANSFER METHOD B. Switching loss analysis and WTHD (Weighted Total
Harmonic Distortion) comparison
A. Linear change of șD according to Modulation Index
It is obvious that ADPWM is identical with symmetrical
MI=0.4
SVPWM, and 60° DPWM if șD is set as 0° and 30°, 1
respectively. It means that the seamless transfer from 0.95 MI=0.5
SVPWM to 60° DPWM is possible, if șD gradually increase
0.9
from 0° to 30°. In this paper, a seamless transfer method is MI=0.6
proposed that șD increases as MI increases. Thus, șD is 0.85
linearly proportional to MI, and it can be expressed as (9). 0.8 MI=0.7

0.75 MI=0.8
30
θD = ( MI − MIStart ) , (9) 0.7
MI=0.9
2 / 3 − MIStart 0.65
MI=1
0.6
where MIStart stands for the starting point of DPWM.
0.55
The proposed seamless transfer method can be described MI=1.1547
as Fig. 5. As shown in Fig. 5 (a), SVPWM is applied if MI is 0.5
-3 -2 -1 0 1 2 3
lower than MIStart (șD = 0°), and șD which means the non-
switching period, is linearly increases in proportion to MI.
Fig. 6. Ratios of switching losses of ADPWM compared with CPWM.

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 For the calculation of the switching loss, the linear From the property of (14), the switching loss of ADPWM
dependency of a switching energy loss on the switched can be classified into (15).
current is assumed. Under that assumption, the switching
loss during one switching period is expressed by (10) [8], [9].
­ § 1 · π
° Psw.cont ¨1 − 2 cos φ ¸ , 0 < φ < 3
Eloss = ixs ⋅ ( ET + ED ) . (10) ° © ¹
Psw = ® . (15)
° 3 sin φ π π
°̄ Psw.cont , <φ <
where Eloss , ET , ED , and ixs stand for the total switching 2 3 2
loss energy, switching loss energy of switching device,
switching loss energy of diode and phase current, where Psw.cont stand for the switching loss of CPWM which
respectively. is expressed as (12).
If it is assumed that the phase current, ixs is expressed as Fig. 6 represents the ratios of the switching losses of
(11), the switching loss of CPWM can be calculated as (12) ADPWM compared with the CPWM which means the
using (10). symmetrical SVPWM. The switching loss is identical with
CPWM if MI is lower than 0.4, because it is assumed that
the MIStart is set as 0.4 for the analysis. In higher MI than
ixs = I m cos (θ − φ ) , (11) 0.4, the switching loss decreases as the MI increases, because
the non-switching period increases. Finally, the switching
loss of ADPWM is identical with 60° DPWM at 2 / 3 of
MI.
1 π
( ET + ED ) f sw I m
Psw =
2π ³ π (E
−
2

2
T + ED ) f sw ixs dθ =
π
, (12) In order to validate the effectiveness ADPWM in terms
of THD, Weighted Total Harmonic Distortion (WTHD) is
calculated with numerical method using MATLAB program.
where I m , f sw , Psw represent the magnitude of phase current,
switching frequency, and switching loss, respectively. And WTHD is defined as (16) and it means the THD of
φ stands for the phase difference which means the power current of the inductive load.
factor [].
2
The proposed ADPWM has non-switching period of ∞
§ Vn ·
−θ D ≤ θ ≤ θ D . Thus, the switching loss of ADPWM can be ¦ ¨© n ¸¹
n=2
calculated as (13) because the șD is limited to the interval of WTHD = , (16)
V1
the angle, 0 ≤ θ D ≤ π / 6 .
where V1 and Vn represent the magnitude of fundamental
harmonic and n-th order harmonic of the voltage,
­ −θ D ( E + E ) f I cos (θ − φ ) dθ ½
³ π T D sw m
1 °° − 2 °°
respectively, and n stands for the harmonic order.
Psw = ® π ¾
2π ° 2
+ ( E + ED ) f sw I m cos (θ − φ ) dθ °
¯° ³θ D T ¿°
0.022

, (13) 0.02
­ −θ D cos (θ − φ ) dθ ½
( E + ED ) f sw I m ° ³− 2
° °°
π
0.018
= T ® π ¾
2π ° + 2 cos (θ − φ ) dθ ° 0.016

°¯ ³θ D °¿ 0.014
WTHD

The switching loss of ADPWM is characterized as (14) 0.012

because the ADPWM has the symmetry of pole voltage.

0.01 Proposed Method

0.008
­° Psw ( −φ ) = Psw (φ )
® . (14) 0.006

°̄ Psw (φ ) = Psw (π − φ ) 0.004

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.1547
MI
where 0 < φ < π . Therefore, it is reasonable to consider the
range of 0 < φ < π / 2 for the switching loss of ADPWM. Fig. 7. WTHD of ADPWM compared with SVPWM and 60° DPWM.

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 WTHD comparison is described in Fig. 7. For the Vas [50 V/div]
analysis, the carrier frequency and sampling frequency are Vsn [50 V/div]
set as 5 kHz and 10 kHz, respectively. And it is assumed that
the operating frequency is 60 Hz, and MIStart is 0.4. WTHD
of ADPWM is identical with SVPWM less than MI of 0.4.
As MI increases, WHTD of ADPWM increases slightly and Pole Voltage [50 V/div]
converges to that of 60° DPWM eventually. As the Fig. 7 Van [50 V/div]
shown, WTHD is suppressed less than specific value
according to MIStart in spite of reduced switching loss.

5ms

IV. EXPERIMENTAL RESULTS (c)

Vas [50 V/div]
The experiment was performed to verify the feasibility of Vsn [50 V/div]
proposed strategies. V/f operation was employed for 3.7 kW
induction machine drive.
Fig. 8 shows the variation of non-switching period of the
proposed ADPWM at 40 Hz operation where ‘Vas’, ‘Vsn’, Pole Voltage [50 V/div]
‘Van’, and ‘Pole Voltage’ stand for the a-phase voltage
reference, offset voltage, pole voltage reference, and Van [50 V/div]
measured pole voltage of the VSI, respectively. As shown
the measured pole voltage in Fig. 8, the non-switching
period is determined by discontinuous angle, șD.
5ms
Fig. 9 shows the experimental results of the proposed
seamless transfer method where ‘Frequency’ stands for the (d)
electric frequency, respectively. For the proposed method,
MIStart was set as 0.4. As expected in section III, the offset Fig. 8. Variation of non-switching period with respect to the
discontinuous angle, șD at 40 Hz operation, șD. (a) șD =0°. (b) șD = 10°. (c)
voltage for non-switching period is injected above MI of 0.4 șD = 20°. (d) șD = 30°.
(20Hz). And the non-switching period gradually increases
as the electric frequency which means MI increases.
Vas [50V/div] Vsn [50V/div]

Vas [50 V/div]

Vsn [50 V/div]

Van [50V/div]
Pole Voltage [50 V/div] Frequency [20Hz/div]

Van [50 V/div]

2s

(a)
5ms
(a)
Vas [50V/div] Vsn [50V/div]
Vas [50 V/div]
Vsn [50 V/div]

Pole Voltage [50 V/div] Frequency [20Hz/div] Van [50V/div]

Van [50 V/div]

20ms

5ms
(b)
(b)

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 Vas [50V/div] MIStart was set as 0.3, and rated torque was applied as a
Vsn [50V/div] load. As shown in Fig. 10, the difference of current THD is
suppressed less than 1.5 % in all operating region. In
addition, the loss reduction ratio increases as the operating
frequency increases, and it has the maximum value of 8.8%
Frequency [20Hz/div] Van [50V/div] at rated speed. Thus, THD performance in low speed region
and the efficiency in high speed region can be enhanced with
the proposed method.

V. CONCLUSIONS
10ms
In this paper, the ADPWM is proposed which is capable
(c) of adjusting the non-switching period. The non-switching
period can be controlled from 0° to 120° of fundamental
Vas [50V/div] period using the proposed PWM strategy. In order to reduce
Vsn [50V/div]
current THD in low speed region and to improve the
efficiency in high speed region, this paper presents the
seamless transfer method using the proposed ADPWM. With
Frequency [20Hz/div] the proposed method, low THD in low speed region and the
high efficiency in high speed region are achieved because the
Van [50V/div] non-switching period increases gradually according to the
increase of MI. In order to validate the feasibility of
proposed method, V/f operation of 3.7 kW induction motor
was performed. As a result, the current THD is suppressed in
5ms all operating region, and the loss is reduced by 8.8 % at the
rated speed.
(d)

Fig. 9. V/f operation with the proposed seamless transfer method using
ADPWM. (a) overall V/f operation. (b) 20 Hz. (c) 40 Hz. (d) 60 Hz.
Fig. 10. High Performance Power Analyzer, WT1800 [10].
Loss Reduction Ratio
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