Quanta ZQR Aspire-4349 PDF

5 4 3 2 1
schematic-laptop.blogspot.com
=45%/2&.',$*5$0
D
CHARGER D
intel ISL88731 P28
<MCH Processor> 3/5V SYS PWR

RT8206 P29
DDR SYSTEM MEMORY

SandyBridge CPU CORE PWR
QC /DC 35W PCI-E ISL95835 P30
X16
CPU +1.05V_VTT
DDR III - SODIMM 0 Dual Channel DDR III rPGA 988
(37.5mm X 37.5mm)
RT8238 P31
1066 MHz
DDR III - SODIMM 1
DDR3 PWR discharger
P14, 15 FDI CLK DMI RT8207A P32 P34
P4~P7 5GT/s
C C
FDI interface X4 DMI interface +1.8V Thermal protect

HPA00835RTER P34 P34
2.7GT/s 5GT/s
HDD (SATA) P0 SATA0 FDI CLK DMI INT_CRT

P20 CRT
iGFX Interfaces
P16
SATA Gen3
ODD (SATA)
P20
P1 SATA1 SATA Gen2 intel INT_LVDS
LVDS
<PCH> P16
P1 USB 2.0 USB

CougarPoint 0.7 PCI-E
INT_HDMI
M/B USB*1 P23 HDMI
P17
P3,P9
D/B USB*2 P23
B
mBGA 989 PCI-Express Gen2 B
P4 (25mm X 25mm)
USB Bluetooth
P24 5GT/s P1 P6
HDA
P8 Azalia 1RWH
USB CCD P17 +0QRWVXSSRUW86%
+0QRWVXSSRUW6$7$ Mini Card-1
P8~P13 X'TAL X'TAL
X'TAL RTC 25MHz 25MHz
Atheros AR8158L
CardReader P12 32.768KHz P9 SPI LPC P26 P19
AU6435-GDL P23
USB 2.0 P10
Int. MIC ALC271X-VB3 Transformer

Dual SPI ROM EC 10/100M
AUDIO CODEC P21 4Mbit x1 (Basic ME+Braidwood) NPCE971 P18
P9 P25
A RJ45 A
MIC JACK Int. Speaker HP P18
P22 P22 P22
SPI ROM Touch Pad Keyboard Fan Driver Quanta Computer Inc.
P25 P24 P24
(D/A Type) P24
PROJECT : ZQR
Size Document Number Rev
1A
Block Diagram
Date: Monday, May 09, 2011 Sheet 1 of 35
5 4 3 2 1
1 2 3 4 5 6 7 8
Thermal Follow Chart
Power States
CONTROL
POWER PLANE VOLTAGE DESCRIPTION ACTIVE IN
SIGNAL
VIN +10V~+19V MAIN POWER ALWAYS ALWAYS
A
+VCCRTC +3V~+3.3V RTC POWER ALWAYS ALWAYS NTC A
Thermal
+3VPCU +3.3V EC POWER ALWAYS ALWAYS
Protection
+5VPCU +5V CHARGE POWER ALWAYS ALWAYS
+15V +15V CHARGE PUMP POWER ALWAYS ALWAYS
+3V_S5 +3.3V LAN/BT/CIR POWER S5_ON S0-S5 CPU 3V/5 V

H_ORICHOT# PM_THRMTRIP# SYS_SHDN#
CORE PWR
CPU WIRE-AND SYS PWR
+5V_S5 +5V USB POWER S5_ON S0-S5 H/W Throttling
+5V +5V HDD/ODD/Codec/TP/CRT/HDMI POWER MAINON S0
+3V +3.3V PCH/GPU/Peripheral component POWER MAINON S0

SML1ALERT#
+1.5VSUS +1.5V CPU/SODIMM CORE POWER SUSON S0-S3
PCH FAN Driver FAN
+0.75V_DDR_VTT +0.75V SODIMM Termination POWER MAINON S0
+VGFX_AXG variation Internal GPU POWER GFX_ON S0

SM-Bus
+1.8V +1.8V CPU/PCH/Braidwood POWER MAINON S0
B +1.5V +1.5V MINI CARD/NEW CARD POWER MAINON S0 B
EC
+1.1V_VTT +1.05V or +1.1V CPU VTT POWER MAINON S0 CPUFAN#
+1.05V +1.05V PCH CORE POWER MAINON S0
+VCC_CORE variation CPU CORE POWER VRON S0
LCDVCC +3.3V LCD POWER LVDS_VDDEN S0
+5V_GPU +5V SWITCHABLE PWM IC POWER dGPU_PWR_EN# Discrete enable
+GPU_CORE +0.9V~+1.1V GPU CORE POWER +3V_D Discrete enable
+GPU_IO +0.9V~+1.1V GPU I/O POWER PG_GPUIO_EN Discrete enable
+1.5V_GPU +1.5V VRAM CORE POWER PG_1.5V_EN Discrete enable
+1.8V_GPU +1.8V GPU_CRE/LVDS/PLL POWER +1.5V_GPU Discrete enable
+1V +1V DP/PEG POWER PG_1V_EN Discrete enable
C C
D D
Quanta Computer Inc.

PROJECT : ZQR
1A
PWR Status & GPU PWR CRL & THRM
1 2 3 4 5 6 7 8
5 4 3 2 1
schematic-laptop.blogspot.com 03
D D
+3V_S5 +3V_S5
2.2Kȍ 2.2Kȍ
SMB_ME0_CLK
SMB_ME0_DAT
+3V_S5 +3V_S5 +3VPCU +3VPCU

+3V_S5
C C
intel 2.2Kȍ 2.2Kȍ 10Kȍ 10Kȍ
<PCH> G
SMB_ME1_CLK S NMOS D MBCLK EC
G
WPCE
CougarPoint 0.7
SMB_ME1_DAT S NMOS D MBDATA 791/FLASH
mBGA 989
+3V_S5 +3V_S5 +3V +3V
(25mm X
25mm) +3V_S5
Slave ADDRESS :A0H Slave ADDRESS :A4H
DDR3 DIMM-0-STD DDR3 DIMM-1-STD
WLAN Mini 3G
B (5.2H) (9.2H) B
2.2Kȍ 2.2Kȍ 4.7Kȍ 4.7Kȍ
G
SMB_PCH_CLK D S SMB_RUN_CLK
NMOS
G
SMB_PCH_DAT D S SMB_RUN_DAT
NMOS
A A

PROJECT : ZQR
1A
SMBus Address
5 4 3 2 1
5 4 3 2 1
Sandy Bridge Processor (DMI,PEG,FDI)
U14A
PEG_ICOMPI
PEG_ICOMPO
J22
J21
PEG_COMP
Sandy Bridge Processor (CLK,MISC,JTAG)
U14B
04
8 DMI_TXN0 B27 H22
DMI_RX#[0] PEG_RCOMPO
8 DMI_TXN1 B25
DMI_RX#[1]
8 DMI_TXN2 A25 DMI_RX#[2]
8 DMI_TXN3 B24 K33 SNB_IVB# N.A at SNB EDS #27637 0.7v1 A28 CLK_CPU_BCLKP 10
MISC
DMI_RX#[3] PEG_RX#[0]
CLOCKS
BCLK
M35 9 H_SNB_IVB# C26 A27 CLK_CPU_BCLKN 10
PEG_RX#[1] PROC_SELECT# BCLK#
8 DMI_TXP0 B28 L34
D DMI_RX[0] PEG_RX#[2] D
8 DMI_TXP1 B26 J35
DMI_RX[1] PEG_RX#[3]
DMI
A24 J32 SKTOCC# AN34
8 DMI_TXP2 DMI_RX[2] PEG_RX#[4] TP73 SKTOCC#
8 DMI_TXP3 B23 H34 A16 CLK_DPLL_SSCLKP 10
DMI_RX[3] PEG_RX#[5] DPLL_REF_CLK
H31 A15 CLK_DPLL_SSCLKN 10
PEG_RX#[6] DPLL_REF_CLK#
8 DMI_RXN0 G21 G33
DMI_TX#[0] PEG_RX#[7]
8 DMI_RXN1 E22 G30
DMI_TX#[1] PEG_RX#[8] TP_CATERR#
8 DMI_RXN2 F21 F35 TP14 AL33
DMI_TX#[2] PEG_RX#[9] CATERR#
8 DMI_RXN3 D21 DMI_TX#[3] PEG_RX#[10] E34
PEG_RX#[11] E32
THERMAL
8 DMI_RXP0 G22 DMI_TX[0] PEG_RX#[12] D33
8 DMI_RXP1 D22 DMI_TX[1] PEG_RX#[13] D31 11,27 EC_PECI AN33 PECI SM_DRAMRST# R8 CPU_DRAMRST# 5
PCI EXPRESS* - GRAPHICS

8 DMI_RXP2 F20 B33
DDR3
MISC
DMI_TX[2] PEG_RX#[14]
8 DMI_RXP3 C21 C32
DMI_TX[3] PEG_RX#[15]
J33 27,30 H_PROCHOT# R26 56_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R151 140/F_4
PEG_RX[0] PROCHOT# SM_RCOMP[0] SM_RCOMP_1 R358 25.5/F_4
L35 A5
PEG_RX[1] SM_RCOMP[1] SM_RCOMP_2 R363 200/F_4
PEG_RX[2] K34 SM_RCOMP[2] A4
8 FDI_TXN0 A21 H35
FDI0_TX#[0] PEG_RX[3] PM_THRMTRIP#
8 FDI_TXN1 H19 FDI0_TX#[1] H32 11 PM_THRMTRIP# AN32
PEG_RX[4] THERMTRIP#
8 FDI_TXN2 E19 G34
FDI0_TX#[2] PEG_RX[5]
Intel(R) FDI
8 FDI_TXN3 F18 FDI0_TX#[3] PEG_RX[6] G31

8 FDI_TXN4 B21 FDI1_TX#[0] PEG_RX[7] F33
8 FDI_TXN5 C20 FDI1_TX#[1] PEG_RX[8] F30
D18 E35 AP29 XDP_PRDY# TP81
8 FDI_TXN6 FDI1_TX#[2] PEG_RX[9] PRDY#
E17 E33 AP27 XDP_PREQ#
8 FDI_TXN7 FDI1_TX#[3] PEG_RX[10] PREQ#
F32
PEG_RX[11] XDP_TCLK
PEG_RX[12] D34 TCK AR26
PWR MANAGEMENT
XDP_TMS
JTAG & BPM

8 FDI_TXP0 A22 E31 AR27
FDI0_TX[0] PEG_RX[13] TMS XDP_TRST#
8 FDI_TXP1 G19 FDI0_TX[1] PEG_RX[14] C33 8 PM_SYNC AM34 PM_SYNC TRST# AP30
8 FDI_TXP2 E20 B32
FDI0_TX[2] PEG_RX[15] R24 10K_4 XDP_TDI
C 8 FDI_TXP3 G18 FDI0_TX[3] TDI AR28 C
B20 M29 C34 0.1U/10V_4 AP26 XDP_TDO
8 FDI_TXP4 FDI1_TX[0] PEG_TX#[0] TDO
8 FDI_TXP5 C19 FDI1_TX[1] PEG_TX#[1] M32 11 H_PW RGOOD AP33 UNCOREPWRGOOD
8 FDI_TXP6 D19 M31
FDI1_TX[2] PEG_TX#[2]
8 FDI_TXP7 F17 FDI1_TX[3] PEG_TX#[3] L32
L29 AL35 XDP_DBRST# XDP_DBRST# 8
PEG_TX#[4] PM_DRAM_PW RGD_R DBR#
8 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#[5] K31 V8 SM_DRAMPWROK
8 FDI_FSYNC1 J17 FDI1_FSYNC PEG_TX#[6] K28
PEG_TX#[7] J30 BPM#[0] AT28
H20 J28 +1.05V_VTT R277 75_4 AR29
8 FDI_INT FDI_INT PEG_TX#[8] BPM#[1]
H29 AR30
PEG_TX#[9] CPU_PLTRST# R273 43_4 CPU_PLTRST#_R AR33 BPM#[2]
8 FDI_LSYNC0 J19 FDI0_LSYNC PEG_TX#[10] G27 RESET# BPM#[3] AT30
8 FDI_LSYNC1 H17 E29 AP32
FDI1_LSYNC PEG_TX#[11] BPM#[4]
F27 AR31
PEG_TX#[12] BPM#[5]
D28 AT31
PEG_TX#[13] BPM#[6]
F26 AR32
PEG_TX#[14] BPM#[7]
E25
PEG_TX#[15]
A18
eDP_COMP eDP_COMPIO
A17 eDP_ICOMPO M28
INT_eDP_HPD_Q PEG_TX[0]
B16 eDP_HPD M33
PEG_TX[1] CPU-989P-rPGA
PEG_TX[2] M30
L31
PEG_TX[3]
C15 eDP_AUX PEG_TX[4] L28
D15 K30 +3V_S5
eDP_AUX# PEG_TX[5]
eDP
PEG_TX[6] K27
J29
PEG_TX[7] +3V_S5
C17 eDP_TX[0] PEG_TX[8] J27
F16 H28 +1.5V_CPU
eDP_TX[1] PEG_TX[9] C168
C16 eDP_TX[2] PEG_TX[10] G28
G15 E28 0.1U/10V_4
eDP_TX[3] PEG_TX[11]
B F28 B
PEG_TX[12] C366
C18 eDP_TX#[0] D27
PEG_TX[13] R153 U12 0.1U/10V_4
E16 E26
5
eDP_TX#[1] PEG_TX[14] U7 200/F_4
D16 D25 1 5
eDP_TX#[2] PEG_TX[15] NC VCC
F15 8 SYS_PW ROK 2
eDP_TX#[3] PM_DRAM_PW RGD_Q R152 130/F_4 PM_DRAM_PW RGD_R
4 10,18,19,23,27 PLTRST# 2 IN
8 PM_DRAM_PW RGD 1
CPU-989P-rPGA 3 4 CPU_PLTRST#
74AHC1G09 GND OUT
3
R155 *39_4 3 1 74LVC1G07GW
Q10 *2N7002K
2
MAINON_ON_G 6,34
DP & PEG Compensation +1.05V_VTT +1.05V_VTT

eDP Hot-plug
3
+1.05V_VTT +1.05V_VTT Processor pull-up(CPU) Q2
8,30 IMVP_PW RGD 2
HPD disable R306
FDV301N 10K_4
R300 24.9/F_4 eDP_COMP R70 24.9/F_4 PEG_COMP
A +1.05V_VTT A
1
eDP_COMPIO and ICOMPO signals should PEG_ICOMPI and RCOMPO signals should INT_eDP_HPD_Q
be shorted near balls and routed with be routed within 500 mils
H_PROCHOT# R39 62_4 R75
typical impedance <25 mohms typical impedance = 43 mohms XDP_TDO R57 51_4 1K_4
XDP_TMS R285 51_4
PEG_ICOMPO signals should XDP_TDI R283 51_4
be routed within 500 mils XDP_PREQ# R55 *51_4 Quanta Computer Inc.
2
XDP_TCLK R286 51_4

typical impedance = 14.5 mohms XDP_TRST# R56 51_4 Q3
PM_THRMTRIP# 1 3 MMBT3904
PROJECT : ZQR
SYS_SHDN# 29,34
1A
Sandy Bridge 1/4
5 4 3 2 1
5 4 3 2 1
Sandy Bridge Processor (DDR3)
U14C U14D
05
14 M_A_DQ[63:0] SA_CLK[0] AB6 M_A_CLKP0 14 15 M_B_DQ[63:0] SB_CLK[0] AE2 M_B_CLKP0 15
D AA6 AD2 D
SA_CLK#[0] M_A_CLKN0 14 SB_CLK#[0] M_B_CLKN0 15
M_A_DQ0 C5 V9 M_A_CKE0 14 M_B_DQ0 C9 R9 M_B_CKE0 15
M_A_DQ1 SA_DQ[0] SA_CKE[0] M_B_DQ1 SB_DQ[0] SB_CKE[0]
D5 SA_DQ[1] A7 SB_DQ[1]
M_A_DQ2 D3 M_B_DQ2 D10
M_A_DQ3 SA_DQ[2] M_B_DQ3 SB_DQ[2]
D2 SA_DQ[3] C8 SB_DQ[3]
M_A_DQ4 D6 AA5 M_A_CLKP1 14 M_B_DQ4 A9 AE1 M_B_CLKP1 15
M_A_DQ5 SA_DQ[4] SA_CLK[1] M_B_DQ5 SB_DQ[4] SB_CLK[1]
C6 SA_DQ[5] SA_CLK#[1] AB5 M_A_CLKN1 14 A8 SB_DQ[5] SB_CLK#[1] AD1 M_B_CLKN1 15
M_A_DQ6 C2 V10 M_A_CKE1 14 M_B_DQ6 D9 R10 M_B_CKE1 15
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
C3 SA_DQ[7] D8 SB_DQ[7]
M_A_DQ8 F10 M_B_DQ8 G4
F8 SA_DQ[9] F4 SB_DQ[9]
M_A_DQ10 G10 AB4 M_B_DQ10 F1 AB2
M_A_DQ11 SA_DQ[10] RSVD_TP[1] M_B_DQ11 SB_DQ[10] RSVD_TP[11]
G9 SA_DQ[11] RSVD_TP[2] AA4 G1 SB_DQ[11] RSVD_TP[12] AA2
M_A_DQ12 F9 W9 M_B_DQ12 G5 T9
F7 SA_DQ[13] F5 SB_DQ[13]
M_A_DQ14 G8 M_B_DQ14 F2
G7 SA_DQ[15] G2 SB_DQ[15]
M_A_DQ16 K4 AB3 M_B_DQ16 J7 AA1
K5 SA_DQ[17] RSVD_TP[5] AA3 J8 SB_DQ[17] RSVD_TP[15] AB1
M_A_DQ18 K1 W10 M_B_DQ18 K10 T10
J1 SA_DQ[19] K9 SB_DQ[19]
M_A_DQ20 J5 M_B_DQ20 J9
J4 SA_DQ[21] J10 SB_DQ[21]
M_A_DQ22 J2 AK3 M_A_CS#0 14 M_B_DQ22 K8 AD3 M_B_CS#0 15
M_A_DQ23 SA_DQ[22] SA_CS#[0] M_B_DQ23 SB_DQ[22] SB_CS#[0]
K2 SA_DQ[23] SA_CS#[1] AL3 M_A_CS#1 14 K7 SB_DQ[23] SB_CS#[1] AE3 M_B_CS#1 15
M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
N10 SA_DQ[25] RSVD_TP[8] AH1 N4 SB_DQ[25] RSVD_TP[18] AE6
M_A_DQ26 N8 M_B_DQ26 N2
C N7 SA_DQ[27] N1 SB_DQ[27] C
M_A_DQ28 M10 M_B_DQ28 M4
M9 SA_DQ[29] SA_ODT[0] AH3 M_A_ODT0 14 N5 SB_DQ[29] SB_ODT[0] AE4 M_B_ODT0 15
DDR SYSTEM MEMORY B

M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4
DDR SYSTEM MEMORY A
SA_DQ[30] SA_ODT[1] M_A_ODT1 14 SB_DQ[30] SB_ODT[1] M_B_ODT1 15

M_A_DQ31 M7 AG2 M_B_DQ31 M1 AD5
AG6 SA_DQ[32] RSVD_TP[10] AH2 AM5 SB_DQ[32] RSVD_TP[20] AE5
M_A_DQ33 AG5 M_B_DQ33 AM6
AK6 SA_DQ[34] AR3 SB_DQ[34]
M_A_DQ35 AK5 M_B_DQ35 AP3
SA_DQ[35] M_A_DQSN[7:0] 14 SB_DQ[35] M_B_DQSN[7:0] 15
M_A_DQ36 AH5 M_B_DQ36 AN3
M_A_DQ37 SA_DQ[36] M_A_DQSN0 M_B_DQ37 SB_DQ[36] M_B_DQSN0
AH6 SA_DQ[37] SA_DQS#[0] C4 AN2 SB_DQ[37] SB_DQS#[0] D7
M_A_DQ38 AJ5 G6 M_A_DQSN1 M_B_DQ38 AN1 F3 M_B_DQSN1
M_A_DQ39 SA_DQ[38] SA_DQS#[1] M_A_DQSN2 M_B_DQ39 SB_DQ[38] SB_DQS#[1] M_B_DQSN2
AJ6 SA_DQ[39] SA_DQS#[2] J3 AP2 SB_DQ[39] SB_DQS#[2] K6
M_A_DQ40 AJ8 M6 M_A_DQSN3 M_B_DQ40 AP5 N3 M_B_DQSN3
AK8 SA_DQ[41] SA_DQS#[4] AL6 AN9 SB_DQ[41] SB_DQS#[4] AN5
M_A_DQ42 AJ9 AM8 M_A_DQSN5 M_B_DQ42 AT5 AP9 M_B_DQSN5
AK9 SA_DQ[43] SA_DQS#[6] AR12 AT6 SB_DQ[43] SB_DQS#[6] AK12
M_A_DQ44 AH8 AM15 M_A_DQSN7 M_B_DQ44 AP6 AP15 M_B_DQSN7
M_A_DQ45 SA_DQ[44] SA_DQS#[7] M_B_DQ45 SB_DQ[44] SB_DQS#[7]
AH9 SA_DQ[45] AN8 SB_DQ[45]
M_A_DQ46 AL9 M_B_DQ46 AR6
AL8 SA_DQ[47] M_A_DQSP[7:0] 14 AR5 SB_DQ[47] M_B_DQSP[7:0] 15
M_A_DQ48 AP11 M_B_DQ48 AR9
M_A_DQ49 SA_DQ[48] M_A_DQSP0 M_B_DQ49 SB_DQ[48] M_B_DQSP0
AN11 SA_DQ[49] SA_DQS[0] D4 AJ11 SB_DQ[49] SB_DQS[0] C7
M_A_DQ50 AL12 F6 M_A_DQSP1 M_B_DQ50 AT8 G3 M_B_DQSP1
M_A_DQ51 SA_DQ[50] SA_DQS[1] M_A_DQSP2 M_B_DQ51 SB_DQ[50] SB_DQS[1] M_B_DQSP2
AM12 SA_DQ[51] SA_DQS[2] K3 AT9 SB_DQ[51] SB_DQS[2] J6
M_A_DQ52 AM11 N6 M_A_DQSP3 M_B_DQ52 AH11 M3 M_B_DQSP3
AL11 SA_DQ[53] SA_DQS[4] AL5 AR8 SB_DQ[53] SB_DQS[4] AN6
M_A_DQ54 AP12 AM9 M_A_DQSP5 M_B_DQ54 AJ12 AP8 M_B_DQSP5
B AN12 SA_DQ[55] SA_DQS[6] AR11 AH12 SB_DQ[55] SB_DQS[6] AK11 B
M_A_DQ56 AJ14 AM14 M_A_DQSP7 M_B_DQ56 AT11 AP14 M_B_DQSP7
M_A_DQ57 SA_DQ[56] SA_DQS[7] M_B_DQ57 SB_DQ[56] SB_DQS[7]
AH14 SA_DQ[57] AN14 SB_DQ[57]
M_A_DQ58 AL15 M_B_DQ58 AR14
AK15 SA_DQ[59] M_A_A[15:0] 14 AT14 SB_DQ[59] M_B_A[15:0] 15
M_A_DQ60 AL14 M_B_DQ60 AT12
M_A_DQ61 SA_DQ[60] M_A_A0 M_B_DQ61 SB_DQ[60] M_B_A0
AK14 SA_DQ[61] SA_MA[0] AD10 AN15 SB_DQ[61] SB_MA[0] AA8
M_A_DQ62 AJ15 W1 M_A_A1 M_B_DQ62 AR15 T7 M_B_A1
M_A_DQ63 SA_DQ[62] SA_MA[1] M_A_A2 M_B_DQ63 SB_DQ[62] SB_MA[1] M_B_A2
AH15 SA_DQ[63] SA_MA[2] W2 AT15 SB_DQ[63] SB_MA[2] R7
W7 M_A_A3 T6 M_B_A3
SA_MA[3] M_A_A4 SB_MA[3] M_B_A4
SA_MA[4] V3 SB_MA[4] T2
V2 M_A_A5 T4 M_B_A5
SA_MA[6] W3 SB_MA[6] T3
14 M_A_BS#0 AE10 W6 M_A_A7 15 M_B_BS#0 AA9 R2 M_B_A7
SA_BS[0] SA_MA[7] M_A_A8 SB_BS[0] SB_MA[7] M_B_A8
14 M_A_BS#1 AF10 SA_BS[1] SA_MA[8] V1 15 M_B_BS#1 AA7 SB_BS[1] SB_MA[8] T5
14 M_A_BS#2 V6 W5 M_A_A9 15 M_B_BS#2 R6 R3 M_B_A9
SA_BS[2] SA_MA[9] M_A_A10 SB_BS[2] SB_MA[9] M_B_A10
SA_MA[10] AD8 SB_MA[10] AB7
V4 M_A_A11 R1 M_B_A11
SA_MA[12] W4 SB_MA[12] T1
14 M_A_CAS# AE8 AF8 M_A_A13 15 M_B_CAS# AA10 AB10 M_B_A13
SA_CAS# SA_MA[13] M_A_A14 SB_CAS# SB_MA[13] M_B_A14
14 M_A_RAS# AD9 SA_RAS# SA_MA[14] V5 15 M_B_RAS# AB8 SB_RAS# SB_MA[14] R5
14 M_A_WE# AF9 V7 M_A_A15 15 M_B_WE# AB9 R4 M_B_A15
SA_WE# SA_MA[15] SB_WE# SB_MA[15]
+1.5V_SUS
CPU-989P-rPGA CPU-989P-rPGA
R160
A 1K/F_4 A
14,15 DDR3_DRAMRST# R162 1K/F_4 CD_DRAMRST# 3 1 CPU_DRAMRST# 4

Q11
2N7002K Quanta Computer Inc.
2
10 DRAMRST_CNTRL_PCH
R161 PROJECT : ZQR
C181 4.99K/F_4 Size Document Number Rev
0.047U/10V_4 1A
Sandy Bridge 2/4
5 4 3 2 1
5 4 3 2 1
Sandy Bridge Processor (POWER)CPU VTT
POWER
Sandy Bridge Processor SNB 45W:8.5A
Spec
330uF/6mohm x 2
(GRAPHIC POWER)
06
U14F
22uF x 12
CPU VGT
SNB 45W:21.5A U14G
POWER
22uF x 7 (Non-stuff) R247 10/F_4
Spec +VCC_GFX
SENSE
LINES
+VCC_CORE +1.05V_VTT AT24 AK35
+VCC_GFX VAXG1 VAXG_SENSE VCC_AXG_SENSE 30
470uF/4mohm x 2 AT23 VAXG2 VSSAXG_SENSE AK34
R246 10/F_4
VSS_AXG_SENSE 30
D AT21 VAXG3
D
AG35 VCC1 22uF x 12 AT20 VAXG4 CPU MCH
AG34 VCC2 VCCIO1 AH13 AT18 VAXG5
AG33 VCC3 VCCIO2 AH10 AT17 VAXG6 SNB 45W: 5A
AG32 VCC4 VCCIO3 AG10 AR24 VAXG7
AG31 AC10 + + AR23
AG30
VCC5 VCCIO4
Y10 C110 C409 AR21
VAXG8 Spec
VCC6 VCCIO5 330u/2V_7343 *330U/2V_7343 VAXG9
AG29 VCC7 VCCIO6 U10 AR20 VAXG10 330uF/6mohm x 1
VREF
AG28 P10 + + + AR18
VCC8 VCCIO7 C407 C392 C368 VAXG11
AG27 VCC9 VCCIO8 L10
*330U/2V_7343 330U/2V_7343 *330U/2V_7343
AR17 VAXG12 +VDDR_REF_CPU
10uF x 6
AG26 VCC10 VCCIO9 J14 AP24 VAXG13 SM_VREF AL1 +VDDR_REF_CPU
CPU Core Power AF35
AF34
VCC11 VCCIO10 J13
J12
AP23
AP21
VAXG14 Real
VCC12 VCCIO11 VAXG15
SNB 45W:52A AF33 VCC13 VCCIO12 J11 AP20 VAXG16
CAD Note: +VDDR_REF_CPU should 10uF x 6
AF32 H14 C405 C410 C413 C412 C109 AP18 have 10 mil trace width
VCC14 VCCIO13 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VAXG17
AF31 H12 AP17
Spec AF30
VCC15 VCCIO14
H11 AN24
VAXG18
470uF/4mohm x 4 AF29 VCC17 VCCIO16 G14
C107 C106 C105 C374
AN23 VAXG20
AF28 VCC18 VCCIO17 G13 AN21 VAXG21
PEG AND DDR

22uF x 16 AF27 G12 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 AN20
VCC19 VCCIO18 VAXG22 +1.5V_CPU
DDR3 -1.5V RAILS

AF26 VCC20 VCCIO19 F14 AN18 VAXG23
10uF x 10 AD35 VCC21 VCCIO20 F13 AN17 VAXG24
GRAPHICS
AD34 F12 C411 C123 C124 C127 C126 AM24 AF7
VCC22 VCCIO21 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VAXG25 VDDQ1
AD33 VCC23 VCCIO22 F11 AM23 VAXG26 VDDQ2 AF4
AD32 VCC24 VCCIO23 E14 AM21 VAXG27 VDDQ3 AF1
AD31 E12 AM20 AC7 C171 C165 C166 C153 C159
C313 C323 C324 C310 C314 C30 C31 VCC25 VCCIO24 C59 C373 C57 C58 VAXG28 VDDQ4 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8
AD30 VCC26 AM18 VAXG29 VDDQ5 AC4
*22U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 AD29 E11 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 AM17 AC1
VCC27 VCCIO25 VAXG30 VDDQ6
AD28 VCC28 VCCIO26 D14 AL24 VAXG31 VDDQ7 Y7
AD27 VCC29 VCCIO27 D13 AL23 VAXG32 VDDQ8 Y4
AD26 D12 C103 C102 C128 AL21 Y1
VCC30 VCCIO28 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VAXG33 VDDQ9
AC35 VCC31 VCCIO29 D11 AL20 VAXG34 VDDQ10 U7
AC34 VCC32 VCCIO30 C14 AL18 VAXG35 VDDQ11 U4
AC33 VCC33 VCCIO31 C13 AL17 VAXG36 VDDQ12 U1
C53 C54 C84 C73 C380 C379 C378 AC32 C12 C418 C417 C404 C416 AK24 P7 C154 C155 C161 + C156
C
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VCC34 VCCIO32 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 VAXG37 VDDQ13 4.7U/25V_8 10U/6.3V_8 10U/6.3V_8 330U/2V_7343 C
AC31 VCC35 VCCIO33 C11 AK23 VAXG38 VDDQ14 P4
AC30 VCC36 VCCIO34 B14 AK21 VAXG39 VDDQ15 P1
AC29 VCC37 VCCIO35 B12 AK20 VAXG40
AC28 A14 C401 C391 C381 C370 AK18
VCC38 VCCIO36 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 VAXG41
AC27
AC26
VCC39 VCCIO37 A13
A12
AK17
AJ24
VAXG42 CPU SA
AA35 VCC41 VCCIO39 A11 AJ23 VAXG44 SNB 45W: 6A
AA34 VCC42 AJ21 VAXG45
R65 *short_4
AA33
AA32
VCC43 VCCIO40 J23 +1.05V_VTT AJ20
AJ18
VAXG46 Spec
C326 C318 C327 C375 C376 C377 C325 VCC44 VAXG47
*22U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
AA31 VCC45 AJ17 VAXG48 330uF/7mohm x 1 +VCCSA
AA30 AH24
SA RAIL
VCC46 C67 C66 C87 C89 VAXG49
AA29 VCC47 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8
AH23 VAXG50 10uF x 3
AA28 VCC48 AH21 VAXG51 VCCSA1 M27
AA27 VCC49 AH20 VAXG52 VCCSA2 M26
AA26 VCC50 AH18 VAXG53 VCCSA3 L26
CORE SUPPLY
Y35 AH17 J26 C44 C62 C359 + C335

VCC51 VAXG54 VCCSA4 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 *330U/2V_7343
Y34 VCC52 VCCSA5 J25
C399 C398 C397 C396 C395 C384 C332 Y33 J24
*22U/6.3V_8 *22U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VCC53 VCCSA6
Y32 VCC54 VCCSA7 H26
Y31 VCC55 VCCSA8 H25
Y30 VCC56
1.8V RAIL
Y29 VCC57
B23 Mount C70, C71 for +Vcc_core overshoot issue. 5/18 B54 Del C442. 5/20
Y28
Y27
VCC58 CPU VCCPL +1.8V
VCC59
Y26 VCC60 SNB 45W:1.5A
V35 VCC61 B6 VCCPLL1 VCCSA_SENSE H23 VCCSA_SENSE 33
SVID
MISC
H_CPU_SVIDALRT#
+ + + C321 C319
V34
V33
VCC62 VIDALERT# AJ29
AJ30 VR_SVID_CLK Spec A6
A2
VCCPLL2
C70 C71 C315 10U/6.3V_8 10U/6.3V_8 VCC63 VIDSCLK VR_SVID_DATA C439 C422 C438 VCCPLL3
V32 VCC64 VIDSOUT AJ28 330uF/7mohm x 1
470u/2V_7343 470u/2V_7343 *470u/2V_7343 V31 VCC65
4.7U/6.3V_6 1U/6.3V_4 1U/6.3V_4
FC_C22 C22 H_FC_C22 R72 10K_4
V30 VCC66 10uF x 1 VCCSA_VID1 C24 VCCSA_SEL 33
V29 VCC67
V28 VCC68 1uF x 2
B V27 VCC69
B
V26 CPU-989P-rPGA
B45 Remove C315 for cost issue. 5/19 VCC70
U35 VCC71
U34 VCC72
U33 VCC73
U32 VCC74
U31 VCC75
U30 VCC76
U29 VCC77
U28 VCC78 Layout note: need routing
U27 VCC79 +1.5V_SUS 4.5A +1.5V_CPU
U26
R35
VCC80 together and ALERT need
VCC81
R34 VCC82 between CLK and DATA R157 *short_1206
R33
R32
VCC83 SVID CLK R158 *short_1206
VCC84
R31 VCC85
R30 VCC86 8 1
R29 VR_SVID_CLK VR_SVID_CLK 30 7 2
VCC87
SENSE LINES
R28 R249 100/F_4 +VCC_CORE 6 3

VCC88
R27 VCC89 VCC_SENSE AJ35 VCCSENSE 30 5
R26 VCC90 VSS_SENSE AJ34 VSSSENSE 30
R248 100/F_4 Q8
P35
Place PU resistor
4
VCC91 MAIND *AO4496
P34 VCC92 R315 10/F_4
P33
P32
VCC93
B10
+1.05V_VTT close to CPU
VCC94 VCCIO_SENSE VCCP_SENSE 31 +1.05V_VTT
P31 A10 VSSP_SENSE 31 C164 R156
VCC95 VSSIO_SENSE R317 10/F_4 *470P/50V_4 *220_8
P30 VCC96
P29 VCC97
P28 VCC98
3
R231
P27
P26
VCC99 130/F_4 SVID DATA
VCC100
VR_SVID_DATA VR_SVID_DATA 30 4,34 MAINON_ON_G 2
A A
Q9
+SMDDR_VREF +VDDR_REF_CPU *DMN601K-7
1
R359 *short_8
CPU-989P-rPGA +1.05V_VTT
Place PU resistor
3 1 close to CPU
Q17 R43 SVID ALERT Quanta Computer Inc.
2
R357 75_4
29,32,34 MAIND *2N7002E
*100K_4 PROJECT : ZQR
H_CPU_SVIDALRT# R42 43_4 VR_SVID_ALERT# VR_SVID_ALERT# 30 Size Document Number Rev
1A
Sandy Bridge 3/4
5 4 3 2 1
5 4 3 2 1
Sandy Bridge Processor (GND) schematic-laptop.blogspot.com

AT35
AT32
AT29
AT27
U14H
VSS1
VSS2
VSS3
VSS81
VSS82
VSS83
AJ22
AJ19
AJ16
AJ13
T35
T34
U14I
VSS161
Sandy Bridge Processor
VSS234 F22
F19
U14E
(RESERVED, CFG)
L7
07
VSS4 VSS84 VSS162 VSS235 RSVD28
AT25 VSS5 VSS85 AJ10 T33 VSS163 VSS236 E30 RSVD29 AG7
AT22 AJ7 T32 E27 CFG0 AK28 AE7
VSS6 VSS86 VSS164 VSS237 TP18 CFG[0] RSVD30
AT19 AJ4 T31 E24 CFG1 AK29 AK2
AT16 AJ3 T30 E21 CFG2 AL26 W8
VSS8 VSS88 VSS166 VSS239 CFG3 CFG[2] RSVD32
AT13 VSS9 VSS89 AJ2 T29 VSS167 VSS240 E18 TP82 AL27 CFG[3]
D AT10 AJ1 T28 E15 CFG4 AK26 D
VSS10 VSS90 VSS168 VSS241 TP17 CFG[4]
AT7 AH35 T27 E13 CFG5 AL29 AT26
AT4 AH34 T26 E10 CFG6 AL30 AM33
AT3 AH32 P9 E9 CFG7 AM31 AJ27
VSS13 VSS93 VSS171 VSS244 CFG[7] RSVD35
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8 AM32 CFG[8]
AR13 VSS18 VSS98 AH25 P2 VSS176 VSS249 E4 AN28 CFG[12]
AR10 VSS19 VSS99 AH22 N35 VSS177 VSS250 E3 AN31 CFG[13] RSVD37 T8
AR7 VSS20 VSS100 AH19 N34 VSS178 VSS251 E2 AN26 CFG[14] RSVD38 J16
AR4 VSS21 VSS101 AH16 N33 VSS179 VSS252 E1 AM27 CFG[15] RSVD39 H16
AR2 VSS22 VSS102 AH7 N32 VSS180 VSS253 D35 AK31 CFG[16] RSVD40 G16
AP34 VSS23 VSS103 AH4 N31 VSS181 VSS254 D32 AN29 CFG[17]
AP31 VSS24 VSS104 AG9 N30 VSS182 VSS255 D29
AP22 VSS27 VSS107 AF6 N27 VSS185 VSS258 D17 RSVD41 AR35
AP19 VSS28 VSS108 AF5 N26 VSS186 VSS259 C34 AJ31 VAXG_VAL_SENSE RSVD42 AT34
AP16 VSS29 VSS109 AF3 M34 VSS187 VSS260 C31 AH31 VSSAXG_VAL_SENSE RSVD43 AT33
AP13 VSS30 VSS110 AF2 L33 VSS188 VSS261 C28 AJ33 VCC_VAL_SENSE RSVD44 AP35
AP10 VSS31 VSS111 AE35 L30 VSS189 VSS262 C27 AH33 VSS_VAL_SENSE RSVD45 AR34
AP7 VSS32 VSS112 AE34 L27 VSS190 VSS263 C25
AP4 VSS33 VSS113 AE33 L9 VSS191 VSS264 C23
AP1 VSS34 VSS114 AE32 L8 VSS192 VSS265 C10 AJ26 RSVD5
RESERVED
AN30 VSS35 VSS115 AE31 L6 VSS193 VSS266 C1
AN27 VSS36 VSS116 AE30 L5 VSS194 VSS267 B22
AN25 AE29 L4 B19 B34
C AN22
AN19
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
AE28
AE27
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
B4
D1
RSVD6
RSVD7
RSVD46
RSVD47
RSVD48
A33
A34
C
AN16 VSS40 VSS120 AE26 L1 VSS198 VSS271 B13 RSVD49 B35

AN13 VSS41 VSS121 AE9 K35 VSS199 VSS272 B11 RSVD50 C35
AN10 VSS42 VSS122 AD7 K32 VSS200 VSS273 B9
AN7 VSS43 VSS123 AC9 K29 VSS201 VSS274 B8 F25 RSVD8
AN4 VSS44 VSS124 AC8 K26 VSS202 VSS275 B7 F24 RSVD9
AM29 VSS45 VSS125 AC6 J34 VSS203 VSS276 B5 F23 RSVD10
AM25 VSS46 VSS126 AC5 J31 VSS204 VSS277 B3 D24 RSVD11 RSVD51 AJ32
AM22 VSS47 VSS127 AC3 H33 VSS205 VSS278 B2 G25 RSVD12 RSVD52 AK32
AM19 VSS48 VSS128 AC2 H30 VSS206 VSS279 A35 G24 RSVD13
AM16 VSS49 VSS129 AB35 H27 VSS207 VSS280 A32 E23 RSVD14
AM13 VSS50 VSS130 AB34 H24 VSS208 VSS281 A29 D23 RSVD15
AM10 VSS51 VSS131 AB33 H21 VSS209 VSS282 A26 C30 RSVD16 VCC_DIE_SENSE AH27
AM7 VSS52 VSS132 AB32 H18 VSS210 VSS283 A23 A31 RSVD17
AM4 VSS53 VSS133 AB31 H15 VSS211 VSS284 A20 B30 RSVD18
AM3 VSS54 VSS134 AB30 H13 VSS212 VSS285 A3 B29 RSVD19
AM2 VSS55 VSS135 AB29 H10 VSS213 D30 RSVD20 RSVD54 AN35
AM1 VSS56 VSS136 AB28 H9 VSS214 B31 RSVD21 RSVD55 AM35
AL34 VSS57 VSS137 AB27 H8 VSS215 A30 RSVD22
AL31 VSS58 VSS138 AB26 H7 VSS216 C29 RSVD23
AL28 VSS59 VSS139 Y9 H6 VSS217
AL25 VSS60 VSS140 Y8 H5 VSS218
AL22 VSS61 VSS141 Y6 H4 VSS219 J20 RSVD24
AL19 VSS62 VSS142 Y5 H3 VSS220 B18 RSVD25 RSVD56 AT2
AL16 VSS63 VSS143 Y3 H2 VSS221 TP88 A19 VCCIO_SEL RSVD57 AT1
AL13 VSS64 VSS144 Y2 H1 VSS222 RSVD58 AR1
AL10 VSS65 VSS145 W35 G35 VSS223
B AL7 VSS66 VSS146 W34 G32 VSS224 J15 RSVD27 B
AK33 VSS69 VSS149 W31 G23 VSS227 KEY B1
AK30 VSS70 VSS150 W30 G20 VSS228
AK22 VSS73 VSS153 W27 F34 VSS231
AK19 VSS74 VSS154 W26 F31 VSS232
AK16 VSS75 VSS155 U9 F29 VSS233
AK13 U8 CPU-989P-rPGA
VSS76 VSS156
AK10 VSS77 VSS157 U6
AK7 VSS78 VSS158 U5
AK4 VSS79 VSS159 U3
AJ25 VSS80 VSS160 U2
CPU-989P-rPGA CPU-989P-rPGA
Processor Strapping The CFG signals have a default value of '1' if not terminated on the board.
CFG[6:5] (PCIE Port Bifurcation Straps)
CFG2 R52 1K/F_4
1 0 11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
CFG2 CFG7 R30 *1K/F_4 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
A (PEG Static Lane Reversal) Normal Operation Lane Reversed 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled A
CFG4
(DP Presence Strap) Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP

CFG7 PEG train immediately following PEG wait for BIOS training
(PEG Defer Training) xxRESETB de assertion PROJECT : ZQR
1A
Sandy Bridge 4/4
5 4 3 2 1
5 4 3 2 1
+3V
08
Cougar Point (DMI,FDI,PM) R10
R12
2.2K_4 INT_LVDS_EDIDCLK
2.2K_4 INT_LVDS_EDIDDATA
Cougar Point (LVDS,DDI)
U13C
U13D
4 DMI_RXN0 BC24 DMI0RXN FDI_RXN0 BJ14 FDI_TXN0 4 16 INT_LVDS_BLON J47 L_BKLTEN SDVO_TVCLKINN AP43
D 4 DMI_RXN1 BE20 DMI1RXN FDI_RXN1 AY14 FDI_TXN1 4 16 INT_LVDS_DIGON M45 L_VDD_EN SDVO_TVCLKINP AP45 D
4 DMI_RXN2 BG18 DMI2RXN FDI_RXN2 BE14 FDI_TXN2 4
4 DMI_RXN3 BG20 DMI3RXN FDI_RXN3 BH13 FDI_TXN3 4 16 INT_LVDS_BRIGHT P45 L_BKLTCTL SDVO_STALLN AM42
FDI_RXN4 BC12 FDI_TXN4 4 SDVO_STALLP AM40
4 DMI_RXP0 BE24 BJ12 16 INT_LVDS_EDIDCLK INT_LVDS_EDIDCLK T40
DMI0RXP FDI_RXN5 FDI_TXN5 4 L_DDC_CLK
4 DMI_RXP1 BC20 BG10 16 INT_LVDS_EDIDDATA INT_LVDS_EDIDDATA K47 AP39
DMI1RXP FDI_RXN6 FDI_TXN6 4 L_DDC_DATA SDVO_INTN
4 DMI_RXP2 BJ18 DMI2RXP FDI_RXN7 BG9 FDI_TXN7 4 SDVO_INTP AP40
4 DMI_RXP3 BJ20 +3V R33 2.2K_4 T45
DMI3RXP R32 2.2K_4 L_CTRL_CLK
FDI_RXP0 BG14 FDI_TXP0 4 P39 L_CTRL_DATA
4 DMI_TXN0 AW 24 DMI0TXN FDI_RXP1 BB14 FDI_TXP1 4
4 DMI_TXN1 AW 20 BF14 R51 2.37K/F_4 AF37 P38 INT_HDMI_SCL 17
DMI1TXN FDI_RXP2 FDI_TXP2 4 LVD_IBG SDVO_CTRLCLK
4 DMI_TXN2 BB18 DMI2TXN FDI_RXP3 BG13 FDI_TXP3 4 TP20 AF36 LVD_VBG SDVO_CTRLDATA M39 INT_HDMI_SDA 17
AV18 BE12
DMI
FDI
4 DMI_TXN3 DMI3TXN FDI_RXP4 FDI_TXP4 4
FDI_RXP5 BG12 FDI_TXP5 4 AE48 LVD_VREFH
INT. HDMI
4 DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 4 AE47 LVD_VREFL DDPB_AUXN AT49
4 DMI_TXP1 AY20 DMI1TXP FDI_RXP7 BH9 FDI_TXP7 4 DDPB_AUXP AT47
4 DMI_TXP2 AY18 DMI2TXP DDPB_HPD AT40 INT_HDMI_HPD 17
AU18 INT_TXLCLKOUTN AK39
LVDS
4 DMI_TXP3 DMI3TXP 16 INT_TXLCLKOUTN LVDSA_CLK#
AW 16 16 INT_TXLCLKOUTP INT_TXLCLKOUTP AK40 AV42
FDI_INT FDI_INT 4 LVDSA_CLK DDPB_0N INT_HDMI_TXDN2 17
DDPB_0P AV40 INT_HDMI_TXDP2 17
BJ24 AV12 16 INT_TXLOUTN0 INT_TXLOUTN0 AN48 AV45
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4 LVDSA_DATA#0 DDPB_1N INT_HDMI_TXDN1 17
INT_TXLOUTN1 AM47 AV46
Digital Display Interface

16 INT_TXLOUTN1 LVDSA_DATA#1 DDPB_1P INT_HDMI_TXDP1 17
+1.05V_VTT R302 49.9/F_4 DMI_COMP BG25 BC10 16 INT_TXLOUTN2 INT_TXLOUTN2 AK47 AU48
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 4 LVDSA_DATA#2 DDPB_2N INT_HDMI_TXDN0 17
AJ48 LVDSA_DATA#3 DDPB_2P AU47 INT_HDMI_TXDP0 17
R307 750/F_4 DMI2RBIAS BH21 AV14 AV47
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 4 DDPB_3N INT_HDMI_TXCN 17
16 INT_TXLOUTP0 INT_TXLOUTP0 AN47 AV49
LVDSA_DATA0 DDPB_3P INT_HDMI_TXCP 17
BB10 16 INT_TXLOUTP1 INT_TXLOUTP1 AM49
FDI_LSYNC1 FDI_LSYNC1 4 LVDSA_DATA1
16 INT_TXLOUTP2 INT_TXLOUTP2 AK49 LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
C A18 DSWVREN C
DSW VRMEN
R place close to PCH AF40 LVDSB_CLK#
System Power Management
AF39 LVDSB_CLK DDPC_AUXN AP47
INT. DP
SUS_PWR_ACK C12 E22 ICH_RSMRST# R259 150/F_4 INT_CRT_BLU AP49
SUSACK# DPW ROK R258 150/F_4 INT_CRT_GRE DDPC_AUXP DDPC_HPD_PU
AH45 LVDSB_DATA#0 DDPC_HPD AT38
R257 150/F_4 INT_CRT_RED AH47
XDP_DBRST# PCIE_WAKE# LVDSB_DATA#1
4 XDP_DBRST# K3 SYS_RESET# W AKE# B9 PCIE_WAKE# 18,19 AF49 LVDSB_DATA#2 DDPC_0N AY47
AF45 LVDSB_DATA#3 DDPC_0P AY49
DDPC_1N AY43
SYS_PWROK P12 +3V N3 CLKRUN# CLKRUN# 27 AH43 AY45
SYS_PW ROK CLKRUN# / GPIO32 +3V LVDSB_DATA0 DDPC_1P
AH49 LVDSB_DATA1 DDPC_2N BA47
AF47 LVDSB_DATA2 DDPC_2P BA48
27 PWROK_EC PWROK_EC L22 +3V_S5 G8 SUS_STAT# R34 2.7K_4 INT_CRT_DDCCLK AF43 BB47
PW ROK SUS_STAT# / GPIO61 TP43 LVDSB_DATA3 DDPC_3N
R35 2.7K_4 INT_CRT_DDCDAT BB49
DDPC_3P
L10 APW ROK +3V_S5 SUSCLK / GPIO62 N14 PCH_SUSCLK 27
INT_CRT_BLU N48 M43
16 INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
INT_CRT_GRE P49 M36
16 INT_CRT_GRE CRT_GREEN DDPD_CTRLDATA
4 PM_DRAM_PWRGD PM_DRAM_PWRGD B13 +3V_S5 D10 INT_CRT_RED T49
DRAMPW ROK SLP_S5# / GPIO63 TP34 16 INT_CRT_RED CRT_RED
AT45
CRT
ICH_RSMRST# INT_CRT_DDCCLK DDPD_AUXN
27 ICH_RSMRST# C21 RSMRST# SLP_S4# H4 SUSC# 27 16 INT_CRT_DDCCLK T39 CRT_DDC_CLK DDPD_AUXP AT43
16 INT_CRT_DDCDAT INT_CRT_DDCDAT M40 BH41 DDPD_HPD_PU
CRT_DDC_DATA DDPD_HPD
SUS_PWR_ACK K16 SUSW ARN#/SUSPW RDNACK/GPIO30 +3V_S5
SLP_S3# F4 SUSB# 27
R261 33_4 INT_CRT_HSYNC_R DDPD_0N BB43
16 INT_CRT_HSYNC M47 CRT_HSYNC DDPD_0P BB45
R260 33_4 INT_CRT_VSYNC_R M49 BF44
16 INT_CRT_VSYNC CRT_VSYNC DDPD_1N
27 DNBSWON# E20 PW RBTN# SLP_A# G10 TP38 DDPD_1P BE44
DDPD_2N BF42
DAC_IREF T43 BE42
B
AC_PRESENT DAC_IREF DDPD_2P B
H20 ACPRESENT / GPIO31 DSW SLP_SUS# G16 TP33 T42 CRT_IRTN DDPD_3N BJ42
DDPD_3P BG42
R53
PM_BATLOW# 1K/F_4 CougarPoint_R1P0 +3V
E10 BATLOW # / GPIO72 +3V_S5 PMSYNCH AP14 PM_SYNC 4
SYNC RS
PM_RI# A10 +3V_S5 K14 SLP_LAN# 33ohm for Direct Connect DDPC_HPD_PU R48 10K_4
RI# SLP_LAN# / GPIO29
20ohm for Dock Support DDPD_HPD_PU R287 10K_4
CougarPoint_R1P0 20ohm for Switchable Graphics Device Down Topology
10ohm for Switchable Graphics Dock Support Follow PDG eDP disable guide
PCH Pull-high/low(CLG) System PWR_OK(CLG) +3V_RTC
+3V_S5 +3V_S5
+3V +3V_S5
R309
330K_4
CLKRUN# R350 8.2K_4 PM_RI# R326 10K_4 C142
C150 R409 *2.2U/6.3V_4
XDP_DBRST# R353 10K_4 PM_BATLOW# R105 8.2K_4 *0.1U/10V_4 0_4 DSWVREN
R337 *1K_4 PCIE_WAKE# R329 10K_4 U5 5

5
U6 2 R310 On Die DSW VR Enable

IMVP_PWRGD 4,30
ICH_RSMRST# R303 10K_4 SLP_LAN# R91 *10K_4 2 IMVP_PWRGD_R 4 *330K_4
A 4 SYS_PWROK SYS_PWROK 4 1 High = Enable (Default) A
GFX_PWRGD 30
SYS_PWROK R111 10K_4 SUS_PWR_ACK R324 10K_4 1 PWROK_EC
*TC7SH08 Low = Disable
3
AC_PRESENT R83 10K_4 TC7SH08

3
R145
100K_4
PM_DRAM_PWRGD R319 200/F_4 Quanta Computer Inc.
PROJECT : ZQR
1A
B05 Use R409 to exchange U5, C142 for saving cost 05/17 Cougar Point 1/6
5 4 3 2 1
5 4 3 2 1
PCH2(CLG)
RTC Circuitry(RTC) schematic-laptop.blogspot.com
20mils
Cougar Point (HDA,JTAG,SATA)
C389 18P/50V_4 09
2
1
D19 +3V_RTC
U13A
+3VPCU
R301 20K_4 RTC_RST# Y2 R298
+3V_RTC_1 32.768KHZ 10M_4 RTC_X1 A20 C38 LAD0 19,27
1
J2 RTCX1 FWH0 / LAD0
A38
LPC
LAD1 19,27
3
4
BAT54C C400 C390 18P/50V_4 RTC_X2 FWH1 / LAD1 +3V
20MIL C20
RTCX2 FWH2 / LAD2
B37 LAD2 19,27
1U/6.3V_4 C37 LAD3 19,27
*SHORT_ PAD1 RTC_RST# FWH3 / LAD3 SERIRQ R115 8.2K_4
30mils D20
2
RTCRST# PCH_ODD_EN R121 *10K_4
D D36 LFRAME# 19,27 D
SRTC_RST# FWH4 / LFRAME#
G22
SRTCRST#
E36 PCH_DRQ#0 TP23
RTC
R305 20K_4 SRTC_RST# R80 1M_4 SM_INTRUDER# LDRQ0#
+3V_RTC K22 +3V K36 PCH_DRQ#1 TP26
INTRUDER# LDRQ1# / GPIO23
1
J1 PCH_INVRMEN C17 V5 SERIRQ SERIRQ 27
R299 C387 C406 INTVRMEN SERIRQ
1K_4 1U/6.3V_4 1U/6.3V_4
*SHORT_ PAD1 AM3 SATA_RXN0 20
2
ACZ_BITCLK_R SATA0RXN
N34 AM1 SATA_RXP0 20
HDA_BCLK SATA0RXP
SATA 6G
20MIL AP7 SATA_TXN0_C C272 0.01U/25V_4
SATA_TXN0 20 SATA HDD
ACZ_SYNC_R SATA0TXN C274 0.01U/25V_4
CON1 L34 AP5 SATA_TXP0_C SATA_TXP0 20
HDA_SYNC SATA0TXP
1
1 SPKR
2 21 SPKR T10 AM10 SATA_RXN1 20
2 SPKR SATA1RXN
AM8 SATA_RXP1 20
AAA-BAT-054-K01 ACZ_RST#_R SATA1RXP
K34 AP11 SATA_TXN1_C C101 0.01U/25V_4
SATA_TXN1 20 SATA ODD
bat-23_2-4_2 HDA_RST# SATA1TXN C112 0.01U/25V_4
AP10 SATA_TXP1_C SATA_TXP1 20
SATA1TXP
21 ACZ_SDIN0 E34 AD7
HDA_SDIN0 SATA2RXN
AD5
SATA2RXP
G34 AH5
HDA Bus(CLG) R54 33_4 ACZ_BITCLK_R
TP25 HDA_SDIN1 SATA2TXN
SATA2TXP
AH4
21 ACZ_BITCLK C34
IHDA
HDA_SDIN2
AB8
SATA3RXN
A34 AB10
C39 HDA_SDIN3 SATA3RXP
AF3
SATA3TXN
*10p/50V_4 AF1
ACZ_SDOUT_R SATA3TXP
EMI A36
SATA
HDA_SDO
Y7
SATA4RXN
Y5
R64 33_4 ACZ_SYNC_R_1 PCH_GPIO33 SATA4RXP
21 ACZ_SYNC TP83 C36
HDA_DOCK_EN# / GPIO33 +3V SATA4TXN
AD3
AD1
R58 33_4 ACZ_RST#_R SATA4TXP
21 ACZ_RST# N32
HDA_DOCK_RST# / GPIO13 +3V_S5
C Y3 C
SATA5RXN TP45
21 ACZ_SDOUT R288 33_4 ACZ_SDOUT_R Y1 TP41
SATA5RXP
AB3 TP113
PCH_JTAG_TCK SATA5TXN
J3 AB1 TP114
JTAG_TCK SATA5TXP
PCH_JTAG_TMS H7 Y11
JTAG
JTAG_TMS SATAICOMPO
B41 Add a MOSFET Q26,R410,R412 to separate CODE SYNC and PCH Strap signal to avoid leakage issue. 5/19 PCH_JTAG_TDI K5 Y10 SATA_COMP R101 37.4/F_4 +1.05V_VTT
JTAG_TDI SATAICOMPI
+5V R410 10K_4 PCH_JTAG_TDO H1
TP115
2
JTAG_TDO
AB12
SATA3RCOMPO
ACZ_SYNC_R_1 1 3 ACZ_SYNC_R AB13 SATA3_COMP R104 49.9/F_4
SATA3COMPI
Q26
R412 1M_4 2N7002K PCH_SPI_CLK T3 AH1 SATA3_RBIAS R342 750/F_4
SPI_CLK SATA3RBIAS
PCH_SPI_CS0# Y14
SPI_CS0# R347 10K_4 +3V
+3VPCU R333 *10K_4 PCH_SPI_CS1# T1
SPI
SPI_CS1#
P3
SATALED#
PCH_SPI_SI V4 +3V V14 PCH_ODD_EN
SPI_MOSI SATA0GP / GPIO21
PCH_SPI_SO U3 +3V P1 BBS_BIT0
SPI_MISO SATA1GP / GPIO19
CougarPoint_R1P0
PCH JTAG Debug (CLG) PCH Strap Table
+3V_S5
Pin Name Strap description Sampled Configuration

B B
0 = Default (weak pull-down 20K) R116 *1K_4 SPKR
SPKR No reboot mode setting PWROK 1 = Setting to No-Reboot mode +3V
R143 R144
210/F_4 210/F_4 0 = "top-block swap" mode
GNT3# / GPIO55 Top-Block Swap Override PWROK R264 *1K_4
1 = Default (weak pull-up 20K) PCI_GNT3# 10
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TCK
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +3V_RTC R304 330K_4 PCH_INVRMEN
R338 R124 R125 +3V R266 *1K_4

51_4 100/F_4 100/F_4 GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK GNT1# GNT0# Boot Location R348 *1K_4
R272 *1K_4
Default weak pull-up on GNT0/1#
1 1 SPI * BBS_BIT1 10
[Need external pull-down for LPC BIOS]
GPIO19 Boot BIOS Selection 0 [bit-0] PWROK 0 0 LPC R334 *1K_4 BBS_BIT0
MX25L3205DM2I-12G: AKE39FP0Z00
PCH Dual SPI (CLG) 0 = Override R290 *1K_4 ACZ_SDOUT_R
W25X32VSSIG: AKE39ZP0N00 HDA_SDO Flash Descriptor Security RSMRST 1 = Default (weak pull-up 20K) +3V
R284 *Short_4 B06 Change Bottom side 0ȍ R284 to short pad for cost and
27 ME_WR#
SMT cycle time issue. 5/17
0 = Set to Vss R327 2.2K_4 +1.8V
DF_TVS DMI/FDI Termination voltage PWROK R328 1K_4
DF_TVS 11
1 = Set to Vcc (weak pull-down 20K) H_SNB_IVB# 4
+3V
U4
0 = Disable R138 *1K_4
PCH_SPI_CS0#
GPIO28 On-die PLL Voltage Regulator RSMRST# 1 = Enable (Default) PLL_ODVR_EN 11
1 8
PCH_SPI_CLK R126 *short_4 PCH_SPI1_CLK_R CE# VDD
A 6 A
PCH_SPI_SI R131 *short_4 PCH_SPI1_SI_R SCK
PCH_SPI_SO R103 *short_4 PCH_SPI1_SO_R
5
SI 0 = Support by 1.8V (weak pull-down)
2 7 R146 3.3K_4 HDA_SYNC On-Die PLL VR Voltage Select RSMRST +3V_S5 R61 1K_4 ACZ_SYNC_R
SO HOLD# 1 = Support by 1.5V
3 4
C144 WP# VSS C151
*22P/50V_4 SPI Flash 0.1U/10V_4
Should be pull-down
GPIO8 Integrated Clock Chip Enable RSMRST# (weak pull-up 20K)
R102 3.3K_4 REV: B modify footprint

0 = Default (weak pull-down 20K) Quanta Computer Inc.
+3V SPI_MOSI iTPM function Disable APWROK 1 = Enable
PROJECT : ZQR
1A
NV_ALE Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 20kohm) Cougar Point 2/6
5 4 3 2 1
5 4 3 2 1
Cougar Point-M (PCI-E,SMBUS,CLK)
U13B
10
Cougar Point-M (PCI,USB,NVRAM)
18 PCIE_RX1- BG34 PERN1
U13E BJ34 +3V_S5 E12 SMBALERT#
18 PCIE_RX1+ PERP1 SMBALERT# / GPIO11
AY7 On Board LAN C42 0.1U/10V_4 PCIE_TXN1_C AV32
RSVD1 18 PCIE_TX1- PETN1
AV7 C41 0.1U/10V_4 PCIE_TXP1_C AU32 H14 SMB_PCH_CLK
RSVD2 18 PCIE_TX1+ PETP1 SMBCLK
BG26 TP1 RSVD3 AU3
BJ26 BG4 TP29 BE34 C9 SMB_PCH_DAT
TP2 RSVD4 TP28 PERN2 SMBDATA
BH25 TP3 BF34 PERP2
BJ16 AT10 TP31 BB32
TP4 RSVD5 TP32 PETN2
BG16 BC8 AY32
SMBUS
TP5 RSVD6 PETP2 DRAMRST_CNTRL_PCH
AH38 TP6 +3V_S5 SML0ALERT# / GPIO60 A12 DRAMRST_CNTRL_PCH 5
AH37 TP7 RSVD7 AU2 BG36
D PERN3 SMB_ME0_CLK
D
AK43 TP8 RSVD8 AT4 BJ36 PERP3 SML0CLK C8
AK45 AT3 AV34
C18
TP9 RSVD9
AT1 AU34
PETN3
G12 SMB_ME0_DAT For LAN
TP10 RSVD10 PETP3 SML0DATA
N30 TP11 AY3
RSVD11
H3 TP12 AT5 BF36
RSVD12 PERN4
AH12 AV3 BE36
TP13 RSVD13 PERP4 SML1ALERT#_R R322 *0_4
AM4 AV1 AY34 +3V_S5 C13 SML1ALERT# 11,26
TP14 RSVD14 PETN4 SML1ALERT# / PCHHOT# / GPIO74
AM5 BB1 BB34
TP15 RSVD15 PETP4 SMB_ME1_CLK
Y13 BA3 +3V_S5 E14
PCI-E*
TP16 RSVD16 SML1CLK / GPIO58
K24 BB5 BG37
L24
TP17 RSVD17
BB3 BH37
PERN5
+3V_S5 M16 SMB_ME1_DAT For EC
TP18 RSVD18 PERP5 SML1DATA / GPIO75
AB46 TP19 RSVD19 BB7 AY36 PETN5
AB45 BE8 BB36
RSVD
TP20 RSVD20 PETP5
BD4
RSVD21
RSVD22 BF6 19 PCIE_RX6- BJ38 PERN6
BG38
Controller
19 PCIE_RX6+ PERP6
B21 AV5 NV_ALE TP117 WLAN C56 0.1U/10V_4 PCIE_TXN6_LAN_C AU36 M7
TP21 RSVD23 19 PCIE_TX6- PETN6 CL_CLK1 CL_CLK1 19
M20 AV10 C49 0.1U/10V_4 PCIE_TXP6_LAN_C AV36
TP22 RSVD24 19 PCIE_TX6+ PETP6
AY16
Link
TP23
BG46 TP24 AT8 BG40 T11 CL_DATA1 19
RSVD25 PERN7 CL_DATA1
BJ40
PERP7
RSVD26 AY5 AY40 PETN7
BA2 BB40 P10 CL_RST1# 19
RSVD27 PETP7 CL_RST1#
BE28 TP25
BC30 AT12 BE38
TP26 RSVD28 PERN8
BE32 BF3 BC38
TP27 RSVD29 PERP8
BJ32 AW38
TP28 PETN8
BC28 TP29 AY38 PETP8
BE30
TP30
BF32 TP31 +3V_S5 PEG_A_CLKRQ# / GPIO47 M10 PCIE_CLKREQ_PEG# TP49
BG32 TP32 USBP0N C24 Y40 CLKOUT_PCIE0N
AV26 TP33 USBP0P A24 Y39 CLKOUT_PCIE0P
BB26 C25 USBP1- AB37 CLK_PCIE_VGAN TP22
TP34 USBP1N USBP1- 25 CLKOUT_PEG_A_N
CLOCKS
AU28 B25 USBP1+ MB/B-USB1-1 PCIE_CLKREQ0# J2 +3V_S5 AB38 CLK_PCIE_VGAP TP21
TP35 USBP1P USBP1+ 25 PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
AY30 TP36 USBP2N C26
AU26 TP37 A26
USBP2P USBP3-
AY26 TP38 USBP3N K28 USBP3- 25 Mini - 3G AB49 CLKOUT_PCIE1N CLKOUT_DMI_N AV22 CLK_CPU_BCLKN 4
AV28 H28 USBP3+ EXT/B-USB1-1 AB47 AU22 CLK_CPU_BCLKP 4
TP39 USBP3P USBP4- USBP3+ 25 CLKOUT_PCIE1P CLKOUT_DMI_P
AW30
TP40 USBP4N
E28 USBP4- 25 EHCI1
C D28 USBP4+ BlueTooth PCIE_CLKREQ_3G# M1 +3V C
USBP4P USBP4+ 25 PCIECLKRQ1# / GPIO18
C28 USBP5- AM12 CLK_DPLL_SSCLKN 4
USBP5N USBP5- 25 CLKOUT_DP_N
A28 USBP5+ BlueTooth (reserve) AM13
USBP5P USBP5+ 25 CLKOUT_DP_P CLK_DPLL_SSCLKP 4
C29 TP84 19 CLK_PCIE_WLANN CLK_PCIE_WLANN AA48
USBP6N TP87 CLK_PCIE_WLANP CLKOUT_PCIE2N
B29 19 CLK_PCIE_WLANP AA47
PCI_PIRQA# USBP6P CLKOUT_PCIE2P
K40 PIRQA# USBP7N N28 WLAN CLK CLKIN_DMI_N BF18 CLK_BUF_PCIE_3GPLLN
PCI_PIRQB# K38 M28 CLKREQ_WLAN# V10 +3V BE18 CLK_BUF_PCIE_3GPLLP
PCI
PIRQB# USBP7P 19 CLKREQ_WLAN# PCIECLKRQ2# / GPIO20 CLKIN_DMI_P

PCI_PIRQC# H38 L30 USBP8-
PIRQC# USBP8N USBP8- 16
PCI_PIRQD# G38 K30 USBP8+ CCD
PIRQD# USBP8P USBP9- USBP8+ 16
USBP9N
G30 USBP9- 25 TP24 Y37 BJ30 CLK_BUF_BCLKN
dGPU_EDIDSEL# USBP9+ CLKOUT_PCIE3N CLKIN_GND1_N
TP12 C46 +3V E30 EXT/B-USB1-2 Y36 BG30 CLK_BUF_BCLKP
USB
REQ1# / GPIO50 USBP9P USBP9+ 25 TP19 CLKOUT_PCIE3P CLKIN_GND1_P

TP11 DGPU_SELECT# C44 +3V C30 USBP10-
REQ2# / GPIO52 USBP10N USBP10- 19
GPIO54 E40 +3V A30 USBP10+ Mini Card (WLAN) PCIE_CLKREQ_REV0# A8 +3V_S5
REQ3# / GPIO54 USBP10P USBP10+ 19 PCIECLKRQ3# / GPIO25
USBP11N
L32 TP30 G24 CLK_BUF_DREFCLKN
CLKIN_DOT_96N
9 BBS_BIT1 D47 +3V K32 TP27 EHCI2 E24 CLK_BUF_DREFCLKP
GNT1# / GPIO51 USBP11P USBP12- CLKIN_DOT_96P
TP16 E42 GNT2# / GPIO53 +3V USBP12N G32 USBP12- 23 Y43 CLKOUT_PCIE4N
9 PCI_GNT3# F46 +3V E32 USBP12+ Card Reader Y45
GNT3# / GPIO55 USBP12P USBP12+ 23 CLKOUT_PCIE4P
C32 AK7 CLK_BUF_DREFSSCLKN
USBP13N PCIE_CLKREQ_REV1# CLKIN_SATA_N
USBP13P A32 L12 PCIECLKRQ4# / GPIO26 +3V_S5 CLKIN_SATA_P AK5 CLK_BUF_DREFSSCLKP
MPC_PWR_CTRL# G42 +3V
TP15 dGPU_PWM_SELECT# PIRQE# / GPIO2
G40
PIRQF# / GPIO3 +3V
TP13 DGPU_HOLD_RST# C42 +3V C33 USB_BIAS R291 22.6/F_4 Card reader CLK V45 K45 CLK_PCH_14M
EXTTS_SNI_DRV1_PCH PIRQG# / GPIO4 USBRBIAS# CLKOUT_PCIE5N REFCLK14IN
D44 +3V V46
PIRQH# / GPIO5 CLKOUT_PCIE5P
B33 PCIE_CLKREQ5# L14 +3V_S5 H45 CLK_PCI_FB C351 27P/50V_4
TP44 PCI_PME# USBRBIAS PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK
K10 PME#
2
PCI_PLTRST# C6 +3V_S5 A14 USB_OC0# CLK_PCIE_LANN AB42 V47 XTAL25_IN Y1
PLTRST# OC0# / GPIO59 USB_OC0# 25 18 CLK_PCIE_LANN CLKOUT_PEG_B_N XTAL25_IN
+3V_S5 K20 On board LAN CLK 18 CLK_PCIE_LANP CLK_PCIE_LANP AB40 V49 XTAL25_OUT R255 25MHz
OC1# / GPIO40 USB_OC2# CLKOUT_PEG_B_P XTAL25_OUT 1M_4
+3V_S5 B17
1
OC2# / GPIO41 USB_OC3# PCIE_CLKREQ_LAN#
H49 CLKOUT_PCI0 +3V_S5 OC3# / GPIO42 C16 18 PCIE_CLKREQ_LAN# E6 PEG_B_CLKRQ# / GPIO56 +3V_S5
H43 +3V_S5 L16 USB_OC4# C344 27P/50V_4
CLK_PCI_FB R263 CLK_PCI_FB_R CLKOUT_PCI1 OC4# / GPIO43
22_4 J48 +3V_S5 A16 USB_OC1_5# 25 Y47 XCLK_RCOMP R31 90.9/F_4 +1.05V_VTT
R29 22_4 CLK_PCI_LPC_R CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# XCLK_RCOMP
19 CLK_PCI_LPC K42 CLKOUT_PCI3 +3V_S5 OC6# / GPIO10 D14 V40 CLKOUT_PCIE6N
R49 22_4 CLK_PCI_EC_R H40 +3V_S5 C14 USB_OC7# V42
27 CLK_PCI_EC CLKOUT_PCI4 OC7# / GPIO14 CLKOUT_PCIE6P
CLK_PCIE_REQ6# T13 +3V_S5
CougarPoint_R1P0 PCIECLKRQ6# / GPIO45
V38 +3V K43 SKU_ID1 11
FLEX CLOCKS
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
V37
B CLKOUT_PCIE7P CLK_FLEX1 TP74
B
+3V CLKOUTFLEX1 / GPIO65
F47
CLK_PCIE_REQ7# K12 +3V_S5
PCIECLKRQ7# / GPIO46
+3V H47 CLK_FLEX2 TP76
CLKOUTFLEX2 / GPIO66
TP35 AK14
CLKOUT_ITPXDP_N
TP37 AK13 CLKOUT_ITPXDP_P +3V K49 EXT48MHZ 23
CLKOUTFLEX3 / GPIO67
CougarPoint_R1P0
CLK_REQ/Strap Pin(CLG) SMBus/Pull-up(CLG)

PLTRST#(CLG) PCI/USBOC# Pull-up(CLG) SMBus(PCH)
+3V_S5
+3V_S5 +3V
R355 10K_4 PCIE_CLKREQ0#
+3V_S5 +3V R330 10K_4 PCIE_CLKREQ_REV0#
R314 R112 10K_4 PCIE_CLKREQ_REV1#
10 1 USB_OC7# PCI_PIRQA# R22 8.2K_4 R89 10K_4 PCIE_CLKREQ5#
USB_OC4# 9 2 USB_OC0# PCI_PIRQB# R25 8.2K_4 R140 10K_4 PCIE_CLKREQ_LAN# R87 R110
8 3 USB_OC6# PCI_PIRQC# R27 8.2K_4 R137 10K_4 CLK_PCIE_REQ6# 2.2K_4
2
USB_OC2# 7 4 USB_OC1_5# PCI_PIRQD# R38 8.2K_4 R106 10K_4 CLK_PCIE_REQ7# 4.7K_4
USB_OC3# 6 5
+3V_S5 +3V 27 MBCLK2 3 1 SMB_ME1_CLK SMB_PCH_CLK 3 1 SMB_RUN_CLK 14,15,19
10KX8
R351 10K_4 PCIE_CLKREQ_3G# Q5 Q7 2N7002K
R362 10K_4 CLKREQ_WLAN# 2N7002K
C440 +3V_S5 +3V

0.1U/10V_4 +3V_S5
5
+3V R142 10K_4 PCIE_CLKREQ_PEG#

PCI_PLTRST# 2 R40 R141 *10K_4
4 PLTRST# PLTRST# 4,18,19,23,27 10 1 DGPU_HOLD_RST# R84 R94
1 MPC_PWR_CTRL# 9 2 EXTTS_SNI_DRV1_PCH 2.2K_4
2
8 3 dGPU_EDIDSEL# 4.7K_4
A U16 GPIO54 7 4 DGPU_SELECT# A
3
TC7SH08FU R364 dGPU_PWM_SELECT# 6 5 CLK_BUF_BCLKN R294 10K_4 3 1 SMB_ME1_DAT SMB_PCH_DAT 3 1

27 MBDATA2 SMB_RUN_DAT 14,15,19
100K_4 CLK_BUF_BCLKP R292 10K_4
10KX8 Q4 Q6 2N7002K
2N7002K
CLK_BUF_PCIE_3GPLLN R313 10K_4
CLK_BUF_PCIE_3GPLLP R311 10K_4
MPC Switch Control CLK_BUF_DREFCLKN R82 10K_4 +3V_S5
CLK_BUF_DREFCLKP R79 10K_4
Low = MPC ON CLK_BUF_DREFSSCLKN R107 10K_4 R321 1K_4 DRAMRST_CNTRL_PCH
MPC_PWR_CTRL# High = MPC OFF (Default) CLK_BUF_DREFSSCLKP R113 10K_4
CLK_PCH_14M R262 10K_4 R93 10K_4 SMBALERT#
MPC_PWR_CTRL#
R109 2.2K_4 SMB_PCH_CLK
SMB_PCH_DAT
R50 *1K_4 R100 2.2K_4
R331 2.2K_4 SMB_ME0_CLK
R95 2.2K_4 SMB_ME0_DAT PROJECT : ZQR
R320 10K_4 SML1ALERT#_R Size Document Number Rev
CLOCK TERMINATION for FCIM Cougar Point 3/6 1A

5 4 3 2 1
5 4 3 2 1
Cougar Point (GPIO,VSS_NCTF,RSVD)
27 EC_EXT_SMI#
S_GPIO
EC_EXT_SMI#
T7
A42
U13F
BMBUSY# / GPIO0
TACH1 / GPIO1
+3V
+3V
+3V
+3V
TACH4 / GPIO68
TACH5 / GPIO69
C40
B41 R280
DGPU_PRSNT#
1.5K/F_4
11
BOARD_ID1 H36 +3V +3V C41 R276 1.5K/F_4 +3V
TACH2 / GPIO6 TACH6 / GPIO70
D EC_EXT_SCI# D
27 EC_EXT_SCI# E38 TACH3 / GPIO7 +3V +3V TACH7 / GPIO71 A40 R279 1.5K/F_4
TP111 C10 +3V_S5

GPIO8
SMIB# C4 +3V_S5
LAN_PHY_PWR_CTRL / GPIO12
PCH_GPIO15 G2 +3V_S5 P4 EC_A20GATE EC_A20GATE 27
GPIO15 A20GATE
AU16 R325 *0_4 EC_PECI 4,27
check VR_ON GPIO SKU_ID0 PECI
U2 SATA4GP / GPIO16 +3V
P5 EC_RCIN# EC_RCIN# 27
RCIN#
GPIO
TP10 dGPU_PWROK D40 +3V AY11 TP36
CPU/MISC
TACH0 / GPIO17 PROCPWRGD H_PWRGOOD 4
BIOS_REC T5 +3V AY10 PCH_THRMTRIP# R323 390_4 PM_THRMTRIP# 4
SCLOCK / GPIO22 THRMTRIP#
CR_WAKER# E8 +3V_S5 T14
GPIO24 / MEM_LED INIT3_3V#
GPIO27 E16 DSW AY1 DF_TVS 9
GPIO27 DF_TVS
9 PLL_ODVR_EN PLL_ODVR_EN P8 +3V_S5

GPIO28
TS_VSS1 AH8
Need Check STP_PCI# K1 +3V
STP_PCI# / GPIO34
TS_VSS2 AK11
TP40 dGPU_VRON K4 +3V
GPIO35
C TS_VSS3 AH10 C
TP42 DMI_OVRVLTG V8 +3V
SATA2GP / GPIO36
TS_VSS4 AK10
FDI_OVRVLTG M5 +3V
SATA3GP / GPIO37
MFG_MODE N2 +3V P37
SLOAD / GPIO38 NC_1
BOARD_ID0 M3 +3V DGPU_PRSNT# SKU_ID1 SKU_ID0 VGA H/W Setup
SDATAOUT0 / GPIO39 (GPIO68) (GPIO64) (GPIO16) Signal Menu
TEST_SET_UP V13 +3V BG2
SDATAOUT1 / GPIO48 VSS_NCTF_15
R148 *short_4 CRIT_TEMP_REP# V3 +3V BG48 UMA Only 1 0 0 UMA Hidden UMA boot
10,26 SML1ALERT# SATA5GP / GPIO49 VSS_NCTF_16
BOARD_ID2 D6 GPIO57 +3V_S5 VSS_NCTF_17 BH3
VSS_NCTF_18 BH47
+3V
A4 VSS_NCTF_1 VSS_NCTF_19 BJ4
R281 IV@10K_4 DGPU_PRSNT#
A44 BJ44 R282 *EV@100K_4
VSS_NCTF_2 VSS_NCTF_20
A45 VSS_NCTF_3 VSS_NCTF_21 BJ45
NCTF
SV_SET_UP A46 BJ46 +3V
VSS_NCTF_4 VSS_NCTF_22 GPIO Pull-up/Pull-down(CLG)
A5 BJ5 R37 *EV@10K_4 SKU_ID1 10
High = Strong (Default) VSS_NCTF_5 VSS_NCTF_23 R36 IV@10K_4
B B
A6 BJ6 +3V_S5
VSS_NCTF_6 VSS_NCTF_24
+3V B3 C2 CR_WAKER# R108 10K/F_4
VSS_NCTF_7 VSS_NCTF_25 SMIB# R341 10K_4 +3V
TEST_SET_UP R136 10K_4 B47 C48 PLL_ODVR_EN R139 *10K_4
R120 *0_4 VSS_NCTF_8 VSS_NCTF_26 R345 *10K_4 SKU_ID0
BD1 D1 R332 IV@10K_4
SGPIO VSS_NCTF_9 VSS_NCTF_27 +3V
+3V BD49 D49
VSS_NCTF_10 VSS_NCTF_28 EC_EXT_SMI# R278 10K_4
S_GPIO R135 1K/F_4 BE1 E1 EC_EXT_SCI# R41 10K_4 +3V
R118 *100_4 VSS_NCTF_11 VSS_NCTF_29
+3V_S5 BE49 E49 STP_PCI# R354 *10K_4 R336 10K_4 BOARD_ID0 R352 *10K_4
VSS_NCTF_12 VSS_NCTF_30 EC_A20GATE R119 10K_4
PCH_GPIO15 R356 1K_4 BF1 F1 EC_RCIN# R123 10K_4 R45 10K_4 BOARD_ID1 R46 *10K_4
VSS_NCTF_13 VSS_NCTF_31 CRIT_TEMP_REP# R147 10K_4
MFG-TEST BF49 VSS_NCTF_14 VSS_NCTF_32 F49
Intel ME Crypto Transport Layer dGPU_PWROK R23 *10K_4 +3V_S5
Security (TLS) cipher suite +3V
CougarPoint_R1P0
Low = Disable (Default) MFG_MODE R349 10K_4 R353?? GPIO27 R86 *10K_4
R335 *0_4 GPIO27: R339 100K_4 BOARD_ID2 R340 *10K_4
High = Enable Un-multiplexed. Can be configured as wake input to allow wakes from Deep Sleep.
If not used then use 8.2-kȍ to 10-kȍ pull-down to GND.
A A
+3V +3V +3V
FDI_OVRVLTG R122 *10K/F_4 DMI_OVRVLTG R128 *200K/F_4 BIOS_REC R134 10K_4

R117 *0_4
Low = Tx, Rx terminated to PROJECT :ZQR
FDI TERMINATION LOW - Tx, Rx terminated DMI TERMINATION same voltage (DC Coupling Mode) High = Disable (Default)
VOLTAGE OVERRIDE to same voltage VOLTAGE OVERRIDE (DEFAULT) BIOS RECOVERY Size Document Number Rev
Low = Enable Cougar Point 4/6 1A

5 4 3 2 1
5 4 3 2 1
PCH5(CLG)
schematic-laptop.blogspot.com 12
Cougar Point-M (POWER)
COUGAR POINT (POWER) +1.05V_VCCUSBCORE +1.05V_VTT
+VCCA_DAC_1_2 +3V U13J POWER R62 *short_8

VccADAC =1mA(8mils)
L22 1500ohm/3A +VCCACLK AD49 N26 VCCSUS3_3 = 119mA(15mils)
+1.05V_VTT U13G POWER TP78 VCCACLK VCCIO[29] C69
VCCDSW3_3= 3mA P26 1U/6.3V_4
C356 C352 C346 C339 R132 *short_4 +VCCPDSW VCCIO[30]
VccCORE =1.3 A(60mils) +3V_S5 T16 VCCDSW3_3
AA23 U48 0.01U/25V_4 0.1U/10V_4 10u/6.3V_6 10U/6.3V_8 P28 +3V_S5
D VCCCORE[1] VCCADAC VCCIO[31] D
AC23 VCCCORE[2]
CRT
AD21 C143 PCH_VCCDSW V12 T27 R76 *short_6
VCCCORE[3] +VCCALVDS +3V TP39 DCPSUSBYP VCCIO[32]
C85 C79 C72 C45 AD23 U47 0.1U/10V_4
VCCCORE[4] VSSADAC
VCC CORE
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 4.7U/6.3V_6 AF21 VccALVDS=1mA(8mils) T29
VCCCORE[5] R47 *short_4 +3V_SUS_CLKF33 VCCIO[33] C82
AF23 VCCCORE[6] T38 VCC3_3[5]
AG21 0.1U/10V_4
VCCCORE[7] +3V_VCCPUSB
AG23 T23
VCCCORE[8] VCCSUS3_3[7]
AG24 AK36 TP89 BH23
VCCCORE[9] VCCALVDS VCCAPLLDMI2
AG26 VCCCORE[10] VCCSUS3_3[8] T24
AG27 AK37 R68 *short_6 +VCCDPLL_CPY AL29 R73 *short_6
VCCCORE[11] VSSALVDS +VCC_TX_LVDS +1.8V +1.05V_VTT VCCIO[14]
AG29 V23
USB
VCCCORE[12] VCCSUS3_3[9]
AJ23 VccTX_LVDS=60mA(10mils)
LVDS
VCCCORE[13] L27 0.1uH_8 +VCCSUS1 C75
AJ26 VCCCORE[14] VCCTX_LVDS[1] AM37 AL24 DCPSUS[3] VCCSUS3_3[10] V24
AJ27 0.1U/10V_4
VCCCORE[15] +3V_VCCAUBG
AJ29 VCCCORE[16] VCCTX_LVDS[2] AM38 VCCSUS3_3[6] P24
AJ31 C364 C365 C363 VCCME(+1.05V) = ??A(??mils) C95
VCCCORE[17] 0.01U/25V_4 0.01U/25V_4 10U/6.3V_8 *1U/6.3V_4
AP36 AA19
+1.05V_VTT VCCTX_LVDS[3] VCCASW[1] +VCCAUPLL R78 *short_6
VCCIO[34] T26 +1.05V_VTT
AP37 +1.05V_VTT +1.05V_VCCEPW AA21 VCC5REFSUS=1mA
R85 *short_6 +1.05V_PCH_VCCDPLL_EXP VCCTX_LVDS[4] VCCASW[2]
AN19 VCCIO[28] VccASW =1.01 A(60mils)
R66 *short_1206 AA24 M26 +5V_PCH_VCC5REFSUS R71 10/F_4 +5V_S5
VCCASW[3] V5REF_SUS
+3V_VCC_GIO +3V
Clock and Miscellaneous

BJ22 AA26 D2 RB500V-40 +3V_S5
+1.05V_VTT TP93 VCCAPLLEXP VCCASW[4] +VCCA_USBSUS
C99 C93 C86 AN23 C68
R28 *short_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 DCPSUS[4] 0.1U/10V_4
VccIO =2.925 A(140mils) V33 AA27
HVCMOS
VCC3_3[6] VCCASW[5] +3V_VCCPSUS
AN16 AN24
VCCIO[15] VCCDMI = 42mA(10mils) VCCSUS3_3[1] C94
AA29
C36 VCCASW[6] *1U/6.3V_4
AN17 VCCIO[16]
C74 C98 C97 V34 0.1U/10V_4 +1.1V_VCC_DMI +1.05V_VTT AA31 V5REF= 1mA
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VCC3_3[7] VCCASW[7]
AN21 R346 *short_4 AC26 P34 +5V_PCH_VCC5REF R59 10/F_4 +5V
VCCIO[17] C80 C78 VCCASW[8] V5REF
AN26 10u/6.3V_6 10u/6.3V_6 AC27 D1 RB500V-40 +3V
VCCIO[18] C430 VCCASW[9] C43
N20
PCI/GPIO/LPC
+VCCAFDI_VRM 1U/6.3V_4 VCCSUS3_3[2] 1U/6.3V_4
AN27 VCCIO[19] VCCVRM[3] AT16 +VCCAFDI_VRM AC29 VCCASW[10]
VCCSUS3_3[3] N22
C81 C46 AP21 AC31
1U/6.3V_4 4.7U/6.3V_6 VCCIO[20] VCCASW[11] +3V_VCCPSUS R81 *short_6
P20 +3V_S5
VCCCLKDMI = 80mA(8mils) VCCSUS3_3[4]
AP23 AT20 AD29
VCCIO[21] VCCDMI[1] VCCASW[12]
C
DMI P22 VCCSUS3_3 = 119mA(15mils) C
+1.1V_VCC_DMI_CCI +1.05V_VTT VCCSUS3_3[5] C92
AP24 AD31
VCCIO
VCCIO[22] VCCASW[13] 1U/10V_4

AP26 AB36 R44 *short_4 W21 AA16
VCCIO[23] VCCCLKDMI VCCASW[14] VCC3_3[1]
AT24 W23 W16 +3V_VCCPCORE R129 *short_6
+3V VCCIO[24] VCCASW[15] VCC3_3[8] +3V
C35 C37
1U/6.3V_4 *10U/6.3V_6 W24 VCCASW[16] VCC3_3[4] T34 +3V VCCPCORE = 28mA(10mils)
R297 *short_6 +3V_VCC_EXP AN33 C139
VCCIO[25] 0.1U/10V_4
W26
VCCASW[17] C63
AN34 VCCIO[26] VCCDFTERM[1] AG16
C388 +VCCP_NAND +1.8V W29 0.1U/10V_4
0.1U/10V_4 VCCASW[18]
BH29 AG17 R361 *short_8 +1.05V_VTT W31 AJ2 +3V
DFT / SPI
VCC3_3[3] VCCDFTERM[2] VCCASW[19] VCC3_3[2]

R127 *short_6 W33 VCCASW[20]
AJ16 C100 VCCPNAND = 190 mA(15mils) AF13 C431
VCCDFTERM[3] 0.1U/10V_4 VCCIO[5] 0.1U/10V_4 +1.05V_VTT
+VCCAFDI_VRM +VCCAFDI_VRM AP16 C140 C113 0.1U/10V_4 +VCCRTCEXT N16
VCCVRM[2] 1U/6.3V_4 DCPRTC +V1.05S_SATA3 R360 *short_8
VCCDFTERM[4] AJ17 VCCIO[12] AH13
+1.05V_VCCAPLL_FDI BG6 +VCCAFDI_VRM +VCCAFDI_VRM Y49 AH14

TP106 VccAFDIPLL VCCVRM[4] VCCIO[13]
R60 *short_6 C429
+3V_VCCME_SPI +3V 1U/10V_4
R312 *short_8 +1.05V_VCCDPLL_FDI AP17 AF14
+1.05V_VTT VCCIO[27] VCCIO[6]
FDI
V1 R344 *short_6 C48 65mA(10mils) +1.05V_VCCA_A_DPL BD47
SATA
VCCSPI 1U/6.3V_4 VCCADPLLA +V1.1LAN_VCCAPLL
VCCAPLLSATA AK1 TP116
AU20 8mA(8mils) +1.05V_VCCA_B_DPL BF47 VCCVRM= 114mA(15mils)
+1.05V_VTT VCCDMI[2] VCCADPLLB
C432 VCCSPI = 20mA(8mils)
1U/6.3V_4 R63 *short_6 AF11 +VCCAFDI_VRM
CougarPoint_R1P0 +VCCDIFFCLK VCCVRM[1]
AF17 VCCIO[7]
+VCCDIFFCLKN AF33
C60 VCCDIFFCLKN[1] R130 *short_6
AF34 AC16 +1.05V_VTT
1U/6.3V_4 VCCDIFFCLKN= 55mA(10mils) VCCDIFFCLKN[2] VCCIO[2]
AG34 VCCDIFFCLKN[3]
+1.05V_VTT AC17
VCCIO[3]
VCCSSC= 95mA(10mils) C145
R77 *0_6 +V1.05V_SSCVCC AG33 AD17 1U/6.3V_4
VCCSSC VCCIO[4]
C91 C111 0.1U/10V_4 +VCCSST V16 +1.05V_VCCEPW VCCME = 1.01A(60mils)

B
*1U/6.3V_4 DCPSST B
+VCCAFDI_VRM T17 T21

+1.05V_VTT +V1.05M_VCCSUS DCPSUS[1] VCCASW[22]
V19
DCPSUS[2]
MISC
VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1 R316 *short_4 +VTT_VCCPCPU V21
R265 *short_6 VCCASW[23]
1.5V (Mobile)
CPU
+1.5V
1mA(8mils) BJ8
V_PROC_IO
C420 C423 C424 T19
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 VCCASW[21]
+3V_RTC VCCSUSHDA= 10mA(8mils)
RTC
A22 P32 +V3.3A_1.5A_HDA_IO R67 *short_4
HDA
VCCRTC VCCSUSHDA +3V_S5
VCCRTC<1mA(8mils)
C385 C386 C393 CougarPoint_R1P0 C64 C65
1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 *1U/6.3V_4 0.1U/10V_4
L21 10UH/100mA_8 +1.05V_VCCA_A_DPL

+1.05V_VTT
+ C338 C355
220U/2.5V_3528 1U/6.3V_4
+3V
L24 10UH/100mA_8 +1.05V_VCCA_B_DPL
R251 1/F_4 L23 10UH/100mA_8 +3V_SUS_CLKF33

+ C357 C354
*220U/2.5V_3528 1U/6.3V_4
C349 C350
A 4.7U/6.3V_6 1U/10V_4 A

PROJECT : ZQR
Cougar Point 5/6 1A

5 4 3 2 1
5 4 3 2 1
U13I
PCH6(CLG) AY4
AY42
AY46
AY8
B11
B15
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
H46
K18
K26
K39
K46
K7
13
VSS[164] VSS[264]
B19 L18
IBEX PEAK-M (GND) B23
B27
VSS[165]
VSS[166]
VSS[265]
VSS[266] L2
L20
VSS[167] VSS[267]
B31 VSS[168] VSS[268] L26
D B35 VSS[169] VSS[269] L28 D
B39 VSS[170] VSS[270] L36
B7 VSS[171] VSS[271] L48
F45 VSS[172] VSS[272] M12
U13H BB12 P16
VSS[173] VSS[273]
H5 VSS[0] BB16 VSS[174] VSS[274] M18
BB20 VSS[175] VSS[275] M22
AA17 VSS[1] VSS[80] AK38 BB22 VSS[176] VSS[276] M24
AB11 VSS[6] VSS[85] AL16 BB4 VSS[181] VSS[281] M4
AB14 VSS[7] VSS[86] AL17 BB46 VSS[182] VSS[282] M42
AB39 VSS[8] VSS[87] AL19 BC14 VSS[183] VSS[283] M46
AB4 VSS[9] VSS[88] AL2 BC18 VSS[184] VSS[284] M8
AB43 VSS[10] VSS[89] AL21 BC2 VSS[185] VSS[285] N18
AB5 VSS[11] VSS[90] AL23 BC22 VSS[186] VSS[286] P30
AB7 VSS[12] VSS[91] AL26 BC26 VSS[187] VSS[287] N47
AC19 VSS[13] VSS[92] AL27 BC32 VSS[188] VSS[288] P11
AC21 VSS[15] VSS[94] AL33 BC36 VSS[190] VSS[290] T33
AC34 VSS[18] VSS[97] AM11 BC48 VSS[193] VSS[293] P47
AC48 VSS[19] VSS[98] AM14 BD46 VSS[194] VSS[294] P7
AD10 VSS[20] VSS[99] AM36 BD5 VSS[195] VSS[295] R2
C AD11 VSS[21] VSS[100] AM39 BE22 VSS[196] VSS[296] R48 C
AD12 VSS[22] VSS[101] AM43 BE26 VSS[197] VSS[297] T12
AD13 VSS[23] VSS[102] AM45 BE40 VSS[198] VSS[298] T31
AD19 VSS[24] VSS[103] AM46 BF10 VSS[199] VSS[299] T37
AD24 VSS[25] VSS[104] AM7 BF12 VSS[200] VSS[300] T4
AD26 VSS[26] VSS[105] AN2 BF16 VSS[201] VSS[301] W34
AD27 VSS[27] VSS[106] AN29 BF20 VSS[202] VSS[302] T46
AD36 VSS[30] VSS[109] AP12 BF26 VSS[205] VSS[305] V11
AD38 VSS[32] VSS[111] AP28 BD3 VSS[207] VSS[307] V26
AD43 VSS[37] VSS[116] AP42 BG17 VSS[212] VSS[312] V39
AD8 VSS[40] VSS[119] AR2 BG44 VSS[215] VSS[315] W17
AE2 VSS[41] VSS[120] AR48 BG8 VSS[216] VSS[316] W19
AE3 VSS[42] VSS[121] AT11 BH11 VSS[217] VSS[317] W2
AF10 VSS[43] VSS[122] AT13 BH15 VSS[218] VSS[318] W27
AF12 VSS[44] VSS[123] AT18 BH17 VSS[219] VSS[319] W48
AD14 VSS[45] VSS[124] AT22 BH19 VSS[220] VSS[320] Y12
AD16 VSS[46] VSS[125] AT26 H10 VSS[221] VSS[321] Y38
AF16 VSS[47] VSS[126] AT28 BH27 VSS[222] VSS[322] Y4
B AF19 VSS[48] VSS[127] AT30 BH31 VSS[223] VSS[323] Y42 B
AF27 VSS[51] VSS[130] AT39 BH39 VSS[226] VSS[328] BG29
AF29 VSS[52] VSS[131] AT42 BH43 VSS[227] VSS[329] N24
AF31 VSS[53] VSS[132] AT46 BH7 VSS[228] VSS[330] AJ3
AF38 VSS[54] VSS[133] AT7 D3 VSS[229] VSS[331] AD47
AF4 VSS[55] VSS[134] AU24 D12 VSS[230] VSS[333] B43
AF42 VSS[56] VSS[135] AU30 D16 VSS[231] VSS[334] BE10
AF46 VSS[57] VSS[136] AV16 D18 VSS[232] VSS[335] BG41
AF5 VSS[58] VSS[137] AV20 D22 VSS[233] VSS[337] G14
AF7 VSS[59] VSS[138] AV24 D24 VSS[234] VSS[338] H16
AF8 VSS[60] VSS[139] AV30 D26 VSS[235] VSS[340] T36
AG19 VSS[61] VSS[140] AV38 D30 VSS[236] VSS[342] BG22
AG2 VSS[62] VSS[141] AV4 D32 VSS[237] VSS[343] BG24
AG31 VSS[63] VSS[142] AV43 D34 VSS[238] VSS[344] C22
AG48 VSS[64] VSS[143] AV8 D38 VSS[239] VSS[345] AP13
AH11 VSS[65] VSS[144] AW14 D42 VSS[240] VSS[346] M14
AH3 VSS[66] VSS[145] AW18 D8 VSS[241] VSS[347] AP3
AH36 VSS[67] VSS[146] AW2 E18 VSS[242] VSS[348] AP1
AH39 VSS[68] VSS[147] AW22 E26 VSS[243] VSS[349] BE16
AH40 VSS[69] VSS[148] AW26 G18 VSS[244] VSS[350] BC16
AH42 VSS[70] VSS[149] AW28 G20 VSS[245] VSS[351] BG28
AH46 VSS[71] VSS[150] AW32 G26 VSS[246] VSS[352] BJ28
AH7 VSS[72] VSS[151] AW34 G28 VSS[247]
AJ19 VSS[73] VSS[152] AW36 G36 VSS[248]
AJ21 VSS[74] VSS[153] AW40 G48 VSS[249]
A AJ24 VSS[75] VSS[154] AW48 H12 VSS[250] A
AJ33 VSS[76] VSS[155] AV11 H18 VSS[251]
AJ34 VSS[77] VSS[156] AY12 H22 VSS[252]
AK12 VSS[78] VSS[157] AY22 H24 VSS[253]
AK3 VSS[79] VSS[158] AY28 H26 VSS[254]
H30
CougarPoint_R1P0 H32
VSS[255]
VSS[256]
H34 VSS[257]
F3 VSS[258] PROJECT :ZQR
1A
CougarPoint_R1P0
Cougar Point 6/6
5 4 3 2 1
5 4 3 2 1
5 M_A_A[15:0]
DDR RVS 4H
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
JDIM2A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
M_A_DQ4
M_A_DQ5
M_A_DQ7
M_A_DQ6
M_A_DQ[63:0] 5
2.48A
+1.5V_SUS
75
76
JDIM2B
VDD1
VDD2
VSS16
VSS17
44
48
14
95 A3 DQ3 17 81 VDD3 VSS18 49
M_A_A4 92 4 M_A_DQ1 82 54
M_A_A5 A4 DQ4 M_A_DQ0 VDD4 VSS19
91 A5 DQ5 6 87 VDD5 VSS20 55
M_A_A6 90 16 M_A_DQ3 88 60
86 A7 DQ7 18 93 VDD7 VSS22 61
D M_A_A8 M_A_DQ8 D
89 A8 DQ8 21 94 VDD8 VSS23 65
M_A_A9 85 23 M_A_DQ9 99 66
107 A10/AP DQ10 33 100 VDD10 VSS25 71
M_A_A11 84 35 M_A_DQ10 105 72
A11 DQ11 VDD11 VSS26
PC2100 DDR3 SDRAM SO-DIMM

M_A_A12 83 22 M_A_DQ12 106 127
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD12 VSS27
119 A13 DQ13 24 111 VDD13 VSS28 128
M_A_A14 80 34 M_A_DQ11 112 133
78 A15 DQ15 36 117 VDD15 VSS30 134

39 M_A_DQ20 118 138
DQ16 M_A_DQ21 VDD16 VSS31
5 M_A_BS#0 109 BA0 DQ17 41 123 VDD17 VSS32 139
108 51 M_A_DQ19 124 144
5 M_A_BS#1 BA1 DQ18 VDD18 VSS33
79 53 M_A_DQ18 145
5 M_A_BS#2 BA2 DQ19 VSS34
114 40 M_A_DQ16 199 150
5 M_A_CS#0 S0# DQ20 +3V VDDSPD VSS35
121 42 M_A_DQ17 151
5 M_A_CS#1 S1# DQ21 VSS36
101 50 M_A_DQ22 77 155
5 M_A_CLKP0 CK0 DQ22 NC1 VSS37
103 52 M_A_DQ23 122 156
5 M_A_CLKN0 CK0# DQ23 NC2 VSS38
102 57 M_A_DQ25 125 161
5 M_A_CLKP1 CK1 DQ24 NCTEST VSS39
104 59 M_A_DQ24 R176 10K_4 162
5 M_A_CLKN1 CK1# DQ25 +3V VSS40
73 67 M_A_DQ27 198 167
5 M_A_CKE0 CKE0 DQ26 EVENT# VSS41
74 69 M_A_DQ31 5,15 DDR3_DRAMRST# DDR3_DRAMRST# 30 168
5 M_A_CKE1 CKE1 DQ27 RESET# VSS42
115 56 M_A_DQ28 172
5 M_A_CAS# CAS# DQ28 VSS43
110 58 M_A_DQ29 173
5 M_A_RAS# RAS# DQ29 VSS44
113 68 M_A_DQ26 SMDDR_VREF_DQ0_M1 SMDDR_VREF_DQ0_M1 1 178
5 M_A_WE# WE# DQ30 VREF_DQ VSS45
R186 10K_4 DIMM0_SA0 197 70 M_A_DQ30 +SMDDR_VREF_DIMM +SMDDR_VREF_DIMM 126 179
R185 10K_4 DIMM0_SA1 SA0 DQ31 M_A_DQ37 VREF_CA VSS46
201 SA1 DQ32 129 VSS47 184
10,15,19 SMB_RUN_CLK SMB_RUN_CLK 202 131 M_A_DQ33 185
C SMB_RUN_DAT SCL DQ33 M_A_DQ34 VSS48 C
10,15,19 SMB_RUN_DAT 200 SDA DQ34 141 CAD Note: All VREF traces should 2 VSS1 VSS49 189
143 M_A_DQ38 3 190
116
DQ35
130 M_A_DQ32 have 10 mil trace width 8
VSS2 VSS50
195
(204P)
5 M_A_ODT0 ODT0 DQ36 VSS3 VSS51
120 132 M_A_DQ36 9 196
5 M_A_ODT1 ODT1 DQ37 VSS4 VSS52
140 M_A_DQ35 13
DQ38 M_A_DQ39 VSS5
11 DM0 DQ39 142 14 VSS6
28 147 M_A_DQ41 19
02/23 Remove 0ohm to GND 46
DM1 DQ40
149 M_A_DQ45 DDR3_DRAMRST# 20
VSS7
63
DM2
DM3
(204P) DQ41
DQ42 157 M_A_DQ47 25
VSS8
VSS9
136 159 M_A_DQ46 C180 26 203 +0.75V_DDR_VTT
DM4 DQ43 M_A_DQ40 VSS10 VTT1
153 DM5 DQ44 146 31 VSS11 VTT2 204
170 148 M_A_DQ44 0.1u/10V_4 32
DM6 DQ45 M_A_DQ42 VSS12
5 M_A_DQSP[7:0] 187 DM7 DQ46 158 37 VSS13 GND 205
160 M_A_DQ43 38 206
M_A_DQSP0 DQ47 M_A_DQ49 VSS14 GND
12 DQS0 DQ48 163 43 VSS15
M_A_DQSP1 29 165 M_A_DQ48
M_A_DQSP2 DQS1 DQ49 M_A_DQ54
47 DQS2 DQ50 175
M_A_DQSP3 64 177 M_A_DQ55 DDR3-DIMM0_H=4_RVS_LTS
137 DQS4 DQ52 164
M_A_DQSP5 154 166 M_A_DQ52
171 DQS6 DQ54 174
M_A_DQSP7 188 176 M_A_DQ50
M_A_DQSN0 DQS7 DQ55 M_A_DQ61
10 DQS#0 DQ56 181
M_A_DQSN1 27 183 M_A_DQ60
M_A_DQSN2 DQS#1 DQ57 M_A_DQ62
45 DQS#2 DQ58 191
M_A_DQSN3 62 193 M_A_DQ63
B M_A_DQSN4 DQS#3 DQ59 M_A_DQ56 B
135 DQS#4 DQ60 180
M_A_DQSN5 152 182 M_A_DQ57
M_A_DQSN6 169
DQS#5 DQ61
192 M_A_DQ59 VREF DQ0 M1 Solution +1.5V_SUS
M_A_DQSN7 DQS#6 DQ62 M_A_DQ58
5 M_A_DQSN[7:0] 186 DQS#7 DQ63 194
+1.5V_SUS
DDR3-DIMM0_H=4_RVS_LTS R173
10K/F_4
R183
1K/F_4
+SMDDR_VREF_DIMM
+1.5V_SUS Place these Caps near So-Dimm0. SMDDR_VREF_DQ0_M1

R177 C224
10K/F_4 470P/50V_4
R184
1K/F_4
+
C221 C190 C203 C202 C187 C189 C188 C205 C185 C186 C204 C157 C178 C184
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 *10U/6.3V_6 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 *330U/2V_7343 4.7U/25V_8 4.7U/25V_8
A +3V +0.75V_DDR_VTT +SMDDR_VREF_DIMM SMDDR_VREF_DQ0_M1 A
C240
2.2U/6.3V_6
C242
0.1u/10V_4
C235 C236 C227
1U/6.3V_4 1U/6.3V_4 1u/6.3V_4
C226 C229
1U/6.3V_4 4.7U/6.3V_6
C237
*10U/6.3V_6
C196
0.1u/10V_4
C215
2.2U/6.3V_6
C244
0.1u/10V_4
C243
2.2U/6.3V_6
PROJECT : ZQR
1A
DDRIII SO-DIMM-0
5 4 3 2 1
5 4 3 2 1
DDR_RVS(DDR)
5 M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
98
97
96
JDIM1A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
M_B_DQ5
M_B_DQ4
M_B_DQ7
M_B_DQ6
M_B_DQ[63:0] 5
+1.5V_SUS
JDIM1B
15
95 A3 DQ3 17 75 VDD1 VSS16 44
M_B_A4 92 4 M_B_DQ0 76 48
M_B_A5 A4 DQ4 M_B_DQ1 VDD2 VSS17
91 A5 DQ5 6 81 VDD3 VSS18 49
M_B_A6 90 16 M_B_DQ3 82 54
86 A7 DQ7 18 87 VDD5 VSS20 55
D M_B_A8 M_B_DQ12 D
89 A8 DQ8 21 88 VDD6 VSS21 60
M_B_A9 85 23 M_B_DQ13 93 61
107 A10/AP DQ10 33 94 VDD8 VSS23 65
M_B_A11 84 35 M_B_DQ10 99 66
M_B_A12 83
A11 DQ11
22 M_B_DQ8
2.48A 100
VDD9 VSS24
71
M_B_A13 A12/BC# DQ12 M_B_DQ9 VDD10 VSS25
119 A13 DQ13 24 105 VDD11 VSS26 72
M_B_A14 M_B_DQ11

80 A14 DQ14 34 106 VDD12 VSS27 127
M_B_A15 78 36 M_B_DQ15 111 128
A15 DQ15 VDD13 VSS28

39 M_B_DQ20 112 133
DQ16 M_B_DQ21 VDD14 VSS29
5 M_B_BS#0 109 BA0 DQ17 41 117 VDD15 VSS30 134
108 51 M_B_DQ18 118 138
5 M_B_BS#1 BA1 DQ18 VDD16 VSS31
79 53 M_B_DQ22 123 139
5 M_B_BS#2 BA2 DQ19 VDD17 VSS32
114 40 M_B_DQ17 124 144
5 M_B_CS#0 S0# DQ20 VDD18 VSS33
121 42 M_B_DQ16 145
5 M_B_CS#1 S1# DQ21 VSS34
101 50 M_B_DQ19 +3V 199 150
5 M_B_CLKP0 CK0 DQ22 VDDSPD VSS35
103 52 M_B_DQ23 151
5 M_B_CLKN0 CK0# DQ23 VSS36
102 57 M_B_DQ25 77 155
5 M_B_CLKP1 CK1 DQ24 NC1 VSS37
104 59 M_B_DQ24 122 156
5 M_B_CLKN1 CK1# DQ25 NC2 VSS38
73 67 M_B_DQ27 125 161
5 M_B_CKE0 CKE0 DQ26 NCTEST VSS39
74 69 M_B_DQ26 162
5 M_B_CKE1 CKE1 DQ27 VSS40
115 56 M_B_DQ29 R163 10K_4 198 167
5 M_B_CAS# CAS# DQ28 +3V EVENT# VSS41
110 58 M_B_DQ28 5,14 DDR3_DRAMRST# 30 168
5 M_B_RAS# RAS# DQ29 RESET# VSS42
113 68 M_B_DQ31 172
5 M_B_WE# WE# DQ30 VSS43
R169 10K_4 DIMM1_SA0 197 70 M_B_DQ30 173
R172 10K_4 DIMM1_SA1 SA0 DQ31 M_B_DQ36 SMDDR_VREF_DQ0_M1 VSS44
+3V 201 SA1 DQ32 129 SMDDR_VREF_DQ0_M1 1 VREF_DQ VSS45 178
C 10,14,19 SMB_RUN_CLK SMB_RUN_CLK 202 131 M_B_DQ37 +SMDDR_VREF_DIMM +SMDDR_VREF_DIMM 126 179 C
SMB_RUN_DAT SCL DQ33 M_B_DQ35 VREF_CA VSS46
10,14,19 SMB_RUN_DAT 200 SDA DQ34 141 VSS47 184
143 M_B_DQ34 185
DQ35 M_B_DQ33 VSS48
5 M_B_ODT0 116 ODT0 DQ36 130 2 VSS1 VSS49 189
5 M_B_ODT1 120 132 M_B_DQ32 3 190
ODT1 DQ37 M_B_DQ39 VSS2 VSS50
140 CAD Note: All VREF traces should 8 195
(204P)
DQ38 M_B_DQ38 VSS3 VSS51
11 142 9 196
28
DM0 DQ39
147 M_B_DQ44 have 10 mil trace width 13
VSS4 VSS52
DM1 DQ40 M_B_DQ40 VSS5
46 149 14
02/23 Remove 0ohm to GND
(204P)
63 DM3 DQ42 157 19 VSS7
136 159 M_B_DQ43 20
153 DM5 DQ44 146 25 VSS9
170 148 M_B_DQ41 26 203 +0.75V_DDR_VTT
DM6 DQ45 M_B_DQ46 VSS10 VTT1
5 M_B_DQSP[7:0] 187 DM7 DQ46 158 31 VSS11 VTT2 204
160 M_B_DQ47 32
M_B_DQSP0 DQ47 M_B_DQ49 VSS12
12 DQS0 DQ48 163 37 VSS13 GND 205
M_B_DQSP1 29 165 M_B_DQ48 38 206
M_B_DQSP2 DQS1 DQ49 M_B_DQ54 VSS14 GND
47 DQS2 DQ50 175 43 VSS15
M_B_DQSP3 64 177 M_B_DQ55
M_B_DQSP4 DQS3 DQ51 M_B_DQ52
137 DQS4 DQ52 164
M_B_DQSP5 154 166 M_B_DQ53 DDR3-DIMM1_H=8_RVS_MLX
M_B_DQSP6 DQS5 DQ53 M_B_DQ51
171 DQS6 DQ54 174
M_B_DQSP7 188 176 M_B_DQ50
M_B_DQSN0 DQS7 DQ55 M_B_DQ61
10 DQS#0 DQ56 181
M_B_DQSN1 27 183 M_B_DQ57
M_B_DQSN2 DQS#1 DQ57 M_B_DQ62
45 DQS#2 DQ58 191
B M_B_DQSN3 62 193 M_B_DQ63 B
135 DQS#4 DQ60 180
M_B_DQSN5 152 182 M_B_DQ56
169 DQS#6 DQ62 192
M_B_DQSN7 186 194 M_B_DQ58
5 M_B_DQSN[7:0] DQS#7 DQ63
DDR3-DIMM1_H=8_RVS_MLX
+1.5V_SUS
Place these Caps near So-Dimm1.
C253 C254 C218 C220 C222 C251 C217 C219 C255 C252 C223 C256 C258
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 *10U/6.3V_6 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 4.7U/6.3V_6 4.7U/25V_8
A A
+3V +0.75V_DDR_VTT SMDDR_VREF_DQ0_M1 +SMDDR_VREF_DIMM
C207 C201 C193 C192 C210 C211 C191 C214 C198 C197 C195 C200
2.2U/6.3V_6 0.1u/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 4.7U/6.3V_6 *10U/6.3V_6 0.1u/10V_4 2.2U/6.3V_6 0.1u/10V_4 2.2U/6.3V_6
PROJECT :ZQR
1A
DDRIII SO-DIMM-1
5 4 3 2 1
1 2 3 4 5 6 7 8
CRT Switch schematic-laptop.blogspot.com

CRT
B04 Remove for CRT Test 05/17
C61 0.1u/10V_4_X7R
0_ohm Resistor place close to Joint-Point F2
D16 SSM22LLPT CRTVDD5
16
+5V 2 1
CN11
8 INT_CRT_RED
8 INT_CRT_GRE
INT_CRT_RED
INT_CRT_GRE
B02 L5,L8,L10 Change PN to CX8BA470003. 05/11
FB1 SMD1206P110TFT FB2 6
CRT-CONN
INT_CRT_BLU INT_CRT_RED L10 BLM18BA470SN1/0.3A/47ohm_6 L9 0_6 CRT_R1 1 11 CRT_11 T1

8 INT_CRT_BLU
7
INT_CRT_GRE L8 BLM18BA470SN1/0.3A/47ohm_6 L7 0_6 CRT_G1 2 12 DDCDAT_1
INT_CRT_VSYNC 8
8 INT_CRT_VSYNC
INT_CRT_HSYNC INT_CRT_BLU L5 BLM18BA470SN1/0.3A/47ohm_6 L6 0_6 CRT_B1 3 13 CRTHSYNC
8 INT_CRT_HSYNC
9
4 14 CRTVSYNC
A A
INT_CRT_DDCDAT R92 R88 R74 C125 C114 C77 C121 C96 C76 C394 C403 C408 10
8 INT_CRT_DDCDAT
INT_CRT_DDCCLK 5 15 DDCCLK_1
8 INT_CRT_DDCCLK
150/F_4 150/F_4 150/F_4 10p/50V_4 10p/50V_4 10p/50V_4 *22p/50V_4 *22p/50V_4 *22p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4
17
C1 C2 C3
Note:this video filter is a 2-pole,low-pass filter configuration with a target design cutoff frequency of ~200MHZ
C1: 10pF ,C2 : 22pF , C3 :10pF, B06 Change R295,R296 to short pad. 5/17
+3V
FB1:47ohm@100MHZ , FB2:47ohm@100MHZ C88 U15

CRTVDD5 1 16 CRT_VSYNC2 R295 *Short_4 CRTVSYNC C414 .1u/10V_4 CRTVDD5
0.1u/10V_4_X7R VCC_SYNC SYNC_OUT2 CRT_HSYNC2 R296 *Short_4 CRTHSYNC
14
SYNC_OUT1 C371 10p/50V_4 CRTVSYNC
7
C382 .22u/25V_6 CRT_BYP VCC_DDC
8
BYP INT_CRT_VSYNC CRTVDD5 C372 10p/50V_4 CRTHSYNC
15
SYNC_IN2 INT_CRT_HSYNC
+3V 2 13
VCC_VIDEO SYNC_IN1 C383 *10p/50V_4 DDCCLK_1
C104 R293 R308
CRT_R1 3 10 INT_CRT_DDCCLK C402 *10p/50V_4 DDCDAT_1
0.1u/10V_4_X7R CRT_G1 VIDEO_1 DDC_IN1 INT_CRT_DDCDAT 2.7K_4 2.7K_4
4 11
CRT_B1 VIDEO_2 DDC_IN2
5
VIDEO_3 DDCCLK_1
9
DDC_OUT1 DDCDAT_1
6 12
GND DDC_OUT2
CM2009-02QR
B B
LCD Power
LVDS +3V VIN
+3V
C302 C15
C4 C3
0.1u/10V_4_X7R C1 U1
1000p/50V_4 4.7u/25V_8 1000p/50V_4
1U/6.3V_4 6 1 LCDVCC
IN OUT
4 2
IN GND C8 C6 C7 C9 C5
CN8 INT_LVDS_DIGON 3 5
ON/OFF GND *.1u/10V_4 *2.2u/10V_8 0.1u/10V_4_X7R.01u/25V_4 22u/6.3V_8
G_5
INT_LVDS_EDIDDATA AAT4280-4
INT_LVDS_EDIDCLK 40
LVDS_BRIGHT R11 39
BL_ON BLM15AG121SS1/0.5A/120ohm_4 38 R1
37
INT_TXLCLKOUTP 36
INT_TXLCLKOUTN 35 100K_4
34
0_ohm Resistor place close to Joint-Point INT_TXLOUTP0 33
INT_TXLOUTN0 32
31 G_4
INT_LVDS_EDIDCLK INT_TXLOUTP1 30
8 INT_LVDS_EDIDCLK 29
INT_TXLOUTN1
28
INT_LVDS_EDIDDATA INT_TXLOUTP2 27
8 INT_LVDS_EDIDDATA 26
INT_TXLOUTN2
25
C18 C17 24
C
C12 C14 23
22
Backlight Control C
2200p/50V_4 2200p/50V_4 *1u/6.3V_4 *1u/6.3V_4
21
20
19
+3V CCD-USB CCD +3V-current budget 0.2A 18
EMI R7 *SHORT0603 +3VPCU
17
16
CCD_PWR 15
C11 14
INT_LVDS_DIGON C10 R233
8 INT_LVDS_DIGON 13
INT_LVDS_BLON *1u/6.3V_4 *1u/6.3V_4 *100K_4
8 INT_LVDS_BLON 12
USBP8-_R LID591# 27
USBP8+_R 11
10 G_1
9
+3V
8
7
LID591#,EC intrnal PU
LCDVCC R4 *SHORT0603 +3V
6
5
1
INT_TXLCLKOUTP 0.8A
8 INT_TXLCLKOUTP 4
INT_TXLCLKOUTN D11
8 INT_TXLCLKOUTN 3
INT_TXLOUTP0 VIN R3 *SHORT0805 INVCC0 BAS316
8 INT_TXLOUTP0 2
INT_TXLOUTN0
8 INT_TXLOUTN0 1
G_0
INT_TXLOUTP1 R2 *SHORT0805 R232
8 INT_TXLOUTP1
2
INT_TXLOUTN1
8 INT_TXLOUTN1
INT_TXLOUTP2 R234 10K_4
8 INT_TXLOUTP2
INT_TXLOUTN2 BL_ON
8 INT_TXLOUTN2
LVDS_CONN 10K_4
3
B43 Change 0ȍ R5,R6 to short pad, remove CMC L1. 5/19
3
R8 *0_4 LVDS_BRIGHT
27 CONTRAST
BL# 2
R6 *Short_4 2 EC_FPBACK# 27
3
R9 0_4 Q15
8 INT_LVDS_BRIGHT
2N7002K Q14
USBP8+_R DTC144EUA
10 USBP8+
1
+3VPCU USBP8-_R INT_LVDS_BLON 2
10 USBP8-
Q16
D R5 *Short_4 R235 2N7002K D
1
C300 0.1u/10V_4_X7R EMI 100K_4
1
2 LID591#
HE1
2
EM-6781-T3 : AL006781000 PT3661-BB

3
D10
AH9249NTR-G1 :AL009249000 *VPORT_6
PROJECT : ZQR
1

1A
Lid Switch (Hall sensor) CRT/LVDS/CAMERA/LID
1 2 3 4 5 6 7 8
5 4 3 2 1
TXC_HDMI-
TXC_HDMI+
TX0_HDMI-
TX0_HDMI+
INT-HDMI PLACE AC CAP
17
TX1_HDMI- CLOSE TO CONNECTOR
INT_HDMI_TXCN C230 IV@0.1U/10V_4 TXC_HDMI-
8 INT_HDMI_TXCN
TX1_HDMI+
INT_HDMI_TXCP C231 IV@0.1U/10V_4 TXC_HDMI+
D 8 INT_HDMI_TXCP D
TX2_HDMI-
INT_HDMI_TXDN0 C225 IV@0.1U/10V_4 TX0_HDMI-
8 INT_HDMI_TXDN0
TX2_HDMI+
INT_HDMI_TXDP0 C228 IV@0.1U/10V_4 TX0_HDMI+
8 INT_HDMI_TXDP0
680/F_4
680/F_4
680/F_4
680/F_4
680/F_4
680/F_4
680/F_4
680/F_4
8 INT_HDMI_TXDN1
+3V INT_HDMI_TXDP1 C234 IV@0.1U/10V_4 TX1_HDMI+
8 INT_HDMI_TXDP1
8 INT_HDMI_TXDN2
2
R382
R380
R379
R378
R371
R368
R377
R372
INT_HDMI_TXDP2 C241 IV@0.1U/10V_4 TX2_HDMI+
8 INT_HDMI_TXDP2
Q22
1 3
2N7002K 8 INT_HDMI_SDA INT_HDMI_SDA
8 INT_HDMI_SCL INT_HDMI_SCL
PLACE PULL DOWN RESISTORS CLOSE TO
R381 IV@2.2K_4
DIFFERENTIAL PAIRS CONNECTED TO SOLID R376 IV@2.2K_4
sΛ /sΛ GROUND FLOOD WHICH IS CONTROLLED +3V
^WΛ ϱϬϬŽŚŵ ϲϴϬŽŚŵ BY THE FET

AVOID STUBS TO ALL DIFFERENTIAL TRACES
C C
+5V
1
F1
FUSE1A6V_POLY
HDMI CONN
2
+3V
D20 +5V_HDMIC
+5V_HDMIC_R 1 2 +5V_HDMIC
R369 RB501V-40 CN15

SHELL1 20
Q20 2.2K_4 +5V C209 C212 +3V TX2_HDMI+ 1 D2+
2
BSN20 1u/16V_6 0.1U/10V_4 2

*BAV99W TX2_HDMI- D2 Shield
1 3 D2-
INT_HDMI_SCL 1 3 R370 33_4 HDMI_SCLK TX1_HDMI+ 4
3 R367 D1+
5 D1 Shield
10K_4 +3V TX1_HDMI- 6
2 TX0_HDMI+ D1-
B 7 D0+ B
C451 D21 8
*22P/50V/NPO TX0_HDMI- D0 Shield
8 INT_HDMI_HPD 9 D0- GND 23
+3V R366 TXC_HDMI+ 10 CK+
3
10K_4 11 22
D23 TXC_HDMI- CK Shield GND
12 CK-
+5V_HDMIC_D 1 2 +5V_HDMIC 13 CE Remote
2 14 NC
R374 RB501V-40 HDMI_SCLK 15 DDC CLK
3
HDMI_SDATA 16
Q21 2.2K_4 +5V Q18 DDC DATA
17 GND
2
BSN20 2N7002K +5V_HDMIC 18
1
*BAV99W +5V
1 2 19 HP DET
INT_HDMI_SDA 1 3 R375 33_4 HDMI_SDATA TX2_HDMI+ 21
3
EMI R182 *100/F_4 Q19 R365
SHELL2
2 HDMI
2N7002K 20K_4
1
C452 D22 TX2_HDMI-
*22P/50V/NPO
TX1_HDMI+
R181 *100/F_4
TX1_HDMI-
TX0_HDMI+ HDMI_HPD_EC#
A
HDMI_HPD_EC# 27 A
R179 *100/F_4
TX0_HDMI-
TXC_HDMI+ Quanta Computer Inc.

R180 *100/F_4
PROJECT : ZQR
TXC_HDMI- Size Document Number Rev
1A
HDMI
5 4 3 2 1
5 4 3 2 1
LAN (LAN) schematic-laptop.blogspot.com

<BOM note> * Why does Pin17 CLKREQn connect to Pin16(LED2) and Pin30(DVDDL)?
If center tap power come from internal switch
regulator 76.1mA ; 30mil <Layout note> PU in CLK Gen.
=>Stuff 52SWR@ (Default) +3V_S5 +3V_LAN
Close to Pin2 Power Sequence: TP48
U3
If center tap power come from internal LDO VDD33 to PERSTn >= 100ms B47 Del short pad R114, connect to PCIE_CLKREQ_LAN# 5/20
=>Stuff 52LDO@ R318 2.2_6
40mil *
1
LX 1 17
LX CLKREQn PCIE_CLKREQ_LAN# 10
C421 C133 C134
D <Layout note> 10U/10V_8 1U/10V_4 0.1U/16V_4 D
2 18
2
TP92 VDD33 SMCLK TP47
Close to Pin1
3 19 SMBUS for debug only
4,10,19,23,27 PLTRST# PERSTn SMDATA TP46
L28 4.7uH/1A
DCR:0.15ohm
LX * Int. PU in SB 8,19 PCIE_WAKE#
TP109 4
WAKEn TESTMODE
20
C419 C415
VDDCT_REG 20mil 5
VDDCT_REG
AR8158
4X4mm NC
21
0.1U/16V_4 10U/10V_8 C425 VDDCT 6 32Pin QFN 22 PCIE_RXN1_LAN C138 .1U/10V_4

VDDCT TX_N PCIE_RX1- 10
0.1U/16V_4 20mil
AVDDL 7 23 PCIE_RXP1_LAN C136 .1U/10V_4
AVDDL_REG TX_P PCIE_RX1+ 10
C137
1
0.1U/16V_4 XTLO_LAN 8 24 AVDDL
VDDCT C141 C427 XTLO AVDDL
1U/10V_4 0.1U/16V_4 XTLI_LAN 9 25
2
XTLI REFCLK_N CLK_PCIE_LANN 10 C135
20mil
C426 33P/50V_4 XTLO_LAN AVDDH 10 26 0.1U/16V_4
AVDDH_REG REFCLK_P CLK_PCIE_LANP 10
1
XTLI_LAN R343 2.37K/F_4 RBIAS 11 27
C147 C146 RBIAS AVDDL
1
1U/10V_4 0.1U/16V_4 TX0P 12 28
2
Y3 TRXP0 RX_P PCIE_TX1+ 10 C132
25MHz-LAN TX0N 13 29 0.1U/16V_4
TRXN0 RX_N PCIE_TX1- 10
2
TX1P 14 30 DVDDL 20mil

TRXP1 DVDDL_REG
1
C428 33P/50V_4 TX1N 15 31 LAN_ACTLED
TRXN1 LED[0] C130 C129 C131
16 32 LAN_LINKLED# *0.1U/16V_4 1U/10V_4 0.1U/16V_4
2
TX0P C170 6.8PF/50V_4 TP112 LED[2] LED[1]
GND10
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1 33
TX0N C172 6.8PF/50V_4 <Layout note>
C C
TX1P
Close to LAN Chip 1/7 swap the pin define for layout
C173 6.8PF/50V_4 AR8158-BL1A-RL
42
41
40
39
38
37
36
35
34
1nF reserved for EMI
TX1N C176 6.8PF/50V_4
4
2
4
2
RN1 RN2
49.9/F_4P2R 49.9/F_4P2R
3
1
3
1
1/7 change solution for surge
C434 C433 C435 C436

0.1U/16V_4 *1000P/50V_4 0.1U/16V_4 *1000P/50V_4
U17 U18
X-TX1N 1 8 TX1N 1 8
X-TX1P 1 8 TX1P 1 8
2 7 2 7
X-TX0N 2 7 TX0N 2 7
3 3 6 6 3 6
X-TX0P TX0P 3 6
4 5 4 5
4 5 4 5
UCLAMP2512T.TCT UCLAMP2512T.TCT
+3V_S5 2 VDD33 AVDDL_REG 7 +1.1V regulator output (For all the analog 1.1V supply pins)
AVDDL
ATHEROS AVDDH_REG
+1.1V analog power 24/27 10 +2.7V regulator output
AR8158 DVDDL_REG 30 +1.1V regulator output (For all the digital 1.1V supply pins)
VDDCT_REG 5 +1.8V regulator output (For VDDCT when LDO mode)
+1.7V analog power 6 VDDCT LX 1 +1.7V Switching regulator (For VDDCT when switching mode)
B B
TRANSFORMER (LAN) EMI RJ45 Connector (LAN)

B53 Del short pad R133,R168, connect to GND.
X-TX1N C183 *6.8PF/50V_4 CN13
X-TX1P C179 *6.8PF/50V_4 9
X-TX0N C167 *6.8PF/50V_4 R149 5.1K/J_8 LAN_ACTLED R150 N27354430 YELLOW_N
10
X-TX0P C163 *6.8PF/50V_4 510/J_6 YELLOW_P
U19 14
C152 *0.1U/50V_8 LAN_ACTLED X-TX0P GND2
1 13
B27 L11 change from 0 ȍ to short pad. 5/18 X-TX0N 0+ GND1
2
TX1N X-TX1N X-TX1P 0-
8 9 Active LED Pin: 3
C174 0.1U/16V_4 TX1P TD- TX- X-TX1P TERM9 1+
7 10 Non-overclocking=>active high 4
VDDCT L11 *Short_6 AVDD_CEN TD+ TX+ TERM0 2+
6 CT CT 11 5 2-
CX8EG601000: 0.5A/600ohm_6 C177 *1000P/50V_4 5 12 X-TX1N 6
C162 0.1U/16V_4 NC NC TERM9 1-
4 13 7
C158 NC NC TERM1 3+
3 14 8
C169 *1000P/50V_4 TX0N CT CT X-TX0N R165 *5.1K/J_8 3-
2 15
*1U/6.3V_4 TX0P RD- RX- X-TX0P
1 16
RD+ RX+ LAN_LINKLED# R170 510/J_6 11
C194 *0.1U/50V_8 LAN_LINKLED# GREEN_N
12
NS0014 LF_Bothhand R171 *SHORT0805 GREEN_P
+3V_S5
R154 R159 LINK LED Pin: RJ45
SWR mode=>active low
75/F_8 75/F_8 LDO mode=>active high
D3: CY003100Z06 (2nd ) / CY231T20Z00 ( 1st & non prefer )
A U17,U18: BC02512TZ00 (2nd ) / BC02512TZ00 ( 1st ) A
TERM9
2
R164 C447
1M_8 220P/3KV_1808
D3
B88069X9231T203 Quanta Computer Inc.
1
PROJECT : ZQR
1A
LAN AR8158L
5 4 3 2 1
1 2 3 4 5 6 7 8
MINI-CARD WLAN(MPC) schematic-laptop.blogspot.com

Check LED signal. (active high or low) +3V +WL_VDD
+3.3V: 1000mA PLTRST# R392 0_4
+3.3Vaux:330mA 10 CLK_PCI_LPC
R197 0_4 H=7.0mm R193 *SHORT0805 +WL_VDD
CN17 LTS_AAA-PCI-046-K01
+1.5V:500mA
51 Reserved +3.3V 52 +WL_VDD
R398 *0_4 CL_RST1#_WLAN 49 50 C270 C271 C480 C248
10 CL_RST1# Reserved GND
R393 *0_4 CL_DATA1_WLAN 47 48 +1.5V 10u/6.3V_8 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
10 CL_DATA1 Reserved +1.5V
R199 *0_4 CL_CLK1_WLAN 45 46
10 CL_CLK1 Reserved LED_WPAN#
43 Reserved LED_WLAN# 44
+WL_VDD 41 Reserved LED_WWAN# 42
39 Reserved GND 40
A 37 Reserved USB_D+ 38 USBP10+ 10 A
35 GND USB_D- 36 USBP10- 10
10 PCIE_TX6+ 33 PETp0 GND 34
10 PCIE_TX6- 31 PETn0 SMB_DATA 32 SMB_RUN_DAT 10,14,15
29 GND SMB_CLK 30 SMB_RUN_CLK 10,14,15
27 GND +1.5V 28 +1.5V
25 26 +1.5V
10 PCIE_RX6+ PERp0 GND
10 PCIE_RX6- 23 PERn0 +3.3Vaux 24 +WL_VDD
21 22 PLTRST#
GND PERST# PLTRST# 4,10,18,23,27
19 UIM_C4 W_DISABLE# 20 RF_EN# 27
17 UIM_C8 GND 18
Debug
15 GND UIM_VPP 16 LFRAME# 9,27
13 14 C477 C450 C462
10 CLK_PCIE_WLANP REFCLK+ UIM_RST LAD3 9,27
11 12 1000p/50V_4 0.1u/10V_4 10u/6.3V_8
10 CLK_PCIE_WLANN REFCLK- UIM_CLK LAD2 9,27
9 GND UIM_DATA 10 LAD1 9,27
10 CLKREQ_WLAN# 7 CLKREQ# UIM_PWR 8 LAD0 9,27
5 Reserved +1.5V 6 +1.5V
3 4
GND
GND
PCIE_WAKE#_R Reserved GND
1 WAKE# +3.3V 2 +WL_VDD
+WL_VDD
53
54
2
Q12 modify 10/19

*DTC144EUA
3 1 PCIE_WAKE#_R
8,18 PCIE_WAKE#
B B
C C
D D

PROJECT : ZQR
1A
MINI PCI-E card/TV
1 2 3 4 5 6 7 8
1 2 3 4
MAIN SATA HDD schematic-laptop.blogspot.com

EE RETURN-PATH CAPACITORS +3V C347,C341,C55,C303,C449,C275,C453,C459 Change VIN
to 100PF
1/10for
addEMI.
for 5/19
plane
+5V C496,C437,C460,C232,C304,C454
change 100PF +5V
for EMI. 5/19
+3V B30
B29 C21 0.1u/25V_4_X5R VIN
CN16
C496 100p/50V_4
23 C347 100p/50V_4 C122
GND23 C2 0.1u/25V_4_X5R 2200p/50V_4
1 C437 100p/50V_4
GND1
A RXP 2 SATA_TXP0 9 A
3 SATA_TXN0 9 C341 100p/50V_4 C13 0.1u/25V_4_X5R
RXN C460 100p/50V_4
GND2 4
5 SATA_RXN0_C C269 .01u/25V_4 1/11 add by EMI's request
TXN SATA_RXN0 9
6 SATA_RXP0_C C266 .01u/25V_4 C369 0.1u/25V_4_X5R
TXP SATA_RXP0 9
7 C55 100p/50V_4 C232 100p/50V_4
GND3 +1.05V_VTT
C446 0.1u/25V_4_X5R
8 C317 .1u/10V_4 C304 100p/50V_4
3.3V +3V
3.3V 9
10 C19 0.1u/25V_4_X5R
3.3V C148 2200p/50V_4 C454 100p/50V_4
GND 11
12 C303 100p/50V_4
GND C358 0.1u/25V_4_X5R 1/11 add by EMI's request
GND 13
14 +5V_HDD C108 220p/50V_4
5V +5V_S5 C489,C289 change 100PF
5V 15
16 C449 100p/50V_4 C32 0.1u/25V_4_X5R C337 220p/50V_4 for EMI. 5/19
5V +5V_S5
GND 17
18 C367 220p/50V_4 B31
RSVD C33 0.1u/25V_4_X5R
GND 19
20 C275 100p/50V_4 C489 100p/50V_4
12V
12V 21
B C279 0.1u/25V_4_X5R BOT LAYER +VCC_GFX add 100pf C289 100p/50V_4 B
12V 22
R373 *SHORT0805 +5V_HDD C453 100p/50V_4 x 3 C499,C500,C501. 5/19
+5V
GND24 24
C448 C199 C216 C213 C208 C206 C29 0.1u/25V_4_X5R B34 +VCC_GFX
MAIN_SATA + C459 100p/50V_4
*100u/6.3V_3528 10u/6.3V_6 *.1u/16V_4 *.1u/16V_4 .01u/25V_4 .01u/25V_4 +VCC_CORE C47 change 100PF for EMI.
C238 0.1u/25V_4_X5R C499 100p/50V_4 5/19 +VCC_CORE
C280 2200p/50V_4 B32
C443 0.1u/25V_4_X5R C500 100p/50V_4
C441 2200p/50V_4 C47 100p/50V_4
C501 100p/50V_4
C455 2200p/50V_4 C20 0.1u/25V_4_X5R
1/11 add by EMI's request B35

C16 0.1u/25V_4_X5R BOT layer +1.8V Add 100pF
5/19 add by EMI's request C502,C503. 5/19
1/11 add for plane B37 +1.8V
TOP layer +1.5V Add
100pF X2 C504,C505.
+1.5V_SUS mount C149,C182,C160,C175,C249,C250,C257,C445,C444 5/19 +1.5V C502 100p/50V_4
Cap for EMI. 5/19
C C503 100p/50V_4 C
ODD (SATA) +1.5V_SUS
B28 +VCCSA
C504 100p/50V_4
CN10 C505 100p/50V_4

14 5/19 add by EMI's request
GND14 C333 *1000p/50V_4 B36
1 C149 220p/50V_4 TOP layer +1.8V Add 100pF X2
GND C305 *1000p/50V_4 5/19 add by EMI's request C506,C507. 5/19
A+ 2 SATA_TXP1 9
3 C182 220p/50V_4 +1.8V
A- SATA_TXN1 9
GND 4
5 SATA_RXN1_C C90 .01u/25V_4 C160 220p/50V_4
B- SATA_RXN1 9
6 SATA_RXP1_C C83 .01u/25V_4 C506 100p/50V_4
B+ SATA_RXP1 9
7 C175 220p/50V_4
GND C507 100p/50V_4
+5V C249 220p/50V_4
8 SATA_DP R69 *1K_4
DP +5V_ODD R289 *SHORT0805 C250 220p/50V_4
5V 9
10 5/19 add by EMI's request
5V C51 C50 C38 C52 C40 C362 C257 220p/50V_4
+
MD 11
GND 12
13 .01u/25V_4 .01u/25V_4 *.1u/16V_4 *.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528 C445 220p/50V_4
GND
D D
15 C444 220p/50V_4
GND15
SATA_ODD_H=7.7 Quanta Computer Inc.
PROJECT : ZQR
1A
SATA-HDD/ODD
1 2 3 4
5 4 3 2 1
schematic-laptop.blogspot.com Mute(ADO) +3V +5VA
B48
Del short pad R206, connect to MIC1-VREFO-L. 5/20
HP 22 HP-L
reverse R441 R218 R205
22 HP-R R204 *0_4 ADOGND
*10K_4 10K_4
MIC1-VREFO-L
MIC1-VREFO-L 22
PD# *BAS316 D7 EAPD#
MIC1-VREFO-R
MIC1-VREFO-R 22
D D
ADOGND MIC2-VREFO BAS316 D6
AMP_MUTE# 27
R203 *0_4 MIC1-VREFO-L
BAS316 D8 ACZ_RST#
Codec(ADO) C285
C487 10u/6.3V_6 ADOGND
+ Place next to pin 27

2.2u/6.3V_6
C288 C284
C286 ADOGND +5VA
+5VA + 2.2u/6.3V_6 0.1u/10V_4
Place next to pin 25
2.2u/6.3V_6
C282 C281 C283 C287

10u/6.3V_6 0.1u/10V_4
36
35
34
33
32
31
30
29
28
27
26
25
U9
0.1u/10V_4 10u/6.3V_6
CBP
CPVEE
HP-OUT-L
MIC1-VREFO-L
MIC2-VREFO
LDO-CAP
AVSS1
AVDD1
CBN
HP-OUT-R
MIC1-VREFO-R
VREF
ADOGND ADOGND
ANALOG +5V_S5
Place next to pin 38
37 24 ADOGND
AVSS2 LINE1-R T3
Spilt by AGND 38 23 B51 Del short pad R403, connect to HP_MUTE#. 5/20
AVDD2 LINE1-L T2 U21
5
27 AMP_MUTE# 1
+5V R391 *SHORT0603 +5VPVDD1 39 22 MIC1-R 4
PVDD1 MIC1-R MIC1-R 22 HP_MUTE# 22
EAPD# 2
22 L_SPK+ L_SPK+ 40 21 MIC1-L
MIC1-L 22
MIC TC7SH08FU C488
3
C468 C467 C475 C474 SPK-L+ MIC1-L
22 L_SPK- L_SPK- 41 20 *4.7u/10V_6
C
10u/6.3V_6 0.1u/10V_4 10u/6.3V_6 0.1u/10V_4 SPK-L- MONO-OUT C
R200 20K/F_4
42 PVSS1 (Vista Premium Version) JDREF 19 ADOGND
43 18
PVSS2 Sense-B
22 R_SPK- R_SPK- 44 17 MIC2_INT_R C276 1u/16V_6 R198 1K_4 MIC2_INTL1
SPK-R- MIC2-R
22 R_SPK+ R_SPK+ 45 16 MIC2_INT_L C273 1u/16V_6 R196 1K_4
SPK-R+ MIC2-L
+5V R389 *SHORT0603 +5VPVDD2 46 15

PVDD2 LINE2-R
GPIO0/DMIC-DATA
EAPD#
GPIO1/DMIC-CLK
47 SPDIFO2/EAPD LINE2-L 14
C461 C463 C466 C470
48 13 SENSEA R194 20K/F_4 MIC1_JD
SDATA-OUT
SPDIFO Sense A MIC1_JD 22
10u/6.3V_6 0.1u/10V_4 10u/6.3V_6 0.1u/10V_4
SDATA-IN
DVDD-IO
PCBEEP
RESET#
BIT-CLK
49
DVDD1
DVSS2
PGND
SYNC
ANALOG R195 39.2K/F_4
PD#
HPOUT_JD 22
Place next to pin 46 Spilt by DGND ALC271X-VB3-GR

1
10
11
12
PCBEEP dont coupling any signals if possible
DIGITAL 8/17 separate PCBEEP to Digital from Realtek suggestion
1.6Vrms
+3V
BEEP_2 C265 1u/16V_6 BEEP_1 R188 47K/F_4 D5 BAS316
SPKR 9
B03 C246 R187
C261 C263 Change netname to BEEP_2 4.7K_4 D4 BAS316
PCBEEP 27
0.1u/10V_4 10u/6.3V_6 100p/50V_4
R189
B 0_4 B
Place next to pin 1
R387 *SHORT0603 +3V
EMI C260 C259

ACZ_RST# 9
0.1u/10V_4 10u/6.3V_6
C247
ACZ_SYNC 9
*100p/50V_4
ACZ_SDIN0 9
B52 Del short pad R386, del netname ACZ_SDIN0_R, connect to ACZ_SDIN0. 5/20
ACZ_SDOUT 9
Place next to pin 9
PD#
ACZ_BITCLK 9
0V : Power down Class D SPK amplifer
3.3V : Power up Class D SPK amplifer C245 *22p/50V_4
Power (ADO) INT MIC array

DIGITAL ANALOG B06 Change R395,R402,R404,R408 to short pad. 5/17
+5V L29 UPB201209T-310Y-N/6A/31ohm_8 CN7 R226
+5VA R395 *Short_4 1 MIC2_INTL1 MIC2-VREFO
U22 1
2 2
3 4 C301 2.2K_4
IN OUT R404 *Short_4
2 R402 *Short_4 INT_MIC *22P_4
GND R408 *Short_4
A A
1 5 R406 *29.4K/F_4 R208 *0_4
SHDN SET C479 *1000p/50V_4
*G923-330T1UF C464 *1000p/50V_4
R405 + C493 C492 ADOGND
*10K/F_4
*10u/10V_3216 *0.1u/10V_4
C490 C491 ADOGND C278 .1U_4
+ R222 *0_4
Tied at one point only under Quanta Computer Inc.
*0.1u/10V_4 *10u/10V_3216
the codec or near the codec
ADOGND ADOGND PROJECT : ZQR
ADOGND cap place close to MIC-connector 1A
C730, C787 close U37 pin3 and L65
REALTEK ALC663&888/MDC
5 4 3 2 1
5 4 3 2 1
MIC 21 MIC1-VREFO-R
21 MIC1-VREFO-L
Internal Speaker
B27 R96,R97,R98,R99 change from 0 ȍ to short pad. 5/18
Normal OPEN Jack
R215 R214
4.7K/F_4 4.7K/F_4
CN20 BLACK
1 7 1/7 swap CN4
D C291 4.7u/6.3V_6 MIC1_L2 R209 1K/F_4 MIC1_L3 L17 MIC1_L L_SPK+ R99 *Short_6 L_SPK+_1 D
21 MIC1-L 2 21 L_SPK+ 1
BLM15AG121SS1/0.5A/120ohm_4 6 21 L_SPK- L_SPK- R98 *Short_6 L_SPK-_1
C290 4.7u/6.3V_6 MIC1_R2 R207 1K/F_4 MIC1_R3 L16 MIC1_R R_SPK- R97 *Short_6 R_SPK-_1 25
21 MIC1-R 3 21 R_SPK- 36
BLM15AG121SS1/0.5A/120ohm_4 MIC1_JD 4 21 R_SPK+ R_SPK+ R96 *Short_6 R_SPK+_1
4
21 MIC1_JD 8
5
MIC C119 C120 C118 C117 SPEAKER-CONN
C297 C296
Max. 100mVrms input for Mic-IN 470p/50V_4 470p/50V_4
*0.22u/25V_6 *0.22u/25V_6 *0.22u/25V_6 *0.22u/25V_6
MIC1_JD ADOGND
1
ADOGND
D24
*VPORT_6
ADOGND
C C
HP/SPDIF
21 HP_MUTE#
B42 Change R216,R221 from 56ȍ to 47ȍ for ACER SPEC.
BLACK
1 CN21 7
2
HP-L-2 R216 47/F_4 HPL-1 L18 BLM15AG121SS1/0.5A/120ohm_4 HPL_SYS 2

HP-R-2 R221 47/F_4 HPR-1 L19 BLM15AG121SS1/0.5A/120ohm_4 HPR_SYS 6
21 HP-L 3 1 HP-L-2 3
4
Q24 R220 R217 C299 C298 8
FDV301N 21 HPOUT_JD 5
*1K_4 *1K_4 2200p/50V_4 2200p/50V_4 JA6331-0230T3B-8H
R213 *0_6
ADOGND
ADOGND
HP_MUTE#
B B
2
21 HP-R 3 1 HP-R-2
Q23
FDV301N
R212 *0_6
HPOUT_JD
1
D9
A *VPORT_6 A
2
ADOGND Quanta Computer Inc.
PROJECT : ZQR
1A
AMP /AUDIO JACK CONN
5 4 3 2 1
A B C D E
CARD READER Controller

2 IN 1 CARD READER (SD/MMC) SD_WP
Main DFHS11FR011 SD_CD#
AU6435-GDL
11
12
Second DFHS11FR033
4
CN6
SW COM
CD/SW
WP/SW
SD_DAT1 10
SD_DAT0 DATA1
9 DATA0
8 VSS2
4 SD_CLK 4
7 CLK
VCC_XD 6 VDD
5 VSS1
SD_CMD 3 CMD
GND1
SD_DAT3 2
GND
SD_DAT2 DATA3
1 DATA2
SD-CARD
13
14
PIN45=Clock input selection
VCC_XD
'1' for 48MHz input [Default,Internal PU]
'0' for 12MHz input C262 C268
R390 *Short_4 XTALSEL 4.7u/10V_6 0.1u/16V_4
PIN43=Power saving mode enable.

C743 close PIN46, 47 '1' for enable [Default]
+1.8V_VDD '0' for disable Close to CN14 pin 14 & pin23
C708 close PIN48, 47 4.7u CAP close to pin23
+3V T10
C472 C476
3
0.1u/16V_4 0.1u/16V_4 3
XTALSEL
DATA1
DATA0
CTRL1
CTRL3
CTRL0, CRTL 1 trace length shorter ,
NBMD
HID
and surround with GND.
R397 *0_4
10 EXT48MHZ
The trace length difference for each card interfaces should be
R400 *100K_4 smaller than 500 mil
48
47
46
45
44
43
42
41
40
39
38
37
+3V U20
4,10,18,19,27 PLTRST#
GND
VDD
HID
NBMD
VDDHM
C1_VSSHM
XTALSEL
CTRL1
CTRL3
DATA1
DATA0
DATA7
C483 *0.47u/10V_6 DATA0 R192 33_4 SD_DAT0
B50 Del short pad R401, connect to PLTRST#. 5/20 C458 *4.7u/10V_6
+3V R394 *SHORT0603 C457 0.1u/16V_4
C484 1 36 C1_IOP DATA1 R191 33_4 SD_DAT1
LED C1_VDDHM
2 EXT48IN DATA6 35
4.7u/10V_6 3 34 CTRL0
R399 330_4 RSTN CTRL0 DATA2 R383 33_4 SD_DAT2
4 REXT DATA5 33
+3V_VDD 5 32 CTRL2
VD33P CTRL2
10 USBP12+ 6 DP DATA4 31
7 AU6435-GDL 30 DATA3 DATA3 R384 33_4 SD_DAT3
10 USBP12- DM DATA3
8 29 DATA2
C482 C481 XI VS33P DATA2 XD_WP#
9 XI XDWPN 28
XO 10 27 XD_CE# T5
*5p/50V_4 *5p/50V_4 XO XDCEN EEPDATA T7
11 VDD EEPDATA 26
EEPCLK T6
+1.8V_VDD 12 25 Close to connector
VSSA_SYN
V18 EEPCLK T8
SDWPEN
AGND5V
AVDD5V
VDDHM
C1_V33
C478
C1_IOP
XDCDN
CTRL4
GND
VDD
V33
2 4.7u/10V_6 2
13
14
15
16
17
18
19
20
21
22
23
24
CLK length should be as short as possible. Shorter than

crystal trace width needs at least 10 mils. pin13 output 20mils 1200 mil is good.
*0_4 R388 SD write protect
VCC_XD XD_CD# 1:decided by SDWP[Default]
C486 18p/50V_4 XI T9 0:letting SD always CTRL0 R385 33_4 SD_CLK
C1_IOP write-able
C456 0.1u/16V_4
Y4 R396 +3V +1.8V_VDD CTRL1 SD_WP C264
12MHz 270K_4 C471 2.2u/6.3V_6 +3V *10p/50V_4
+3V
C485 18p/50V_4 XO C465 4.7u/10V_6 C469 CTRL2 R190 33_4 SD_CMD
0.1u/16V_4 1/12 add by FAE's request

CTRL3 SD_CD#
1 1
352-(&7=4
4XDQWD&RPSXWHU,QF
1A
AU6433 CardReader
A B C D E
5 4 3 2 1
LED schematic-laptop.blogspot.com
D D
+3V_S5
POWER Amber
R229 100/F_4 LED1 Bule

27 PWRLED#
Blue
C C
R224 *1M_4 +3VPCU
R228 *1M_4
+3VPCU
Battery Amber
LED_B/R
R223 300/F_4 1 2
27 BATLED0#
R227 100/F_4 4 3
27 BATLED1# LED2
Blue
B B
A A

PROJECT : ZQR
1A
POWER/MMB/LAUNCH/LED
5 4 3 2 1
5 4 3 2 1
USB +5V_S5
schematic-laptop.blogspot.com BLUETOOTH CONNECTOR for 3.0
C267 CN19
U8 +3V_S5 1 3 BT_POWER
1U/6.3V_4 USBPWR1 5
2 IN1 OUT3 8 4
3 7 Q25 USBP4+_R
IN2 OUT2 C473 C277 C495 R407 + C497 C498 USBP4-_R 3
6
2
D OUT1 + 0.33u/10V_6 AO3413 1000p/50V_4 BT_LED 2 7 D
4 EN# 47K_4 2.2u/6.3V_6 T11 1 6
27 USBON# 1000p/50V_4
1 GND
5 BT_CONN
OC# 330u/6.3V_6X5.7
G547F2P81U C494
R230 *Short_4 .01u/16V_4
27 BT_ON#
10 USB_OC0#
USBP4+_R
10 USBP4+
CN18 USBP4-_R
10 USBP4-
1 1 8 8 BlueTooth
USBP1-_R 2 7
USBP1+_R 2 7 R225 *Short_4
3 3 6 6
B38 USB C.M Chock L14 Phase into BOM list, cancel 0ȍ R201,R202. 5/19 4 5
4 5
MB/B-USB1-1 USB_MB_Turbo B43 Change 0ȍ R230,R225 to short pad, remove CMC L20. 5/19
L14
10 USBP1- 2 2 1 1 USBP1-_R Reserve
1
3 4 USBP1+_R
10 USBP1+ 3 4 RV2 RV1
DLW21HN900SQ2L/300mA/90ohm CN5
*EGA-0402 *EGA-0402 +3V_S5 1 3 BT_POWER
2
5
Q13 USBP5+_R 4
C 3 C
C292 R219 + C295 C293 USBP5-_R
2
*0.33u/10V_6 *AO3413 *1000p/50V_4 BT_LED 2 7
*47K_4 *2.2u/6.3V_6 T4 1 6
B44 Change CMC L14 PN from "DC09004A014" to "CX1HN900000". 5/19 *BT_CONN
C294
R210 *Short_4 *.01u/16V_4
27 BT_ON#
USBP5+_R
10 USBP5+
BlueTooth USBP5-_R
10 USBP5-
R211 *Short_4
B43 Change 0ȍ R210,R211 to short pad, remove CMC L15. 5/19
+5V_S5
B07 remove R178 short pad. 5/17
USB/B
B B
USB_DB FFC CONN
B38 USB C.M Chock L12,L13 Phase into BOM list, cancel 0ȍ R166,R167,R174,R175. 5/19 16
B44 Change CMC L12,L13 PN from "DC09004A014" to "CX1HN900000". 5/19 15
14
13
12
10 USB_OC1_5# 11
EXT/B-USB1-1 L13
USBP3+_R 10
10 USBP3+ 2 2 1 1 9
3 4 USBP3-_R USBP3-_R
10 USBP3- 3 4 8
USBP3+_R
DLW21HN900SQ2L/300mA/90ohm 7
6
A USBP9-_R 5 A
USBP9+_R 4
EXT/B-USB1-2 3
L12 2 17
10 USBP9+ 2 2 1 1 USBP9+_R
USBP9-_R
27 USBON# 1
CN14
18 Quanta Computer Inc.
10 USBP9- 3 3 4 4
DLW21HN900SQ2L/300mA/90ohm PROJECT : ZQR

1A
USB/ BT
5 4 3 2 1
5 4 3 2 1
K/B schematic-laptop.blogspot.com
CPU FAN CN2
+3V
KB Cap CP1,CP2,CP3,CP4,CP5,CP6 change to 220 PF and phase into BOM list. 5/19 MY0 1
B33 27 MY0
7 8 MX3 MY1 2 R15
27 MY1
5 6 MX2 MY2 3
27 MY2 +5V
3 4 MX4 MY3 4 10K_4
27 MY3
1 2 MX5 MY4 5
27 MY4
CP6 220PX4 MY5 6
27 MY5
7 8 MX6 MY6 7
27 MY6
2
5 6 MX7 MY7 8 C22
D 27 MY7 27 FANSIG D
3 4 MY17 MY8 9 2.2U_6
27 MY8
MY16 MY9 U2 CN9
1 2 27 MY9 10 30mil
1
CP5 220PX4 MY10 11 2 3 TH_FAN_POWER 1
27 MY10 VIN VO
7 8 MY3 MY11 12 5 2
27 MY11 GND
5 6 MY2 MY12 13 1 6 3
27 MY12 10,11 SML1ALERT# /FON GND
2
3 4 MY1 MY13 14 7 C307 C306 C23
27 MY13 GND
1 2 MY0 MY14 15 4 8 FAN_CONN
27 MY14 27 CPUFAN#_DAC VSET GND
CP1 220PX4 MY15 16 2.2U_6 .01U_4 *.01U_4
27 MY15
1
7 8 MY7 MY16 17 G995P1U
27 MY16
5 6 MY6 MY17 18
27 MY17
MY5 MX7
3
1
4
2 MY4
27 MX7
MX6
19
20
FANPWR = 1.6*VSET
27 MX6
CP2 220PX4 MX5 21
27 MX5
7 8 MY11 MX4 22
27 MX4
5 6 MY10 MX3 23
27 MX3
3 4 MY9 MX2 24 27
27 MX2
1 2 MY8 MX1 25 28
27 MX1
CP3 220PX4 MX0 26
27 MX0
7 8 MY15
5 6 MY14 KB
3 4 MY13 +3VPCU
1 2 MY12
CP4 220PX4
C
C27 220p/50V_4 MX1 RP1 10K_10P8R TOUCHPAD & Switch CONN. C
10 1 MX3
C24 220p/50V_4 MX0 MX4 9 2 MX2
MX5 8 3 MX1
MX6 7 4 MX0
MX7 6 5 +5V +5V
L4 *SHORT0603 +TPVDD
C28
HOLE R13
10K_4
R14
10K_4
0.1u/10V_4_X7R
CN1
HOLE1 HOLE2 HOLE15 1
*hg-c315d110p2 *H-C94D94N *H-O95X134D95X134N L2 *SHORT0603 2
27 TPDATA
7 6 TPDATA_R 3
8 5 L3 *SHORT0603 TPCLK_R 4
27 TPCLK
9 4 5
C25 C26 6
RIGHT# 7
1
2
3
1
*.01u/25V_4 8
*.01u/25V_4 9
10 13
B 11 14 B
HOLE10 HOLE11 HOLE12 HOLE6 LEFT# 12
*hg-c315d118p2 *hg-c315d118p2 *hg-c315d118p2 *hg-c315d118p2
7 6 7 6 7 6 7 6 Aces 88501-120N
8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 HOLE5 HOLE8 HOLE9
*h-c236i185d165p2 *h-c236i185d165p2 *h-c236i185d165p2
1
2
3
1
2
3
1
2
3
1
2
3
SW2 SW1
RIGHT# 3 2 LEFT# 3 2
HOLE3 HOLE14 HOLE7 HOLE13 HOLE4 1 4 1 4
*hg-c315d118p2 *hg-c315d118p2 *hg-c315d118p2 *hg-c315d118p2 *hg-c315d118p2
1
7 6 7 6 7 6 7 6 7 6 SWITCH_1.5 SWITCH_1.5
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
Holex1 @ mini card Holex2 @PCH
HOLE18 HOLE16 HOLE17

A H-C197D87P2 H-C228D142P2 H-C228D142P2 A

1
PROJECT : ZQR
1A
KB/FAN/TP+FP
5 4 3 2 1
5 4 3 2 1
L26 PBY160808T-250Y-N/3A/25ohm_6
C345
schematic-laptop.blogspot.comSM BUS PU(KBC)
+A3VPCU
C348
+3V
+3VPCU
0.1u/10V_4 4.7U/6.3V_6 MBCLK R19 10K_4

MBDATA R18 10K_4
+3VPCU E775AGND
R244 2.2_6 D12 C334 C331
1 2 +3VPCU_EC +3V_S5
BAS316 4.7U/6.3V_6 0.1u/10V_4
C322 C320 C311 C309 C312 C340 MBCLK2 R16 10K_4
115
102
MBDATA2 R17 10K_4
19
46
76
88
4
4.7U/6.3V_6 0.1u/10V_4 *.1u/16V_4 0.1u/10V_4 *.1u/16V_4 0.1u/10V_4 U10
AVCC
VDD
VCC1
VCC2
VCC3
VCC4
VCC5
E775AGND C353 4.7U/25V_8 ICMNT
D CLK_PCI_EC D
C343 0.01u/16V_4
9,19 LFRAME# 3 97 TEMP_MBAT 28
LFRAME GPIO90/AD0 WL_SW
9,19 LAD0 126 LAD0 GPIO91/AD1 98 TP68
R250 127 A/D 99 DGPU_IDLE# 3G_EN R239 *10K_4
9,19 LAD1 LAD1 GPIO92/AD2 TP9
128 100 CPU_ICC
9,19 LAD2 LAD2 GPIO93/AD3 ICMNT 28
*22_4 1 R253 *short_4
9,19 LAD3 LAD3 +3V
CLK_PCI_EC 2
10 CLK_PCI_EC LCLK
101 PWRSM_SW
GPIO94/DA0 TP4
8 D/A 105 R269 *short_4 VGACLK R254 2.2K_4
8 CLKRUN# GPIO11/CLKRUN GPI95/DA1 CPUFAN#_DAC 26
C336 106 MUTE_KEY VGADATA R252 2.2K_4
GPI96/DA2 TP6
*10p/50V_4 121 DGPU_IDLE# R267 10K_4
11 EC_A20GATE GPIO85/GA20 VGA_THERM# R268 *10K_4
11 EC_RCIN# 122 KBRST/GPIO86 H_PROCHOT# 4,30
GPIO01/TB2 64 ACIN 28
3
29 LPC 79 MUTE_CODEC
11 EC_EXT_SCI# ECSCI/GPIO54 GPIO02 TP58
95 TP67 NBSWON# Q1
GPIO03
16 EC_FPBACK# 6 GPIO24/LDRQ GPIO04 96
108 PROCHOT_EC 2
GPIO05
21 AMP_MUTE# 124 GPIO10/LPCPD GPIO06/IOX_DOUT/RTS1 93 LID591# 16
GPIO07 94
TP65 7 114 BACKUP_LED# TP70 R21 2N7002K
4,10,18,19,23 PLTRST# LREST GPIO16
109 ACPRN TP8
1
GPIO30 PWRSAVE_ LED# TP1 100K_4
19 RF_EN# 123 GPIO67/PWUREQ GPIO36/CTS1 15
80 TP59
GPIO41 VRON 30
125 17 HWPG
9 SERIRQ SERIRQ GPIO42/SCL3B/TCK TP61
20 ODD_POWER
GPIO43/SDA3B/TMS TP56
9 21 TP2
11 EC_EXT_SMI# GPIO65/SMI GPIO44/TDI SUSB# 8
GPIO GPO47/SCL4 24
GPIO50/PSCLK3/TDO 25 D/C# 28
54 26 S5_ON TP52
26 MX0 KBSIN0 GPIO51 S5_ON 29,34
55 27 HDMI_HPD_EC#
26 MX1 KBSIN1 GPIO52/PSDAT3/RDY HDMI_HPD_EC# 17
56 28
C
26
26
MX2
MX3 57
KBSIN2
KBSIN3
GPIO53/SDA4
GPIO70 73
PWROK_EC_uR R237
TP55
SUSC# 8
SPI FLASH(KBC) C361 *10P/50V_4
C
26 MX4 58 KBSIN4 GPIO71 74 PWROK_EC 8
59 75 RSMRST#_uR R238 *short_4
26 MX5 KBSIN5 GPIO72 ICH_RSMRST# 8
60 82 *short_4 C328 *10P/50V_4
26 MX6 KBSIN6 GPIO75/SPI_SCK MAINON 31,32,34
61 83 3G_EN TP64
26 MX7 KBSIN7 GPO76/SHBM TP62 +3VPCU
84 ODD_EJ# C329 *10P/50V_4
GPIO77 TP63
26 MY0 53 KBSOUT0/JENK GPIO81 91 TP66 DNBSWON# 8
52 110 U11
26 MY1 KBSOUT1/TCK GPO82/IOX_LDSH/TEST TP7
51 112 SPI_SDI_uR R275 22_4 SPI_SDI_uR_R 2 8
26 MY2 KBSOUT2/TMS GPO84/IOX_SCLK/XORTR USBON# 25 SO VDD
50 107 VGA_THERM#
26 MY3 KBSOUT3/TDI GPIO97 TP75
49 KB R271 100K_4 SPI_SDO_uR 5 7 C330
26 MY4 KBSOUT4/JEN0 SI HOLD
26 MY5 48
KBSOUT5/TDO NUMLED# SPI_SCK_uR 0.1u/10V_4
26 MY6 47 31 TP53 6 3
KBSOUT6/RDY GPIO56/TA1 TP72 SCK WP
26 MY7 43 117 SUSON 32
KBSOUT7 GPIO20/TA2/IOX_DIN_DIO R256 10K_4 SPI_CS0#_uR
26 MY8 42 63 FANSIG 26 +3VPCU 1 4
KBSOUT8 GPIO14/TB1 CE VSS
26 MY9 41 KBSOUT9/SDP_VIS
40 TIMER 32 W25X10BVSNIG
26 MY10 KBSOUT10/P80_CLK GPIO15/A_PWM CONTRAST 16
39 118 C342
26 MY11 KBSOUT11/P80_DAT GPIO21/B_PWM PCBEEP 21
38 62 *56p/4
26 MY12 KBSOUT12/GPIO64 GPIO13/C_PWM PWRLED# 24
37 65 At 11/24 add
26 MY13 KBSOUT13/GPIO63 GPIO32/D_PWM BATLED0# 24
36 22 MUTE_LED Winbond W25X16AVSSIG
26 MY14 KBSOUT14/GPIO62 GPIO45/E_PWM TP54
35 16 SUSLED# AKE38ZP0N01
26 MY15 KBSOUT15/GPIO61/XOR_OUT GPIO40/F_PWM/RI1 TP3
34 81 CAPSLED# EON EN25F16-100HIP
26 MY16 GPIO60/KBSOUT16 GPIO66/G_PWM TP57
26 MY17 33 66 BATLED1# 24 AKE38ZA0Q00
GPIO57/KBSOUT17 GPIO33/H_PWM/SOUT1 AMIC A25L016
AKE38ZN0800
MBCLK 70
28 MBCLK GPIO17/SCL1
MBDATA 69
28 MBDATA GPIO22/SDA1
10 MBCLK2 MBCLK2 67 SMB 113
GPIO73/SCL2 GPIO87/CIRRXM/SIN_CR TP5
10 MBDATA2 MBDATA2 68 14 BACKUP_SW
GPIO74/SDA2 GPIO34/SIN1/CIRRXL TP60
VGACLK 119 IR 23
TP69 GPIO23/SCL3 GPIO46/CIRRXM/TRST
VGADATA 120 111 PROCHOT_EC
TP71 GPIO31/SDA3 GPO83/SOUT_CR/TRIST
72 86 SPI_SDI_uR
B 26
26
TPCLK
TPDATA 71
GPIO37/PSCLK1
GPIO35/PSDAT1
F_SDI/F_SDIO1
F_SDO/F_SDIO0 87 SPI_SDO_uR_R
SPI_CS0#_uR
R241 22_4 SPI_SDO_uR HWPG(KBC) B
9 ME_WR# 10
GPIO26/PSCLK2 PS/2 FIU F_CS0
90
SPI_SCK_uR_R R245 22_4 SPI_SCK_uR
25 BT_ON# 11 92
GPIO27PSDAT2 F_SCK
R20 *short_4 E775_32KX1 77 30 ECDB_CLOCK +3V
8 PCH_SUSCLK GPIO00/32KCLKIN GPIO55/CLKOUT/IOX_DIN_DIO TP51
85 VCC_POR# R240 47K/F_4 +3VPCU
R243 *short_4 +1.05V_VTT_EC VCC_POR
12
VCORF
+1.05V_VTT VTT
AGND
GND1
GND2
GND3
GND4
GND5
GND6
R242 43_4 EC_PECR_R 13 104 VREF_uR R270 *short_4 +A3VPCU R274

4,11 EC_PECI PECI VREF HWPG 10K_4
NPCE791L C316 C360

93&893&8
5
18
45
78
89
116
103
VCORF_uR 44
*56p/4 *56p/4 D17 1SS355 HWPG

29 SYS_HWPG
D13 1SS355
33 HWPG_VCCSA
L25 PBY160808T-250Y-N/3A/25ohm_6 D18 1SS355
34 HWPG_1.8V
C308 D15 1SS355
31,33 HWPG_VTT
1u/6.3V_4 D14 1SS355
32 HWPG_1.5V
E775AGND
POWER-ON Switch(KBC) PWR/B Power sequence CN12
NBSWON#_TP 2 1 +3VPCU
TP110
+3V_S5_TP 4 3 S5_ON_TP
+3VPCU TP107 TP108
A DNBSWON#_TP 6 5 ICH_RSMRST#_TP A
TP104 TP105
SW3 SUSON_TP 8 7 SUSC#_TP S5_ON R236 *10K_4
TP102 TP103
DIP:TME-533B-Q-T/R SUSB#_TP 10 9 +1.5V_SUS_TP
TP100 TP101
+3V_TP 12 11 MAINON_TP
TP98 TP99
NBSWON# 1 2 R90 14 13
3 4 10K_4 +VCC_CORE_TP 16 15 VRON_TP
TP97 TP96
5 PWROK_EC_TP 18 17 HWPG_TP
TP95 TP94
6 PLTRST#_TP 20 19 SYS_PWROK_TP
CN3 TP91 TP90
22 21
NBSWON# 1 1
24 23 Quanta Computer Inc.
2 2
26 25
28 27 PROJECT : ZQR
C115 C116 H_PWRGOOD_TP 30 29 SUS_STAT#_TP
TP86 TP85
0.1U/10V/X5R_4 *1000P/16V/X7R_4 PWR-CONN Size Document Number Rev
*CON30_DEBUG 1A
WPCE791 & FLASH
5 4 3 2 1
5 4 3 2 1
PL5
VA1 schematic-laptop.blogspot.com
PD3
SBR1045SP5-13
PQ23
AOL1413
PR122 B14
0.01_0612
PQ23ˣPQ24 change symbol from N-MOS to P-MOS. 5/17
VIN
PQ24
AOL1413
PJ2 HI0805R800R-00_8 1 1 1
1 VA 3 VA2 2 5 1 2 2 5
2 2 3 B24 3
3 PR35 change from 0 ȍ to short pad. 5/18
1
4 PR35
PC76 PC8 PR7 *Short_4 PC95 PC94 PR18
4
POWER_JACK PL3 0.1u/50V_6 0.1u/50V_6 220K_4 0.1u/50V_6 2200p/50V_6 33K/F_4
HI0805R800R-00_8 PD2 PR41
SMAJ20A *Short_4 CSIN_1
2
D D
PC78 PC79 CSIP_1
0.1u/50V_6 2200p/50V_6 1 6 B24
PD1 PR41 change from 0 ȍ to short pad. 5/18 PR17
SW1010CPT PR6 2 5 PR30 *Short_4 10K_4
D/C# 27
220K_4
3 4
3
B24 PR30 change from 0 ȍ to short pad. 5/18
PQ1
IMD2AT108
CSIN_1 2
PQ2
CSIP_1 DMN601K-7
1
VIN
PC18
PR40 PR36 1u/16V_6
10/F_4 10/F_4
PC22
0.1u/50V_6 PR10
4.7_6 PC10 EMI
1u/16V_6
27 CSIN
28 CSIP
ISL88731_VDDP
PC7 PC6
5
10u/25V_1206 *10u/25V_1206
33
32
31
30
26
21
C C
1
+3VPCU PD4 PC77
*RB500V-40 2200p/50V_6
CSSP
VDDP
NC
GND
GND
GND
GND
CSSN
VCC
PC17 PR25 PC15 4
0.1u/50V_6 2.7_6 0.1u/50V_8
+3VPCU 11 25 88731B_2 88731B_1 PQ21 PR5
VDDSMB BOOT AON7410 0.01_0612
3
2
1
PL4
27 MBDATA 9 24 ISL88731_UGATE 6.8uH_7X7X3
PR23 SDA UGATE BAT-V
1 2
100K_4
27 MBCLK 10 23 ISL88731_PHASE
SCL PHASE
5
13 20 ISL88731_LGATE PR4
27 ACIN ACOK LGATE *4.7_6
4
PR11 PC13 19
49.9/F_6 0.1u/50V_6 PGND PQ22
DCIN 22 AON7410 CSOP_1
3
2
1
DCIN PR8 PC5 PC80 PC9 PC11
PR42 10/F_4 1000p/50V_6 BAT-V 2200p/50V_6 10u/25V_1206 10u/25V_1206
82.5K/F_4 PU2
CSOP 18 CSOP CSOP_1
PC1 88731ACSET 2 ISL88731C
0.1u/50V_6 ACIN PC12
2 1 0.1u/50V_6
3 VREF
B
PC4 PR43
CSON 17 CSON BAT-V B39 PR4 4.7ohm / PC5 1000pf phase into BOM list for EMI. 5/19
B
100p/50V_6 PL1 22K/F_4
HI0805R800R-00_8 4 PR9
ICOMP 10/F_4
NC 16
MBAT+ BAT-V
C114F3-108A1-L_Batt_Conn 5 PR16
PL2 NC *SHORT0402
HI0805R800R-00_8 15 BAT-V
10 1 PR112 VBF
2 6 VCOMP
100_4 29 PR3
3 TEMP_MBAT GND 100_4
GND
4 TEMP_MBAT 27
ICM
NC
NC
5
6 PR113 PR44
7
14
12
7 100K_4 2.21K/F_4
9 8
+3VPCU
PJ1
PC3 PC2
47p/50V_6 47p/50V_6 PC26
0.01u/50V_6
ISL88731 thermal pad
ICMNT
tie to Pin12
ICMNT 27
PR111
*SHORT_PAD_4 PR2 PR1
100_4 100_4 PC23 PC24 PC25
*1u/16V_6 0.01u/50V_6 *0.01u/50V_6
MBCLK 27
A MBDATA 27 A
PU1
*CM1293A-04SO
1 6 MBDATA
CH1 CH4
2 VN VP 5 +3VPCU Quanta Computer Inc.
TEMP_MBAT 3 4 MBCLK
CH2 CH3 PROJECT : ZQR
Add ESD diode base on EC FAE suggestion 1A
Charger(ISL88731A)
5 4 3 2 1
5 4 3 2 1
MAIND SYS_SHDN#
MAIND 6,32,34 SYS_SHDN# 4,34
Ven=7.23V
B11 Del JP10, connect to VIN. 5/17

27 SYS_HWPG VIN VIN VL 8223REF +3VPCU
+3VPCU

D D
VIN VIN
PR100
4.7u/6.3V_6
4.7u/6.3V_6
PR106 10_8
665K/F_4
1
+ PC66 PR92
1u/6.3V_4 *0_4 PR105
8223_VIN
8223_EN
PC148 PC60 PC61 PC70 *SHORT_PAD_4 PC62 PC63
2
PC67
PC72
B13 100u/25V_6X5.8 4.7u/25V_8 2200p/50V_6 PR85 0.1u/25V_4 PR91 2200p/50V_6 4.7u/25V_8
Del JP12, connect to +5VPCU. 5/17 *SHORT_PAD_4
*SHORT_PAD_4 PR102
5
+5VPCU PR86 PR107 *0_4 B12 Del JP11, connect to +3VPCU. 5/17
*100K/F_4 330K/F_4
PQ7 +3VPCU +3VPCU
+5VPCU
16
17
5
3
AON7410
3.3 Volt +/- 5%
5 Volt +/- 5% 4
VIN
VREG3
VREG5
REF
TDC : 3.86A
TDC : 4.125A SYS_SHDN# 13 EN SKIPSEL 14 +3V_SKIP
PQ6 4 PEAK : 5.15A
3
2
1
PEAK : 5.5A AON7410 +3V_PG 23 4 +3V_TON
PGOOD TONSEL OCP : 6.2A
OCP : 6.6A +5V_DH 21 10 +3V_DH PC69
Width : 160mil
1
2
3
UGATE1 UGATE2 0.1u/50V_6
Width : 170mil PL13 PC68 PR88 +5V_B 22 BOOT1 BOOT2 9 +3V_B PR87 PL14
2.2uH 0.1u/50V_6 1/F_6 PU4 1/F_6 2.2uH
+5V_LX 20 RT8223M 11 +3V_LX
PHASE1 PHASE2
+5V_DL 19 12 +3V_DL
LGATE1 LGATE2
5
C C
5
PR78 24 7
VOUT1 OUT2
ENTRIP1
ENTRIP2
15.4K/F_4 PR77 PR82
PQ8 +5V_FB 2 5 +3V_FB *4.7_6 6.81K/F_4
GND
GND
ENC
+ PR76 AON7702 FB1 FB2 +
4
*4.7_6 4
B24 PC149
18
25
15
PR93 change from 0 ȍ to short pad. 5/18 0.1u/50V_6
1
2
3
PC150 PC152 PQ9 PC65 PC151
3
2
1
330u/6.3V_6X5.7 0.1u/50V_6 8223_EN PR93 *Short_4 AON7702 *680p/50V_6 330u/6.3V_6X5.7
PR80 PC64
2
10K/F_4 *680p/50V_6
PR103 PC71
100K/F_4 0.1u/10V_4 PR83
10K/F_4
1
Del net "+5VPCU_SRC". 5/17
PR79 PR81
75K/F_4 75K/F_4
PR90 *0_6 +5V_DL
2
PC153 PR84 OCP:6.2A
0.1u/50V_6 *SHORT_PAD_6 L(ripple current)
PD6 PR89 +3V_DL
OCP:6.6A CHN217 3 *SHORT_PAD_6 PR190 =(9-3.3)*3.3/(2.2u*0.5M*9)
L(ripple current) *SHORT_PAD_6
1 ~1.9A
B
=(9-5)*5/(2.2u*0.4M*9) PC155 Iocp=6.2-(1.9/2)=5.25A
B
0.1u/50V_6
=2.525A 2 Vth=5.25A*14mOhm=0.0735V
Iocp=6.6-(2.525/2)=5.34A PD7
CHN217 3 R(Ilim)=(73.5mV*10)/10uA
Vth=5.34A*14mOhm=0.07472mV 1
PC154 =73.5K
0.1u/50V_6
R(Ilim)=(74.72mV*10)/10uA
~74.723K +15V
+15V_ALWP
PR109
22_8
PC74
0.1u/50V_6
VIN +3V_S5 +5V_S5 +15V VIN +5VPCU +5VPCU +3VPCU

+3VPCU
PR168 PR162 PR163 PR110 PR164

5
5
1M_6 22_8 22_8 1M_6 *1M_6
3
S5D 4 PQ10 MAIND 4 PQ11 MAIND 4 PQ12 S5D 2
A MDV1660 MDV1660 MDV1660 A
3
PQ20
3
2
1
3
2
1
3
2
1
2 AO3404
27,34 S5_ON
1
2 2 2
+5V_S5 +5V +3V +3V_S5
PR167 PQ36 PQ37
1
PQ39 1M_6 DMN601K-7 DMN601K-7

DTC144EU PQ38 PC75
TDC : 2.25A TDC : 1.88A TDC : 2.74A TDC : 0.16A
1
DMN601K-7 *2.2n/50V_4
PROJECT : ZQR
PEAK : 3A PEAK : 2.5A PEAK : 3.65A PEAK : 0.21A Size Document Number Rev
Width : 100mil Width : 80mil Width : 110mil Width : 10mil SYSTEM 5V/3V (RT8223M) 1A

5 4 3 2 1
5 4 3 2 1
Close to the
PC19
CPU side. PR59 1000p/50V_4 B10 Del JP3, connect to Vin.
Parallel *10_4 Del "VCC_GT_VIN" netname. 5/17
PR132 *Short_4 PR138
6 VSS_AXG_SENSE VSS_AXG_SENSE_R 2.2/F_6 VIN
PR128 *Short_4 BOOT_GT
VCC_AXG_SENSE_R
2200p/50V_4
6 VCC_AXG_SENSE
0.1u/50V_6
4.7u/25V_8
4.7u/25V_8
4.7u/25V_8
5
1
PC40
PC16 PC107
PC122
PC121
PC123
PC41
PR58 330p/50V_4 0.22u/25V_6
D B24 PR128,PR132 change from 0 ȍ to short pad. 5/18 *10_4 D
2
UGATE_GT 4
B57 PC99ˣPC103 change from 33nf(CH3334K1B00) to 0.1uf(CH4104K9B03). 5/23 PR54
+VCC_GFX
1
2
3
10K/F_4 PQ31 PL7
B56 PR130 changes from 2.55Kohm(CS22552FB01) to AON6414AL 0.36uH
B08 Change "+VIN_VCC_CORE" net to Vin. 5/17 2.49Kohm(CS22492BB00). 5/23 PHASE_GT
DCR=1.1mOhm
1 2 +VCC_GFX
PC14 PR20 PR137
11K/F_4
330p/50V_4
5
*820p/50V_4 *2.26K/F_4 PC82 39p/50V_4 PR130 2.49K/F_4 2.61K/F_4
+VCC_GFX
*220p/50V_4
4
PR55
1.1K/F_4
0.22u/10V_4
VIN
PC21
ISPG
2.2_6
Check pull up resister to +
TDC : 24A
0.1u/25V_4
PC100
PC99
4 4
1.05V for H_PROCHOT# +5V_S5 PC81 PR124 PC88 PR131 ISNG PEAK : 33A
0.1u/10V_4
0.1u/10V_4
10u/6.3V_8
PC92
PC20
PC43
PC46
150p/50V_4 475K/F_4 330p/50V_4 422/F_4 PC124
2200p/50V_4
1
2
3
1
2
3
OCP : 35.8A
PC38
PR135
LGATE_GT 330u/2V_7343
*100/F_4
95835_COMPG
PR27
PR33
PR48
PR47 2.2_6 PC87 1000p/50V_4 PR155 PQ32 PQ5 Width : 1320mil
10_6 95835_VWG 10K_6_NTC AON6780 *AON6780
GFX_CORE Load Line :
Place NTC close to the GFX_CORE inductor -3.9mV/A for GT2
40
39
38
37
36
1
PR118 PR34 1.82K/F_4
PC27 8.06K/F_4 ISPG
VWG
COMPG
FBG
RTNG
ISUMPG
ISUMNG
+1.05V_VTT 0.22u/25V_6
95835_VIN 20 34 BOOT_GT ISNG PR31 1/F_4
+5V_S5 PC108 VIN BOOT_GT
1u/6.3V_4 95835_VDD 19 33 UGATE_GT
VDD HG_GT
Close to VR B09 Del JP13, connect to Vin.
26 32 PHASE_GT Del "+VIN_VCC_CORE" netname. 5/17
PR14 PR13 VDDP PHASE_GT
54.9/F_4 130/F_4 95835_VRON 6 31 LGATE_GT
VR_ON LG_GT
2
PC111 PR144
4.7u/6.3V_6 PR22 *0_4 2 2.2/F_6 VIN
PGOODG BOOT_1
1
VR_SVID_DATA 7 PU5 21 BOOT_1
2200p/50V_4
C +3V_S5 +3V PGOOD BOOT1 C
0.1u/50V_6
4.7u/25V_8
4.7u/25V_8
5
1
VR_SVID_CLK B01 remove PR22 from BOM for power up issue. 05/11 UGATE_1 PC112
PC30
PC28
PC29
PC31
ISL95835HRTZ-T UG1
22
0.22u/25V_6 + PC114
4,27 H_PROCHOT# 8 23 PHASE_1 100u/25V_6X5.8
2
VR_HOT# PH1 UGATE_1 4
*100K/F_4
1.91K/F_4
2
PR12
PR15
B24 LGATE_1
PR115
10K/F_4
24
PR120 change from 0 ȍ to short pad. 5/18 PC83 LG1 PR50
1
2
3
43p/50V_4 6 VR_SVID_ALERT# 4 10K/F_4 PQ28 PL8
PR120 *Short_4 ALERT# AON6414AL 0.36uH
PHASE_1
DCR=1.1mOhm
27 VRON 6 VR_SVID_DATA 3 1 2 +VCC_CORE
SDA
5
5 30 BOOT_2 B24
8 GFX_PWRGD 6 VR_SVID_CLK
4
SCLK BOOT2 PR46 change from 0 ȍ to short pad. 5/18
2.2_6
PR52
UGATE_2 +
4,8 IMVP_PWRGD UG2
29
+5V_S5 4 4
+VCC_GORE
PHASE_2
35 28 TDC : 53A
0.1u/10V_4
10u/6.3V_8
NTCG PH2
PC48
PC47
PC42
2200p/50V_4
1
2
3
1
2
3
9
NTC LG2
27 LGATE_2 LGATE_1 330u/2V_7343 PEAK : 53A
OCP : 60A
PC36
PR46 PQ27 PQ3
*Short_4 AON6780 *AON6780
PR121 PC85 Width : 2120mil
27.4K/F_4 1000p/50V_4
VR_PWM3 VSUM+ PR133 3.65K/F_6
Place NTC close to the
10
VW PWM3
25 VCORE Load Line :
VCORE Hot-Spot. PR157 PR117 95835_COMP 11
COMP 1.9mV/A
ISEN3/FB2
470K_4_NTC 8.06K/F_4 ISEN_1 PR136 10K/F_4
95835_FB 12 41 Add 9 GND VIAs PR32
ISUMN
ISUMP
FB EP
ISEN2
ISEN1
PR116 *10K/F_4
RTN
3.83K/F_4 for thermal pad VSUM- PR28 1/F_4 ISEN_2
B09 Del JP1, connect to Vin.

16
13
14
15
17
18
PC90 PR123 Del "+VIN_VCC_CORE" netname. 5/17
33p/50V_4 3.01K/F_4 B57 PC99ˣPC103 change from 33nf(CH3334K1B00) to 0.1uf(CH4104K9B03). 5/23
B PR146 B
2.2/F_6 VIN
PR45 BOOT_2
11K/F_4
1.58K/F_4
*330p/50V_4
PC106
2.61K/F_4
2200p/50V_4
1
PR39 PC84 PR127
0.1u/50V_6
4.7u/25V_8
4.7u/25V_8
0.22u/10V_4
1
27.4K/F_4 680p/50V_4 267K/F_4 PC86 PR119 VSUM+ PC113 +
PC109
PC104
.1u/25V_4
PC32
PC33
1000p/50V_4 887/F_4
PC105
PC103
Place NTC close to the 0.22u/25V_6
0.1u/10V_4
VSUM- PC116
GFX_CORE Hot-Spot.
2
PC93
UGATE_2 100u/25V_6X5.8
*100/F_4
4
PR154 PC96 10p/50V_4
PR140
PR139
PR134
470K_4_NTC PC89 PR126 PR156 PR53
1
2
3
560p/50V_4 2K/F_4 10K_6_NTC 10K/F_4 PQ26 PL9
PR38 AON6414AL 0.36uH DCR=1.1mOhm
3.83K/F_4 Place NTC close to the VCORE inductor of phase 1 PHASE_2 1 2 +VCC_CORE
5
PROG1
4
2.2_6
B55 PR139 changes from 1.33Kohm(CS21332FB11) to 1.58Kohm(CS21582FB00). 5/23
PR19
PR51
20K/F_4 +VCC_CORE 4 4 +
95835_COMP
0.1u/10V_4
10u/6.3V_8
PC45
PC44
2200p/50V_4
1
2
3
1
2
3
LGATE_2 PC39
PROG2 PC98 PC97 0.22u/10V_4
PC35
330u/2V_7343
PR21 PR57 330p/50V_4 ISEN_1 PQ29 PQ4
80.6K/F_4 *10_4 AON6780 *AON6780
95835_COMPG PC91 0.22u/10V_4
ISEN_2 VSUM-
6 VCCSENSE PR29 *Short_4 VCC_SENSE_R VSUM+ PR129 3.65K/F_6
PR114 6 VSSSENSE PR37 *Short_4 VSS_SENSE_R ISEN_3

100K/F_4 PC101 ISEN_2 PR125 10K/F_4
95835_VRON 330p/50V_4 PR24
Parallel *10K/F_4
PR56 VSUM- PR26 1/F_4 ISEN_1
B24 PR29, PR37 change from 0 ȍ to short pad. 5/18 *10_4 PC102
A A
1000p/50V_4
Close to the
CPU side.

PROJECT : ZQR
1A
+VCC_CORE & +VCC_GFX (ISL95835)
5 4 3 2 1
5 4 3 2 1
VIN
PR181
+3V +5V_S5 360K/F_4
PCH_TON
D D
+1.05V_VTT
1.05Volt +/- 5%
PR180 TDC : 10.6A
100K_4 PR170 PC140 PC138 PC139
10_6 PR173 2200p/50V_4 4.7u/25V_8 4.7u/25V_8 PEAK : 14.1A
PCH_VCC 2_6
PCH_BST1 OCP : 17A
PCH_BST Width : 440mil
5
PC136
1u/6.3V_4
PC141
0.1u/25V_6
11
4
4
+1.05V_VTT
B19 Del JP15, connect to +1.05V_VTT. 5/18
BOOST
VCC
TON
1
2
3
PQ42
AOL1448
9 3 PCH_DH PL12
27,33 HWPG_VTT PGOOD UGATE 1uH
PR176 PCH_EN 8 2 PCH_LX
27,32,34 MAINON EN PHASE
*SHORT_PAD_4 PU8
C RT8238A LGATE 1 PCH_DL C
5
13 10 PCH_CS
PAD CS
MODE
PR69 +
GND
*4.7_6
FB
4
PC142
12
6
*0.1u/10V_4
1
2
3
PR70 PQ44 PC56
PR182 AOL1718 *680p/50V_6
*SHORT_PAD_4 66.5K/F_4 PC134 PC130
560u/2.5V_6X5.7 0.1u/50V_6
PR179
RDSon 4.3mOhm
*SHORT_PAD_4
Close to output cap
6 VCCP_SENSE
PR174 *0_4
B B
PR171 PC137
PCH_MODE 11K/F_4 *100p/50V_4
6 VSSP_SENSE
PR175 *0_4
PCH_FB
PR177
+5V_S5
*SHORT_PAD_4
PR172
10K/F_4
Ton=(8.8p*360K*1.05)/19-0.5=179.81ns
Lcurrent=(19-1.05)*179ns/1uH=3.228A
Iocp=17-3.228/2=15.386A VOUT=(1+R1/R2)*0.5
Vcs=15.386*4.3mohm=0.06616V
A A
Rcs=0.06616/1u=66.16Kohm
PROJECT : ZQR
1A
+PCH&VTT (RT8238A)
5 4 3 2 1
5 4 3 2 1
+0.75V_DDR_VTT
D 0.75 Volt +/- 5% D
TDC : 0.75A PC144

10u/6.3V_8 B25 PR178 change from 0 ȍ to short pad. 5/18
PEAK : 1A
Width : 40mil PC143
0.1u/50V_6
8207A_VBST PR178 *Short_6
+0.75V_DDR_VTT
8207A_DH VIN
PC145 PC146
10u/6.3V_8 10u/6.3V_8 8207A_LX
5
8207A_DL
PC55
4.7u/25V_8
4 B20
Del JP5, connect to +1.5VSUS, del "+1.5VSUS_SRC" Netname. 5/18
25
24
23
22
21
20
19
PC135
1
2
3
PQ43 2200p/50V_6
LL
DRVL
VTT
VBST
GND
VLDOIN
DRVH
AOL1448 PL11
1uH
1 18 +1.5V_SUS
VTTGND PGND
+SMDDR_VREF
0.75 Volt +/- 5% 2 VTTSNS CS_GND 17 +1.5V_SUS
TDC : 0.38A 1 Volt +/- 5%
5
3 16 PR71
PEAK : 0.5A GND PU9 CS 5.76K/F_4 TDC : 10A
RT8207L PR67
Width : 20mil +1.5V_SUS 4
MODE V5IN
15 +5V_S5 4 *4.7_6 + PEAK : 13A
C C
B22 Change "+1.5VSUS_SRC" Netname to "+1.5V_SUS". 5/18 PQ41 OCP : 15A
1
2
3
5 14 AOL1718
+SMDDR_VREF VTTREF V5FILT Width : 400mil
PR72
VDDQSNS
VDDQSET
PC59 +5V_S5 6 13 PC57 5.1/F_6 PC58 PC54

0.033u/50V_6 COMP PGOOD *680p/50V_6 PC132
1u/10V_4 1u/10V_4
560u/2.5V
NC
NC
S3
S5
PR74 +3V
100K/F_4
7
10
11
12
FOR DDR III

HWPG_1.5V 27
PR185
VIN (For RT8207A 400KHZ ) close to pc2008
620K/F_4
B27 PR73,PR75 change from 0 ȍ to short pad. 5/18 S5_1.8V PR186

SUSON 27
*SHORT_PAD_4
PR75 *Short_6 S3_1.8V PR187

MAINON 27,31,34
*SHORT_PAD_4
PR73 *Short_6 PR188 +5V_S5

*0_4
PC147 PR184
*33p/50V_6 10K/F_4
Vout = (PR150/PR149) X 0.75 + 0.75
B B
AO1718 Rdson=3.8~4.3mOhm
8207A_SET
L(ripple current)
=(19-1.5)*1.5/(1u*400k*19)
PR189 S5_1.8V PR183 S3_1.8V ~3.454A
10K/F_4 *0_4
Vtrip= (15-3.454/2)*4.3mohm=0.05707V
+1.5V_SUS RILIM=Vtrip/10u=5.707Kohm
3
MAIND
6,29,34 MAIND
2
+1.5V
PQ45
1.5 Volt +/- 5%
AO3404 TDC : 0.38A S3 S5 +1.5VSUS REF VTT
1
PEAK : 0.5A
S0 1 1 ON ON ON
+1.5V
Width : 20mil
S3 0 1 ON ON OFF
A
S4/S5 0 0 OFF OFF OFF A

PROJECT : ZQR
1A
DDR 1.5V(RT8207A)
5 4 3 2 1
5 4 3 2 1
G0
G1 VCCSA
0 0 0.9V
0 1 0.8V
1 0 0.725V
D
1 1 0.675V D
B17 Del JP2, connect to VIN, del "VSA_VIN" Netname. 5/18
+3V +5V_S5
VCCSA_SEL VCCSA
1 0.8V VIN
0 0.9V
PR148
10_6 default 0.9V +VCCSA
5
VSA_VCC
PR143
*100K_4 PQ30 PC118 PC119
TDC : 4.5A
PC115
1u/6.3V_4 VSA_DH
AON7410 2200p/50V_6 4.7u/25V_8 PEAK : 6A
4
OCP : 7A
Width : 180mil
3
2
1
VCC
3 PR152 PC117 B18 Del JP4, connect to +VCCSA, del "VSA_SRC" Netname. 5/18 +VCCSA
UGATE 3.3_6 0.1u/25V_6
27 HWPG_VCCSA 9 PGOOD
4 VSA_BST1 PL6
PR145 BOOST 2.2uH_7X7X3
C C
VSA_EN 6 2 VSA_LX
27,31 HWPG_VTT EN PHASE
*SHORT_PAD_4 PU6
VSA_CS 11 RT8241DZ 1
PC110 CS LGATE
5
*0.1u/10V_4 12
PAD
PR151 GND PR49
G0
G1
FB
PR150 *4.7_6 +
*SHORT_PAD_4 71.5K/F_4
7
10
13
PR153 VSA_DL 4 PC37 PC120

0.1u/50V_6 560u/2.5V_6X5.7
*SHORT_PAD_4
PQ25 PC34
3
2
1
AON7702 *680p/50V_6
VCCSA_SEL0
TP50
6 VCCSA_SEL
PR149 *Short_4
VSA_FB
6 VCCSA_SENSE
B B
PR147
100_4
B24 PR149 change from 0 ȍ to short pad. 5/18
PR141 PR142
1K_4 1K_4
OCP=7A
Iripple=(19-0.9)*0.9/(2.2u*300K*19)
=1.299A
A Rth=14mohm*8*(7-0.65)/10uA A
=71.125K
Ipeak=8.299A
PROJECT : ZQR
1A
+VCCSA(RT8241A)
5 4 3 2 1
5 4 3 2 1
+3VPCU
RT8223M input power change to +3V_S5 1.76A
+1.8V +1.8V
1.8 Volt +/- 5%
B16 PC129
TDC : 1.31A B15 Del JP14, connect to +1.8V. 5/18
D Del JP6, connect to +3VPCU. 5/18 10u/6.3V_8 PC131 PEAK : 1.75A D
0.1u/25V_6 PU3 HPA00835RTER
16 VIN PH 10
Width : 60mil
1 11 PL10
VIN PH 1uH_7X7X3
Change p/n
2 VIN PH 12
PR68
MAINON 15 13 PR64 *Short_6
*SHORT_PAD_4 EN BOOT
54418-1.8_VFB 6 14 PC52
VSNS PW RGD B27 0.1u/50V_6 PR60
R1
PR64 change from 0 ȍ to short pad. 5/18
7 3 100K/F_4 PC133 PC128
COMP GND PC127 10u/6.3V_8 10u/6.3V_8
PR66 PC53 8 4 0.1u/10V_4
RT/CLK GND HWPG_1.8V 27
*100K/F_4 1000p/50V_4
PAD
PAD
PAD
PAD
PAD
PAD
9 SS AGND 5 PR65
PR61 PR63
100K/F_4
15K/F_4 182K/F_4 +3V 54418-1.8_VFB
22
21
20
19
18
17
PC51 R2 PR62
0.01u/25V_4 78.7K/F_4
PC49 PC50
*100p/50V_4 1200p/50V_4
V0=0.8*(R1+R2)/R2
C C
For EC control thermal protection (output 3.3V)

VIN
PU7B
LM393
5 +
PD5 7
SW1010CPT 6 -
VIN +3V +5V +0.75V_DDR_VTT +1.5V +1.8V +15V

PR166
Thermal protection 1M_6
1
PQ40 PR104 PR94 PR95 PR97 PR96 PR98 PR99

AO3409 1M_4 22_8 22_8 22_8 22_8 *22_8 1M_4
2
MAINON_ON_G MAIND
4,6 MAINON_ON_G MAIND 6,29,32
3
3
B B
3
3
S5_ON 2
27,29 S5_ON
PR108
2 PQ19 1M_4 2 2 2 2 2 2
PQ35 PR165 27,31,32 MAINON DTC144EU PC73
1
DTC144EU *SHORT0603 PQ13 PQ14 PQ16 PQ15 PQ17 PQ18 *2.2n/50V_4

DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 *DMN601K-7 DMN601K-7
1
PR101
1
VL VL *100K/F_6
SYS_SHDN# 4,29
Need fine tune
for thermal protect point PR161
200K_6
PR159 PC126
PR158 200K/F_4 0.1u/50V_6
3
1.54K/F_4
8
PR169
10K_6_NTC 2.469V 3
+
1 2
2 - PQ33
3
PU7A DMN601K-7
4
Note placement position LM393 PC125

1
0.1u/50V_6
S5_ON 2
PR160
PQ34 200K/F_4
DMN601K-7
A A
1

PROJECT : ZQR
1A
Discharge/1.8V)
5 4 3 2 1 7/7 modify
5 4 3 2 1
Model
REV
2011/05/11
CHANGE LIST schematic-laptop.blogspot.com
B01 remove PR22 from BOM for power up issue.
B02 L5,L8,L10 Change PN to CX8BA470003.
ZQR MB
2011/05/16
B03 Change net closed to Audio Codec PCBEEP netname to BEEP_2
2011/05/17
B B04 Change L6,L7,L9 to 0ȍ, remove C76,C96,C121 for CRT Test.
B05 Add R409, remove U5, C142 for saving cost.
D D
B06 Change Bottom side 0ȍ to short pad for cost and SMT cycle time issue;
R284,R295,R296,R392,R395,R401,R402,R403,R404,R408.
B07 Remove R178 short pad, connect to +5V_S5.
B08 Change "+VIN_VCC_CORE" net to Vin.
B09 Del JP1,JP13, connect to Vin, del "+VIN_VCC_CORE" netname.
B10 Del JP3, connect to Vin. Del "VCC_GT_VIN" netname.
B11 Del JP9,JP10 connect to Vin.
B12 Del JP11, connect to +3VPCU.
B14 PQ23ˣPQ24 change symbol from N-MOS to P-MOS
2011/05/18
B15 Del JP14, connect to +1.8V.
B17 Del JP2, connect to VIN, del "VSA_VIN" Netname.
B18 Del JP4, connect to +VCCSA, del "VSA_SRC" Netname.
B19 Del JP15, connect to +1.05V_VTT.
B20 Del JP5, connect to +1.5VSUS, del "+1.5VSUS_SRC" Netname.
B21 Del JP7,JP8 connect to VIN.
B22 Change "+1.5VSUS_SRC" Netname to "+1.5V_SUS".
B23 Mount C70, C71 for +Vcc_core overshoot issue.
B24 PR29,PR30,PR35,PR37,PR41,PR46,PR93,PR120,PR128,PR132,PR149(0_4) change from 0ohm to short-pad.
B25 PR178(0_6) change from 0ohm to short-pad.
B26 R114,R197,R206(0_4) change from 0ohm to short-pad.
B27 L11,PR64,PR73,PR75,R96,R97,R98,R99,R133,R168(0_6) change from 0ohm to short-pad.
C C
2011/05/19
B28 Page 20 +1.5V_SUS mount C149,C182,C160,C175,C249,C250,C257,C445,C444 Cap for EMI
B29 Page 20 +3V C347,C341,C55,C303,C449,C275,C453,C459 Change to 100PF for EMI.
B30 Page 20 +5V C496,C437,C460,C232,C304,C454 change 100PF for EMI.
B31 Page 20 +5V_S5 C489,C289 change 100PF for EMI.
B32 Page 20 +VCC_CORE C47 change 100PF for EMI.
B33 KB Cap CP1,CP2,CP3,CP4,CP5,CP6 change to 220 PF and phase into BOM list for EMI.
B34 BOT layer +VCC_GFX add 100pf x 3 C499,C500,C501 for EMI.
B35 BOT layer +1.8V Add 100pF X2 C502,C503 for EMI.
B36 TOP layer +1.8V Add 100pF X2 C506,C507 for EMI.
B37 TOP layer +1.5V Add 100pF X2 C504,C505 for EMI.
B38 USB C.M Chock L12,L13,L14 Phase into BOM list, cancel 0ȍ R166,R167,R174,R175,R201,R202 for EMI.
B39 PR4 4.7ohm / PC5 1000pf phase into BOM list for EMI.
B40 Change R386 from 22ȍ to short pad.
B41 Add a MOSFET Q26,R410,R412 to separate CODE SYNC and PCH Strap signal to avoid leakage issue.
B42 Change R216,R221 from 56ȍ to 47ȍ for ACER SPEC.
B43 Change 0ȍ R5,R6,R210,R211,R225,R230 to short pad, remove CMC L1,L15,L20 for SMT.
B44 Change CMC L12,L13,L14 PN from "DC09004A014" to "CX1HN900000".
B45 Remove C315 for cost issue.
2011/05/20
B46 R392,R197 change from short pad to 0ȍ.
B47 Del short pad R114, connect to PCIE_CLKREQ_LAN#.
B48 Del short pad R206, connect to MIC1-VREFO-L.
B49 Del short pad R284, connect to ME_WR#.
B
B50 Del short pad R401, connect to PLTRST#. B
B51 Del short pad R403, connect to HP_MUTE#.

B52 Del short pad R386, del netname ACZ_SDIN0_R, connect to ACZ_SDIN0.
B53 Del short pad R133,R168, connect to GND.
B54 Del C442.
2011/05/23
B55 PR139 changes from 1.33Kohm(CS21332FB11) to 1.58Kohm(CS21582FB00).
B56 PR130 changes from 2.55Kohm(CS22552FB01) to 2.49Kohm(CS22492BB00).
B57 PC99ˣPC103 change from 33nf(CH3334K1B00) to 0.1uf(CH4104K9B03).
A 3C A

PROJECT : ZQR DOC NO. PROJECT MODEL : ZQR APPROVED BY: DATE: 2011/05/09
1A
Change list PART NUMBER: DRAWING BY: REVISON: 1A
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5 4 3 2 1

intel ISL88731 P28

<MCH Processor> 3/5V SYS PWR

DDR SYSTEM MEMORY

FDI interface X4 DMI interface +1.8V Thermal protect

HDD (SATA) P0 SATA0 FDI CLK DMI INT_CRT

P1 USB 2.0 USB

Int. MIC ALC271X-VB3 Transformer

+15V +15V CHARGE PUMP POWER ALWAYS ALWAYS

+3V_S5 +3.3V LAN/BT/CIR POWER S5_ON S0-S5 CPU 3V/5 V

+5V +5V HDD/ODD/Codec/TP/CRT/HDMI POWER MAINON S0

+3V +3.3V PCH/GPU/Peripheral component POWER MAINON S0

+VGFX_AXG variation Internal GPU POWER GFX_ON S0

B +1.5V +1.5V MINI CARD/NEW CARD POWER MAINON S0 B

+1.05V +1.05V PCH CORE POWER MAINON S0

+VCC_CORE variation CPU CORE POWER VRON S0

LCDVCC +3.3V LCD POWER LVDS_VDDEN S0

+5V_GPU +5V SWITCHABLE PWM IC POWER dGPU_PWR_EN# Discrete enable

+GPU_CORE +0.9V~+1.1V GPU CORE POWER +3V_D Discrete enable

+GPU_IO +0.9V~+1.1V GPU I/O POWER PG_GPUIO_EN Discrete enable

+1.5V_GPU +1.5V VRAM CORE POWER PG_1.5V_EN Discrete enable

+1.8V_GPU +1.8V GPU_CRE/LVDS/PLL POWER +1.5V_GPU Discrete enable

+1V +1V DP/PEG POWER PG_1V_EN Discrete enable

Quanta Computer Inc.

+3V_S5 +3V_S5 +3VPCU +3VPCU

intel 2.2Kȍ 2.2Kȍ 10Kȍ 10Kȍ

Quanta Computer Inc.

PCI EXPRESS* - GRAPHICS

8 FDI_TXN3 F18 FDI0_TX#[3] PEG_RX[6] G31

JTAG & BPM

DP & PEG Compensation +1.05V_VTT +1.05V_VTT

XDP_TCLK R286 51_4

DDR SYSTEM MEMORY B

SA_DQ[30] SA_ODT[1] M_A_ODT1 14 SB_DQ[30] SB_ODT[1] M_B_ODT1 15

14,15 DDR3_DRAMRST# R162 1K/F_4 CD_DRAMRST# 3 1 CPU_DRAMRST# 4

PEG AND DDR

DDR3 -1.5V RAILS

Y35 AH17 J26 C44 C62 C359 + C335

R28 R249 100/F_4 +VCC_CORE 6 3

Sandy Bridge Processor (GND) schematic-laptop.blogspot.com

AN16 VSS40 VSS120 AE26 L1 VSS198 VSS271 B13 RSVD49 B35

Quanta Computer Inc.

Digital Display Interface

AF39 LVDSB_CLK DDPC_AUXN AP47

PCH Pull-high/low(CLG) System PWR_OK(CLG) +3V_RTC

R337 *1K_4 PCIE_WAKE# R329 10K_4 U5 5

U6 2 R310 On Die DSW VR Enable

AC_PRESENT R83 10K_4 TC7SH08

Pin Name Strap description Sampled Configuration

R338 R124 R125 +3V R266 *1K_4

R102 3.3K_4 REV: B modify footprint

PIRQB# USBP7P 19 CLKREQ_WLAN# PCIECLKRQ2# / GPIO20 CLKIN_DMI_P

REQ1# / GPIO50 USBP9P USBP9+ 25 TP19 CLKOUT_PCIE3P CLKIN_GND1_P

CLK_REQ/Strap Pin(CLG) SMBus/Pull-up(CLG)

C440 +3V_S5 +3V

+3V R142 10K_4 PCIE_CLKREQ_PEG#

TC7SH08FU R364 dGPU_PWM_SELECT# 6 5 CLK_BUF_BCLKN R294 10K_4 3 1 SMB_ME1_DAT SMB_PCH_DAT 3 1

Date: Monday, May 23, 2011 Sheet 10 of 35

TP111 C10 +3V_S5

9 PLL_ODVR_EN PLL_ODVR_EN P8 +3V_S5

FDI_OVRVLTG R122 *10K/F_4 DMI_OVRVLTG R128 *200K/F_4 BIOS_REC R134 10K_4

Date: Monday, May 23, 2011 Sheet 11 of 35

+VCCA_DAC_1_2 +3V U13J POWER R62 *short_8

FDI_OVRVLTG R122 10K/F_4 DMI_OVRVLTG R128 200K/F_4 BIOS_REC R134 10K_4

56p/4 56p/4 D17 1SS355 HWPG