Instructions

Febrero 2013

Tek
Instructions: Language of the Computer

Introduction
Application
programs
Software
• Architecture:
the programmer’s view of the Operating
device drivers
Systems
computer
instructions
– Defined by instructions (operations) Architecture
registers
and operand locations
Micro- datapaths
architecture controllers

adders
Logic
memories

Digital AND gates

Circuits NOT gates

Analog amplifiers
Circuits filters

transistors
Devices
diodes

Physics electrons
Instructions: Language of the Computer

Overview

• We will be working with the MIPS instruction set architecture

– Similar to other architectures developed since the 1980's

• MIPS Technologies is a leading provider of industry-standard

processor architectures and cores for:
– home entertainment,
– networking,
– mobile
– embedded applications.

• The MIPS architecture is used by

– NEC, Nintendo, Cisco, Sony, …
Instructions: Language of the Computer

MIPS Hello World

# PROGRAM: Hello, World!

.data # Data declaration section

str: .asciiz "\nHello, World!\n"

.text # Assembly language instructions

main: # Start of code section

li $v0, 4 # system call code for printing string = 4
la $a0, str # load address of string to be printed into $a0
syscall # call operating system to perform operation in $v0
# syscall takes its arguments from $a0, $a1, ...

• This illustrates the basic structure of an assembly language

program.
– data segment and text segment
– use of label for data object (which is a zero-terminated ASCII
string)
– use of registers
– invocation of a system call
Instructions: Language of the Computer

Program Execution Termination

• Unlike the high-level languages you are accustomed to, MIPS
assembly does not include an instruction, or block syntax, to
terminate the program execution.

• MIPS program execution can be terminated by making a

system call:

# Exit

li $v0, 10 # system call code for exit

syscall # make the system call to exit

• Without such code, the system could attempt to continue

execution into the memory words that followed the final
instructions of the program. That rarely produces graceful
results.
Instructions: Language of the Computer

Program Termination
• Unlike the high-level languages you are accustomed to,
assembly does not include a block syntax to indicate the
program termination.

• MIPS programs can be terminated by using:

# Program ends

.end #

• Without such code, the assembler could attempt to continue

assembling instructions.
Instructions: Language of the Computer
MIPS Register Names

• MIPS assemblers support standard symbolic names for the general-purpose registers:

Name Register Number Usage

$0 0 the constant value 0
$at 1 reserved assembler temporary
$v0-$v1 2-3 procedure return values
$a0-$a3 4-7 procedure arguments
$t0-$t7 8-15 temporaries
$s0-$s7 16-23 saved variables
$t8-$t9 24-25 more temporaries
$k0-$k1 26-27 reserved for OS kernel
$gp 28 global pointer
$sp 29 stack pointer
$fp 30 frame pointer
$ra 31 procedure return address
Instructions: Language of the Computer
MIPS arithmetic

• All arithmetic and logical instructions have 3 operands

• Operand order is fixed (destination first):

<opcode>   <dest>, <leftopnd>, <rightopnd>

Example:

C code: a = b + c;

MIPS code: add $s0, $s1, $s2

“The natural number of operands for an operation like addition

is three… requiring every instruction to have exactly three
operands, no more and no less, conforms to the philosophy of
keeping the hardware simple”
Instructions: Language of the Computer
Basic MIPS Arithmetic Instructions

• Here are the most basic arithmetic instructions:

add $rd, $rs, $rt Addition with overflow
GPR[rd] ← GPR[rs] + GPR[rt]
div $rs, $rt Division with overflow
$lo ← GPR[rs] / GPR[rt]
$hi ←
GPR[rs] % GPR[rt]
mul $rd, $rs, $rt Multiplication without overflow
GPR[rd] ← (GPR[rs] * GPR[rt])[31:0]
sub $rd, $rs, $rt Subtraction with overflow
GPR[rd] ← GPR[rs] - GPR[rt]

• Instructions with overflow will generate a runtime exception if

the computed result is too large to be stored correctly in 32
bits.
• There are also versions of some of these that essentially
ignore overflow, like addu.
Instructions: Language of the Computer
Multiplication, Division

• Special registers: lo, hi

• 32 × 32 multiplication, 64 bit result

– mult $s0, $s1 
– Result in {hi, lo}

• 32-bit division, 32-bit quotient, 32-bit remainder

– div $s0, $s1
– Quotient in lo
– Remainder in hi

• Moves from lo/hi special registers

– mflo $s2
– mfhi $s3
Instructions: Language of the Computer
Shift Instructions

• sll: shift left logical

Example: sll $t0, $t1, 5  # $t0 <= $t1 << 5

• srl: shift right logical

Example: srl $t0, $t1, 5  # $t0 <= $t1 >> 5

• sra: shift right arithmetic

Example: sra $t0, $t1, 5  # $t0 <= $t1 >>> 5

Variable shift instructions:

• sllv: shift left logical variable

Example: sllv $t0, $t1, $t2 # $t0 <= $t1 << $t2
• srlv: shift right logical variable
Example: srlv $t0, $t1, $t2 # $t0 <= $t1 >> $t2
• srav: shift right arithmetic variable
Example: srav $t0, $t1, $t2 # $t0 <= $t1 >>> $t2
Instructions: Language of the Computer
Limitations and Trade-offs

Design Principle: simplicity favours regularity.

• Of course this complicates some things...

C code: a = b + c + d;

MIPS code: add $t0, $s1, $s2

add $s0, $t0, $s3

• Operands must be registers, only 32 registers provided

• Each register contains 32 bits

Design Principle: smaller is faster.

• Why?
Instructions: Language of the Computer
Immediates

• In MIPS assembly, immediates are literal constants.

• Many instructions allow immediates to be used as parameters.

addi    $s0, $s1, 42  # note the opcode
li      $s0, 42       # actually a pseudo­instruction

• Note that immediates cannot be used with all MIPS assembly

instructions; refer to your MIPS reference card.

• Immediates may also be expressed in hexadecimal: 0x2A

Design Principle: make the common case fast.

Instructions: Language of the Computer
Generating Constants
• 16-bit constants using addi:
C code: int a = 0x4F3C; // int is a 32­bit sword
MIPS code: addi $s0, $0, 0x4F3C
• 32-bit constants using load upper immediate (lui) and ori:
(lui loads the 16-bit immediate into the upper half of the register
and sets the lower half to 0.)
C code: int a = 0xFEDC8765;
MIPS code: lui  $s0, 0xFEDC
            ori  $s0, $s0, 0x8765
MIPS pseudo-instruction (uses $at register):
            li   $s0, 0xFEDC8765

            lui  $at, 0xFEDC
            ori  $s0, $at, 0x8765
Instructions: Language of the Computer
MIPS Logical Instructions

• Logical instructions also have three operands and the same

format as the arithmetic instructions:

<opcode>   <dest>, <leftopnd>, <rightopnd>

• Examples:

and   $s0, $s1, $s2   # bitwise AND
andi  $s0, $s1, 42
or    $s0, $s1, $s2   # bitwise OR
ori   $s0, $s1, 42
nor   $s0, $s1, $s2   # bitwise NOR (i.e., NOT OR)
sll   $s0, $s1, 10    # logical shift left
srl   $s0, $s1, 0x0A  # logical shift right
Instructions: Language of the Computer
Registers vs. Memory

• Arithmetic instructions operands must be registers,

– only 32 registers provided
• Compiler associates variables with registers
• What about programs with lots of variables

Control Input
Memory
Datapath Output

Processor I/O
Instructions: Language of the Computer
Memory Organization

• Viewed as a large, single-dimension array, with an address.

• A memory address is an index into the array
• Byte addressing means that the index points to a byte of
memory.

0 8 bits of data

1 8 bits of data

2 8 bits of data

3 8 bits of data

4 8 bits of data

5 8 bits of data

6 8 bits of data

.
.
.
Instructions: Language of the Computer
Memory Organization

• Bytes are nice, but most data items use larger words
• For MIPS, a word is 32 bits or 4 bytes.

0 32 bits of data

4 32 bits of data
Registers hold 32 bits of data
8 32 bits of data

12 32 bits of data

.
.
.
• 232 bytes with byte addresses from 0 to 232-1
• 230 words with byte addresses 0, 4, 8, ... 232-4
• Words are aligned
– i.e., what are the least 2 significant bits of a word address?
Instructions: Language of the Computer
MIPS Load and Store Instructions

• Transfer data between memory and registers

Example:
C code: A[12] = h + A[8];

MIPS code: lw    $t0, 32 ($s3)   # $t0 ← Mem[$s3+32]

add   $t0, $s2, $t0
sw    $t0, 48 ($s3)   # Mem[$s3+48] ← $t0

• Can refer to registers by name (e.g., $t0, $s3) instead of number

• Load specifies destination first: lopn <dest>, <src_addr>

• Store specifies destination last: sopn <src>, <dest_addr>

• Remember arithmetic operands are registers or immediates, not memory!

– Can not write: add   48($s3), $s2, 32($s3)

Design Principle: good design demands good compromises.

Instructions: Language of the Computer
Addressing Modes

• In register mode the address is simply the value in a register:

lw    $t0, ($s3)

• In immediate mode the address is simply an immediate value in the instruction:

lw    $t0, 0    # almost always a bad idea

• In base + register mode the address is the sum of an immediate and the value in a
register:

lw    $t0, 100($s3)

• There are also various label modes:

lw    $t0, absval
lw    $t0, absval + 100
lw    $t0, absval + 100($s3)
Instructions: Language of the Computer
Addressing Modes
Instructions: Language of the Computer
Branching

• Allows a program to execute instructions out of sequence.

• Types of branches:
– Conditional branches
• branch if equal (beq)
• branch if not equal (bne)
– Unconditional branches
• jump (j)
• jump register (jr)
• jump and link (jal)

• These are useful for building loops and conditional control structures.
Instructions: Language of the Computer
Instruction Formats

R-Type
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

I-Type
op rs rt imm
6 bits 5 bits 5 bits 16 bits
J-Type
op addr
6 bits 26 bits
Instructions: Language of the Computer
The Power of the Stored Program

• 32-bit instructions and data stored in memory

• Sequence of instructions: only difference between two applications (for example, a

text editor and a video game)

• To run a new program:

– No rewiring required
– Simply store new program in memory

• The processor hardware executes the program:

– fetches (reads) the instructions from memory in sequence
– performs the specified operation

• The Program Counter (PC) keeps track of the current instruction

• In MIPS, programs typically start at memory address 0x00400000

Instructions: Language of the Computer
The Stored Program
Assembly Code Machine Code
lw $t2, 32($0) 0x8C0A0020
add $s0, $s1, $s2 0x02328020
addi $t0, $s3, -12 0x2268FFF4
sub $t0, $t3, $t5 0x016D4022

Stored Program
Address Instructions

0040000C 0 1 6 D4 0 2 2
00400008 2 2 6 8 F F F 4
00400004 0 2 3 2 8 0 2 0
00400000 8 C0 A0 0 2 0 PC

Main Memory
Further Reading
• PATTERSON, David A.; HENNESSY, John L. Computer
Organization and Design: The Hardware/Software Interface.
Fourth Edition, Revised Printing. Morgan Kaufmann, 2011.
Chapter 2.

• PATTERSON, David A.; HENNESSY, John L. Computer

Organization and Design: The Hardware/Software Interface.
Fourth Edition. Morgan Kaufmann, 2009. Chapter 2.

• PATTERSON, David A.; HENNESSY, John L. Computer

Organization and Design: The Hardware/Software Interface.
Third Edition, Revised Printing. Morgan Kaufmann, 2007.
Chapter 2.

• PATTERSON, David A.; HENNESSY, John L. Computer

Organization and Design: The Hardware/Software Interface.
Third Edition. Morgan Kaufmann, 2005. Chapter 2.

Some of this material has been adapted from slides prepared by

Jason Bakos, University of South Carolina; William D McQuain,
Virginia Tech