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A B C D E 1 1 Compal Confidential 2 2 Cougar 2.0 Schematics Document
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1
1
Compal Confidential
2
2
Cougar 2.0
Schematics Document
Intel Cedar Trail Processor/ Tiger point
2011-11-07
3
3
LA-6859P REV:1.0
4
4
Security Classification
Security Classification
Security Classification
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
2010/06/27
2010/06/27
2010/06/27
2011/6/27
2011/6/27
2011/6/27
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
SCHEAMTIC A6859
SCHEAMTIC A6859
SCHEAMTIC A6859
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
Custom
Custom
B
B
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4019EG
4019EG
4019EG
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Date:
Date:
Thursday, November 17, 2011
Thursday, November 17, 2011
Thursday, November 17, 2011
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A B C D E Compal Confidential Model Name : Cougar 2.0 Project Code :
A
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Compal Confidential
Model Name : Cougar 2.0
Project Code : QBU00
1
Fan Control
Low Power Clock Generator
1
page 26
RTM890N-397
page 9
CRT Conn.
RGB
page 15
Intel Cedarview 2 Core
1.86GHz (6.5W)
204pin DDRIII-SO-DIMM
Memory BUS(DDRIII)
HDMI Conn.
HDMI
page 10
page 16
(22x22mm)
1.5V DDRIII 1066MHz
LVDS
page 6,7,8
LED Conn.
page 17
ONE CHANNEL
DMI x 2
2
2
PCIeMini Card
WWAN
PCIe port 3
USB Conn X3
Int. Camera
(FULL)
USB port 5
page 18
USB
USB
USB port 0,1,4
USB port 7
5V 480MHz
5V 480MHz
page 19
page 17
PCIeMini Card
WLAN +BT COMBO
PCIe 1x [2]
Tiger Pointer
(HALF)
1.5V 2.5GHz(250MB/s)
Card Reader
PCIe port 2
USB port 6
USB
Card Reader Conn.
page 18
5V 480MHz
RTL5137
page 24
USB port 3
page 24
PCIe 1x
(17x17mm)
RJ45
RTL8105E
1.5V 2.5GHz(250MB/s)
SATA port 0
SATA HDD
page 23
10/100 LAN
5V 1.5GHz(150MB/s)
page 20
PCIe port 1
page 23
page 11,12,13,14
3
3
RTC CKT.
SPI ROM
page 13
HD Audio
3.3V 24.576MHz/48Mhz
2MB
page 26
DC/DC Interface CKT.
HDA Codec
ALC269
page 28
page 21
ENE KB930 E0
page 25
Power Circuit DC/DC
Int.
page 29~35
MIC CONN
MIC CONN
HP CONN
SPK CONN
page 21
page 22
page 22
page 22
Touch Pad
Int.KBD
SPI ROM 128KB
(10A 1X) (10B 2X)
page 27
page 27
page 26
4
Power/B page 27
4
Security Classification
Security Classification
Security Classification
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
2010/06/27
2010/06/27
2010/06/27
2011/6/27
2011/6/27
2011/6/27
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
SCHEAMTIC A6859
SCHEAMTIC A6859
SCHEAMTIC A6859
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
B
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4019EG
4019EG
4019EG
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Date:
Date:
Thursday, November 17, 2011
Thursday, November 17, 2011
Thursday, November 17, 2011
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LPC BUS
3.3V 33 MHz
A B C D E Voltage Rails SIGNAL 1 1 STATE SLP_S3# SLP_S4# SLP_S5# +VALW
A
B
C
D
E
Voltage Rails
SIGNAL
1
1
STATE
SLP_S3#
SLP_S4#
SLP_S5#
+VALW
+V
+VS
Clock
Power Plane
Description
S1
S3
S5
G3
Full ON
HIGH
HIGH
HIGH
ON
ON
ON
ON
VIN
Adapter power supply (19V)
ON
ON
ON
OFF
B+
AC or battery power rail for power circuit.
ON
ON
ON
ON
S1(Power On Suspend)
HIGH
HIGH
HIGH
ON
ON
ON
LOW
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
OFF
S3 (Suspend to RAM)
LOW
HIGH
HIGH
ON
ON
OFF
OFF
+GFX_CORE
GFX support voltage
ON
OFF
OFF
OFF
+0.75VS
0.75V switched power rail for DDR terminator
ON
OFF
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
HIGH
ON
OFF
OFF
OFF
+1.05VS
VCCP switched power rail
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
ON
OFF
OFF
OFF
+1.5VS
1.5V switched power rail
ON
OFF
OFF
OFF
+1.5V
1.5V power rail for DDR
ON
ON
OFF
OFF
+1.8VS
1.8VS switched power rail
ON
OFF
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON
OFF
+3V_LAN
3.3V power rail for LAN
ON
ON
OFF
OFF
BTO Option Table
+3V_WLAN
3.3V power rail for LAN
ON
OFF
OFF
OFF
2
+3VS
3.3V switched power rail
ON
OFF
OFF
OFF
2
+5VALW
5V always on power rail
ON
ON
ON
OFF
Function
Mini PCI-E SLOT
Display
Clock gen
+5VS
5V switched power rail
ON
OFF
OFF
OFF
description
+VSB
VSB always on power rail
ON
ON
ON
OFF
+RTCVCC
RTC power
ON
ON
ON
ON
explain
Wi-Fi
WWAN
3G
CRT
HDMI
Tpye
+3VS_PRIME
3.3V power rail for CPU and PCH
ON
OFF
OFF
OFF
BTO
WLAN@
WWAN@
3G@
CRT@
HDMI@
low@
normal@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
3
3
EC SM Bus1 address
EC SM Bus2 address
Device
Address
Device
Address
Smart Battery
0001 011X b
EMC1402
1001 010X b
NM10 SM Bus address
Device
Address
Clock Generator
1101
001Xb
(SLG8SP556VTR)
DDR DIMMA
1010
000Xb
WWAN/WLAN
4
4
Security Classification
Security Classification
Security Classification
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
2010/06/27
2010/06/27
2010/06/27
2011/6/27
2011/6/27
2011/6/27
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
SCHEAMTIC A6859
SCHEAMTIC A6859
SCHEAMTIC A6859
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
Custom
Custom
B
B
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4019EG
4019EG
4019EG
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Date:
Date:
Thursday, November 17, 2011
Thursday, November 17, 2011
Thursday, November 17, 2011
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D D C C B B A A Security Classification Security Classification Security Classification Compal
D
D
C
C
B
B
A
A
Security Classification
Security Classification
Security Classification
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
2010/06/27
2010/06/27
2010/06/27
2011/6/27
2011/6/27
2011/6/27
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
SCHEAMTIC A6859
SCHEAMTIC A6859
SCHEAMTIC A6859
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
B
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4019EG
4019EG
4019EG
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Date:
Date:
Thursday, November 17, 2011
Thursday, November 17, 2011
Thursday, November 17, 2011
Sheet
Sheet
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5 4 3 2 1 Cougar Power Map B+ DESIGN CURRENT 250mA Ipeak=6.97A, Imax=4.88A +3VALWP
5
4
3
2
1
Cougar Power Map
B+
DESIGN CURRENT 250mA
Ipeak=6.97A, Imax=4.88A
+3VALWP +-5%
DESIGN CURRENT 522mA
TPS51125ARGER
** The SW just is reserved.
The power passes by jump or
0-ohm resistor.
WOL_EN#
** P-CHANNEL
+3V_LAN
AO3413
DESIGN CURRENT 300mA
D
D
Ipeak=3.98A, Imax=2.8A
+5VALWP +-5%
DESIGN CURRENT 3010mA
SUSP
N-CHANNEL
+5VS
DESIGN CURRENT 2286mA
SI7326DN
VGATE
+1.8VS
APL5930KA
DESIGN CURRENT 151mA
C
C
SUSP
+3VS
N-CHANNEL
DESIGN CURRENT 5586mA
SI7326DN
ENVDD
P-CHANNEL
+LCD_VDD
AO3413
DESIGN CURRENT 2000mA
VGATE#
+3VS_PRIME
N-CHANNEL
DESIGN CURRENT 294mA
SUSP#
SI7326DN
SY8033BDBC
Ipeak=1.308A, Imax=4A
+1.05VSP +-5%
DESIGN CURRENT 3489mA
VR_ON
Imax=3.5A
DESIGN CURRENT 4500mA
+CPU_COREP
B
B
RT8165BGQW
DESIGN CURRENT 2000mA
+GFX_COREP
SYSON
Ipeak=19.6A, Imax=13.72A
+1.5VP +-5%
DESIGN CURRENT 2270mA
G5603RU1U
SUSP#
DESIGN CURRENT 2112mA
+1.5VSP
SI7326DN
SUSP
+0.75VSP
G2992F1U
DESIGN CURRENT 500mA
A
A
Security Classification
Security Classification
Security Classification
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
2010/06/27
2010/06/27
2010/06/27
2011/6/27
2011/6/27
2011/6/27
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
SCHEAMTIC A6859
SCHEAMTIC A6859
SCHEAMTIC A6859
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
Custom
Custom
B
B
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4019EG
4019EG
4019EG
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Date:
Date:
Thursday, November 17, 2011
Thursday, November 17, 2011
Thursday, November 17, 2011
Sheet
Sheet
Sheet
5
5
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38
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4
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5 4 3 2 1 N2800@ N2800@ <10> DDR_A_MA[0 15] U1 U1 QB0Y B2 1.86G
5
4
3
2
1
N2800@
N2800@
<10> DDR_A_MA[0 15]
U1
U1
QB0Y B2 1.86G
QB0Y B2 1.86G
<10> DDR_A_DQS#[0 7]
<10> DDR_A_DM[0 7]
N2600@
N2600@
<10> DDR_A_DQS[0 7]
U1B
U1B
U1A N2600@
U1A N2600@
? ?
CEDARVIEW
CEDARVIEW
<10> DDR_A_D[0 63]
DDR_A_MA0
DDR_A_D0
CEDARVIEW
CEDARVIEW
AK14
Y30
DDR3_MA0
DDR3_DQ0
DDR_A_MA1
DDR_A_D1
AK16
Y29
DDR3_MA1
DDR3_DQ1
REV = 1.10
REV = 1.10
DDR_A_MA2
AJ14
REV = 1.10
REV = 1.10
DDR_A_D2
AC30
DDR3_MA2
DDR3_DQ2
DMI_RXP0_C
DDR_A_MA3
DDR_A_D3
L3
K6
AJ16
AC31
DMI_TXP0 <12>
DMI_RXP0
DMI_TXP0
DDR3_MA3
DDR3_DQ3
DMI_RXN0_C
DDR_A_MA4
DDR_A_D4
L2
K5
AK18
W31
DMI_TXN0 <12>
DMI_RXN0
DMI_TXN0
DDR3_MA4
DDR3_DQ4
D
DMI_RXP1_C
DDR_A_MA5
DDR_A_D5
D
M3
L5
AH18
W28
DMI_TXP1 <12>
DMI_RXP1
DMI_TXP1
DDR3_MA5
DDR3_DQ5
DMI_RXN1_C
DDR_A_MA6
DDR_A_D6
M2
L6
AJ18
AB28
DMI_TXN1 <12>
DMI_RXN1
DMI_TXN1
DDR3_MA6
DDR3_DQ6
DDR_A_MA7
DDR_A_D7
N2
L9
AK20
AB30
DMI_RXP2
DMI_TXP2
DDR3_MA7
DDR3_DQ7
DDR_A_MA8
DDR_A_D8
N1
L8
AJ20
AA24
DMI_RXN2
DMI_TXN2
DDR3_MA8
DDR3_DQ8
DDR_A_MA9
DDR_A_D9
P2
N5
AH20
AA22
DMI_RXP3
DMI_TXP3
DDR3_MA9
DDR3_DQ9
DDR_A_MA10
DDR_A_D10
P3
N6
AJ12
AE27
DMI_RXN3
DMI_TXN3
DDR3_MA10
DDR3_DQ10
+1.5VS
DDR_A_MA11
DDR_A_D11
AK21
AE26
DDR3_MA11
DDR3_DQ11
DDR_A_MA12
DDR_A_D12
N9
R8
AJ21
AB27
<9> CLK_CPU_EXP
DMI_REFCLKP
RSVD_TP_R8
T1T1
R493
R493
DDR3_MA12
DDR3_DQ12
DDR_A_MA13
DDR_A_D13
N8
R7
AJ8
AA25
<9> CLK_CPU_EXP#
DMI_REFCLKN
RSVD_TP_R7
DDR3_MA13
DDR3_DQ13
DMI_REF1P5
T2T2 DMI_IRCOMP
DMI_REF1P5
DDR_A_MA14
DDR_A_D14
2
1
T2
T1
1
2
AH22
AD25
DMI_REF1P5
DMI_RCOMP
DDR3_MA14
DDR3_DQ14
R973
R973
0_0402_5%
0_0402_5%
DDR_A_MA15
DDR_A_D15
AJ22
AD27
DDR3_MA15
DDR3_DQ15
7.5K_0402_5%
7.5K_0402_5%
DDR_A_D16
1
AD29
DDR3_DQ16
+1.5V pull up must be placed
DDR_A_WE#
DDR_A_D17
AH10
AE29
<10> DDR_A_WE#
DDR3_WE#
DDR3_DQ17
1
1
OF 6
OF 6
DDR_A_CAS#
DDR_A_D18
AJ10
AJ30
within 500 mils from Cedarview
<10> DDR_A_CAS#
DDR3_CAS#
DDR3_DQ18
DDR_A_RAS#
DDR_A_D19
AJ11
AK29
QB0Z B2 1.6G
QB0Z B2 1.6G
<10> DDR_A_RAS#
2
DDR3_RAS#
DDR3_DQ19
? ?
DDR_A_D20
AD28
DDR3_DQ20
DDR_A_BS0
DDR_A_D21
AK12
AD30
<10> DDR_A_BS0
DDR3_BS0
DDR3_DQ21
DDR_A_BS1
DDR_A_D22
AH13
AG30
<10> DDR_A_BS1
DDR3_BS1
DDR3_DQ22
+1.5V pull up must be placed
within 500 mils from Cedarview
DDR_A_BS2
DDR_A_D23
AK22
AJ29
<10> DDR_A_BS2
DDR3_BS2
DDR3_DQ23
DDR_A_D24
AE24
DDR3_DQ24
DDR_A_D25
AH12
AG24
DDR3_CS#0
DDR3_DQ25
DDR_A_D26
AH8
AD22
DDR3_CS#1
DDR3_DQ26
DDR_CS2#
DDR_A_D27
AK11
AC21
<10> DDR_CS2#
DDR3_CS#2
DDR3_DQ27
DDR_CS3#
DDR_A_D28
AK8
AG27
<10> DDR_CS3#
DDR3_CS#3
DDR3_DQ28
DDR_A_D29
AG25
DDR3_DQ29
C948
C948
DMI_RXP0_C
DDR_A_D30
1
2
AH23
AG21
<12>
DMI_RXP0
DDR3_CKE0
DDR3_DQ30
0.1U_0402_10V6K
0.1U_0402_10V6K
DDR_A_D31
AJ24
AE21
DDR3_CKE1
DDR3_DQ31
DDR_CKE2
DDR_A_D32
AK24
AD13
<10> DDR_CKE2
DDR3_CKE2
DDR3_DQ32
C949
C949
DMI_RXN0_C
DDR_CKE3
DDR_A_D33
1
2
AH24
AD11
<12>
DMI_RXN0
<10> DDR_CKE3
DDR3_CKE3
DDR3_DQ33
0.1U_0402_10V6K
0.1U_0402_10V6K
SMPWROK
DDR_A_D34
AG8
DDR3_DQ34
DDR_A_D35
AK10
AG7
DDR3_ODT0
DDR3_DQ35
C950
C950
DMI_RXP1_C
DDR_A_D36
1
2
AK7
AG13
<12>
DMI_RXP1
DDR3_ODT1
DDR3_DQ36
C
0.1U_0402_10V6K
0.1U_0402_10V6K
M_ODT2
DDR_A_D37
C
AL9
AE13
<10> M_ODT2
DDR3_ODT2
DDR3_DQ37
M_ODT3
DDR_A_D38
AJ7
AD10
<10> M_ODT3
DDR3_ODT3
DDR3_DQ38
C951
C951
DMI_RXN1_C
DDR_A_D39
1
2
<12>
DMI_RXN1
1
AF8
D
D
DDR3_DQ39
0.1U_0402_10V6K
0.1U_0402_10V6K
DDR_A_D40
AG15
AH2
DDR3_CK0
DDR3_DQ40
SYSON#
Q37
Q37
DDR_A_D41
<28>
SYSON#
2
AF15
AG3
DDR3_CK#0
DDR3_DQ41
G G
DDR_A_D42
AF17
AD2
2
DDR3_CK1
DDR3_DQ42
S
S
2N7002_SOT23
2N7002_SOT23
DDR_A_D43
AG17
AD3
DDR3_CK#1
DDR3_DQ43
M_CLK_DDR2
DDR_A_D44
AD17
AH4
<10> M_CLK_DDR2
DDR3_CK2
DDR3_DQ44
M_CLK_DDR#2
DDR_A_D45
AC17
AK3
<10> M_CLK_DDR#2
DDR3_CK#2
DDR3_DQ45
@
@
M_CLK_DDR3
DDR_A_D46
AC15
AE2
<10> M_CLK_DDR3
DDR3_CK3
DDR3_DQ46
@
@
M_CLK_DDR#3
DDR_A_D47
AD15
AD4
<10> M_CLK_DDR#3
DDR3_CK#3
DDR3_DQ47
DDR_A_D48
AD7
<10> DRAMRST#
DDR3_DQ48
@
@
R878
R878
DDR_A_D49
AD6
DDR3_DQ49
DDR_A_D50
1
2
AK25
AA6
+1.5V
DDR3_DRAMRST#
DDR3_DQ50
DDR_A_D51
AB5
DDR3_DQ51
10K_0402_5%
10K_0402_5%
DDR_VREF
DDR_A_D52
AJ27
AE8
DDR3_VREF
DDR3_DQ52
DDR_A_D53
AL28
AE5
DDR3_VREF_NCTF
DDR3_DQ53
R883R883
0_0402_5%0_0402_5%
DDR_A_D54
AB9
DDR3_DQ54
1 CLK_CPU_MPLL
DDR_A_D55
<9> CLK_CPU_MPLL_C
2
AC19
AA8
DDR3_REFP
DDR3_DQ55
1 CLK_CPU_MPLL#
DDR_A_D56
<9> CLK_CPU_MPLL#_C
2
AB19
AB2
DDR3_REFN
DDR3_DQ56
R892
R892
0_0402_5%
0_0402_5%
DDR_A_D57
AB4
DDR3_DQ57
0_0402_5%
0_0402_5%
DDR_A_D58
W4
DDR3_DQ58
R881
R881
SMPWROK
DDR_A_D59
<33> SM_PWROK
1
2
AA5
V3
DDR3_DRAM_PWROK
DDR3_DQ59
DRAM_VR_PWRGD
DDR_A_D60
W7
AC2
DDR3_VCCA_PWROK
DDR3_DQ60
DDR_A_D61
AB3
DDR3_DQ61
DDR_ODTPU
DDR_A_D62
AJ26
Y2
DDR3_ODTPU
DDR3_DQ62
+1.5V
DDR_CMDPU
DDR_A_D63
AJ25
W1
DDR3_CMDPU
DDR3_DQ63
DDR_DQPU
AK27
DDR3_DQPU
DDR_A_DQS0
AA30
DDR3_DQS0
DDR_A_DQS1
AB11
AB24
RSVD_TP_AB11
DDR3_DQS1
R500
R500
DDR_A_DQS2
AB13
AF30
RSVD_TP_AB13
DDR3_DQS2
DDR_A_DQS3
AF19
AE22
RSVD_TP_AF19
DDR3_DQS3
B
1K_0402_1%
1K_0402_1%
DDR_A_DQS4
B
AG19
AG10
RSVD_TP_AG19
DDR3_DQS4
DDR_A_DQS5
AF4
DDR3_DQS5
DDR_VREF
DDR_A_DQS6
DDR3
DDR3
AB6
DDR3_DQS6
DDR_A_DQS7
Y3
DDR3_DQS7
1
R504
R504
C953
C953
DDR_A_DM0
DDR_A_DQS#0
Y28
AA31
DDR3_DM0
DDR3_DQS#0
DDR_A_DM1
DDR_A_DQS#1
AB26
AB25
DDR3_DM1
DDR3_DQS#1
1K_0402_1%
1K_0402_1%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_DM2
DDR_A_DQS#2
AE30
AF29
2
DDR3_DM2
DDR3_DQS#2
DDR_A_DM3
DDR_A_DQS#3
AB21
AF22
DDR3_DM3
DDR3_DQS#3
DDR_A_DM4
DDR_A_DQS#4
AG11
AF10
DDR3_DM4
DDR3_DQS#4
DDR_A_DM5
DDR_A_DQS#5
AG2
AF3
DDR3_DM5
DDR3_DQS#5
DDR_A_DM6
DDR_A_DQS#6
AB8
AB7
DDR3_DM6
DDR3_DQS#6
DDR_A_DM7
DDR_A_DQS#7
AA3
AA2
DDR3_DM7
DDR3_DQS#7
QB0Z B2 1.6G
QB0Z B2 1.6G
2
2
OF 6
OF 6
?
?
DDR_DQPU
R966
R966
@
@
0_0402_5%
0_0402_5%
1
2
<7> XDP_DBREST#
1
R967R967
0_0402_5%0_0402_5%
@
@
C952
C952
0.01U_0402_16V7K
0.01U_0402_16V7K
1
2
<13>
PCH_POK
+5VALW
+1.5V
2
R553
R553
DDR_CMDPU
DRAM_VR_PWRGD
PCH_POK_R
22.6_0402_1%
22.6_0402_1%
1
2
R968
R968
12.1K_0402_1%
12.1K_0402_1%
R503
R503
R969
R969
DDR_ODTPU
1
2
10K_0402_5%
10K_0402_5%
270_0402_1%
270_0402_1%
A
A
1
1
1
1
C1050
C1050
C1065
C1065
C203
C203
C204
C204
68P_0402_50V8J
68P_0402_50V8J
0.1U_0402_16V4Z
0.1U_0402_16V4Z
68P_0402_50V8J
68P_0402_50V8J
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
Security Classification
Security Classification
Security Classification
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
2010/06/27
2010/06/27
2010/06/27
2011/6/27
2011/6/27
2011/6/27
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
SCHEAMTIC A6859
SCHEAMTIC A6859
SCHEAMTIC A6859
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2010.07.12 RF request
Custom
Custom
Custom
B
B
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4019EG
4019EG
4019EG
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Date:
Date:
Thursday, November 17, 2011
Thursday, November 17, 2011
Thursday, November 17, 2011
Sheet
Sheet
Sheet
6
6
6
of
of
of
38
38
38
5
4
3
2
1
C1088
C1088
1U_0402_6.3V6K
1U_0402_6.3V6K
DMI
DMI
1
2
13
1
2
R880
R880
10K_0402_5%
10K_0402_5%
C1063
C1063
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R893
R893
33.2_0402_1%
33.2_0402_1%
12
12
12
5 4 3 2 1 R894 R894 1 2 1M_0402_5% 1M_0402_5% HDMI@ HDMI@ Y3 Y3
5
4
3
2
1
R894
R894
1
2
1M_0402_5%
1M_0402_5%
HDMI@
HDMI@
Y3
Y3
H_FERR#_CPU
1
2
H_FERR#
H_FERR#
<11>
0_0402_5%
0_0402_5%
R1006
R1006
27MHZ_18PF_X3S027000FI1H-X
27MHZ_18PF_X3S027000FI1H-X
R895
R895
0_0402_5%
0_0402_5%
GMCH_CRT_DATA
2
1
U1D N2600@
U1D N2600@
? ?
GMCH_CRT_CLK
2
1
CPU_DREFCLK_C
1
3
CPU_DREFCLK#_C
H_A20M#_C
1
2
H_A20M#
H_A20M#
<11>
CEDARVIEW
CEDARVIEW
0_0402_5%
0_0402_5%
R1007
R1007
2
4
R896
R896
0_0402_5%
0_0402_5%
HDMI@
HDMI@
1
1
REV = 1.10
REV = 1.10
C1076
C1076
C1077
C1077
U1C N2600@
U1C N2600@
? ?
18P_0402_50V8J
18P_0402_50V8J
18P_0402_50V8J
18P_0402_50V8J
2
2
L26
B18
H_SMI#
<16> HDMICLK_C
RSVD_L26
SMI#
H_SMI#
<11>
C22
H_NMI
CEDARVIEW
CEDARVIEW
L27
<16> HDMIDAT_C
STRAP_L27
NMI/LINT10
H_NMI
<11>
D14
K28
C18
H_A20M#_C
CRT_HSYNC
GMCH_CRT_HSYNC
<15>
STRAP_K28
RSVD_C18
REV = 1.10
REV = 1.10
C14
K25
D22
H_STPCLK#
CRT_VSYNC
GMCH_CRT_VSYNC
<15>
RSVD_K25
STPCLK#
H_STPCLK#
<11>
CRT@CRT@ R1002R1002
0_0402_5%0_0402_5%
J28
RSVD_J28
D
D
1
2
HDMICLK_C
H25
H_RSVD_K26
K26
DDI0_DDC_SCL
RSVD_K26
1
2
HDMIDAT_C
J22
B12
GMCH_CRT_R
K27
DDI0_DDC_SDA
CRT_RED
GMCH_CRT_R
<15>
RSVD_K27
CRT@
CRT@ R1003
R1003
0_0402_5%
0_0402_5%
B11
GMCH_CRT_G
H27
CRT_GREEN
GMCH_CRT_G
<15>
RSVD_H27
C8
C11
GMCH_CRT_B
K30
DDI0_AUXP
CRT_BLUE
GMCH_CRT_B
<15>
RSVD_K30
B8
L29
<16>
HPD_C
DDI0_AUXN
RSVD_L29
D12
CRT_IRTN
CRT@ R1008
CRT@
R1008
2
1
0_0402_5%
0_0402_5%
L30
C21
H_DPRSTP#
CRT_IRTN
RSVD_L30
DPRSTP#
H_DPRSTP#
<13>
1
2
HPD_C
H22
A13
DAC_IREF
CRT@
CRT@
R510
R510
681_0402_1%
681_0402_1%
K29
B21
H_DPSLP#
DDI0_HPD
CRT_IREF
RSVD_K29
DPLSLP#
H_DPSLP#
<13>
CRT@ R1005
CRT@
R1005
0_0402_5%
0_0402_5%
J31
B22
H_CPUSLP#
RSVD_J31
CPUSLP#
H_CPUSLP#
<11>
HDMI_TXD2+
+3VS
G2
E29
H30
<16> HDMI_TXD2+
DDI0_TXP0
CRT_DDC_DATA
GMCH_CRT_DATA
<15>
RSVD_H30
HDMI_TXD2-
G3
E27
A23
H_INIT#
<16> HDMI_TXD2-
DDI0_TXN0
CRT_DDC_CLK
GMCH_CRT_CLK
<15>
INIT#
H_INIT#
<11>
HDMI_TXD1+
F3
D20
H_INTR
<16> HDMI_TXD1+
DDI0_TXP1
INTR/LINT00
H_INTR
<11>
HDMI_TXD1-
F2
F17
CPU_SSCDREFCLK
<16> HDMI_TXD1-
DDI0_TXN1
DPL_REFSSCCLKP
CPU_SSCDREFCLK
<9>
HDMI_TXD0+
D4
E17
CPU_SSCDREFCLK#
K24
B20
H_THERMTRIP#
H_THERMTRIP#
<11>
<16> HDMI_TXD0+
DDI0_TXP2
DPL_REFSSCCLKN
CPU_SSCDREFCLK#
<9>
HV_GPIO_RCOMP
THERMTRIP#
HDMI_TXD0-
C3
@
@
R897
R897
K23
L11
<16> HDMI_TXD0-
DDI0_TXN2
MV_GPIO_RCOMP
RSVD_L11
HDMI_CLK0+
B7
B9
CPU_DREFCLK_C
2
<16> HDMI_CLK0+
DDI0_TXP3
DPL_REFCLKP
HDMI_CLK0-
A7
A9
CPU_DREFCLK#_C
1 CPU_DREFCLK
1
<9>
2
0_0402_5%
0_0402_5%
Close to CPU
<16> HDMI_CLK0-
DDI0_TXN3
DPL_REFCLKN
CPU_DREFCLK#
<9>
@
@
R898
R898
0_0402_5%
0_0402_5%
H15
C20
H_FERR#_CPU
RSVD_TP_H15
PBE#
J15
R958R958
0_0402_5%0_0402_5%
RSVD_TP_J15
R1009R1009
0_0402_5%0_0402_5%
F28
LVDS_VTRL_CLK
A19
H_PROCHOT#
1
2
VR_HOT
VR_HOT
<35>
LVDS_CTRL_CLK
PROCHOT#
1
2
F25
E24
LVDS_VTRL_DATA
D23
H_PWRGD
DDI1_DDC_SCL
LVDS_CTRL_DATA
PWRGOOD
H_PWRGD
<13>
1
2
G27
G30
PLTRST#
DDI1_DDC_SDA
RESET#
PLTRST#
<13,18,23>
R1010
R1010
0_0402_5%
0_0402_5%
G24
E30
XDP_DBREST#XDP_DBREST#
LVDS_DDC_CLK
LCD_EDID_CLK
<17>
DBR#
XDP_DBREST#
<6>
D10
H24
DDI1_AUXP
LVDS_DDC_DATA
LCD_EDID_DATA
<17>
49.9_0402_1%
49.9_0402_1%
+1.5VS
C10
DDI1_AUXN
BREF_1.5V
E10
L_IBG
R509
R509
H29
XDP_PRDY#
2011.05.06 Add 0 ohm for XDP signal.
LVDS_IBG
PRDY#
D26
F10
2.37K_0402_1%
2.37K_0402_1%
G29
XDP_PREQ#
DDI1_HPD
LVDS_VBG
PREQ#
1 E11
HDMI@
HDMI@
H2
R509 be placed U1.R22
J19
CLK_CPU_HPLCLK
49.9_0402_1%
49.9_0402_1%
DDI1_TXP0
LVDS_VREFH
HPLL_REFCLK_P
CLK_CPU_HPLCLK
<9>
CRT@
CRT@ R903
R903
R975
R975
F11
H3
K19
CLK_CPU_HPLCLK#
DDI1_TXN0
LVDS_VREFL
HPLL_REFCLK
CLK_CPU_HPLCLK#
<9>
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
J11
DDI1_TXP1
2 H11
G10
E19
LCD_TXOUT0+
<17>
DDI1_TXN1
LVDS_TXP0
RSVD_E19
F13
H10
F19
DDI1_TXP2
LVDS_TXN0
LCD_TXOUT0-
<17>
RSVD_F19
E13
F8
C
DDI1_TXN2
LVDS_TXP1
LCD_TXOUT1+
<17>
C
J13
E8
LCD_TXOUT1-
<17>
DDI1_TXP3
LVDS_TXN1
K13
H7
DDI1_TXN3
LVDS_TXP2
LCD_TXOUT2+
<17>
H8
LCD_TXOUT2-
<17>
LVDS_TXN2
HDMI@
HDMI@
R974
R974
J17
G5
XDP_TCK_R
C25
B16
SVID_ALERT#
SVID_ALERT#
<35>
RSVD_TP_J17
LVDS_TXP3
TCLK
SVID_ALERT#
XDP_TDI_R
SVID_CLK
7.5K_0402_1%
7.5K_0402_1%
H17
G6
C24
D18
RSVD_TP_H17
LVDS_TXN3
TDI
SVID_CLK
SVID_CLK
<35>
XDP_TDO_R
B25
C16
SVID_DATA
TDO
SVID_DATA
SVID_DATA
<35>
BREF_1.5V
E15
H4
XDP_TMS_R
D24
BREF1P5V
LVDS_CLKP
LCD_TXCLK+
<17>
TMS
CRT@
CRT@ 1
2
BREFREXT
F15
J4
XDP_TRST#_R
B24
BREFREXT
LVDS_CLKN
LCD_TXCLK-
<17>
TRST#
R904
R904
0_0402_5%
0_0402_5%
HDA_BITCLK_CPU
H21
R5
<13> HDA_BITCLK_CPU
AZIL_BCLK
RSVD_R5
HDA_SYNC_CPU
F22
G22
R6
<13> HDA_SYNC_CPU
AZIL_SYNC
PANEL_BKLTCTL
GMCH_INVT_PWM
<17>
RSVD_R6
HDMI@
HDMI@
E25
ENBKL
W25
PANEL_BKLTEN
ENBKL
<25>
RSVD_W25
33_0402_5%
33_0402_5%
1
R905
R905
2
HDA_SDIN1_CPU
E22
F29
ENBKL
R517
R517
W26
K21
<13> HDA_SDIN1
AZIL_SDI
PANEL_VDDEN
GMCH_ENVDD
<17>
RSVD_W26
RSVD_K21
HDA_SDOUT_CPU
F21
100K_0402_5%
100K_0402_5%
N24
L22
<13> HDA_SDOUT_CPU
AZIL_SDO
RSVD_N24
RSVD_L22
To be placed <250 mils to U1 ball
N25
L24
RSVD_N25
RSVD_L24
HDA_RST#_CPU
E21
<13> HDA_RST#_CPU
AZIL_RST#
3
3
OF 6
OF 6
To be placed <500 mils to U1 ball
CRT@CRT@ RV155RV155
150_0402_1%150_0402_1%
QB0Z B2 1.6G
QB0Z B2 1.6G
GMCH_CRT_R
1
2
CRT@ RV156
CRT@
RV156
150_0402_1%
150_0402_1%
? ?
GMCH_CRT_G
1
2
CRT@ RV157
CRT@
RV157
150_0402_1%
150_0402_1%
4
4
OF 6
OF 6
GMCH_CRT_B
1
2
QB0Z B2 1.6G
QB0Z B2 1.6G
? ?
+1.05VS
XDP_TDI_R
R495
R495
1
2
51_0402_5%
51_0402_5%
B
B
XDP_TMS_R
R496
R496
1
2
51_0402_5%
51_0402_5%
XDP_TDO_R
R499
R499
1
2
51_0402_5%
51_0402_5%
XDP_TRST#_R
R502
R502
1
2
51_0402_5%
51_0402_5%
XDP_TCK_R
R505
R505
1
2
51_0402_5%
51_0402_5%
+3VS
CPU THERMAL SENSOR
+1.8VS
REMOTE Thermal sensor
XDP_PREQ#
R501
R501
1
2
1
51_0402_5%
51_0402_5%
XDP_PRDY#
C968
C968
R906
R906
1
2
51_0402_5%
51_0402_5%
U2
U2
C C
+1.05VS
2
H_THERMDA
2
Q8
Q8
B B
MMBT3904WH_SOT323-3
MMBT3904WH_SOT323-3
EC_SMB_CK2
E E
8
EC_SMB_CK2
<25>
1 SMCLK
VDD
SVID_ALERT#
R907
R907
2
1
2
75_0402_5%
75_0402_5%
H_THERMDA
C190 @
C190@
DDI
DDI
7
EC_SMB_DA2
IHDA
IHDA
2 SMDATA
DP
EC_SMB_DA2
<25>
SVID_DATA
R908
R908
2
1
C969
C969
2200P_0402_50V7K
2200P_0402_50V7K
110_0402_1%
110_0402_1%
1
2
H_THERMDC
6
2
1
3 ALERT#
DN
+3VS
1
H_PROCHOT#
R511
R511
2
1
2200P_0402_50V7K
2200P_0402_50V7K
R523
R523
10K_0402_5%
10K_0402_5%
100_0402_5%
100_0402_5%
CPU_THERM#
5
H_THERMDC
4 GND
THERM#
+3VS
1
2
+3VS
R524R524
10K_0402_5%10K_0402_5%
place near the hottest spot area for
NB & top SODIMM.
XDP_DBREST#
R971
R971
2
1
EMC1402-1-ACZL-TR_MSOP8
EMC1402-1-ACZL-TR_MSOP8
1K_0402_1%
1K_0402_1%
Address:0100_1100 EMC1402-1
A
A
Address:0100_1101 EMC1402-2
Layout Note:
Security Classification
Security Classification
Security Classification
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
2010/06/27
2010/06/27
2010/06/27
2011/6/27
2011/6/27
2011/6/27
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
SCHEAMTIC A6859
SCHEAMTIC A6859
SCHEAMTIC A6859
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
Custom
Custom
B
B
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4019EG
4019EG
4019EG
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Date:
Date:
Thursday, November 17, 2011
Thursday, November 17, 2011
Thursday, November 17, 2011
Sheet
Sheet
Sheet
7
7
7
of
of
of
38
38
38
5
4
3
2
1
12
HDMI@ C1120
HDMI@
C1120
1U_0402_6.3V6K
1U_0402_6.3V6K
12
1
2
LVDS
LVDS
VGA
VGA
R899
R899
2.2K_0402_5%
2.2K_0402_5%
1
2
1
2
2.2K_0402_5%
2.2K_0402_5%
R900
R900
R901
R901
12
12
R902
R902
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CPU
CPU
ICH
ICH
3
1

+1.05VS

 

5

4

3

2

1

 
 

723mA

 

? ?

U1F

U1F

? ?

N2600@

N2600@

 

R525

R525

 

R909

R909

 

U1E N2600@

U1E N2600@

       

1

2

0_0805_5%

0_0805_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

22U_0805_6.3V6M

22U_0805_6.3V6M

C973

C973

C970

C970

C972

C972

C971

C971

@

@

1

2

@

@

+VCCA_VCCD

1

2

1

2

1

2

1

2

0_0603_5%

0_0603_5%

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

C1078

C1078

@

@

+VCCDMPL

2

 

+VCCA_VCCD

AA14

AA16

W16

VCCADDR_1

VCCADDR_2

 

CEDARVIEW

CEDARVIEW

REV = 1.10

REV = 1.10

 

VCC_CPU_01

VCC_CPU_02

4234mA

P18

P19

P21

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

1

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

+CPU_CORE

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

 

A11

A16

A21

A25

AA1

AA10

VSS

VSS

VSS

VSS

VSS

CEDARVIEW

CEDARVIEW

REV = 1.10

REV = 1.10

VSS

VSS

VSS

VSS

VSS

H19

H26

H28

H6

J10

J2

 
 

1

+1.05VS_EAST

W18

N30

N31

VCCADDR_3

VCCADDR_4

VCCRAMXXX_1

 

VCC_CPU_03

VCC_CPU_04

VCC_CPU_05

VCC_CPU_06

P28

P29

P30

R22

 

C974

C974

2

C975

C975

2

C976

C976

2

C977

C977

2

C988

C988

2

@

@

C987

C987

2

@

@

C996

C996

2

@

@

 

AA13

AA19

AA21

AA23

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

J21

J30

K11

K15

 

+VCCA_VCCD

V4

VCCRAMXXX_2

VCCRAMXXX_3

VCC_CPU_07

VCC_CPU_08

R23

R24

1U_0402_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

 

AA26

AA27

VSS

VSS

VSS

VSS

K3

K7

 

C973 1UF for

 

+VCCA_VDDR

 

W8

W9

VCCACKDDR_1

VCC_CPU_09

VCC_CPU_10

R25

R26

   

AA29

AA7

VSS

VSS

VSS

VSS

K8

K9

D

1

R526

R526

2

0_0603_5%

0_0603_5%

1

CPU pin V4

+1.05VS_EAST

1

 

+1.05VS

 

+VCCCK_DDR

W11

W13

AJ6

AK6

VCCACKDDR_2

VCCADLLDDR_1

VCCADLLDDR_2

VCCCKDDR_1

VCCCKDDR_2

 

DDR

DDR

CPU

CPU

VCC_CPU_11

VCC_CPU_12

VCC_CPU_13

VCC_CPU_14

VCC_CPU_15

VCC_CPU_16

VCC_CPU_17

R27

T19

T21

T29

T30

T31

U22

 

Please closed U1 ball

+CPU_CORE

   

AA9

AB15

AB17

AB23

AB29

AC1

AC10

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

L1

L10

L13

L23

L25

L31

L7

D

 

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C1079

C1079

C1080

C1080

@

@

2

2

 

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

+VCC_SM

 

AH14

AH19

V_SM_1

 

VCC_CPU_18

VCC_CPU_19

U23

U24

 

2 x 330uF(9mohm/2)

   

AC11

AC13

GND

GND

VSS

VSS

VSS

VSS

VSS

VSS

M29

M4

 

1

   

AK23

AK5

V_SM_2

V_SM_3

VCC_CPU_20

VCC_CPU_21

U25

U26

 

1

1

 

AC22

AC28

VSS

VSS

N10

N14

C1079 1UF for CPU pin N30,N31

C1080 1UF for CPU pin L19

 

C1081

C1081

+ +

2

 

AL11

AL16

V_SM_4

V_SM_5

VCC_CPU_22

VCC_CPU_23

U27

V18

+

+

C984

C984

 

+

+

C985

C985

 

AC4

AD19

VSS

VSS

VSS

VSS

N19

N21

 

R956

R956

   

AL21

AG31

V_SM_6

V_SM_7

VCC_CPU_24

VCC_CPU_25

V19

V21

+CPU_CORE

 

2

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

2

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

 

AD21

AD24

VSS

VSS

VSS

VSS

N22

N23

1

2

0_0603_5%

0_0603_5%

1

+VCCA_VDDR

1 1

   

+VCCADP_1.05

B5

C6

D6

V_SM_8

VCCADP_1

VCCADP_2

 

VCC_CPU_26

VCC_CPU_27

VCC_CPU_28

VCC_CPU_29

V28

V29

V30

 

AD26

AD5

AD8

AE1

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

N26

N27

N28

N4

 

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C1083

C1083

C1084

C1084

C1082

C1082

2

2 2

@

@

 

Close Chipset pin

 

+VCCADP0_SFR

K17

VCCADP_3

   

1938mA

+GFX_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

C989

C989

C990

C990

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C1085

C1085

C991

C991

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

   

AE10

AE11

VSS

VSS

VSS

VSS

N7

P14

 
 

+VCCADP1_SFR

L18

VCCADP0_SFR

VCCADP1_SFR

 

POWER

POWER

   

VCC_GFX_01

N11

N13

 

AE15

AE17

VSS

VSS

VSS

VSS

VSS

VSS

P16

P4

 

R910

R910

 

+1.05VS_EAST

+VCCAGPIO1.5V

L19

L16

VCCAGPIO_LV

 

VCC_GFX_02

VCC_GFX_03

P11

P13

 

AE19

AE3

VSS

VSS

T14

T18

1

2

0_0603_5%

0_0603_5%

+VCCADP_1.05

1

 

+VCCAGPIO1.8V

+VCCAGPIO3.3V

N18

D30

D31

VCCAGPIO_REF

VCCAGPIO_DIO

VCCAGPIO_1

 

VCC_GFX_04

VCC_GFX_05

VCC_GFX_06

VCC_GFX_07

R10

R9

T11

T13

 

AE31

AF11

AF13

AF21

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

T3

U5

U6

U9

 

1U_0402_6.3V6K

1U_0402_6.3V6K

C1086

C1086

2

 

+VCC_CRT_DAC

B13

VCCAGPIO_2

 

VCC_GFX_08

VCC_GFX_09

U10

V11

 

AF24

AF28

VSS

VSS

VSS

VSS

V2

W10

+VCCALVDS

+VCCDLVDS

H5

J1

VCCADAC

VCCALVDS

 

VCC_GFX_10

VCC_GFX_11

V13

B4

+VCC_DMI

 

AF7

AG22

AG5

VSS

VSS

VSS

VSS

VSS

VSS

W14

W19

W2

1

R531

R531

2

0_0603_5%

0_0603_5%

1

+VCC_DMI

+VCCDIO

L21

VCCDLVDS

DMI

DMI

VCCADMI_1

VCCADMI_2

VCCADMI_3

C5

A4

K4

+VCCADMI_1.5VS

 

+CPU_CORE

   

AH26

AH28

AH6

VSS

VSS

VSS

VSS

VSS

VSS

W21

W22

W23

C

CRT@

CRT@

R1004

R1004

 

1U_0402_6.3V6K

1U_0402_6.3V6K

C994

C994

2011.04.25 Add for RGB I/F

2

+VCCAZILAON

+VCCSFRMPL

B29

A30

AA18

VCCDIO

VCCAZILAON_1

VCCAZILAON_2

 

VCCADMI_PLLSFR

VCCFHV_1

VCCFHV_2

V16

T16

V14

+VCCA_VCCD

 

12

R532

R532

100_0402_5%

100_0402_5%

 

AH9

AJ2

AJ3

AK13

AK19

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

W24

W27

W30

W5

W6

C

1

2

0_0603_5%

0_0603_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

CRT@

CRT@

C166

C166

+VCCDIO

1

2

HDMI@

HDMI@

C166

C166

0_0402_5%

0_0402_5%

 

+VCCDMPL

+VCCPLLCPU0

AA11

B27

VCCSFRMPL

VCCDMPL

 

PLL

PLL

VCCFHV_3

VCC_CPUSENSE

M28

M30

VCCSENSE

VSSSENSE

 

VCCSENSE

VSSSENSE

<35>

<35>

 

AK28

AK9

AL13

VSS

VSS

VSS

VSS

VSS

Y4

+1.5V

+VCCPLLCPU1

+VCCAHPLL

 

C29

B30

B26

VCCPLLCPU0

VCCPLLCPU1_1

VCCPLLCPU1_2

VCCAHPLL

 

VSS_CPUSENSE

VCC_GFXSENSE

VSS_GFXSENSE

VCCTHRM_1

VCCTHRM_2

U8

U7

N16

K2

VCC_GFXSENSE

VSS_GFXSENSE

+VCCATHRM

R911

R911

1

0_0603_5%

0_0603_5%

2

 

+1.8VS

12

R533

R533

100_0402_5%

100_0402_5%

 

AL19

AL23

AL25

AL7

B10

B14

B19

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

A27

A29

A3

AH1

AJ1

AJ31

AK1

  1 R530 R530 2 +VCCCK_DDR     @ @ 1U_0402_6.3V6K 1U_0402_6.3V6K C1089 C1089 1
 

1

R530

R530

2

+VCCCK_DDR

   

@

@

1U_0402_6.3V6K

1U_0402_6.3V6K

C1089

C1089

1

2

 

10U_0805_10V4Z

10U_0805_10V4Z

C1090

C1090

+GFX_CORE

1

2

     

B23

C12

C26

C30

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AK2

AK30

AK31

AL2

 
2       B23 C12 C26 C30 VSS VSS VSS VSS VSS VSS VSS VSS

1U_0402_6.3V6K

1U_0402_6.3V6K

22U_0805_6.3V6M

22U_0805_6.3V6M

C993

C993

C992

C992

0_0603_5%

0_0603_5%

1

1

         

C7

D19

D28

D8

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AL29

AL3

AL30

AL5

   

2

2

Please closed U1 ball

 

+3VS_PRIME

R913

R913

 

12

R912

R912

100_0402_5%

100_0402_5%

 

D9

E2

E5

VSS

VSS

VSS

VSS

VSS

VSS

B2

B3

B31

+1.5V

   

1

2

0_0603_5%

0_0603_5%

R914

R914

 

+VCCAGPIO3.3V

   

E7

F24

F4

VSS

VSS

VSS

VSS

VSS

VSS

C1

C2

C31

 

R527

R527

1

0_1206_5%

0_1206_5%

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2

2

2

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2

2

+VCC_SM

1

2

HDMI@

HDMI@

0_0603_5%

0_0603_5%

C1092

C1092

+VCCAZILAON

2 2

1 1

CRT@

CRT@

C1093

C1093

0_0402_5%

0_0402_5%

VCC_GFXSENSE

VSS_GFXSENSE

 

12

R915

R915

VCC_GFXSENSE

VSS_GFXSENSE

<35>

<35>

   

G1

G11

G13

G15

G17

G19

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS_CDVDET

VSSA_CRTDAC

E1

L14

D13

 

C979

C979

C980

C980

C981

C981

C982

C982

 

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

C1093 HDMI@

HDMI@C1093

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

   

5

5

OF 6

OF 6

   

100_0402_5%

100_0402_5%

   

G21

G31

VSS

B

1

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1

1

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1

 

QB0Z B2 1.6G

QB0Z B2 1.6G

 

? ?

 

G8

H13

VSS

VSS

VSS

B

+1.8VS

 

+1.05VS

 

? ?

6

6

OF 6

OF 6

QB0Z B2 1.6G

QB0Z B2 1.6G

   

R916

R916

   

R917

R917

     

+1.5VS

1

R919

R919

2

0_0603_5%

0_0603_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

C1097

C1097

+VCCADMI_1.5VS

1

2

+VCCAGPIO1.5V

2

C1101

C1101

 

1

2

0_0603_5%

0_0603_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C983

C983

2

1

R918

R918

2

0_0402_5%

0_0402_5%

 

+VCCDLVDS

+VCCALVDS

1

C986

C986

 

1

2

0_0603_5%

0_0603_5%

10U_0805_10V4Z

10U_0805_10V4Z

C1095

C1095

C1094

C1094

1 1

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCPLLCPU0

 

+GFX_CORE

 

1U_0402_6.3V6K

1U_0402_6.3V6K

C1004

C1004

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

C1096

C1096

1

+ +

2

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

1

+ +

2

   

+VCCA_VCCD

+VCCCK_DDR

1

C159

C159

2

22P_0402_50V8J

22P_0402_50V8J

RF@

RF@

   
 

1

R922

R922

2

0_0603_5%

0_0603_5%

1

R921

R921

2

0_0603_5%

0_0603_5%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C1100

C1100

0.1uH use

0 ohm replace

1

2

+VCCAGPIO1.8V

 

1

C1098

C1098

R920

R920

2

0_0603_5%

0_0603_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0805_10V4Z

10U_0805_10V4Z

C1099

C1099

2 2

+VCCPLLCPU1

1 1

2 2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

22U_0805_6.3V6M

22U_0805_6.3V6M

C1009

C1009

C1008

C1008

C1007

C1007

C1006

C1006

C1005

C1005

1

2

1 1

1

1

2 2

2

2

Close Chipset pin

+GFX_CORE

+CPU_CORE

1

C150

C150

1

C153

C153

1

C156

C156

2

22P_0402_50V8J

22P_0402_50V8J

RF@

RF@

2

22P_0402_50V8J

22P_0402_50V8J

2

22P_0402_50V8J

22P_0402_50V8J

 

1

@

@

0.1U_0402_10V6K

0.1U_0402_10V6K

1

CRT@

CRT@

2

0_0603_5%

0_0603_5%

R535

R535

HDMI@

HDMI@

C1125

C1125

CRT@

CRT@

C1125

C1125

10U_0603_6.3V

10U_0603_6.3V

12

+VCC_CRT_DAC+VCC_CRT_DAC

2

1

R923

R923

2

0_0603_5%

0_0603_5%

10U_0805_10V4Z

10U_0805_10V4Z

C1103

C1103

C1102

C1102

1

2

+VCCAHPLL

1

2011.06.14 Stuff C1007,C1008,C1009 for EDS issue

 

2010.07.12 RF request

 
 

0_0603_5%

0_0603_5%

   

2011.04.25 Add for RGB I/F

   

1U_0402_6.3V6K

1U_0402_6.3V6K

2

   
   
 

+1.5VS

+1.5VS

 

+1.5VS

   

A

2

2

 

2

 

A

 

1

@