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International Journal of Pure and Applied Mathematics

Volume 119 No. 15 2018, 1819-1823


ISSN: 1314-3395 (on-line version)
url: http://www.acadpubl.eu/hub/
Special Issue
http://www.acadpubl.eu/hub/

CHARACTERIZATION OF NANOWIRE TFET


A.Maria Jossy1, Ravi Teja Kaluva2, Vasikarla Rahul Rishi Reddy3
SRM Institute of Science and Technology, Kattankulathur, Chennai
mariajossy.a@ktr.srmuniv.ac.in 1 , tejaskaluva@gmail.com, 2rahulrishi54@gmail.com3

channel is Le =2nm. Trivalent impurities with a concentration


Abstract— In this paper 3-D model of gate-all-around (GAA) of 1022cm-3 was used to dope the delta doping region. The
Tunnel FET (TFET) which uses p-i-n doping concentration is source and drain region is lightly doped with an order of
presented. A delta-doping sheet is introduced in source region to 1015cm-3 for the tunneling. The source (Ls) and drain (L d) are
obtain high transconductance and increased cut-off frequency. of 20nm length whereas the channel (Lc) is of 50nm length.
Silicon pillar dimeter and channel length are varied to study their
The gate oxide thickness is of 2nm length (tox) for HfO2
effects on v-threshold (VT), transconductance (gm) and saturation
current. The drain current (Id) and gate voltage (Vg) dielectric layer and silicon pillar diameter (tsi) is of 10nm. The
characteristics has also been studied. metal gate which spreads over 50nm of gate length is provided
with work function (ψm) of 4.2ev.
Keywords— gate all around (GAA),Tunnel FET (TFET);band-
to-band tunneling (BTBT), delta-doping sheet.

I. INTRODUCTION
Gordon Moore in 1965 stated that the number of transistors
per unit area had doubled approximately every two years. For
40 years Moore’s law served as guiding principle. After
downscaling the MOSFET for 40 years, we now finally able
reduce the chip size, thereby increasing the number of
transistors and also the computing speed.

TFET plays a major role in the field of semiconductor chip


industry. Now currently TFET are replacing the MOS
technology. As band-to-band tunneling (BTBT) mechanism is
mainly responsible for current conduction, it has low
subthreshold swing 60mv/decade, and also low off state Fig1:Cross-sectional view of n-channel delta doped GAA-TFET
current [1-2]. TFET consume less power than MOSFET [1-3].
Low on current is major drawback for T-FET.
As there is an abrupt increase in in the impurity concentration,
GAA-TFET are preferred over Double Gate TFET for IOFF due to the presence of delta-doping in the surface potential.
and ION/IOFF ratio because of excellent Gate coupling [4]. The The higher tunneling of BTBT charge carriers in channels [10-
ION transconductance (gm) can be improved by including 13] is due to reduction in shortest tunneling distance. At
Delta-doping in source region [5] .The ION in TFET can also tunneling junction we have high lateral electric field provided
be improved by increasing the overlapping of drain and gate by delta-doping which improves on-current and
regions [6],and by using high-k dielectric material [7-8],and transconductance[5].
also by varying the gate materials, work functions [9]. In this
paper we have modeled the GAA-TFET by varying the gate- III. RESULTS AND DISCUSSIONS
channel length and silicon diameter.
By changing the gate-channel length and silicon pillar
The drain current, gate voltage characteristics of different diameter, and by analyzing the drain current with gate voltage,
conditions are considered and studied. And the graphs are
we got plots of DC analysis. Channel resistance can be
plotted for different gate-channel lengths having a silicon
changed by varying channel length, and tunnel barrier
pillar diameter of 10nm and 9nm respectively.
resistance changes according to the cross-sectional area.
II. DEVICE DESIGN AND PARAMETERS
Changing channel length above 60nm is of no use, as the on-
The delta-doping sheet present in n-channel GAA-TFET has a current is nearly same [14]. We can see that drain current is
width of Lδ=1nm and the distance between delta doping and

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International Journal of Pure and Applied Mathematics Special Issue

better at 10nm compared to 9nm. Below 8nm the cross-section


area becomes small enough to gradually reduce the tunneling
width and number of carriers tunneling from source to
channel. Above 8nm the on current is reduced because of
improper coupling of bands caused due to large cross section
area.

Gate source junction of a TFET has high BTBT. In on state


BTBT is high in source-channel region, where as it is low in
off-state in channel-drain region.

Fig. 4.The threshold voltage VT for channel lengths 30nm,


40nm and 50nm of the GAA-TFET with radius 9nm is
presented.

Fig.2.The channel 30nm of the GAA-TFET with diameter


9nm has more drain current than the rest of the two they are
channel 50nm and the 40nm GAA-TFET.

Fig. 5.The threshold voltage for channel lengths 30nm, 40nm


and 50nm of the GAA-TFET with radius 10nm is presented.

By comparison of the above two graphs we can observe that


the threshold voltage remains constant as channel increases
but as the radius of substrate decreases the threshold voltages
decreases.

Fig. 3.The channel 30nm of the GAA-TFET with diameter


10nm has more drain current than the rest of the two they are
channel 50nm and 40nm GAA-TFET

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International Journal of Pure and Applied Mathematics Special Issue

Fig. 6. transconductance of the GAA-TFET is for the channel Fig. 8.Transconductance of the GAA-TFET is for the channel
length 30nm with a diameter variation of 9nm and 10nm is length 50nm with a diameter variation of 9nm and 10nm is
increased. increased.
IV. CONCLUSION

The structure of the GAA-TFET with delta doping of


thickness 1nm is analyzed using the TCAD tool by varying the
gate channel length and radius. The variation is the threshold
voltage, transconductance and drain current has been analyzed
w.r.t gate voltage. When compared to double gate and single
gate GAA-TFET has less leakage current and better gate
control. From the analysis it is found that the structure with
channel length 30nm providing better results when compared
with 40nand 50nm.But the silicon pillar diameter of the radius
10nm is giving better results than 9nm.The threshold voltage
and the transconductance follows the similar patters due the
increase of the drain current.

REFERENCES
Fig. 7. transconductance of the GAA-TFET is for the channel
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