PHN210T Data Sheet Dual Chanel Intermediate Level

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In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
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Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
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Should be replaced with:
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PHN210T
Dual N-channel TrenchMOS intermediate level FET
Rev. 02 — 15 December 2010 Product data sheet
1. Product profile
1.1 General description

Dual intermediate level N-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits

 Suitable for high frequency  Suitable for logic level gate drive
applications due to fast switching sources
characteristics  Suitable for low gate drive sources
1.3 Applications
 DC-to-DC converters  Motor and relay drivers
 Logic level translators
1.4 Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source Tj ≥ 25 °C; Tj ≤ 150 °C; - - 30 V
voltage Repetitive peak drain-source
voltage
ID drain current Tsp = 25 °C; Single device [1] - - 3.4 A
Ptot total power Tsp = 25 °C [2] - - 2 W
dissipation
Static characteristics
RDSon drain-source VGS = 4.5 V; ID = 1 A; - 120 200 mΩ
on-state Tj = 25 °C
resistance VGS = 10 V; ID = 2.2 A; - 80 100 mΩ
Tj = 25 °C
Dynamic characteristics
QGD gate-drain charge VGS = 10 V; ID = 2.3 A; - 0.7 - nC
VDS = 15 V; Tj = 25 °C
[1] Surface mounted on FR4 board, t ≤ 10 sec.

[2] Surface mounted on FR4, t ≤ 10 sec.
NXP Semiconductors PHN210T
2. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 S1 source1
8 5 D1 D1 D2 D2
2 G1 gate1
3 S2 source2
4 G2 gate2
5 D drain2 1 4
6 D drain2 SOT96-1 (SO8) S1 G1 S2 G2

7 D drain1 mbk725
8 D drain1
3. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
PHN210T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
PHN210T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 15 December 2010 2 of 13

4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage Continuous - 30 V
Tj ≥ 25 °C; Tj ≤ 150 °C; Repetitive peak - 30 V
drain-source voltage
VDGR drain-gate voltage RGS = 20 kΩ - 30 V
VGS gate-source voltage -20 20 V
ID drain current Tsp = 70 °C; Dual device [1] - 1.9 A
Tsp = 70 °C; Single device [1] - 2.8 A
Tsp = 25 °C; Dual device [1] - 2.4 A
Tsp = 25 °C; Single device [1] - 3.4 A
IDM peak drain current Tsp = 25 °C; pulsed - 14 A
Ptot total power dissipation Tsp = 25 °C [2] - 2 W
Tstg storage temperature -65 150 °C
Tj junction temperature -65 150 °C
Source-drain diode
IS source current Tsp = 25 °C - 2.2 A
ISM peak source current Tsp = 25 °C; pulsed - 14 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source VGS = 10 V; Tj(init) = 25 °C; ID = 3.4 A; - 13 mJ
avalanche energy VDD ≤ 15 V; unclamped; RGS = 50 Ω;
tp = 0.2 ms
IAS non-repetitive avalanche Vsup ≤ 15 V; VGS = 10 V; Tj(init) = 25 °C; - 3.4 A
current RGS = 50 Ω; unclamped
[1] Surface mounted on FR4 board, t ≤ 10 sec.

[2] Surface mounted on FR4, t ≤ 10 sec.

003aaf065 003aaf066
120 120
Pder lD
(%) (%)
80 80
40 40
0 0
0 40 80 120 160 0 40 80 120 160
Tamb (°C) Tamb (°C)
Fig 1. Normalized total power dissipation as a Fig 2. Normalized continuous drain current as a
function of ambient temperature function of ambient temperature
003aaf067 003aaf080
102 10
IDM RDS(on) = VDS / ID
(A) tp = 10 μs
IAS 25 °C
10 (A)
100 μs
Tj prior to avalanche = 125 °C
1 ms
1 1
10 ms
VDS
100 ms
tp
10−1
10 s
ID
10−2 10−1
10−1 1 10 102 10−6 10−5 10−4 10−3 10−2
VDS (V) tp (s)
Ta = 25 °C; IDM is single pulse unclamped inductive load

Fig 3. Safe operating area; continuous and peak drain Fig 4. Single-shot avalanche rating; avalanche
currents as a function of drain-source voltage current as a function of avalanche period

5. Thermal characteristics
Table 5. Thermal characteristics
Rth(j-a) thermal resistance Surface mounted; FR4 board - 150 - K/W
from junction to Surface mounted; FR4 board; - - 62.5 K/W
ambient t ≤ 10 sec
003aaf068
102
Zth(j-a)
(K/W) δ = 0.5
10 0.2
0.1
0.05
0.02
1 tp
P δ=
T
10−1
single pulse
tp t
T
10−2
10−6 10−5 10−4 10−3 10−2 10−1 1 10
tp (s)
Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration

6. Characteristics
Table 6. Characteristics
Static characteristics
V(BR)DSS drain-source ID = 10 µA; VGS = 0 V; Tj = 25 °C 30 - - V
breakdown voltage ID = 10 µA; VGS = 0 V; Tj = -55 °C 27 - - V
VGS(th) gate-source threshold ID = 1 mA; VDS = VGS; Tj = -55 °C - - 3.2 V
voltage ID = 1 mA; VDS = VGS; Tj = 150 °C 0.4 - - V
ID = 1 mA; VDS = VGS; Tj = 25 °C 1 2 2.8 V
IDSS drain leakage current VDS = 24 V; VGS = 0 V; Tj = 25 °C - 10 100 nA
VDS = 24 V; VGS = 0 V; Tj = 150 °C - 0.6 10 µA
IGSS gate leakage current VGS = 20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA
VGS = -20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA
RDSon drain-source on-state VGS = 4.5 V; ID = 1 A; Tj = 25 °C - 120 200 mΩ
resistance VGS = 10 V; ID = 2.2 A; Tj = 150 °C - - 170 mΩ
VGS = 10 V; ID = 2.2 A; Tj = 25 °C - 80 100 mΩ
IDSon on-state drain current VDS = 1 V; VGS = 10 V 3.5 - - A
VDS = 5 V; VGS = 4.5 V 2 - - A
Dynamic characteristics
QG(tot) total gate charge ID = 2.3 A; VDS = 15 V; VGS = 10 V; - 6 - nC
QGS gate-source charge Tj = 25 °C - 0.7 - nC
QGD gate-drain charge - 0.7 - nC
Ciss input capacitance VDS = 20 V; VGS = 0 V; f = 1 MHz; - 250 - pF
Coss output capacitance Tj = 25 °C - 88 - pF
Crss reverse transfer - 54 - pF
capacitance
td(on) turn-on delay time VDS = 20 V; RL = 18 Ω; VGS = 10 V; - 6 - ns
tr rise time RG(ext) = 6 Ω; Tj = 25 °C - 8 - ns
td(off) turn-off delay time - 21 - ns
tf fall time - 15 - ns
gfs transfer conductance VDS = 20 V; ID = 2.2 A; Tj = 25 °C 2 4.5 - S
LD internal drain measured from drain lead to centre of - 2.5 - nH
inductance die; Tj = 25 °C
LS internal source measured from source lead to source - 5 - nH
inductance bond pad; Tj = 25 °C
Source-drain diode
VSD source-drain voltage IS = 1.25 A; VGS = 0 V; Tj = 25 °C - 0.82 1.2 V
trr reverse recovery time IS = 1.25 A; dIS/dt = -100 A/µs; - 69 - ns
Qr recovered charge VGS = 0 V; VDS = 25 V; Tj = 25 °C - 55 - nC

003aaf069 003aaf070
10 0.5
lD VGS (V) = 20 RDS(on)
10 3.2 3.4 3.6 3.8 4 4.2
(A) (Ω)
8 5 0.4
6 4.2 0.3
4
4 0.2
3.8 VGS (V) = 5
2 3.6 0.1 10
3.4
20
3.2
0 0
0 0.4 0.8 1.2 1.6 2 0 2 4 6 8 10
VDS (V) ID (A)
Tj = 25 °C Tj = 25 °C
Fig 6. Output characteristics: drain current as a Fig 7. Drain-source on-state resistance as a function
function of drain-source voltage; typical values of drain current; typical values
003aaf071 003aaf073
10 6
ID
(A) gfs
8 Tj = 25 °C
(S) Tj = 25 °C
4
6 Tj = 150 °C
Tj = 150 °C
4
2
0 0
0 2 4 6 0 2 4 6 8 10
VGS (V) lD (A)
VDS > ID x RDSon VDS > ID x RDSon

Fig 8. Transfer characteristics: drain current as a Fig 9. Forward transconductance as a function of
function of gate-source voltage; typical values drain current; typical values
003aaf074 003aaf075
2 4
a VGS(th)
(V)
1.5 3
maximum
1 2 typical
0.5 1 minimum
0 0
−50 0 50 100 150 −70 10 90 170
Tj (°C) Tj (°C)
ID = 1 mA; VDS = VGS
Fig 10. Normalized drain-source on-state resistance Fig 11. Gate-source threshold voltage as a function of
factor as a function of junction temperature junction temperature

003aaf076 003aaf077
1 103
ID
(A) C
10−2 (pF)
Ciss
minimum typical maximum
10−3
102
Coss
10−4
Crss
10−5
10−6 10
0 1 2 3 5 10−1 1 10 102
VGS (V) VDS (V)
Tj = 25 °C; VDS = VGS VGS = 0 V; f = 1 MHz

Fig 12. Sub-threshold drain current as a function of Fig 13. Input, output and reverse transfer capacitances
gate-source voltage as a function of drain-source voltage; typical
values
003aaf078 003aaf079
16 10
VGS lF
(V) (A)
8
12
6
8 Tj = 150 °C Tj = 25 °C
4
4
2
0 0
0 2 4 6 8 10 0 0.4 0.8 1.2 1.6
QG (nC) VSDS (V)
ID = 2.3 A; Tj = 25 °C; VDD = 15 V VGS = 0 V

Fig 14. Gate-source voltage as a function of gate Fig 15. Source (diode forward) current as a function of
charge; typical values source-drain (diode forward) voltage; typical
values

7. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
D E A
X
y HE v M A
8 5
Q
A2
(A 3) A
A1
pin 1 index
θ
Lp
1 4 L
e w M detail X
bp
0 2.5 5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ
0.25 1.45 0.49 0.25 5.0 4.0 6.2 1.0 0.7 0.7
mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1
0.10 1.25 0.36 0.19 4.8 3.8 5.8 0.4 0.6 0.3 8o
o
0.010 0.057 0.019 0.0100 0.20 0.16 0.244 0.039 0.028 0.028 0
inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004
0.004 0.049 0.014 0.0075 0.19 0.15 0.228 0.016 0.024 0.012
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION
99-12-27
SOT96-1 076E03 MS-012
03-02-18
Fig 16. Package outline SOT96-1 (SO8)

8. Revision history
Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PHN210T v.2 20101215 Product data sheet - PHN210T v.1
Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
PHN210T v.1 19990301 Product specification - -

9. Legal information
9.1 Data sheet status

Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2 Definitions Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
Draft — The document is a draft version only. The content is still under safety-critical systems or equipment, nor in applications where failure or
internal review and subject to formal approval, which may result in malfunction of an NXP Semiconductors product can reasonably be expected
modifications or additions. NXP Semiconductors does not give any to result in personal injury, death or severe property or environmental
representations or warranties as to the accuracy or completeness of damage. NXP Semiconductors accepts no liability for inclusion and/or use of
information included herein and shall have no liability for the consequences of NXP Semiconductors products in such equipment or applications and
use of such information. therefore such inclusion and/or use is at the customer’s own risk.
Short data sheet — A short data sheet is an extract from a full data sheet Quick reference data — The Quick reference data is an extract of the
with the same product type number(s) and title. A short data sheet is intended product data given in the Limiting values and Characteristics sections of this
for quick reference only and should not be relied upon to contain detailed and document, and as such is not complete, exhaustive or legally binding.
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales Applications — Applications that are described herein for any of these
office. In case of any inconsistency or conflict with the short data sheet, the products are for illustrative purposes only. NXP Semiconductors makes no
full data sheet shall prevail. representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between Customers are responsible for the design and operation of their applications
NXP Semiconductors and its customer, unless NXP Semiconductors and and products using NXP Semiconductors products, and NXP Semiconductors
customer have explicitly agreed otherwise in writing. In no event however, accepts no liability for any assistance with applications or customer product
shall an agreement be valid in which the NXP Semiconductors product is design. It is customer’s sole responsibility to determine whether the NXP
deemed to offer functions and qualities beyond those described in the Semiconductors product is suitable and fit for the customer’s applications and
Product data sheet. products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
9.3 Disclaimers applications and products.
Limited warranty and liability — Information in this document is believed to NXP Semiconductors does not accept any liability related to any default,
be accurate and reliable. However, NXP Semiconductors does not give any damage, costs or problem which is based on any weakness or default in the
representations or warranties, expressed or implied, as to the accuracy or customer’s applications or products, or the application or use by customer’s
completeness of such information and shall have no liability for the third party customer(s). Customer is responsible for doing all necessary
consequences of use of such information. testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
In no event shall NXP Semiconductors be liable for any indirect, incidental, the products or of the application or use by customer’s third party
punitive, special or consequential damages (including - without limitation - lost customer(s). NXP does not accept any liability in this respect.
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such Limiting values — Stress above one or more limiting values (as defined in
damages are based on tort (including negligence), warranty, breach of the Absolute Maximum Ratings System of IEC 60134) will cause permanent
contract or any other legal theory. damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
Notwithstanding any damages that customer might incur for any reason the Recommended operating conditions section (if present) or the
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards Characteristics sections of this document is not warranted. Constant or
customer for the products described herein shall be limited in accordance repeated exposure to limiting values will permanently and irreversibly affect
with the Terms and conditions of commercial sale of NXP Semiconductors. the quality and reliability of the device.
Right to make changes — NXP Semiconductors reserves the right to make Terms and conditions of commercial sale — NXP Semiconductors
changes to information published in this document, including without products are sold subject to the general terms and conditions of commercial
limitation specifications and product descriptions, at any time and without sale, as published at http://www.nxp.com/profile/terms, unless otherwise
notice. This document supersedes and replaces all information supplied prior agreed in a valid written individual agreement. In case an individual
to the publication hereof. agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to product for such automotive applications, use and specifications, and (b)
applying the customer’s general terms and conditions with regard to the whenever customer uses the product for automotive applications beyond
purchase of NXP Semiconductors products by customer. NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
No offer to sell or license — Nothing in this document may be interpreted or liability, damages or failed product claims resulting from customer design and
construed as an offer to sell products that is open for acceptance or the grant, use of the product for automotive applications beyond NXP Semiconductors’
conveyance or implication of any license under any copyrights, patents or standard warranty and NXP Semiconductors’ product specifications.
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may 9.4 Trademarks
be subject to export control regulations. Export might require a prior
authorization from national authorities. Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified, Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
the product is not suitable for automotive use. It is neither qualified nor tested FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
in accordance with automotive testing or application requirements. NXP ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
Semiconductors accepts no liability for inclusion and/or use of QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
non-automotive qualified products in automotive equipment or applications. TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
In the event that customer uses the product for design-in and use in HD Radio and HD Radio logo — are trademarks of iBiquity Digital
automotive applications to automotive specifications and standards, customer Corporation.
(a) shall use the product without NXP Semiconductors’ warranty of the
10. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com

11. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits . . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information . . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .5
6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 11
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
9.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
9.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
10 Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 15 December 2010
Document identifier: PHN210T

PHN210T Data Sheet Dual Chanel Intermediate Level

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Important notice

Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,

Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use

1.1 General description

1.2 Features and benefits

1.4 Quick reference data

[1] Surface mounted on FR4 board, t ≤ 10 sec.

6 D drain2 SOT96-1 (SO8) S1 G1 S2 G2

Product data sheet Rev. 02 — 15 December 2010 2 of 13

[1] Surface mounted on FR4 board, t ≤ 10 sec.

Product data sheet Rev. 02 — 15 December 2010 3 of 13

Ta = 25 °C; IDM is single pulse unclamped inductive load

Product data sheet Rev. 02 — 15 December 2010 4 of 13

Product data sheet Rev. 02 — 15 December 2010 5 of 13

Product data sheet Rev. 02 — 15 December 2010 6 of 13

VDS > ID x RDSon VDS > ID x RDSon

ID = 1 mA; VDS = VGS

Product data sheet Rev. 02 — 15 December 2010 7 of 13

Tj = 25 °C; VDS = VGS VGS = 0 V; f = 1 MHz

ID = 2.3 A; Tj = 25 °C; VDD = 15 V VGS = 0 V

Product data sheet Rev. 02 — 15 December 2010 8 of 13

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

OUTLINE REFERENCES EUROPEAN

Fig 16. Package outline SOT96-1 (SO8)

Product data sheet Rev. 02 — 15 December 2010 9 of 13

Product data sheet Rev. 02 — 15 December 2010 10 of 13

9.1 Data sheet status

Product data sheet Rev. 02 — 15 December 2010 11 of 13

10. Contact information

For sales office addresses, please send an email to: salesaddresses@nxp.com

Product data sheet Rev. 02 — 15 December 2010 12 of 13

© NXP B.V. 2010. All rights reserved.

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