Chapter 6

Design and Implementation of

Chopper-Stabilized Amplifiers

One observation from the two neural amplifiers described in the previous two chap-
ters is the dominance of flicker noise. Most of the existing power-noise optimization
techniques target thermal noise. However, flicker noise is a significant concern
for EMG/EEG/ECoG applications, where the bandwidth of interest is much lower
(<500 Hz) than that of neural applications (∼10 kHz). Therefore, we will devote this
chapter to discussing techniques to combat flicker noise.

6.1 Chopper-Stabilization Technique

The chopper-stabilization technique is widely used to suppress offsets and 1/f noise.
It can be used in applications such as biomedical measurements and human health
monitoring. When the signals of interest fall below a few hundred Hertz, the noise that
plagues the circuit design shifts away from the thermal noise to 1/f and popcorn noise
in transistors [1]. Excess low-frequency noise can undermine the systems signal-to-
noise ratio (SNR) and cause errors to the measurement. As a result, chopper-stabilized
amplifiers can be effectively used at the front-end of these low-bandwidth signal
acquisition applications.

6.1.1 Open-Loop Operation Principle

During open-loop operation, the input signal Vin is up-converted by a CMOS switch
modulator to chopper frequency (above the low-frequency noise corner) before
entering the amplifier. After amplification, a second modulator downconverts the sig-
nal back to baseband while simultaneously upconverting the low-frequency flicker
noise/offset to the chopper frequency. A low-pass filter restores the desired signal
and suppresses the low-frequency noise/offset at the output.
The open-loop architecture contains several limitations. First, transients at the
output of the amplifier caused by the finite bandwidth of the amplifiers result in even
harmonics at the chop frequency, which in turn create distortion and sensitivity error.

J. Holleman et al., Ultra Low-Power Integrated Circuit Design for Wireless Neural Interfaces, 45
DOI 10.1007/978-1-4419-6727-5 6,  c Springer Science+Business Media, LLC 2011
46 6 Design and Implementation of Chopper-Stabilized Amplifiers

Fig. 6.1 Closed-loop Chopper Modulation

chopper-stabilization
technique [1]
OTA
In + Out

–
Up-Conversion
1/f noise
Offsets
1/Ao
Down-Conversion

Excessive power required to ensure sufficient bandwidth increases power overhead.

Secondly, saturation of the amplified offset at the amplifier output limit the first-stage
gain, which in turn undermines the input-referred noise from the second stage.

6.1.2 Closed-Loop Operation Principle

Closed-loop feedback techniques can be used to relax the issues mentioned above
(Fig. 6.1). A few implementations were published earlier [2, 3], among which [1] has
provided the best figure-of-merit to date. In [1], AC feedback paths were employed
to ensure all signals entering the amplifier to be well above 1/f noise corner. This
technique allowed the use of low-noise on-chip capacitors instead of resistors in the
input and feedback signal chains. In addition, he also performed fast modulation
within the transconductance stage prior to integration so that the switching dynam-
ics of the chopper is much faster than the chopping frequency. He demonstrated
the advantage of the closed-loop technique, in which the gain error and sensitivity
are suppressed without further compensation. In addition, he could run the ampli-
fier with low supply overhead to aid in minimizing power without sacrificing noise
performance.

6.2 Design of a Chopper-Stabilized Amplifier

We chose a chopper-stabilized topology to suppress 1/f noise and offsets that plague
submicron CMOS processes. In order to reduce the signal errors created by ampli-
fier’s finite bandwidth, and to relax the headroom constraint on the amplified offsets
under low-supply conditions, we adopted a closed-loop feedback technique previ-
ously proposed by Denison et al. [1]. We will compare and contrast with [1] in the
remainder of this discussion on our prototype chopper-stabilized amplifier.
As shown in Fig. 6.2, a fully-differential closed-loop architecture is used to ensure
sufficient linearity and supply rejection. A telescopic-cascode op-amp topology was
used. Input transistors are biased in weak inversion to maximize the transconduc-
tance efficiency. Dual feedback paths set the mid-band gain of the amplifier through
Cfb ; while another pair biases the amplifier’s input node through high-resistance