DSP Algorithm and architecture

UNIT - 1

INTRODUCTION TO DIGITAL SIGNAL PROCESSING

1. Explain the decimation and interpolation process with an example.

(6marks)(DEC’09-JAN’10) (Dec.12, 6m).
2. The sequence x(n) = [0,3,6,9] is interpolated using interpolation sequence
bk=[1/3, 2/3,1,2/3,1/3] and the interpolation factor of 3. Find the interpolated
sequence y (m). (6marks) (DEC’09-JAN’10)
3. Explain the operation used in DSP to increase the sampling rate. The sequence
x(n)=[0,2,4,6,8] is interpolated using interpolation sequence bk =[1/2,1,1/2] and
the interpolation factor is 2.find the interpolated sequence y(m).(8 marks) (MAY-
JUNE)
4. Why signal sampling is required? Explain the sampling process. (Dec.12, 5m)
5. Explain how to simulate the impulse responses of FIR and IIR filters. (Dec.11, 6m).

6. Explain the digital signal processing system.

UNIT – 2

ARCHITECTURES FOR PROGRAMMABLE DIGITAL SIGNAL-

PROCESSORS

1. What is the role of a shifter in DSP? Explain the implementation of 4-bit shift right
barrel shifter, with a diagram. (6M DEC’09-JAN’10)

2. Identify the addressing modes of the operands in each of the following instructions &
their operation. (8m, DEC’09-JAN’10)

3. Explain the features of a program sequencer unit of a programmable DSP with a neat
block diagram(DEC’09-JAN’10) (Dec.10-Jan.11, 6m)

4. Explain Baugh-wooley multiplier for signed numbers. Show the multiplication

operation for 4x4 signed multiplication.

5. What is meant by circular addressing mode? Write pointer updating algorithm for the
Circular addressing mode and show different cases that encounter during the updating
process of the pointer. (MAY-JUNE 10, 6 marks)
Dept. ECE Page 1
DSP Algorithm and architecture

6. Explain implementation of 8- tap FIR filter, (i) pipelined using MAC units and (ii)
parallel using two MAC units. Draw block diagrams.(8m, MAY-JUNE 10)

7. With a neat block diagram explain ALU of DSP system. (Dec.11, 6m)

8. Give the structure of a 4X4 Braun multiplier, Explain its concept. What modification is
required to carry out multiplication of signed numbers? Comment on the speed of the
multiplier.(Dec.12, 10m)

9. Explain guard bits in a MAC unit of DSP. Consider a MAC unit whose inputs are 24-
bit numbers. How many guard bits should be provided if 512 products have to be added
in the accumulator to prevent overflow condition? What is the overall size of the
accumulator required? (Dec.12, 10m)

10. Explain circular buffer addressing mode ii) Parallelism iii) Guard bits. (Dec.11, 9m)

11. Consider a MAC unit whose inputs are 16 bit numbers. If 256 products are to be
summed up in this MAC, how many guard bits should be provided for the accumulator to
prevent overflow condition from occurring? (Dec 08, 9m).

12. What are the memory addresses of the operands in each of the following cases of
indirect addressing modes? In each case, what will be the content of the addreg after the
memory access? Assume that the initial contents of the addreg and the offsetreg are
0200h and 0010h, respectively. (July.09, 10m).
a. ADD *addreg
b.ADD +*addreg
c. ADD offsetreg+,*addreg
d. ADD *addreg,offsetreg-

13. A DSP has a circular buffer with the start and the end addresses as 0200h and 020Fh
respectively. What would be the new values of the address pointer of the buffer if, in the
course of address computation, it gets updated to
a. 0212h
b. 01FCh(July.09, 10m).

Dept. ECE Page 2