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5 4 3 2 1 Model Name: GA-EP43-DS3 Rev.1.03 SHEET TITLE SHEET TITLE 01 COVER
5
4
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Model Name: GA-EP43-DS3
Rev.1.03
SHEET
TITLE
SHEET
TITLE
01
COVER SHEET
28
AZALIA ALC889A
D
02
BOM & PCB MODIFY HISTORY
29
AUDIO JACK
D
03
BLOCK DIAGRAM
30
VCORE PWM ISL6327
04
POWER MAP
31
DISCRETE POWER
05
P4_LGA775_A
32
ATX POWER
06
P4_LGA775_B
33
JMicron JMB363
07
P4_LGA775_C
34
LAN REALTEK RTL8111B
08
P4_LGA775_D
35
FRONT PANEL,FUSB,FDD
09
GMCH-BEARLAKE_HOST
C
C
10
GMCH-BEARLAKE_DDRII
11
GMCH-BEARLAKE_PCI E, DMI
12
GMCH-BEARLAKE_INT VGA
13
GMCH-BEARLAKE_GND
14
GMCH-BEARLAKE_PWR
15
DDRII CHANNEL A 1,2
PWM各相位的擺法如下 :
16
DDRII CHANNEL B 1,2
17
DDRII TERMINATION
PH1
PH3
B
DU10
DU11
B
18
PCI EXPRESS*16 SLOT
19
ICH9 PCI, USB, DMI, LAN
PH4
DU12
20
ICH9 GPIO, CTRL
N/B
CPU
21
ICH9 SATA, FAN PWM
22
ICH9 VCC, GND
PH2
23
CLOCK GEN CK505
S/B
DU13
24
PCI EXPRESS*1 ,PCI SLOT 1,2
25
ITE8718/GB,RESET DRIVE
A
A
26
COM,LPT
27
BIOS,CI,HWM,KB/MS
Gigabyte Technology
Gigabyte Technology
Gigabyte Technology
Title
Title
Title
Cover Sheet
Cover Sheet
Cover Sheet
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
Custom
Custom
Custom
1.03
1.03
1.03
Date:
Date:
Date:
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Sheet
Sheet
Sheet
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5 4 3 2 1 Circuit or PCB layout change for next version Model Name:
5
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1
Circuit or PCB layout change
for next version
Model Name: GA-EP43-DS3
Rev.1.03
DATE
Change Item
Reason
0.1
0118 EVT RELEASE
D
D
0.2
1. CPU FSB & DDR TRACE (請貼 EP45-DS3R Rev1.01 Layout)
Component value change history
2. CONNECT IDE1 --> IDE
3. RCA_SPDIF --> R_SPDIF
Data
Change Item
Reason
4. UPDATE FOOTPRINT : H1X3FAN-1 , H1X4P-FAN-1 ,
PCIESLOT-164DN-3
0.1 1.
P43 CHIPSET
5. 文字面 " DualBIOS"
2.
2N7002 DII REMOVE
6. - SLP_S3 CONTROL PWROK1 CIRCUIT (擺放位置同 EP45-DS3R Rev1.01)
3.
RTL8111C REV.B -- >REV.C
7. ADD LAN_DSM DETECT (擺放位置同 EP45-DS3R Rev1.01)
4.
DES阻值調整
8. ADD VCC_PLL1 RN33 & R396 (擺放位置同 EP45-DS3R Rev1.01)
0.2 1.
ICH --> ICH10
9. 預 留 DTR2- R13 P-DOWN (擺放位置同 EP45-DS3R Rev1.01)
2.
ADD R355,R357 8.2K/4 FOR PCIEX4
10. 預 留 C236 -CPURST Bypass (擺放位置同 EP45-DS3R Rev1.01)
C
10A
1.
包材修改
C
11. POWER PACK CHANGE TO Q-TDSON8-GDS-3
2.
REMOVE BC26 0.1u/4
12. CI & PWR_LED擺放位置分開
3.
REMOVE C132,C133 22P/4
4.
ADD LBC6 100P/4
13. ADD R534 FOR +12V SHORT PROTECT
14. ADD LBC47 FOR USB_LANPIN.L1
1.
文字面 "PCIEX8" , "NB_HS"
15. "VCC1_25V_UV1" & "DDR18V_UV1" 對調
3.
"USB_1394_1" & " USB_1394_2" SWAP
16. ADD R548,Q106 FOR "FORCE 400MHz CPU TO 333MHz"
4.
ADD TPM -PCIRST TC6=33P/4
17. 文字面 :EP43-DS3,EP43-DS3R,EP45-DS3A
5.
DR130 169K/4/1
18. 文字面 "Ultra TPM"
10B
1.
LED_PWR MODUFY
1.0
1. 文字面 "PCIEX16_2" --> "PCIEX4_1"
2.
"+12V_ISEN" --> "VCC_PLL1" SHORT PROTECT
3.
PCB REV1.02
2. ADD TPM -PCIRST TC6=33P/4
B
B
10C
1.
GPIO16 R56 1K/4 REMOVE
3. "USB_1394_1" & " USB_1394_2" SWAP
2.
DR130 169K/4/1 --> 121K/4/1 (PWM=200KHz)
4. DDR18V_OV1,DDR18V_OV2,DDR18V_OV3 & VTT_GMCH_UV1,VTT_GMCH_UV2 SWAP
3.
Q61,Q97,Q16,Q17加替 料 10IF4-074860-01R
5. DR172,DR173,DR174,DR175 PULL-UP POWER From "VCC" ' "+12V"
10D
1.
PCB REV1.02 --> REV1.03
6. L4 的位置轉 45度 ,文字面要改成和 L6 一樣
2.
增加 CPU_FAN +12V POWER CE3=100uF
7. CLR_CMOS PIN1方向
3.
增加 U15 upi6262 VCC Power (R620,R621,Q107)
8. BC50 移至 C85的上方
1.03
10E
1.
U15 upi6262 change to "VCC" power
9. EC20 移除 ,改成 Q103
2. 增加 upi6262 VCC Power (R620,R621,Q107)
10F
1.
包材修改
10. ADD C273 FOR USB POWER
3. 增加 PWM_VID5 & 8268_VID5電阻 (R385)
1.01
1. ADD LL1 POWER NET "AVDD18"
2.
X1-SHT --> X2-SHT
4. DC27,LBC31 "C0603-RH" --> "C0402-2"
1.02
1. CPU_FAN , PWR_FAN 轉向 180度
5. EP43-DS3,EP43-DS3R 文字面修改 -->
3.
USB_LAN替 料 移除 11NR6-702009-92R
"FSB1333" , "DDR1066"
2. DU8 PIN17接 GND
A
A
3. LED_PWR MODUFY
4. "+12V_ISEN" --> "VCC_PLL1" SHORT PROTECT
Gigabyte Technology
Gigabyte Technology
Gigabyte Technology
Title
Title
Title
BOM & PCB MODIFY HISTORY
BOM & PCB MODIFY HISTORY
BOM & PCB MODIFY HISTORY
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
Custom
Custom
Custom
1.03
1.03
1.03
Date:
Date:
Date:
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Wednesday, May 14, 2008
Sheet
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1. 增加 CPU_FAN +12V POWER CE3=100uF (擺放位置先靠

5 4 3 2 1 BLOCK DIAGRAM INTEL Pentium4 LGA775 D D CLOCK GENERATOR PCI
5
4
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BLOCK DIAGRAM
INTEL Pentium4
LGA775
D
D
CLOCK GENERATOR
PCI EXPRESS X16
PCIE-16
CHANNEL A
GMCH BROADWATER
DDRII
DIMM X 2
CHANNEL B
DDRII BUS
DDRII DIMM X 2
MARVELL LAN 8053
C
C
PCI-E X1
SPI BUS
PCI-E X1
SPI BIOS
PCI EXPRESS X1
ICH8
USB 2.0
USB PORTS 0~9
PCI
SATAII
SERIAL ATA
AZALIA BUS
II X4
IDE RAID IT8212
B
B
LPC BUS
PCI
FWH BIOS
PCI SLOT 1,2
LPC BUS
AZALIA ALC883
LPC I/O ITE8712GB-IX
AUDIO PORTS :
FRONT AUDIO
LIN_ OUT
LINE_IN
MIC CD_IN
SURR
SURR BACK
CEN/LFE
I/O PORTS :
A
A
FRONT PANEL /CPU FAN
COMA COMB LPT KB/PS2 FDD
Gigabyte Technology
Gigabyte Technology
Gigabyte Technology
Title
Title
Title
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
Custom
Custom
Custom
1.03
1.03
1.03
Date:
Date:
Date:
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Sheet
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5 4 3 2 1 ICH8 GPIO LIST TABLE PIN NAME PWR WELL AFTER/ USAGE
5
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ICH8 GPIO LIST TABLE
PIN NAME
PWR WELL
AFTER/
USAGE
NOTE
VCORE:6 PHASE PWM--ISL6327CRZ
PLTRST
GP0
MAIN
IN
-ACZ_DET
P/U 8.2K VCC3
V12
VCC
5VDUAL
GP1/TACH1
MAIN
IN
ICH_FAN_TACH1
P/U 8.2K VCC3
VCC3_DAC
PH1
DDR18V
GP2/PIRQE#
MAIN
IN
-PIRQE
P/U 8.2K VCC3
MOSFET
PH1
GP3/PIRQF#
MAIN
IN
-PIRQF
P/U 8.2K VCC3
ISL6327
PH2
ISL6545CRZ
DDR18V
D
D
GP4/PIRQG#
MAIN
IN
-PIRQG
P/U 8.2K VCC3
PWMx6
VCORE
VCC1_5
PH3
GP5/PIRQH#
MAIN
IN
-PIRQH
P/U 8.2K VCC3
VCC
MOSFET
GP6/TACH2
MAIN
IN
ICH_FAN_TACH2
P/U 8.2K VCC3
PH4
VCC1_25
LM324
DDR18V
GP7/TACH3
MAIN
IN
ICH_FAN_TACH3
P/U 8.2K VCC3
PH5
PH1
VTT_GMCH
GP8
STBY
IN
GPIO8(DUALBIOS_INPUT) P/U 8.2K 3VDUAL
ISL6545CRZ
MOSFET
GP9
STBY
OUT
WOL_ONLY
P/D 100K GND
PH6
DDR18V
GP10
STBY
IN
CLGPIO1
P/U 8.2K 3VDUAL
DDR18V
VCC1_05
GP11/SMBALERT#
STBY
OUT
-SMBALRT
P/U 8.2K 3VDUAL
MOSFET
DDRVTT
GP12
STBY
IN
MB_ID0
P/U 8.2K 3VDUAL
RT9199
L(I)
GP13
STBY
IN
-LPCPME
P/U 8.2K 3VDUAL
GP14
STBY
IN
CLGPIO2
P/U 8.2K 3VDUAL
GP15
STBY
OUT
LAN_DISABLE(STP_PCI-) N/A
VTT_OR
C
C
GP16
MAIN
OUT/LOW
RESET
N/A
VTT_GMCH
5VSB
GP17/TACH0
MAIN
IN
ICH_FAN_TACH0
P/U 8.2K VCC3
5VDUAL
3VDUAL
CPU
VTT_OL
GP18
MAIN
OUT
MB_ID1
P/U 8.2K VCC3
LDO1084
GP19
MAIN
IN
SATA1GP
P/U 8.2K VCC3
VCC
GP20
MAIN
OUT
-SPI_WP0
P/U 1K 3VCL
GP21
MAIN
IN
SATA0GP
P/U 8.2K VCC3
GP22
MAIN
IN
SCLOCK
P/U 8.2K VCC3
GP23
MAIN
OUT
-LDRQ1
P/U 8.2K VCC3
GP24
STBY
OUT
CLGPIO0
P/U 8.2K 3VDUAL
GP25
STBY
IN
MB_ID2(STP_CPU-) P/U 8.2K 3VDUAL
GP26/S4_STATE#
STBY
OUT
S4_STATE#
P/U 8.2K 3VDUAL
B GP27
STBY
OUT/LOW GPIO27(EL_STATE0) P/U 8.2K 3VDUAL
B
GP28
STBY
OUT/LOW PWR_LED(EL_STATE1)
N/A
GP29/OC5#
STBY
IN
-USBOC_R
P/U FUSEVCC
GP30/OC6#
STBY
IN
-USBOC_R
P/U FUSEVCC
GP31/OC7#
STBY
IN
-USBOC_R
P/U FUSEVCC
GP32
MAIN
OUT
DUAL_BIOS
P/U 100K+1M VCC3
GP33
MAIN
OUT
DUAL_BIOS
P/U 8.2K VCC3
GP34
MAIN
OUT/LOW
GPIO34/SMB_RST
N/A
GP35
MAIN
OUT
SATACLKREQ#
N/A
GP36
MAIN
IN
SATA2GP
P/U 8.2K VCC3
GP37
MAIN
IN
SATA3GP
P/U 8.2K VCC3
GP38
MAIN
IN
SLOAD
P/U 8.2K VCC3
A GP39
MAIN
IN
GPIO39
P/D 8.2K GND
A
GP48
MAIN
IN
GPIO48
P/U 8.2K VCC3
Gigabyte Technology
GP49
MAIN
IN
CPUPWROK
P/U 100 VTT_OL
Title
Title
Title
TABLE LIST
TABLE LIST
TABLE LIST
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
B
B
B
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
1.03
1.03
1.03
Date:
Date:
Date:
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Sheet
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5 4 3 2 1 0.667 X VTT FOR LGA775 PIN H2/F2 R239 R239 49.9/4/1
5
4
3
2
1
0.667
X VTT FOR LGA775 PIN H2/F2
R239
R239
49.9/4/1
49.9/4/1
GTLREF1
VTT_OR
R217
R217
C117
C117
100/4/1
100/4/1
1u/6/Y5V/10V/Z
1u/6/Y5V/10V/Z
0.635
X VTT FOR LGA775 PIN H1/G10
R240
R240
57.6/4/1
57.6/4/1
GTLREF0
VTT_OR
GTLREF0
31
R218
R218
C118
C118
D
D
100/4/1
100/4/1
1u/6/Y5V/10V/Z
1u/6/Y5V/10V/Z
HA/REQ:50歐姆 +-15% [ 4/11 ]
ADSTB:50歐姆 +-15% [4/14]
LGA775A
LGA775A
HA[3 16]
9
HA[3 16]
HA3
-HADS
R235
R235
62/4
62/4
-IERR
L5
D2
A<3>*
ADS*
-HADS
9
VTT_OR
HA4
LGA775
LGA775
-BNR
P6
C2
A<4>*
BNR*
-BNR
9
HA5
-HIT
M5
D4
A<5>*
HIT*
-HIT
9
HA6
(1/8)
(1/8)
TP_CPU17TP_CPU17
R215
R215
62/4
62/4
-BR0
L4
H4
A<6>*
RSP*
VTT_OL
HA7
-BPRI
M4
G8
A<7>*
BPRI*
-BPRI
9
HA8
-DBSY
R4
B2
A<8>*
DBSY*
-DBSY
9
HA9
-DRDY
R234
R234
62/4
62/4
-CPURST
T5
C1
A<9>*
DRDY*
-DRDY
9
VTT_OR
HA10
-HITM
U6
E4
A<10>*
HITM*
-HITM 9
HA11
-IERR
T4
AB2
A<11>*
IERR*
HA12
-HINIT
RN10RN10
62/8P4R/462/8P4R/4
U5
P3
A<12>*
INIT*
-HINIT
22
HA13
-HLOCK
TESTHI9
U4
C3
7
8
A<13>*
LOCK*
-HLOCK
9
VTT_OL
HA14
-HTRDY
TESTHI10
V5
E3
5
6
A<14>*
TRDY*
-HTRDY
9
HA15
TP_CPU18TP_CPU18
TESTHI8
V4
AD3
3
4
A<15>*
BINIT*
HA16
-DEFER
W5
G7
1
2
A<16>*
DEFER*
-DEFER
9
N4
TP_CPU19TP_CPU19
RSVD_3
P5
AB3
TP_CPU20TP_CPU20
RSVD_4
MCERR*
-HREQ0
K4
9
-HREQ0
REQ<0>*
-HREQ1
J5
U2
9
-HREQ1
TP_CPU1TP_CPU1
REQ<1>*
AP<0>*
-HREQ2
M6
U3
TP_CPU2TP_CPU2
9
-HREQ2
REQ<2>*
AP<1>*
-HREQ3
K6
9
-HREQ3
REQ<3>*
-HREQ4
-BR0
J6
F3
9
-HREQ4
REQ<4>*
BR<0>*
-BR0
9
-HADSTB0
TESTHI8
CR
CR
R6
G3
9
-HADSTB0
ADSTB<0>*
TESTHI_8
C
HA[17 35]
C
HA17
TESTHI9
CPU RETAINTION/X
CPU RETAINTION/X
AB6
G4
9 HA[17 35]
A<17>*
TESTHI_9
HA18
TESTHI10
W6
H5
A<18>*
TESTHI_10
HA19
Y6
A<19>*
HA20
Y4
A<20>*
HA21
AA4
J16
TP_CPU3TP_CPU3
A<21>*
DP<0>*
HA22
AD6
H15
TP_CPU4TP_CPU4
A<22>*
DP<1>*
HA23
AA5
H16
TP_CPU5TP_CPU5
A<23>*
DP<2>*
HA24
C111C111220p/4/NPO/50V/J/X220p/4/NPO/50V/J/X
AB5
J17
TP_CPU6TP_CPU6
A<24>*
DP<3>*
HA25
C110C110220p/4/NPO/50V/J/X220p/4/NPO/50V/J/X
AC5
A<25>*
HA26
GTLREF0
AB4
H1
A<26>*
GTLREF0
HA27
GTLREF1
AF5
H2
A<27>*
GTLREF1
HA28
AF4
E24
TP_CPU22TP_CPU22
A<28>*
GTLREF2
HA29
AG6
H29
TP_CPU7TP_CPU7
A<29>*
GTLREF_SEL
HA30
AG4
A<30>*
HA31
-CPURST
AG5
A<31>*
HA32
-CPURST
AH4
G23
A<32>*
RESET*
-CPURST
9
HA33
C236
C236
AH5
A<33>*
HA34
1n/4/X7R/50V/K/X
1n/4/X7R/50V/K/X
AJ5
A<34>*
HA35
-RS0
AJ6
B3
A<35>*
RS<0>*
-RS0
9
-RS1
AC4
F5
RSVD_1
RS<1>*
-RS1
9
-RS2
AE4
A3
RSVD_2
RS<2>*
-RS2
9
-HADSTB1
AD5
9
-HADSTB1
ADSTB<1>*
SP-CAP X 3PCS
CPU-SK/775/S/15
CPU-SK/775/S/15
VCORE
GTLREF0
+12V
2N7002/SOT23/25pF/5
2N7002/SOT23/25pF/5
B
SEC1
SEC1
SEC2
SEC2
SEC3
SEC3
R219
R219
0/4
0/4
B
GTLREF3
7
D
D
R255
R255
Q34
Q34
100U/2V/SPCAP/X
100U/2V/SPCAP/X
100U/2V/SPCAP/X
100U/2V/SPCAP/X
1K/4
1K/4
G
G
S
S
100U/2V/SPCAP/X
100U/2V/SPCAP/X
VCC3
MMBT2222A/SOT23/600mA/40
MMBT2222A/SOT23/600mA/40
R245
R245
Q35
Q35
1.3K/4/1
1.3K/4/1
Impedance=50 +- 15% for 4 -layer
R283
R283
VCORE
1K/4
1K/4
SOT23
SOT23
26
GTLREF_UV0
BC53
BC53
BC55
BC55
BC38
BC38
BC39
BC39
GTLREF1
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
+12V
2N7002/SOT23/25pF/5
2N7002/SOT23/25pF/5
R216
R216
0/4
0/4
GTLREF2
7
D
D
R254
R254
Q31
Q31
1K/4
1K/4
G
G
S
S
VCC3
VCORE
MMBT2222A/SOT23/600mA/40
MMBT2222A/SOT23/600mA/40
R241
R241
Q32
Q32
576/4/1
576/4/1
R277
R277
1K/4
1K/4
SOT23
SOT23
26
GTLREF_UV1
BC36
BC36
BC35
BC35
BC56
BC56
BC57
BC57
CPU GTLREF RATIO
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
A
GTLREF_UV0
GTLREF_UV1
Ratio Set
A
HIGH
HIGH
0.67
VCORE
LOW
HIGH
0.65
Gigabyte Technology
Gigabyte Technology
Gigabyte Technology
HIGH
LOW
0.63
Title
Title
Title
BC48
BC48
BC37
BC37
BC54
BC54
BC41
BC41
BC47
BC47
BC40
BC40
P4_LGA775-A
P4_LGA775-A
P4_LGA775-A
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
10u/8/X5R/6.3V/K
LOW
LOW
0.615
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
Custom
Custom
Custom
1.03
1.03
1.03
Date:
Date:
Date:
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Sheet
Sheet
Sheet
5
5
5
of
of
of
38
38
38
5
4
3
2
1
+
+
+
+
+
+
2
2
3
3
1
1
2
2
3
3
1
1
5 4 3 2 1 LGA775B LGA775B HD[0 15] HD[32 47] RN6RN6 470/8P4R/4470/8P4R/4 9 HD[0
5
4
3
2
1
LGA775B
LGA775B
HD[0 15]
HD[32 47]
RN6RN6
470/8P4R/4470/8P4R/4
9
HD[0 15]
HD[32
47]
9
HD0
B4
G16
HD32
7
8
FSBSEL0
D<0>*
D<32>*
VTT_GMCH
HD1
C5
LGA775
LGA775
E15
HD33
FSBSEL1
5
6
D<1>*
D<33>*
HD2
A4
E16
HD34
FSBSEL2
3 4
D<2>*
D<34>*
HD3
C6
(2/8)
(2/8)
G18
HD35
1 2
D<3>*
D<35>*
HD4
A5
G17
HD36
D<4>*
D<36>*
HD5
RN12RN12
62/8P4R/462/8P4R/4
B6
F17
HD37
D<5>*
D<37>*
HD6
B7
F18
HD38
7
8
-BPM1
D<6>*
D<38>*
VTT_OR
HD7
A7
E18
HD39
-BPM5
5
6
D<7>*
D<39>*
HD8
A10
E19
HD40
-BPM3
3 4
D<8>*
D<40>*
HD9
A11
F20
HD41
1 2
-BPM4
D<9>*
D<41>*
HD10
B10
E21
HD42
7
8
-BPM2
D<10>*
D<42>*
D
HD11
C11
F21
HD43
C130
C130
TDI
5
6
D
D<11>*
D<43>*
HD12
D8
G21
HD44
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
3 4
-BPM0
D<12>*
D<44>*
HD13
B12
E22
HD45
1 2
TMS
D<13>*
D<45>*
HD14
C12
D22
HD46
RN11RN11
62/8P4R/462/8P4R/4
D<14>*
D<46>*
HD15
D11
G22
HD47
D<15>*
D<47>*
-DBI0
A8
D19
-DBI2
R229
R229
62/4
62/4
TDO
9
-DBI0
DB1<0>*
DBI<2>*
-DBI2
9
STBN0
C8
G20
STBN2
R250
R250
1K/4
1K/4
VR_RDY
9
STBN0
DSTBN<0>*
DSTBN<2>*
STBN2
9
HD[16 31]
STBP0
STBP2
HD[48 63]
B9
G19
9
HD[16
31]
9
STBP0
DSTBP<0>
DSTBP<2>
STBP2 9
HD[48
63]
9
HD16
G9
D20
HD48
R231
R231
62/4
62/4
-TRST
D<16>*
D<48>*
HD17
R230
R230
62/4
62/4
F8
D17
HD49
TCK
D<17>*
D<49>*
HD18
F9
A14
HD50
D<18>*
D<50>*
HD19
E9
C15
HD51
D<19>*
D<51>*
HD20
D7
C14
HD52
D<20>*
D<52>*
HD21
E10
B15
HD53
FSBSEL0
R100
R100
8.2K/4/X
8.2K/4/X
BSEL0
D<21>*
D<53>*
24
FSBSEL0
BSEL0
12
HD22
HD54
FSBSEL1
R97
R97
8.2K/4/X
8.2K/4/X
D10
C18
BSEL1
D<22>*
D<54>*
24
FSBSEL1
BSEL1
12
HD23
F11
B16
HD55
FSBSEL2
R94
R94
8.2K/4/X
8.2K/4/X
BSEL2
D<23>*
D<55>*
24
FSBSEL2
BSEL2
12
HD24
F12
A17
HD56
D<24>*
D<56>*
HD25
D13
B18
HD57
D<25>*
D<57>*
HD26
E13
C21
HD58
D<26>*
D<58>*
HD/DBI:42歐姆 [6/12]
HD27
G13
B21
HD59
D<27>*
D<59>*
HD28
F14
B19
HD60
D<28>*
D<60>*
DSTBP:42歐姆 [23/6/8/6/23]
HD29
G14
A19
HD61
D<29>*
D<61>*
VTT_GMCH
HD30
F15
A22
HD62
D<30>*
D<62>*
HD31
G15
B22
HD63
FOR ALL DDR CLK RATIO
D<31>*
D<63>*
-DBI1
G11
C20
-DBI3
9
-DBI1
DB1<1>*
DBI<3>*
-DBI3
9
STBN1
G12
A16
STBN3
9
STBN1
DSTBN<1>*
DSTBN<3>*
STBN3
9
STBP1
E12
C17
STBP3
R95
R95
9
STBP1
DSTBP<1>
DSTBP<3>
STBP3 9
1K/4
1K/4
R96
R96
8.2K/4
8.2K/4
BSEL11
BSEL1
CPU-SK/775/S/15
CPU-SK/775/S/15
BSEL11
VTT_GMCH
D D
VTT_GMCH
Q14
Q14
LGA775D
LGA775D
2N7002/SOT23/25pF/5
2N7002/SOT23/25pF/5
G
G
S S
C
A29
C
VTT_1
TCK
AE1
LGA775
LGA775
SOT23
SOT23
B25
Q10
Q10
TCK
VTT_2
TDI
AD1
B29
R89
R89
MMBT2222A/SOT23/600mA/40
MMBT2222A/SOT23/600mA/40
TDI
VTT_3
TDO
(4/8)
(4/8)
470/4
470/4
AF1
B30
TDO
VTT_4
TMS
SOT23
SOT23
AC1
C29
TMS
VTT_5
26
BSEL166_3
-TRST
AG1
A26
TRST*
VTT_6
-BPM0
AJ2
B27
BPM<0>*
VTT_7
-BPM1
AJ1
C28
FSBSEL1
BPM<1>*
VTT_8
26 BSEL166_2
-BPM2
AD2
A25
BPM<2>*
VTT_9
-BPM3
AG2
A28
BPM<3>*
VTT_10
VTT_GMCH
-BPM4
AF2
A27
BPM<4>*
VTT_11
-BPM5
AG3
C30
BPM<5>*
VTT_12
-SYS_RST
AC2
A30
21,24,31,35
-SYS_RST
DBR*
VTT_13
AK3
C25
ITPCLK<0>
VTT_14
AJ3
C26
R98
R98
ITPCLK<1>
VTT_15
FSBSEL0
G29
C27
1K/4
1K/4
R99
R99
BSEL<0>
VTT_16
FSBSEL1
H30
B26
8.2K/4
8.2K/4
BSEL<1>
VTT_17
FSBSEL2
G30
D27
BSEL00
BSEL0
BSEL<2>
VTT_18
N5
D28
BSEL00
SPARE0
VTT_19
H_BPM1
C9
D25
SPARE1
VTT_20
E7
D26
TP_CPU21TP_CPU21
SPARE2
VTT_21
R223
R223
AE6
B28
SPARE4
VTT_22
VTT_GMCH
1K/4/X
1K/4/X
D16
D29
Q15
Q15
NC_DSS2
VTT_23
2N7002/SOT23/25pF/5
2N7002/SOT23/25pF/5
A20
D30
NC_DSS3
VTT_24
D
D
E23
AM6
VR_RDY
NC
VTT_PWRGD
VR_RDY
31
AA1
Q11
Q11
VTT_OUT_1
VTT_OR
G
G
S
S
J1
R90
R90
MMBT2222A/SOT23/600mA/40
MMBT2222A/SOT23/600mA/40
VTT_OUT_2
VTT_OL
SOT23
SOT23
F27
470/4
470/4
VTT_SEL
VTTSEL 32
SOT23
SOT23
F23
EXTBGREF
26
BSEL166_3
D14
SFRANAD
E6
SFRANAC
E5
DCLKPH
26
BSEL166_1
J3
FSBSEL0
ACLKPH
D1
HFPLL
VTT_GMCH
B
B
R236
R236
62/4
62/4
H_BPM1
VTT_OL
CPU-SK/775/S/15
CPU-SK/775/S/15
R92
R92
1K/4
1K/4
R93
R93
8.2K/4
8.2K/4
4X Length Guidelines for Quad core processors
Signal Name ATX Layer Pin to Pin
D[15:0]#, DBI0#, DSTBP0#, DSTBN0# Layer 1 2.2” - 2.7”
BSEL22
BSEL2
BSEL22
D[31:16]#, DBI1#, DSTBP1#, DSTBN1# Layer 4 3.0” - 3.5
D[47:32]#, DBI2#, DSTBP2#, DSTBN2# Layer 4 3.6” - 4.3
D[63:48]#, DBI3#, DSTBP3#, DSTBN3# Layer 1 2.4” - 3.0
VTT_GMCH
Q13
Q13
2N7002/SOT23/25pF/5
2N7002/SOT23/25pF/5
D
D
Q12
Q12
G
G
S
S
R91
R91
MMBT2222A/SOT23/600mA/40
MMBT2222A/SOT23/600mA/40
SOT23
SOT23
470/4
470/4
SOT23
SOT23
26
BSEL166_3
26
BSEL166_4
FSBSEL2
?
FSA
FSB
FSC
FSBSEL0
FSBSEL1
FSBSEL2
Clock
FSBSEL1
?
1
0
1
100MHz
?
1
0
0
133MHz
3/4
400/533
A
A
Q106
Q106
G33
0
1
0
200MHz
2/2.66/3.33/4+
400/533/667/800
R548
R548
MMBT2222A/SOT23/600mA/40/X
MMBT2222A/SOT23/600mA/40/X
470/4/X
470/4/X
G33
0
0
0
266MHz
2/2.5/3/4~
533/667/800/1066
FSBSEL2
SOT23
SOT23
G33
0
0
1
333MHz
2/2.4/3.2/4#
667/800/1066/1333
0
1
1
400MHz
FORCE 400MHz CPU TO
333MHz
Gigabyte Technology
Gigabyte Technology
Gigabyte Technology
Title
Title
Title
P4_LGA775-B,D
P4_LGA775-B,D
P4_LGA775-B,D
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
Custom
Custom
Custom
1.03
1.03
1.03
Date:
Date:
Date:
Friday, May 09, 2008
Friday, May 09, 2008
Friday, May 09, 2008
Sheet
Sheet
Sheet
6
6
6
of
of
of
38
38
38
5
4
3
2
1
2
3
1
2
2
3
3
2
1
1
3
1
2
3
2
2
1
3
3
1
1
5 4 3 2 1 Place outside of CPU socket R225 R225 49.9/4/1/X 49.9/4/1/X PM_DPRSTP
5
4
3
2
1
Place outside of CPU socket
R225
R225
49.9/4/1/X
49.9/4/1/X
PM_DPRSTP
VTT_OL
R201
R201
49.9/4/1/X
49.9/4/1/X
COMP4
Note:
R199
R199
49.9/4/1
49.9/4/1
COMP2
COMP4~7 可以 不 上
R202
R202
49.9/4/1
49.9/4/1
COMP3
VCCA & VCOREPLL
C112
C112
R168
R168
49.9/4/1
49.9/4/1
COMP0
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
R203
R203
49.9/4/1
49.9/4/1
COMP1
VTT_GMCH
L1
L1
define doesn't same as
old P4 design kit
10UH/8/S/[10LI2-12100A-13R_10LI2-12100A-02R]
10UH/8/S/[10LI2-12100A-13R_10LI2-12100A-02R]
D
D
VCCA
R207
R207
1K/4
1K/4
COMP6
VTT_OR
R208
R208
49.9/4/1/X
49.9/4/1/X
COMP7
R101
R101
R164
R164
24.9/4/1
24.9/4/1
COMP8
C25
C25
C115
C115
1u/6/Y5V/10V/Z
1u/6/Y5V/10V/Z
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
0/6/SHT-30/MASK/X
0/6/SHT-30/MASK/X
VSSA
Trace width doesn't
less than 12 Mil
VTT_GMCH
C28
C28
R104
R104
62/4
62/4
TESTHI2_7
1u/6/Y5V/10V/Z/X
1u/6/Y5V/10V/Z/X
C33
C33
VCOREPLL
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
R232
R232
62/4
62/4
-THRMTRIP
L2
L2
R233
R233
62/4
62/4
-FERR
LGA775C
LGA775C
10UH/8/S/[10LI2-12100A-13R_10LI2-12100A-02R]
10UH/8/S/[10LI2-12100A-13R_10LI2-12100A-02R]
As close as possible to
CPU socket
-SMI
TESTHI0
R103
R103
62/4
62/4
TESTHI0
P2
F26
22
-SMI
SMI*
TESTHI_0
-A20M
TESTHI1
K3
LGA775
LGA775
W3
22
-A20M
A20M*
TESTHI_1
-FERR
TESTHI2_7
R3
F25
22
-FERR
FERR*/PBE*
TESTHI_2
INTR
(3/8)
(3/8)
R221
R221
51/4/X
51/4/X
PM_SLP_N
K1
G25
22
INTR
LINT0
TESTHI_3
VTT_OL
NMI
R226
R226
62/4
62/4
TESTHI1
L1
G27
22
NMI
LINT1
TESTHI_4
-IGNNE
R224
R224
51/4/X
51/4/X
H_DPSLP_N
N2
G26
22 -IGNNE
IGNNE*
TESTHI_5
-STPCLK
-STPCLK
M3
G24
22
-STPCLK
STPCLK*
TESTHI_6
VCCA
A23
F24
VCCA
TESTHI_7
VSSA
H_DPSLP_N
R222
R222
100/4/1/X CPUPWROK
100/4/1/X
B23
P1
C
VSSA
TESTHI_11
H_DPSLP_N
21
C
C113
C113
VCOREPLL
TESTHI_M
C114
C114
1n/4/X7R/50V/K/X
1n/4/X7R/50V/K/X
C23
W2
VCCIOPLL
TESTHI_12
33p/4/NPO/50V/J/X
33p/4/NPO/50V/J/X
VID[0 7]
VCC_PLL
PM_SLP_N
D23
L2
31 VID[0 7]
VCC_PLL
TESTHI_13
PM_SLP_N 12
VID0
-FORCEPR
R220
R220
62/4
62/4
H_BPM0
AM2
AK6
VID<0>
FORCEPH
-FORCEPR
27
VID1
CPUPWROK
AL5
N1
VID<1>
PWRGOOD
CPUPWROK
21
VID2
-PROCHOT
R204
R204
62/4
62/4
TESTHI_M
AM3
AL2
VID<2>
PROCHOT*
-PROCHOT
21,27
VID3
-THRMTRIP
AL6
M2
VID<3>
THERMTRIP*
-THRMTRIP
22
VID4
COMP0
RN13RN13
680/8P4R/4680/8P4R/4
AK4
A13
VID<4>
COMP<0>
VID5
COMP1
VID3
AL4
T1
7
8
VID<5>
COMP<1>
VTT_OR
VID6
COMP2
VID2
AM5
G2
5
6
VID<6>
COMP<2>
VID7
COMP3
VID5
AM7
R1
3
4
VID<7>
COMP<3>
VRD_SEL
COMP4
VID4
AN7
J2
1
2
31
VRD_SEL
VID_SELECT
COMP<4>
CPUCLK
PM_DPRSTP
F28
T2
24
CPUCLK
BCLK<0>
COMP<5>
PM_DPRSTP 12,21
-CPUCLK
COMP6
R206
R206
0/4
0/4
RN14RN14
680/8P4R/4680/8P4R/4
G28
Y3
24
-CPUCLK
BCLK<1>
COMP<6>
-PSI
31
-SKTOCC
COMP7
VID6
AE8
AE3
7
8
21
-SKTOCC
SKTOCC*
COMP<7>
R189R189
0/4/SHT/X0/4/SHT/X
COMP8
VID7
AL1
B13
5
6
26,28
CPU_TEMP
THERMDA
COMP<8>
R190R190
0/4/SHT/X0/4/SHT/X
H_BPM0
VID1
AK1
G1
3
4
26 THERMDC
THERMDC
RC1
TESTHI_M
VID0
AJ7
U1
1
2
THERMDA_2
RC2
R102
R102
1K/4/X
1K/4/X
AH7
A24
THERMDC_2
RC4
C98
C98
C97
C97
R251
R251
1K/4
1K/4
VRD_SEL
AN3
E29
27
VCC_SENSE
TP_CPU10TP_CPU10
VCC_SENSE
RC5
1n/4/X7R/50V/K/X
1n/4/X7R/50V/K/X
1n/4/X7R/50V/K
1n/4/X7R/50V/K
GTLREF2
AN4
F2
VSS_SENSE
RSVD_1
GTLREF3
R248
R248
130/4
130/4
-FORCEPR
AN5
G10
VCC_MB_REGULATION
RSVD_2
R249
R249
130/4
130/4
-PROCHOT
AN6
AH2
27
VSS_SENSE
VSS_MB_REGULATION
PSMI*
MSID1 R227
R227
62/4
62/4
AL8
V1
VCORE
VCC_D_SENSE
MSID<1>
MSID0 R205
R205
62/4
62/4
B
AL7
W1
B
VSS_D_SENSE
MSID<0>
R228
R228
62/4/X
62/4/X
R238R238
49.9/4/1/X49.9/4/1/X
F29
Y1
TP_CPU11TP_CPU11
VTT_PKGSENSE
CPU_BOOT
R200
R200
62/4
62/4
GTLREF2
F6
V2
TP_CPU13TP_CPU13
Z60_50*
LL_ID<0>
VTT_OR
GTLREF2
5
TP_CPU14TP_CPU14
G6
AA2
TP_CPU15TP_CPU15
SLEW_CTRL*
LL_ID<1>
G5
22,26
PECI
SST_LV*
R237
R237
C116
C116
AL3
TP_CPU16TP_CPU16
MPG_NOBOOT*
Pop to disable old
Prescott CPU
100/4/1/X
100/4/1/X
1u/6/Y5V/10V/Z
1u/6/Y5V/10V/Z
CPU-SK/775/S/15
CPU-SK/775/S/15
R247R247
49.9/4/1/X49.9/4/1/X
GTLREF3
VTT_OR
GTLREF3
5
M
M
A
A
S
S
K
K
-
-
3
3
0
0
R246
R246
C131
C131
100/4/1/X
100/4/1/X
1u/6/Y5V/10V/Z
1u/6/Y5V/10V/Z
FB1
FB1
M
M
A
A
S
S
K
K
-
-
5
5
0
0
VCC_PLL1
VCC_PLL
VCC_PLL
0/8/SHT-50/MASK/X
0/8/SHT-50/MASK/X
C27
C27
C26
C26
1u/6/Y5V/10V/Z
1u/6/Y5V/10V/Z
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
A
A
Gigabyte Technology
Gigabyte Technology
Gigabyte Technology
Title
Title
Title
P4_LGA775-C
P4_LGA775-C
P4_LGA775-C
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
B
B
B
1.03
1.03
1.03
PECI:Platform Environment Control Interface
Date:
Date:
Date:
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Sheet
Sheet
Sheet
7
7
7
of
of
of
38
38
38
5
4
3
2
1
5 4 3 2 1 VCORE VCORE VCORE VCORE LGA775E LGA775E LGA775F LGA775F LGA775G LGA775G
5
4
3
2
1
VCORE
VCORE
VCORE
VCORE
LGA775E
LGA775E
LGA775F
LGA775F
LGA775G
LGA775G
LGA775H
LGA775H
AA8
LGA775
LGA775
AH11
AM11
LGA775
LGA775
N23
A12
LGA775
LGA775
AG10
AN1
LGA775
LGA775
H25
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AB8
AH12
AM12
N24
A15
AG13
AN10
H26
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AC23
(5/8)
(5/8)
AH14
AM14
(6/8)
(6/8)
N25
A18
(7/8)
(7/8)
AG16
AN13
(8/8)
(8/8)
H27
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AC24
AH15
AM15
N26
A2
AG17
AN16
H28
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AC25
PWR 1/2
PWR 1/2
AH18
AM18
PWR 2/2
PWR 2/2
N27
A21
GND 1/2
GND 1/2
AG20
AN17
GND 2/2
GND 2/2
H3
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
D
D
AC26
AH19
AM19
N28
A6
AG23
AN2
H6
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AC27
AH21
AM21
N29
A9
AG24
AN20
H7
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AC28
AH22
AM22
N30
AA23
AG7
AN23
H8
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AC29
AH25
AM25
N8
AA24
AH1
AN24
H9
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AC30
AH26
AM26
P8
AA25
AH10
AN27
J4
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AC8
AH27
AM29
R8
AA26
AH13
AN28
J7
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AD23
AH28
AM30
T23
AA27
AH16
B1
K2
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AD24
AH29
AM8
T24
AA28
AH17
B11
K5
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AD25
AH30
AM9
T25
AA29
AH20
B14
K7
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AD26
AH8
AN11
T26
AA3
AH23
B17
L23
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AD27
AH9
AN12
T27
AA30
AH24
B20
L24
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AD28
AJ11
AN14
T28
AA6
AH3
B24
L25
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AD29
AJ12
AN15
T29
AA7
AH6
B5
L26
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AD30
AJ14
AN18
T30
AB1
AJ10
B8
L27
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AD8
AJ15
AN19
T8
AB23
AJ13
C10
L28
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AE11
AJ18
AN21
U23
AB24
AJ16
C13
L29
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AE12
AJ19
AN22
U24
AB25
AJ17
C16
L3
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AE14
AJ21
AN25
U25
AB26
AJ20
C19
L30
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AE15
AJ22
AN26
U26
AB27
AJ23
C22
L6
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AE18
AJ25
AN29
U27
AB28
AJ24
C24
L7
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AE19
AJ26
AN30
U28
AB29
AJ27
C4
M1
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AE21
AJ8
AN8
U29
AB30
AJ28
C7
M7
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AE22
AJ9
AN9
U30
AB7
AJ29
D12
N3
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AE23
AK11
J10
U8
AC3
AJ30
D15
N6
C
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
C
AE9
AK12
J11
V8
AC6
AJ4
D18
N7
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF11
AK14
J12
W23
AC7
AK10
D21
P23
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF12
AK15
J13
W24
AD4
AK13
D24
P24
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF14
AK18
J14
W25
AD7
AK16
D3
P25
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF15
AK19
J15
W26
AE10
AK17
D5
P26
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF18
AK21
J18
W27
AE13
AK2
D6
P27
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF19
AK22
J19
W28
AE16
AK20
D9
P28
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF21
AK25
J20
W29
AE17
AK23
E11
P29
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF22
AK26
J21
W30
AE2
AK24
E14
P30
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF8
AK8
J22
W8
AE20
AK27
E17
P4
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF9
AK9
J23
Y23
AE24
AK28
E2
P7
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG11
AL11
J24
Y24
AE25
AK29
E20
R2
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG12
AL12
J25
Y25
AE26
AK30
E25
R23
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG14
AL14
J26
Y26
AE27
AK5
E26
R24
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG15
AL15
J27
Y27
AE28
AK7
E27
R25
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG18
AL18
J28
Y28
AE29
AL10
E28
R26
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG19
AL19
J29
Y29
AE30
AL13
E8
R27
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG21
AL21
J30
Y30
AE5
AL16
F10
R28
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG22
AL22
J8
Y8
AE7
AL17
F13
R29
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG25
AL25
J9
AF10
AL20
F16
R30
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG26
AL26
K23
AF13
AL23
F19
R5
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG27
AL29
K24
AF16
AL24
F22
R7
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG28
AL30
K25
AF17
AL27
F4
T3
VCC
VCC
VCC
VSS
VSS
VSS
VSS
B
AG29
AL9
K26
AF20
AL28
F7
T6
B
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AG30
K27
AF23
AM1
H10
T7
VCC
VCC
VSS
VSS
VSS
VSS
AG8
K28
AF24
AM10
H11
U7
VCC
VCC
VSS
VSS
VSS
VSS
AG9
K29
AF25
AM13
H12
V23
VCC
VCC
VSS
VSS
VSS
VSS
K30
AF26
AM16
H13
V24
VCC
VSS
VSS
VSS
VSS
K8
AF27
AM17
H14
V25
VCC
VSS
VSS
VSS
VSS
L8
AF28
AM20
H17
V26
CPU-SK/775/S/15
CPU-SK/775/S/15
VCC
VSS
VSS
VSS
VSS
M23
AF29
AM23
H18
V27
VCC
VSS
VSS
VSS
VSS
M24
AF3
AM24
H19
V28
VCC
VSS
VSS
VSS
VSS
M25
AF30
AM27
H20
V29
VCC
VSS
VSS
VSS
VSS
M26
AF6
AM28
H21
V3
VCC
VSS
VSS
VSS
VSS
M27
AF7
AM4
H22
V30
VCC
VSS
VSS
VSS
VSS
M28
H23
V6
VCC
VSS
VSS
M29
H24
V7
VCC
VSS
VSS
M30
W4
CPU-SK/775/S/15
CPU-SK/775/S/15
VCC
VSS
M8
W7
VCC
VSS
Y2
VSS
Y5
VSS
Y7
VSS
CPU-SK/775/S/15
CPU-SK/775/S/15
CPU-SK/775/S/15
CPU-SK/775/S/15
A
A
Gigabyte Technology
Gigabyte Technology
Gigabyte Technology
Title
Title
Title
P4_LGA775-E,F,G,H
P4_LGA775-E,F,G,H
P4_LGA775-E,F,G,H
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
B
B
B
1.03
1.03
1.03
Date:
Date:
Date:
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Sheet
Sheet
Sheet
8
8
8
of
of
of
38
38
38
5
4
3
2
1
5 4 3 2 1 MCHA MCHA FSB FSB HA[3 35] HD[0 63] 5 HA[3
5
4
3
2
1
MCHA
MCHA
FSB
FSB
HA[3 35]
HD[0 63]
5 HA[3 35]
HD[0
63]
6
HA3
HD0
L36
F44
FSB_AB_3
FSB_DB_0
HA4
HD1
VTT_GMCH
L37
C44
FSB_AB_4
FSB_DB_1
HA5
HD2
J38
D44
FSB_AB_5
FSB_DB_2
HA6
HD3
R180
R180
R183
R183
F40
C41
FSB_AB_6
FSB_DB_3
D
HA7
HD4
MCH_GTLREF0
H39
E43
D
FSB_AB_7
FSB_DB_4
MCH_GTLREF0
31
HA8
HD5
L38
B43
FSB_AB_8
FSB_DB_5
HA9
HD6
57.6/4/1
57.6/4/1
49.9/4/1
49.9/4/1
L43
D40
FSB_AB_9
FSB_DB_6
HA10
HD7
BC52
BC52
R179
R179
BC58
BC58
C80
C80
N39
B42
FSB_AB_10
FSB_DB_7
HA11
HD8
0.01u/4/X7R/25V/K/X
0.01u/4/X7R/25V/K/X
100/4/1
100/4/1
1u/6/Y5V/10V/Z
1u/6/Y5V/10V/Z
220p/4/NPO/50V/J/X
220p/4/NPO/50V/J/X
N35
B38
FSB_AB_11
FSB_DB_8
HA12
HD9
N37
F38
FSB_AB_12
FSB_DB_9
HA13
HD10
J41
A38
FSB_AB_13
FSB_DB_10
HA14
HD11
N40
B37
FSB_AB_14
FSB_DB_11
VTT_GMCH
HA15
HD12
M45
D38
FSB_AB_15
FSB_DB_12
HA16
HD13
R35
C37
FSB_AB_16
FSB_DB_13
HA17
HD14
T36
D37
FSB_AB_17
FSB_DB_14
HA18
HD15
R36
B36
FSB_AB_18
FSB_DB_15
HA19
HD16
R181
R181
R34
E37
FSB_AB_19
FSB_DB_16
HA20
HD17
301/4/1
301/4/1
R37
J35
FSB_AB_20
FSB_DB_17
HA21
HD18
tracer min 10/10 or (10/5
R186
R186
R39
H35
FSB_AB_21
FSB_DB_18
HA22
HD19
HXSWING
HXRCOMP
U38
F37
FSB_AB_22
FSB_DB_19
breakout),L1<3"
HA23
HD20
T37
G37
tracer 10/7 or
FSB_AB_23
FSB_DB_20
HA24
HD21
49.9/4/1
49.9/4/1
U34
J33
FSB_AB_24
FSB_DB_21
5/5(breakout)
HA25
HD22
R163
R163
C81
C81
R185
R185
U40
L33
FSB_AB_25
FSB_DB_22
HA26
HD23
100/4/1
100/4/1
0.01u/4/X7R/25V/K
0.01u/4/X7R/25V/K
16.5/4/1
16.5/4/1
T34
G33
FSB_AB_26
FSB_DB_23
HA27
HD24
Y36
L31
FSB_AB_27
FSB_DB_24
HA28
HD25
U35
M31
FSB_AB_28
FSB_DB_25
HA29
HD26
AA35
M30
FSB_AB_29
FSB_DB_26
HA30
HD27
U37
J30
FSB_AB_30
FSB_DB_27
HA31
HD28
Y37
G31
FSB_AB_31
FSB_DB_28
HA32
HD29
Y34
K30
FSB_AB_32
FSB_DB_29
HA33
HD30
C
Y38
M29
C
FSB_AB_33
FSB_DB_30
HA34
HD31
AA37
G30
FSB_AB_34
FSB_DB_31
HA35
HD32
AA36
J29
FSB_AB_35
FSB_DB_32
HD33
F29
FSB_DB_33
HD34
H29
FSB_DB_34
HD35
L25
FSB_DB_35
-HREQ0
HD36
G38
K26
5
-HREQ0
FSB_REQB_0
FSB_DB_36
-HREQ1
HD37
K35
L29
5
-HREQ1
FSB_REQB_1
FSB_DB_37
-HREQ2
HD38
J39
J26
5
-HREQ2
FSB_REQB_2
FSB_DB_38
-HREQ3
HD39
C43
M26
5
-HREQ3
FSB_REQB_3
FSB_DB_39
-HREQ4
HD40
G39
H26
5
-HREQ4
FSB_REQB_4
FSB_DB_40
HD41
F25
FSB_DB_41
HD42
F24
FSB_DB_42
-HADSTB0
HD43
J40
G25
5
-HADSTB0
FSB_ADSTBB_0
FSB_DB_43
-HADSTB1
HD44
T39
H24
5
-HADSTB1
FSB_ADSTBB_1
FSB_DB_44
HD45
L24
FSB_DB_45
HD46
J24
FSB_DB_46
STBP0
HD47
C39
N24
6
STBP0
FSB_DSTBPB_0
FSB_DB_47
STBN0
HD48
B39
C28
6
STBN0
FSB_DSTBNB_0
FSB_DB_48
-DBI0
HD49
B40
B31
6
-DBI0
FSB_DINVB_0
FSB_DB_49
STBP1
HD50
K31
F35
6
STBP1
FSB_DSTBPB_1
FSB_DB_50
STBN1
HD51
J31
C35
6
STBN1
FSB_DSTBNB_1
FSB_DB_51
-DBI1
HD52
F33
B35
6
-DBI1
FSB_DINVB_1
FSB_DB_52
STBP2
HD53
J25
D35
6
STBP2
FSB_DSTBPB_2
FSB_DB_53
STBN2
HD54
K25
D31
6
STBN2
FSB_DSTBNB_2
FSB_DB_54
-DBI2
HD55
F26
A34
6
-DBI2
FSB_DINVB_2
FSB_DB_55
STBP3
HD56
C32
B32
B
6
STBP3
FSB_DSTBPB_3
FSB_DB_56
B
STBN3
HD57
D32
F31
6
STBN3
FSB_DSTBNB_3
FSB_DB_57
-DBI3
HD58
D30
D28
6
-DBI3
FSB_DINVB_3
FSB_DB_58
HD59
A29
FSB_DB_59
HD60
C30
FSB_DB_60
-HADS
HD61
COUPON1
COUPON3
COUPON3
COUPON/X
COUPON/X
J42
B30
1 2
5
-HADS
FSB_ADSB
FSB_DB_61
VCC
-HTRDY
HD62
L40
E27
5
-HTRDY
FSB_TRDYB
FSB_DB_62
-DRDY
HD63
COUPON2
COUPON4
COUPON4
COUPON/X
COUPON/X
J43
B28
1 2
5
-DRDY
FSB_DRDYB
FSB_DB_63
-DEFER
G44
5
-DEFER
FSB_DEFERB
-HITM
K44
5
-HITM
FSB_HITMB
-HIT
HXSWING
H45
B24
5
-HIT
FSB_HITB
FSB_SWING
-HLOCK
HXRCOMP
H40
A23
5
-HLOCK
FSB_LOCKB
FSB_RCOMP
-BR0
L42
5
-BR0
FSB_BREQ0B
-BNR
MCH_GTLREF0
J44
C22
5
-BNR
FSB_BNRB
FSB_DVREF
-BPRI
H37
B23
5
-BPRI
FSB_BPRIB
FSB_ACCVREF
-DBSY
H42
5
-DBSY
FSB_DBSYB
-RS0
MCHCLK
G43
P29
5
-RS0
FSB_RSB_0
HPL_CLKINP
MCHCLK
24
-RS1
-MCHCLK
L44
P30
5
-RS1
FSB_RSB_1
HPL_CLKINN
-MCHCLK
24
-RS2
G42
5
-RS2
FSB_RSB_2
-CPURST
D27
5 -CPURST
FSB_CPURSTB
CPU INTERFACE
N25
RSVD
1
1
OF 9
OF 9
A
A
EAGLEAKE [10HB1-030043-10R]
EAGLEAKE [10HB1-030043-10R]
Gigabyte Technology
Gigabyte Technology
Gigabyte Technology
Title
Title
Title
GMCH-HOST
GMCH-HOST
GMCH-HOST
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
Custom
Custom
Custom
1.03
1.03
1.03
Date:
Date:
Date:
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Wednesday, April 23, 2008
Sheet
Sheet
Sheet
9
9
9
of
of
of
38
38
38
5
4
3
2
1
5 4 3 2 1 MCHD MCHD MCHC MCHC MODT_A[0 3] 15,17 MODT_A[0 3] MAAA0
5
4
3
2
1
MCHD
MCHD
MCHC
MCHC
MODT_A[0 3]
15,17
MODT_A[0 3]
MAAA0
DQSA0
MAAB0
DQSB0
MODT_B[0 3]
BC41
BC5
BD24
AW8
DDR_A_MA_0
DDR_A_DQS_0
DDR_B_MA_0
DDR_B_DQS_0
16,17
MODT_B[0 3]
MAAA1
-DQSA0
MAAB1
-DQSB0
BC35
BD4
BB23
AW9
DDR_A_MA_1
DDR_A_DQSB_0
DDR_B_MA_1
DDR_B_DQSB_0
MAAA2
DMA0
MAAB2
DMB0
-DQSB[0 7]
BB32
BC3
BB24
AY6
DDR_A_MA_2
DDR_A_DM_0
DDR_B_MA_2
DDR_B_DM_0
16
-DQSB[0 7]
MAAA3
MAAB3
BC32
BD23
DDR_A_MA_3
DDR_B_MA_3
MAAA4
MDA0
MAAB4
MDB0
MAAB[0 14]
BD32
BC2
BB22
AV7
DDR_A_MA_4
DDR_A_DQ_0
DDR_B_MA_4
DDR_B_DQ_0
16,17
MAAB[0 14]
MAAA5
MDA1
MAAB5
MDB1
BB31
BD3
BD22
AW4
DDR_A_MA_5
DDR_A_DQ_1
DDR_B_MA_5
DDR_B_DQ_1
MAAA6
MDA2
MAAB6
MDB2
DMB[0 7]
AY31
BD7
BC22
BA9
DDR_A_MA_6
DDR_A_DQ_2
DDR_B_MA_6
DDR_B_DQ_2
16
DMB[0 7]
MAAA7
MDA3
MAAB7
MDB3
BA31
BB7
BC20
AU11
DDR_A_MA_7
DDR_A_DQ_3
DDR_B_MA_7
DDR_B_DQ_3
MAAA8
MDA4
MAAB8
MDB4
MDB[0 63]
BD31
BB2
BB20
AU7
DDR_A_MA_8
DDR_A_DQ_4
DDR_B_MA_8
DDR_B_DQ_4
16
MDB[0 63]
MAAA9
MDA5
MAAB9
MDB5
BD30
BA3
BD20
AU8
D
D
DDR_A_MA_9
DDR_A_DQ_5
DDR_B_MA_9
DDR_B_DQ_5
MAAA10
MDA6
MAAB10
MDB6
DQSB[0 7]
AW43
BE6
BC26
AW7
DDR_A_MA_10
DDR_A_DQ_6
DDR_B_MA_10
DDR_B_DQ_6
16
DQSB[0 7]
MAAA11
MDA7
MAAB11
MDB7
BC30
BD6
BD19
AY9
DDR_A_MA_11
DDR_A_DQ_7
DDR_B_MA_11
DDR_B_DQ_7
MAAA12
MAAB12
MAAA[0 14]
BB30
BB19
DDR_A_MA_12
DDR_B_MA_12
15,17
MAAA[0 14]
MAAA13
MAAB13
AM42
BE38
DDR_A_MA_13
DDR_B_MA_13
MAAA14
DQSA1
MAAB14
DQSB1
DMA[0 7]
BD28
BB9
BA19
AT15
DDR_A_MA_14
DDR_A_DQS_1
DDR_B_MA_14
DDR_B_DQS_1
15
DMA[0 7]
-DQSA1
-DQSB1
BC9
AU15
DDR_A_DQSB_1
DDR_B_DQSB_1
DMA1
DMB1
MDA[0 63]
BD9
AR15
DDR_A_DM_1
DDR_B_DM_1
15
MDA[0 63]
-SWEA
AW42
15,17
-SWEA
DDR_A_WEB
-SCASA
MDA8
MDB8
DQSA[0 7]
AU42
BB8
AY13
15,17
-SCASA
DDR_A_CASB
DDR_A_DQ_8
DDR_B_DQ_8
-SRASA
MDA9
MDB9
15
DQSA[0 7]
AV42
AY8
AP15
15,17
-SRASA
DDR_A_RASB
DDR_A_DQ_9
DDR_B_DQ_9
MDA10
MDB10
-DQSA[0 7]
BD11
AW15
DDR_A_DQ_10
DDR_B_DQ_10
15
-DQSA[0 7]
MDA11
-SWEB
MDB11
BB11
BD36
AT16
DDR_A_DQ_11
16,17
-SWEB
DDR_B_WEB
DDR_B_DQ_11
SBAA0
MDA12
-SCASB
MDB12
AV45
BC7
BC37
AU13
15,17
SBAA0
DDR_A_BS_0
DDR_A_DQ_12
16,17
-SCASB
DDR_B_CASB
DDR_B_DQ_12
SBAA1
MDA13
-SRASB
MDB13
AY44
BE8
BD35
AW13
15,17
SBAA1
DDR_A_BS_1
DDR_A_DQ_13
16,17
-SRASB
DDR_B_RASB
DDR_B_DQ_13
DDR18V
SBAA2
MDA14
MDB14
BC28
BD10
AP16
15,17
SBAA2
DDR_A_BS_2
DDR_A_DQ_14
DDR_B_DQ_14
MDA15
MDB15
AY11
AU16
DDR_A_DQ_15
DDR_B_DQ_15
-CSA0
SBAB0
AU43
BD26
15,17
-CSA0
DDR_A_CSB_0
16,17
SBAB0
DDR_B_BS_0
-CSA1
SBAB1
BC108
BC108
AR40
BB26
15,17
-CSA1
DDR_A_CSB_1
16,17
SBAB1
DDR_B_BS_1
-CSA2
DQSA2
SBAB2
DQSB2
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
R244
R244
AU44
BD15
BD18
AR20
15,17
-CSA2
DDR_A_CSB_2
DDR_A_DQS_2
16,17
SBAB2
DDR_B_BS_2
DDR_B_DQS_2
-CSA3
-DQSA2
-DQSB2
2K/4/1
2K/4/1
AM43
BB15
AR17
15,17
-CSA3
DDR_A_CSB_3
DDR_A_DQSB_2
DDR_B_DQSB_2
DMA2
DMB2
BD14
AU17
tracer min 10/10
DDR_A_DM_2
DDR_B_DM_2
-CSB0
MCH_VREF
BB35
16,17
-CSB0
DDR_B_CSB_0
MCH_VREF
31
CKEA0
-CSB1
BB27
BD39
15,17
CKEA0
DDR_A_CKE_0
16,17
-CSB1
DDR_B_CSB_1
CKEA1
MDA16
-CSB2
MDB16
BD27
BB14
BB37
AY17
15,17
CKEA1
DDR_A_CKE_1
DDR_A_DQ_16
16,17
-CSB2
DDR_B_CSB_2
DDR_B_DQ_16
CKEA2
MDA17
-CSB3
MDB17
R243
R243
BC91
BC91
BA27
BC14
BD40
AV17
15,17
CKEA2
DDR_A_CKE_2
DDR_A_DQ_17
16,17
-CSB3
DDR_B_CSB_3
DDR_B_DQ_17
CKEA3
MDA18
MDB18
2K/4/1
2K/4/1
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
AY26
BC16
AR21
15,17
CKEA3
DDR_A_CKE_3
DDR_A_DQ_18
DDR_B_DQ_18
MDA19
CKEB0
MDB19
BB16
BC18
AV20
DDR_A_DQ_19
16,17
CKEB0
DDR_B_CKE_0
DDR_B_DQ_19
MDA20
CKEB1
MDB20
BC11
AY20
AP17
DDR_A_DQ_20
16,17
CKEB1
DDR_B_CKE_1
DDR_B_DQ_20
MODT_A0
MDA21
CKEB2
MDB21
AR42
BE12
BE17
AW16
DDR_A_ODT_0
DDR_A_DQ_21
16,17
CKEB2
DDR_B_CKE_2
DDR_B_DQ_21
MODT_A1
MDA22
CKEB3
MDB22
AM44
BA15
BB18
AT20
DDR_A_ODT_1
DDR_A_DQ_22
16,17
CKEB3
DDR_B_CKE_3
DDR_B_DQ_22
MODT_A2
MDA23
MDB23
R262
R262
80.6/4/1
80.6/4/1
MCH_DDR_RPD
AR44
BD16
AN20
tracer min
DDR_A_ODT_2
DDR_A_DQ_23
DDR_B_DQ_23
MODT_A3
MODT_B0
AL40
BD37
DDR_A_ODT_3
DDR_B_ODT_0
5/10( 1:2)
MODT_B1
BC39
DDR_B_ODT_1
MODT_B2
DQSB3
BB38
AU26
DDR_B_ODT_2
DDR_B_DQS_3
DQSA3
MODT_B3
-DQSB3
AR22
BD42
AT26
DDR_A_DQS_3
DDR_B_ODT_3
DDR_B_DQSB_3
DDR18V
DCLKA0
-DQSA3
DMB3
AY37
AT22
AV25
15
DCLKA0
DDR_A_CK_0
DDR_A_DQSB_3
DDR_B_DM_3
-DCLKA0
DMA3
BA37
AV22
C
15
-DCLKA0
C
DDR_A_CKB_0
DDR_A_DM_3
DCLKA1
MDB24
R261
R261
80.6/4/1
80.6/4/1
MCH_DDR_RPU
AW29
AT25
15
DCLKA1
DDR_A_CK_1
DDR_B_DQ_24
-DCLKA1
DCLKB0
MDB25
AY29
AY33
AV26
15
-DCLKA1
DDR_A_CKB_1
16
DCLKB0
DDR_B_CK_0
DDR_B_DQ_25
DCLKA2
MDA24
-DCLKB0
MDB26
AU37
AW21
AW33
AU29
15
DCLKA2
DDR_A_CK_2
DDR_A_DQ_24
16
-DCLKB0
DDR_B_CKB_0
DDR_B_DQ_26
-DCLKA2
MDA25
DCLKB1
MDB27
BC109
BC109
AV37
AY22
AV31
AV29
15
-DCLKA2
DDR_A_CKB_2
DDR_A_DQ_25
16
DCLKB1
DDR_B_CK_1
DDR_B_DQ_27
DCLKA3
MDA26
-DCLKB1
MDB28
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
AU33
AV24
AW31
AW25
15
DCLKA3
DDR_A_CK_3
DDR_A_DQ_26
16
-DCLKB1
DDR_B_CKB_1
DDR_B_DQ_28
-DCLKA3
MDA27
DCLKB2
MDB29
AT33
AY24
AW35
AR25
15
-DCLKA3
DDR_A_CKB_3
DDR_A_DQ_27
16
DCLKB2
DDR_B_CK_2
DDR_B_DQ_29
DCLKA4
MDA28
-DCLKB2
MDB30
AT30
AU21
AY35
AP26
15
DCLKA4
DDR_A_CK_4
DDR_A_DQ_28
16
-DCLKB2
DDR_B_CKB_2
DDR_B_DQ_30
-DCLKA4
MDA29
DCLKB3
MDB31
AR30
AT21
AT31
AR29
15
-DCLKA4
DDR_A_CKB_4
DDR_A_DQ_29
16
DCLKB3
DDR_B_CK_3
DDR_B_DQ_31
DCLKA5
MDA30
-DCLKB3
AW38
AR24
AU31
15
DCLKA5
DDR_A_CK_5
DDR_A_DQ_30
16
-DCLKB3
DDR_B_CKB_3
-DCLKA5
MDA31
DCLKB4
R267
R267
249/4/1
249/4/1
MCH_DDR_SPD
AY38
AU24
AP31
15
-DCLKA5
DDR_A_CKB_5
DDR_A_DQ_31
16
DCLKB4
DDR_B_CK_4
-DCLKB4
DQSB4
AP30
AR38
16
-DCLKB4
DDR_B_CKB_4
DDR_B_DQS_4
DCLKB5
-DQSB4
AW37
AR37
16
DCLKB5
DDR_B_CK_5
DDR_B_DQSB_4
DQSA4
-DCLKB5
DMB4
AH43
AV35
AU39
DDR_A_DQS_4
16
-DCLKB5
DDR_B_CKB_5
DDR_B_DM_4
-DQSA4
AH42
DDR_A_DQSB_4
DDR18V
DMA4
MDB32
AK42
AR36
DDR_A_DM_4
DDR_B_DQ_32
MDB33
AU38
DDR_B_DQ_33
MDA32
MDB34
R268
R268
80.6/4/1
80.6/4/1
MCH_DDR_SPU
AL41
AN35
DDR_A_DQ_32
DDR_B_DQ_34
MDA33
MDB35
AK43
AN37
DDR_A_DQ_33
DDR_B_DQ_35
MDA34
MDB36
AG42
AV39
DDR_A_DQ_34
DDR_B_DQ_36
MDA35
MDB37
BC107
BC107
AG44
AW39
DDR_A_DQ_35
DDR_B_DQ_37
MDA36
MDB38
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
AL42
AU40
DDR_A_DQ_36
DDR_B_DQ_38
MDA37
MDB39
AK44
AU41
DDR_A_DQ_37
DDR_B_DQ_39
MDA38
AH44
AR43
TP25TP25
DDR_A_DQ_38
DDR3_A_CSB1
MDA39
AG41
BB40
TP28TP28
DDR_A_DQ_39
DDR3_A_MA0
DQSB5
AT44
AK34
TP24TP24
DDR3_A_WEB
DDR_B_DQS_5
-DQSB5
DDR_A
DDR_A
AV40
AL34
TP26TP26
DDR3_B_ODT3
DDR_B_DQSB_5
DMB5
AR6
AL37
DDR3_DRAM_PWROK
DDR_B_DM_5
DQSA5
AD43
BC24
TP27TP27
DDR_A_DQS_5
DDR3_DRAMRSTB
-DQSA5
AE42
DDR_A_DQSB_5
DMA5
MDB40
AE45
AL35
DDR_A_DM_5
DDR_B_DQ_40
MDB41
AL36
DDR_B_DQ_41
MDA40
MDB42
AF43
AN29
AK36
TP18TP18
DDR_A_DQ_40
RSVD
DDR_B_DQ_42
MDA41
MDB43
AF42
AN30
AJ34
TP19TP19
DDR_A_DQ_41
RSVD
DDR_B_DQ_43
6.5/5/6.5 Length max=5.0"
MDA42
MDB44
AC44
AJ33
AN39
TP16TP16
DDR_A_DQ_42
RSVD
DDR_B_DQ_44
MDA43
MDB45
AC42
AK33
AN40
TP17TP17
DDR_A_DQ_43
RSVD
DDR_B_DQ_45
MCH die to DIMM0/1 pin =6" max
MDA44
MDB46
AF40
AK37
DDR_A_DQ_44
DDR_B_DQ_46
MDA45
MDB47
AF44
AL39
B
B
DDR_A_DQ_45
DDR_B_DQ_47
FOR channel A
MDA46
AD44
DDR_A_DQ_46
MDA47
AC41
DDR_A_DQ_47
DQSB6
AF37
DDR_B_DQS_6
DQSA6
-DQSB6
Y43
DDR_B
DDR_B
AF36
DDR_A_DQS_6
DDR_B_DQSB_6
-DQSA6
DMB6
Y42
AJ35
DDR_A_DQSB_6
DDR_B_DM_6
DMA6
AA45
DDR_A_DM_6
MDB48
AJ38
DDR_B_DQ_48
MDB49
AJ37
DDR_B_DQ_49
MDA48
MCH_VREF
MDB50
AB43
BB44
AF38
DDR_A_DQ_48
DDR_VREF
DDR_B_DQ_50
MDA49
MDB51
AA42
AE37
DDR_A_DQ_49
DDR_B_DQ_51
MDA50
MDB52
W42
AK40
DDR_A_DQ_50
DDR_B_DQ_52
MDA51
MCH_DDR_RPD
MDB53
W41
AY42
AJ40
DDR_A_DQ_51
DDR_RPD
DDR_B_DQ_53
MDA52
MCH_DDR_RPU
MDB54
AB42
BA43
AF34
DDR_A_DQ_52
DDR_RPU
DDR_B_DQ_54
MDA53
MCH_DDR_SPD
MDB55
AB44
BC43
AE35
DDR_A_DQ_53
DDR_SPD
DDR_B_DQ_55
MDA54
MCH_DDR_SPU
Y44
BC44
NB_HEATSINK
NB_HEATSINK
DDR_A_DQ_54
DDR_SPU
MDA55
Y40
DDR_A_DQ_55
1
DQSB7
AB35
DDR_B_DQS_7
-DQSB7
AD35
DDR_B_DQSB_7
DQSA7
DMB7
T44
AD37
DDR_A_DQS_7
DDR_B_DM_7
-DQSA7
T43
DDR_A_DQSB_7
DMA7
MDB56
T42
AD40
DDR_A_DM_7
DDR_B_DQ_56
MDB57
AD38
DDR_B_DQ_57
MDA56
MDB58
V42
AB40
DDR_A_DQ_56
DDR_B_DQ_58
MDA57
MDB59
U45
AA39
DDR_A_DQ_57
DDR_B_DQ_59
MDA58
MDB60
R40
AE36
DDR_A_DQ_58
DDR_B_DQ_60
DDR INTERFACE
MDA59
MDB61
P44
AE39
DDR_A_DQ_59
DDR_B_DQ_61
MDA60
MDB62
V44
AB37
DDR_A_DQ_60
DDR_B_DQ_62
MDA61
MDB63
V43
AB38
DDR_A_DQ_61
DDR_B_DQ_63
MDA62
R41
DDR_A_DQ_62
MDA63
R44
4
4
OF
OF
9
9
DDR_A_DQ_63
6.5/5/6.5 Length max=5.0"
3
3
OF
OF
9
9
MCH die to DIMM2/3 pin =7" max
EAGLEAKE [10HB1-030043-10R]
EAGLEAKE [10HB1-030043-10R]
FOR channel B
EAGLEAKE [10HB1-030043-10R]
EAGLEAKE [10HB1-030043-10R]
2
A
A
NB_HEATSINK/[12SP2-040007-41R_12SP2-040007-42R_12SP2-040007-43R_12SP2-040007-44R]
NB_HEATSINK/[12SP2-040007-41R_12SP2-040007-42R_12SP2-040007-43R_12SP2-040007-44R]
Gigabyte Technology
Gigabyte Technology
Gigabyte Technology
Title
Title
Title
GMCH-DDRII
GMCH-DDRII
GMCH-DDRII
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
GA-EP43-DS3
GA-EP43-DS3
GA-EP43-DS3
Custom
Custom
Custom
1.03
1.03
1.03
Date:
Date:
Date:
Thursday, April 24, 2008
Thursday, April 24, 2008
Thursday, April 24, 2008
Sheet
Sheet
Sheet
10
10
10
of
of
of
38
38
38
5
4
3
2
1

5

4

3

2

1

D

C

5 4 3 2 1 D C B A D C B PCIEX16:16/5/5/5/16(breakout min 8/4/5/4/8) Impedance=85

B

A

D

C

5 4 3 2 1 D C B A D C B PCIEX16:16/5/5/5/16(breakout min 8/4/5/4/8) Impedance=85

B

PCIEX16:16/5/5/5/16(breakout min 8/4/5/4/8)

Impedance=85 +- 17.5%

MCHB

MCHB

PCIE PCIE EXP_RXP0 EXP_TXP0 EXP_TXP[0 15] F6 C11 PEG_RXP_0 PEG_TXP_0 EXP_RXN0 EXP_TXN0 G7 B11 PEG_RXN_0
PCIE
PCIE
EXP_RXP0
EXP_TXP0
EXP_TXP[0 15]
F6
C11
PEG_RXP_0
PEG_TXP_0
EXP_RXN0
EXP_TXN0
G7
B11
PEG_RXN_0
PEG_TXN_0
EXP_RXP1
EXP_TXP1
EXP_TXN[0 15]
H6
A10
PEG_RXP_1
PEG_TXP_1
EXP_RXN1
EXP_TXN1
G4
B9
PEG_RXN_1
PEG_TXN_1
EXP_RXP2
EXP_TXP2
EXP_RXP[0 15]
J6
C9
PEG_RXP_2
PEG_TXP_2
EXP_RXN2
EXP_TXN2
J7
D8
PEG_RXN_2
PEG_TXN_2
EXP_RXP3
EXP_TXP3
EXP_RXN[0 15]
L6
B8
PEG_RXP_3
PEG_TXP_3
EXP_RXN3
EXP_TXN3
L7
C7
PEG_RXN_3
PEG_TXN_3
EXP_RXP4
EXP_TXP4
N9
B7
PEG_RXP_4
PEG_TXP_4
EXP_RXN4
EXP_TXN4
N10
B6
PEG_RXN_4
PEG_TXN_4
EXP_RXP5
EXP_TXP5
N7
B3
PEG_RXP_5
PEG_TXP_5
EXP_RXN5
EXP_TXN5
N6
B4
PEG_RXN_5
PEG_TXN_5
EXP_RXP6
EXP_TXP6
R7
D2
PEG_RXP_6
PEG_TXP_6
EXP_RXN6
EXP_TXN6
R6
C2
PEG_RXN_6
PEG_TXN_6
EXP_RXP7
EXP_TXP7
R9
H2
PEG_RXP_7
PEG_TXP_7
VCC1_1
EXP_RXN7
EXP_TXN7
R10
G2
PEG_RXN_7
PEG_TXN_7
EXP_RXP8
EXP_TXP8
R193
R193
U10
J2
PEG_RXP_8
PEG_TXP_8
EXP_RXN8
EXP_TXN8
U9
K2
BC80
BC80
49.9/4/1
49.9/4/1
PEG_RXN_8
PEG_TXN_8
EXP_RXP9
EXP_TXP9
0.1u/4/Y5V/16V/Z
0.1u/4/Y5V/16V/Z
GRCOMP
U6
K1
PEG_RXP_9
PEG_TXP_9
EXP_RXN9
EXP_TXN9
U7
L2
PEG_RXN_9
PEG_TXN_9
EXP_RXP10
EXP_TXP10
AA9
P2
tracer 10/10
PEG_RXP_10
PEG_TXP_10
EXP_RXN10
EXP_TXN10
AA10
M2
PEG_RXN_10
PEG_TXN_10
EXP_RXP11
EXP_TXP11
R4
T2
PEG_RXP_11
PEG_TXP_11
EXP_RXN11
EXP_TXN11
P4
R1
PEG_RXN_11
PEG_TXN_11
EXP_RXP12
EXP_TXP12
AA7
U2
PEG_RXP_12
PEG_TXP_12
EXP_RXN12
EXP_TXN12
AA6
V2
PEG_RXN_12
PEG_TXN_12
EXP_RXP13
EXP_TXP13
AB10
W4
PEG_RXP_13
PEG_TXP_13
EXP_RXN13
EXP_TXN13
AB9
V3
PEG_RXN_13
PEG_TXN_13
EXP_RXP14
EXP_TXP14
AB3
AA4
PEG_RXP_14
PEG_TXP_14
EXP_RXN14
EXP_TXN14
AA2
Y4
PEG_RXN_14
PEG_TXN_14
EXP_RXP15
EXP_TXP15
AD10
AC1
PEG_RXP_15
PEG_TXP_15
EXP_RXN15
EXP_TXN15
AD11
AB2
PEG_RXN_15
PEG_TXN_15
DMI
DMI
DMI_0RXP
DMI_0TXP
AD7
AC2
DMI_RXP_0
DMI_TXP_0
DMI_0TXP 20
DMI_0RXN
DMI_0TXN
AD8
AD2
DMI_RXN_0
DMI_TXN_0
DMI_0TXN 20
DMI_1RXP
DMI_1TXP
AE9
AD4
DMI_RXP_1
DMI_TXP_1
DMI_1TXP 20
DMI_1RXN
DMI_1TXN
AE10
AE4
DMI_RXN_1
DMI_TXN_1
DMI_1TXN 20
DMI_2RXP
DMI_2TXP
AE6
AE2
DMI_RXP_2
DMI_TXP_2
DMI_2TXP 20
DMI_2RXN
DMI_2TXN
AE7
AF2
DMI_RXN_2
DMI_TXN_2
DMI_2TXN 20
DMI_3RXP
DMI_3TXP
AF9
AF4
DMI_RXP_3
DMI_TXP_3
DMI_3TXP 20
DMI_3RXN
DMI_3TXN
AF8
AG4
DMI_RXN_3
DMI_TXN_3
DMI_3TXN 20
SRCCLK_MCH
D9
EXP_CLKP
-SRCCLK_MCH
E9
EXP_CLKN
GRCOMP
Y7
EXP_RCOMPO
Y8
EXP_COMPI
SDVO_CLDATA
J13
Y6
SDVO_CTRLDATA
EXP_ICOMPO
SDVO_CLCLK
G13
SDVO_CTRLCLK
AB13
TP14TP14
RSVD
GRBIAS
AD13
AG1
TP15TP15
RSVD
EXP_RBIAS
R256
R256
2 2
OF
OF
9
9
750/4/1
750/4/1
Title
Title
Title
2 2 OF OF 9 9 750/4/1 750/4/1 Title Title Title EAGLEAKE [10HB1-030043-10R] EAGLEAKE [10HB1-030043-10R]

EAGLEAKE [10HB1-030043-10R]

EAGLEAKE [10HB1-030043-10R]

EXP_TXP[0

EXP_TXN[0

EXP_RXP[0

EXP_RXN[0

15]

15]

15]

15]

18

18

18

18

DMI:12/4/8/4/12

Impedance=95 +- 17.5%

24

24

18

18

20 DMI_0RXP

20

20

20

20

20

DMI_1RXN

DMI_1RXP

DMI_0RXN

DMI_2RXP

DMI_2RXN

DMI_3RXP

DMI_3RXN

20

20

SRCCLK_MCH

-SRCCLK_MCH

SDVO_CLDATA

SDVO_CLCLK

Gigabyte Technology

Gigabyte Technology

Gigabyte Technology

A

GMCH-PCI E & DMI

GMCH-PCI E & DMI

GMCH-PCI E & DMI

Size

Size

Size

Custom

Custom

Custom

Document Number

Document Number

Document Number

GA-EP43-DS3

GA-EP43-DS3

GA-EP43-DS3

Rev

Rev

Rev

1.03

1.03

1.03

Date:

Date:

Date:

Wednesday, April 23, 2008

Wednesday, April 23, 2008

Wednesday, April 23, 2008

Sheet

Sheet

Sheet

11 11

11

of

of

of

38

38

38

5

4

3

2