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Board name: Mother Board Schematic 1. System Block Diagram & Schematic page description;
Project name: X01 2. Power Block Diagram & Discription;
Version: Ver B 3. Annotations & information;
Initial Date: 4. Schematic modify Item and history;
New update: 5. Power on & off Sequence;
6. ACPI Mode Switch Timings;
7. Power On Sequence Map;
8. CLOCK Distribution;
C C
9. Power Distribution;
Topstar Confidential
Hardware drawing by: 许沐锌 Hardware check by: EMI Check by:
B B
A A
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name Title
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 1 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
CONTENT
Topstar Confidential
ShenZhen Topstar Industry Co.,LTD
D 1 Title D
BIOS
8Mbit
A A
+V3.3AL TOPSTAR TECHNOLOGY
PG 18 Swain Xu(许沐锌)
PG 25
SD/MMC/MS/XD CARD USB HUB Page Name System Block & Index
Size Project Name Rev
Touch Panel A3 X01
B
+V5S
Date: Tuesday, September 29, 2009 Sheet 2 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
D
X01 POWER BLOCK Ver:A D
Chipset Power
Always power DDR Power GFX Power
TPS51218
TPS51125 TPS51218 TPS51218
A A
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name PWR Block & description
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 3 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
Voltage Rails
I2C SMB Address
+VDC Primary DC system power supply (6V-9.5V)
Device Address Hex Master
+VBATTERY Battery Power supply (6-8.4V) Clock Generator 1101 001x D2 ICH7-M
D D
+VCC_CORE Core Voltage for CPU
SO-DIMM0 1010 000x A0 ICH7-M
CPU Thermal Sensor 1001 100x 98 KBC
+V1.05S 1.05V for Calistoga & ICH7M core / FSB VTT Smart Battery 0001 011x 16 KBC
+V1.8 1.8V power rail for DDR2
PCIE Slot TBD TBD ICH7-M
PCB Layers
Top(Signal1)
VCC 2
Wake up Events
Signal 3 Trace Impedence:55ohm +/-15%
LID switch from EC
Signal4
Power switch from EC
Ground 5
Bottom(Signal6)
B B
PCB Footprints
3 5 4
USB Table
SOT23 SOT23_5
USB Port# Function Description
1 2 1 2 3
0 Standard USB2.0 Port
1 Standard USB2.0 Port
2 Standard USB2.0 Port
3 MINICARD_USB ns: Component marked "ns" is not stuff
4 CAM_USB
5 MINICARD_USB
A 6 CR_USB TOPSTAR TECHNOLOGY A
Swain Xu(许沐锌)
7 NC Page Name
NOTE
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 4 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
D D
C C
B B
A A
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name Sch Modify and history
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 5 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 7,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,27,28,29,30,31,32
U14 +V1.05S 7,10,15,16,20,21,28,29,31
ICS9LPRS365
+V3.3S FB7 TSSOP64_0D5_6D1
100ohm@100MHz,3A
FB0805 2 VDD_PCI
SMBUS ADD:1101 001X
1 2 +V3.3S_CK_VDD 9 48
VDD_48 IO_VOUT
16 VDD_PLL3
C117 C116 C118 61 63 R385 0 R0402
VDD_REF SMB_DATA SMB_DATA_S 13,16,17,18
0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 64 R386 0 R0402
SMB_CLK SMB_CLK_S 13,16,17,18
C0402 C0402 C0402 39 VDD_SRC
D 55 VDD_CPU D
+V3.3S_CK_VDD 38 R372 0 R0402
SRC5/PCI_STOP# PM_STP_PCI# 15
+VDDIO_CLK 12 37 R373 0 R0402
VDD_IO SRC5#/CPU_STOP# PM_STP_CPU# 15
C98 C103 C92 C93 C97 +VDDIO_CLK 20
10UF/6.3V,X5R 4.7UF/10V,Y5V 0.047uF/16V,X7R 0.047uF/16V,X7R 0.1UF/25V,Y5V +VDDIO_CLK VDD_PLL3_IO CPU0
26 VDD_SRC_IO_1 CPU0 54 CLK_CPU_BCLK 7
C0805 C0805 C0402 C0402 C0402 36 53 CPU#0
VDD_SRC_IO_2 CPU0# CLK_CPU_BCLK# 7
45 VDD_SRC_IO_3
+VDDIO_CLK 49 51 CPU1
VDD_CPU_IO CPU1 CLK_MCH_BCLK 9
50 CPU#1
CPU1# CLK_MCH_BCLK# 9
1 PCI0/OE#_0/2_A
SRC8/CPU2_ITP 47 CLK_PCIE_EXPCARD2 18
3 PCI1/OE#_1/4_ASRC8#/CPU2#_ITP 46 CLK_PCIE_EXPCARD2# 18
+V3.3S
TME 4 34
PCI2/TME SRC10 CLK_PCIE_EXPCARD 17
SRC10# 35 CLK_PCIE_EXPCARD# 17
R313 22 R0402 5
22 PCI_CLK_EC PCI3/FSD
2
PCIF5/ITP_EN SRC9
SRC9# 31 CLK_MCH_EXP# 7
CLK_XTAL_IN 60
+VDDIO_CLK R299 10K R0402 XTAL_IN R380 475,1% R0402 ns
SRC7/OE#_8 44 PCIE_CLKREQ2# 18
C100 C119 Set to SRC8 CLK_XTAL_OUT 59 43
C106 10UF/6.3V,X5R 0.1uF/10V,X5R No more than 500 milXTAL_OUT SRC7#/OE#_6
10UF/6.3V,X5R C0805 C0402 20 CR_USB48 R316 22 R0402 41
SRC6 DREFSSCLK 9
C0805 R310 22 R0402 10 40
14 CLK_USB48 USB_48/FSA SRC6# DREFSSCLK# 9
+VDDIO_CLK CLK_BSEL0 R304 2.2K R0402 27
SRC4 CLK_PCIE_ICH 14
C C99 C120 CLK_BSEL1 57 28 C
FSB/TEST_MODE SRC4# CLK_PCIE_ICH# 14
10UF/6.3V,X5R 0.1uF/10V,X5R CLK_BSEL2 R384 10K R0402 62
C0805 C0402 REF0/FSC/TEST_SEL
SRC3/OE#_0/2_B 24 CLK_PCIE_LAN 23
R395 22 R0402 25
15 CLK_ICH14 SRC3#/OE#_1/4_B CLK_PCIE_LAN# 23
8 VSS_PCI SRC2/SATA 21 CLK_ICH_SATA 15
+VDDIO_CLK 11 22
VSS_48 SRC2#/SATA# CLK_ICH_SATA# 15
C105 C94 C115 C96 15
10UF/6.3V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R VSS_IO
19 VSS_PLL3 SRC1/SE1 17 CLK_PCIE_HD 14
C0805 C0402 C0402 C0402 52 18
VSS_CPU SRC1#/SE2 CLK_PCIE_HD# 14
C303 23
27pF/50V,NPO CLK_XTAL_IN VSS_SRC_1
29 VSS_SRC_2 SRC0/DOT96 13 DREFCLK 9
C0402 58 14
Y6 VSS_REF SRC0#/DOT96# DREFCLK# 9
+VDDIO_CLK 42
C104 C95 VSS_SRC3 VR_CLK_EN R512 0 R0402
3 4 CK_PWRGD/PWRDWN# 56 CK505_CLK_EN# 15,32
10UF/6.3V,X5R 0.1uF/10V,X5R
C0805 C0402
ns 2 1 Remove all 4P2R resitor
许沐锌 090918
14.318MHz
XS4_5032_0D8 CLK_ICH14 C313 10PF/50V,NPO ns
C301 C0402
27pF/50V,NPO CLK_XTAL_OUT +V3.3S CLK_USB48 C295 10PF/50V,NPO ns
C0402 C0402
PCI_CLK_DEBUG C291 10PF/50V,NPO ns
C0402
update Y6 footprint R131 PCI_CLK_EC C292 10PF/50V,NPO ns
许沐锌 090917 10K C0402
B R0402 PCI_CLK_ICH C294 10PF/50V,NPO ns B
ns C0402
VR_CLK_EN
3
R139 Q2
1K 2N7002
+V1.05S R0402 SOT23 C129 R130
1 ns 0.1uF/10V,X5R 10K
15,32 CK505_CLK_EN#
ns C0402 R0402
ns
2
C293 ns
R302 R382 R383 0.1UF/25V,Y5V +V3.3S
56 1K 1K C0402
R0402 R0402 R0402
ns ns ns MCH_CLKREQ R315 10K R0402
+V1.05S 6,10,15,16,20,21,28,29,31
PINEVIEW_M PINEVIEW_M +V3.3S 6,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,27,28,29,30,31,32
U3D U3A
?
?
REV = 1.1
U25 E7 REV = 1.1
12 LVD_A_CLK_DN LVD_A_CLKM SMI_B H_SMI# 15
U26 H7 C22 0.1uF/10V,X5R F3 G2 R28 0 R0402
+V3.3S 12 LVD_A_CLK_DP LVD_A_CLKP A20M_B H_A20M# 15 14 DMI_TXP0 DMI_RXP_0 DMI_TXP_0 DMI_RXP0 14
R23 H6 C21 0.1uF/10V,X5R F2 G1 R29 0 R0402
12 LVD_A_DATA0_DN LVD_A_DATAM_0 FERR_B H_FERR# 15 14 DMI_TXN0 DMI_RXN_0 DMI_TXN_0 DMI_RXN0 14
R24 F10 C28 0.1uF/10V,X5R H4 H3 R39 0 R0402
12 LVD_A_DATA0_DP LVD_A_DATAP_0 LINT00 H_INTR 15 14 DMI_TXP1 DMI_RXP_1 DMI_TXP_1 DMI_RXP1 14
ICH
N26 F11 C26 0.1uF/10V,X5R G3 J2 R45 0 R0402
12 LVD_A_DATA1_DN LVD_A_DATAM_1 LINT10 H_NMI 15 14 DMI_TXN1 DMI_RXN_1 DMI_TXN_1 DMI_RXN1 14
12 LVD_A_DATA1_DP N27 LVD_A_DATAP_1 IGNNE_B E5 H_IGNNE# 15
DMI
R26 F8 R258 0 R0402
H_STPCLK# 15
R37 R50 12 LVD_A_DATA2_DN R27
LVD_A_DATAM_2 STPCLK_B
D 2.2K 2.2K 12 LVD_A_DATA2_DP LVD_A_DATAP_2
D
R0402 R0402 G6
DPRSTP_B H_DPRSTP# 15
LCTLA_CLK LVD_IBG R22 G10 N7 L10
LVD_IBG DPSLP_B H_DPSLP# 15 6 CLK_MCH_EXP# EXP_CLKINN EXP_RCOMPO
LCTLA_DATA J28 G8 N6 L9
LVD_VBG INIT_B H_INIT# 15 6 CLK_MCH_EXP EXP_CLKINP EXP_ICOMPI
LVD_VREFH_OUT_R N22 E11 H_BPM4_PRDY# L8
LVD_VREFL_OUT_R N23 LVD_VREFH PRDY_B H_BPM5_PRDQ# EXP_RBIAS
F15 R10
LVDS
LVD_VREFL PREQ_B RSVD_R10
12,22 LVDS_BKLTEN L27 LBKLT_EN R9 RSVD_R9 RSVD_TP_N11 N11
12 LBKLT_CTL L26 LBKLT_CTL N10 RSVD_N10 RSVD_TP_P11 P11
LCTLA_CLK L23 E13 N9 R277 R278
LCTLA_CLK THERMTRIP_B PM_THRMTRIP# 15,21 RSVD_N9
LCTLA_DATA K25 49.9,1% 750
LCTLB_CLK
12 LDDC_CLK K23 LDDC_CLK R0402 R0402
K24 R245 68 R0402 ns +V1.05S
12 LDDC_DATA LDDC_DATA K2 K3
H26 RSVD_K2 RSVD_K3
12 LVDD_EN LVDD_EN R232 0 R0402 VR_PROCHOT# J1 L2
C18 RSVD_J1 RSVD_L2
PROCHOT_B R62 0 R0402 M4 M2
W1 H_PWROK 15 RSVD_M4 RSVD_M2
CPUPWRGOOD L3 N2
RSVD_L3 RSVD_N2
NOTE PNV_22MM_REV1P10 PWROK 预留0 ohm +V1.05S
Place Resistor close to PNV GTLREF_EA 1 OF 6
R55 2.37K,1% LVD_IBG GTLREF A13 电阻,以备debug用 PNV_22MM_REV1P10 ?
H27
R0402 VSS 许沐锌
R49 0 R0402 LVD_VREFH_OUT_R
CPU
B20 BPM_2_1#/RSVD BSEL_2 K6 CPU_BSEL2 6
H_BPM2_N2 C20 976,1% R0402
H_BPM2_N3 BPM_2_2#/RSVD T6 ICTP ns R0402 GTLREF_EA
B21 BPM_2_3#/RSVD VID_0 H30
H29 T5 ICTP ns EXTBGREF
VID_1 T7 ICTP ns C221
VID_2 H28
T4 ICTP ns C238 C220 C0402 R252
1uF/10V,Y5V
VID_3 G30
CPU_RSVD T3 ICTP ns C0402 R269 C0402 2K,1%
1uF/10V,Y5V
G5 RSVD_G5 VID_4 G29
R0402
220pF/50V,X7R
H_TDI D14 F29 T2 ICTP ns 3.32K,1%
H_TDO TDI VID_5 T1 ICTP ns
D13 TDO VID_6 E29 R0402
H_TCK B14
H_TMS TCK
C14 TMS RSVD_L7 L7
H_TRST# C16 D20
TRST_B RSVD_D20
RSVD_H13 H13
RSVD_D18 D18
H_THERMDA D30
H_THERMDC THRMDA_1
E30 THRMDC_1 RSVD_TP_K9 K9
RSVD_TP_D19 D19
K7 EXTBGREF
+V1.05S EXTBGREF
R15 +V3.3S
R257 ns 51 R0402 H_BPM_N0 220
R249 ns 51 R0402 H_BPM_N1 R0402
R238 ns 51 R0402 H_BPM_N2 C30
R250 ns 51 R0402 H_BPM_N3 RSVD_C30
D31 RSVD_D31
R246 ns 51 R0402 H_BPM2_N0 C17
R243 ns 51 R0402 H_BPM2_N1 0.1uF/10V,X5R
B R234 ns 51 R0402 H_BPM2_N2 4 OF 6 C0402 B
R233 ns 51 R0402 H_BPM2_N3 ?
R255 ns 51 R0402 H_BPM4_PRDY# H_THERMDA
1
R244 51 R0402 H_BPM5_PRDQ#
EC SMBUS ADD:1001 100X
VCC
R266 62 R0603 CPU_RSVD C20 2 8
DXP SMBCLK I2C_CLK 22
R236 51 R0402 H_TDI 2200pF/25V,X7R
R248 51 R0402 H_TMS C0402 3 7
DXN SMBDATA I2C_DATA 22
R254 51 R0402 H_TDO
H_THERMDC G781
ADM1032AR 6
LM86CIM ALERT# OVT_SHUTDOWN# 21
MAX6657MSA 4 THERM# R27 0 R0402
GND
SOIC-8 THERM# PM_THRM# 15
ns
C18 C19
R251 51 R0402 H_TCK U2 R31 R26 27pF/50V,NPO 27pF/50V,NPO
5
R247 51 R0402 H_TRST# F75393S 10K 10K C0402 C0402
SO8_50_150 R0402 R0402
+V3.3S NOTE
1.H_THERMDA/C线宽10 MILS,并配对走线,
然后再包地处理. +V3.3S
R229
10K
R0402
2.H_THERMDA/C走线远离19V及VGA或高速线走线
EC_PROCHOT# 22
A A
+V1.05S TOPSTAR TECHNOLOGY
R241 Q16 R235
1K MMBT3904-F 1K Swain Xu(许沐锌)
3
13
PINEVIEW_M
MA_A_A[14:0]
MA_A_A0 AH19 AD2 MA_DQS#0
MA_A_A1 DDR_A_MA_0 DDR_A_DQSB_0
AJ18 DDR_A_MA_1 DDR_A_DM_0 AD4 MA_DM0
MA_A_A2 AK18
MA_A_A3 DDR_A_MA_2 MA_DATA0
AK16 DDR_A_MA_3 DDR_A_DQ_0 AC4
5
5
4
4
DDR_A_DQ_23
AK24 DDR_A_ODT_0
AH26 DDR_A_ODT_1 DDR_A_DQS_3 AK5 MA_DQS3
AH24 DDR_A_ODT_2 DDR_A_DQSB_3 AK3 MA_DQS#3
AK27 DDR_A_ODT_3 DDR_A_DM_3 AJ3 MA_DM3
AH1 MA_DATA24
DDR_A_DQ_24 MA_DATA25
DDR_A_DQ_25 AJ2
AG15 AK6 MA_DATA26
DDR_A_CK_0 DDR_A_DQ_26 MA_DATA27
AF15 DDR_A_CKB_0 DDR_A_DQ_27 AJ7
AD13 AF3 MA_DATA28
DDR_A_CK_1 DDR_A_DQ_28 MA_DATA29
AC13 DDR_A_CKB_1 DDR_A_DQ_29 AH2
AL5 MA_DATA30
DDR_A_DQ_30 MA_DATA31
DDR_A_DQ_31 AJ6
AC15 DDR_A_CK_3
AD15 DDR_A_CKB_3 DDR_A_DQS_4 AG22 MA_DQS4
AF13 DDR_A_CK_4 DDR_A_DQSB_4 AG21 MA_DQS#4
AG13 DDR_A_CKB_4 DDR_A_DM_4 AD19 MA_DM4
AE19 MA_DATA32
+V1.8
DDR_A_DQ_32
DDR_A_DQ_33 AG19 MA_DATA33
AD17 RSVD_AD17 DDR_A_DQ_34 AF22 MA_DATA34
R71
RSVD_AB17 DDR_A_DQ_37
DDR_A_DQ_38 AE21 MA_DATA38
DDR_A_DQ_39 AD21 MA_DATA39
R0402
M_CKE0
M_CKE1
M_CS#0
M_CS#1
M_ODT0
M_ODT1
AG27 MA_DQS#5
MA_A_WE#
DDR_A_DQSB_5
MA_A_BS#0
MA_A_BS#1
MA_A_BS#2
MA_A_CAS#
MA_A_RAS#
AB4 VSS DDR_A_DM_5 AJ27 MA_DM5
AK8
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR0
M_CLK_DDR1
0
RSVD_AK8
ns
13
13
13
13
13
13
13
13
13
13
13
13
3
3
AG25 MA_DATA41
13
13
13
13
DDR_A_DQ_41
R0402
?
?
U3B
2 OF 6
REV = 1.1
Note:
DDR_RPU
DDR_RPD
PNV_22MM_REV1P10
DDR_VREF
A3
Size
Date:
R81
R82
C65
Page Name
C0402
13 MA_DQS[7:0]
13 MA_DM[7:0]
13 MA_DATA[63:0]
13 MA_DQS#[7:0]
Project Name
0.1UF/25V,Y5V
R0402
R0402
80.6,1%
80.6,1%
+V1.8
+V1.8
R0402
1K,1%
R0402
1K,1%
R83
R84
C270
C0402
X01
1
1
Sheet
Swain Xu(许沐锌)
10,13,27,28,29,30,31
8
TOPSTAR TECHNOLOGY
Diamondville (PWR&GND)(2of2)
of 39
to others or used for any purpose other than that for which it was obtained without
PROPERTY NOTE: this document contains information confidential and property to
B
Rev
+V3.3S 6,7,10,11,12,13,14,15,16,17,18,19,20,21,22,23,27,28,29,30,31,32
PINEVIEW_M Note:
U3C HSYNC/VSYNC: Locate series
? esistor strsps within 750 mil of MCH
D12 REV = 1.1
6 MCH_BSEL0 XDP_RSVD_00 R0402 10 R42
6 MCH_BSEL1 A7 XDP_RSVD_01 CRT_HSYNC M30 CRT_HSYNC 11
D6 M29 R0402 10 R41 CRT_VSYNC 11
6 MCH_BSEL2 XDP_RSVD_02 CRT_VSYNC
C5 XDP_RSVD_03
D D
C7 XDP_RSVD_04
XDP_RSVD_5 C6 N31
XDP_RSVD_05 CRT_RED CRT_RED 11 +V3.3S
D8 XDP_RSVD_06 CRT_GREEN P30 CRT_GREEN 11
B7 XDP_RSVD_07 CRT_BLUE P29 CRT_BLUE 11
VGA
A9 XDP_RSVD_08 CRT_IRTN N30
XDP_RSVD_9 D9 XDP_RSVD_09
XDP_RSVD_11
C8 XDP_RSVD_10 R70 为T 物料, 需要修改 R30 10K R0402 PM_EXTTS0#
B8
C10
XDP_RSVD_11
L31 CRT_DDC_DATA 11
许沐锌 090513
XDP_RSVD_12 CRT_DDC_DATA
D10 XDP_RSVD_13 CRT_DDC_CLK L30 CRT_DDC_CLK 11
B11 XDP_RSVD_14
B10 P28 DACREFSET R70 665,1%R0402 update R70 to R0402
XDP_RSVD_15 DAC_IREF +V3.3S
B12
XDP_RSVD_17 C11
XDP_RSVD_16
Y30 DREFCLK 6
许沐锌 0900917
XDP_RSVD_17 DPL_REFCLKINP
DPL_REFCLKINN Y29 DREFCLK# 6
DPL_REFSSCLKINP AA30 DREFSSCLK 6
DPL_REFSSCLKINN AA31 DREFSSCLK# 6
R35 R36
L11 2.2K 2.2K
RSVD_L11 R0402 R0402
CRT_DDC_DATA
PNV_22MM_REV1P10
3 OF 6
PM_EXTTS#_1/DPRSLPVR? K29 R33 0 R0402
PM_DPRSLPVR 15 注意这一点的命名 CRT_DDC_CLK
J30
C PM_EXTTS#_0
L5 R51 0 R0402
PM_EXTTS0# 13
IMVP_PWRGD 15,22,32
许沐锌 090514 C
PWROK R64 0 R0402
RSTINB AA3 BUF_PLT_RST# 14,15,17,18,22,23
HPL_CLKINN W8 CLK_MCH_BCLK# 6
HPL_CLKINP W9 CLK_MCH_BCLK 6
AA7
MISC
RSVD_TP_AA7
AA6 RSVD_TP_AA6
R5 R54 150,1% R0402 CRT_BLUE
RSVD_TP_R5
R6 RSVD_TP_R6 R60 150,1% R0402 CRT_GREEN
AA21 RSVD_TP_AA21
W21 R48 150,1% R0402 CRT_RED
RSVD_TP_W21
T21 RSVD_TP_T21
V21 RSVD_TP_V21 150ohm电阻到GMCH
走线阻抗37.5ohm
R240 1K,1% R0402 ns XDP_RSVD_5
150ohm电阻到VGA口
R256 1K,1% R0402 XDP_RSVD_9 走线阻抗50ohm
R239 1K,1% R0402 ns XDP_RSVD_11
PLACE 150 OHM
B RESISTORS CLOSE TO B
R237 1K,1% R0402 ns XDP_RSVD_17
GMCH
TOPSTAR TECHNOLOGY
A Swain Xu(许沐锌) A
Page Name Calistoga(HOST)
Size Project Name Rev
B X01 B
Date: Tuesday, September 29, 2009 Sheet 9 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
PINEVIEW_M
U3F
?
+V3.3S 6,7,9,11,12,13,14,15,16,17,18,19,20,21,22,23,27,28,29,30,31,32
+V0.89S +VCC_CORE A11 REV = 1.1
U3E VSS VSS F24
? +V1.8 8,13,27,28,29,30,31 A16 VSS VSS F28
PINEVIEW_M +V1.05S 6,7,15,16,20,21,28,29,31 A19 VSS VSS F4
REV = 1.1 A23 A29
+V0.89S VCC +V1.5S 14,16,17,18,28,29,31 RSVD_NCTF VSS G15
VCC A25 +VCC_CORE 29,32 A3 RSVD_NCTF VSS G17
C247 C257 C246 C248 C256
VCC A27 4A +V0.89S 28,31 A30 RSVD_NCTF VSS G22
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
C0402 C0402 C0402 C0402 C0402 B23 A4
VCC +V1.8S 14,30 RSVD_NCTF VSS G27
T13 VCCGFX VCC B24 AA13 VSS VSS G31
1.38A T14
T16
VCCGFX VCC B25
B26
AA14
AA16
VSS VSS H11
D
VCCGFX VCC VSS VSS H15 D
T18 VCCGFX VCC B27 AA18 VSS VSS H2
T19 VCCGFX VCC C24 AA2 VSS VSS H21
+V0.89S V13 C26 AA22
VCCGFX VCC HCPU1 VSS VSS H25
V19 VCCGFX VCC D23 AA25 VSS VSS H8
W14 VCCGFX VCC D24 AA26 VSS VSS J11
W16 D26 +VCC_CORE AA29
VCCGFX VCC VSS VSS J13
W18 VCCGFX VCC D28 AA8 VSS VSS J15
GFX/MCH
C250 C254 C255 W19 E22 AB19
C0402 C0402 VCCGFX VCC VSS VSS J4
VCC E24 AB21 VSS VSS K11
1uF/10V,X5R
1uF/10V,X5R
C0603 E27 C234 C231 C230 C240 C364 C363 AB28 VSS K13
CPU
VCC C0402 C0402 C0402 C0402 C0805 C0805 CPU_HOLE VSS
2.2UF/10V,X5R
1
2
3
4
5
6
7
8
9
1uF/10V,Y5V
1uF/10V,Y5V
1uF/10V,Y5V
1uF/10V,Y5V
10uF/6.3V,X5R
10uF/6.3V,X5R
VCC F25 AC10 VSS VSS K27
G19 AC11 VSS K28
1
2
3
4
5
6
7
8
9
+V1.8 VCC VSS
VCC G21 AC19 VSS VSS K30
GND
VCC G24 AC2 VSS VSS K4
H17 AC21 6 OF 6
VCC VSS VSS K8 ?
VCC H19 AC28 VSS L1
VSS PNV_22MM_REV1P10
+V1.8 H22 AC30
5 OF 6 VCC VSS VSS L13
PNV_22MM_REV1P10 H24 AD26 VSS L18
C271 C276 C269 C277 C275 ? VCC J17 AD5
VSS
C0402 C0402 C0402 C0402 C0402 VCC VSS VSS L22
AK13 VCCSM VCC J19 Totol: AE1 VSS VSS L24
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
1
2
3
4
5
6
7
8
9
R2830 R0805 AK7 N19 AG10
VCCCK_DDR VCC VSS VSS N5
AL7 N21 AG3 VSS N8
1
2
3
4
5
6
7
8
9
C272 C274 VCCCK_DDR VCC VSS
AH18 VSS VSS P13
C0805 C0402
10uF/6.3V,X5R
0.1uF/10V,X5R
U7 VCCA_DDR
length AH8 VSS VSS P21
U8 VCCA_DDR AJ1 RSVD_NCTF VSS P3
U9 VCCA_DDR AJ16 VSS VSS P4
C229 C242 C153 V2 Route VCCSENSE and VSSSENSE AJ31
C0805 C0805 C0805 C253 VCCA_DDR traces at 27.4 Ohms with 50 VSS VSS R25
10uF/6.3V,X5R
10uF/6.3V,X5R
C0402
4.7uF/10V,X5R
0.1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
+V1.8S C0402 C0402 C47 600ohm@100MHz,1.5A C51 C25
L1 C0805 C0402 VSS VSS Y4
C31
LVDS
FB0805 RSVD_NCTF
1uF/10V,X5R
1 2 T30 ns D22
EXP\CRT\PLL
+V1.05S
0.35A B2
C2
VCCRING_WEST
P2 T8 ICTP ns
F17
F19
VSS
VCCRING_WEST RSVD VSS
A21 VCC_LGI_VID VCCSFR_DMIHMPLL AA1 +V1.8S
1uF/10V,X5R
1uF/10V,Y5V
A
1uF/10V,X5R A
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name Calistoga(Graphic)
Size Project Name Rev
A3 X01 B
+V5S 12,14,16,19,20,22,28,30,31,32
+V3.3S 6,7,9,10,12,13,14,15,16,17,18,19,20,21,22,23,27,28,29,30,31,32
D
Cross moat place D
place D3 FB2
1 2 1 2
GND_VGA +V3.3S +V3.3S
1N5819HW-F 120ohm@100MHz,500mA
FB5 SOD123 FB0603 C258 R264
47ohm@100MHz,500mA 0.1uF/10V,X5R 100K
C0402 R0402 VGA
17
FB0603
1 2 ROUT VGADMF R276 R265
9 CRT_RED
1K 1K
CONNECTOR TOP VIEW
3
Update FB2 to 500mA GND_VGA 6 GND R0402 R0402
R63 D8 许沐锌 090713 ROUT GND_VGA 1 R NC
11 ns ns
C44 C45
150,1% BAT54S 7 GND
R0402 5.6pF/50V NPO 5.6pF/50V NPO SOT23 GOUT 2 G SDA
12 5VDDCDA
C0402 C0402 8 GND
BOUT 3 B HSYNC 13 CRT_HSYNC
CRT_HSYNC 9
2
FB4 9 NC
47ohm@100MHz,500mA
GND_VGA 4 NC VSYNC 14 CRT_VSYNC
CRT_VSYNC 9
FB0603 GND_VGA +V3.3S 10 GND
GOUT GND CLK 5VDDCCK
9 CRT_GREEN 1 2 5 15
shell
3
shell
R47 C29 C30
16
150,1% D7 C10518-11505-L C252 C239 C235 C227
R0402 5.6pF/50V NPO 5.6pF/50V NPO BAT54S 15PF/50V,NPO 15PF/50V,NPO 15PF/50V,NPO 15PF/50V,NPO
C0402 C0402 SOT23 C0402 C0402 C0402 C0402
C ns ns C
2
FB3 GND_VGA
47ohm@100MHz,500mA
FB0603 GND_VGA +V3.3S GND_VGA VGA 公用M12,S46 connector
1 2 BOUT 许沐锌 090713 GND_VGA
9 CRT_BLUE
3
No external level shifter for HSync & VSync at PINEVIEW
R32 许沐锌 090605
C24 C25
150,1% D4
R0402 5.6pF/50V NPO 5.6pF/50V NPO BAT54S
C0402 C0402 SOT23
1
R267 R263
2.2K Q17 2.2K
R0402 BSS138 R0402
2 3 5VDDCCK
9 CRT_DDC_CLK
3
+V3.3S D26
1
+V3.3S +V3.3S +V3.3S +V5_VGA BAT54S
B SOT23 B
D28
2
D27
2
C241 2 R281 R282
CRT_HSYNC 3 0.1uF/10V,X5R 2.2K Q18 2.2K +V5_VGA
C0402 CRT_VSYNC 3 C237 R0402 BSS138 R0402 GND_VGA
1 0.1uF/10V,X5R
1 C0402 2 3 5VDDCDA
9 CRT_DDC_DATA
3
BAT54S
SOT23 GND_VGA BAT54S
SOT23 GND_VGA +V3.3S D29
1
BAT54S
SOT23
2
+V5_VGA
GND_VGA
+V5_VGA +V3.3S
C23 C49
0.1uF/10V,X5R 0.1uF/10V,X5R
A
C0402 C0402 A
GND_VGA TOPSTAR TECHNOLOGY
Add C323 for EMI issue
GND_VGA 许沐锌 081222 Swain Xu(许沐锌)
GND_VGA Connect GND to GND_VGA for EMI requirement Page Name CRT CONN & S TV OUT & LIDR SWITCH
Swain 080724
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 11 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3AL 14,15,16,17,18,19,20,22,23,24,25,26,27,28,29,30,32
+V3.3S 6,7,9,10,11,13,14,15,16,17,18,19,20,21,22,23,27,28,29,30,31,32
+V5AL 16,19,20,26,27,28,29,30
+VDC 17,20,24,26,27,28,29,30,31,32
+V5S 11,14,16,19,20,22,28,30,31,32
High : Enable R1
Low : Disable 100K +V3.3S
R0402
2 R5
7,22 LVDS_BKLTEN
D1 1K LCDVDD
D
3 R0402 CLOSE TO INTCON 500mA D
1 BAT54A BKLT_ON
19,22 LIDR# LCDCON
SOT23
88242-4001
2 C5 CNS40_LCDB Add R698,R701 at SM BUS
22 HW_OFF_BKLT# D16 1000pF/50V,X7R 许沐锌 081218
41 41
3 C0402 LCDVDD 1 2
1 2
3 3 4 4
1 BAT54A 5 6
15,22 PM_SUS_STAT# 7 LVD_A_DATA1_DN 5 6 LVD_A_DATA0_DN 7
SOT23 7 LVD_A_DATA1_DP 7 7 8 8 LVD_A_DATA0_DP 7
9 9 10 10
7 LVD_A_CLK_DP 11 11 12 12 LVD_A_DATA2_DN 7
7 LVD_A_CLK_DN 13 13 14 14 LVD_A_DATA2_DP 7
15 15 16 16
EDID_PWR 17 18
17 18 LDDC_CLK 7
+V5AL_CAM 19 19 20 20 LDDC_DATA 7
BKLT_PWM 21 22
BKLT_ON 21 22
23 23 24 24 USB_CAM_PN5 14
22 IVT_I_ADJ 25 25 26 26 USB_CAM_PP5 14
27 27 28 28
+VDC FB1 0 R0805 INVT_VDD 29 30 R211 0 R0805 +V5S
29 30
31 31 32 32
1A C3
33
35
33 34 34
36
1A
0.1UF/25V,Y5V 35 36 R447 0 R0402LVDD_EN
37 37 38 38
C0402 39 40
Q11 39 40 R463 10K
42 42 +V3.3S
C +V3.3AL +V3.3S AO6409 R0402 C
TSOP6_0D95_1D6
4
5
6
LCDVDD
S
LCDCONN 改成立式,料号小雷已申请620904000008
R208 500mA 许沐锌 090713
10K
D
R0402
G
3
2N7002 2N7002 100K
SOT23 ns SOT23 ns
1 Q14
7 LVDD_EN 2N7002E-T1 0.1UF/25V,Y5V LVDD_EN
100pF/50V,NPO
1 1
SOT23 C0402
2
2
100K 100K
R0402 ns ns
SPWG Require LCDVDD rising time
R213 R212
is 0.5-10ms,1-10ms is better 0 0
B B
R0805 R0805
ns
R214 0 R0805
+V5AL_CAM
2 3
500mA
R224
10K Q13 C211 C213
R0402 SOT23 0.1uF/10V,X5R 10UF/6.3V,X5R
ns AO3415 C0402 C0805
1
ns
R223 10K
22 EC_BKLT_PWM R4 0 R0402 R0402
ns
R3 0 R0402 BKLT_PWM
7 LBKLT_CTL
3
ns
2
R222 2N7002E-T1
100K SOT23
R0402 ns
ns
+V0.9S 27,31
+V1.8 8,10,27,28,29,30,31
DIM1
+V1.8 DDR2_SODIMM200
DDR200STD_5D2 SO-DIMM 0 +V3.3S 6,7,9,10,11,12,14,15,16,17,18,19,20,21,22,23,27,28,29,30,31,32
+V1.8
112
111
117
118
103
104
187
178
190
155
132
144
156
168
149
161
138
150
162
96
95
81
82
87
88
21
33
34
15
27
39
28
40
9
2
3
8 MA_A_A[14:0]
C280 C264 C282
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
MA_DATA[63:0] 8
D 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R C286 C267 C87 D
MA_A_A0 102 5 MA_DATA0 C0805 C0805 C0805 0.1uF/10V,X5R 2.2UF/10V,X5R 2.2UF/10V,X5R
MA_A_A1 A0 D0 MA_DATA1 C0603 C0603
101 A1 D1 7 C0402
MA_A_A2 100 17 MA_DATA2
MA_A_A3 A2 D2 MA_DATA3
99 A3 D3 19
MA_A_A4
MA_A_A5
98
97
A4
A5
D4
D5
4
6
MA_DATA4
MA_DATA5 +V1.8 Layout note:电容靠近DDR slot VDD PIN
MA_A_A6 94 14 MA_DATA6
MA_A_A7 A6 D6 MA_DATA7
92 A7 D7 16
MA_A_A8 93 23 MA_DATA8
MA_A_A9 A8 D8 MA_DATA9 C90 C85 C287 C86 C89
91 A9 D9 25
MA_A_A10 105 35 MA_DATA10 0.1uF/10V,X5R 2.2UF/10V,X5R 0.1uF/10V,X5R 2.2UF/10V,X5R 0.1uF/10V,X5R
MA_A_A11 A10/AP D10 MA_DATA11 C0402 C0603 C0402 C0603 C0402
90 A11 D11 37
MA_A_A12 89 20 MA_DATA12
MA_A_A13 A12 D12 MA_DATA13
116 A13 D13 22
MA_A_A14 86 36 MA_DATA14
A14 D14 MA_DATA15 +V1.8
84 A15 D15 38
85 43 MA_DATA16
8 MA_A_BS#2 A16_BA2 D16
45 MA_DATA17
D17 MA_DATA18
8 MA_A_BS#0 107 BA0 D18 55
106 57 MA_DATA19 C88 C91 C281 C285 C273
8 MA_A_BS#1 BA1 D19
44 MA_DATA20 2.2UF/10V,X5R 0.1uF/10V,X5R 2.2UF/10V,X5R 0.1uF/10V,X5R 2.2UF/10V,X5R
D20 MA_DATA21 C0603 C0402 C0603 C0402 C0603
8 M_CS#0 110 CS0 D21 46
115 56 MA_DATA22
8 M_CS#1 CS1 D22 MA_DATA23
D23 58
MA_DM0 10 61 MA_DATA24 +V0.9S
MA_DM1 DQM0 D24 MA_DATA25
26 DQM1 D25 63
MA_DM2 52 73 MA_DATA26 RN19 47x4 RA0402_8
MA_DM3 DQM2 D26 MA_DATA27
67 DQM3 D27 75 1 2 M_CKE0 8
C MA_DM4 130 62 MA_DATA28 3 4 C
DQM4 D28 MA_A_BS#2 8
MA_DM5 147 64 MA_DATA29 5 6
DQM5 D29 M_CKE1 8
MA_DM6 170 74 MA_DATA30 7 8 MA_A_A9
8 MA_DM[7:0] MA_DM7 DQM6 D30 MA_DATA31
185 DQM7 D31 76
DDRII
123 MA_DATA32 RN7 47x4 RA0402_8
D32 MA_DATA33 MA_A_A12
8 MA_A_WE# 109 WE D33 125 1 2
113 135 MA_DATA34 3 4 MA_A_A11
8 MA_A_CAS# CAS D34
108 137 MA_DATA35 5 6 MA_A_A14
8 MA_A_RAS# RAS D35
124 MA_DATA36 7 8 MA_A_A8
D36 MA_DATA37
8 M_CKE0 79 CKE0 D37 126
80 134 MA_DATA38 RN8 47x4 RA0402_8
8 M_CKE1 CKE1 D38 MA_DATA39 MA_A_A7
D39 136 1 2
30 141 MA_DATA40 3 4 MA_A_A3
8 M_CLK_DDR0 CK0 D40 MA_DATA41 MA_A_A5
8 M_CLK_DDR#0 32 CK0 D41 143 5 6
164 151 MA_DATA42 7 8 MA_A_A4
8 M_CLK_DDR1 CK1 D42 MA_DATA43
8 M_CLK_DDR#1 166 CK1 D43 153
140 MA_DATA44 RN15 47x4 RA0402_8
D44 MA_DATA45 MA_A_A6
8 M_ODT0 114 ODT0 D45 142 1 2
119 152 MA_DATA46 3 4 MA_A_A1
8 M_ODT1 ODT1 D46
154 MA_DATA47 5 6 MA_A_A10
MA_DQS0 D47 MA_DATA48 MA_A_A2
13 DQS0 D48 157 7 8
MA_DQS1 31 159 MA_DATA49
MA_DQS2 DQS1 D49 MA_DATA50 RN16 47x4 RA0402_8
51 DQS2 D50 173
MA_DQS3 70 175 MA_DATA51 1 2 MA_A_A0
MA_DQS4 DQS3 D51 MA_DATA52
131 DQS4 D52 158 3 4 MA_A_BS#0 8
MA_DQS5 148 160 MA_DATA53 5 6
DQS5 D53 MA_A_BS#1 8
MA_DQS6 169 174 MA_DATA54 7 8
8 MA_DQS[7:0] DQS6 D54 MA_A_RAS# 8
MA_DQS7 188 176 MA_DATA55
DQS7 D55 MA_DATA56 RN17 47x4 RA0402_8
D56 179
B MA_DATA57 B
D57 181 1 2 MA_A_WE# 8
195 189 MA_DATA58 3 4
6,16,17,18 SMB_DATA_S SDA D58 M_CS#0 8
197 191 MA_DATA59 5 6
6,16,17,18 SMB_CLK_S SCL D59 M_ODT0 8
180 MA_DATA60 7 8 MA_A_A13
R298 10K R0402 D60 MA_DATA61
198 SA0 D61 182
R297 10K R0402 MA_DATA62
+V3.3S
200 SA1 1010 000x D62 192
MA_DATA63 RN18 47x4 RA0402_8
D63 194
1 2 M_ODT1 8
199 11 MA_DQS#0 3 4
VDDSPD DQS#0 MA_A_CAS# 8
29 MA_DQS#1 5 6
DQS#1 M_CS#1 8
1 49 MA_DQS#2 7 8
27 SM_VREF_L VREF1 DQS#2
C80 68 MA_DQS#3
C81 DQS#3 MA_DQS#4
DQS#4 129
0.1uF/25V,Y5V 2.2UF/10V,X5R C83 83 146 MA_DQS#5
NC1 DQS#5
C0402 C0603
0.1uF/25V,Y5V
C82
2.2UF/10V,X5R
120 NC2 DQS#6 167 MA_DQS#6
MA_DQS#7 +V1.8
先换成排租,等申请料后换47ohm:520200000002
50 186
C0402 C0603 69
NC3 DQS#7 许沐锌 090721
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
NC4 MA_DQS#[7:0] 8
GND0
GND1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
163 NCTEST
close to DDR pin
47
133
183
77
12
48
184
78
71
72
121
122
196
193
8
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
201
202
R88
9 PM_EXTTS0# 1K,1% ns
R0402
SM_VREF_L
每2个电阻两个0.1UF电容
A
R89 A
+V0.9S 1K,1% TOPSTAR TECHNOLOGY
R0402
ns Swain Xu(许沐锌)
Page Name DDRII SODIMM0
C79 C70 C76 C69 C68 C73 C77 C74 C75 C67 C78 C72 C71
Size Project Name Rev
0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R
A3 X01
C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 B
Date: Tuesday, September 29, 2009 Sheet 13 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3AL 12,15,16,17,18,19,20,22,23,24,25,26,27,28,29,30,32
+V1.5S 10,16,17,18,28,29,31
+V1.8S 10,30
+V3.3S 6,7,9,10,11,12,13,15,16,17,18,19,20,21,22,23,27,28,29,30,31,32
+V5S 11,12,16,19,20,22,28,30,31,32
U18B TGP
DMI
7 DMI_TXN1 DMI1TXN USBP3N USB_PORT_PN2 20 IRDY# AD4
T25 K5 R348 8.2K PCI_IRDY# C22 C19
7 DMI_TXP1 DMI1TXP USBP3P USB_PORT_PP2 20 PME# AD5
T19 K1 PCI_SERR# B11 B18
DMI2RXN USBP4N USB_CAM_PN5 12 R329 8.2K PCI_SERR# PCI_STOP# F14 SERR# AD6
T18 DMI2RXP USBP4P K2 STOP# AD7 B19
U23 L2 USB_CAM_PP5 12 R330 8.2K PCI_STOP# PCI_LOCK# A8 D16
DMI2TXN USBP5N MINICARD_USB_PN4 17 PLOCK# AD8
U24 L3 MINICARD_USB_PP4 17 R349 8.2K PCI_LOCK# PCI_TRDY# A10 PCI D15
DMI2TXP USBP5P R328 8.2K PCI_TRDY# PCI_PERR# D10 TRDY# AD9
V21 DMI3RXN USBP6N M6 PERR# AD10 A13
V20 M5 USB_CR_PN6 20 R351 8.2K PCI_PERR# PCI_FRAME# A16 E14
DMI3RXP USBP6P USB_BT_PN7 USB_CR_PP6 20 R354 8.2K PCI_FRAME# FRAME# AD11
V24 DMI3TXN USBP7N N1 AD12 H14
V23 N2 USB_BT_PP7 R333 8.2K PCI_REQ#1 L14
DMI3TXP USBP7P R337 8.2K PCI_REQ#2 AD13
AD14 J14
R355 8.2K ns FLASH_SEL0 A18 E10
R323 8.2K ns FLASH_SEL1 GNT1# AD15
USB
OC0# D4 USB_PORT_OC0# 19 E16 GNT2# AD16 C11
23 PCIE_RXN0_LAN K21 PERN1 OC1# C5 AD17 E12
K22 D3 R345 8.2K PCI_PIRQ#0 PCI_REQ#1G16 B9
23 PCIE_RXP0_LAN PERP1 OC2# REQ1# AD18
C304 0.1UF/10V,X7R J23 D2 R325 8.2K PCI_PIRQ#1 PCI_REQ#2 A20 B13
23 PCIE_TXN0_LAN PETN1 OC3# USB_PORT_OC1# 20 REQ2# AD19
C305 0.1UF/10V,X7R J24 E5 R364 R324 8.2K PCI_PIRQ#2 L12
23 PCIE_TXP0_LAN PETP1 OC4# AD20
M18 E6 10K R115 8.2K PCI_PIRQ#3 B8
17 PCIE_RXN1_SLOT PERN2 OC5#/GPIO29 AD21
M19 C2 R0402 R327 8.2K PCI_PIRQ#4 FLASH_SEL0 G14 A3
17 PCIE_RXP1_SLOT PERP2 OC6#/GPIO30 GPIO48/ STRAP1# AD22
C307 0.1UF/10V,X7R K24 C3 +V3.3AL R347 8.2K PCI_PIRQ#5 FLASH_SEL1 A2 B5
17 PCIE_TXN1_SLOT PETN2 OC7#/GPIO31 GPIO17/ STRAP2# AD23
C309 0.1UF/10V,X7R K25 R116 8.2K PCI_PIRQ#6 GPIO22 C15 A6
17 PCIE_TXP1_SLOT PETP2 GPIO22 AD24
L23 R326 8.2K PCI_PIRQ#7 C9 G12
18 PCIE_RXN2_SLOT PERN3 22 EC_RUNTIME_SCI# GPIO1 AD25
L24 R117 8.2K RSVD_K9 H12
18 PCIE_RXP2_SLOT PERP3 AD26
C314 0.1UF/10V,X7R L22 G2 R114 8.2K RSVD_M13 R332 R346 C8
18 PCIE_TXN2_SLOT PETN3 USBRBIAS AD27
PCI-E
1 1
+V1.8S 2 2
3 3
4 4
5 5
6 6 21 21
7 7
9,15,17,18,22,23 BUF_PLT_RST# 8 8
9 9
10 10
6 CLK_PCIE_HD 11 11
B B
6 CLK_PCIE_HD# 12 12
13 1322 22
PCIE_RXN3_HD 14
PCIE_RXP3_HD 14
15 15
16 16
PCIE_TXN3_HD 17
PCIE_TXP3_HD 17
18 18
SPI_POWER +V5S +V3.3S R893 0 19
+V3.3S+V3.3AL BT 19
20 20
Q22 HEADER 2_1 HD_CN2
R321 R322 R320 R376 R318 AO3415 CNS10_0D8_R CNS20_0D5_RA1
0 0 10K 8.2K 8.2K 20pin 0.5mm bot FFC
R0402 R0402 R0402 R0402 R0402 R483 0 R0603 2 3 1 HD
ns ns U16 ns ns ns BT ns 1
2 2
W25X40 R482 0 R0603 USB_BT_PP7 3 11
SO8_50_150 ns ns C251 USB_BT_PN7 3 11
4 4
8 5 SPI_SI R377 22 R0402 ns SPI_SI_ICH 1000pF/50V,X7R 5 12
SPI_SI_ICH 15 20 BT_LED#
1
VDD SI SPI_SO R319 22 R0402 ns SPI_SO_ICH ns 5 12
SO 2 SPI_SO_ICH 15 6 6
R317 3.3K R0402 SPI_WP# 3 1 SPI_CE#_ICH R481 7
WP# CE# SPI_CE#_ICH 15 7
ns 6 SPI_SCK R378 22 R0402 SPI_SCK_ICH 100K 8
SCK SPI_SCK_ICH 15 8
R379 3.3K R0402 SPI_HD# 7 ns ns 9
ns HOLD# 9
VSS 4 22 BT_DISABLE 10 10
C306
0.1uF/10V,X5R BT_ON# R478 ns 1K BT_CON
22 BT_PWRON
C0402
ns SPI_POWER 8 1 SPI_CE#_ICH BT
SPI_HD# VCC CS# SPI_SO
A 7 HOLD# Q 2 NS SPI ROOM at ICH7 A
SPI_SCK 6 3 SPI_WP# Swain 081113 TOPSTAR TECHNOLOGY
SPI_SI CLK W#
5 4
D VSS Swain Xu(许沐锌)
U15 Reserve Bule tooth power contral signal Page Name
W25X80A 许沐锌 090924 ICH7_M(1 of 4)
SOIC8_50_208 Size Project Name Rev
ns A3 X01
SPI ROOM used +3.3S, reserved 3.3AL B
Swain 080815 Date: Tuesday, September 29, 2009 Sheet 14 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,14,16,17,18,19,20,21,22,23,27,28,29,30,31,32
TGP +V5S 11,12,14,16,19,20,22,28,30,31,32 +V1.05S 6,7,10,16,20,21,28,29,31
U18C +V3.3A_RTC 16
EC_RTC 26
TGP +V3.3AL 12,14,16,17,18,19,20,22,23,24,25,26,27,28,29,30,32
R12 U1LB AE6 +V3.3S U18D
RSVD03 SATA0RXN SATA_RXN0 20
AE20 RSVD04 SATA0RXP AD6 SATA_RXP0 20
AD17 AC7 C0402 0.01uF/25V,X7R C327 R414 10K R0402 AA5 U1LB T15 GPIO0
RSVD05 SATA0TXN SATA_TXN0 20 LDRQ1#/GPIO23 BM_BUSY#/GPIO0
AC15 AD7 C0402 0.01uF/25V,X7R C326 ns V6 W16
RSVD06 SATA0TXP SATA_TXP0 20 17,22 LPC_AD0 LAD0/FWH0 GPIO6
LPC
AD18 RSVD07 SATA1RXN AE8 17,22 LPC_AD1 AA6 LAD1/FWH1 GPIO7 W14
Y12 AD8 Y5 K18 GPIO8
RSVD08 SATA1RXP 17,22 LPC_AD2 LAD2/FWH2 GPIO8
AA10 AD9 R433 W8 H19 GPIO9
RSVD09 SATA1TXN 17,22 LPC_AD3 LAD3/FWH3 GPIO9
AA12 AC9 0 +V3.3S R434 10K R0402 Y8 M17
RSVD10 SATA1TXP LDRQ0# GPIO10 EXT_SMI# 22
ns GPIO12
SATA
Y10 RSVD11 R0402 17,22 LPC_FRAME# Y4 LFRAME# GPIO12 A24
D AD15 C23 GPIO13 D
RSVD12 R394 33 R0402 GPIO13 GPIO14
W10 RSVD13 20 HDA_BITCLK P6 HDA_BIT_CLK GPIO14 P5
V12 R397 33 R0402 U2 E24 GPIO15
AUDIO
RSVD14 20 HDA_RST# HDA_RST# GPIO15
AE21 RSVD15 20 HDA_SDATA_IN0 W2 HDA_SDI0 DPRSLPVR AB20 PM_DPRSLPVR 9
AE18 RSVD16 V2 HDA_SDIN1 STP_PCI# Y16 PM_STP_PCI# 6
AD19 RSVD17 P8 HDA_SDIN2 STP_CPU# AB19 PM_STP_CPU# 6
U12 R412 33 R0402 AA1 R3 T23 ICTPns
RSVD18 20 HDA_SDOUT R405 33 R0402 HDA_SDOUT GPIO24 GPIO25
SATA_CLKN AD4 CLK_ICH_SATA# 6 20 HDA_SYNC Y1 HDA_SYNC GPIO25 C24
AC17 AC4 AA3 D19 T15 ICTPns
RSVD19 SATA_CLKP CLK_ICH_SATA 6 6 CLK_ICH14 CLK14 GPIO26
AB13 D20 T18 ICTPns
RSVD20 R0402 24.9,1% R435 GPIO27 T19 ICTPns
AC13 AD11 U3 F22
EPROM
RSVD21 SATARBIAS# EE_CS GPIO28
AB15 RSVD22 SATARBIAS AC11 AE2 EE_DIN CLKRUN# AC19 PM_CLKRUN# 22
Y14 RSVD23 SATALED# AD25 HDD_LED# 20 T6 EE_DOUT GPIO33 U14
V3 EE_SHCLK GPIO34 AC1 BOARDID_0 16
AB16 RSVD24 GPIO38 AC23 BOARDID_1 16
AE24 RSVD25 T4 LAN_CLK GPIO39 AC24 BOARDID_2 16
AE23 RSVD26 P7 LANR_STSYNC
R340 0 R0402 B23 AB22
+V1.05S LAN_RST# CPUPWRGD/GPIO49 H_PWROK 7
+V3.3S AA2
LAN
LAN_RXD0 PM_THRM# 要连到EC
AA14 RSVD27 A20GATE U16 H_A20GATE 22 AD1 LAN_RXD1 THRM# AB17 PM_THRM# 7
V14 Y20 AC2 V16 VRM_PWRGD
RSVD28 A20M# H_A20M# 7 LAN_RXD2 VRMPWRGD
MISC
Y21 CPUSLP# T24 ns W3 AC18 ICH_SYNC#
CPUSLP# R404 R445 LAN_TXD0 MCH_SYNC#
IGNNE# Y18 H_IGNNE# 7 T7 LAN_TXD1 PWRBTN# E21 PM_PWRBTN# 22
AD21 T25 ns 56 10K U4 H23 PM_RI#
+V3.3S AD16 INIT3_3V# R0402 LAN_TXD2 RI#
RSVD29 AC25 H_INIT# 7 R0402 G22 PM_SUS_STAT# 12,22
AB11 INIT# RTCX1 SUS_STAT#/LPCPD# ICH_SUSCLK T16 ICTPns
RSVD30 AB24 W4 D22
RTC
HOST
SMB
V18 SMB_DATA E23 AC3 RSMRST#
STPCLK# H_STPCLK# 7 16 SMB_DATA SMBDATA RSMRST#
AA20 R442 0 R0402 SMB_LINK_ALERT# H21 AD3 ICH_INTVRMEN
THERMTRIP# PM_THRMTRIP# 7,21 SMLALERT# INTVRMEN
SMLINK0 F25 J16
SMLINK0 SPKR PC_BEEP 20
SMLINK1 F24
TGP SMLINK1
? R441 H20
SLP_S3# PM_SLP_S3# 22,29
56 SPI_SO_ICH R2 E25
3 14 SPI_SO_ICH TGP
SPI_MISO SLP_S4# PM_SLP_S4# 22,31
R0402 SPI_SI_ICH T1 ? F21 PM_SLP_S5# T17 ICTPns
14 SPI_SI_ICH SPI_MOSI SLP_S5# 要给EC
SPI
SPI_CE#_ICH M8
14 SPI_CE#_ICH SPI_CS#
+V3.3S SPI_SCK_ICH P9 B25 PM_BATLOW#
14 SPI_SCK_ICH SPI_CLK BATLOW# PM_BATLOW# 22
R4 AB23 R409 0 R0402
SPI_ARB DPRSTP# H_DPRSTP# 7
+V1.05S AA18 R438 0 R0402
DPSLP# H_DPSLP# 7
RSVD31 F20
R144 R440 +V1.05S
56nsR0402
10K Remove R513, Install R144 for VRM PWRGD glitch issue +V3.3AL R407 56nsR0402
R0402 许沐锌 090924
5
1 ns 0.1uF/10V,X5R SPONGE_RTC1 ns R0402 R431
6,32 CK505_CLK_EN#
ns C0402 RTCBAT GLUE VCC 1 PLT_RST# 10K
ns 4 R0402
9,14,17,18,22,23 BUF_PLT_RST#
2
2
GND
+ U7
3
B B
- R162 SN74AHC1G08DBV
+V3.3A_RTC RTC_BAT1 100K SOT23_5
RTCBAT with Cable R0402
R12
332K,1%
根据机构 +V3.3S
ICH_INTVRMEN ns
EC_RTC RTC_BAT 改为信胡小电池 C171
许沐锌 090925 0.1uF/10V,X5R
R19
R10 +V3.3AL R126 10K R0402 SMB_LINK_ALERT# C0402
5
1 +V3.3A_RTC 0 R368 10K R0402 SMLINK0
R0402 C317 R365 10K R0402 SMLINK1 1 VCC
22 EC_MAIN_PWROK
3 ns 18pF/50V,NPO RTCX1 R356 10K R0402 SMB_ALERT# 4 PM_ICH_PWROK
1K C0402 R343 10K R0402 PM_BATLOW#
9,22,32 IMVP_PWRGD 2
R0402 D2 C13 R358 1K R0402 PCIE_WAKE# GND
2
BAT54C 1uF/10V,X7R R400 R118 10K R0402 SYS_RST# U6 R158
3
1
+V3.3S 6,7,9,10,11,12,13,14,15,17,18,19,20,21,22,23,27,28,29,30,31,32
+V3.3AL 12,14,15,17,18,19,20,22,23,24,25,26,27,28,29,30,32
+V5S 11,12,14,19,20,22,28,30,31,32
+V3.3AL +V5AL
+V3.3A_RTC 15
+V3.3S +V5S
+V1.5S 10,14,17,18,28,29,31
+V1.05S 6,7,10,15,20,21,28,29,31
D11
+V5AL 12,19,20,26,27,28,29,30
D10 1N4148WS R121
1
1N4148WS R119 SOD323 10
1
SOD323 100 R0402
R0402
TGP U1LB
Y6
45mA R150 0 R0805 VSS B20
B24
VCCSATAPLL +V3.3A_RTC VSS
AE3
6uA OPTION FOR FB VSS E18
F16
VCCRTC C154 C158 VSS
VCCDMIPLL
24mA +V1.5S C328 C325 C0402 C0805 VSS G4
10uF/6.3V,X5R
VCCDMIPLL Y25 VSS G8
C0402 C0402 ns
1uF/10V,Y5V
H1
VCCUSBPLL F6 10mA 0.1uF/25V,Y5V 0.1uF/25V,Y5V VSS
VSS H4
VSS H5
+V1.05S K4
C138 C110 C156 C134 C155 VSS
14mA C0402 C0402 C0805 C0402 C0402 +V1.5S VSS K8
10uF/6.3V,X5R
0.1uF/25V,Y5V
0.1uF/25V,Y5V
V_CPU_IO W18 VSS K11
ns ns
1uF/10V,Y5V
1uF/10V,Y5V
VSS K19
VCCDMIPLL R148 0 R0805 K20
VSS
L4
VCC1_5_1 AA8 1.5A OPTION FOR FB VSS
VSS M7
M9 C149 M11
VCC1_5_2 C0402 VSS
0.1uF/25V,Y5V
VCC1_5_3 M20 C148 VSS N3
+V1.05S
VCC1_5_4 N22 1A 4.7uF/10V,Y5V VSS N12
N13
C0805 VSS
POWER
VSS N14
C128 ns N23
C132 C146 C0805 VSS
10uF/6.3V,X5R
C P11 C
VSS
1uF/10V,X5R
1uF/10V,X5R
C0402 C0402 P13
VSS
VCC1_05_1 J10 VSS P19
VCC1_05_2 K17 VSS R14
P15 +V3.3S R22
VCC1_05_3 VSS
V10 T2
VCC1_05_4 0.22A VSS
VSS T22
VSS V1
VSS V7
C127 C141 C145 C112 C162 C123 C163 V8
C0402 C0402 C0402 C0402 C0402 C0402 C0402 VSS
0.1uF/25V,Y5V
0.1uF/25V,Y5V
VCC3_3_1 H25 VSS V19
ns ns
1uF/10V,Y5V
1uF/10V,Y5V
1uF/10V,Y5V
1uF/10V,Y5V
1uF/10V,Y5V
VCC3_3_2 AD13 VSS V22
VCC3_3_3 F10 VSS V25
VCC3_3_4 G10 VSS W12
VCC3_3_5 R10 VSS W22
VCC3_3_6 T9 VSS Y2
TGP TGP VSS Y24
? VSS AB4 ?
VCCSUS3_3_1 F18 VSS AB6
N4 +V3.3AL AB7
VCCSUS3_3_2 VSS
K7 AB8
VCCSUS3_3_3
VCCSUS3_3_4 F1 0.1A VSS
VSS AC8
VSS AD2
VSS AD10
C131 C107 AD20
C0402 C108 C124 C0805 VSS
10uF/6.3V,X5R
0.1uF/25V,Y5V
VSS AD24
1uF/10V,X5R
1uF/10V,X5R
VSS G24
VSS AE13
VSS F2
RSVD32 AE16
+V3.3AL +V3.3S
+V3.3S Fuction P.M2 P.M1 P.M0
P02 0 0 0
R338 R339 R295 R294 X01
2.2K 2.2K 2.2K 2.2K R413 R415 R429
0 0 1
R0402 R0402 Q21 R0402 R0402 10K 10K 10K Res
2N7002 R0402 R0402 R0402
0 1 0
SOT23 ns ns
BOARDID_0 15
SMB_DATA 3 2
15 SMB_DATA SMB_DATA_S 6,13,17,18 BOARDID_1 15
BOARDID_2 15
Q20
2N7002
A
SOT23 R411 R426 R416 A
1
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 16 of 39
PROPERTY NOTE: this document contains information confidential and property to
+V5S TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,14,15,16,18,19,20,21,22,23,27,28,29,30,31,32
+V3.3AL 12,14,15,16,18,19,20,22,23,24,25,26,27,28,29,30,32
+V1.5S 10,14,16,18,28,29,31
+VDC 12,20,24,26,27,28,29,30,31,32
+DATA4
D -DATA4 D
+V3.3AL PCIE_NUT2
1
D40 D39 +V3.3S +V3.3S Hole+Dowel
ESDPAD_R0603 ESDPAD_R0603 <PCB Footprint>
EGA1-0603-V05 EGA1-0603-V05
ns ns R155
2
0 R459 R451 R452
R0603 0 0 0 +V1.5S
+V3.3AL total 2.75A
ns R0603 R0603 R0603
ns
+V3.3S_PCIE +V3.3AL_PCIE
WIFI
MPCIE2 WIFI WIFI
MINIPCIE_DEBUG_L
52
24
48
28
2
6
Keep USB2.0 Signal stub short
+3.3VAUX
+3.3V0
+3.3V1
+1.5V0
+1.5V1
+1.5V2
R453 0 R0402 +V3.3S +V3.3AL
R454 0 R0402
WIFI
CHK5
WIFI
90ohm@100M0.33A
l4_0805 ns ICTP R488 R487
3 4 -DATA4 36 46 ns 10K 10K
14 MINICARD_USB_PN4 USB_D- LED_WPAN# T28
2 1 +DATA4 38 44 R0402 R0402
14 MINICARD_USB_PP4 USB_D+ LED_WLAN# Wireless_LED# 20
42 ns ns
LED_WWAN# T27
ICTP minicard_CLKREQ#
C ns C
11 22 minicard_Wake#
6 CLK_PCIE_EXPCARD# REFCLK- PERST# BUF_PLT_RST# 9,14,15,18,22,23
14 PCIE_TXN1_SLOT 31 PETN0
33 32 R456 0 R0402 ns
14 PCIE_TXP1_SLOT PETP0 SMB_DATA SMB_DATA_S 6,13,16,18
30 R457 0 R0402 ns
SMB_CLK +V3.3AL SMB_CLK_S 6,13,16,18
14 PCIE_RXN1_SLOT 23 PERN0
14 PCIE_RXP1_SLOT 25 PERP0
CHANNEL_CLK 5
3 R0402
CHANNEL_DATA 10K
17 RESERVED0
19 R460
RESERVED1
20 R461 0 R0402
RESERVED_DISABLE HW_RATIO_OFF1# 22
+V3.3AL R492 0 R0603 37
R491 0 R0603 ns RESERVED_PCIE0 WIFI
+V3.3S 39 RESERVED_PCIE1 WIFI
WIFI 41 RESERVED_PCIE2 RESERVED_SIM0 16
R484 0 R0402 43 14
RESERVED_PCIE3 RESERVED_SIM1
45 RESERVED_PCIE4 RESERVED_SIM2 12
WIFI 47 RESERVED_PCIE5 RESERVED_SIM3 10
49 RESERVED_PCIE6 RESERVED_SIM4 8
51 RESERVED_PCIE7
+VDC +V3.3S +V3.3AL
A1 +V3.3AL REFRESH_EN# A15
A2 +V3.3S
B B
A17 +VDC PWR_SW_VCC A18 PWR_SW_VCC2 19,26
PWRSW# A19
C365
0.1UF/25V,Y5V A3 A13
9,14,15,18,22,23 BUF_PLT_RST# PCIRST# DEBG_URXD EC_DEBG_UTXD 22
C0402 A9 A14
6 PCI_CLK_DEBUG PCICLK DEBG_UTXD EC_DEBG_URXD 22
WIFI A12
15,22 LPC_FRAME# LFRAME#
NC A20
15,22 LPC_AD0 A5 LAD0
15,22 LPC_AD1 A6 LAD1 GND14 A4
15,22 LPC_AD2 A8 LAD2 GND15 A7
A10 A11
GND10
GND11
GND12
GND13
HOLE
GND17 A16
MiniPCIE
9
15
21
27
29
35
4
18
26
34
40
50
53
54
55
WIFI
+V1.5S
+V3.3S_PCIE +V3.3AL_PCIE
A A
C170 C335 C330 C337 TOPSTAR TECHNOLOGY
C331 C333 C336 C332 C334 10UF/6.3V,X5R 0.1UF/25V,Y5V 10UF/6.3V,X5R 0.1UF/25V,Y5V
10UF/6.3V,X5R 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V C0805 C0402 C0805 C0402 Swain Xu(许沐锌)
C0805 C0402 C0402 C0402 C0402 WIFI WIFI WIFI WIFI Page Name
WIFI WIFI WIFI WIFI WIFI PCIE MINI SLOT 1
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 17 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,20,21,22,23,27,28,29,30,31,32
+V1.5S 10,14,16,17,28,29,31
+V3.3AL 12,14,15,16,17,19,20,22,23,24,25,26,27,28,29,30,32
+DATA8
-DATA8
+V3.3S +V3.3AL +V3.3AL +V3.3S
D D
1 1 +V3.3S+V3.3AL
D6 D5
EGA10603V05A1-B EGA10603V05A1-B R284 R11 R242 R13
ESDPAD_R0603 ESDPAD_R0603 0 0 0 0
ns ns R0603 R0603 R0603 R0603
2 2 ns 3G 3G ns +V1.5S
R231 R227
3.3PCIE2 3.3ALPCIE2
+V3.3AL total 2.75A 10K 10K
ns ns
MPCIE1
MINIPCIE_TEMP1
Keep USB2.0 Signal stub short
52
24
48
28
2
6
3G
PCIE_CLKREQ2#
+3.3VAUX
+3.3V0
+3.3V1
+1.5V0
+1.5V1
+1.5V2
R46 0 3G WAKE#
R53 0 3G
CHK1
14 MINICARD_USB_PN3 3 4 -DATA8 36 46 T13 ns
+DATA8 38 USB_D- LED_WPAN#
14 MINICARD_USB_PP3 2 1 USB_D+ LED_WLAN# 44
ns 42 T11 ns R477 0
3G_LED# 20,22
14 PCIE_TXN2_SLOT 31 PETN0
33 32 R40 0 ns
14 PCIE_TXP2_SLOT PETP0 SMB_DATA SMB_DATA_S 6,13,16,17
30 R38 0 ns SIM_PWR R206 8.2K SIM_DATA
SMB_CLK SMB_CLK_S 6,13,16,17
R0402
1
23 D21 ns C209
14 PCIE_RXN2_SLOT PERN0
25 ESDPAD_R0603 C206 100pF/50V,NPO
14 PCIE_RXP2_SLOT PERP0
1
5 EGA1-0603-V05 0.1UF/25V,Y5V C205 C0402 D25
CHANNEL_CLK ns C0402 1uF/10V,X7R
3
2
ns ICTP T9 CHANNEL_DATA R24 0 ns 3GVDD_ON ns
17 RESERVED0 C0603
ns ICTP T10 ns
19
2
RESERVED1 ns
+V3.3AL 20 R20 0 3G ns
+V3.3S RESERVED_DISABLE HW_RATIO_OFF2# 22
R57 0 3G 37
R52 0 R0603 3G R0603 RESERVED_PCIE0
39 RESERVED_PCIE1
R44 0 R0603 ns 41 16 R14 0 SIM_VPP
RESERVED_PCIE2 RESERVED_SIM0 SIM_REST R23 R22
43 RESERVED_PCIE3 RESERVED_SIM1 14
45 12 SIM_CLK 3G 10K 10K
RESERVED_PCIE4 RESERVED_SIM2 SIM_DATA ns 3G
47 RESERVED_PCIE5 RESERVED_SIM3 10
49 8 SIM_PWR SIMCARD
RESERVED_PCIE6 RESERVED_SIM4 SIM_PWR
51 RESERVED_PCIE7 C1 VCC1
SIM_REST C2 G1
+V3.3S +V3.3AL SIM_CLK RESET HOLE0
C3 CLK HOLE1 G2
1
D23 C207 C5
GND10
GND11
GND12
GND13
GND
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
1
C0402 D24 SIM_DATA C7 IO
2
B PCIE MINI CARD ns C208 B
update PCIE to 4.0MM CD
9
15
21
27
29
35
4
18
26
34
40
50
53
54
CD
1
许沐锌 090706 ns ns D22
47pF/50V,NPO
2
C0402 SIMCARD
ns SIMCARD_3
R205 3G
2
+V3.3AL ns 56
Add SIM card
R0402
Swain 081111
R867
10K ns
R0402
3G ns SIM card periphery current
许沐锌 081222
3GVDD_ON
3GVDD_ON 22
3.3PCIE2 3.3ALPCIE2
C268
10UF/6.3V,X5R C12 C226 C232
6
2 2
2 1 ON
3 3
1 SW_W_S7A 3 OFF
1 1 LSS-12M-V-B
3G_SW1
4
A A
+V1.5S TOPSTAR TECHNOLOGY
4
Swain Xu(许沐锌)
Page Name
USB Port
C16 C14 C236 Size Project Name Rev
C39 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V A3 X01 B
3G开关放到EC,架option到PCIE插槽 1uF/10V,X7R C0402
3G
C0402
3G
C0402
3G Date: Tuesday, September 29, 2009 Sheet 18 of 39
许沐锌 090713 C0603
3G PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,20,21,22,23,27,28,29,30,31,32
+V3.3AL 12,14,15,16,17,18,20,22,23,24,25,26,27,28,29,30,32
+V5S 11,12,14,16,20,22,28,30,31,32
+V5AL 12,16,20,26,27,28,29,30
1
D D36 D
ESDPAD_R0603
C302 R361 560K R0402
EGA1-0603-V05
330PF/50V,X7R + C101 R366 Install C429 for OC# issue
C0402 100uF/10V 300K C300 Swain 080815
2
ct7343_28 R0402 1000pF/50V,X7R
C0402 GND_USB
USB1 GND_USB USB_PORT_OC0# 14 +V3.3AL
VCC1 4 Keep USB2.0 Signal l4_0805
5 HOLE0 GND_USB
6 HOLE1 -DATA1 3 -DATA0 stub short 3 4 USB_PORT_PN0 14
7 2 +DATA0 2 1
HOLE2 +DATA1 USB_PORT_PP0 14
8 PR138
HOLE3 CHK4 20K
GND 1
1 90ohm@100M0.33A
ns R0402
1
SINGLE USB PORT D33 D34
PWRSW# 22
3
USB1F ESDPAD_R0603 ESDPAD_R0603 R336 0 R0603 PWR_SW
EGA1-0603-V05 EGA1-0603-V05 1 2 SWVCC1 PR5 5.6K R0402 PQ37 +V3.3AL
1 2 Isense_SYSP 24,33
R335 0 R0603 2N7002E-T1
2
2
3 4 SWVCC2_SW PR6 0 R0402 PWR_SW_VCC2 1 SOT23
按layout 要求USBCHK4 换pin 3 4
GND_USB
GND_USB GND_USB 许沐锌 090716 TMG-533-V-T/R PC118
2
BUTTON4_S PC2 PR137 1000pF/50V,X7R
2
1000pF/50V,X7R 1M C0402 PD17
PC8 C0402 PZ10 R0402 BAT54S
Update USB footprint to USB1F 1000pF/50V,X7R BZT52C5V6S 3 SOT23
许沐锌 081215 C0402 SOD323
1
C C
PWR_SW_VCC2 17,26
3
R66 1K FAN_TACH_ON 1 Q1
2N2222 R74
+V5S C57 ns SOT23
2
ns 0
0.3A 1000pF/50V,X7R +V3.3AL
Q19 ns
BCP69-16
SOT223 U1 C2
CPUFAN1 A180
4 0.3A Vfan SOT23_A 0.1UF/25V,Y5V
3 2 1 1 4 4
2 2 VS+ 1
1
B C53 B
3 3 5 5
R286 D9 C64 2 GND_USB LIDR# 12,22
1
1N4148WS
1
1
R0402 R287 FAN_FB C1 ESD1
2
1000pF/50V,X7R EGA1-0603-V05
VCC_358 5.11K,1% C0402 ESDPAD_R0603
1
C288 ns
2
2
R285 U12A
1K 0.1UF/25V,Y5V LM358
8
so8_50_150
+V3.3S
+ 3
2
1 GND_USB
1
- 2
R288 VCC_358
R86 U12B LID switch update to new source
4
0.1UF/25V,Y5V so8_50_150
R292 R293 5
+
1 100K 2 7
FAN1_V 22
200K R0402 6 GND_USB
-
4
C284
C283
4.7UF/10V,Y5V 0.1uF/25V,Y5V
A
C0805 C0402 FAN1_V=3.30V,Vfan=5V TOPSTAR TECHNOLOGY
A
+V5S 11,12,14,16,19,22,28,30,31,32
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,21,22,23,27,28,29,30,31,32
+V3.3AL 12,14,15,16,17,18,19,22,23,24,25,26,27,28,29,30,32
+V1.05S 6,7,10,15,16,21,28,29,31
+V1.5S 10,14,16,17,18,28,29,31
+V5AL 12,16,19,26,27,28,29,30
+VDC 12,17,24,26,27,28,29,30,31,32
D
+V5AL D
CNS32_0D5_RA1
PWRSW_USB_LAN
2A
1 1
2 2
+V3.3AL 33 3 3
+V5S 4 4 9 9
R504 220 R0402 POWER+POWER2 LAN_TX1+
1 1.5A 5 5 10 10 请注意connector所需电流
1 2 2 6
BL-HB335A-TRB
POWERLED# 22 23
23
LAN_TX1+
LAN_TX1- LAN_TX1- 3
+V3.3S
1A 7
6 许沐锌 090715
7
4 8 8
23 LAN_TX0- LAN_TX0- 5
23 LAN_TX0+ LAN_TX0+ 6
POWERLED# TESD9 1 2 EGA1-0603-V05 7 IO_PWR_CN1
ns ESDPAD_R0603 23 AVDD18 8 87213-0800
9
POWER+ C218 1000pF/50V,X7R C0402 10 CNS8_1_R_W2B
14 USB_PORT_PN1
11 BT
14 USB_PORT_PP1
12
14 USB_PORT_PN2 13
14 R471 51K R0402 C348 1uF/10V,Y5V C0603
14 USB_PORT_PP2
15 BEEP
22 BTL_BEEP
14 USB_PORT_OC1# 16
17
18 R469 75K R0402 C347 1uF/10V,Y5V C0603
15 SATA_RXN0
15 SATA_RXP0 19 15 PC_BEEP
20
15 SATA_TXP0 21
C 22 C
15 SATA_TXN0
23 R470 R468
24 4.7K 4.7K
15 HDA_RST# R0402 R0402
15 HDA_SYNC 25
15 HDA_SDOUT 26
15 HDA_SDATA_IN0 27
22 AMP_SHDW 28
29
15 HDA_BITCLK 30
31
BEEP 32
34
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS
ns ns ns ns ns ns ns ns
20pin 0.5mm bot FFC
CNS20_0D5_RA1
CR_CN1
20 20 +V3.3S
19 19 +V3.3AL
18 R508 0 R0402 ns
18 BT_LED# 14
17 R509 0 R0402 1 +V5S
17 WIRELESS_LED# 17 1
16 2 H7 H3 H8 H5 H4 H6
B 16 HDD_LED# 15 2 B
15 15 CAP_LED# 22 7 7 3 3 TPCLK 22
14 14 3G_LED# 18,22 4 4 TPDAT 22
22 2213 13 8 8 5 5
12 12 BTL_LED# 22 6 6
11 11 CHG_LED# 22
10 10
9 CNS6_0D5_RA1
9 USB_CR_PP6 14 INT_spkR 6Pin
8 HOLE HOLE HOLE HOLE HOLE HOLE
1
8 USB_CR_PN6 14 TP_CON1 TH_276_100C TH_276_100B TH_276_100A TH_276_100 TH_276_100B TH_276_100B
7 7
21 21 6 6 CR_USB48 6
5 5 ns ns ns ns ns ns
4 R506 0 R0805 +V5AL
4 ns
3 3
2 2
1 R505 0 R0805 +V3.3AL
1
+V1.05S 6,7,10,15,16,20,28,29,31
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,20,22,23,27,28,29,30,31,32
D D
+V3.3S
+V1.05S
R186
10K R192
R0402 4.7K
R0402
ns
SHDN_LOCK#
R173
10K R193
6
R0402 100
5 2 R170 R0402
7 OVT_SHUTDOWN#
Q8 4.7K ns
C185 MMDT3904 R0402
SHDN_LOCK# 29
1
R172 1000pF/50V,X7R SC70_6 ns
C 100K C0402 R171 R191 C
R0402 470 1K
6
R0402 R0402
5 2 ns
3 7,15 PM_THRMTRIP#
ns
Q5 Q7 C196
1
2N7002E-T1 R169 C184 MMDT3904
1 SOT23 100K 0.1uF/10V,X5R SC70_6 2.2uF/10V,X7R
22 ALT_ON R0402 C0402 ns C0805
ns ns ns
2
R178
100K
R0402
OVP CIRCUIT
B VIN B
CPU
THRMTRIP# SHDN#
AND
THERM_ALERT#
VDC
Thermal
sensor
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name MDC&BT/FAN/OTP
A A
Size Project Name Rev
A4 X01
B
Date: Tuesday, September 29, 2009 Sheet 21 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,23,27,28,29,30,31,32
+V3.3AL 12,14,15,16,17,18,19,20,23,24,25,26,27,28,29,30,32
EC_V3.3AL
+V5S 11,12,14,16,19,20,28,30,31,32
+V3.3S
+VDC 12,17,20,24,26,27,28,29,30,31,32
EC_V3.3AL
R128 FB9
10K 120ohm@100MHz,500mA R136 +V3.3AL C150 C102 C160 C159 C126 C157 C144
R367 C142 R0402 FB0603 0 10UF/6.3V,X5R 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V
8.2K 4.7UF/10V,Y5V 1 2 EC_V3.3AL R0805 C0805 C0402 C0402 C0402 C0402 C0402 C0402
R0402 C0805 EC_RESET#
V18R
15 H_A20GATE R141
3
SOD323 100,1% Q3 C0402 C0402
D
EC Output Signal! 1 MMBT3904-F C152 PM_SLP_S4# GPXIOA00 R417 10K R0402 D
R0402 SOT23 0.1UF/25V,Y5V C151
124
111
125
C0402 PM_SLP_S3# HDD_ZOUT R357 10K R0402
67
96
33
22
1uF/10V,X7R
9
R137 C125 U17 C0603 HDD_YOUT R363 10K R0402
10K 0.01uF/25V,X7R HDD_XOUT R369 10K R0402
V18R
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
R0402 C0402 C111 C137
+V3.3S 100pF/50V,NPO 100pF/50V,NPO CHG_ON R122 10K R0402
63 C0402 C0402 SYS_I_Sense C299 3300pF/50V,X7R
AD0/GPI38 SYS_I_Sense 33
ADC
64 HDD_ZOUT C0402
A20GATE AD1/GPI39 HDD_YOUT
1 GA20/GPIO00 AD2/GPI3A 65
R359 RCIN# 2 66 HDD_XOUT
MSIC
10K KBRST#/GPIO01 AD3/GPI3B +V3.3AL
14 EC_RUNTIME_SCI# 20 SCI#/GPIO0E
R0402 D35 EC_RESET# 37
1N4148WS RCIN# ECRST# EC_SPI_CS# R334 10K R0402
15 H_RCIN# 1
SOD323 EC Output Signal! EC_SPI_MOSI R306 10K R0402
EC_SPI_MISO R430 10K R0402
12 21 EC_SPI_SCK R305 10K R0402
6 PCI_CLK_EC PCICLK PWM0/GPIO0F BTL_BEEP 20
PWM
3 23 I2C_CLK R133 4.7K R0402
15 INT_SERIRQ SERIRQ PWM1/GPIO10 POWERLED# 20
4 25 I2C_DATA R138 4.7K R0402
15,17 LPC_FRAME# LFRAME# PWM2/GPIO11 SET_I 33
10 34 SM_BAT_SDA2 R129 5.6K R0402
15,17 LPC_AD0 LAD0 PWM3/GPIO19 EC_BKLT_PWM 12
8 SM_BAT_SCL2 R125 5.6K R0402
15,17 LPC_AD1 LAD1
LPC
7 LIDR# R401 10K R0402
15,17 LPC_AD2 LAD2
1 5 EC_IMVP_PD_IN# R127 10K R0402 ns
1 15,17 LPC_AD3 LAD3
2 EC_PCI_RST# 13 28
2 PCIRST#/GPIO05 FANFB0/GPIO14 FAN_BACK 19
FAN
3 SCANOUT15 38 29 PCIE_WAKE#_EC R393 10K R0402
3 15 PM_CLKRUN# CLKRUN#/GPIO1D FANFB1/GPIO15 BT_DISABLE 14
4 SCANOUT14 26 ALT_ON R147 10K R0402 ns
4 FANPWM0/GPIO12 FAN1_V 19
27 5 SCANOUT13 27 PWRSW# R163 10K R0402
27 5 FANPWM1/GPIO13 IVT_I_ADJ 12
28 6 SCANOUT12 EC_IMVP_PD_OUT R123 10K R0402 ns
28 6 SCANOUT11 +V3.3AL SCANIN7 TPCLK R140 10K R0402 ns
7 7 62 KSI7/GPIO37
8 SCANOUT10 SCANIN6 61 TPDAT R142 10K R0402 ns
8 SCANOUT9 SCANIN5 KSI6/GPIO36 BT_DISABLE R146 10K R0402 ns
9 9 60 KSI5/GPIO35
C 10 SCANOUT8 SCANIN4 59 C
10 SCANOUT7 R396 4.7K R0402 EC_PCI_RST# SCANIN3 KSI4/GPIO34
11 11 58 KSI3/GPIO33
12 SCANOUT6 ns SCANIN2 57 83
12 KSI2/GPIO32 PSCLK1/GPIO4A/P80CLK TPCLK 20
13 SCANOUT5 EC_BUF_PLT_RST# R399 0 R0402 SCANIN1 56 84
13 KSI1/GPIO31 PSDAT1/GPIO4B/P80DAT TPDAT 20
KB3310B
14 SCANOUT4 SCANIN0 55 85
14 KSI0/GPIO30/E51_TXD(ISP) PSCLK2/GPIO4C HW_RATIO_OFF2# 18
15 SCANIN0 Connect PLTRST to EC_PCI_RST# 86
15 PSDAT2/GPIO4D HW_RATIO_OFF1# 17
PS2
16 SCANOUT3 Swain 080819 82 87 EC_ICH_PWROK EC_ICH_PWROK R390 0 R0402 ns
16 KSO17/GPIO49 PSCLK3/GPIO4E EC_MAIN_PWROK 15
17 SCANIN1 81 88 EC_SMI# ns R0402 0 R398 MAIN_PWROK R154 0 R0402
17 KSO16/GPIO48 PSDAT3/GPIO4F EXT_SMI# 15
18 SCANIN2 SCANOUT15 54 ns R0402 0 R464
18 KSO15/GPIO2F/E51_RXD(ISP) 3G_LED# 18,20
19 SCANOUT2 SCANOUT14 53 ICH_PWROK from EC
19 SCANOUT1 SCANOUT13 KSO14/GPIO2E Swain 080819
20 52
KB
20 SCANIN3 SCANOUT12 KSO13/GPIO2D Reserve 3G_LED output pin at GPIO4F
21 21 51 KSO12/GPIO2C
22 SCANIN4 SCANOUT11 50 许沐锌 090924
22 SCANIN5 SCANOUT10 KSO11/GPIO2B
23 23 49 KSO10/GPIO2A
24 SCANOUT0 SCANOUT9 48
24 SCANIN6 SCANOUT8 KSO9/GPIO29
25 25 47 KSO8/GPIO28
SMBUS
26 SCANIN7 SCANOUT7 46 80
26 KSO7/GPIO27 SDA1/GPIO47 I2C_DATA 7
SCANOUT6 45 79
KSO6/GPIO26 SCL1//GPIO46 I2C_CLK 7
SCANOUT5 44 78 +V3.3AL +V3.3AL
CNS26_1_R_UP KSO5/GPIO25 SDA0/GPIO45 SM_BAT_SDA2 25
R424 0 R0402 EC_BUF_PLT_RST# SCANOUT4 43 77
ACES 85201-2602 9,14,15,17,18,23 BUF_PLT_RST# KSO4/GPIO24 SCL0/GPIO44 SM_BAT_SCL2 25
SCANOUT3 42 8 1 EC_SPI_CS# R309 4.7K R0402
KBCON1 SCANOUT2 KSO3/GPIO23/TP_ISP R308 4.7K R0402 VCC CS# EC_SPI_MISO ns
41 KSO2/GPIO22/TP_ANA_TEST 7 HOLD# Q 2
SCANOUT1 40 EC_SPI_SCK 6 3 R307 4.7K R0402
SCANOUT0 KSO1/GPIO21/TP_PLL GPXIOA00 EC_SPI_MOSI CLK W#
39 KSO0/GPIO20/TP_TEST GPXIOA00/SDICS# 97 5 D VSS 4
Fuction P.M2 P.M1 P.M0 98 C296
GPXIOA01/SDICLK CHG_LED# 20
99 U13 1uF/10V,X7R
GPXIOA02/SDIMOSI CAP_LED# 20
GPXIOA
R402 1K R0402 6 100 R0402 0 R418 W25X80A C0603
VerA 0 0 0 12,19 LIDR#
R391 0 R0402 PCIE_WAKE#_EC14 GPIO04 GPXIOA03 PM_PWRBTN# 15
SOIC8_50_208
15,17,18,23 PCIE_WAKE# GPIO07/i_clk_8051 GPXIOA04 101 AMP_SHDW 20
VerB 0 0 1 ns 15 102
24 AC_IN GPIO08/i_clk_peri GPXIOA05 EC_IMVP_PD_OUT 32
25 BATT_IN# 16 GPIO0A GPXIOA06 103 CHG_ON 33
+V3.3AL Verc 0 1 0 17 104
15,29 PM_RSMRST# GPIO0B/ESB_CLK GPXIOA07 BAT_OV_REV 25
B R387 1K R0402 18 105 PROCHOT# B
19 PWRSW# GPIO0C/ESB_DAT_O/ESB_DAT_I GPXIOA08
15,29 PM_SLP_S3# 19 GPIO0D GPXIOA09 106 HW_OFF_BKLT# 12
15,31 PM_SLP_S4# 32 GPIO18 GPXIOA10 107 CAM_PWRON 12
R0402 0 R360 36 108
15 SYS_RST# GPIO1A/NUMLED# GPXIOA11 BTL_LED# 20
R450 R449 R448 73
27,29 DDR_PWG
GPIO
10K 10K 10K R374 1K R0402 74 GPIO40
32 IMVP_ON GPIO41
R0402 R0402 R0402 21 ALT_ON 89
ns ns GPIO50
28 V1_05S_ON 127 GPIO59/TEST_CLKSPICLKI GPXIOD0/SDIMISO 109 3GVDD_ON 18
PCB_Mark0 110 EC_PM_SUS_STAT# R420
GPXIOD1 PM_SUS_STAT# 12,15
GPXIOD
PCB_Mark1 68 112 PCB_Mark0 0 R0402 1K R419 +V3.3AL
27 V0_9S_ON GPO3C GPXIOD2
PCB_Mark2 70 114 PCB_Mark1 R0402
26 ALWAYS_ON GPO3D GPXIOD3
71 115 PCB_Mark2 C164
30 MAIN_ON GPO3E GPXIOD4
72 116 18pF/50V,NPO 32XCLKI
27 V1_8_ON GPO3F GPXIOD5 LVDS_BKLTEN 7,12
R423 R422 R421 117 C0402
LABEL1 GPXIOD6 EC_IMVP_PD_IN# 32
10K 10K 10K 76 118 EC_BUF_PLT_RST#
29 MAIN_PWROK GPI43 GPXIOD7
R0402 R0402 R0402
Topstar Soft 75 R151
9,15,32 IMVP_PWRGD GPI42
1
ns BIOS Ver: X.XX 10M
EC Ver: X.XX 119 R0402 0 R425 EC_SPI_MISO 3 Y1 R0402
MISO
SPI
BIU configuration 90 120 R0402 0 R296 EC_SPI_MOSI 32.768KHz
should match flash XXXX年XX月XX日 28 V1_5S_ON
17 EC_DEBG_UTXD 30
E51CS#/GPIO52 MOSI
126 R0402 0 R427 EC_SPI_SCK Assy xd3_2X6
2
speed used EC/BIOS Label E51TXD/GPIO16 SPICLK/GPIO58 R0402 0 R428 EC_SPI_CS#
17 EC_DEBG_URXD 31 E51RXD/GPIO17/E51CLK SPICS# 128
740621500101 26 ALW_PWROK 92 C167
E51TMR0/GPIO54/WDT_LED# 18pF/50V,NPO 32XCLKO
30 V1.8S_ON 93
8051
122 32XCLKI
+V5S XCLKI 32XCLKO 许沐锌 090604
XCLKO 123
Add NET BT_PWRON at GPIO57
AGND
2N7002E-T1
1
SOT23
A EC Input Signal! KB3926 A
69
113
94
35
24
11
+V3.3AL 12,14,15,16,17,18,19,20,22,24,25,26,27,28,29,30,32
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,22,27,28,29,30,31,32
Power domain chart
AVDD18 20
R79 3.6K R0402
+V3.3AL
RTL8101E VDD3D3_LAN
Change Lan Power FB18
from +V3.3AL to +V3.3S +V3.3AL 1 2 300ohm@100MHz,2A
R78 10K R0402 ns Swain 080820 FB0805
10K is used only
AVDD33 3.3V when 93C56 is used. FB17
D D
+V3.3S 1 2 300ohm@100MHz,2A
VDD3D3_LAN DVDD15 U5 FB0805 VDD3D3_LAN
AVDD18 1.8V EECS change LAN Power ns
1 CS VCC 8
EESK 2 7 C63 from 3.3S to 3.3AL
EEDI/AUX SK NC1 0.1uF/10V,X5R Swain 081118
EVDD18 1.8V EEDO
3 DI NC2 6
C0402
4 DO GND 5
C31 C278 C36 C34 C55 C61 C279
DVDD15 1.5V 93C46 10UF/6.3V,X5R 10UF/6.3V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R
so8_50_150 C0805 C0805 C0402 C0402 C0402 C0402 C0402
ns
U4
53
46
37
16
59
58
33
52
49
43
41
38
32
21
15
48
47
45
44
2
RTL8102E Place close to VDD33_LAN PINS.
QFNS64_0D5_1G
EESK
EEDI
EECS
VDD33_04
VDD33_03
VDD33_02
VDD33_01
NC19
AVDD33_01
VDD15_10
NC8
NC18
EEDO
VDD15_07
VDD15_06
NC14
NC11
NC7
VDD15_02
VDD15_01
AVDD18 20
AVDD18 R0603 If use 8101E, Install R316 EVDD18
26 28 0
6 CLK_PCIE_LAN REFCLK_P EVDD18_02 EVDD18 R279
6 CLK_PCIE_LAN# 27 REFCLK_N EVDD18_01 22
14 PCIE_TXP0_LAN 23 14 ns
HSIP NC6
14 PCIE_TXN0_LAN 24 HSIN NC3 11
14 PCIE_RXP0_LAN C59 0.1UF/10V,X7RC040229 8 C32 C33 C35 C261 C265
HSOP AVDD18_02 AVDD18
14 PCIE_RXN0_LAN C60 0.1UF/10V,X7RC040230 5 10UF/6.3V,X5R 10UF/6.3V,X5R 0.1uF/10V,X5R C262 C266 0.1uF/10V,X5R 0.1uF/10V,X5R
HSON AVDD18_01 C0805 C0805 C0402 C0402 C0402
1uF/10V,Y5V 1uF/10V,Y5V
9,14,15,17,18,22 BUF_PLT_RST# 20 63 ns C0603 C0603
PERSTB VCTRL15 DVDD15
VCTRL18 1 AVDD18
C
15,17,18,22 PCIE_WAKE# 19 LANWAKEB LAN_TX0+
Place close to AVDD18 PINS. C
+V3.3S R76 1K R0402 MDIP0 3
LAN_TX0-
Place close to AVDD18
36 4
ISOLATEB MDIN0
6 LAN_TX1+ Power Output PIN1
R77 15K R0402 MDIP1 LAN_TX1-
54 LED3 MDIN1 7
55 LED2 NC1 9
56 10 DVDD15
LED1 NC2
57 LED0 NC4 12
NC5 13
R59 2.49K,1% R0402 RSET 64 RSET
CKTAL2 61 Y2
If use 8102E, R662 install 2.49K 1% 60
If use 8101E, R662 install 2K 1% CKTAL1
62 NC20 3 4
Swain 080709 C259 C58 C40 C52 C245 C260 C62
EGND1
EGND2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
NC17
NC16
NC15
NC13
NC12
NC10
NC21
NC22
G1
G2
G3
G4
G5
G6
G7
G8
G9
51
50
42
40
39
35
34
18
17
20 LAN_TX0+ LAN_TX0+
20 LAN_TX0- LAN_TX0-
20 LAN_TX1+ LAN_TX1+
20 LAN_TX1- LAN_TX1-
B B
LAN_TX1-
LAN_TX0+
LAN_TX0-
C224 C222
0.01uF/25V,X7R 0.01uF/25V,X7R
C0402 C0402
ns ns
A A
TOPSTAR TECHNOLOGY
<OrgAddr1>
Page Name RTL8101E/8111C(GLAN)
Size Project Name Rev
A3 X01 B
Date: Tuesday, September 29, 2009 Sheet 23 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained with the
expressed written consent of TOPSTAR
5 4 3 2 1
BATT+ 25,30,33
+V3.3AL 12,14,15,16,17,18,19,20,22,23,25,26,27,28,29,30,32
+VDC 12,17,20,26,27,28,29,30,31,32
AD+ 30
PR3
10
R0402
PR1 3.3K R0402 PR2 15K
ALW_EN
ALW_EN 26
PC1 PQ2
DC_JACK 0.1uF/25V,X7R AO4419
DC JACK 5P AD+ C0603 SO8_50_150
4
PWR5P_DC3 PF1 PR4
G
7A 0.025,1%
PFB1
5A 5A
D
FUSE1206 PD1 R2512 5
5 SHLD2 AD+ 1 1 2 3A 2 1 3A 1 3A 3
S
6 BATT+
2 7
4 SBM54PT 1 8
SHLD1 100ohm@100MHz,3A
SMB
3 FB0805
AD-2
AD-1
PFB2 PD2 1
1 PD3
2 1 SSM34PT
2
SBM54PT SMA
SMB PC3
100ohm@100MHz,3A 0.1uF/25V,Y5V
FB0805 19,33 Isense_SYSP
C0402
PC4 PC5
25,29,33 Isense_SYSN
1uF/25V,Y5V 1uF/25V,Y5V
5A
C0805 C0805
1 8
5A
+VDC
2 7
PR149 0 R0402 PC152 3 6
PR214 0 R0402 0.1uF/25V,Y5V PQ3 S 5
PR213 0 R0402 C0402 AO4419 D
ns SO8_50_150 G
Jack_GND PC6
4
0.01uF/25V,X7R
C0402
PR10
510K
R0402
PR135
AD+ +V3.3AL PR14 100K
510K
R0402 R0402
PR9
3
3
100K
PQ4 PQ7
2N7002 2N7002
1 SOT23 1 SOT23
25,29 SHDN#
0815VB:Change PR9 to 51K
AC_IN 22
2
2
PR11
51K PR12
R0402 1K PR16 PC9
PR15 R0402 510K 1000pF/50V,X7R
PC7 20K R0402 C0402
1000pF/50V,X7R R0402
C0402
TOPSTAR TECHNOLOGY
Liu JX
100ohm@100MHz,3A
PFB4 1 2 FB0805 Screw 2*11mm Screw 2*11mm
PF2
7A BATCON1 711000000041 711000000041
5A PFB5
100ohm@100MHz,3A
1 2 FB0805
5A FUSE1206
1 2 7 BATT+
BATT+
PC10 C358
1000pF/50V,X7R GND_BAT GND_BAT 0.1uF/25V,Y5V KEY
C0402
SM_BAT_SDA2 PR20 100 R0402 SM_BAT_SDA ns 6 SDAT
22 SM_BAT_SDA2
SM_BAT_SCL2 PR19 100 R0402 SM_BAT_SCL 5 SCLK ns
22 SM_BAT_SCL2
PZ9
4 TEMP 2 1
24,29,33 Isense_SYSN
3 BAT_IN# BZT52C13S-F/13.0V
SOD323
2 GND PD6
1N4148WS
1 GND SOD323
SK-C103A3-100A 22 BAT_OV_REV 1
9
BATJ7_MC ns
24,29 SHDN#
+V3.3AL
GND_BAT
2
1 PQ8
PR21 2N2907 PR23
300K SOT23 1K
3
R0402 PR22 ns R0402
1K ns
3
R0402
PQ9 1
BATT_IN# 22
2N2222
SOT23
2
ns PR25
2K PC11
R0402 0.1UF/25V,X7R
ns C0603
SM_BAT_SDA2 ns
SM_BAT_SCL2 BATT+
PR26 0 R0402
layout注意将此部分电路尽量放在板子上不热的地方
PC12 PC13
5.6pF/50V,NPO 5.6pF/50V,NPO PR27 0 R0402 C165
C0402 C0402 0.1uF/10V,X5R
C0402 Battery Over Voltage Protection
PR28 0 R0402
GND_BAT GND_BAT
GND_BAT
PZD1
SOT23 PZD2
+V3.3AL BAT54S +V3.3AL SOT23
BAT54S
2
2
3 SM_BAT_SDA
PC14 3 SM_BAT_SCL
0.1uF/25V,Y5V 1 PC15
C0402 0.1uF/25V,Y5V 1 TOPSTAR TECHNOLOGY
C0402
Liu JX
GND_BAT Page Name BATTERY IN
GND_BAT
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 25 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
+V3.3AL 12,14,15,16,17,18,19,20,22,23,24,25,27,28,29,30,32
+VDC 12,17,20,24,27,28,29,30,31,32
AD+ 24,30
+V5AL 12,16,19,20,27,28,29,30
EC_RTC 15
1.输入电容要靠近MOSFET漏极
D +V3.3AL 2.MOS管尽量靠近IC芯片
D
3.芯片的Thermal
PR253 GND用至少5个过孔连到信号地,用来散热
10K 4.信号地和电源地在输出电容的负极连到一起
R0402
+VDC
22 ALW_PWROK
+VDC
VDC2
TestP 2A 2A
TPC60
ns
T 物料 GND_TPS51125
PC211 PC244 PC189 PC243 PC188 PC242 PC117
10uF/ 25V 0.1uF/25V,X7R 1000pF/50V,X7R PR51 1000pF/50V,X7R 0.1uF/25V,X7R 10uF/ 25V,X7R 4.7uF/25V,X7R
C1210 C0603 C0402 PR252 5.11K,1% PR54 7.68K,1% PR195 C0402 C0603 C1210 C1206
10K,1% R0402
PC78 15K,1%
PR248 0.22uF/16V,X7R R0402
C0603
GND_TPS51125 PR272 R0402ENTRIP1 0
200K R0402
ENTRIP1 PR271 R0402 GND_TPS51125
PC193
VREF 200K
1
EC_RTC
C 10uF/6.3V,X5R C
VREF
ENTRIP2
VFB2
TONSEL
VFB1
ENTRIP1
C0805
7 VO2 VO1 24
5
6
7
8
8 23 PQ85
VREG3 PGOOD
D
PC253 PC252 AO4468
0.1uF/25V,X7R 0.1uF/25V,X7R SO8_50_150
2
9 22 4
+V3.3AL VBST2 VBST1 +V5AL
G
PQ5 D1 D1 C0603
PR246 PR240
S
AO4932 8 C0603
V3.3AL SO8_50_150 1G PR250 10 PU12 21 V5AL
3
2
1
TestP PC241 10K DRVH2 DRVH1 PC239 TestP
S1 TPS51125
TPC60 4.7uF/25V,X7R R0402 4.7 4.7 PR243 4.7uF/25V,X7R TPC60
5Ans C1206 7 5 11 20 10K LL2 C1206
5A ns
1 LL2 LL1 1
PL13 R0402 PL15
3.3uH/4.8A PR260 6 3.3uH/4.8A
2
SKIPSEL
5
6
7
8
2
PZ16 220UF/6.3V,OSCON ns 3 PR247 0 R0805
VREG5
D
VCLK
BZT52C3V6S-F/3.6 CAP6_6x7_3 G2 G1 ns +
GND
1
2
EN0
GND2 GND1
VIN
SOD323 PD29 S2 G2 R0402
1
2
G
SOD123 GND_TPS51125 R0402 PC116 BZT52C5V6S-F/5.6
1
1
13
14
15
16
17
18
1
S
ns PQ86 PD33 SOD323
PC147 PC151 GND_TPS51125 AO4468 SSM34PT 1000pF/50V,X7R
3
2
1
1000pF/50V,X7R 1000pF/50V,X7R SO8_50_150 SMA
C0402 C0402 PR254 C0402 PC114
B B
ns
3A ns PC190 1000pF/50V,X7R
1 PR206
17,19 PWR_SW_VCC2
1K
R0402
PD11 VREG5
2 ENTRIP1
22 ALWAYS_ON
PC153
3 PR255 0 R0402 EN0_AL 0.1uF/25V,Y5V
ns PR199 C0402
3
1 4.7K ns
24 ALW_EN
PC57 R0402 PQ84
0.022uF/16V,X7R 2N7002
BAT54C PR99 C0402 PR196 1 SOT23
SOT23 100K ns 1K PC146
R0402 R0402 0.1uF/25V,Y5V
2
3
ns C0402
ns 1 PQ81
MMBT3904-F
GND_TPS51125 GND_TPS51125
2
A TOPSTAR TECHNOLOGY A
PR251 0 PR204
R0402 30K Swain Xu(许沐锌)
R0402 Page Name +V3.3AL/+V5AL
Size Project Name Rev
GND_TPS51125 Custom X01
B
Date: Tuesday, September 29, 2009 Sheet 26 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
+V0.9S 13,31
5 4 3 2 1
+V0.9S 13,31
+V5AL 12,16,19,20,26,28,29,30
+V3.3AL 12,14,15,16,17,18,19,20,22,23,24,25,26,28,29,30,32
+VDC 12,17,20,24,26,28,29,30,31,32
+V1.8 8,10,13,28,29,30,31
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,28,29,30,31,32
+V5AL
+V3.3AL
D D
+VDC
PR194
PR178
0
PC40
4.7uF/25V,X7R 2A
4.7K PU21 PC37 C1206
V1.8PWROK R0402 R0402 PC36 1000pF/50V,X7R
5
6
7
8
TPS51218 PC248 0.1uF/25V,X7R C0402
D
1 10 0.1uF/25V,X7R PR151 C0603
PGOOD VBST C0603 0
R940
PR187 R0402 4
TestP AO4468
G
1K R0402 2 9 V1_8
TPC60 TRIP DRVH PQ14
S
R0402 130K PR38 PL8 TestP
ns 10K SO8_50_150 2.2UH/14A TPC60
3
2
1
22 V1_8_ON 3 EN SW 8 LS2_6530
5A ns
5A
1 +V1.8
5
6
7
8
4 7 PR153 PC43
VFB V5IN
2
D
0 C0402
PC50 R0402 PR262 0.1uF/10V,X7R
1
0.022uF/16V,X7R 5 6 4 2.2 PZ1
GND
RF DRVL
G
PD13 R0805 BZT52C2V0S-F/2.0V
1
+
1
C0402
S
PC72 1N5819 ns SOD323
1
ns PR84 4.7uF/10V,X5R PQ15 SOD123 PC136 ns
11
3
2
1
2
tps51218 C0805 AO4468 220UF/6.3V,OSCON
PR77 470K SO8_50_150 PC123 CAP6_6x7_3
10K,1% 1000pF/50V,X7R
C0402
Set Fsw 290K ns
C C
Update PD13 to 1N5819 for EMI request
许沐锌 090917
PR263
16.2K,1%
PC33 PR41
0.022uF/16V,X7R 20K
C0402 ns R0402 ns
PU10
APL5331
SOP8_1D27_4G
1A 1 8 +V5AL
+V3.3S
+V1.8 VIN NC3
PR191 2 7 +V3.3AL
2K,1% GND NC2
PC35 R0402 3 6 PR48
4.7uF/10V,X5R REFEN VCNTL 20K
PGND
C0805 4 5 R0402
PC34 VOUT NC1 PC73 +V0.9S PR47
0.1UF/10V,X7R 4.7uF/10V,X5R 51K DDR_PWG
DDR_PWG 22,29
C0402 PR192 C0805 R0402
9
3
B PC38 2K,1% B
0.1UF/10V,X7R R0402 PQ16
1
C0402 PR49 2N7002E-T1-E3
1K 1 SOT23 J5
R0402 JOPEN
RESISTOR_1
2
TPC60 R0402 ns
2
+V3.3AL TestP PR46
3
V0_9S1 0 PQ17
ns SM_VREF_L 13 1 MMBT3904-F
PR188 SOT23
3
4.7K
2
R0402 PQ82
2N7002 +V0.9S PR50 Lzj0816VB:统一物料.
PR190 1 SOT23 20K
1K
R0402
PC144
0.1uF/25V,Y5V 1A R0402
2
3
PR189
30K
R0402
A A
TOPSTAR TECHNOLOGY Mayc
Swain Xu(许沐锌)
Page Name +V1.8/+V0.9S DDR
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 27 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3AL 12,14,15,16,17,18,19,20,22,23,24,25,26,27,29,30,32
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,27,29,30,31,32
+VDC 12,17,20,24,26,27,29,30,31,32
+V1.5S 10,14,16,17,18,29,31
+V1.05S 6,7,10,15,16,20,21,29,31
PR219
+V5S 11,12,14,16,19,20,22,30,31,32
0
+V5AL 12,16,19,20,26,27,29,30
R0402 +V3.3AL
+V0.89S 10,31
+V5AL +V1.8 8,10,13,27,29,30,31
ns +V3.3S
+V3.3S PR217
1.5A 10K
R0402
10K
R0402
0 PC249 ns ns
R0402 0.1uF/25V,X7R
D PR183 C0603 0.89PWROK# D
+V0.89SPWROK 29
PR88 PR150 PC51 PC52 PC54
10K PU14 0 0 1000pF/50V,X7R 0.1uF/25V,X7R PQ23
R0402 R0402 R0402 C0402 C0603 C1206 PR82 MMDT3904
TPS51218 4.7uF/25V,X7R 1K SC70_6
6
29 +V0.89SPWROK 1 10 R0402 ns
PGOOD VBST
1
PR215 ns +V0.89S 5 2 0.89PWROK#
PR264 D1 D1
PR218 PQ6 ns
29 CHIPPWROK
1K 2 9 PR257 8 AO4932
1
0 R0402 R0402 R0402 TRIP DRVH SO8_50_150 PR105
10K G1
R0402 S1 PL14 080716VA:Co_lay. 100K
130K
22 V0_89S_ON 3 EN SW 8
5 7
2.2UH/14A
LS2_6530
2A R0402
ns
1 +V0.89S
4 7 PR152 6
VFB V5IN
1
0
2
J7 PC55 R0402 D2 V0_89S
1
JOPEN 0.022uF/16V,X7R 5 6 3 TestP PU11
GND
RESISTOR_1 RF DRVL PD30 PR265 PD16 TPC60 APL5331
1
+
1
C0402
ns PC49 G2 S2 1N5819 2.2 SOD323 ns SOP8_1D27_4G
2
ns 4.7uF/10V,X5R SOD123 R0805 BZT52C2V0S-F/2.0V
11
1
PR79
tps51218
PR266
C0805 ns ns ns
2A 1 8
+V1.8 VIN NC3
+V3.3AL 10K,1% 470K PC125 PC121
R0402 R0402 C0402 0.1uF/10V,X5R PR205 2 7 +V3.3AL
0.01uF/25V,X7R C0402 2K,1% GND NC2
ns PC138 PC44 R0402 3 6
220UF/6.3V,OSCON 4.7uF/10V,X5R REFEN VCNTL
PGND
CAP6_6x7_3 C0805 4 5
PC53 VOUT NC1 PC75
PR57
0.1UF/10V,X7R 4.7uF/10V,X5R
2.74K,1% C0402 PR203 C0805
9
PC66 10K,1%
Update PC138 to 533115722001 for Buyer request 0.1UF/10V,X7R
许沐锌 090917 C0402
PC39 PR42
0.022uF/16V,X7R 20K
C0402 ns R0402 ns
TPC60
+V3.3AL TestP
V0_9S2
C ns C
PR200
3
4.7K
R0402 PQ83
2N7002 +V1.5S
PR202 1 SOT23
1K
R0402
PC145
0.1uF/25V,Y5V 2A
2
3
C0402 PC48 PC47
ns 1 PQ80 10uF/6.3V,X5R 10uF/6.3V,X5R
22 V1_5S_ON
MMBT3904-F C0805 C0805
PR221 ns
2
0
R0402 PR201
+V5AL 30K
ns R0402
+V5S
PR220 +VDC
+V3.3S
0
R0402
1.5A
PC250
0.1uF/25V,X7R PC63
C0603 PC60 PC61 4.7uF/25V,X7R
PR89 PR184 1000pF/50V,X7R 0.1uF/25V,X7R C1206
10K PU15 0 PR154 C0402 C0603
R0402 0
TPS51218 R0402 R0402
30 +V1.05SPWROK 1 10
PGOOD VBST
PR267
5
6
7
8
PL11
130K 2 TRIP DRVH 9 D PQ68 2.2UH/14A
PR258 AO4468 LS2_6530 ns
R0402 10K 4 SO8_50_150 1 080716VA:Co_lay.
G
22 V1_05S_ON 3 EN SW 8 R0402
S
+V3.3AL
PR197 +V1.05S
63
72
81
1
5
B R0402 0 R938 B
3.3uH/4.8A
PC56 R0402 2.2 LS2_8836
1
2
0.022uF/16V,X7R 5 6 4 R0805 V1_05S
GND
RF DRVL
G
1
C0402
S
3
2
1
2
ns PR268
tps51218 PC59 SO8_50_150 220UF/6.3V,OSCON ns ns
2
1
PR80 470K 4.7uF/10V,X5R CAP6_6x7_3 PC124 SOD323
10K,1% R0402 C0805 PC62 0.1uF/10V,X5R BZT52C2V0S-F/2.0V CHIPPWROK#
CHIPPWROK 29
R0402 1000pF/50V,X7R C0402
+V3.3AL C0402 PQ20
ns PR56 MMDT3904
1K SC70_6
6
PR64 +V1.5S R0402
5.11K,1% 5 2 CHIPPWROK#
R0402
1
PR58
100K
R0402
PC41 PR43
0.022uF/16V,X7R 20K
C0402 ns R0402 ns
PR139
1K
3
R0402
1 PQ38
+V1.05S MMBT3904-F
SOT23
2
PR140
100K
R0402
A A
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,27,28,30,31,32
+V5AL 12,16,19,20,26,27,28,30
+V3.3AL 12,14,15,16,17,18,19,20,22,23,24,25,26,27,28,30,32
+V1.05S 6,7,10,15,16,20,21,28,31
+V1.5S 10,14,16,17,18,28,31
+VCC_CORE 10,32
+V1.8 8,10,13,27,28,30,31
+VDC 12,17,20,24,26,27,28,30,31,32
PR65
10K
R0402
OVP CIRCUIT
PD20 1 1N4148WS
22,27 DDR_PWG MAIN_PWROK 22
SOD323
PQ24
SOT23 DTB114EK
28 CHIPPWROK 1
BAT54A SOT23
3 24,25,33 Isense_SYSN 2 3 SHDN# 24,25
2 PD34 PR67
28 +V0.89SPWROK
20K
PR69
1
SOT23 PC67 100K
15,22 PM_RSMRST# 1
BAT54A 0.1uF/25V,Y5V R0402
PR72 3 C0402 PR68
1K 20K
R0402 2 PD21 R0402
15,22 PM_SLP_S3#
2
PC69 PR70 0 PR71 PQ25
3
0.1uF/10V,X7R R0402 20K 1 DTB114EK PQ26
21 SHDN_LOCK#
C0402 R0402 SOT23 PC68 2N7002
0.01uF/25V,X7R SOT23
3
C PQ27 C0402 1 C
MMDT3904
6
PZ2 SOD323 SC70_6
2
2 1 5 2
+V5AL
BZT52C5V6S-F/5.6
1
PR73
PZ3 SOD323 20K
2 1 PR74 PR75 R0402
+V3.3AL PC70 100 PC71 20K
BZT52C3V6S-F/3.6 1uF/10V,X7R R0402 1000pF/50V,X7R R0402
C0603 C0402
PZ4
2 1 ns
+V1.8
BZT52C2V0S-F/2.0V
SOD323
PZ5
2 1 ns
+V1.5S
BZT52C2V0S-F/2.0V
SOD323
PZ6
2 1 ns
+V1.05S
BZT52C2V0S-F/2.0V
SOD323
PZ7
+VCC_CORE 2 1 ns
B B
BZT52C2V0S-F/2.0V
SOD323
PZ8
PR78 100 R0402 2 1
+VDC
ns BZT52C13S-F/13.0V
SOD323
ns
A A
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name Power Good logic/OVP
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 29 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
+VDC 12,17,20,24,26,27,28,29,31,32
+V5S 11,12,14,16,19,20,22,28,31,32
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,27,28,29,31,32
+V5AL 12,16,19,20,26,27,28,29
+V3.3AL 12,14,15,16,17,18,19,20,22,23,24,25,26,27,28,29,32
+V1.8S 10,14
+V1.8 8,10,13,27,28,29,31
AD+ 24
BATT+ 24,25,33
PR210 0
R0402
+VDC
PD25 +V3.3AL
2 PR232
BATT+
1K
PR208 3 2 3 R0402
4.7K ns
R0402 1 PQ50 PD24
AD+
DTB114EK 1N4148WS PQ51
PR172 SOT23 +V5AL SOD323 SI4800BDY
5
6
7
8
BAT54C 100K PC162 1 SO8_50_150
D
SOT23 R0402 0.01uF/25V,X7R V3_3S1
ns C0402 PR231 TestP
51K 4 TPC60
G
R0402 ns
5
6
7
8
S
PR198 PR171 PR229
D
PR173 33K PQ53 33K 51K
4A
3
2
1
1K R0402 SI4800BDY R0402 R0402 +V3.3S
R0402 4 SO8_50_150 PC65
G
V5S1 0.1uF/25V,X7R
S
MAIN_PWR_DN# TestP C0603
31 MAIN_PWR_DN#
TPC60 PC166
3
2
1
3
ns +V5S 1uF/10V,X7R
PQ48 C0603
2N7002
1 PC64
22 MAIN_ON
0.1uF/25V,X7R PC179
PR167 SOT23 C0603 1uF/10V,X7R
2
1K PR168 C0603
R0402 510K
R0402
PR212
0
R0402
+V1.8
PQ34
PR141 PD23 SI4800BDY
5
6
7
8
100K 1N4148WS SO8_50_150
D
R0402 SOD323
+VDC
4 V1_8S1
G
TestP
S
TPC80 ns
3
2
1
+V1.8S
PR228 PQ60
3
100K 2N7002
R0402 SOT23 PC149
0.1UF/25V,X7R
1 C0603 ns
PR256 0 PC148
R0402 1uF/10V,X7R
22 V1.8S_ON
2
ns C0603
3
PQ18
PR209 1 MMBT3904-F PR211
28 +V1.05SPWROK
20K SOT23 100K
R0402 R0402
2
PR230
100K
R0402
ns
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name V5S/ V3.3S/ V1.8S/1.2S Power
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 30 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,27,28,29,30,32
+V1.05S 6,7,10,15,16,20,21,28,29
+V1.5S 10,14,16,17,18,28,29
+V1.8 8,10,13,27,28,29,30
+V0.9S 13,27
+VDC 12,17,20,24,26,27,28,29,30,32
+V5S 11,12,14,16,19,20,22,28,30,32
+V0.89S 10,28
2
PR175
100 PR174 PR236 PR157 PR165 PR176 PR164 PR155 PR170
R0402 100 100 100 100 100 100 100 100
R0402 R0402 R0402 R0402 R0402 R0402 R0402 R0402 +VDC
1
PR169
PQ56 PQ43 PQ47 PQ55 510K
3
3
2N7002 2N7002 2N7002 2N7002 R0402
SOT23 SOT23 SOT23 PQ52 SOT23
2N7002
1 1 1 1 SOT23 1 DISCHG
PQ39
3
2N7002
2
2
PR32 SOT23
200K
R0402 1 MAIN_PWR_DN# 30
2
+V0.9S
2
+V1.8 PR233 PR156 +VDC
100 100
R0402 R0402
1
PR234
100
2
2
R0402
PR177
100 PQ49
3
R0402 2N7002 PR159
V1_8DISCHG SOT23 510K
1
1
R0402
1
PQ44 PQ54
2
3
2N7002 2N7002
SOT23 SOT23
PR237
200K
R0402
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name Discharge Circuit
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 31 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
+VDC 12,17,20,24,26,27,28,29,30,31
+V5S 11,12,14,16,19,20,22,28,30,31
+VCC_CORE 10,29
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,27,28,29,30,31
+V3.3AL 12,14,15,16,17,18,19,20,22,23,24,25,26,27,28,29,30
D D
+VDC
+V3.3S
PC86
PR185 4.7uF/25V,X7R
2.2 PC251 C1206
PR90 0.1uF/25V,X7R PC83 PC84 PC85
10K PU16 R0402 C0603 1000pF/50V,X7R 0.1uF/25V,X7R 10uF/25V,X5R
R0402 C0402 C0603 C1210
TPS51218 ns
5
6
7
8
CK505_CLK_EN# R502 0 R0402 1 10
PGOOD VBST
D
PR269 PQ40
PR158
130K AO4468 PL12
2 9 4 SO8_50_150 2.2UH/14A
TRIP DRVH
G
LS2_6530 ns
S
R0402 2.2 PR259 1 080716VA:Co_lay.
22 IMVP_ON 3 8 R0402 10K
3
2
1
EN SW +V5S PL9
PR181
R0402 4A
1 +VCC_CORE
5
6
7
8
1K 4 7 PR160 3.3uH/4.8A
VFB V5IN
D
R0402 0 R939 LS2_8836
PC141 R0402 2.2
1
2
0.1uF/25V,Y5V 5 6 4 R0805
GND
RF DRVL
G
C J9 C0402 PC142 + VCORE C
1
S
JOPEN ns PC81 AO4468 220uF/6.3V,POSCAP PD28 TestP
RESISTOR_1 4.7uF/10V,X5R PQ41 CT7343_19 BZT52C2V0S-F/2.0V TPC60
1
11
3
2
1
2
ns tps51218 C0805 PD26 SOD323 ns
2
1
PR83 PR270 SO8_50_150 1N5819 PC87 PC130
10K,1% 470K SOD123 1000pF/50V,X7R 0.1uF/10V,X5R
R0402 R0402 C0402 C0402
+V3.3AL
B B
+V3.3AL +V3.3S +V3.3S
PR114 PR115
+VCC_CORE 20K 20K PR112
R0402 R0402 CK505_CLK_EN# Pull high to +3.3AL 20K
ns ns Swain 080815 R0402 R496 0 R0402
mayc 0812 for power sequence EC_IMVP_PD_OUT 22
ns
CK505_CLK_EN# 6,15 IMVP_PWRGD 9,15,22
PR113
10K
3
R0402 R497 0 R0402
EC_IMVP_PD_IN# 22
ns PR116 PQ74
3
75K 2N7002
1 PQ42 R0402 ns 1 SOT23
MMBT3904-F 6,15 CK505_CLK_EN# ns
SOT23
2
2
PR117 PC90 ns 预留直接把PGOOD 给 CLK_EN
20K 0.22uF/10V,X7R 许沐锌 090723 PC91
R0402 C0603 0.22uF/10V,X7R
ns ns C0603
ns
A A
TOPSTAR TECHNOLOGY
Liu JX
Page Name +VCC CORE
Size Project Name Rev
A3 X01
B
Date: Tuesday, September 29, 2009 Sheet 32 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
BATT+ 24,25,30
PU9
PC92 PR121 0
1.5A
1uF/10V,X7R VDDP 15 2 R0402 Isense_SYSN 24,25,29
CHG_GND VDDP ACSET
C0603
PR118
4.7 PC94
R0402 CHG_VDD 1 0.1uF/25V,Y5V PC95 PC98 PC96 PC104
PC93 5V_internal_LDO VDD C0402 PD42 SOD323 1000pF/50V,X7R 0.1uF/25V,X7R 10uF/ 25V 4.7uF/25V,X7R
1uF/10V,X7R 24 1N4148WS/75V/150mA C0402 C0603 C1210 C1206
C0603 DCIN 1
ns ns
19,24 Isense_SYSP 19 CSIP PR122 0
PR119 PC99 R0402 070906VA:Co-lay。
0.1uF/25V,Y5V 20 17 PR120
24,25,29 Isense_SYSN CSIN UGATE
C0402 R0402 0
10 R0402
PD43
1
PC100 PC101
1000pF/25V,X7R 5600pF/50V,Y5V 5 16 VDDP D1 D1 PQ10
ICOMP BOOT 1
C0402 C0603 ISL6251HAZ
1N4148WS/75V/150mA PR123
8 AO4932
PL7 PR124
8.4V
G1
SSOP24_25_150 PC106 SOD323 10K S1 15uH/3.6A 50mOHM,1% PC109 BATT+
PR193 PC105
C0402
0.01uF/25V,X7R 6 VCOMP
0.1uF/25V,Y5V
C0402
R0402 2A LS2_1040 2A R2512 2A 0.1uF/25V,X7R
C0603 VBATS1
5 7 1
R0402 10K 18 phase TestP
PHASE PR273 TPC60
6
CHG_GND 3.3V 11 VADJ
2.2 PC107 ns
D2 SO8_50_150 R0805 PC108 PC110
14 3 PD39 ns 4.7uF/25V,X7R 10uF/ 25V 1uF/25V,Y5V
LGATE 1N5819 C1206 C1210 C0805
1
3
Change from 10k to 6.98k 22 CHG_ON EN G2 S2 SOD123 PC126 ns
13 1000pF/50V,X7R
PR126
4
PGND C0402
6.98K,1% 9 ns
22 SET_I CHLIM
R0402 21
PR13 CSOP
1K PR125 PC111 PR127
R0402 PC113 15.4K,1% 2.39V_Vref 8 1uF/10V,X7R
1uF/10V,X7R R0402 VREF C0603
CSON 22
1
R0402
SET_I 充电电流
CHG_GND
0V 0A CHG_GND
3.3V 2A
TOPSTAR TECHNOLOGY
1B 2A 2B
BATT+ +V5_STBY
PQ1 ALW_PWROK EC_RTC
3A 5B
PD1
1A +VDC
AD+
D
Always_On 4B +V3.3AL D
PQ2
Power +V5AL +V1.8
2A
TPS51125 14 +V1.8S
V1_05S PG
PWRSWVCC2 V1_8_PWROK 11
ALWAYS_ON
7
DDR_PWROK 11
ALW_EN System Power 11 +V3.3S
3B 5A +V_S +V5S
PWRSWVCC2 PWRSW# DDR POWER 10 10
AD+ +V1.8 MAIN_ON
7B 6A TPS51218
9 13 14
ALW_PWROK 5B 3A V0_9S_ON APL5331 +V0.9S DDR_PWG
V1_8_ON
PM_SLP_S4# 8 10
MAIN_ON
PM_SLP_S3# 8
DDR_PWG 14
C PM_RSMRST# 4A 6B EC_KBC 16 CHIPPWROK 15 C
MAIN_PWROK PU7
KB3310B SET_I
TigerPoint 7 PM_PWRBTN# PM_RSMRST# 5A 6B
CHG_ON
PM_SLP_S3# 8
7 ALWAYS_ON
V1_5S_ON
IMVP_ON
SYS_I_Sense
V1_05S_ON
V0_89S_ON
ICH_POWGD
VR_PWRGD_EN
MAIN_PWROK
to IMVP_ON
SYS_I_Sense AC_IN
Delay 100mS +V3.3S
17
9 13 14
V1_5S_ON APL5331 +V1.5S +V1.5S
Charge BATT+
+VDC
14 Chipset PWR ISL6251
PLT_RST#
+V1.05S
+V0.89S TPS51218*2
21 19 SET_I
H_PWRGD
CHG_ON
22 22
V1_05S
CHIPPWROK
15
B
+V1.5S B
Note:
*A:For adapter in
*B:For battery only
IMVP_ON
VR_PWRGD_CLK_EN 19 Clock * :For all
17
CK410M
20 IMVP_PWRGD
VCC_CORE
VR_PWRGD 19
TPS51218
18
PineViwe
+VCC_CORE CLK_EN 19
H_PWRGD MAIN_PWROK
21
20 IMVP_PWRGD ICH_POWGD
+VCC_CORE
A
CPU A
TOPSTAR TECHNOLOGY
CPURST# CPURST#
T15 T15
PCIRST# PCIRST#
PLTRST#
T14 T14
SUS_STAT# SUS_STAT#
T17 T17 MAIN_PWROK(Input to EC)
T23 T23
(CPU PWRGD) (CPU PWRGD)
H_PWRGD T10 H_PWRGD
D T10 +V0.89S D
PM_ICH_PWROK (Input to ICH) PM_ICH_PWROK (Input to ICH)
+V1.8S
Clock Gen Output Clock Gen Output
CHIPPWROK
IMVP_PWRGD IMVP_PWRGD
+V1.05S
+V0.9S
+VCC_CORE +VCC_CORE
+V3.3S,+V5S
IMVP_ON(EC Output) IMVP_ON(EC Output)
+V1.8
T08 T08
130ms 130ms
PWRSW#(Input to EC)
Press Power Button +V3.3AL,+V5AL,
+V5_STBY,EC_RTC
(PRESS POWER BUTTON)
EC_RTC AC_IN
+VDC
+VDC
T01 RTCRST#
RTCRST# T01
T02
VCCRTC T02
VCCRTC PLUG
PLUG Adapter
Main
Battery
V1_8_ON(EC Output)
V0_9S_ON(EC Output)
+V3.3S,+V5S,+V2.5S,+V1.5S,+V1.05S,+V1.8,
+V1.8S,+V0.9S,+V0.89S V1_8_ON(EC Output)
+V3.3S,+V5S,+V2.5S,+V1.5S,+V1.05S,+V1.8,
+V0.9S
T22a
ALWAYS_ON(EC Output)
ALWAYS_ON(EC Output)
T22c
+V3.3AL,+V5AL
IacN
RSMRST#(Input to EC)
IacN
ACIN
A A
TOPSTAR TECHNOLOGY
Page Name
Power ON/OFF Timing
Size Project Name Rev
A2 X01 B
Date: Tuesday, September 29, 2009 Sheet 35 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
1 1 1 1 1 1 1 1
Touchpad FMARKS
ns
FMARKS
ns
FMARKS
ns
FMARKS
ns
D TR1 TR2 D
1K 1K TFD6 TFD8 TFD7
R0402 R0402
LEFT RIGHT 1 1 1
TP TP 1 1 1
3 4 FMARKS FMARKS FMARKS
3 4 ns ns ns
1
TC1 TESD1 TFD9 TFD10 TFD12 TFD11
1
100pF/50V,NPO ESDPAD_R0603 TC2 TESD2
TP EGA1-0603-V05 100pF/50V,NPO EGA1-0603-V05 1 1 1 1
ns TP ESDPAD_R0603 1 1 1 1
1 2
2
L_SW 1 2 ns FMARKS FMARKS FMARKS FMARKS
2
TD-13XA ns ns ns ns
BUTTON4_S R_SW
TD-13XA
TP BUTTON4_S TH2 TH1
TP_+V5S
TP
C C
TC3 TC4
0.1uF/25V,Y5V 0.1uF/25V,Y5V
C0402 C0402 HOLE HOLE
1
TP TP TH_240_112 TH_240_112
ns ns
TP_CAP1
TP_CON2 12
12 RIGHT
11 11
INT_spkR 6Pin 14 10 LEFT
CNS6_0D5_RA1 1410
9 9
8 8
6 6 TP_+V5S 7 7
B 8 8 5 5 6 6 B
4 TP_TPCLK 5
4 TP_TPDAT 5 TP_TPCLK
7 7 3 3 4 4
2 13 3 TP_TPDAT
2 13 3
1 1 2 2
1 1 TP_+V5S
TP
TPCON_USB
CNS12_0D5_RA1
TP
ns ns ns
EMIPOINT EMIPOINT EMIPOINT
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name Touchpad Board
A A
Size Project Name Rev
A4 X01
B
Date: Tuesday, September 29, 2009 Sheet 36 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V5S_IO 38,39
+V3.3S_IO 38,39
S1
+V5AL_USB2_3 1.6A
FUSE1812
IO_Board
1 2 +V5AL_IO
1
330PF/50V,X7R
+ C84 D32 R87
IO_Board
C0402 100uF/10V ESDPAD_R0603300K C66 IO_Board IO_Board
D ct7343_28 EGA1-0603-V05
R0402 1000pF/50V,X7R IO_CONN2 D
USB2 IO_Board IO_Board IO_Board C0402 GND_IO
2
4 LUSB_PORT_OC0# 34
VCC1 CHK3 L4_0805
5 HOLE0
6 3 -DATA1
GND_IO GND_IO GND_IO 3 4 LUSB_PORT_PN1 32
HOLE1 -DATA1 +DATA1 LUSB_PORT_PP1
7 HOLE2 +DATA1 2 2 1 LLAN_TX1+ 31
8 HOLE3 LLAN_TX1- 30
1 ns 29
GND R291 0 R0603 IO_Board
LLAN_TX0- 28
1
SINGLE USB PORT D30 D31 27
LLAN_TX0+
USB1F ESDPAD_R0603 ESDPAD_R0603 R290 0 R0603 IO_Board 26
IO_Board EGA1-0603-V05 EGA1-0603-V05 LAVDD18 25
IO_Board IO_Board 24
2
LUSB_PORT_PN1
Keep USB2.0 Signal stub short LUSB_PORT_PP1
23
GND_IO 22
21
LUSB_PORT_PN2 20
LUSB_PORT_PP2 19
+V5AL_USB2_3 GND_IO 18
LUSB_PORT_OC0# 17
update C84, C322 footprint to ct7343_28 16
090916 SWAIN 15
39 LSATA_RXN0
39 LSATA_RXP0 14
C323 13
1
330PF/50V,X7R
+ C322 D44 12
39 LSATA_TXP0
C0402 100uF/10V ESDPAD_R0603 11
39 LSATA_TXN0
IO_Board ct7343_28 EGA1-0603-V05 10
USB3 IO_Board IO_Board 9
2
38 IO_HDA_RST#
VCC1 4 38 IO_HDA_SYNC 8
C 5 GND_IO GND_IO CHK6 L4_0805 7 C
HOLE0 -DATA2 LUSB_PORT_PN2 38 IO_HDA_SDOUT
6 HOLE1 -DATA1 3 GND_IO 3 4 38 IO_HDA_SDATA_IN0 6
7 2 +DATA2 2 1 LUSB_PORT_PP2 5
HOLE2 +DATA1 38 IO_AMP_SHDW
8 HOLE3 4
1 ns 3
GND 38 IO_HDA_BITCLK
R514 0 R0603 IO_Board 2
1
GND_IO GND_IO
Pin updated
090916 SWAIN
1
EMI EMI EMI
U11 EMIPOINT EMIPOINT EMIPOINT
1
TRAN16_50_272 IO_TH1 ns ns ns
R17 13 5 RN1
N4 N2 0x4
0 12 N3 N1 4
R0402 RA0603_8IO_Board
B ns TX0- B
LLAN_TX0- 9 TD- TX- 8 1 2
3 4 GND_IO GND_IO GND_IO
If use 8101E, InstallR348 11 6 MCT1 5 6
Swain 080709 TDC CMT
7 8
10 7 TX0+ +V5AL_IO
LLAN_TX0+ HOLE
1
TD+
1CT:1CT TX+ TH_256_100A
15 2 TX1- CHK2 ns CASE_GND
LLAN_TX1- RD- RX- ns
14 3 MCT2 TX1- 4 5 RJ45_TX1- 1
RDC RXC TX1+ L2+ L3+ RJ45_TX1+ 1
3 L2- L3- 6 GND_IO 2 2
9
16 1 TX1+ TX0- 2 7 RJ45_TX0- LANCONN 3
LLAN_TX1+ RD+
1CT:1CT RX+ L1+ L4+ RJ45 3
C223 TX0+ 1 8 RJ45_TX0+ +V5S_IO 4 9
0.01uF/25V,X7R C225 L1- L4- 4 9
5 5 10 10
C0402 0.01uF/25V,X7R IO_Board 100MHz0.5A RJ45_TX0+ 1 TX0+ +V3.3S_IO 6
IO_Board C0402 RJ45_TX0- 6
CMC8 2 TX0- TX0+ 7 7
IO_Board RJ45_TX1+ 3 TX1+ TX0- 8
MCT3 TX1+ 8
4 TX2+
TX2+
5 TX2- TX2-
RJ45_TX1- 6 TX1- TX1- IO_PWR_CN2 GND_IO
7 TX3+ 87213-0800
MCT1
TX3+
MCT4 8 TX3- TX3- GND_IO
MCT2
MCT3
MCT4
CNS8_1_R_W2B
LLAN_TX1+ LLAN_TX1- IO_Board
JACK
10
LD1 RJ45_SB
AZC099-04S IO_Board
4
SOT23_6 IO_Board
A
R6 0 ns R0603 R8 R7 R217 R216 A
75 75 75 75 CASE_GND TOPSTAR TECHNOLOGY
C8 330pF/50V,X7R C0603 IO_Board R0402 R0402 R0402 R0402
IO_Board IO_Board IO_Board IO_Board Swain Xu(许沐锌)
C11 4.7uF/10V,Y5V C0805 IO_Board Update LANCONN to 621200810007 Page Name Touchpad Board
许沐锌 090925
C7 330pF/50V,X7R C0603 IO_Board Size Project Name Rev
C10 A3 X01
B
C6 330pF/50V,X7R C0603 IO_Board 1000pF/2000V
3
+V3.3S_IO 37,39
+V5S_IO 37,39
Headphone Jack
VCC5CDC +V5S_IO
FB16
INPUT:HEADPHONE/LINE-OUT
+V3.3S_IO 1 2 300ohm@100MHz,2A
FB0805
OUTPUT:FRONT L/R
C351 C354 C355 C357 C345 C340 IO_Board C199
C0402 C0402 C0805 C0402 C0402 C0805
0.1UF/25V,Y5V 0.1UF/25V,Y5V 10UF/6.3V,X5R 0.1UF/25V,Y5V 0.1UF/25V,Y5V 10UF/6.3V,X5R 0.1UF/25V,Y5V
IO_Board IO_Board IO_Board IO_Board IO_Board IO_Board C0402 LINE_OUT1
IO_Board HP_OUT_L R152 75 R0402 FB12 1 2 300ohm@100MHz,2A 1 L
D Cross moat place D
U19 IO_Board FB0805 4
ALC662 HP_OUT_R R149 75 R0402 FB11 1 IO_Board
2 300ohm@100MHz,2A
25
38
GND_AUD 2
1
9
GND_IO QFPS48_0D5_1D6 GND_IO IO_Board FB0805 5 R
HP_JD 6
VDD1
VDD2
AVDD1
AVDD2
IO_Board
3
T31 ICTP ns A_GPIO0 2 35 C353 4.7uF/10V,X5R C0805 HP_OUT_L 7
GPIO0 FRONT-OUT-L
1
IO_Board D38 0.1UF/25V,Y5V D14 D13 8
ns A_GPIO1 3 36 C356 4.7uF/10V,X5R C0805 HP_OUT_R ESDPAD_R0603 C315 C168 C161 ESDPAD_R0603 ESDPAD_R0603
T30 ICTP GPIO1 FRONT-OUT-R IO_Board EGA1-0603-V05
IO_Board C0402 EGA1-0603-V05 EGA1-0603-V05 AZALIAJACK
37 100pF/50V,NPO 100pF/50V,NPO IO_Board IO_Board AUDIO8B
2
LINE1-VREFO-R C349 0.1UF/25V,Y5V C0402 IO_Board C0402 C0402 IO_Board
GND_AUD
IO_Board IO_Board IO_Board
27 C346 10UF/6.3V,X5R C0805
VREF IO_Board
11 28 VREFOUT R473 4.7K R0402 INT_MIC_L_R
37 IO_HDA_RST# REST# MIC1-VREFO-L ns
6 ?? GND_AUD
37 IO_HDA_BITCLK BITCLK
GND_IO C324 10PF/50V,NPO ns 29
C0402 LINE1-VREFO-L
37 IO_HDA_SYNC 10 SYNC
30 R474 2.2K R0402 MIC2_REF
MIC2-VREFO IO_Board
37 IO_HDA_SDOUT 5 SDOUT
LINE2-VREFO 31
R472 33 R0402 IO_Board 8
37 IO_HDA_SDATA_IN0 SDIN
MIC1-VREFO-R 32 R476 4.7K R0402 INT_MIC_L_R Stereo Microphone Jack
C352 10pF/50V,NPO C0402 IO_Board
GND_IO
ns 12 33 R475 10K R0402
INPUT:STEREO MIC-IN
37 IO_BTL_BEEP PC-BEEP DCVOL VCC5CDC
JACK_DET_A
ns
JACK_DET_B
D41
1N4148WS
OUTPUT:CENT/LFE
13 JD1 JD2 34
C350 MIC2_REF 1 2
14 43 SOD323
100pF/50V,NPO LINE2-L CEN-OUT D42
1N4148WS
C0402 15 44 1 2
IO_Board LINE2-R LFE-OUT IO_Board
SOD323
MIC2_L C342 4.7uF/10V,X5R C0805 16 ALC662 45
GND_IO IO_Board MIC2-L SIDESURR-OUT-L R156 R153
MIC2_R C341 4.7uF/10V,X5R C0805 17 46 IO_Board 4.7K 4.7K
IO_Board MIC2-R SIDESURR-OUT-R R0402 R0402
EAPD R495 0 R0402 SHUTDOWN# IO_Board IO_Board MIC_IN1
C 18 CD-L SPDIFI/EAPD 47 C
ns MIC2_L R466 75 R0402 FB14 1 2 300ohm@100MHz,2A IO_Board 1 L
20 48 IO_Board FB0805 4
CD-R SPDIFO MIC2_R R465 75 R0402 FB13 1 2 300ohm@100MHz,2A IO_Board 2
INT_MIC_L C344 1uF/10V,X7R C0603 21 IO_Board FB0805 5 R
IO_Board MIC1-L SURR_OUT_L MIC2_JD
SURR-OUT-L 39 6
update internal MIC circuit C343 1uF/10V,X7R C0603 22 3
IO_Board MIC1-R R494 20K,1% R0402
JDREF 40 GND_AUD 7
1
23 IO_Board D43 C339 C173 C169 D19 D18 8
LINE1-L SURR_OUT_R ESDPAD_R0603 ESDPAD_R0603 ESDPAD_R0603
Layout Note: SURR-OUT-R 41
CD-GND
24 EGA1-0603-V05 C0402 100pF/50V,NPO 100pF/50V,NPO EGA1-0603-V05 EGA1-0603-V05 AZALIAJACK
AGND1
AGND2
All of JD resistors should be LINE1-R
GND1
GND2
IO_Board 0.1UF/25V,Y5V C0402 C0402 IO_Board IO_Board AUDIO8B
placed as close as possible to
2
IO_Board
IO_Board IO_Board IO_Board
the sense pin of codec.
4
7
19
26
42
GND_AUD
IO_Board GND_IO
GND_AUD
JACK_DET_B R479 20K,1% R0402 MIC2_JD
VCC5CDC VCC5CDC IO_Board
HP_OUT_L GND_AUD HP_OUT_R GND_AUD
JACK_DET_A R467 5.11K,1% R0402 HP_JD
GAIN0 GAIN1 Av(inv) IO_Board
R180 R185 Q9 Q6
0 0 6dB
6
3
10K 10K 2N7002DW 2N7002DW
D20
R0402 R0402 SC70_6 SC70_6
IO_Board ns 0 1 10dB IO_AMP_SHDW 2 5 IO_Board IO_AMP_SHDW 2 5 IO_Board
GAIN0 1 2 JOPEN_3
1 0 15.6dB
1
4
GAIN1 Adjust Gain to 10dB ns
BY K' 080118
1 1 21.6dB R157 0 R0402
R181 R183 ns
B B
10K 10K
R0402 R0402 R182 0 R0402
ns IO_Board VCC5CDC ns
SHUTDOWN# 0.1UF/25V,Y5V
De-pop Solution
Layout Note:
3
R195 100K
10K R0402
R0402 IO_Board
1
1
+V5S_IO 37,38
+V3.3S_IO 37,38
D D
SATA HDD
+V5S_IO V_HDD
SATA_HDD
FB20 0 R0805 Average 1A,Peak 1.5A Close to connector as possible SATA_HDD CONN
IO_Board the same distance to connector SATA_S_50_7IO_Board
C320 C318 C319 P2
37 LSATA_TXP0 TX
4.7uF/10V,Y5V 0.1uF/25V,Y5V 0.1uF/25V,Y5V P3 P1
37 LSATA_TXN0 TX# GND0
C0805 C0402 C0402 C297 0.01uF/25V,X7R C0402 IO_Board
P5 P4
37 LSATA_RXN0 RX# GND1
IO_Board IO_Board IO_Board C298 0.01uF/25V,X7R C0402 IO_Board
P6 P7
37 LSATA_RXP0 RX GND2
GND_IO GND_AUD
GND_IO
SATA_B1 SATA_B2
Update SATA_HDD footprint to SATA_S_50_7
许沐锌 090917
B B
TOPSTAR TECHNOLOGY
Swain Xu(许沐锌)
Page Name SATA HDD
A A
Size Project Name Rev
A4 X01
A
Date: Tuesday, September 29, 2009 Sheet 39 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
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