Understanding Nanoelectronics: An

Accelerated Journey from Transistor

Basics to Metal-Gate FinFETs

Prof. Jakub Kedzierski

Indian Institute of Technology Bombay

On leave from: MIT Lincoln Laboratory

Industry Short Course

Oct 2012

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 1
 Course Information

• Course Objective
– This device course will cover modern aspects of semiconductor
device engineering from both the industrial and academic
perspective. The aim of the course will be to bring you up to date
with the latest challenges faced by digital IC industry, and a have
detailed look at the potential future of electronic devices

Gate
work- Reduced
At the end of the course the function mobility
students should have the
background necessary to
understand modern
Junction
transistor design INTEL depth
Body
45 nm doping
NODE

2007
IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 2
 Course Information
• Recommended pre-requisites:
– Understanding basic solid-state physics
– Understanding diodes, semiconductor depletion, basic MOSFET
– Basics of semiconductor fabrication
• Book (recommended if you want a good reference)
– Fundamentals of Modern VLSI devices – Yuan Taur and Tak Ning
• Course Notes
– Based on EE724, a course I put together in Spring 2012
– Some advanced material is included in the notes for your
reference, we will not cover all concepts
• Interaction
– Please interrupt and ask questions, ask for clarification if you
don’t understand
• My email:
– jakub@ee.iitb.ac.in

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 3
 My Background
• Born in Warsaw, Poland (1973) – English is my second language
• Emigrated to USA when I was 10, in 1983
• Undergraduate studies at the Ohio State University (1991-1994)
– Laser ablation experiments and ion implantation got me hooked on
solid state physics and device engineering
• Graduate studies at University of California at Berkeley
– Worked on quantum wire devices (MS), FinFETs, and silicon-dot
transistors (Ph. D.)
– FinFET project was substantial, with 5-7 students and researchers
• Worked in IBM Watson Research Center (2001-2004)
– Continued work on FinFETs and worked on Metal Gates
• Worked in MIT Lincoln Laboratory (2005-2011)
– Graphene, low power electronics, microfluidics
• Currently a visiting professor at IITB
• After March 2013, I will be in Malaysia or Singapore
– I am getting married in March, and my fiance is from Taiping

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 4
 Fermi-Dirac Statistics

• Electron distributions are governed by the Fermi-Dirac statistics

• At absolute zero electrons fill box like marbles with the fermi level
being the energy of the last marble

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 5
 Fermi-Dirac Statistics

• Electron distributions
EF/100 are governed by the
EF/10 Fermi-Dirac statistics
EF/2
with the following
EF/1
distribution function:
f(E)

• kT ~ 26 meV at 25°C
• Energies typical in a
semiconductor device
~1 V

E/EF

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 6
 Materials

Electron in free space Electron in 1D crystal

• In a crystal, electron interference with the lattice causes the

formation of band gaps where electrons have no available states
• If the fermi level falls inside a very wide band gap the material is
an insulator, if the fermi level falls in a narrow band-gap the
material is a semiconductor, if the fermi level falls in a band the
material is a metal

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 7
 Semiconductor Charge Distribution
1
F-D Statistics: 𝑓 𝐸 =
𝑒 (𝐸−𝐸𝑓 )/𝑘𝑇 + 1
𝑓 𝐸 ≈ 𝑒 −(𝐸−𝐸𝑓)/𝑘𝑇 for E>Ef

Nc 𝑓 𝐸 ≈ 1 − 𝑒 −(𝐸𝑓 −𝐸)/𝑘𝑇 for E>Ef

The continuum of energy levels in the electron can

be approximated (in most cases) as a certain
number of states (Nc) at the fermi energy Ec
Nv Thus the electron density (n) in the conduction
band can be given by:
𝑛 ≈ 𝑁𝑐 𝑒 −(𝐸𝑐−𝐸𝑓 )/𝑘𝑇
Similarly for hole density (p):

𝑝 ≈ 𝑁𝑣 𝑒 −(𝐸𝑓 −𝐸𝑣 )/𝑘𝑇

The np product is useful because 𝑛𝑝 ≈ 𝑁𝑐 𝑁𝑣 𝑒 −(𝐸𝑐−𝐸𝑣 )/𝑘𝑇 ~ (1.4x1010 cm-3)2

it is independent of fermi level:
IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 8
 Undoped Si

In undoped Si: 𝑛 = 𝑝 = 𝑛𝑖

𝑛𝑖2 ≈ 𝑁𝑐 𝑁𝑣 𝑒 −(𝐸𝑐 −𝐸𝑣 )/𝑘𝑇 ~ (1.4x1010 cm-3)2

𝑛𝑖 ≈ 𝑁𝑐 𝑁𝑣 𝑒 −(𝐸𝑔 )/2𝑘𝑇 ~ 1.4x1010 cm-3

In undoped (intrinsic) Si the fermi level is very

close to the mid-band energy Ei ~ (Ec+Ev)/2
The concentration can be rewritten in terms of Ei
and ni instead of Ec, Nc, Ev, Nv

𝑛 ≈ 𝑛𝑖 𝑒 −(𝐸𝑖−𝐸𝑓 )/𝑘𝑇

𝑝 ≈ 𝑛𝑖 𝑒 (𝐸𝑖−𝐸𝑓 )/𝑘𝑇

|Ei-Ef| is so useful that it is given a special name: 𝐸𝑖 − 𝐸𝑓 = 𝑞𝜙𝑏

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 9
 Doped Si

N-doped Si: 𝑛 = 𝑝 + 𝑁𝑑+

Hole concentration is negligible and donors are
fully ionized at room temperature and moderate
dopant levels giving: 𝑛 = 𝑁𝑑

Also: 𝑝 = 𝑛𝑖2 /𝑁𝑑

𝐸𝑑
(small)

With: 𝑁𝑑 = 𝑛 = 𝑛𝑖 𝑒 (𝑞𝜙𝑏 )/𝑘𝑇

Fermi level position can be calculated as:

𝑁𝑑
𝑞𝜙𝑏 = kT(ln )
𝑛𝑖

Similarly in p-Doped Si:

𝑁𝑎 𝐸𝑖 − 𝐸𝑓 = 𝑞𝜙𝑏
𝑝 = 𝑁𝑎 𝑞𝜙𝑏 = kT(ln )
𝑛𝑖

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 10
 MOS Capacitors

Metal
SiO2 𝑉𝑔
p-Si

• Understanding Metal- Oxide – Semiconductor (MOS) Capacitors

are a critical staring point for understanding MOSFETs
• MOS capacitors are not just of academic interest, they are often
manufactured and characterized as a part of any technology
development program
• We can use MOS caps to determine
• Oxide thickness and reliability
• Dielectric charge (mobile, fixed, and trap)
• Body doping profile
• Device threshold voltage
• Rough idea of gate doping (in poly-Si gated MOS caps)
• Gate workfunction (in metal gated MOS caps)

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 11
 MOS Capacitors

𝑉𝑎𝑐𝑢𝑢𝑚 𝑅𝑒𝑓𝑒𝑟𝑒𝑛𝑐𝑒 𝐿𝑒𝑣𝑒𝑙

Metal
SiO2 𝑉𝑔 𝐸𝑐 𝑜𝑥𝑖𝑑𝑒
p-Si 𝑞𝜙𝑚 𝑞𝜙𝐸𝑐

𝐸𝑐
𝐸𝑓 𝑆𝑖 𝐸𝑖
𝑞𝜙𝑚 Metal workfunction
Pt ~ 5.0~5.6 eV 𝐸𝑓 𝑀 𝐸𝑣
𝑞𝜙𝑏
𝑞𝜙𝐸𝑐 Electron affinity (𝑞𝜒) 𝑞𝑉𝐹𝐵
Si ~ 4.05 eV

𝐸𝑔
𝑞𝜙𝑚 − 𝑞𝑉𝐹𝐵 = 𝑞𝜙𝐸𝑐 + + 𝑞𝜙𝑏
2

𝐸𝑔
𝑉𝐹𝐵 = 𝜙𝑚 − 𝜙𝐸𝑐 − − 𝜙𝑏
2𝑞

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 12
 MOS Capacitors

Metal
Case I: Flat-Band
SiO2 𝑉𝑔 The flat-band condition for a MOS
Capacitor is the case when no charge
p-Si
is stored thus the fields are zero and
the bands are flat:
𝑉𝑔 = 𝑉𝐹𝐵
𝑞𝜙𝑚 Metal workfunction
Pt ~ 5.0 eV
𝑞𝜙𝐸𝑐 Electron affinity 𝑉𝑔 𝐸𝑐
Si ~ 4.05 eV
𝐸𝑣
𝐸𝑔
𝑉𝐹𝐵 = 𝜙𝑚 − 𝜙𝐸𝑐 − − 𝜙𝑏
2𝑞
In the case of Pt on p-Si the
workfunction can be close to 0V
Vg vs phib, Phib, depletion depth, capacitance vs vg

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 13
 MOS Capacitors

Metal
Case II: Accumulation
SiO2 𝑉𝑔 In accumulation condition charge is
present on the capacitor as the holes
p-Si
are attracted to the surface

The potential drop in the oxide is Vox 𝑉𝑔 < 𝑉𝐹𝐵

while the potential drop in Si is called
band-bending and labeled 𝜙𝑠
- 𝐸𝑐
𝑉𝑔 = 𝑉𝐹𝐵 + 𝑉𝑜𝑥 +𝜙𝑠
−𝑉𝑔 h+ 𝐸𝑣
Also:
𝜙𝑠 band bending is small

𝐶𝑐𝑎𝑝 = 𝐶𝑜𝑥 𝑄𝑐𝑎𝑝 = 𝐶𝑜𝑥 (𝑉𝐹𝐵 − 𝑉𝑔 )

Depletion charge 𝑄𝑑𝑒𝑝 and depth 𝜒𝑑𝑒𝑝 are zero

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 14
 MOS Capacitors

Metal
Case III: Depletion
SiO2 𝑉𝑔 In depletion carriers are depleted from
the Si close to the capacitor surface,
p-Si
exposing ionized dopant atoms

In depletion: 0 < 𝜙𝑠 < 2𝜙𝑏 𝑉𝑡 > 𝑉𝑔 > 𝑉𝐹𝐵

𝜒𝑑𝑒𝑝 = 2𝜀𝑠𝑖 𝜙𝑠 /𝑞𝑁𝑎
𝜙𝑠
𝐸𝑐
𝑄𝑐𝑎𝑝 = 𝑄𝑑𝑒𝑝 = −𝑞𝑁𝑎 𝜒𝑑𝑒𝑝 = − 2𝑞𝑁𝑎 𝜀𝑠𝑖 𝜙𝑠 𝑉𝑔
+ 𝐸𝑣
𝑉𝑔 = 𝑉𝐹𝐵 + 𝑉𝑜𝑥 +𝜙𝑠 Na-

𝑉𝑔 = 𝑉𝐹𝐵 + 2𝑞𝑁𝑎 𝜀𝑠𝑖 𝜙𝑠 /𝐶𝑜𝑥 +𝜙𝑠 𝜒𝑑𝑒𝑝

Also:
1 𝜒𝑑𝑒𝑝
𝐶𝑐𝑎𝑝 = 1/( + )
𝐶𝑜𝑥 𝜖𝑠𝑖
IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 15
 MOS Capacitors

Metal
Case IV: Inversion
SiO2 𝑉𝑔 In inversion bands bend enough so
that the electron population at the
p-Si
surface becomes significant

In inversion: 𝜙𝑠 = 2𝜙𝑏
𝑉𝑡 > 𝑉𝑔 > 𝑉𝐹𝐵
𝜒𝑑𝑒𝑝 = 4𝜀𝑠𝑖 𝜙𝑏 /𝑞𝑁𝑎
𝜙𝑠
e- 𝐸𝑐
𝑉𝑔 = 𝑉𝐹𝐵 + 𝑉𝑜𝑥 +𝜙𝑠 Becomes: 𝑉𝑔

𝑉𝑡 = 𝑉𝐹𝐵 + 4𝑞𝑁𝑎 𝜀𝑠𝑖 𝜙𝑏 /𝐶𝑜𝑥 +2𝜙𝑏 𝐸𝑣

Na-
+
𝑄𝑖𝑛𝑣 = −𝐶𝑜𝑥 (𝑉𝑔 − 𝑉𝑡 )
𝑄𝑐𝑎𝑝 = 𝑄𝑑𝑒𝑝 + 𝑄𝑖𝑛𝑣 = −𝐶𝑜𝑥 (𝑉𝑔 − 𝑉𝑡 ) − 2𝑞𝑁𝑎 𝜀𝑠𝑖 𝜙𝑠 𝜒𝑑𝑒𝑝

Also:
𝐶𝑐𝑎𝑝 = 𝐶𝑜𝑥
IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 16
 CV Curves

𝑉𝑔 (𝑉)

• CV (Ccap vs. Vg) from a realistic MOS cap, normalized to Cox

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 17
 Non-Linear Capacitors
For linear capacitors Q is For non-linear capacitors charge is an
linearly proportional to arbitrary (although generally monotonic)
Voltage applied: function of V:

𝑄𝑐𝑎𝑝 = 𝐶𝑉𝑐𝑎𝑝 𝑄𝑐𝑎𝑝 = 𝑓(𝑉𝑐𝑎𝑝 )

𝑑𝑄𝑐𝑎𝑝 (𝑉𝑐𝑎𝑝 )
𝑑𝑄𝑐𝑎𝑝 𝐶 𝑉𝑐𝑎𝑝 =
= 𝐶𝑜𝑛𝑠𝑡𝑎𝑛𝑡 = 𝐶 𝑑𝑉𝑐𝑎𝑝
𝑑𝑉𝑐𝑎𝑝
𝑑𝑄𝑠
𝐶𝑠 (𝜙𝑠 ) =
Consider an example 𝑑𝜙𝑠
(non physical, for illustration only):
𝑉𝑔
𝐶𝑜𝑥 Linear Cox 𝐶𝑜𝑥 + 𝐶𝑠
𝜙𝑠 𝑑𝑉𝑔 = 𝑑𝜙𝑠
𝐶𝑀𝑂𝑆 𝐶𝑜𝑥
𝐶𝑠 Non-Linear
𝐶𝑜𝑥 𝐶𝑜𝑥 + 𝐶𝑠
𝑑𝜙𝑠 = 𝑑𝑉 𝑚=
𝐶𝑜𝑥 + 𝐶𝑠 𝑔 𝐶𝑜𝑥

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 18
 Capacitive Model
𝑉𝑔 𝑉𝑔

𝐶𝑜𝑥 𝐶𝑜𝑥
𝜙𝑠 𝐶𝑀𝑂𝑆 𝜙𝑠
𝐶𝑀𝑂𝑆
𝐶𝑠 𝐶𝑑𝑒𝑝 𝐶𝑝 𝐶𝑛

1 𝐶𝑠 = 𝐶𝑑𝑒𝑝 + 𝐶𝑝 + 𝐶𝑛
𝐶𝑀𝑂𝑆 =
1 1
+
𝐶𝑜𝑥 𝐶𝑠 Depletion layer
contribution Accumulation Inversion
(h+ contribution) (e- contribution)
𝑑𝑉𝑔 = 𝑚𝑑𝜙𝑠
𝐶𝑠 𝐶𝑝 ∝ 𝑒 −𝐴𝜙𝑠/𝑘𝑇 𝐶𝑑𝑒𝑝 =
𝜀𝑠𝑖
∝
1
𝑚 = 1+ 𝜒𝑑𝑒𝑝 𝜙𝑠 𝐶𝑛 ∝ 𝑒 𝐴𝜙𝑠 /𝑘𝑇
𝐶𝑜𝑥

It is very useful to view the MOS Capacitor as built from two capacitive components in
series: The gate oxide capacitor, and the substrate capacitor The gate capacitor is linear
with a fixed capacitance of Cox . The substrate capacitor is highly non-linear with a
capacitance dependent on band-bending (φs) and can be thought to be comprised of
contributions from the depletion layer, accumulation charge, and inversion charge.
IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 19
 MOS Capacitors – Exact Solution (optional)
It is possible to solve for the behavior
Metal of the MOS capacitor using Poisson’s
equation
SiO2 𝑉𝑔
𝑑2𝜙 𝑄(𝑥)
p-Si = −
𝑑𝑥 2 𝜀𝑠𝑖

𝑑2𝜙 𝑞
= − (𝑝 𝑥 − 𝑛 𝑥 + 𝑁𝑖𝑜𝑛𝑠 (𝑥))
𝑑𝑥 2 𝜀𝑠𝑖
𝜙 0 = 𝜙𝑠
𝜙(𝑥)
𝑞
𝑝 𝑥 = 𝑁𝑎 𝑒 −𝛽𝜙 𝛽= 𝐸𝑐
𝑘𝑇 𝑉𝑔
𝑛𝑖2
𝑛 𝑥 = 𝑒 𝛽𝜙 𝐸𝑣
𝑁𝑎
𝑛𝑖2 +
𝑁𝑖𝑜𝑛𝑠 𝑥 = −𝑁𝑎 + ≈ −𝑁𝑎
𝑁𝑎 𝑥
In the bulk of the material we
want charge neutrality 𝑄 𝜙=0 =0
IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 20
 MOS Capacitors – Exact Solution (optional)

𝑑2𝜙 𝑞
= − (𝑝 𝑥 − 𝑛 𝑥 + 𝑁𝑖𝑜𝑛𝑠 (𝑥)) 𝜙(𝑥)
𝑑𝑥 2 𝜀𝑠𝑖 𝜙 0 = 𝜙𝑠
𝐸𝑐
2
𝑑 𝜙 𝑞 −𝛽𝜙 𝛽𝜙
𝑛𝑖2 𝑛𝑖2
= − (𝑁𝑎 𝑒 − 𝑒 −𝑁𝑎 + ) 𝐸𝑓
𝑑𝑥 2 𝜀𝑠𝑖 𝑁𝑎 𝑁𝑎 𝐸𝑣
2
𝑑2𝜙 𝑞 𝑛𝑖
2
= − (𝑁𝑎 (𝑒 −𝛽𝜙 −1) − (𝑒 𝛽𝜙 − 1))
𝑑𝑥 𝜀𝑠𝑖 𝑁𝑎 𝑥

2
𝑑2𝜙 1 𝑑 𝑑𝜙 𝑑𝜙
= = −𝐸(𝑥) Where E(x) is the electric field
𝑑𝑥 2 2 𝑑𝜙 𝑑𝑥 𝑑𝑥

Integrating and solving for E2(x)

2𝑘𝑇 𝑛𝑖2 𝛽𝜙
𝐸2 𝑥 = 𝑁𝑎 (𝑒 −𝛽𝜙 + 𝛽𝜙) + (𝑒 − 𝛽𝜙) + 𝐶𝑖𝑛𝑡𝑒𝑔𝑟𝑎𝑡𝑖𝑜𝑛
𝜀𝑠𝑖 𝑁𝑎

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 21
 MOS Capacitors – Exact Solution (optional)
𝜙 0 = 𝜙𝑠
2𝑘𝑇 𝑛𝑖2
𝐸2 𝑥 = 𝑁𝑎 (𝑒 −𝛽𝜙 + 𝛽𝜙) + (𝑒 𝛽𝜙 − 𝛽𝜙) + 𝐶𝑖𝑛𝑡
𝜀𝑠𝑖 𝑁𝑎
𝜙(𝑥)
𝐸 𝜙=0 =0 gives Cint 𝐸𝑐
2𝑘𝑇 𝑛𝑖2 𝛽𝜙 𝐸𝑓
𝐸2 𝑥 = 𝑁𝑎 (𝑒 −𝛽𝜙 + 𝛽𝜙 − 1) + (𝑒 − 𝛽𝜙 − 1) 𝐸𝑣
𝜀𝑠𝑖 𝑁𝑎

2𝑘𝑇 𝑛 2 𝑥
𝑖
𝐸 𝑥 =± 𝑁𝑎 (𝑒 −𝛽𝜙 + 𝛽𝜙 − 1) + (𝑒𝛽𝜙 − 𝛽𝜙 − 1)
𝜀𝑠𝑖 𝑁𝑎

Still not solvable, but we can rewrite surface field E(0) in terms of surface band
bending φ(0)= φs , also due to the Gauss’s Law Qcap = -εsi E(0) , giving Q

2
𝑛𝑖
𝑄𝑠 = ± 2𝑘𝑇𝜀𝑠𝑖 𝑁𝑎 (𝑒 −𝛽𝜙𝑠 + 𝛽𝜙𝑠 − 1) + 2 (𝑒𝛽𝜙𝑠 − 𝛽𝜙𝑠 − 1)
𝑁𝑎

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 22
 Q vs Band Bending (Optional)

Depletion

Accumulation Inversion

IITB – Dept. of EE
2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 23
 MOS Capacitors – Exact Solution (optional)
𝜙 0 = 𝜙𝑠

2
𝑛𝑖 𝜙(𝑥)
𝑄𝑠 = ± 2𝑘𝑇𝜀𝑠𝑖 𝑁𝑎 (𝑒 −𝛽𝜙𝑠 + 𝛽𝜙𝑠 − 1) + 2 (𝑒𝛽𝜙𝑠 − 𝛽𝜙𝑠 − 1)
𝑁𝑎 𝐸𝑐

Accumulation Inversion 𝐸𝑓
𝐸𝑣
Depletion
The boundaries between different regions can be
easily obtained:
𝜙𝑠 < 0 Accumulation
𝑛𝑖2 𝛽𝜙 𝑛𝑖2 𝛽𝜙
𝜙𝑠 > 0 Depletion until 2𝑒
𝑠 becomes significant or 2𝑒
𝑠 = 1
𝑁𝑎 𝑁𝑎
From Slide 9:
𝑛𝑖 𝑛𝑖2
𝑁 𝑎 = 𝑝 = 𝑛𝑖 𝑒 𝛽𝜙𝑏 = 𝑒 −𝛽𝜙𝑏 2 =𝑒
−𝛽2𝜙𝑏 𝜙𝑠 = 2𝜙𝑏
𝑁𝑎 𝑁𝑎
𝜙𝑠 > 2𝜙𝑏 Inversion

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 MOS Capacitors – Exact Solution (optional)
𝑉𝑔
Metal
𝐶𝑜𝑥
𝐶𝑀𝑂𝑆 𝜙𝑠 SiO2 𝑉𝑔
𝐶𝑠 𝜒𝑑𝑒𝑝
p-Si

2
𝑑𝑄𝑠 𝑛𝑖
𝐶𝑠 = 𝑄𝑠 = ± 2𝑘𝑇𝜀𝑠𝑖 𝑁𝑎 (𝑒 −𝛽𝜙𝑠 + 𝛽𝜙𝑠 − 1) + 2 (𝑒𝛽𝜙𝑠 − 𝛽𝜙𝑠 − 1)
𝑑𝜙𝑠 𝑁𝑎

𝑞𝛽𝜀𝑠𝑖 𝑁𝑎 −𝛽𝜙𝑠
𝑛𝑖2 𝛽𝜙 𝑛𝑖
2
𝐶𝑠 = (−𝑒 + 1) + 2 (𝑒 𝑠 − 1) / (𝑒 −𝛽𝜙𝑠 + 𝛽𝜙𝑠 − 1) + 2 (𝑒𝛽𝜙𝑠 − 𝛽𝜙𝑠 − 1)
2 𝑁𝑎 𝑁𝑎

Accumulation 𝐶𝑝
Depletion 𝐶𝑑𝑒𝑝
Inversion 𝐶𝑛

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 MOS Capacitors – Exact Solution (optional)
𝑛𝑖2 𝛽𝜙
Case 1: Cs at Vg=Vt (LF) 𝜙𝑠 = 2𝜙𝑏 2𝑒
𝑠 = 1
𝑁𝑎

𝑞𝛽𝜀𝑠𝑖 𝑁𝑎 −𝛽𝜙𝑠
𝑛𝑖2 𝛽𝜙 𝑛𝑖
2
𝐶𝑠 = (−𝑒 + 1) + 2 (𝑒 𝑠 − 1) / (𝑒 −𝛽𝜙𝑠 + 𝛽𝜙𝑠 − 1) + 2 (𝑒𝛽𝜙𝑠 − 𝛽𝜙𝑠 − 1)
2 𝑁𝑎 𝑁𝑎

~0 1 ~0 ~0 1 0 0
𝑞𝛽𝜀𝑠𝑖 𝑁𝑎
𝐶𝑠 = 2 / 2𝛽𝜙𝑏
2

𝑞𝜀𝑠𝑖 𝑁𝑎 𝜀𝑠𝑖
𝐶𝑠 = 𝜒𝑑𝑒𝑝 = 4𝜀𝑠𝑖 𝜙𝑏 /𝑞𝑁𝑎 𝐶𝑠 = 2
𝜙𝑏 𝜒𝑑𝑒𝑝

𝑛𝑖2 𝛽𝜙
Case 2: Cs at Vt (HF) 𝜙𝑠 = 2𝜙𝑏 2𝑒
𝑠 = 0
NOTE: This case
𝑁𝑎
is relevant through
𝑞𝛽𝜀𝑠𝑖 𝑁𝑎 𝑞𝛽𝜀𝑠𝑖 𝑁𝑎 out the depletion
2 2 𝑞𝜀𝑠𝑖 𝑁𝑎 𝜀𝑠𝑖 regime, as there
𝐶𝑠 = 𝐶𝑠 ≈ = =
2𝛽𝜙𝑏 − 1 2𝛽𝜙𝑏 4𝜙𝑏 𝜒𝑑𝑒𝑝 are no electrons

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2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 26
 MOS Capacitors – Exact Solution (optional)

Case 3: Cs at Vg=Vfb

𝜀𝑠𝑖 𝜀𝑠𝑖
𝐶𝑠 = = Debye length (Ld) in Silicon is given by 𝜀𝑠𝑖 𝑘𝑇/𝑞 2 𝑁𝑎
𝜀𝑠𝑖 /𝑞𝛽𝑁𝑎 𝐿𝑑

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2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 27
 MOS Capacitors – Exact Solution (optional)

• Remember that capacitance is

fundamentally the measure of how
quickly charge grows with an
increase in potential
• So as Vg or surface potential
increases we change the total charge
on the MOS cap
– Cmos is the charge response to Vg
– Cs is the charge response to surface
potential
• Furthermore Cs is a non linear
capacitor that has component
contributions for accumulation
charge, depletion charge, and
inversion charge that measure of
how quickly each component
responds to surface potential

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2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 28
 MOS Capacitors – Exact Solution (optional)

𝑉𝑔 (𝑉)

• A typical ideal CV curve showing Low Frequency (LF), High

Frequency (FH) and Deep Depletion (DD) behavior
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2012 Short Course Jakub Kedzierski, Indian Institute of Technology Bombay 29