Ece

College vision mission
SDMCET- Vision
To be a school of Dynamic Mindset focusing on Research, Innovation &
Development and emerge as Central hub of Engineering Talents.
SDMCET –Mission
 Committed towards continuous improvement in teaching & learning.
Research in engineering and technology.
 Encouraging intellectual, quality, ethical and creative pursuits amongst

teaching and students fraternity.
---------------------------------------------------------------------------------------------------------
Department of Electronics & Communication Engineering

VISION:
Fostering excellence in the field of Electronics & Communication

Engineering showcasing Innovation, Research and Performance with Continuous
Industry – Institute Interaction with the blend of Human Values.
MISSION:
 To provide quality education in the domain of Electronics & Communication

Engineering through state-of-the art curriculum, effective teaching learning
process and best of breed laboratory facilities.
 To encourage innovation, research attitude and team work among students.
 Interact and work closely with industries and research organization to
accomplish knowledge at par.
 To train the students for attaining leadership in developing and applying
technology for the betterment of society and sustaining the global
environment.
Programme Educational Objectives
I. To provide to the students with latest in depth knowledge in the field
of Electronics and Communication Engineering with Mathematical
applications.
II. To develop the confidence for independent working and/ or sprit to
work cohesively with group.
III. To mould the students to be readily accepted by the industry
globally.
IV. To inculcate design skills, fault diagnosis skills, communication skills
and create research orientation.
V. To imbibe professional and social ethics and to bring awareness
regarding societal responsibility, moral and safety related issues.
Program Outcomes
Engineering Graduates will be able to:
1. Engineering knowledge: Apply the knowledge of mathematics, science,
engineering fundamentals, and an engineering specialization to the
solution of complex engineering problems.
2. Problem analysis: Identify, formulate, review research literature, and
analyze complex engineering problems reaching substantiated conclusions
using first principles of mathematics, natural sciences, and engineering
sciences.
3. Design/development of solutions: Design solutions for complex
engineering problems and design system components or processes that
meet the specified needs with appropriate consideration for the public
health and safety, and the cultural, societal, and environmental
considerations.
4. Conduct investigations of complex problems: Use research-based
knowledge and research methods including design of experiments,
analysis and interpretation of data, and synthesis of the information to
provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques,
resources, and modern engineering and IT tools including prediction and
modeling to complex engineering activities with an understanding of the
limitations.
6. The engineer and society: Apply reasoning informed by the contextual
knowledge to assess societal, health, safety, legal and cultural issues and
the consequent responsibilities relevant to the professional engineering
practice.
7. Environment and sustainability: Understand the impact of the professional
engineering solutions in societal and environmental contexts, and
demonstrate the knowledge of, and need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and
responsibilities and norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a
member or leader in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering
activities with the engineering community and with society at large, such
as, being able to comprehend and write effective reports and design
documentation, make effective presentations, and give and receive clear
instructions.
11. Project management and finance: Demonstrate knowledge and
understanding of the engineering and management principles and apply
these to one‟s own work, as a member and leader in a team, to manage
projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and
ability to engage in independent and life-long learning in the broadest
context of technological change.
PROGRAM SPECIFIC OUTCOMES (PSOs)

13. Design economically and technically sound analog and / or digital systems
based on the principles of signal processing, VLSI and communication
Engineering (PO-13)
14. Integrate hardware –software, and apply programming practices to realize
the solutions in electronics domain. (PO-14)
Scheme for V Semester B. E. (E&CE)
Teaching Examination
Course Course L-T- CIE Theory (SEE) Practical (SEE)
Cre
Code Title P(Hrs/W Max. *Max. Duration Max. Duration
dits
eek) Marks Marks in hours Marks In hours
Information
15UECC500 Theory & 4-0-0 4 50 100 03 - -
Coding
Digital Signal
15UECC501 4-0-0 4 50 100 03 - -
Processing
Digital
15UECC502 4-0-0 4 50 100 03 - -
Communication
CMOS VLSI
15UECC503 4-0-0 4 50 100 03 - -
Design
Microcontroller
15UECL504 & VLSI 0-0-2 1 50 - - 50 03
Laboratory
DSP
15UECL505 0-0-2 1 50 - - 50 03
Laboratory
15UECE51X Elective –I 4-0-0 3 50 100 03 - -
15UECE52X Elective -II 4-0-0 3 50 100 03 - -
Total 24-0-4 24 400 600 100
Elective –I
Object
Oriented
15UECE510 4-0-0 3 50 100 03 - -
Programming
using C++
Advanced
15UECE511 Digital System 4-0-0 3 50 100 03 - -
Design
Digital
15UECE512 Switching 4-0-0 3 50 100 03 - -
Systems
Speech
15UECE513 4-0-0 3 50 100 03 - -
Processing
Elective –II
15UECE520 System Verilog 4-0-0 3 50 100 03 - -
Operating
15UECE521 4-0-0 3 50 100 03 - -
System
Digital Signal
15UECE522 4-0-0 3 50 100 03 - -
Compression
IC Fabrication
15UECE523 4-0-0 3 50 100 03 - -
Technology
CIE: Continuous Internal Evaluation SEE: Semester End Examination
L: Lecture T: Tutorials P: Practical S: Self-study
*SEE for theory courses is conducted for 100 marks and reduced to 50 marks
Scheme for VI-Semester B. E. (E&CE)
Teaching Examination
L-T-P- CIE Theory (SEE) Practical (SEE)
Course Cr
Course Title S
Code edi Max.Ma *Max. Duration Max. Duration
(Hrs/
ts rks Marks in hours Marks In hours
Week)
Management,
Entrepreneurship
15UECC600 4-0-0 4 50 100 03
and Intellectual
Property Rights
15UECC601 ARM Processor 4-0-0 4 50 100 03 - -
Analog & Mixed
15UECC602 Mode VLSI 4-0-0 4 50 100 03 - -
Design
Microwave &
15UECC603 Radar 4-0-0 4 50 100 03 - -
Engineering
ARM Processor
15UECL604 0-0-2 1 50 - - 50 03
Laboratory
15UECL605 Mini project 0-0-8 4 50 - - 50 03
15UECE63X Elective –III 4-0-0 3 50 100 03 - -
15UECE64X Elective –IV 4-0-0 3 50 100 03 - -
Total 24-0-10 27 400 600 100
Elective -III
15UECE630 DSP Architecture 4-0-0 3 50 100 03
Cryptography &
15UECE632 4-0-0 3 50 100 03
Network Security
VLSI & DSP
15UECE633 4-0-0 3 50 100 03
Systems
15UECE634 Fuzzy Logic 4-0-0 3 50 100 03
Elective -IV
Wireless Sensor
15UECE640 4-0-0 3 50 100 03
Networks
Data structures
15UECE641 4-0-0 3 50 100 03
using C++
Digital Image
15UECE642 4-0-0 3 50 100 03
Processing
Artificial Neural
15UECE643 4-0-0 3 50 100 03
Networks
CIE: Continuous Internal Evaluation SEE: Semester End Examination
L: Lecture T: Tutorials P: Practical S: Self-study
*SEE for theory courses is conducted for 100 marks and reduced to 50 marks.
15UECC500 Information Theory and Coding (4-0-0) 4 : 52 Hrs.
Course Learning Objectives: Information theory & coding is a core theory course at
undergraduate V semester level. Students will learn the basic concepts of information
theory and coding, including information theory, source coding, channel model, channel
capacity, channel coding. The main purpose of this course is to introduce students to the
wireless communication system.
Course outcomes :
CO Upon completion of the course, Mapping to POs (1,12) / PSOs (13,14)
the student will be able to Level 3 Level 2 Level 1
Substantial Moderate Slight
CO-1 Demonstrate and Explain the basic
concepts of information theory,
source coding, channel and channel 1,2
capacity, channel coding and
relation among them.
CO-2 Describe the real life applications
1,2
based on the fundamental theory.
CO-3 Calculate entropy, channel capacity,
1,2 4
efficiency and redundancy.
CO-4 Explain different error control
1,2 13
algorithms.
CO-5 Design the encoder and decoder
circuit of linear block code, binary 3,13 9,10,14
cyclic code, and convolution code.
CO-6 Compare and validate various error
3,13
control codes.
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
Levels 2 2 3 1 - - - - 1 1 - - 2.3 1
1- Introductory (Slight) 2 - Reinforce (Moderate) 3- Mastering (Substantial)
Pre-requisites:
 Digital circuit design, Probability theory and algebra and Digital communication
Course Contents :
Chapter Chapter contents No of
No Hrs.
1 Entropy: Introduction, Measure of information, Entropy of a 06
zero memory source, Logarithmic inequalities, Properties of
Entropy, External property, Information rate, Extension of a
zero memory source.
2 Markov sources: Average information content of symbols 10
in long dependent (With memory) sequences. Markov
statistical model for information sources, Entropy and
information rate of Markov sources, Communication
Channels, Discrete communication channels: Rate of
information transmission over a discrete channel, Capacity
of a discrete memory less channels, continuous channels:
Shannon-Hartley law and its implications. Mutual
information.
3 Source encoding: Definition of codes, Basic properties of 10
codes, Construction of instantaneous codes: Kraft
inequality, McMillan‟s Inequality, code efficiency and
redundancy, Shannon‟s noiseless coding theorem,
construction of some basic codes: Shannon binary coding,
Shannon-Fano coding, Huffman coding.
4 Error Control Coding: Types of errors, types of codes, 07
Linear Block Codes: Matrix description of linear block
codes. Error detecting and correcting capabilities of linear
block codes, Lookup table decoding using standard array,
Single error correcting hamming codes.
5 Binary Cyclic Codes: Algebraic structures of cyclic codes, 07
Encoding using an (n-k) bit shift register, Syndrome
calculation, Error detection and error correction, BCH
codes, RS codes, Golay codes, Shortened cyclic codes,
Burst error correcting codes, Cyclic Redundancy Check
(CRC) Codes.
6 Convolution Codes: Encoding of convolution codes: Time 12
domain approach and transform domain approach,
systematic convolution codes, state diagrams, tree and
trellis diagrams. Decoding of convolution codes: Viterbi
algorithm, sequential decoding: Stack algorithm.
Activity beyond Syllabus:

 Assignments: Design of different source coding and channel coding algorithms by
using MATLAB, Verilog and C programs.
Reference Books:
1) K. Sam Shanmugam, “Digital and analog communication systems”, John
Wiley, 2005.
2) Simon Haykin, “Digital communication”, John Wiley, 2003.
3) Ranjan Bose, “Information Theory, Coding and Cryptography”, Tata
McGraw-Hill Publication, 2002.
4) Satyanarayana P.S. “Concepts of Information Theory & coding”, Dynaram
Publications, 2005
5) Andrew S Tanenbaum, “Computer Networks”, PHI, 3/e, 2001.
15UECC501 Digital Signal Processing (4-0-0) 4 : 52 Hrs.

Course Learning Objectives:
Digital Signal Processing is a core course at undergraduate V semester level.
Knowledge of Signals and Systems and Engineering Mathematics are required as
prerequisites. The course focuses on examples of transforms, design of analog and
digital filter using various methods, hardware structure for implementation of digital
filters and certain optimization techniques of signal processing.
Course outcomes:
CO Upon completion of the Mapping to POs (1,12) / PSOs (13,14)

course, the student will Level 3 Level 2 Level 1
be able to Substantial Moderate Slight
CO-1 Compute transforms and
inverse transforms of a 1, 2
signal
CO-2 Apply properties of
transforms to solve signal 1, 2
processing problems
CO-3 Optimize the computation
2, 3 12 13
of transforms
CO-4 Design analog filters to
satisfy the given 2, 3 12 13
specifications
CO-5 Design digital filters to
satisfy the given 2, 3 12 13
specifications
CO-6 Realize hardware structure
3 12
for digital filters
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
3.0 3.0 3.0 ----- ----- ----- ----- ----- ----- ---- ------ 1.75 1.0 -----
levels
Pre-requisites: Signals and Systems and Engineering Mathematics
Course Contents:
No. Hrs.
1 Discrete Fourier Transforms (DFT): Introduction to Digital 08
Signal Processing, Frequency domain sampling and
reconstruction of discrete time signals, The Discrete Fourier
Transform, Matrix Relations, Properties of DFT, Linear
Filtering Methods based on the DFT, Frequency analysis of
signals using DFT.
2 Efficient Computation of the DFT: Radix-2 FFT algorithms 08
for the computation of DFT and IDFT: Decimation-In-Time
(DIT) and Decimation-In-Frequency (DIF) algorithms,
Comparison of direct computation and FFT computation of
DFT, Applications of FFT algorithms.
3 Pole-Zero Placement Method for Design of Simple 06
Filters: Ideal filter characteristics, Simple IIR & FIR digital
filters, Notch filters, Comb filters, All pass filters, Digital
Resonators, Digital Sinusoidal Oscillators.
4 Design of Analog IIR Filters: General considerations: 08
Causality and Its Implications, Characteristics of Practical
Frequency-Selective Filters, Characteristics of commonly
used analog filters: Butterworth and Chebyshev type - I,
Design of analog filters, frequency transformations in analog
domain.
5 Design of Digital IIR Filters: IIR filter design by 08
Approximation of Derivatives, Impulse Invariance and
Bilinear Transformation, frequency transformations in digital
domain (LPF, HPF only).
6 Design of Digital FIR filters: Symmetric and Antisymmetric 07
FIR filters, Design of Linear phase FIR filters using windows
method and frequency sampling method, Design of FIR
Differentiators, Design of Hilbert Transformers.
7 Implementation of Discrete-Time Systems: Structures for 07
IIR systems: Direct-Form, Cascade-Form, Parallel-Form,
Structures for FIR systems: Direct-Form, Cascade-Form,
Linear phase realization.
Activity beyond Syllabus: Simulation of signal processing tasks using MATLAB.
Reference Books:
1) Proakis & Monalakis, “Digital Signal Processing: Principles, Algorithms &
Applications”, 4/e, Pearson Education, New Delhi, 2007.
2) Sanjit K. Mitra, “Digital Signal Processing”, 2/e Tata Mc-Graw Hill, 2004.
3) Li Tan, “Digital Signal Processing Fundamentals and Applications”, Elsevier,
2003.
4) Emmanuel C. Ifeachor, Barrie W. Jervis, “Digital Signal Processing: A Practical
Approach”, 2/e, Pearson Education
15UECC502 Digital Communication (4-0-0) 4 : 52 Hrs.
Course Learning Objectives: Digital Communication is a core theory course at

undergraduate V semester level. Knowledge of analog communication and signals and
systems are required as prerequisites. The course focuses on the mathematical model,
generation and detection of various digital modulation techniques and comparative
study of these techniques.
Course outcomes:
CO Upon completion of the course, the Mapping to POs (1,12) / PSOs
student will be able to (13,14)
Level 3 Level 2 Level 1
CO-1 Identify and describe generation and
detection of various digital modulation 1, 2, 3
and detection techniques.
CO-2 Develop mathematical models for
1, 2 3
these modulation techniques.
CO-3 Distinguish these modulation
techniques and make a comparative 1 2 13
study.
CO-4 Compute performance measures of
1 2
these modulation techniques.
CO-5 Analyse the effect of channel on signal
1, 2
transmission
CO-6 Study of secured data transmission. 1 2 13
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
3.0 2.5 2.5 1
levels
Pre-requisites:
 Analog Communication and Signals and Systems
Course Contents:
No. Hrs.
1 Introduction: Sources & Signals, Basic Signal Processing, 4
Model of a digital communication system, Channels for Digital
Communication.
2 Sampling Process: Sampling Theorem, Quadrature sampling of 10
band pass signals, reconstruction of a message process from its
samples, signal distortion in sampling, practical aspects of
sampling and signal recovery, PAM, TDM.
3 Waveform Coding Techniques: Pulse Code Modulation, 10
quantization noise and signal to noise ratio, robust quantization,
DPCM, DM, coding speech at low bit rates, applications.
4 Base-Band Shaping for Data Transmission: Discrete PAM 8
signals, power spectra of discrete PAM signals. Inter-symbol
Interference, Nyquist criterion for distortion less base-band binary
transmission, correlative coding, eye pattern, base-band M-arry
PAM systems, adaptive equalization for data transmission.
5 Digital Modulation Techniques: Gram-Schmidt 14
Orthogonalization Procedure, Geometric Interpretation of Signals
Digital Modulation formats, Coherent binary modulation
techniques, Coherent quadrature modulation techniques, Non-
coherent binary modulation techniques, Comparison of Binary
and Quaternary Modulation techniques, M-Ary Modulation
Techniques, Power Spectra, Bandwidth efficiency.
6 Spread Spectrum Modulation: Pseudo noise sequences, A 6
notion of spread spectrum, direct sequence spread coherent
binary PSK, signal space dimensionality and processing gain,
probability of error, frequency hop spread spectrum,
applications.
Activity beyond Syllabus: Simulation of various modulation techniques using

MATLAB
Reference Books:
1) Simon Haykin, “Digital Communications”, John Wiley, 2004.
2) K. Sam Shanmugam, “Analog and Digital Communication Systems”, John Wiley,
2005.
3) Simon Haykin, “An Introduction to Analog and Digital Communication”, John Wiley,
2005.
15UECC503 CMOS VLSI Design (4-0-0) 4 : 52 Hrs.
Course Learning Objectives: CMOS VLSI Design is a core theory course at V

semester undergraduate level. The course focuses on the theory, fabrication and
design principles of CMOS devices and circuits. The course concentrates on the
study and analysis of various combinational and sequential MOS logic circuits for
digital VLSI applications.
Course outcomes:
CO Upon the completion of the Mapping to POs (1-12) / PSOs
course, the student will be able (13,14)
to Level 3 Level 2 Level 1
CO-1 Explain the theory, construction 13 1,2 12
and the characteristics of MOS
structures.
CO-2 Demonstrate and Describe the
steps and processes involved in - - 1, 2, 4
the VLSI fabrication technology.
CO-3 Classify and Define the various
rules involved in the schematic
5, 9, 13 1,2 -
and layout design of digital VLSI
circuits.
CO-4 Discuss the basic circuits
concepts involved in the design of 1 - 2
CMOS circuits.
CO-5 Perform a comparative study of
different CMOS circuits with 2, 13 4 1, 5, 9
respect to different technologies.
CO-6 Identify and describe the
challenges involved in digital
13 12 2,4
CMOS VLSI design.
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2 1.3 - 1.3 2 2 1.5 3
Levels
Pre-requisites: Analog Electronics, Network Analysis and Digital Circuits.

Course Contents:
Chapter Chapter Contents No of
No Hrs.
1 MOS Transistor: The Metal Oxide Semiconductor (MOS) 10
Structure, The MOS System under External Bias,
Structure and Operation of MOS Transistor, MOSFET
Current-Voltage Characteristics, MOSFET Scaling and
Small-Geometry Effects. MOS Inverters: Static
Characteristics: Introduction, Resistive-Load Inverter,
Inverters with n-Type MOSFET Load, CMOS Inverter.
MOS Inverters: Switching Characteristics and
Interconnect Effects.
2 Fabrication Technology: Introduction, Czochralski 6
growth process, Fabrication processes: Thermal
oxidation, Diffusion, Ion implantation, Photo lithography,
Epitaxy, metallization and interconnections, Ohmic and
Schottky contacts, fabrication of resistors and capacitors.
3 Basic CMOS Technology: Basic CMOS technology: P- 10
Well / N-Well / Twin Well process, MOS mask layer, Stick
diagrams, Lambda based design rules, Schematic and
Layouts, scaling of MOS circuits.
4 Basic Circuit Concepts: Sheet resistance, standard unit 6
capacitance, concepts delay unit time, Inverter delays,
driving capacitive loads, Propagation delays, PVT
analysis and Process corners.
5 Combinational MOS Logic Circuits & Sequential MOS 12
Logic Circuits: Introduction, MOS logic circuits with
depletion nMOS loads, CMOS logic circuits, complex logic
circuits, CMOS Transmission gate, Introduction to
sequential MOS logic circuits, Behavior of bistable
elements, SR latch circuit, clocked latch and flip flop
circuits.
6 Dynamic logic Circuits: Introduction, Basic principles of 8
pass transistor circuits, voltage bootstrapping,
synchronous dynamic circuit techniques, dynamic CMOS
circuit techniques, high performance dynamic CMOS
circuits, Semiconductor Memories.
Activity Beyond Syllabus:

 Mini Projects using Cadence Tool and Device Building Tutorials.
Reference Books:
1) Sung Mo Kang & Yusuf Leblebici, “CMOS Digital Integrated Circuits: Analysis
and Design”, 3/e, McGraw-Hill, 2008.
2) Kanaan Kano, “Semiconductor Devices”, 3/e,Pearson education, 2004.
3) Douglas A Pucknell& Kamran Eshragian, “Basic VLSI Design”, 3/e, PHI, 2005.
15UECL504 Microcontroller & VLSI Laboratory (0-0-2) 1 : 36 Hrs.
Course Learning Objectives: Microcontroller & VLSI laboratory is for V semester

level. Microcontroller part of laboratory requires a thorough understanding of Digital
Circuits and Programming skills. The course mainly focuses on assembly level
language programs and interfacing programs to interface different hardware
components. VLSI part of laboratory focuses on the design, verification and
performance aspects of various CMOS digital circuits in terms of schematic and
layouts followed by simulations using Cadence.
Course outcomes:
course, the student will be able to (13,14)
CO-1 Apply the knowledge of the
instruction set of 8051 to develop 1, 2, 3 5,14 12
programs for various purposes.
CO-2 Program the 8051 microcontroller
at the Hardware level and observe 3, 5, 14 9 11, 12
the results using Kit.
CO-3 Interface different peripherals (I/O
s) and design simple 3, 5, 14 6, 9 11, 12
microcontroller based systems.
CO-4 Demonstrate the working of digital
circuits and apply the design steps
13 1, 5 -
of VLSI flow to build the schematic
and layouts of basic digital circuits.
CO-5 Analyze and perform the DC and
transient analysis of VLSI digital - 1, 5 2
circuits.
CO-6 Compare and evaluate the
13 10 14, 1, 4
performance of digital circuits.
POs→ 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2 2 3 1 2.4 2 - - 2 2 1 1 3 2.25
Level
Pre-requisites:
 Analog Electronic Circuits, Digital circuits, Concepts of Programming 8051 and
Basics of CMOS VLSI design.
Microcontroller Experiments:
1)Control and conditional loops based programs: sorting, Finding largest element in
an array.
2)Subroutines: Conditional CALL & RETURN.
3)Code conversion: BCD – ASCII; ASCII – Decimal; Decimal - ASCII; HEX – Decimal
and Decimal – HEX.
4)Generate different waveforms Sine, Square, Triangular, and Ramp using DAC
interface to 8051 Microcontroller; change the frequency and amplitude.
5)Stepper Motor control interface to 8051 Microcontroller.
6)Alphanumeric LCD panel interface to 8051 Microcontroller.
VLSI Experiments: Draw the Schematic and Layout for the following logic circuits
mentioned below. Perform DC, Transient, Parametric analysis, Verify the Design Rule
Check and Layout versus Schematic (LVS) check.
1) Inverter, Buffer, Transmission gate, Basic / Universal gates.

2) Flip-Flops: RS, D, JK, Master slave RS, D and JK.
3) Serial / Parallel adder.
4) Johnson / Ring counter.
5) Design Multiplexer, Demultiplexer.
6) A single stage Differential amplifier.
15UECL505 DSP Laboratory (0-0-2) 1 : 36 Hrs.
Course Learning Objectives: DSP Laboratory is a lab course at undergraduate

V semester level. Program development in MATLAB environment for the purpose
of signal processing learnt in theory course will be covered.
Course outcomes :
course, the student will be able (13,14)
to Level 3 Level 2 Level 1
CO-1 Compute N point DFT and its
1
inverse.
CO-2 Apply properties of DFT to solve
1,2
signal processing problems.
CO-3 Frequency analysis of signal
1,2
using DFT.
CO-4 Optimize the computation of DFT. 2 1
CO-5 Design filters for the given
3 1
specifications.
CO-6 Solve signal processing problems
1,2
using DSP processor.
POs→ 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping Level 2.2 2.5 3 - - - - - - - - - - -
Pre-requisites:
 Digital Signal Processing
DSP Experiments:
1) Response of LTI system to different inputs.
2) Compute N point DFT and IDFT with and without using built-in functions.
3) Efficient computation of 2N point DFT using N point DFT, DFT of two N point
sequences using single N point DFT.
4) Apply properties of N point DFT to solve signal processing problems.
5) Apply DFT for frequency analysis of signal.
6) Design analog filters to satisfy the given specifications.
7) Design digital filters to satisfy the given specifications.
8) Experiments using DSP processor.
ELECTIVE –I
15UECE510 Object Oriented Programming using C++ (4-0-0) 3: 52 Hrs
Course Learning Objectives: Oriented Programming using C++ is an elective theory course
at undergraduate V semester level. Knowledge of programming in C is required as a
prerequisite. The course focuses on features of Object Oriented Programming language with
C++ as an example. Each aspect will be explained with the help of suitable applications.
Course outcomes:
course, the student will be able to (13,14)
CO-1 Describe various features of Object
Oriented Programming, objects and
classes, Control statements,
operator overloading, inline 5,12 1, 9 2,3,14
functions with respect to C++
language, structures. Compare C++
with C.
CO-2 Construct elementary C++
programs with C++ arithmetic,
increment, decrement, assignment, 1,2,5,14 9,12
relational, equality and logical
operators.
CO-3 Compare and Contrast between
standard library functions and user 9,14 5,12
defined functions
CO-4 Apply the concepts of objects,
classes, polymorphism and
5,12 9,14 4
inheritance to Build real time
problem statements.
CO-5 Demonstrate and apply virtual
function and overloading concepts 5,12 9,14 4
to real life problems statements.
CO-6 Modeling real time problem
statements using pointers to
5,12 9,14
functions and pointer to structure,
pointers to objects.
1- Introductory (Slight)2 - Reinforce (Moderate) 3- Mastering (Substantial)

PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2.5 2 1 1 2.7 1.7 2.5 2
levels
Pre-requisites: C programming language.
Course Contents:
No Hrs.
1 Introduction: Object Oriented Programming Characteristics of 6
Object Oriented Programming languages, C++ and C, Basic
Program Construction, Output using cout, Directives,
Comments, Integer and character variables, Input with cin,
Floating Point Types, Type Bool, setw manipulator, Type
conversion, Arithmetic Operators, Library Functions.
Loops and Decisions: Relational Operators, loops, decisions,
Logical Operator, Precedence summary, Control Statements,
Structures, Enumerations.
2 Functions: Passing Arguments to Functions, Returning Values 8
from Functions, Reference Arguments, Overloaded Functions,
Inline Functions, Default Arguments. Function templates,
Pointers: Addresses and pointers, the address-of operator &,
Pointers and functions, new and delete operators.
3 Objects and Classes: A simple Class, C++ Objects as 9
Physical Objects, C++ Objects as Data Types, Constructors,
and Objects as Function Argument, default copy Constructor,
Returning Objects from Functions, Structures and class.
Pointers to objects.
4 Arrays and Strings: Array Fundamentals, Function 9
Declaration with Array Arguments, Arrays as Class Member
Data, Arrays of Objects. C- Strings, The standard C++ string
class, pointers and arrays, Pointers and c-type strings.
5 Operator Overloading: Overloading Unary Operators, 4
Overloading Binary operators.
6 Inheritance: Derived Class and Base class, Derived class 8
Constructors, Overriding Member Functions, Public and Private
Inheritance. Friend functions, Friend classes.
7 Virtual Functions and Polymorphism: Virtual Functions, The 8
Virtual Attribute Is Inherited, Virtual Functions Are Hierarchical,
Pure Virtual Functions.
Activity beyond Syllabus: Hobby Projects and Case study
Reference Books:
1) R. Lafore, “Object Oriented Programming using C++”, Galgotia Publications, 2004.
2) Herbert Schildt, “C++: The Complete Reference”, fourth edition, McGraw Hill OSBORNE
publications.
3) K R Venugopal, Rajkumar, T Ravishankar, “Mastering C++”, Second Edition, Tata
McGraw Hill Publishing Company Limited, New-Delhi.
4) S. B. Lippman& J. Lajoie,“C++ Primer”, 3/e, Addison Wesley, 2000.
15UECE511 Advanced Digital System Design (4-0-0) 3 : 52 Hrs.
Course Learning Objectives: Advanced Digital System Design is an elective

theory course at undergraduate V semester level. Knowledge of digital circuits
design is required as a prerequisite. The course focuses on implementation of
digital circuits on programmable devices of varied complexity.
Course outcomes:
CO Upon completion Mapping to POs (1,12) / PSOs (13,14)
of the course, the Level 3 Level 2 Level 1
student will be able Substantial Moderate Slight
to
Demonstrate the
CO-1 concepts of digital 4,14 2 1
circuits
Design of
programmable logic
CO-2 devices and arithmetic 2,3,14 1
operations with
examples
CO-3 Analyze the
sequential circuits 3,13,14 5 1
using SM charts
CO-4 Interpret the floating
point number system
3,4,13 2 1
for arithmetic
operations
CO-5 Compare different
CPLD &FPGA 4,14 5 1
architectures
CO-6 Evaluate digital
circuits using
4,14 2 1
hardware testing
techniques
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping levels 1.16 2.25 3 3 2 - - - - - -- - 3 3
Pre-requisites: Digital circuits &. Basic Electronics
Course Contents:
No. Hrs.
1 Review of Logic Design Fundamentals: Combinational 4
and Sequential Circuits, Boolean Algebra and
Algebraic Simplification, Karnaugh Maps, Universal
Gates, Hazards in Combinational Circuits,Flip-Flops and
Latches, Fundamentals of Moore and Mealy Sequential
Networks, Timings, Set-up and Hold Times, Synchronous
Designs, Tristate Logic and Busses.
2 Designing with Programmable Logic Devices: Read 9

Only Memories, Programmable Logic Arrays (PLAs),
Programmable Array Logic (PALs), other sequential
Programmable Logic Devices(PLD), Design of Traffic
Light Controller, Key Pad Scanner Design.
3 Design of Networks for Arithmetic Operations: Design 9

of Serial Adder with Accumulator,State Graphs for Control
Networks, Design of Binary Multiplier, Multiplication of
Signed Binary Numbers, Design of Unsigned Binary
Divider.
4 Digital Design with SM Charts & Floating Point 8
Arithmetic: State machine charts, Derivation of SM
charts, Realization of SM charts, Implementation of the
Dice Game, Alternative Realization for SM charts using
Microprogramming, Linked State Machines.
5 Floating Point Arithmetic: Representation of Floating 7

Point Numbers using IEEE 754 Standard, Floating-Point
Multiplication, other Floating Point Operations.
6 Designing with Programmable gate arrays and 8

complex Programmable logic devices: Xlinix 3000
Series FPGAs, Designing with FPGAs, Xlinix 4000 Series
FPGAs, using a One-Hot State Assignment, Altera
Complex Programmable Logic Devices(CPLDs), Altera
FLEX 10KSeries CPLDs.
7 Hardware Testing and Design for Testability: Testing 7

Combinational Logic, Testing Sequential Logic, Scan
Testing, Boundary Scan, Built-In-Self-Test.

 Design of 4-bit or 8-bit Processor using freeware or licensed tool.
Reference Books:
1) Charles H. Roth. Jr, “Digital Systems Design using VHDL”, Thomson Learning,
Inc, 9threprint, 2006.
2) Stephen Brown &ZvonkoVranesic, “Fundamentals of digital logic design with
VHDL”,Tata McGraw-Hill, New Delhi, 2/e, 2007.
3) Mark Zwolinski, “Digital System design with VHDL”, 2/e, Pearson Education,
2004.
4) Volnei A Pedroni, “Digital Electronics and design with VHDL”, Elsevier
Science, 2009.
5) Samir Palnitkar,“Verilog HDL - A Guide to Digital Design and Synthesis”, Sun
Micro Systems Press, 2/e, PHI, 2003
15UECE512 Digital Switching Systems (4-0-0) 3 :52 Hrs.

A digital Switching system is an elective theory course at undergraduate V semester
level. Knowledge of Digital circuits and Analog Communication is required as a
prerequisite. The course focuses on various switching techniques, parameters that
affect the quality, performance measures of switching system, characterization and
modeling of switching system.
Course outcomes:

CO-1 Describe the evolution and history of

telecommunication and Explain
1 13
basics of various switching systems
and telecommunication networks.
CO-2 Identify and compare various
switching systems, its configuration, 1,2,13
technology and architecture.
CO-3 Identify and compare various
electronic Switching systems, its
1,2,13 14
firmware along with multistage
networks.
CO-4 Discuss various space and time
division switching configurations with 1 13
multistage switching.
CO-5 Discuss and calculate of various
1,2,3 13
network traffic load and parameters
CO-6 Describe and Explain basics of
various ISDN and its background , 1 13
goals ,protocols and structures
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
levels 2.0 1.6 3 - - - - - - - - - 1.6 1
Pre-requisites:
 Analog Communication and Digital Communication
Course Contents:

No Hrs.
1 Introduction: Evolution of Telecommunication, Simple 9
Telephone Communication, Basics of a Switching System,
Manual Switching System, Major Telecommunication
Networks. Advantages of Digital Voice Networks,
Disadvantages of Digital Voice Networks.
2 Switching & Signaling for analog Telephone networks – 6

Switching concepts – Cross-bar switching – Supervisory
signaling – E & M signaling – In-band & out-of-band signaling.
3 Electronic Space Division Switching: Stored Program 12

Control, Centralized SPC, Distributed SPC, Software
Architecture, Application Software, Enhanced Services, Two-
stage, Three-stage and n-stage Networks.
4 Time Division Switching: Basic Division Space and Time 10

Switching, Time Multiplexed Space and Time Switching,
Introduction to Combination Switching, Three-stage and n-
stage Combination Switching.
5 Traffic Engineering: Introductory terminology – Blockage, 8

Lost Calls, Grade of Service – Erlarg and Poisson Traffic
formulas – one- way and both-way circuits – QOS.
6 ISDN - ISDN - background & goals of ISDN – protocols – 7
structures – ATM and B-ISDN – User-Network interface (UNI)
configuration and architecture – Introduction to ATM cell
structure.
References Books:
1) Thyagarajan Viswanathan, “Telecommunication Switching Systems and

Networks”, PHI, 2010.
2) John. C. Bellamy, “Digital Telephony, 3rd Edition, John Wiley and Sons Inc.,
2010.
3) J E Flood, “Telecommunication switching, Traffic and Networks”, Pearson
Education, 2008.
4) Roger L. Freeman, Wiley Series in Telecommunications and Signal Processing
5) N. N. Deb, Telecommunication System Engineering
6) J E Flood, “Telecommunication switching, Traffic and Networks”, Pearson
Education, 2008.
15UECE513 Speech Processing (4-0-0) 3 : 52 Hrs.

Speech Processing is an elective theory course at undergraduate V Semester level.
The course focuses on various models of speech production, speech processing
techniques in time and frequency domains and various speech processing
applications.
Course outcomes:
CO Upon completion of the course, the Mapping to POs (1-12) / PSOs

CO-1 Understand the characteristics of
speech signal and classify speech 4
sounds
CO-2 Develop mathematical models for 1
speech production mechanism
CO-3 Analyze speech signal in time and
1 2 3
frequency domain
CO-4 Explain various feature extraction
1 2
methods of speech signal
CO-5 Differentiate between various
techniques of feature extraction and 1
make a comparative study
CO-6 Discuss applications of speech signal
1,2,3
processing
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2 1.7 1.5 2
levels
Pre-requisites:
 Engineering Mathematics and Signals & Systems.
Course Contents:
Chapter Chapter contents No. of

No. Hrs.
1 Production and Classification of Speech Sounds: 7
Introduction, mechanism of speech production, Acoustic
phonetics: vowels, diphthongs, semivowels, nasals, fricatives,
stop and affricates, Digital Models for Speech Sounds.
2 Time-domain Methods for Speech Processing: Time 7

dependent processing of speech, short-time energy and
average magnitude, short-time average zero crossing rate.
Speech vs. silence detection, pitch period estimation using
parallel processing approach, short-time autocorrelation
function, Pitch period estimation using autocorrelation.
3 Frequency Domain Methods for Speech Processing: 8

Introduction, definitions and properties, Fourier transforms
interpretation and linear filter interpretation, sampling rates in
time and frequency, Filter Bank Summation and Overlap Add
methods for short-time synthesis of speech, Spectrographic
displays, Pitch detection.
4 Linear Predictive Coding of Speech: Basic principles of 8

linear predictive analysis, computation of the gain of the model,
Solution of LPC equations, Prediction error signal, Frequency
domain interpretation of Linear Predictive Analysis,
Relationship between various speech parameters, Synthesis
of speech from linear predictive parameters, Applications of
LPC parameters.
5 Homomorphic Speech Processing: Introduction, 7

homomorphic systems for convolution, the complex cepstrum
of speech, Pitch detection, Formant estimation, homomorphic
vocoder.
6 Speech Synthesis: Principle, Synthesis Based on Waveform 7

Coding, Synthesis Based on Analysis-synthesis Method,
Synthesis Based on Speech Production Mechanism,
Synthesis by Rule, Text-to-speech Conversion.
7 Speech Recognition: Principles of Speech Recognition, 8

Speech Period Detection, Spectral Distance Measures,
Structure of Word Recognition System, Dynamic time Warping,
Hidden Markov Model.

 MATLAB simulation of theoretical concepts.
Reference Books:
1. L. R. Rabiner and R. W. Schafer, “Digital Processing of Speech Signals", Pearson
Education (Asia), 2004.
2. SadaokiFurui, “Digital Speech Processing, Synthesis and Recognition”, Marcel
Dekker, INC
3. Lawrence Rabinar and B. Juang, “Fundamentals of Speech Recognition”, Pearson
Education, 2003.
4. T. F. Quatieri, “Discrete Time Speech Signal Processing”, Pearson Education Asia,
2004.
ELECTIVE –II
15UECE520 System Verilog (4 - 0 - 0) 3 : 52 Hrs.

System Verilog is an elective theory course at undergraduate V semester level.
Knowledge of HDL programming, Programming in C++ and Digital system
Design are required as prerequisites. The course focuses on coding guidelines
for system Verilog, data types, data structures supported, subroutines, methods
of testing the program.
Course Outcomes:
CO Upon completion of the course, Mapping to POs (1,,12) / PSOs
the student will be able to (13,,14)
CO-1 Establish the relevance of System
Verilog as a (Hardware
1
Description and Verification
Language ) HDVL.
CO-2 Identify the Language constructs
1 4
and their usage.
CO-3 Emphasize on the importance of
utilization of Data structures (array 1 4
,structure and unions).
CO-4 Demonstrating the coding skills
3,4 13,14
for synthesis.
CO-5 Demonstrate the importance of
Verification and its guidelines and
1,3 4 13
design proper verification bed
using Language strength.
CO-6 Demonstrate Design and
Verification strategies and 1 3 4,13,14
illustrate white box verification
with proper usage of assumptions,
assertions and coverage.
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2.5 2.3 1 2.3 1 1
levels
Pre-requisites:
 Basic Verilog, Programming using C++ and Digital System Design.

No. Hrs.
1 Introduction to System Verilog: 7
System Verilog origins ,Generations of the System Verilog
standard, Donations to System Verilog , Key System Verilog
enhancements for hardware ,design, System Verilog
Declaration Spaces , Packages ,Package definitions ,
Referencing package contents, Synthesis guidelines , $unit
compilation-unit declarations, Coding guidelines, System
Verilog identifier search rules ,Source code order, Coding
guidelines for importing packages into $unit , Synthesis
guidelines , Declarations in unnamed statement blocks ,
Local variables in unnamed blocks, Simulation time units
and precision ,Verilog‟s timescale directive, Time values with
time units , Scope-level time unit and precision ,
Compilation-unit time units and precision.
2 System Verilog Literal Values and Built-in Data Types: 9

Enhanced literal value assignments „define enhancements,
System Verilog variables, Using 2-state types in RTL models
,2-state type characteristics , Relaxation of type rules,
Signed and unsigned modifiers, Static and automatic
variables, Deterministic variable initialization, Type casting,
Constants System Verilog User-Defined and Enumerated
Types, User-defined types, Enumerated types.
3 System Verilog Arrays, Structures and Unions: 8
Structures. Unions , Arrays , The for each array looping
construct X, Array querying system functions, The $bits
“sizeof” system function ,Dynamic arrays, associative arrays,
sparse arrays and strings.
4 System Verilog Procedural Blocks, Tasks and 9

Functions: Verilog general purpose always procedural
block, System Verilog specialized procedural blocks,
Enhancements to tasks and functions.
5 Verification Guidelines: The Verification Process, The 9

Verification Methodology Manual , Basic Test bench
Functionality, Directed Testing, Methodology Basics,
Constrained-Random Stimulus , What Should You
Randomize?, Functional Coverage , Test bench
Components, Layered Test bench , Building a Layered Test
bench ,.12 Simulation Environment Phases, Maximum Code
Reuse, Test bench Performance.
6 Connecting the Test bench and Design: Separating the 10

Test bench and Design, The Interface Construct, Stimulus
Timing, Interface Driving and Sampling, Program Block
Considerations, Connecting It All Together, Top-Level
Scope, Program–Module Interactions, System Verilog
Assertions, The Four-Port ATM Router, The Ref Port
Direction.

 Verification using Test bench programs.
Reference Books:
1. System Verilog For Design A Guide to Using System Verilog for Hardware
Design and Modeling by Stuart Sutherland, Simon
Davidmann,PeterFlake,Foreword by Phil Moorby Second Edition, Springer
Publications.
2. System Verilog for Verification A Guide to Learning the Testbench Language
Features by Chris Spear and Greg Tumbush, third edition by Springer
Publications.
3. Digital System Design with System Verilog by Mark ZwolinskiPearson
Education, 2009
15UECE521 Operating System (4-0-0) 3: 52 Hrs.

This course is an undergraduate course. It covers concepts on structure and
function of computer operating systems; processes and threads;
synchronization and mutual exclusion; deadlock and starvation; memory
management; virtual memory; process scheduling; I/O and storage devices, and
file management. Prior knowledge on basic C programming required.
Course outcomes:
CO Upon completion of the Mapping to POs (1,12) / PSOs

course, the student will be (13,14)
able to Level 3 Level 2 Level
Substantial Moderate 1
Slight
CO-1 Classify the Operating systems.
1,2
CO-2 Describe the structure of OS. 1,2

CO-3 Explain process, Process inter
process communication and
3 1,2
able to solves process
scheduling problems.
CO-4 Demonstrate and able to explain
how process synchronization
3 1,2 14
done and able to solve deadlock
problems.
CO-5 Demonstrate memory
management and able to solve 3,14
page replacement problems.
CO-6 Demonstrate the security issues, 3,14
authentication, working of Linux
operating system.
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
1.75 1.75 3 1 2.33
Level
Pre-requisites:
 Knowledge of computer systems.
Course Contents:
Chapter No of
No Chapter contents Hrs.
1 Introduction to operating systems: Introduction to OS, 3
user view, system view, Classification of OSs, features
and applications.
2 Operating system structures: System components, OS 3

Services, System calls, System programs, System
structure, Virtual machines.
3 Process Scheduling: Process concept, Process 6

scheduling, Operation on processes, cooperating
processes, Inter process communication. Threads
overview, CPU scheduling- Basic concepts, scheduling
criteria, Scheduling algorithms, multiple processor
scheduling, Real time scheduling.
4 Process issues: The Critical section problem, 12

Synchronization hardware, Semaphores, problems of
synchronization, Critical regions, monitors. Deadlock -
System model, Deadlock characterization, Methods for
handling deadlocks - Deadlock prevention, deadlock
avoidance, Deadlock detection and solution for deadlock.
5 Storage Management: Overview, Main memory 5

management- Background, Swapping, Contiguous
allocation, Paging, Segmentation, Segmentation with
paging.
6 Virtual memory - Background, Demand paging, Process 12

creation, Page replacement algorithms, Allocation of
frames, thrashing. File System interface - File concept,
Access methods, Directory structure, File system
mounting, File system implementation, Directory
implementation, Allocation methods and free space
management. Mass storage structures – Disk structure,
Disk scheduling methods, Disk 6management, Swap
space management.
7 OS Security: Goals of protections, the security issues, 6

Authentication, System threats, Securing systems and
facilities, Intrusion detection.
8 Case Study - Linux operating system: Features of Linux, 5

applications, Linux and Windows OS installation
procedure, Inter-process communication.

 Assignments: Simulation of algorithms used in OS.
Reference Books:
1. Abraham Silberschatz, Peter Baer Galvin, Greg Gagne ─ “Operating
System Concepts”, 6th edition, John Wiley & Sons.
2. Milan Milankovic ─ “Operating system concepts and design”, 2nd Edition,
McGraw-Hill.
3. Harvey M Deital ─ “Operating systems”, Addison Wesley Publications
4. D.M Dhamdhere ─ “Operating systems - A concept based Approach”,
Tata McGraw-Hill.
15UECE522 Digital Signal Compression (4-0-0) 3 : 52 Hrs.

The course Digital Signal Compression is an elective theory course at undergraduate V

semester level. It focuses on principle of coding and compression techniques and their
performance measures.
Course outcomes:
CO-1 Describe the principle of coding and
1, 2
compression techniques.
CO-2 Describe signal modeling. 1, 2
CO-3 Describe the parameters under
consideration to compare the 1 12 13
techniques.
CO-4 Differentiate between various coding
2 12 13
and compression techniques.
CO-5 Apply coding and compression
3 12
techniques for a given signal.
CO-6 Describe features of compression
1 12
standards.
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
3 3 3 2 1
level
Pre-requisites:
 Knowledge of Information theory and coding.
Course Contents:
No Hrs.
1 Introduction: Compression techniques, Modeling & coding, 6
Distortion criteria, Differential Entropy, Rate Distortion Theory,
Vector Spaces, Information theory, Models for sources, Coding
– uniquely decodable codes, Prefix codes, Kraft McMillan
Inequality.
2 Quantization: Quantization problem, Uniform Quantizer, 8

Adaptive Quantization, Non-uniform Quantization; Entropy
coded Quantization, Vector Quantization, LBG algorithm, Tree
structured VQ, Structured VQ, Variations of VQ – Gain shape
VQ, Mean removed VQ, Classified VQ, Multistage VQ,
Adaptive VQ, Trellis coded quantization.
3 Differential Encoding: Basic algorithm, Prediction in DPCM, 8

Adaptive DPCM, Delta Modulation, Speech coding – G.726,.
4 Transform Coding: Transforms – KLT, DCT, DST, DWHT; 8

Quantization and coding of transform coefficients, Application
to Image compression – JPEG, Application to audio
compression.
5 Analysis/Synthesis Schemes: Speech compression – LPC- 7

10, CELP, MELP, Image Compression – Fractal compression.
6 Video Compression: Motion compensation, Video signal 7

representation, Algorithms for video conferencing &
videophones – H.261, H. 263, Asymmetric applications –
MPEG 1, MPEG 2, MPEG 4, MPEG 7, Packet video.
7 Lossless Coding: Huffman coding, Adaptive Huffman 8

coding, Golomb codes, Rice codes, Tunstall codes,
Applications of Huffman coding, Arithmetic coding, Algorithm
implementation, Applications of Arithmetic coding, Dictionary
techniques – LZ77, LZ78, Applications of LZ78 – JBIG, JBIG2,
Predictive coding – Prediction with partial match, Burrows
Wheeler Transform, Applications – CALIC, JPEG-LS, Facsimile
coding – T.4, T.6.
 Modeling of multimedia compression techniques.
Reference Books:
1) K. Sayood, “Introduction to Data Compression," Harcourt India Pvt. Ltd. &
Morgan Kaufmann Publishers, 1996.
2) N. Jayant and P. Noll, “Digital Coding of Waveforms: Principles and
Applications to Speech and Video,” Prentice Hall, USA, 1984.
3) D. Salomon, “Data Compression: The Complete Reference”, Springer, 2000.
4) Z. Li and M.S. Drew, “Fundamentals of Multimedia,” Pearson Education (Asia)
Pte. Ltd., 2004.
15UECE523 IC Fabrication Technology (4-0-0) 3 : 52 Hrs.
IC Fabrication Technology is an elective subject at undergraduate V Semester level.

The objective of the course is to provide detailed knowledge about fabrication steps
required for IC design. The course focuses on understanding the detailed procedure of
Ion Implantation, Annealing, Oxidation, Lithography, Chemical Vapor Deposition and
Metal Film Deposition techniques.
Course outcomes:

CO-1 Understand the basics of fabrication
steps and their importance and safety 4,13 3 1,2
procedures.
CO-2 Analyze the concepts of Ion implantation
4,13 1,2,3
modeling and annealing technology.
CO-3 Describe the solid state diffusion 4,13 1,3
modeling and Technology.
CO-4 Recognize the process of oxidation and
1,13 2,4,
Lithography in fabrication using thin films
CO-5 Analyze the process of Chemical Vapor
4 13
Deposition and Metal Film Deposition
CO-6 Describe the Plasma and Rapid based
3,13 6,7 4
Thermal processing

PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping Level 2.0 1.67 2.25 2.5 2.0 2.0 2.83
Pre-requisites:
Basics of Analog Electronics, Engineering Mathematics, Engineering Physics.
Course Contents:

No. Hrs.
1 Introduction to IC Technology: Basic fabrication steps and 6
their Importance. Environment of IC Technology: Concepts of
Clean room and safety requirements, Concepts of Wafer
cleaning processes and wet chemical etching techniques.
2 Impurity Incorporation: Solid State diffusion modeling and 8
technology; Ion Implantation modeling, technology and damage
annealing, characterization of Impurity profiles
3 Oxidation: Kinetics of Silicon dioxide growth both for thick, 10
thin and ultra thin films, Oxidation technologies in VLSI and
ULSI, Characterization of oxide films, High k and low k
dielectrics for ULSI.
4 Lithography: Photolithography, E-beam lithography and 14
newer lithography techniques for VLSI/ULSI, Mask generation.
Chemical Vapour Deposition Techniques: CVD techniques for
deposition of polysilicon, silicon dioxide, silicon nitride and
metal films; relations for the currents, Ebers Moll Model
5 Epitaxial growth of silicon: modeling and technology. Metal 14

Film Deposition: Evaporation and sputtering techniques,
Failure mechanisms in metal interconnects Multi-level
metallization schemes. Plasma and Rapid Thermal Processing:
PECVD, Plasma etching and RIE techniques; RTP techniques
for annealing, growth and deposition of various films for use in
ULSI.
1. Seminar on related Semiconductor Devices.

2. Mini Projects
Reference Books:
1. S.M. Sze (2nd Edition )”VLSI Technology”, McGraw Hill Companies Inc.
2. C.Y. Chang and S.M. Sze (Ed), “ULSI Technology”, McGraw Hill Companies Inc.
3. Stephena, Campbell, “The Science and Engineering of Microelectronic Fabrication”,
Second Edition, Oxford University Press.
4 James D. Plummer, Michael D. Deal, ”Silicon VLSI Technology” Pearson Education
15UECC600 Management, Entrepreneurship & IPRs (4-0-0) 4 : 52 Hrs.
Course Learning Objectives: Management, Entrepreneurship and Intellectual

Property Rights is a Core theory course at VI semester level. This course focuses
on concepts of Entrepreneurship, concepts of Management and about the
Intellectual Property Rights. Entrepreneurship part discusses about Small Scale
Industries, Government and Institutional support and details of preparation of
Project Report. Management part discusses about Planning, Forecasting,
Organizing & Staffing, Motivating and Controlling. Intellectual Property Rights part
discusses various legal aspects of Copyright, Patents and Industrial Designs.
Course outcomes:
CO Upon completion of the Mapping to POs (1,12) / PSOs
course, the student will be (13,14)
able to Level 3 Level 2 Level 1
CO-1 Explain the concepts of
Entrepreneurship, Management 8,9,10,12 6,11
and IPRs.
CO-2 Describe the functions of Small
Scale Industries and discuss
9,10,11,12 8 6,7
their Government and
Institutional support.
CO-3 Discuss Management
principles/process and illustrate
8,9,10,11 5,12
Planning, Organising, Motivating
and Controlling.
CO-4 Analyse different legal aspects
for various Intellectual Property
6,8
Rights as applied to Industries/
Organizations.
CO-5 Select various factors of
entrepreneurship to establish 8,9,10,11,12 5,6,11 7
his own Industry/Business.
CO-6 Apply the concepts of
7,9,12 5,6,10,11 3,4
Management, Entrepreneurship
and IPRs to real life situations in
corporate world.
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
- 1 1 2 2 1.7 2.8 3 2.8 2.5 2.8 - -
Level
Course Contents:
No Hrs.
1 Entrepreneurship: 4
Foundations of Entrepreneurship: Meaning of
entrepreneur, functions of entrepreneur, types of
entrepreneur, concept of entrepreneurship, role of
entrepreneurs in economic development, barriers of
entrepreneurship.
2 Small Scale Industry: Definition, characteristics, objects, 4
role of SSI in economic development, advantages of SSI,
steps to start as SSI, impact of liberalization, privatization,
globalization on SSI, definition of ancillary and tiny industry.
3 Government and Institutional Support: Nature of support 4
of government, objectives and functions of SSI, SIDBI, DIC,
single window agency, KIADB,KSSIDC, KSFC.
4 Preparation of Project Report: Meaning of project 6
identification, project report, contents and formulation,
identification of business opportunities, feasibility studies,
types and purpose.
5 Management 5
Planning, Forecasting and Decision Making: Nature of
Planning, the foundation of planning, some planning
concepts, forecasting, nature of decision making,
management science, tools for decision-making.
6 Organizing and staffing: nature of organizing, traditional 6
organizational theory, technology and modern organization
structures, staffing technical organization, authority and
power; delegation, meeting & committees.
7 Motivating: Motivation, leadership, motivating and leading 3
technical professionals.
8 Controlling: process of control, financial controls, and non- 3
financial controls.
9 Intellectual Property Rights: 4
Introduction: Meaning and forms of intellectual property
right, competing rationale for protection, international
conventions, world court.
10 Copyright : Meaning of copyright, content of copy right, 4
ownership and rights, Period of copyright, assignment and
relinquishment of copyright, license, infringement of copy
right, fair use, offenses and penalties.
11 Patents: Concept of patent, patentable inventions, 5
procedure for obtaining patent, rights and obligations of
patent holders, infringements and remedies, offenses and
penalties.
12 Trademarks : Definition, Concepts, significance of 4
trademarks.
Activity beyond Syllabus: Seminar on Professional Ethics
Reference Books:
1) "Management and Entrepreneurship" – N.V.R. Naidu, T. Krishna Rao, I.K.
International Publishing House Pvt. Ltd.
2) "Managing Engineering and Technology", Daniel L Babcock, Lucy C Morse ─
Third Edition, PHI, India
3) N.K. Acharya, ─ "Text book on Intellectual Property Rights", Asia Law House,
Hyderabad, 4th Edition.
15UECC601 ARM Processor (4-0-0) 4 : 52 Hrs.
Course Learning Objectives: ARM Processor is theory course at VI semester

level. Any High Level Language like C/C++ will be an added advantage. The
course focuses on Learning of ARM architecture focusing on ARM7 and ARM
Cortex M3 architecture. Taking the advantages of RISC methodology, ARM,
THUMB instruction set architectures and application development upon ARM
boards.
Course outcome:
CO Upon completion of the course, Mapping to POs (1,12) / PSOs
the student will be able to (13,14)
Level 3 Level 2 Level
Slight
CO-1 Identify and describe the
advantages of RISC architecture
14 1
and defend RISC architectural
issues of ARM Processor
CO-2 Discuss the architecture,
processor modes, instruction types
3 5.12 1
and programming model of
ARM7TDMI.
CO-3 Distinguish between ARM and
THUMB instruction set
architecture and assess the
3 14
performance measure of an
application developed using these
instruction set architectures.
CO-4 Demonstrate programming skills
using Assembly Level Language
2,3 14 1
and High Level Language such as
C
CO-5 Extrapolate Interrupt Service
Routine (ISR) for various sources 4,5 1
of interrupts.
CO-6 Discuss different types of
5,4,12 14
assemblers of ARM7TDMI
1 2 3 4 5 6 7 8 9 10 11 12 13 14
PO
Mapping
1 2 3 2.3 2.5 2.4
levels
Pre-requisites:
 Knowledge of any processor/Controller, High level programming language
Course Contents:
No Hrs.
1 Introduction: History of RISC, Embedded system 6
hardware and software, ARM Begins, The Creation of
ARM Ltd , ARM Today , Architecture revisions, The
Computing Device, Number Systems, Representations of
Numbers and Characters , Integer Representations,
Floating-Point Representations, Character
Representations , Translating Bits to Commands, The
Tools ,The ARM7TDMI Programmer's Model , Pipeline,
Introduction, Data Types, Processor Modes, Registers,
Program Status Registers, The Control Bits, The Mode
Bits, The Vector Table.
2 First Programs: Introduction, Program 1: Shifting Data, 7
Running the Code, Examining Register and Memory
Contents, Program 2: Factorial Calculation, Program 3:
Swapping Register Contents, Programming Guidelines,
Assembler Rules and Directives: Introduction, Structure of
Assembly Language Modules, Predefined Register
Names, Frequently Used Directives, Macros,
Miscellaneous Assembler Features.
3 Loads, Stores and Addressing: Memory, Loads and 3
Stores-The Instructions, Operand Addressing Pre-Indexed
Addressing, Post-Indexed Addressing, Endianness.
4 Constants and Literal Pools: The ARM Rotation 5
Scheme, Loading Constants into Registers Loading
Addresses into Registers, Logic and Arithmetic, Flags and
Their Use, The N Flag, The V Flag, The Z Flag, The C,
Flag, Comparison Instructions, Data Processing
Operations, Boolean Operations, Shifts and Rotates.
5 Addition/Subtraction: Multiplication, Multiplication by a 7
Constant, Division, Fractional Notation, Loops and
Branches, Introduction, Branching, Looping, While Loops,
For Loops, Do While Loops, More on Flags, Conditional
Execution, Straight-Line Coding, Tables, Look-up Tables,
Jump Tables, Binary Searches ,Subroutines and Stacks,
The Stack, Subrot1tines,Passing Parameters to
Subroutines, The ARM APCS.
6 Exception Handling: Interrupts ,Error Conditions, 5
Processor Exception Sequence, The Vector Table,
Exception Handlers, Exception Priorities, Procedures for
Handling Exceptions, Reset Exceptions, Undefined
Instructions, Interrupts, Aborts.
7 Memory-Mapped Peripherals: The LPC2104, The 6
UART, The Memory Map, Configuring the UART, Writing
the Data to the UART, Putting the Code Together,
Running the Code, The LPC2132 The DIA Converter, The
Memory Map, Configuring the DI A Converter, Generating
a Sine Wave, Putting the Code Together, Running the
Code.
8 THUMB: Introduction, THUMB Instructions, Differences 3
Between ARM and THUMB, THUMB Implementation and
Use , How to Compile for THUMB.
9 Mixing C and Assembly: Inline Assembler, Inline 5
Assembly Syntax, Restrictions on Inline Assembly
Operations, Embedded Assembler, Embedded Assembly
Syntax, Restrictions on Embedded Assembly Operations,
Calling Between C and Assembly.
10 Background of ARM and ARM Architecture: Instruction 5
Set Development, the Thumb-2 Instruction Set
Architecture (ISA), Cortex-M3 Processor Applications,
Overview of ARM Cortex3: Fundamentals, Registers,
Operation Modes, The Built-In Nested Vectored Interrupt
Controller, The Memory Map, The Bus Interface, The
Memory Protection Unit, The Instruction Set, Interrupts
and Exceptions Debugging Support, Characteristics
Summary.
 Keil and other developing platform and ARM free kits.
 Carry out GPS, GSM, Graphic LCD, RFID, Bluetooth interfacing.
Reference Books:
1) William Hohl, “ARM Assembly Language Programming, Fundamentals and
Techniques”, CRC Press
2) Joseph Yiu, “The Definitive Guide to ARM Cortex-M3”, Newenes Publication
3) Andrew Sloss, Dominic Symes, Chris Wright, “ARM System Developer‟s
Guide: Designing Optimizing System Software”, Morgan Kaufmann, 2004.
4) Steve Furber, “ARM System-on-Chip Architecture”, 2/e, Pearson Education,
2000.
15UECC602 Analog and Mixed Mode VLSI (4-0-4) 4 : 52 Hrs.
Course Learning Objectives: Analog & Mixed Mode VLSI Design is a core
theory course at undergraduate VI semester level. Knowledge of Analog
Electronics Circuits, Network Analysis, Digital Circuits and Basics of CMOS
VLSI Design are required as prerequisites. The course focuses on Analog &
Mixed Mode VLSI Design considering the basic requirements of such design,
difficulties in the design phase and various circuit examples. The course
considers widely used analog circuits such as OPAMP, ADC, DAC, current
source, sinks and mirrors and PLL as examples for the discussion.
Course outcome:
CO Upon completion of Mapping to POs (1,12) / PSOs (13,14)
the course, the Level 3 Level 2 Level 1
student will be able Substantial Moderate Slight
to
CO-1 Identify the
characteristics and
1
short channel effects
of MOS devices
CO-2 Design of analog
circuits such as single
stage amplifiers, op-
2,3,13
amps, current
sources, current sinks
and current mirrors.
CO-3 List and Compare
data converter 4,5
fundamentals.
CO-4 Build data converter
13,14
architectures.
CO-5 Identify and
elaborate PLL and its 1,13 1,13
applications.
CO-6 Estimate the
performance
3,4,13,14
parameters of analog
and mixed circuits.
POs PSOs
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping levels 1.66 3 3 2.5 2 3.25 3
Pre-requisites: Analog Electronics, Network Analysis,. Digital circuits &. Basics

of CMOS VLSI Design.
Course Contents:
No. Hrs.
1 Introduction to analog Design: Introduction to MOS, 6
MOS V/I characteristics, second order effects, MOS
device models.
2 Single stage amplifiers: Basic concepts, common 12
source stage: common source stage with resistive load,
CS stage with diode connected load, CS stage with
current source load, CS stage with triode load, CS stage
with source degeneration, source follower, Common
gate stage, Cascode stage.
3 Current Sinks, Sources and Mirrors: Current sinks 6
and sources, techniques to improve performance of
current sinks and sources, current mirrors, effects to
cause current mirror to be different from ideal situation.
4 Operational Amplifiers: General considerations, Single 8

stage Op-Amps, two stage Op-Amps, gain boosting,
comparison, common mode feedback, slew rate, power
supply rejection ratio, Comparator
5 Data Converter fundamentals & architectures: 12

Introduction, sample and hold characteristics, digital to
analog converter(DAC) specifications, analog to digital
converter(ADC) specifications, DAC architectures:
Resistor string, R-2R ladder network, Charge scaling
DACs, ADC architectures: Pipeline ADC, Successive
approximation ADC
6 Phase Locked Loops: Simple PLL, Basic PLL 8
Topology, Dynamics of Simple PLL, Charge Pump
PLLs, Non ideal effects in PLLs, Delay Locked Loops
and Applications, NAPLL
Activity beyond Syllabus: Simulation of analog circuits and data converters.
Reference Books:
1) Behzad Razavi, “Design of Analog CMOS Integrated Circuits”, Tata
McGraw-Hill Edition 2008.
2) R. Jacob Baker, Harry W. LI, David E. Boyce, “CMOS Circuit Design, lay
out and Synthesis”, IEEE press, 2005.
3) Phillip E. Allen & Douglas R. Holberg, “CMOS Analog Circuit Design”, 2/e,
New York Oxford, Oxford University.
15UECC603 Microwave and Radar Engineering (4- 0 - 0) 4 :52 Hrs.
Course Learning Objectives:Microwave & Radar Engineering is a core theory

course at undergraduate VI semester level. Knowledge of Analog / Digital
Communication, Field Theory and Analog Electronics are required as prerequisites.
The course focuses on the study of transmission lines, waveguides and the devices
used in microwave transmitter and receiver. RADAR being considered as an
important application of microwaves is chosen for the study.
Course outcomes:
course, the student will Level 3 Level Level
be able to Substantial 2Moderate 1Slight
CO- Derive the equations to
1 model a transmission line
with distributed circuit
theory, define the
performance parameters 1,2 4 13
of a transmission line and
Demonstrate the
significance of impedance
matching.
CO- Analyze the modes of
2 wave propagation in a
rectangular waveguide
1 4
and derive scattering
matrix for various
waveguide components.
CO- Demonstrate the working
3 of different microwave
4
semiconductor devices
and discuss their
performance and
applications.
CO- Appreciate the need for
4 special kinds of tubes
used for microwave
applications and describe
4
the working principle of
microwave tubes used for
amplification and
generation.
CO- Analyze the properties
5 of different types of micro 1
strip lines
CO- Outline the concept of
6 Radar and illustrate the
13 1
different forms of Radar
and their applications
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
1.75 2.0 2.0 - - - - - - - - 1.5 -
levels
Pre-requisites: Analog Communication, Digital Communication, Electromagnetic

Field Theory.And Analog Electronics.
Course Contents:

No. Hrs.
1 Introduction to Microwaves: Microwave Frequency 02
Bands, Applications of Microwaves
2 Transmission Lines: Introduction, Transmission-Line 10
Equations and solutions, Reflection Coefficient and
Transmission Coefficient, Standing Wave and Standing-
Wave Ratio, Line Impedance and Admittance, The Smith
Chart, Impedance Matching, Microstrip Lines.
3 Waveguides: Introduction, Reflection from a conducting 06
plane, Propagation between Parallel Plates, Rectangular
Waveguides - TE and TM modes (Mathematical analysis),
Rectangular Cavity Resonator, Q Factor of a Cavity
Resonator.
4 Waveguide Components: Microwave Hybrid Circuits, 08
Directional Couplers, Circulator and Isolator (S-matrix
analysis).
5 Transferred Electron Devices: Introduction, Gunn-Effect 06
Diodes- GaAs Diode, Ridley-Watkins - Hilsum Theory,
Modes of Operation, Avalanche Transit Time Devices -
Read Diode, IMPATT Diode, TRAPATT Diode, BARITT
Diode.
6 Microwave Tubes: Limitations of Conventional tubes, 08
Reflex Klystron Oscillator, Two Cavity Klystron Amplifier,
Apple Gate Diagram, Applications, Construction and
Working Principle of Magnetron and TWT, Applications.
7 An Introduction to Radar: Basic Radar, The simple form of 12
the Radar equation, Radar block diagram, Radar
frequencies, applications of Radar, the origin of Radar, MTI
and Pulse Doppler Radar, Introduction to Doppler and MTI
Radar, delay line Cancellers, digital MTI processing, Moving
target detector, pulse Doppler Radar.
Activity beyond Syllabus: Study and Conduction of Microwave related
Experiments
Reference Books:
1) Samuel Y Liao, “Microwave Devices and Circuits”, 4th Ed., Pearson, 2008
2) "Introduction to Radar systems-Merrill I Skolnik", 3rd Ed, TMH, 2001.
3) "Microwaves and Radar" by M.Kulkarni.
4) Sisodia and Gupta, ─ “Microwaves”, New Age International
5) Somanathan Nair, ─ “Microwave Engineering”, Sanguine Technical Publishers
15UECL604 ARM Processor Laboratory (0 - 0 - 2) 1
Course Learning Objectives: ARM Processor lab is a core laboratory course at

undergraduate VI semester level. ARM assembly as well as high level language
programming skill development.
Course outcome:
Level 3 Level 2 Level
Slight
CO-1 Apply the instruction set of ARM
2,3,4,5 1,14
processor to solve problems.
CO-2 Identify the different working modes
2,14
ARM.
CO-3 Illustrate the advantages of THUMB
2 14
instruction set.
CO-4 Demonstrate programming skills
using Assembly Level Language 2,3 14 1
and High Level Language such as C
CO-5 Point out optimization techniques
14 2,3
and Trade Offs
CO-6 Analyze and apply the capabilities
3,4,5 14 1
of ARM for application development.
POs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
1 2.8 2.75 3 3 2.16
Level
Pre-requisites:
1. Digital circuits
2. Knowledge of high level language and any processor/controller
List of Experiments
1) Swap 2 register contents without using temporary register.
2) Factorial of a given number, Arranging in ascending and descending order.
3) Implementing expressions and finding number of 1s in a 32-bit number.
4) Perform32 bit multiplication, producing a 64-bit result, using only UMULL
and logical operations.
5) Addition and subtraction of two128-bit numbers.
6) Conversion of upper case to lower case and vice versa.
7) Routine that reverses the bits in a register.
8) Find the maximum value and minimum value in a list of 32-bit numbers
located in memory.
9) Routine that performs parity check and bitwise palindrome.
10) Application development examples using high level language on
LPC 2148.
Reference Books:
15UECL605 Mini Project (0 - 0 - 8) 4
Course Learning Objectives: Mini project is a core project course at undergraduate VI

semester level. The course focuses on executing a project work based on knowledge of
fundamental courses of lower semester.
Course outcomes:
CO-1 Analyze a socially relevant /
technically relevant problem and 2 6, 7
formulate a problem statement
CO-2 Explain technical approach
2 6, 7 11
towards solution
CO-3 Implement the solution in hardware
1, 3, 12 9, 10, 13
& / or software
CO-4 Organize the topics in a systematic
9 12
manner
CO-5 Prepare there port in a specific
5, 9 12, 13
format
POs→ 1 2 3 4 5 6 7 8 10 11 12 13 14
Mapping
3 2.5 3 - 3 1.5 1.5 - 2.67 2 1 2.3 2 -
Level
ELECTIVE –III
15UECE630 DSP Architecture (4-0-0) 3 : 52 Hrs.
Course Learning Objectives:Digital Signal Processor Architecture is an elective

theory course at undergraduate V semester level. The course focuses on various
architectural requirements of a digital signal processor, programming aspects and
interfacing the processor to memory and I/O devices considering as
exampleTMS320C54xx.
Course outcomes:
CO Upon completion of the course, the Mapping to POs (1-12) / PSOs
CO-1 Demonstrate the basics of various
architectural requirements of a digital 1
signal processor.
CO-2 Focus on addressing modes, instruction
types and instructions set of 1
TMS320C54xx.
CO-3 Identify the purpose of each instruction. 2
CO-4 Apply the knowledge of architecture and
instructions set to develop programs for 2 3 13
signal processing.
CO-5 Determine the computational accuracy. 3
CO-6 Discuss the methodology of interfacing
the processor to memory and I/O devices 14 13
with Illustrative examples.
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
3.0 2.5 2 - - - - - - - - - 1 2
levels
Pre-requisites: Engineering Mathematics and Digital Signal Processing.

Course Contents:
No. Hrs.
1 Introduction To Digital Signal Processing: Introduction, A 7
digital signal processing system, the sampling process,
discrete time sequences, Discrete Fourier Transform (DFT)
and Fast Fourier Transform (FFT), linear time invariant
systems, Digital filters, Decimation and Interpolation, Analysis
and Design tool for DSP systems.
2 Computational Accuracy In DSP Implementation: 7
Introduction, Number formats for signals and coefficients in
DSP systems, Dynamic range and precision, Sources of error
in DSP implementations, A/D conversion errors, DSP
computational errors and D/A Conversion errors.
3 Digital Signal Processing Devices: Introduction, Basic 6
architectural features, DSP computational building blocks, Bus
architecture and memory, Data addressing capabilities,
Address generation unit, Programmability and Program
execution, Speed issues.
4 Programmable Digital Signal Processors: Introduction, 6
Architecture of TMS320C54xx digital signal processors: Bus
structure, Central processing unit, internal memory and
memory mapped registers, Data addressing modes of
TMS320C54xx processors, Memory space of TMS320C54xx
processors.
5 TMS320C54xx Instructions And Programming: Instruction 7
set, Programming examples, On-chip peripherals, Interrupts of
TMS320C54xx processors, Pipeline operation of
TMS320C54xx processors.
6 Implementation of Basic DSP Algorithms: Introduction, The 7
Q-notation, Linear Convolution, Circular Convolution, FIR
Filters, IIR Filters, Interpolation Filters, Decimation Filters,
Adaptive Filters, butterfly computation and FFT implementation
on the TMS320C54xx.
7 Interfacing Memory And Parallel I/O Peripherals To 6
Programmable DSP Devices: Introduction, Memory space
organization, External bus interfacing signals, Memory
interface, Parallel I/O interface, Programmed I/O, Interrupts
and I/O, Direct memory access(DMA). Interfacing Serial
Converters to a Programmable DSP device: Introduction,
Synchronous Serial Interface (SSI), A multi channels buffered
serial port (McBSP).
8 A Codec Interface Circuit: Codec-DSP interface circuit. 6
Applications of programmable DSP devices: Introduction, A
DSP system, DSP-based Biotelemetry receiver, A speech
processing system, An image processing system.
Activity beyond Syllabus: Computation and simulation of DSP algorithms.
Reference Books:
1. Avtar Singh and S. Srinivasan, “Digital Signal Processing Implementations: Using
DSP Microprocessors - with Examples from TMS320C54XX”, Thomson
Publications, 2004.
2. Phil Lapsley, Jeff Bier, Amit Shoham “DSP Processor Fundamentals: Architectures
& Features”, S. Chand & Co, 2000.
3. B.Venkata Ramani and M. Bhaskar, “Digital Signal Processors: Architecture,
Programming and Applications”, TMH, 2004.
15UECE634 Fuzzy Logic (4 - 0 - 0) 3 : 52 Hrs.

Course Learning Objectives: FuzFuzzy Logic is an elective course offered at VI
semester level. The objectives of the course is to understand the basics of fuzzy logic,
its applications independent of domain of engineering.
5.
Course outcomes:
CO Upon completion of the course, the Mapping to POs (1,12) / PSOs (13,14)
student will be able to Level 3 Level 2 Level 1
CO1 Describe the structure of a simple 4,13 2,3 1
fuzzy logic based system
CO2 Express the various algorithms
involved in designing fuzzy 2,13,14 5 1
systems
CO3 Calculate the values of performance
parameters for a given snap shot of a 2,13,14 1,3
system
CO4 Demonstrate and able to explain how
communication takes place within a 1,2 13 10
fuzzy system
CO-5 Describe types of fuzzy systems required 4,13,14 1,2 3
for sample case studies
PO1 PO2 PO3 PO4 PO5 PO10 PO13 PO14

Mapping 1.66 2.33 1.75 3.0 2.0 -1.0 2.83 3.0
levels
Pre-requisites: Basic set theory including union, intersection, complementation etc, Basic
arithmetic knowledge.
Course Contents:
Chapter Chapter contents No of Hrs.
No
1 Introduction: Background, Uncertainty and imprecision, 2
Statistics and random processes, Uncertainty in
information, Fuzzy sets and membership, Chance
versus ambiguity.
2 Classical sets: Operations on classical sets, Properties of 5
classical sets, Mapping of classical sets to functions,
Fuzzy sets, fuzzy set operations, Properties of fuzzy
sets, sets as points in Hypercubes.
3 Classical relations and fuzzy relations: Cartesian product, 7
Crisp relations, cardinality of crisp relations, operations
on crisp relations, properties of crisp relations,
Compositions, Fuzzy relations- cardinality of fuzzy
relations, operations on fuzzy relations, properties of
fuzzy relations, Fuzzy Cartesian product and
composition, Non interactive fuzzy sets, Tolerance and
equivalence relations crisp equivalence relation, crisp
tolerance relation, fuzzy tolerance, Value assignments-
Cosine amplitude, Max-min Method, other similarity
methods.
4 Membership functions: Features of the membership 7
function, Standards forms and boundaries,
fuzzification, Membership value assignments intuition,
inference, Rank ordering, Angular fuzzy sets, Neural
networks, Genetic algorithms, Inductive reasoning.
5 Fuzzy to crisp conversions: Lambda-cuts for fuzzy sets, 4
Lambda-cuts for fuzzy relations, Defuzzification
methods, Extension principle-crisp functions, Mapping
and relations.
6 Classical logic and fuzzy logic: Classical predicate logic- 6
tautologies, Contradictions, Equivalence, Exclusive OR
and Excusive NOR, Logical proofs, Deductive
Inferences, Fuzzy logic, Approximate reasoning, Fuzzy
tautologies, Contradictions, Equivalence and logical
proofs, Other forms of the implication operation, Other
forms of the composition operation.
7 Fuzzy rule based systems: Natural language, Linguistic 6
hedges, Rule based systems, canonical rule forms,
Decomposition of compound rules, Likelihood and
truth qualification, Aggregation of fuzzy rules,
Graphical techniques of inference.
8 Fuzzy classification: Classification by equivalence relations- 7
crisp relations, Fuzzy relations, cluster analysis,
Cluster validity, C-Means clustering-hard
Means(HCM), Fuzzy C-Means(FCM), Classification
metric, Hardening the fuzzy C-partition, Similarity
relations from clustering.
9 Fuzzy Control Systems: Review of Control systems theory, 8
simple fuzzy logic controllers, general fuzzy logic
controllers, special form of fuzzy logic control system
models, examples of fuzzy control system design,
industrial application of fuzzy logic, control of blood
pressure during anesthesia, fuzzy logic application to
image processing equipment, image stabilization for
camcoders, customer adaptive fuzzy control of home
heating system, adaptive fuzzy systems.

 Simple examples may be given on the various concepts/algorithms for better
understanding of the subject.
 Mini project on different domains of engineering may be considered.
Reference Books:
1. Timothy J. Ross, _ “Fuzzy logic with Engineering applications”, McGraw-Hill,
2011.
2. George J. Klir and Tina A. Folger. ”Fuzzy sets, Uncertainty and information”,
Prentice Hall of India, 2011.
3. B. Kosko. _ “Neural networks and fuzzy systems: A dynamical system approach”,
Pearson Education, 1996.
4. Kazao Tanaka, “An Introduction to fuzzy logic for practical applications”, Springer-
verlag, New York, 2001.
15UECE632 Cryptography and Network Security (4-0-0)3:52 Hrs.
Course Learning Objectives:Cryptography and Network Security is an elective theory

course at VI semester level. Knowledge of Finite Fields and Discrete Logarithms are
required as a prerequisite. The course focuses on various encryption / description
techniques and other issues of cryptography and network security. Suitable
applications to bring out clearly each aspect will be explained
Course outcome:
Substantia Moderate Slight
l
CO-1 Identify and Illustrate security threats,
security services and mechanisms to 2 1
counter them.
CO-2 Analyze and interpret detailed
knowledge and role of encryption and 4,14 2 1
decryption to protect the data.
CO-3 Apply and estimate different security
4,14 1,2,3
algorithms.
CO-4 Explain email security services, web
14 4 1
security services and their mechanisms.
CO-5 Select the appropriate procedures for
secure networks, system security testing
3,4,5,14 1,2
and solve the issues like data backup
and Recovery.
CO-6 Discuss the firewall requirements and
their types to demonstrate the example 14 1,7
for the same.
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
1.5 2 2.5 2.8 3 2 3
Level
Pre-requisites: Communication networks and finite fields.

Course Contents:
No Hrs.
1 Overview: Introduction to ISO-OSI Model, Services, 3

Mechanisms and attacks, OSI security architecture, Model for
network security
2 Classical Encryption Techniques: Symmetric cipher model, 6
Substitution techniques, Transposition techniques, Rotor
machine, Steganography, Problems.
3 Block Ciphers and DES (Data Encryption Standards): 6
Simplified DES, Block cipher principles, DES, Strength of DES,
Block cipher design principles, Block cipher modes of
operation, Problems.
4 Advanced encryption standard: Evaluation criteria for AES, 2
The AES cipher, problems.
5 Public Key Cryptography and RSA: Principles of public key 4
cryptosystems, RSA algorithm, Problems.
6 Other Public Key Crypto Systems and Key Management: 7
Key management, Diffie-Hellman key exchange, Elliptic curve
arithmetic, Elliptic curve cryptography, Problems.
7 Message Authentication, Hash Functions and Digital 8
signatures: Authentication requirements, Authentication
functions, Message authentication codes, Hash functions,
Security of hash functions and MAC‟s, Digital signature, Digital
signature standard, Problems.
8 Electronic Mail Security: Pretty good privacy, S/MIME, Data 6
compression using ZIP, Radix-64 conversion.
9 IP Security: Overview, IP security architecture, Authentication 5
header, ESP(Encapsulating Security Pay load), Security
associations, Key management.
10 Firewalls: Firewall design principles; trusted systems. 5
Activity beyond Syllabus: Simple project on related cryptography substitution

techniques.
Reference Books:
1) William Stallings, “Cryptography and Network Security,” 3/e, Pearson Education
(Asia) Pte. Ltd. / Prentice Hall of India, 2003.
2) C. Kaufman, R. Perlman, and M. Speciner, "Network Security: Private
Communication in a Public World,” 2/e, Pearson Education (Asia), 2002.
3) AtulKahate, “Cryptography and Network Security”, Tata McGraw-Hill, 2003.
4) Eric Maiwald, “Fundamentals of Network Security”, McGraw-Hill, 2003.
5) John Hershey, “Cryptography Demystified”, McGraw-Hill, 2002.
15UECE633 VLSI & DSP Systems (4-0-0) 3 : 52 Hrs.
VLSI and DSP Systems is an elective theory course at undergraduate VI semester

level. Knowledge of Signals & Systems and Analog & Digital Electronics are required
as prerequisites. The course focuses on development of signal processing algorithms
keeping in view the three key factors: area, speed and power towards the design of
digital circuits for the purpose of reconfigurable computing.
Course outcomes:
CO-1 Describe the parameters under
consideration while realizing DSP 1
algorithms in VLSI
CO-2 Illustrate various DSP algorithms 1, 2 12 13
CO-3 Illustrate various DSP architectures 1, 2 12 13
CO-4 Compare various DSP algorithms 2 13
CO-5 Compare various DSP architectures 2 13
CO-6 Analyze the given problem and apply
2, 3
suitable, optimal DSP algorithms
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
3 3 3 2 1
levels
Pre-requisites: Knowledge of Digital Signal Processing, Analog and digital

electronics, CMOS VLSI design.
Course Contents:
No. Hrs
1 Introduction to DSP Systems: Introduction to DSP 10
Systems, Iteration bound, Data Flow graphs (DFGs)
representation, Loop Bound, Iteration rate, Critical loop,
Critical path, Area-Speed-Power trade-offs, Algorithms
for computing iteration bound, Pipelining of FIR Digital
Filters, Parallel Processing, Pipelining and Parallel
Processing for low power.
2 Algorithmic Transformations: Retiming Definitions and 12
properties, Retiming Techniques, Clock period
minimization, Unfolding, An algorithm for unfolding,
Critical path, Applications of unfolding, Sample period
reduction, Folding, Folding order, Folding Factor, register
minimization techniques, register minimization in folded
architecture, Forward Backward Register Allocation
technique, folding of multi-rate systems, Folding Bi-quad
filters, Retiming for folding.
3 Systolic Architecture Design and Fast Convolution: 12
Introduction, system array design methodology, FIR
systolic arrays, , Systolic Design for space
representations containing delays Systolic architecture
design methodology, Design examples of systolic
architectures, selection of scheduling vector, matrix-
matrix multiplication and 2-D systolic array design,
Hardware Utilization efficiency, Cook-Toom Algorithm,
Wniograd Algorithm, Iterated Convolution, Cyclic
Convolution, Design of fast convolution algorithm by
inspection.
4 Algorithm Strength Reduction in filter: Introduction, 8
Parallel FIR filters, Polyphase decomposition, Discrete
Cosine Transform and Inverse Discrete Cosine
Transform, parallel architectures for Rank Order filters.
5 Pipelined and Parallel Recursive and Adaptive 10
Filters: Introduction, pipelining in 1st order IIR digital
filters, pipelining in higher order IIR digital filters, parallel
processing for IIR filters, combined pipelining and parallel
processing for IIR filters, low power IIR Filter Design
using pipelining and parallel processing, pipelined
adaptive digital filters.

1. Filter implementation using VLSI Techniques.
Reference Books:
1. Parhi, K.K., “VLSI Digital Signal Processing Systems: Design and
Implementation”, John Wiley, 2007.
2. Oppenheim, A.V. and Schafer, R.W., “Discrete-Time Signal Processing”, 2/e,
Prentice Hall, 2009.
3. Mitra, S.K., “Digital Signal Processing. A Computer Based Approach”, 3/e, McGraw
Hill, 2007.
4. Wanhammar, L., “DSP Integrated Circuits”, Academic Press, 1999, 2005, ISBN:
978-0131543188
Elective-IV
15UECE640 Wireless Sensor Networks (4-0-0) 3 : 52 Hrs. 56
Course Learning Objectives: Wireless Sensor Networks is an Elective course at under

graduate VI semester level. The course focuses on basic Wireless Sensor Network
technology and supporting protocols with emphasis placed on standardization of basic
sensor systems. This course also provides a survey of sensor technology, medium access
control protocols and address physical layer issues. The other part of the course discusses
key routing protocols for sensor networks, design issues, sensor management, sensor
network middleware, and operating systems.
Course Outcomes:
ID Description of the Outcome Mapping to POs (1-11)
CO-1 Explain the background, overview
and architectural elements of 1,2 8
wireless sensor networks.
CO-2 Apply knowledge of wireless
sensor networks (WSN) to various 3,4 1,2,5
application areas.
CO-3 Outline the basics of wireless
5 1,2
sensor technology
CO-4 Discuss & Analyse the MAC,
Transport, Routing protocols for 6,11
wireless sensor networks.
CO-5 Estimate all points related to the
Middleware for Wireless Sensor 1,2,3,4
Networks,
CO-6 Identify and observe issues
related to Network management,
1,2,3,4
Network operating systems for
Wireless Sensor Networks
CO-7 Illustrate Network Operating
Systems for Wireless Sensor 4,5
Networks.
CO-8 Conduct performance analysis of 5,6
WSN and manage WSN.
PO 1 2 3 4 5 6 7 8 9 10 11
Mapping
2 2 1.5 2 2.5 3 - 1 - - 1
Level

Pre requisite:
1. Basic of Computer communication networks.
2. Basics of wireless networks.
No. Hrs.
1 Introduction and Overview of Wireless Sensor Networks: 6
Introduction, Background of Sensor Network Technology,
Applications of Sensor Networks, Basic Overview of the
Technology, Basic Sensor Network Architectural Elements,
Brief Historical Survey of Sensor Networks, Challenges and
Hurdles.
2 Applications of Wireless Sensor Networks : Introduction, 8
Background, Range of Applications, Examples of Category 2
WSN Applications, Home Control, Building Automation,
Industrial Automation, Medical Applications. Examples of
Category 1 WSN Applications, Sensor and Robots,
Reconfigurable Sensor Networks,
Highway Monitoring, Military Applications, Civil and
Environmental Engineering Applications, Wildfire
Instrumentation, Habitat Monitoring, Nanoscopic Sensor
Applications, Taxonomy of WSN Technology.
3 Basic Wireless Sensor Technology : Introduction, Sensor 8
Node Technology, Overview, Hardware and Software, Sensor
Taxonomy, WN Operating Environment, WN Trends.
4 Medium Access Control Protocols for Wireless Sensor 4
Networks: Introduction, Background, Fundamentals of MAC
Protocols, Performance Requirements, Common Protocols,
MAC Protocols for WSNs, Schedule-Based Protocols, Random
Access-Based Protocols.
5 Routing Protocols for Wireless Sensor Networks : 10
Introduction, Background, Data Dissemination and Gathering,
Routing Challenges and Design Issues in Wireless Sensor
Networks, Network Scale and Time-Varying Characteristics,
Resource Constraints, Sensor Applications Data Models,
Routing Strategies in Wireless Sensor Networks, WSN Routing
Techniques, Flooding and Its Variants, Sensor Protocols for
Information via Negotiation, Low-Energy Adaptive Clustering
Hierarchy, Power-Efficient Gathering in Sensor Information
Systems.
6 Transport Control Protocols for Wireless Sensor Networks 6
: Traditional Transport Control Protocols, TCP (RFC 793), UDP
(RFC 768), Mobile IP, Feasibility of Using TCP or UDP for
WSNs, Transport Protocol Design Issues, Performance of
Transport Control Protocols, Congestion, Packet Loss
Recovery.
7 Middleware, Network Management Operating Systems for 10
Wireless Sensor Networks : Introduction, WSN Middleware
Principles, Middleware Architecture, Data-Related Functions,
Architectures, Examples Existing Middleware,
Network Management for Wireless Sensor Networks :
Introduction, Network Management Requirements, Traditional
Network Management Models.
Operating Systems for Wireless Sensor Networks :
Introduction, Operating System Design Issues, Examples of
Operating Systems.
8 Performance and Traffic Management : Introduction, 4
Background, WSN Design Issues: MAC, Routing and Transport
protocols, Performance Metrics of WSNs.
Activities beyond syllabus: Implementation of WSN scenario in Qualnet simulator.
Reference Books:
1. Kazem Sohraby, Daniel Minoli, TaiebZn ati: Wireless Sensor Networks Technology,
Protocols, and Applications -John Wiley & Sons, 2007
2. William C Y Lee: Mobile Communications Engineering Theory and Applications, 2nd
Edition, McGraw Hill Telecommunications 1998.
3. William Stallings: Wireless Communications and Networks, Pearson Education Asia,
2002.
15UECE641 Data structures using C++ (4-0-0) 3 : 52 Hrs.
Course Learning Objectives: The objective of the course is to familiarize students with
basic data structures and their use in fundamental algorithms. To learn various concepts in
C++ like Classes, Inheritance and Object orientation. To learn the implementations of
stacks, linked lists, search trees and encapsulated data structures.
Course outcomes:
course, the student will be Level 3 Level 2 Level 1
able to Substantial Moderate Slight
CO-1 Demonstrate C++ programming
methodologies and implement 1
basic data structures.
CO-2 Understand and analyze the use
of data structures in building 2,3
algorithms.
CO-3 Apply the concepts of Data
13 3
Structures in their projects.
CO-4 Develop an algorithm using
3,4
C++.
CO-5 Implementations of various
2 4
operations.
CO-6 Explain the applications of data 13 14
structures using C++ in real time
domain.
POs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
1 1.5 2.6 1 - 1.67 1
Level
Pre-requisites: Algorithms, Flowchart Basics.

Course Contents:
No. Hrs.
1 C++ Class Overview- Class Definition, Objects, Class 8
Members, Access Control, Class Scope, Constructors and
destructors, parameter passing methods, Inline functions,
static class members, this pointer, friend functions, dynamic
memory allocation and deallocation (new and delete),
exception handling.
.
2 Function Over Loading, Operator Overloading, Generic 8
Programming- Function and class templates, Inheritance
basics, base and derived classes, inheritance types, base class
access control, runtime polymorphism using virtual functions,
abstract classes, streams I/O.
3 Algorithms, performance analysis- time complexity and space 6
complexity. Review of basic data structures- The list ADT,
Stack ADT, Queue ADT, Implementation using template
classes in C++.
4 Dictionaries, linear list representation, skip list representation, 8
operations insertion, deletion and searching, hash table
representation, hash functions, collision resolution-separate
chaining, open addressing-linear probing, quadratic probing,
double hashing, rehashing, extendible hashing, comparison of
hash in and skip lists.
5 Priority Queues: Definition, ADT, Realizing a Priority Queue 6
using Heaps, Definition, insertion, Deletion, External Sorting-
Model for external sorting, Multiway merge, Polyphase merge.
6 Search Trees (Part1):- Binary Search Trees, Definition, ADT, 10
Implementation, Operations- Searching, Insertion and
Deletion, AVL Trees, Definition, Height of an AVL Tree,
Operations - Insertion, Deletion and Searching. Search trees.
(Part II): Trees definitions, B-Trees, B-Tree of order m, height
of a B-Tree, insertion, deletion and searching, Comparison of
Search Trees, Graphs: Basic terminology, representations of
graphs, graph search methods DFS, BFS
7 Text Processing: Pattern matching algorithms-Brute force, the 6
Boyer Moore algorithm, the Knuth-Morris-Pratt algorithm,
Standard Tries, Compressed Tries, Suffix tries.
15UECE642 Digital Image Processing (4-0-0) 3 : 52 Hrs.
Course Learning Objectives:Digital Image Processing is an elective course

offered at VII semester level. To learn this subject student should have prior
knowledge of Digital Signal Processing and Engineering Mathematics. The
course focuses on fundamentals in image processing like image sampling,
quantization, various image enhancement techniques in spatial and frequency
domain, color image processing, and concepts of detection of discontinuities,
edge linking and boundary detection.
Course outcomes:
CO Upon completion of the course, the Mapping to PO & PSO
student will be able to Substantial Moderate Slight
(3) (2) (1)
CO-1 Describe image production, its
representation and typical image 1
processing system
CO-2 Describe techniques of image
1, 2 13
processing
CO-3 Analyze the image and apply
1, 2 3 12
suitable techniques for its processing
CO-4 Explain and apply processing
domain specific (time and frequency) 1, 2 13
image processing techniques
CO-5 Compare various image processing
12
techniques
CO-6 Explain applications of image
12
processing
Pos 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2.5 3.0 2.0 1.6 2.0 -
Level
Pre-requisites: Digital signal processing, Engineering Mathematics

Course Contents:
No. Hrs.
1 Introduction: Digital Image Processing, Fundamental 4
Steps in Digital Image Processing, components of Digital
Image Processing Systems.
2 Digital Image Fundamentals: Elements of Visual 6
Perception, Image Sensing and Acquisition, Image
Sampling and Quantization, Basic Relationship Between
Pixels, Linear and Non linear Operations.
3 Image Enhancement in Spatial Domain: Basic Gray 9
Level Transformation, Histogram Processing,
Enhancement Using Arithmetic and Logic Operations,
Spatial Filtering, Smoothing and Sharpening Spatial
Filters.
4 Image Enhancement in Frequency Domain: 9
Smoothing Frequency Domain Filters, Sharpening
Frequency Domain Filters, Homomorphic Filtering.
5 Image Restoration: Noise Models, Restoration in the 8
presence of noise-only Spatial Filtering, Periodic Noise
reduction by Frequency Domain Filtering, Linear Position
invariant Degradation, Estimating Degradation Function,
Inverse Filtering, Minimum Mean Square Error Filtering,
Constrained Least Squares Filtering, Geometric Mean
Filter, Geometric Transformations.
6 Color Image Processing: Color Fundamentals, Color 8
Models, Pseudo color Image processing, Basics of Full
color Image Processing, Color Transformations,
Smoothing and Sharpening concept,
7 Image Segmentation: Detection of Discontinuities, Edge 8
Linking and Boundary Detection, Thresholding, Region-
Based Segmentation.
Activity beyond Syllabus: Seminar, Simulation based Project
Reference Books:
1) C Gonzalez and Richard E Woods, Rafael, “Digital Image Processing”, 2/e,
Pearson Education, 2005.
2) Anil K Jain, “Fundamentals of Digital Image Processing”, Pearson Education,
PHI, 2001
3) B Chanda and D Dutta Majumdar, “Digital Image Processing and Analysis”,
PHI, 2003.
15UECE643 Artificial Neural Network (4 - 0 - 0) 3 : 52 Hrs.

Artificial Neural Networks is an elective theory course at undergraduate VI semester
level. Knowledge of algebra, calculus and programming is required as prerequisite.
The course focuses on the basic neural network architectures and learning algorithms.
Applications of these will be discussed.
Course outcomes:
Mapping to Pos (1,12) / PSOs (13,14)
Upon the completion of the
CO Level 3 Level 2 Level 1
course, the student will be able to
Understand the role of neural
networks in engineering, artificial
CO-1 1
intelligence and Learn basic
neural network architecture.
Understand the differences
CO-2 between networks for supervised 2
and unsupervised learning.
Design single and multi-layer
CO-3 3
feed-forward neural networks.
Develop and train radial-basis

CO-4 1
function networks.
Analyze the performance of

CO-5 2
neural networks.
Apply the known techniques to

CO-6 1 14
various optimization problems.
PO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping Level 2.33 3 2 - - - - - - - - - - 1
Pre-requisite: Algebra and Calculus
Course Contents:
No. Hrs.
1 INTRODUCTION: What is a Neural Network?, Human Brain, Models 6
of a Neuron, Neural Networks Viewed as Directed Graphs, Feedback,
Network Architectures, Knowledge Representation, Artificial
Intelligence and Neural Networks.
2 LEARNING PROCESSES: Introduction, Error-Correction Learning, 10
Memory-Based Learning, Hebbian Learning, Competitive Learning,
Boltzmann Learning, Credit Assignment Problem, Learning with a
Teacher, Learning without a Teacher, Learning Tasks, Memory,
Adaptation, Statistical Nature of the Learning Process, Statistical
Learning Theory, Probably Approximately Correct Model of Learning.
3 SINGLE LAYER PERCEPTRONS: Introduction, Adaptive Filtering 7
Problem, Unconstrained Optimization Techniques, Linear Least-
Squares Filters, Least-Mean-Square Algorithm, Learning Curves,
Learning Rate Annealing Techniques, Perceptron, Perceptron
Convergence Theorem, Relation Between the Perceptron and Bayes
Classifier for a Gaussian Environment.
4 MULTILAYER PERCEPTRONS: Introduction, Some Preliminaries, 12
Back-Propagation Algorithm, Summary of the Back-Propagation
Algorithm, XOR Problem, Heuristics for Making the Back-Propagation
Algorithm Perform Better, Output Representation and Decision Rule,
Computer Experiment, Feature Detection, Back-Propagation and
Differentiation, Hessian Matrix, Generalization, Approximation of
Functions, Cross-Validation, Network Pruning Techniques, Virtues and
Limitations of Back-Propagation Learning, Accelerated Convergence of
Back-Propagation Learning, Supervised Learning Viewed as an
Optimization Problem, Convolutional Networks.
5 RADIAL-BASIS FUNCTION NETWORKS: Introduction, Cover‟s 9.

Theorem on the Separability of Patterns, Interpolation Problem,
Supervised Learning as an Ill-Posed Hypersurface Reconstruction
Problem, Regularization Theory, Regularization Networks, Generalized
Radial-Basis Function Networks, XOR Problem, Estimation of the
Regularization Parameter, Approximation Properties of RBF Networks,
Comparison of RBF Networks and Multilayer Perceptrons, Kernel
Regression and its Relation to RBF Networks, Learning Strategies.
6 PRINCIPAL COMPONENTS ANALYSIS: Introduction, Some Intuitive 8
Principles of Self-Organization, Principal Components Analysis,
Hebbian-Based Maximum Eigenfilter, Hebbian-Based Principal
Components Analysis, Computer Experiment: Image Coding, Adaptive
Principal Components Analysis Using Lateral Inhibition, Two Classes of
PCA Algorithm, Batch and Adaptive Methods of Computation, Kernel-
Based Principal Components Analysis.
Reference Books:
1. Simon Haykin, “Neural Networks-A Comprehensive Foundation”,
Second Edition, Pearson Education, 2007.
2. B. Yegnanarayana, “Artificial Neural Networks”, Prentice Hall, 2006.
3. Laurene Fausett, “Fundamentals of Neural Networks- Architectures,
Algorithms and Applications”, Pearson Education, 2004.
4. Robert J. Schalkoff, “Artificial Neural Networks", McGraw-Hill, 1
1997.
5. S. N. Sivanandam, S. Sumathi, S. N. Deepa “Introduction to Neura
Networks using MATLAB 6.0", McGraw-Hill, 2007.

Ece

Transféré par

Informations du document

Copyright

Formats disponibles

Partager ce document

Partager ou intégrer le document

Options de partage

Avez-vous trouvé ce document utile ?

Ce contenu est-il inapproprié ?

Droits d'auteur :

Formats disponibles

Ece

Transféré par

Droits d'auteur :

Formats disponibles

College vision mission

 Encouraging intellectual, quality, ethical and creative pursuits amongst

Department of Electronics & Communication Engineering

Fostering excellence in the field of Electronics & Communication

 To provide quality education in the domain of Electronics & Communication

PROGRAM SPECIFIC OUTCOMES (PSOs)

1- Introductory (Slight) 2 - Reinforce (Moderate) 3- Mastering (Substantial)

Activity beyond Syllabus:

15UECC501 Digital Signal Processing (4-0-0) 4 : 52 Hrs.

CO Upon completion of the Mapping to POs (1,12) / PSOs (13,14)

Pre-requisites: Signals and Systems and Engineering Mathematics

15UECC502 Digital Communication (4-0-0) 4 : 52 Hrs.

Course Learning Objectives: Digital Communication is a core theory course at

 Analog Communication and Signals and Systems

Activity beyond Syllabus: Simulation of various modulation techniques using

Course Learning Objectives: CMOS VLSI Design is a core theory course at V

1- Introductory (Slight) 2 - Reinforce (Moderate) 3- Mastering (Substantial)

Pre-requisites: Analog Electronics, Network Analysis and Digital Circuits.

Activity Beyond Syllabus:

Course Learning Objectives: Microcontroller & VLSI laboratory is for V semester

1) Inverter, Buffer, Transmission gate, Basic / Universal gates.

15UECL505 DSP Laboratory (0-0-2) 1 : 36 Hrs.

Course Learning Objectives: DSP Laboratory is a lab course at undergraduate

Mapping Level 2.2 2.5 3 - - - - - - - - - - -

15UECE510 Object Oriented Programming using C++ (4-0-0) 3: 52 Hrs

1- Introductory (Slight)2 - Reinforce (Moderate) 3- Mastering (Substantial)

15UECE511 Advanced Digital System Design (4-0-0) 3 : 52 Hrs.

Course Learning Objectives: Advanced Digital System Design is an elective

Mapping levels 1.16 2.25 3 3 2 - - - - - -- - 3 3

Pre-requisites: Digital circuits &. Basic Electronics

2 Designing with Programmable Logic Devices: Read 9

3 Design of Networks for Arithmetic Operations: Design 9

5 Floating Point Arithmetic: Representation of Floating 7

6 Designing with Programmable gate arrays and 8

7 Hardware Testing and Design for Testability: Testing 7

Activity beyond Syllabus:

15UECE512 Digital Switching Systems (4-0-0) 3 :52 Hrs.

CO Upon completion of the course, the Mapping to POs (1,12) / PSOs

CO-1 Describe the evolution and history of

 Analog Communication and Digital Communication

Chapter Chapter contents No of

2 Switching & Signaling for analog Telephone networks – 6

3 Electronic Space Division Switching: Stored Program 12

4 Time Division Switching: Basic Division Space and Time 10

5 Traffic Engineering: Introductory terminology – Blockage, 8

1) Thyagarajan Viswanathan, “Telecommunication Switching Systems and

15UECE513 Speech Processing (4-0-0) 3 : 52 Hrs.

Course Learning Objectives:

CO Upon completion of the course, the Mapping to POs (1-12) / PSOs

 Engineering Mathematics and Signals & Systems.

Chapter Chapter contents No. of

2 Time-domain Methods for Speech Processing: Time 7

3 Frequency Domain Methods for Speech Processing: 8

4 Linear Predictive Coding of Speech: Basic principles of 8

5 Homomorphic Speech Processing: Introduction, 7

6 Speech Synthesis: Principle, Synthesis Based on Waveform 7

7 Speech Recognition: Principles of Speech Recognition, 8

Activity beyond Syllabus:

Course Learning Objectives:

Chapter Chapter contents No of

2 System Verilog Literal Values and Built-in Data Types: 9

4 System Verilog Procedural Blocks, Tasks and 9

5 Verification Guidelines: The Verification Process, The 9

6 Connecting the Test bench and Design: Separating the 10