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ECE 172


Digital Systems

Chapter 2.2
Review:
Ring Counter, Johnson Counter

Herbert G. Mayer, PSU


Status 7/14/2018

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Syllabus

l  Ring Counter
l  Parallel Output Ring Counter
l  Ring Counter via D Flip-Flops
l  Timing Diagram of Ring Counter
l  Johnson Counter
l  Ring vs. Johnson Counter Table
l  Pros and Cons

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Ring Counter


Pictures and flow of ideas taken from [1]

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Counter
l  When the output of a shift register array is fed
back to its input, result is a ring counter
l  Data pattern contained within shift register
will recirculate as long as clock pulse applied
l  Constant data pattern will repeat every n
clock pulses in n-bit shift register; see below
for n = 4
l  But necessary first to load some data pattern
l  Initializing all 0’s or all 1’s doesn’t count ☺
l  How useful is such a simple, continuously
looping digital signal pattern?
l  May be used for counting, count reduction via
division, integer modulo operation
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Abstract 4-bit Ring Counter

Ring Counter via Shift Registers, 4-bit modulo counter:


Possible to Initialize via parallel inputs DA .. DD
Or serially via bit-string input at DA
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Ring Counter
l  Above abstract 4-bit ring counter
implemented as sequence of 4 Flip-Flops
l  May be JK or D Flip-Flops
l  Initialization may happen serially via DA
input, costing 4 separate clock cycles
l  Or in parallel, costing 1 cycle, via array of
inputs DA .. DD
l  Initial pattern repeats itself every 4 clocks
l  Number of Flip-Flops 4 is arbitrary, same
logic for any number of components
l  Likely cases 16, 32, or 64

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Abstract 4-bit Ring Counter

Abstract Ring Counter, 4 bits, showing parallel outputs.


Same repeated pattern of 4 bits every 4 clocks
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Parallel Output Ring Counter
l  Above abstract 4-bit ring counter functions
like the earlier
l  Yet shows possible parallel outputs QA .. QD
l  In addition to sequential output at QD of last
D Flip-Flop, serially 1 bit per clock cycle
l  “Ring” again implemented via direct
feedback from last output to first input
l  If we “interpret” bit sequence of Flip-Flop as
binary number, we’d have to invert order of
the powers of 2
l  Leftmost 1 digit to be viewed lowest power
l  Bit string is 1 0 0 0, decimal value: 1, as in 20
l  Next cycle yields 0 1 0 0, value: 2, as in 21
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Ring Counter via D Flip-Flops

Each of 4 bits of Ring Counter via D Flip-Flop:


Output Q of FFD back to input D of FFA
Read all 4 outputs in parallel QA .. QD, or serially at QD
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Timing Diagram of Ring Counter
l  Assuming 4 bits and initialization pattern of
1 0 0 0 for 4 bits, input pattern repeats every
4 cycles at output
l  5 ½ cycles shown, to emphasize repeat of 1

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Johnson Counter


Taken from [2]

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Johnson Counter Def:
l  A Johnson Counter is a modified ring
counter, whose inverted output of last Flip-
Flop becomes input to the first
l  Interestingly, the MOD of the Johnson
Counter is 2 * n, with n being number of bits,
i.e. number of Flip-Flops used

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Johnson Counter
l  Named after Robert Royce Johnson, US
inventor, 1928 - 2016
l  Johnson Counter, AKA “Johnson Ring
Counter”, AKA “Twisted Ring Counter”
l  Similar to Ring Counter above
l  But instead of using the output Q of last D
Flop-Flop as input, inverted output Q’
becomes input of first Flip-Flop
l  Model here uses 4 Flip-Flops
l  Initial pattern of 1 0 0 0 of 4 input bits creates
1 output at Q’ of last (or 4th ) D Flip-Flop,
which is then fed into input of 1st D Flip-Flop
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Johnson Counter Table

Johnson uses inverted output QD’ of D Flip-Flop as


Feedback into first Flip-Flop Input D
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Johnson Counter

Inverted Output Q’ of FFD into Input D of FFA

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Johnson Counter
l  Johnson 4-bit ring counter streams blocks
of four 0s followed by four 1s
l  Thus producing an 8-bit pattern with 4 Flip-
Flops
l  Inverted output Q’ is connected to D input
l  Thus an 8-bit pattern continually repeats
l  Example: “1000”, “1100”, “1110”, “1111”,
“0111”, “0011”, “0001”, “0000”, “1000” etc.
l  Circuit above shows such a Johnson
Counter
l  Next table show Ring- and Johnson Counter

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Ring vs. Johnson Counter Table

Ring Counter and Johnson Counter Truth Table:



Johnson Counter has 8 States with 4 Flip-Flops!
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Pros and Cons
l  Johnson Ring counters used in ASIC and
FPA design
l  Goal to create FSAs
l  Binary counter would required more
complex adder circuit, using more
components than a ring counter
l  Adder has higher propagation delay:
l Delay steps for adder increase with number of
digits
l Propagation delay for Ring Counter is nearly
constant, regardless of number of bits

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Pros and Cons
l  Ring Counter can represent only n states,
with n = number of bits (Flip-Flops)
l  Johnson Ring counters can represent 2 * n
states
l  Binary adder can represent 2n states
l  Johnson can “self-initialize” to all 0 state!
l  Ring- as well as Johnson Flip-Flop only
have a limited number states

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Bibliography
1.  Wiki for Ring Counter: https://
www.allaboutcircuits.com/textbook/digital/
chpt-12/ring-counters/
2.  Wiki for Johnson counter: https://
www.electronics-tutorials.ws/sequential/
seq_6.html
3.  Regular and Johnson ring counter together:
https://en.wikipedia.org/wiki/Ring_counter
4.  Robert Joyce Jophnson: https://
en.wikipedia.org/wiki/
Robert_Royce_Johnson
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