Ducati2 SCH 20140506 0930 PDF

5 4 3 2 1
CONTENTS 22.4V (TYP)
01_Block Diagram
02_SOC(LPDDR3-1)
Ducati2 Block Diagram Boost Converter
RT8567AGQW-GP
INPUTS OUTPUTS
+VBATA 22.4V
03_SOC(DDI,MIPI CSI)
System Power
04_SOC(eMMC,SDIO,I2S,THERMAL)
05_SOC(USB,LPC,I2C)
PMIC BD2610GW-GP
INPUTS OUTPUTS
06_SOC(UART,SPI,GPIO,PM) +VBATA +V_VNN
07_SOC(GND)
LPDDR3 1G x2
D
08_SOC(VCC,VNN,VDDQ,+V1P2SX)
09_ SOC(Power)
H9CCNNN8KTMLBR
(LPDDR3, 1GB)
1066MHz Intel HDMI DDC Level Shifter HDMI DDC
+V_VCC
+VDDQ_VTT
D
10_SOC(Decoupling Cap)
11_LPDDR3(Channel0)
K3QF1F10DM
(LPDDR3, 1GB)
Bay Trail T +VDDQ
+V5P0S
HDMI uHDMI
+VHDMI
12_LPDDR3(Channel1)
USB PHY +V1P05S
13_LPDDR3(power) ULPI BUS +V3P3A
14_EMMC/SD Card TUSB1211 MIPI LCD +VSDIO
15_SPI Flash/Debug port +V1P2A
16_MIPI LCM CONN
USB0 MIPI-DSI 0 K&D
+V1P2S
KD080D10-31NA-A7
17_Touch Panel
18_DISP(HDMI Conn)
uUSB USB Switch
FSA9285
USB0 Valleyview-T +V1P2Sx
+V1P0SX
19_CAMERA
20_AUDIO SOC 22.4V FB1~3 +V1P0A
+V1P8SX
21_SPEAKER/DMIC/JACK
22_USB PHY
Charger 17mmx17mm 22.4 V Boost Converter
+V1P8A
Summit SMB349 +V1P8S
23_USB Conn Richtek
2090Y I2C 0 +V2P85S
24_WIFI RT8567AGQW-GP +V2P85Sx
25_GPS +VUSBPHY
Battery Thermal sensor
26_SENSOR Battery PACK Murata +VSYS_S
27_BUTTOM/ VIBRATOR
NCP15WB473F03RC MIPI-CSI 1 5M Rear Camera
C 28_PMIC (1S2P) I2C 3 OV5693, 5MP +VUSB_PHY
C
29_PMIC
Fuel gauge LiteOn:13P2BA525 CHARGER
30_PMIC MAXIM (MAX17050) SMB349
31_PMIC INPUTS OUTPUTS
32_LCM BLD 5V +VBATA
2M Front Camera
33_Charger Gyro /G Sensor Combo I2C 4 22‐nm OV2722, 2MP
34_Gauge MIPI-CSI 2 PCB LAYER
Invensense Quad Core/ Z3740 LiteOn:13P2SF205 HDI 2-4-2+
MCU6050 WIFI/BT/FM I2S 1
BGA LPDDR3‐1067 L1:Top(Signal)L5:Signal
Combo UART 1 SDMMC3 Micro SD Conn.

L2:Signal
L3:GND
L6:GND
L7:Signal
L4:Signal L8:Bottom(Signal)
AW-AH691 SDIO 2
BCM43241
GPS UART 2 I2C5 Touch Screen

FocalTech
BCM4752 FT5506
I2C 6 CH1 SPEAKER
VIBRATOR 0.6W
Bei Ruier
B PMIC I2C 1 AUDIO CODEC XHB160905B08-01 x2 B
SYSTHERM0 Thermal sensor: SOC SVID Realtek

Murata NCP15WB473F03RC ROHM (16x9x3, 0.6w, 8 ohm)
I2S 0, 2 ALC5642 CH2 SPEAKER
BD2610GW-GP-B3 PMIC_INT 0.6W
SYSTHERM1 Thermal sensor: PMIC
Murata NCP15WB473F03RC
Power rails
SYSTHERM2 Thermal sensor: Panel Digital Mic
Murata NCP15WB473F03RC GoerTek
SD07OT263-010
Battery Thermal sensor: Charger
Murata NCP15WB473F03RC
HEADPHONE & MIC
Y601
OSC-25MHZ
(Combo Jack)
I2C
Y602
OSC-32.768KHZ EMMC SPI_0
EEPROM
Rohm
BR24G32FJ eMMC SPI NOR
A A
(32Kb)
KE4CN4K6A Winbond
(16GB) W25Q64FWZPIG
Drawing Rule
H26M52003EQR (8MB) Acer Inc.
(16GB) Project: Allegro Lib Ver
Ducati2
Title: OrCAD Lib Ver
<Title>
Approved: Size: Document Number: Rev

John Chuang C {Doc} 0.1
Designer:
James Lai Date: Wednesday, May 07, 2014 Sheet: 1 of 34
5 4 3 2 1
5 4 3 2 1
SOC_VLV2
SOC_VLV2
U201A U201B
M50 H42 M0_DATA0 11 BH50 BU53 M1_DATA0 12

11 M0_CA0 N51 DRAM0_CA0 DRAM0_DQ0 M46 12 M1_CA0 BG51 DRAM1_CA0 DRAM1_DQ0 BP50
11 M0_CA1 DRAM0_CA1 DRAM0_DQ1 M0_DATA1 11 12 M1_CA1 DRAM1_CA1 DRAM1_DQ1 M1_DATA1 12
L51 J47 M0_DATA2 11 BJ51 BT52 M1_DATA2 12
11 M0_CA2 L55 DRAM0_CA2 DRAM0_DQ2 L43 12 M1_CA2 BJ55 DRAM1_CA2 DRAM1_DQ2 BP52
R49 K42 M0_DATA4 11 BE49 BR47 M1_DATA4 12
11 M0_CA4 R51 DRAM0_CA4 DRAM0_DQ4 K46 12 M1_CA4 BE51 DRAM1_CA4 DRAM1_DQ4 BR49
P50 J45 M0_DATA6 11 BF50 BT48 M1_DATA6 12
11 M0_CA6 L57 DRAM0_CA6 DRAM0_DQ6 G43 12 M1_CA6 BJ57 DRAM1_CA6 DRAM1_DQ6 BU49
P48 B42 M0_DATA8 11 BF48 BV42 M1_DATA8 12
11 M0_CA8 T52 DRAM0_CA8 DRAM0_DQ8 C47 12 M1_CA8 BD52 DRAM1_CA8 DRAM1_DQ8 BU47
D C43 M0_DATA10 11 BU43 M1_DATA10 12 D
DRAM0_DQ10 B46 DRAM1_DQ10 BV46
DRAM0_DQ11 M0_DATA11 11 DRAM1_DQ11 M1_DATA11 12
F46 M0_DATA12 11 BP46 M1_DATA12 12
DRAM0_DQ12 F44 DRAM1_DQ12 BP44
E43 M0_DATA14 11 BR43 M1_DATA14 12
DRAM0_DQ14 F42 DRAM1_DQ14 BP42
E49 M0_DATA16 11 BK42 M1_DATA16 12
M44 DRAM0_DQ16 E47 BR51 DRAM1_DQ16 BN43
11 M0_DM0 DRAM0_DM0 DRAM0_DQ17 M0_DATA17 11 12 M1_DM0 DRAM1_DM0 DRAM1_DQ17 M1_DATA17 12
E45 D48 M0_DATA18 11 BR45 BL45 M1_DATA18 12
11 M0_DM1 E51 DRAM0_DM1 DRAM0_DQ18 C53 12 M1_DM1 BH44 DRAM1_DM1 DRAM1_DQ18 BH46
J51 C49 M0_DATA20 11 BL51 BL47 M1_DATA20 12
11 M0_DM3 Y52 DRAM0_DM3 DRAM0_DQ20 F52 12 M1_DM3 AY52 DRAM1_DM3 DRAM1_DQ20 BJ43
W57 F50 M0_DATA22 11 BA57 BM42 M1_DATA22 12
11 M0_DM5 AE55 DRAM0_DM5 DRAM0_DQ22 D52 12 M1_DM5 AR55 DRAM1_DM5 DRAM1_DQ22 BK46
AE53 H52 M0_DATA24 11 AR53 BM52 M1_DATA24 12
11 M0_DM7 DRAM0_DM7 DRAM0_DQ24 H48 12 M1_DM7 DRAM1_DM7 DRAM1_DQ24 BM48
G47 M0_DATA26 11 BN47 M1_DATA26 12
DRAM0_DQ26 L47 DRAM1_DQ26 BJ47
J49 M0_DATA28 11 BL49 M1_DATA28 12
DRAM0_DQ28 K52 DRAM1_DQ28 BK52
G49 M0_DATA30 11 BN49 M1_DATA30 12
DRAM0_DQ30 J53 DRAM1_DQ30 BL53
T50 M0_DATA32 11 BD50 M1_DATA32 12
DRAM0_DQ32 T48 DRAM1_DQ32 BD48
J57 AA49 M0_DATA34 11 BL57 AW49 M1_DATA34 12
11 M0_CS0# DRAM0_CSN0 DRAM0_DQ34 V50 12 M1_CS0# DRAM1_CSN0 DRAM1_DQ34 BB50
B56 V48 M0_DATA36 11 BV56 BB48 M1_DATA36 12
11 M0_CS2# DRAM0_CSN2 DRAM0_DQ36 AA53 12 M1_CS2# DRAM1_CSN2 DRAM1_DQ36 AW53
H58 AA51 M0_DATA38 11 BM58 AW51 M1_DATA38 12
C 11 M0_CKE0 C57 DRAM0_CKE0 DRAM0_DQ38 Y48 12 M1_CKE0 BU57 DRAM1_CKE0 DRAM1_DQ38 AY48 C
11 M0_CKE1 DRAM0_CKE1 DRAM0_DQ39 M0_DATA39 11 12 M1_CKE1 DRAM1_CKE1 DRAM1_DQ39 M1_DATA39 12
K56 U55 M0_DATA40 11 BK56 BC55 M1_DATA40 12
11 M0_CKE2 D58 DRAM0_CKE2 DRAM0_DQ40 U57 12 M1_CKE2 BT58 DRAM1_CKE2 DRAM1_DQ40 BC57
11 M0_CKE3 DRAM0_CKE3 DRAM0_DQ41 M0_DATA41 11 12 M1_CKE3 DRAM1_CKE3 DRAM1_DQ41 M1_DATA41 12
R55 M0_DATA42 11 BE55 M1_DATA42 12
DRAM0_DQ42 T54 DRAM1_DQ42 BD54
B54 Y58 M0_DATA44 11 BV54 AY58 M1_DATA44 12
11 M0_ODT0 DRAM0_ODT0 DRAM0_DQ44 AA55 12 M1_ODT0 DRAM1_ODT0 DRAM1_DQ44 AW55
C55 Y54 M0_DATA46 11 BU55 AY54 M1_DATA46 12
11 M0_ODT2 DRAM0_ODT2 DRAM0_DQ46 T58 12 M1_ODT2 DRAM1_ODT2 DRAM1_DQ46 BD58
AB54 M0_DATA48 11 AV54 M1_DATA48 12
N55 DRAM0_DQ48 AC57 BG57 DRAM1_DQ48 AU57
11 M0_CLK0_DP DRAM0_CKP0 DRAM0_DQ49 M0_DATA49 11 12 M1_CLK0_DP DRAM1_CKP0 DRAM1_DQ49 M1_DATA49 12
N57 AG55 M0_DATA50 11 BG55 AN55 M1_DATA50 12
11 M0_CLK0_DN DRAM0_CKN0 DRAM0_DQ50 AB56 12 M1_CLK0_DN DRAM1_CKN0 DRAM1_DQ50 AV56
AC55 M0_DATA52 11 AU55 M1_DATA52 12
P54 DRAM0_DQ52 AA57 BF54 DRAM1_DQ52 AW57
11 M0_CLK2_DP DRAM0_CKP2 DRAM0_DQ53 M0_DATA53 11 12 M1_CLK2_DP DRAM1_CKP2 DRAM1_DQ53 M1_DATA53 12
P56 AG57 M0_DATA54 11 BF56 AN57 M1_DATA54 12
11 M0_CLK2_DN DRAM0_CKN2 DRAM0_DQ54 AF56 12 M1_CLK2_DN DRAM1_CKN2 DRAM1_DQ54 AP56
AF52 M0_DATA56 11 AP52 M1_DATA56 12
DRAM0_DQ56 AB48 DRAM1_DQ56 AV48
AE49 M0_DATA58 11 AR49 M1_DATA58 12
DRAM0_DQ58 AF50 DRAM1_DQ58 AP50
AC51 M0_DATA60 11 AU51 M1_DATA60 12
CPU_VREF AK57 DRAM0_DQ60 AF48 DRAM1_DQ60 AP48
DRAM_VREF DRAM0_DQ61 M0_DATA61 11 DRAM1_DQ61 M1_DATA61 12
AD48 M0_DATA62 11 AT48 M1_DATA62 12
DRAM0_DQ62 AB50 DRAM1_DQ62 AV50
DDR3_REF_DN AM50
DDR3_REF_DP AM48 ICLK_DRAM_TERMN J43 BV50
ICLK_DRAM_TERMP DRAM0_DQSP0 M0_DQS0_DP 11 DRAM1_DQSP0 M1_DQS0_DP 12
K44 M0_DQS0_DN 11 BU51 M1_DQS0_DN 12
DRAM0_DQSN0 D44 DRAM1_DQSN0 BT44
B link to PMIC AK49 DRAM0_DQSP1 C45
M0_DQS1_DP 11 DRAM1_DQSP1 BU45
M1_DQS1_DP 12 B
28 DRAM_PWROK DRAM_VDD_S4_PWROK DRAM0_DQSN1 M0_DQS1_DN 11 DRAM1_DQSN1 M1_DQS1_DN 12
AK55 B50 M0_DQS2_DP 11 BL43 M1_DQS2_DP 12
28 VCCA_PWROK DRAM_CORE_PWROK DRAM0_DQSP2 DRAM1_DQSP2
C51 M0_DQS2_DN 11 MEMORY-CH1
BK44 M1_DQS2_DN 12
DRAM0_DQSN2 H50 DRAM1_DQSN2 BM50
DRAM0_DQSP3 M0_DQS3_DP 11 DRAM1_DQSP3 M1_DQS3_DP 12
DDR3_ODTPU AH48 MEMORY-CH0 G51 M0_DQS3_DN 11 BN51 M1_DQS3_DN 12
DDR3_DQPU AK51 DRAM_RCOMP2 DRAM0_DQSN3 W51 DRAM1_DQSN3 BA51
DRAM_RCOMP1 DRAM0_DQSP4 M0_DQS4_DP 11 DRAM1_DQSP4 M1_DQS4_DP 12
DDR3_CMDPU AH50 Y50 M0_DQS4_DN 11 AY50 M1_DQS4_DN 12
DRAM_RCOMP0 DRAM0_DQSN4 W55 DRAM1_DQSN4 BA55
V56 M0_DQS5_DN 11 BB56 M1_DQS5_DN 12
DRAM0_DQSN5 AD58 DRAM1_DQSN5 AT58
AE57 M0_DQS6_DN 11 AR57 M1_DQS6_DN 12
DRAM0_DQSN6 AE51 DRAM1_DQSN6 AT50
AD50 M0_DQS7_DN 11 AR51 M1_DQS7_DN 12
DRAM0_DQSN7 DRAM1_DQSN7
1 OF 12 2 OF 12
VLV2_EDS1P1 VLV2_EDS1P1
DDR3_ODTPU +VDDQ
DDR3_DQPU
DDR3_CMDPU
R204
R201 R202 R203 4.7K
162 29.4 23.2 1%
A
1% 1% 1% 0402 100K 0402 R205 DDR3_REF_DN A
0402 0402 0402 1/16W 100K 1% 1/16W DDR3_REF_DP
1/16W 1/16W 1/16W CPU_VREF 1% 1/16W Drawing Rule
R207
0402 R206
Acer Inc. Allegro Lib Ver
4.7K
Project:
1%
0402
Ducati2 OrCAD Lib Ver
1/16W
Title: 01_CPU (LPDDR3)

Designer:
5 4 3 2 1
5 4 3 2 1
SOC_VLV2
+V1P8S
U201C
D BF8 AT4 D
18 DDI0_TX0_DP BE9 DDI0_TXP[0] DDI1_TXP[0] AU3
18 DDI0_TX0_DN BE3 DDI0_TXN[0] DDI1_TXN[0] AV4 R302 C301
18 DDI0_TX1_DP BD4 DDI0_TXP[1] DDI1_TXP[1] AU5 0.1uF/NC
18 DDI0_TX1_DN DDI0_TXN[1] DDI1_TXN[1] 1K
BF4 AY4 1/16W 10V
18 DDI0_TX2_DP BE5 DDI0_TXP[2] DDI1_TXP[2] AW3 10%
18 DDI0_TX2_DN DDI0_TXN[2] DDI1_TXN[2] 1%
BA5 AU11 0402
18 DDI0_TX3_DP DDI0_TXP[3] DDI1_TXP[3] 0402
18 DDI0_TX3_DN
BB4
BC3
BD2
DDI0_TXN[3]
DDI0_AUXP
DDI0_AUXN
HDMI eDP DDI1_TXN[3]
DDI1_AUXP
DDI1_AUXN
AV10
BA11
AY10
E35 DDI1_HPD#
X5R
EMPTY
K32 DDI1HPD
18 DDI0_HPD# DDI0_HPD F36
H32 DDI1_DDC_SDA C35
18 DDI0_DDC_SDA DDI0_DDC_SDA DDI1_DDC_SCL
18 DDI0_DDC_SCL D32 K34
DDI0_DDC_SCL DDI1_VDDEN K36
J33 DDI1_BKLTEN J35
G33 DDI0_VDDEN DDI1_BKLTCTL
F34 DDI0_BKLTEN
DDI0_BKLTCTL
BB8 DDI1_ROMP# R303
DDI0_RCOMP BA9 DDI0_ROMP_P 402
DDI0_RCOMP_P 1%
0402
BC9 1/16W
BB10 ICLK_DDI0_TERMP DDI-0 DDI-1
ICLK_DDI0_TERMN
C AH10 C
AE5 MCSI_1_CLKN AG11 MCSI_1_CLK_DN 19
16 MDSI_A_CLKN AE3 MDSI_A_CLKN MCSI_1_CLKP MCSI_1_CLK_DP 19
16 MDSI_A_CLKP
AM4
MDSI_A_CLKP
MIPI Camera MCSI_1_DN[0]
AM8
AK9
MCSI_1_DATA0_DN 19
16
16
16
MDSI_A_DN_0
MDSI_A_DP_0
MDSI_A_DN_1
AK3
AM2
AN3
MDSI_A_DN[0]
MDSI_A_DP[0]
MDSI_A_DN[1]
MIPI Rear (5M) MCSI_1_DP[0]
MCSI_1_DN[1]
MCSI_1_DP[1]
AF10
AG9
AE9
MCSI_1_DATA0_DP
MCSI_1_DATA1_DN
MCSI_1_DATA1_DP
19
19
19
16 MDSI_A_DP_1 AG5 MDSI_A_DP[1] MCSI_1_DN[2] AF8
16
16
16
MDSI_A_DN_2
MDSI_A_DP_2
MDSI_A_DN_3
AF4
AG3
AH4
MDSI_A_DN[2]
MDSI_A_DP[2]
MDSI_A_DN[3]
Display MCSI_1_DP[2]
MCSI_1_DN[3]
MCSI_1_DP[3]
AC11
AD10
W11
16 MDSI_A_DP_3 AD4 MDSI_A_DP[3] MCSI_2_CLKN V12 MCSI_2_CLK_DN 19
AC3 MDSI_C_CLKN MCSI_2_CLKP MCSI_2_CLK_DP 19
MIPI-DSI MIPI-CSI
MDSI_C_CLKP AB8
MCSI_2_DN MCSI_2_DATA_DN 19
AA3 AA9
AA5
AC5
MDSI_C_DN[0]
MDSI_C_DP[0]
MIPI Camera MCSI_2_DP
MCSI_3_CLKN
AB10
AC9
MCSI_2_DATA_DP 19
MDSI_C_DN[1] MCSI_3_CLKP
AB4
Y4 MDSI_C_DP[1]
MDSI_C_DN[2]
Front (2M) MCSI_RCOMP
AF14 MCSI_COMP 150 R304 Closed to SOC
W3 0402 1% 1/16W
V4 MDSI_C_DP[2] J39
W5 MDSI_C_DN[3] MCSI_GPIO_00 K40
B34 MDSI_C_DP[3] MCSI_GPIO_01 F38
C33 MDSI_DDC_SDA MCSI_GPIO_02 E37
MDSI_DDC_SCL MCSI_GPIO_03 C39
MDSI_COMP AD12 MCSI_GPIO_04 B38
D36 MDSI_RCOMP MCSI_GPIO_05 D40
C37 MDSI_A_TE MCSI_GPIO_06 G37
B R301 MDSI_C_TE MCSI_GPIO_07 J37 CAMERA_2_PD 19 B
150 MCSI_GPIO_08 E39 CAMERA_1_PD# 19
1% Closed to SOC MCSI_GPIO_09 K38 CAMERA_1_VCM_PD# 19
0402 MCSI_GPIO_10 H38 CAMERA_2_RESET# 19
1/16W 3 OF 12 MCSI_GPIO_11
VLV2_EDS1P1
A A
Drawing Rule

Project:
Title: 03_CPU (LPDDR3_1)

Designer:
5 4 3 2 1
5 4 3 2 1
+V1P8S +V1P8S
1G Hynix 1G Samsung 2G Samsung 2G Hynix R402 R403

EMPTY
(sku1) (sku2) (sku3) (sku4) 10K 10K/NC
1% 1%
0402 0402
Low Low High MEMORY_SEL0 1/16W 1/16W
MEMORY_SEL0 High MEMORY_SEL1
High Low Low R404 R405

D
MEMORY_SEL1 High 10K/NC 10K D
EMPTY
1% 1%
0402 0402
1/16W 1/16W
SOC_VLV2
U201D
BP20 BK14
14 EMMC_CLK EMMC1_CLK/GPIO_S0_16 GPIO_S0_0 BH14 SOC_LCM_BKLT_EN 32
BJ21 GPIO_S0_1 BM12 MEMORY_SEL0 GPS_WAKEUP 25
14 EMMC_DATA_0 EMMC1_D0/GPIO_S0_17 GPIO_S0_2
14 EMMC_DATA_1 BM20 BT10 MEMORY_SEL1
EMMC
14
14
14
EMMC_DATA_2
EMMC_DATA_3
EMMC_DATA_4
BR21
BR19
BK22
EMMC1_D1/GPIO_S0_18
EMMC1_D2/GPIO_S0_19
EMMC1_D3/GPIO_S0_20
25MHz GPIO
GPIO_S0_3
GPIO_S0_4
GPIO_S0_5
BR9
BU9
BL11
GPS_POWERON 25
BU19 EMMC1_D4/GPIO_S0_21 EMMC GPIO_S0_6 BN9 MC1CD# SOC_+V2P8_CAM_EN 19

14 EMMC_DATA_5 EMMC1_D5/GPIO_S0_22 GPIO_S0_7/SD3_WP
14 EMMC_DATA_6 BJ19
BL21 EMMC1_D6/GPIO_S0_23
14 EMMC_DATA_7 EMMC1_D7/GPIO_S0_24
BU21 Closed to SOC
14 EMMC_CMD BH22 EMMC1_CMD/GPIO_S0_25 BH28 HDA_RCOMP 49.9 R406
14 EMMC_RESET# EMMC1_RESETN/GPIO_S0_26 AUDIO_RCOMP 0402 1% 1/16W
49.9 R401 EMMC_RCOMP BH24 BR27
Closed to SOC 0402 1% 1/16W EMMC1_RCOMP I2S0_CLK/GPIO_S0_8 BP28 I2S_0_CLK 20
I2S0_L_R/GPIO_S0_9 BU27 I2S_0_FS 20 Audio Codec
BU23 I2S0_TXD/GPIO_S0_10 BL27 I2S_0_TXD 20
24 SDIO2_CLK SD2_CLK/GPIO_S0_27 I2S0_RXD/GPIO_S0_11 I2S_0_RXD 20
I2S
SD-COMM
C
24 SDIO2_DATA_0 BT22 BT26 C
BM24 SD2_D0/GPIO_S0_28 I2S1_CLK/GPIO_S0_12 BK28 I2S_1_CLK 24
WiFi 24 SDIO2_DATA_1
BP22 SD2_D1/GPIO_S0_29 I2S1__L_R/GPIO_S0_13 BR25 I2S_1_FS 24 BT
24 SDIO2_DATA_2
24
24
SDIO2_DATA_3
SDIO2_CMD
BK24
BR23
SD2_D2/GPIO_S0_30
SD2_D3/GPIO_S0_31 50MHz I2S1_TXD/GPIO_S0_14
I2S1_RXD/GPIO_S0_15
BK16
BL37
I2S_1_TXD
I2S_1_RXD
24
24
SD2_CMD/GPIO_S0_32 LPE_I2S2_CLK/GPIO_S0_62 BT36 I2S_2_CLK 20

LPE_I2S2_FRM/GPIO_S0_63 BK36 I2S_2_FS 20 Audio Codec
BL25 LPE_I2S2_DATAOUT/GPIO_S0_65 BP36 I2S_2_TXD 20
14 MC1CK SD3_CLK/GPIO_S0_33 LPE_I2S2_DATAIN/GPIO_S0_64 I2S_2_RXD 20
BP24 BN3 P_RCOMP_P 402/NC R407

14 MC1DA0 SD3_D0/GPIO_S0_34 P_RCOMP_P
BK26 BM4 P_RCOMP# 0402 1% 1/16W EMPTY
14 MC1DA1 BJ25 SD3_D1/GPIO_S0_35 SD-CARD P_RCOMP
uSD 14 MC1DA2
BU25 SD3_D2/GPIO_S0_36 BR3 S_RCOMP_P 402/NC R408
14 MC1DA3 SD3_D3/GPIO_S0_37 S_RCOMP_P BT4 S_RCOMP# 0402 1% 1/16W EMPTY
14
14
MC1CD#
MC1CM
BN19
BN25
BN11
SD3_CD_N/GPIO_S0_38
SD3_CMD/GPIO_S0_39
50MHz THERMAL
S_RCOMP
PROCHOT
E33
PROCHOT# 28
30 SDMMC3_1P8_EN BK12 SD3_1P8_EN/GPIO_S0_40 BM2
14,30 SDIO_PWR_EN SD3_PWR_EN_N/GPIO_S0_41 VSS_BM2 BL3 +V1P0S
49.9 R409 SDIO3_RCOMP BH26 VSS_BL3 BT2
0402 1% 1/16W SD3_RCOMP VSS_BT2 BU3 R410
VSS_BU3 71.5
4 OF 12 1/16W
Closed to SOC 1%
VLV2_EDS1P1
0402
B B
A A
Drawing Rule

Project:
Title: 03_CPU (LPDDR3_2)

Designer:
5 4 3 2 1
5 4 3 2 1
SOC_VLV2
U201E
V10 M2
22 USB_ULPI_0_CLK USB_ULPI_CLK/GPIO_S5_31 ICLK_USB3DEV_TERMN L3
U9 ICLK_USB3DEV_TERMP
22 USB_ULPI_DATA_0
D
USB-ULPI PHY
22
22
USB_ULPI_DATA_1
USB_ULPI_DATA_2
T6
W9
USB_ULPI_DATA0/GPIO_S5_32
USB_ULPI_DATA1/GPIO_S5_33 60MHz USB3_REXT0
N9 USB3_REXT0 1.24K
0402 1%
R503
1/16W
D
T8 USB_ULPI_DATA2/GPIO_S5_34 J3
22 USB_ULPI_DATA_3 USB_ULPI_DATA3/GPIO_S5_35 USB3_RX_SS0
USB 2.00/ULPI
22 USB_ULPI_DATA_4 W7 H2
T2 USB_ULPI_DATA4/GPIO_S5_36 USB3_RX_SS0_P
22 USB_ULPI_DATA_5 USB_ULPI_DATA5/GPIO_S5_37
22 USB_ULPI_DATA_6 U3 L9
U5 USB_ULPI_DATA6/GPIO_S5_38 USB3_TX_SS0 M8
22 USB_ULPI_DATA_7 USB_ULPI_DATA7/GPIO_S5_39 USB3_TX_SS0_P
T10
22 USB_ULPI_DIR USB_ULPI_DIR/GPIO_S5_40
V8
22 USB_ULPI_NXT USB_ULPI_NXT/GPIO_S5_41
T12 +V1P8S
22 USB_ULPI_0_STP C13 USB_ULPI_STP/GPIO_S5_42 USB 3.0
22 USB_ULPI_REFCLK USB_ULPI_REFCLK/GPIO_S5_43 N3
D2 ICLK_USB3_TERMN M4
MICROUSB 22 USB2_CPU_P0_DP USB_DP0 ICLK_USB3_TERMP
22 USB2_CPU_P0_DN C3 R505
USB_DN0 M10 USB3_REXT1 1.24K R504 10K/NC
D4 USB3_REXT1 0402 1% 1/16W 1%
link to XDP for debug 15 USB2_DEBUG_DP
E3 USB_DP1 H4 0201
15 USB2_DEBUG_DN USB_DN1 USB3_RX_SS1 G3 TOUCH_RESET# 1/16W
+V1P8S E5 USB3_RX_SS1_P EMPTY
F4 USB_DP2 J9
USB_DN2 USB3_TX_SS1 K8
D6 USB3_TX_SS1_P
C5 USB_DP3 USB 2.0
1/16W USB_DN3
C501 R506 0402 1K 1% R501 CLK_USB_REF_DN G7
0.1uF/NC 10K 0402 1K R507 CLK_USB_REF_DP H6 ICLK_USB_TERMN
10V 1% 1% 1/16W ICLK_USB_TERMP E13 GPIO_RCOMP18 49.9 R508 Closed to SOC
10% 0402 USB_OC0# F24 RCOMP18 0402 1% 1/16W
C 0402 1/16W WL_DEV_EN B24 USB_OC0_N/GPIO_S5_19 BP12 C
X5R 24 WL_DEV_EN USB_OC1_N/GPIO_S5_20 GPIO_S0_55 BU11 CH_DISABLE_R 33
EMPTY 45.3 R509 USB_RCOMP H8 GPIO_S0_56 BU13 UART3_SW 21
0402 1% 1/16W J7 USB_RCOMPO GPIO_S0_57/UART3_TXD BR13 UART_3_TXD 15,21
GPIO
R510 USB_RCOMPI GPIO_S0_58 BP14 BT_DEV_RESET# 24
100K/NC GPIO_S0_59 BU15 LCM_RST# 16
1% GPIO_S0_60 BT14 TOUCH_RESET# 17
GPIO_S0_61/UART3_RXD UART_3_RXD 15,21
0402 N5
1/16W R3 USB_HSIC_0_DATA BH16
EMPTY USB_HSIC_0_STROBE GPIO_S0_54 USB_ULPI_0_CS 22
P4 USB-HSIC
T4 USB_HSIC_1_DATA BJ30
USB_HSIC_1_STROBE SIO_I2C0_SDA/GPIO_S0_78 I2C_0_SDA 5,33,34
BK32 FUEL GAUGE 0x36
47.5 R511 USB_HSIC_RCOMP T14 SIO_I2C0_SCL/GPIO_S0_79 I2C_0_SCL 5,33,34 Charger 0x35
0402 1% 1/16W USB_HSIC_RCOMP BR30
SIO_I2C1_SDA/GPIO_S0_80 I2C_1_SDA 5,16,20
BL33 Codec 0x34
49.9 R512 LPC_RCOMP BH18 SIO_I2C1_SCL/GPIO_S0_81 I2C_1_SCL 5,16,20
0402 1% BK18 ILB_LPC_RCOMP BM32
15 LPC_AD0 ILB_LPC_AD0/GPIO_S0_42 SIO_I2C2_SDA/GPIO_S0_82 I2C_2_SDA 5,22
1/16W 15 LPC_AD1 BL19 BJ33 FSA9285 0x25
ILB_LPC_AD1/GPIO_S0_43 SIO_I2C2_SCL/GPIO_S0_83 I2C_2_SCL 5,22
15 LPC_AD2 BR15
BP16 ILB_LPC_AD2/GPIO_S0_44 LPC
I2C
BN33
15 LPC_AD3 ILB_LPC_AD3/GPIO_S0_45 SIO_I2C3_SDA/GPIO_S0_84 I2C_3_SDA 5,19 Front CAM 0x36
15 LPC_FRAME# BT18 BH34 Rear CAM 0x50
ILB_LPC_FRAME_N/GPIO_S0_46 SIO_I2C3_SCL/GPIO_S0_85 I2C_3_SCL 5,19
BR17
BL17 ILB_LPC_CLK0/GPIO_S0_47 BU30
15 LPC_CLKOUT_1 ILB_LPC_CLK1/GPIO_S0_48 SIO_I2C4_SDA/GPIO_S0_86 I2C_4_SDA 5,26
BU17 BU33 Gyro 0x68
15 LPC_CLKRUN# BR11 ILB_LPC_CLKRUN_N/GPIO_S0_49 SIO_I2C4_SCL/GPIO_S0_87 I2C_4_SCL 5,26
15 LPC_SERIRQ ILB_LPC_SERIRQ/GPIO_S0_50 BT32
SIO_I2C5_SDA/GPIO_S0_88 I2C_5_SDA 5,17
BP34 Touch Screen 0x70
BN15 SIO_I2C5_SCL/GPIO_S0_89 I2C_5_SCL 5,17
B 24 WIFI_PWR_EN BL15 GPIO_S0_51 BR33 B
GPIO I2C_6_SDA 5,28
24 BT_WAKE BM14 GPIO_S0_52 SIO_I2C6_SDA/GPIO_S0_90/NMI BK34 PMIC 0x5E
24 BT_DEV_EN GPIO_S0_53 SIO_I2C6_SCL/GPIO_S0_91/SD3_WP I2C_6_SCL 5,28
BK40
R513 SIO_I2C_NFC_SDA/GPIO_S0_92 BR39
100K/NC 5 OF 12 SIO_I2C_NFC_SCL/GPIO_S0_93
1%
VLV2_EDS1P1
0402 +V1P8S
1/20W
Empty
R524 R525
1K 1K
R514 R515 R516 R517 R518 R519 R520 R521 R522 R523 R526 R527
2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 0402 0402 2.2K 2.2K
1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1%
1% 1%
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
1/16W 1/16W
I2C_0_SCL 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
5,33,34 I2C_0_SCL
I2C_0_SDA
5,33,34 I2C_0_SDA
I2C_1_SCL
5,16,20 I2C_1_SCL
I2C_1_SDA
5,16,20 I2C_1_SDA
I2C_2_SCL
5,22 I2C_2_SCL
I2C_2_SDA
5,22 I2C_2_SDA
I2C_3_SCL
5,19 I2C_3_SCL
I2C_3_SDA
5,19 I2C_3_SDA
I2C_4_SCL
5,26 I2C_4_SCL
I2C_4_SDA
5,26 I2C_4_SDA
I2C_5_SCL
A 5,17 I2C_5_SCL A
I2C_5_SDA
5,17 I2C_5_SDA
I2C_6_SCL Drawing Rule
5,28
5,28 I2C_6_SCL
I2C_6_SDA
I2C_6_SDA
Project:
Title: 05_CPU (USB/HSIC/LPC/HIS/I2C)

Designer:
5 4 3 2 1
5 4 3 2 1
SOC_VLV2
U201F
SOC_XTAL_IN AR7 BV38

1M R602 SOC_XTAL_OUT AT8 ICLK_OSCIN SIO_UART1_RXD/GPIO_S0_70 BL39 UART_BT_RXD 24
0402 1% 1/16W ICLK_OSCOUT SIO_UART1_TXD/GPIO_S0_71 BU39 UART_BT_TXD 24
iCLK
SIO_UART1_RTS_N/GPIO_S0_72 BK38 UART_BT_RTS# 24 BT
ICLK_ICOMP AK14 SIO_UART1_CTS_N/GPIO_S0_73 UART_BT_CTS# 24
HSUART
1 4 ICLK_RCOMP AH12 ICLK_ICOMP BM38
D D
2 1 4 3 ICLK_RCOMP SIO_UART2_RXD/GPIO_S0_74 BP38 UART_GPS_RXD 25
2 3 SIO_UART2_TXD/GPIO_S0_75 BU37 UART_GPS_TXD 25
Y601 SIO_UART2_RTS_N/GPIO_S0_76 BR37 UART_GPS_RTS 25 GPS +VRTC
25MHz SIO_UART2_CTS_N/GPIO_S0_77 UART_GPS_CTS 25
C602 C601 R603 R601
15pF 15pF 4.02K 47.5 H24
50V 50V 1% 1% PMC_SUSPWRDNACK/GPIO_S5_11 F22 SUS_PWRDOWNACK 28 R604
1% 1% 0402 0402 PMU_SUSCLK/GPIO_S5_12 J21 20K
0402 0402 1/16W 1/16W PMU_SLP_S0IX_N/GPIO_S5_13 K20 SLP_S0IX# 15,18,28 1%
NPO NPO PMU_SLP_S4 D22 SLP_S4# 15,28 0402
PMU_SLP_S3 C21 SLP_S3# 15,28 SRT_CRST# 1/16W
GPIO_S5_14/ULPI_RESET E21 USB_ULPI_RST# 22
PMU_AC_PRESENT K22 AC_PRESENT 28 C603
PMU/GPIO
GPIO_S5_15 E23 WLAN_HOST_WAKE 24 1uF
PMU_BATLOW C23 PMU_BATTLOW# 28 10V
PMU_PWRBTN_N/GPIO_S5_16 BN7 SOC_PWRBTN# 28 10%
1/16W 1% PMU_RSTBTN H20 DBG_RESETBTN# 15 0402
R605 22R 0402 PLT_CLK1_CAM1_R BP8 PMU_PLTRST J23 PLTRST# 15,28 X5R
19 PLT_CLK1_CAM1 R606 22R 0402 PLT_CLK1_CAM2_R BR7 PMC_PLT_CLK0/GPIO_S0_96 GPIO_S5_17 F20 BT_HOST_WAKE 24
19 PLT_CLK1_CAM2 1/16W 1% BU7 PMC_PLT_CLK1/GPIO_S0_97 PMU_SUS_STAT_N/GPIO_S5_18 FG_ALERT 34
PLATFORM CLOCK
CLK_I2S_MCLK BT6 PMC_PLT_CLK2/GPIO_S0_98
20 CLK_I2S_MCLK BV4 PMC_PLT_CLK3/GPIO_S0_99 D10 RTC_XTAL_OUT
BU5 PMC_PLT_CLK4/GPIO_S0_100 ILB_RTC_TEST SOC_RTEST# 15,28
PMC_PLT_CLK5/GPIO_S0_101 C9 RTC_XTAL_IN 10M R607
PMC_RSMRST RSMRST# 15,28
G9 0402 1% 1/16W
C11 PMC_CORE_PWROK CORE_PWROK 15,28
15 XDP_H_TCK H12 TAP_TCK G11 Y602
15 XDP_H_TRST# TAP_TRST ILB_RTC_RST SRT_CRST# 15
K12 RTC B8 RTC_XTAL_IN 2 1
C 15 XDP_H_TMS E11 TAP_TMS ILB_RTC_X1 C7 RTC_XTAL_OUT C
15 XDP_H_TDI J11 TAP_TDI TAP PORT/ITP ILB_RTC_X2 E9 BRTC_EXTPAD 0.1uF C604 32.768KHz
15 XDP_H_TDO B12 TAP_TDO ILB_RTC_EXTPAD 16V 10% C605 C606
15 XDP_H_PRDY# F12 TAP_PRDY 0402 X5R 12pF 12pF
15 XDP_H_PREQ# TAP_PREQ E30 SVID_ALERT#_R R608 1 2 22R 1% R0402 50V 50V
SVID SVID_ALERT B28 SVID_DATA_R R609 1 2 22R 1% R0402 SVID_ALERT# 28 1% 1%
SVID_DATA C30 SVID_DATA 28 0402 0402
C27 SVID_CLK SVID_CLK 28 NPO NPO
15 SOC_SPI_CS# J27 PCU_SPI_CS0 BN37
31 PWR_3P3_SX_EN K28 PCU_SPI_CS1_N/GPIO_S5_21 SPI NOR PWM SIO_PWM0/GPIO_S0_94 BJ37
15 SOC_SPI_MISO E27 PCU_SPI_MISO SIO_PWM1/GPIO_S0_95
15 SOC_SPI_MOSI F28 PCU_SPI_MOSI
15 SOC_SPI_CLK PCU_SPI_CLK
B16
GPIO_S5_22 J17 LCM_3P3V_EN 16
+V1P8S GPIO_S5_23 SOC_DFX_GPIO1 15
E17 K18 SOC_DFX_GPIO2 15
28 PMIC_INT GPIO_S5_0 GPIO_S5_24
K14 F16 SOC_DFX_GPIO3 15
22 FSA9285_INT#_R GPIO_S5_1 GPIO_S5_25
C17 C15 SOC_DFX_GPIO4 15
28,33 GPIO_SUS2 GPIO_S5_2 GPIO_S5_26
E19 E15 JACK_DET# 20,21 +V1P8S +V1P8S
26 GPIO_SUS3 GPIO_S5_3 GPIO GPIO GPIO_S5_27
D18 K16
R619 20 GPIO_SUS4 GPIO_S5_4 GPIO_S5_28 CHG_OTG 33
F14 G19
100K 24 SUS_CLK_WLAN GPIO_S5_5 GPIO_S5_29 LCM_1P8V_EN 16
D14 J19 R620 R621
1% 17 TOUCH_INT# GPIO_S5_6 GPIO_S5_30 EN_V5P0S 31 EMPTY
J15 10K 10K/NC
HW_Board_ID025 SUS_CLK_GPS G15 GPIO_S5_7 1% 1%
1/16W GPIO_S5_8
HW_Board_ID1 H14 0402 0402
C19 GPIO_S5_9 HW_Board_ID0 1/16W 1/16W
16 LCM_ID GPIO_S5_10 BL35 HW_Board_ID1
SIO_SPI_CS_N/GPIO_S0_66 TOUCH_ID 17
BH36
B SPI SIO_SPI_MISO/GPIO_S0_67 BR35 B
SIO_SPI_MOSI/GPIO_S0_68 R622 R623
BU35
SIO_SPI_CLK/GPIO_S0_69 10K/NC 10K
EMPTY
1% 1%
6 OF 12 0402 0402
1/16W 1/16W
VLV2_EDS1P1
V0.1 V0.2 V0.3 V0.4
HW_Board_ID0 Low High Low Low

R617
+V1P8A
RSMRST#
100K 1% HW_Board_ID1 Low Low High High
0402 1/16W
FG_ALERT R615 1 200K 2
1% R0402
+V1P8S +V1P8A
TOUCH_INT# R616 10K

1/16W 1% 0402
A
R610 1 2 51R 1% R0402 XDP_H_TMS A
EMPTY 10pF/NC C607 PLT_CLK1_CAM1 R611 1 2 51R 1% R0402 XDP_H_TDI
C0402 +V1P8S R612 1 2 51R/NC R0402 XDP_H_TDO Drawing Rule
EMPTY
EMPTY
10pF/NC
C0402
10pF/NC
C608
C609
PLT_CLK1_CAM2
CLK_I2S_MCLK
TOUCH_ID R618
1/16W
100K
1% 0402
EMPTY
R613 1
1%
2 51R 1% R0402 XDP_H_TCK

C0402 R614 1 2 51R 1% R0402 XDP_H_TRST#
Project:
Title: 06_CPU (CLK/ITP/SPI/MISC/PMU)

Designer:
5 4 3 2 1
5 4 3 2 1
SOC_VLV2
U201L
SOC_VLV2
U201G U201H SOC_VLV2 U201I SOC_VLV2
V2 A39
F8 VSS VSS A5 BW53 BJ27 AY56 AK24 Y10 L19
E1 VSS VSS A55 BW51 VSS VSS BJ23 AY12 VSS VSS AK18 Y8 VSS VSS L17
C1 VSS VSS A7 BW49 VSS VSS AP14 AY8 VSS VSS AK16 Y6 VSS VSS L15
BW55 VSS VSS AD38 BW47 VSS VSS BJ17 AY6 VSS VSS AK11 Y2 VSS VSS L13
BW3 VSS VSS AK1 BW45 VSS VSS BJ13 AW46 VSS VSS AK5 W53 VSS VSS L11
BV2 VSS VSS AT10 BW37 VSS VSS BJ11 AW42 VSS VSS AH56 W49 VSS VSS L7
BU1 VSS VSS BH40 BW30 VSS VSS BJ7 AW23 VSS VSS AH52 W45 VSS VSS L5
BR1 VSS VSS BH58 BW25 VSS VSS BJ1 AM54 VSS VSS AH46 W43 VSS VSS L1
B2 VSS VSS BJ15 BW19 VSS VSS BH56 AW17 VSS VSS AH42 W41 VSS VSS K58
D D
AU9 VSS VSS BK20 BW15 VSS VSS BH52 AW11 VSS VSS AH29 W33 VSS VSS K54
AR9 VSS VSS BM10 BW7 VSS VSS BH42 AW9 VSS VSS AH23 W28 VSS VSS K50
AH40 VSS VSS BR53 BV52 VSS VSS BH12 AW7 VSS VSS AH17 W26 VSS VSS K48
AB2 VSS VSS BV12 BV48 VSS VSS BH8 AW5 VSS VSS AH15 W18 VSS VSS K24
A57 VSS VSS BV16 BV44 VSS VSS BH6 AV58 VSS VSS AH8 W14 VSS VSS K10
A3 VSS VSS M38 BV6 VSS VSS BG53 AV52 VSS VSS AH6 V58 VSS VSS K6
BD16 VSS VSS M58 BU41 VSS VSS BG49 AV12 VSS VSS AH2 V54 VSS VSS J41
BE57 VSS VSS P40 BT56 VSS VSS BG7 AV8 VSS VSS AG59 V52 VSS VSS J30
BF15 VSS VSS R57 BT54 VSS VSS BG5 AU53 VSS VSS AG53 V46 VSS VSS J13
BF42 VSS VSS B58 BT50 VSS VSS BF58 AU49 VSS VSS AG51 V44 VSS VSS H56
BH20 VSS VSS BF12 BT46 VSS VSS BF52 AU45 VSS VSS AG49 V42 VSS VSS H46
BH32 VSS VSS BR59 BT42 VSS VSS BF46 AU43 VSS VSS AG7 V38 VSS VSS H44
BH38 VSS VSS BU59 BT38 VSS VSS BF44 AU41 VSS VSS AF58 V34 VSS VSS H40
BV20 VSS VSS BV58 BT34 VSS VSS AM58 AU39 VSS VSS AF54 V27 VSS VSS H36
BV24 VSS VSS BW5 BT28 VSS VSS BF40 AU37 VSS VSS AF45 V19 VSS VSS H34
BV28 VSS VSS BW57 BT24 VSS VSS BF38 AU35 VSS VSS AF43 V17 VSS VSS H28
BV34 VSS VSS C59 BT20 VSS VSS BF34 AU33 VSS VSS AF41 V15 VSS VSS H22
BV8 VSS VSS E59 BT16 VSS VSS BF29 AU31 VSS VSS AF37 V6 VSS VSS H18
E53 VSS VSS H10 BT12 VSS VSS BF27 AU24 VSS VSS AF31 U59 VSS VSS H16
VSS VSS W16 BT8 VSS VSS BF25 AU18 VSS VSS AF28 U53 VSS VSS G53
VSS BR41 VSS VSS BF23 AU16 VSS VSS AF24 U51 VSS VSS G45
M12 BR5 VSS VSS BF21 AU7 VSS VSS AF18 U49 VSS VSS G41
12 OF 12 VSSA_USB BP58 VSS VSS BF19 AU1 VSS VSS AF12 U11 VSS VSS G39
BP48 VSS VSS BF17 AT56 VSS VSS AF6 U7 VSS VSS G35
VLV2_EDS1P1 VSS VSS VSS VSS VSS VSS
BP40 BF6 AT52 AE11 U1 G30
BP32 VSS VSS BE59 AT42 VSS VSS AE7 T56 VSS VSS G27
U201M SOC_VLV2 BP26 VSS VSS BE11 AT40 VSS VSS AD56 T45 VSS VSS G23
BP18 VSS VSS BE7 AT29 VSS VSS AD52 T43 VSS VSS G21
C F56 V40 BP10 VSS VSS BE1 AT25 VSS VSS AD46 T41 VSS VSS G17 C
G57 Reserved_68 Reserved_31 T39 BP6 VSS VSS BD56 AT15 VSS VSS AD44 T28 VSS VSS G13
Reserved_67 Reserved_30 AP18 BP2 VSS VSS BD45 AT12 VSS VSS AD42 T26 VSS VSS G5
E55 Reserved_7 AT17 BN53 VSS VSS BD43 AT6 VSS VSS AD54 T24 VSS VSS F58
Reserved_66 Reserved_6 BN45 VSS VSS BD41 AR5 VSS VSS AD23 T22 VSS VSS F48
E57 BN41 VSS VSS BD18 AR1 VSS VSS AD40 T20 VSS VSS F40
Reserved_65 BN39 VSS VSS BD12 AP58 VSS VSS AD17 T16 VSS VSS F32
R53 BN35 VSS VSS BD8 AP54 VSS VSS AD8 R59 VSS VSS F18
M48 Reserved_64 BN30 VSS VSS BD6 AP41 VSS VSS AD6 R11 VSS VSS F10
M54 Reserved_63 BN27 VSS VSS BC59 AP39 VSS VSS AD2 R9 VSS VSS F6
L53 Reserved_62 BN23 VSS VSS BC53 AP37 VSS VSS AC53 R7 VSS VSS F2
L49 Reserved_61 BJ5 BN21 VSS VSS BC51 AP28 VSS VSS AC49 R5 VSS VSS E41
J55 Reserved_60 Reserved_27 BJ3 BN17 VSS VSS BC49 AP24 VSS VSS AC41 P58 VSS VSS D56
H54 Reserved_59 Reserved_26 BH4 BN13 VSS VSS BC7 AH58 VSS VSS AC39 P52 VSS VSS D54
Reserved_58 Reserved_25 BK4 AR11 VSS VSS BC5 AH54 VSS VSS AC31 P46 VSS VSS D50
G55 Reserved_24 BH2 BM56 VSS VSS BB58 AP8 VSS VSS AC28 AT54 VSS VSS D46
F54 Reserved_57 Reserved_23 BG3 BM46 VSS VSS BB54 AP6 VSS VSS AC24 P38 VSS VSS D42
Reserved_56 Reserved_22 BG11 BM44 VSS VSS BB52 AN59 VSS VSS AC18 P36 VSS VSS D38
Reserved_21 BK8 BM40 VSS VSS BB46 AN53 VSS VSS AC14 P34 VSS VSS D34
BP56 Reserved_20 BF10 BM36 VSS VSS BB42 AN51 VSS VSS AC7 P25 VSS VSS D28
BN57 Reserved_55 Reserved_19 BH10 BM34 VSS VSS BB36 AN49 VSS VSS AC1 P12 VSS VSS D24
BR55 Reserved_54 Reserved_18 BJ9 BM28 VSS VSS BB34 AM56 VSS VSS AB58 P8 VSS VSS D20
BR57 Reserved_53 Reserved_17 BG9 BM26 VSS VSS BB29 AM52 VSS VSS AB52 P6 VSS VSS D16
BE53 Reserved_52 Reserved_16 BM22 VSS VSS BB27 AM46 VSS VSS AB12 N53 VSS VSS D12
BH48 Reserved_51 BM18 VSS VSS BB23 AM44 VSS VSS AB6 N49 VSS VSS D8
BH54 Reserved_50 BM16 VSS VSS BB17 AM42 VSS VSS AA46 N7 VSS VSS C41
BJ53 Reserved_49 BM8 VSS VSS BB12 AM40 VSS VSS AA42 M56 VSS VSS B52
BJ49 Reserved_48 BM6 VSS VSS BB6 AM38 VSS VSS AA40 M52 VSS VSS B48
BL55 Reserved_47 BL41 VSS VSS BA53 AM34 VSS VSS AA38 M42 VSS VSS B44
B BM54 Reserved_46 BL30 VSS VSS BA49 AM27 VSS VSS AA29 M32 VSS VSS B32 B
BN55 Reserved_45 BP4 BL23 VSS VSS BA43 AM23 VSS VSS AA27 M24 VSS VSS B20
BP54 Reserved_44 Reserved_13 BN5 BL13 VSS VSS BA37 AF16 VSS VSS AA23 M18 VSS VSS B6
Reserved_43 Reserved_12 BL9 BL7 VSS VSS BA33 AM17 VSS VSS AA15 M16 VSS VSS B4
Reserved_11 BK10 BL5 VSS VSS BA31 AM12 VSS VSS AA11 M6 VSS VSS A53
AP43 Reserved_10 BK58 VSS VSS BA26 AM6 VSS VSS AA7 L45 VSS VSS A51
AP45 Reserved_42 BK54 VSS VSS BA24 AK59 VSS VSS Y56 L41 VSS VSS A49
AT44 Reserved_41 BK50 VSS VSS BA18 AK53 VSS VSS Y12 L39 VSS VSS A47
AT46 Reserved_40 N11 BK48 VSS VSS BA16 AK43 VSS VSS L37 VSS VSS A45
Reserved_39 Reserved_5 P10 BK6 VSS VSS BA14 AK41 VSS L35 VSS VSS A37
Reserved_4 K4 BJ45 VSS VSS BA7 AK33 VSS L33 VSS VSS A27
Reserved_3 J5 BJ41 VSS VSS BA1 AK28 VSS L23 VSS VSS A15
Reserved_2 BJ39 VSS VSS VSS L21 VSS VSS A11
BJ35 VSS VSS VSS
VSS 8 OF 12
7 OF 12 VLV2_EDS1P1 9 OF 12
VLV2_EDS1P1 VLV2_EDS1P1
BD10
BC11 Reserved_38
BA3 Reserved_37 E7
AY2 Reserved_70 Reserved_1
AT2 Reserved_69
AR3 Reserved_36
Reserved_35
AN5
AM10 Reserved_78 AF39 TP_VCC_CORE1_VID_OBS
Reserved_77 Reserved_81 TP701
AN11 M34 TP_VCC_CORE2_VID_OBS
AP4 AA44 TP_DDRXXXSI3_1P5_OBS
A Reserved_75 Reserved_84 TP703 A
AN9 BB44 TP_DIGDI3SIO_1P03_OBS
AP10 AA17 TP_DIG_RAM_OBS Drawing Rule
BT40
AK7
Reserved_73
Reserved_34
Reserved_82
Reserved_80
AH38 TP_RAM_CPU0_OBS
TP705
TP706 Acer Inc. Allegro Lib Ver
AV6 Reserved_33 Project:
AN7
AC16
Reserved_32
Reserved_9
Reserved_8 Title: 07_CPU (VSS)
Customer Invisible Symbol
VLV2_EDS1P1 Approved: Size: Document Number: Rev

Designer:
5 4 3 2 1
5 4 3 2 1
+V_VCC SOC_VLV2 +V_VNN

U201J
AT34 BW13
AT32 CORE_VCC_S0IX UNCORE_VNN_S4 BW11
AP35 CORE_VCC_S0IX UNCORE_VNN_S4 BW9
AP33 CORE_VCC_S0IX UNCORE_VNN_S4 BV14
AP31 CORE_VCC_S0IX UNCORE_VNN_S4 BV10
AM36 CORE_VCC_S0IX UNCORE_VNN_S4 BN1
AM32 CORE_VCC_S0IX UNCORE_VNN_S4 BL1
AM29 CORE_VCC_S0IX UNCORE_VNN_S4 BK2
AK37 CORE_VCC_S0IX UNCORE_VNN_S4 BD39
D D
AH36 CORE_VCC_S0IX UNCORE_VNN_S4 BD33
AF35 CORE_VCC_S0IX UNCORE_VNN_S4 BD26
AF33 CORE_VCC_S0IX UNCORE_VNN_S4 BD24
AC35 CORE_VCC_S0IX UNCORE_VNN_S4 BD22
AC33 CORE_VCC_S0IX UNCORE_VNN_S4 BD20
AA36 CORE_VCC_S0IX UNCORE_VNN_S4 BB40
W37 CORE_VCC_S0IX UNCORE_VNN_S4 BB25
V36 CORE_VCC_S0IX UNCORE_VNN_S4 BA41
T37 CORE_VCC_S0IX UNCORE_VNN_S4 BA28
T35 CORE_VCC_S0IX UNCORE_VNN_S4 BA20
T33 CORE_VCC_S0IX UNCORE_VNN_S4 AW40
T31 CORE_VCC_S0IX UNCORE_VNN_S4 AW38
P32 CORE_VCC_S0IX UNCORE_VNN_S4 AW36
P29 CORE_VCC_S0IX UNCORE_VNN_S4 AW34
M28 CORE_VCC_S0IX UNCORE_VNN_S4 AW32
M26 CORE_VCC_S0IX UNCORE_VNN_S4 AW29
L30 CORE_VCC_S0IX UNCORE_VNN_S4 AW27
C K26 CORE_VCC_S0IX UNCORE_VNN_S4 AU28 C
J25 CORE_VCC_S0IX UNCORE_VNN_S4 AU26
H26 CORE_VCC_S0IX UNCORE_VNN_S4 AU22
G25 CORE_VCC_S0IX UNCORE_VNN_S4 AU20
F26 CORE_VCC_S0IX UNCORE_VNN_S4 AT27
E25 CORE_VCC_S0IX UNCORE_VNN_S4 AT23
D26 CORE_VCC_S0IX UNCORE_VNN_S4 AP26
C25 CORE_VCC_S0IX UNCORE_VNN_S4 AP22
+VDDQ B26 CORE_VCC_S0IX UNCORE_VNN_S4 AP20
B22 CORE_VCC_S0IX UNCORE_VNN_S4 AM25
B18 CORE_VCC_S0IX UNCORE_VNN_S4 AM21
A25 CORE_VCC_S0IX UNCORE_VNN_S4 AK26
A19 CORE_VCC_S0IX UNCORE_VNN_S4 AH25
A17 CORE_VCC_S0IX UNCORE_VNN_S4 AH21
+V1P2SX BA45 CORE_VCC_S0IX UNCORE_VNN_S4 AH19
AC45 DRAM_VDD_S4 UNCORE_VNN_S4 AF26
AK45 DRAM_VDD_S4 UNCORE_VNN_S4 AF22
BN59 DRAM_V1P2_S0IX_F1 UNCORE_VNN_S4 AF20
BL59 DRAM_VDD_S4 UNCORE_VNN_S4 AD34
BJ59 DRAM_VDD_S4 UNCORE_VNN_S4 AD32
BG59 DRAM_VDD_S4 UNCORE_VNN_S4 AD29
BA59 DRAM_VDD_S4 UNCORE_VNN_S4 AD27
AW59 DRAM_VDD_S4 UNCORE_VNN_S4 AD25
AU59 DRAM_VDD_S4 UNCORE_VNN_S4 AD21
AR59 DRAM_VDD_S4 UNCORE_VNN_S4 AC26
AE59 DRAM_VDD_S4 UNCORE_VNN_S4 AC22
AC59 DRAM_VDD_S4 UNCORE_VNN_S4 AC20
B AA59 DRAM_VDD_S4 UNCORE_VNN_S4 AA25 B
W59 DRAM_VDD_S4 UNCORE_VNN_S4 AA21
N59 DRAM_VDD_S4 UNCORE_VNN_S4 AA19
ROUTE AS DIFF PAIR 10 MIL L59 DRAM_VDD_S4 UNCORE_VNN_S4 W24
J59 DRAM_VDD_S4 UNCORE_VNN_S4 W22
G59 DRAM_VDD_S4 UNCORE_VNN_S4 W20
DRAM_VDD_S4 UNCORE_VNN_S4 V25
+V_VCC_SENSE AT38 UNCORE_VNN_S4 V23
30 +V_VCC_SENSE +V_VSS_SENSE AT36 VCC_SENSE UNCORE_VNN_S4 V21
30 +V_VSS_SENSE VCC_VSSSENSE UNCORE_VNN_S4 AW19
+V_VNN_SENSE BA22 UNCORE_VNN_S4 AD19
30 +V_VNN_SENSE VNN_SENSE UNCORE_VNN_S4 AM19
10 OF 12 UNCORE_VNN_S4
VLV2_EDS1P1
A A
Drawing Rule

Project:
Title: 08_CPU (VCC/VNN)

Designer:
5 4 3 2 1
5 4 3 2 1
SOC_VLV2
U201K
D +V1P0SX_S +V1P0S +V1P8S +V3P3A +VSDIO D
M36 P42
AW44 SVID_V1P0_S4 MIPI_V1P8_S4 M20
AC43 DRAM_V1P0_S0iX PCU_V3P3_G3 BW23
AH44 DRAM_V1P0_S0iX SD3_V1P8V3P3_S4 +V1P2S +V1P2A
BW43 DRAM_V1P0_S0IX AF2
BW41 DRAM_V1P0_S0IX MIPI_V1P2_S4 AG1
+V1P0SX_DIGDP BV40 DRAM_V1P0_S0IX MIPI_V1P2_S4 R1
B40 DRAM_V1P0_S0IX HSIC_V1P24_G3 +VRTC +V1P8A
A43 DRAM_V1P0_S0IX AD15
A41 DRAM_V1P0_S0IX ULPI_V1P8_G3 M22
AU14 DRAM_V1P0_S0IX RTC_VCC P27
AW1 DDI_V1P0_S0IX PMU_V1P8_G3
+V1P0A AV2 DDI_V1P0_S0IX
AW15 DDI_V1P0_S0IX
P19 DDI_V1P0_S0IX
T18 UNCORE_V1P0_G3
BW27 UNCORE_V1P0_G3 +V1P2S
BV26 VIS_V1P0_S0IX
+V1P0S VIS_V1P0_S0IX AP12
+V1P0S_PCIE_SATA ICLK_V1P24_S4_F2 AH27
AP2 UNCORE_V1P24_S0IX_F5 P44
AN1 UNCORE_V1P0_S4 UNCORE_V1P24_S0IX_F4
+V1P0S_LC_GPIO_SI0 BC1 UNCORE_V1P0_S4 BW35 +V1P2SX +V1P2S
BB2 PWR_RVD_V1P0 UNCORE_V1P24_S0IX_F2 BV36
BD14 PWR_RVD_V1P0 UNCORE_V1P24_S0IX_F2 M40
BB15 PWR_RVD_V1P0 UNCORE_V1P24_S0IX_F3 AP16
R901 +V1P0SX BG1 PWR_RVD_V1P0 UNCORE_V1P24_S0IX_F1
C 0 R902 BF2 PWR_RVD_V1P0 AM15 C
5% AT21 PWR_RVD_V1P0 ICLK_V1P24_S4_F1
0 UNCORE_V1P0_S0IX
R0402 5% AT19 +V1P8S +V1P8A
1/16W R0402 UNCORE_V1P0_S0IX BV32
SIO_V1P8_S4 BW33
1/16W SIO_V1P8_S4
M14
P2 USB_V1P0_S4 P23
N1 USB_V1P0_S4 PCU_V1P8_S4
USB_V1P0_S4 +V1P0SX +V1P0S
A9
+V1P8S +V1P05S +V1P0A BF32 VIS_V1P0_S0IX B10
GPIO_V1P0_S4 VIS_V1P0_S0IX B14
P17 VIS_V1P0_S0IX A13
P15 UNCORE_V1P0_G3 VIS_V1P0_S0IX
AK39 UNCORE_V1P0_G3 AA1
W39 CORE_V1P0_S4 USB3DEV_V1P0_S4 AC37
BF36 CORE_V1P0_S4 CORE_V1P05_S4 AD36 +V1P05S +V1P0A
BW21 LPE_V1P8_S4 CORE_V1P05_S4 A30
+V3P3SX +V1P8A +V3P3S BV22 UNCORE_V1P8_S4 CORE_V1P05_S4 A33
BW17 UNCORE_V1P8_S4 CORE_V1P05_S4 A35
BV18 LPC_V1P8V3P3_S4 CORE_V1P05_S4 B36
P21 LPC_V1P8V3P3_S4 CORE_V1P05_S4 BW39
K2 UNCORE_V1P8_G3 CORE_V1P05_S4
J1 USB_V3P3_G3 W1
USB_V3P3_G3 USB3_V1P0_G3 +V1P8A +V1P2SX
G1
USB_V1P8_G3 AE1
UNCORE_V1P24_S0IX_F6
B B
11 OF 12
VLV2_EDS1P1
A A
Drawing Rule

Project:
Title: 09_CPU (VCCIO)

Designer:
5 4 3 2 1
5 4 3 2 1
+V_VCC
Closed to Page 8
close to AK39, W39 close to BF36,BW21,BV22 +V_VNN
close to page.8
C1001 C1002 C1003 C1004 C1005 C1006 C1007 C1008 C1009
close to P42
0.47uF 0.47uF 0.47uF 0.47uF 1uF 1uF 1uF 1uF 1uF +V1P05S
6.3v 6.3v 6.3v 6.3v 6.3V 6.3V 6.3V 6.3V 6.3V +V1P8S C1010 C1011 C1012 C1013 C1014 C1015 C1016 C1017 C1018
10% 10% 10% 10% 20% 20% 20% 20% 20% 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 1uF 1uF 1uF
0402 0402 0402 0402 0402 0402 0402 0402 0402 6.3v 6.3v 6.3v 6.3v 6.3v 6.3v 6.3V 6.3V 6.3V
X5R X5R X5R X5R X5R X5R X5R X5R X5R 10% 10% 10% 10% 10% 10% 20% 20% 20%
C1022 C1023 C1024 C1025 0402 0402 0402 0402 0402 0402 0402 0402 0402
C1019 C1020 C1021 0.47uF 0.47uF 0.47uF 0.47uF X5R X5R X5R X5R X5R X5R X5R X5R X5R
0.47uF 0.47uF 0.47uF 6.3v 6.3v 6.3v 6.3v
6.3v 6.3v 6.3v 10% 10% 10% 10%
10% 10% 10% 0402 0402 0402 0402
D D
0402 0402 0402 X5R X5R X5R X5R
X5R X5R X5R
+V_VCC
Bottom side
+V_VNN
Bottom side
C1026 C1027 C1028 C1029 C1030 C1031
close to BV32,BW33
0.47uF 0.47uF 0.47uF 0.47uF 1uF 1uF
6.3v 6.3v 6.3v 6.3v 6.3V 6.3V C1032 C1033 C1034 C1035 C1036 C1037
10% 10% 10% 10% 20% 20%
close to AC37,AD36,A30, 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF
0402
X5R
0402
X5R
0402
X5R
0402
X5R
0402
X5R
0402
X5R
A33,A35,B36,BW39 6.3v
10%
6.3v
10%
6.3v
10%
6.3v
10%
6.3v
10%
6.3v
10%
0402 0402 0402 0402 0402 0402
X5R X5R X5R X5R X5R X5R
+VDDQ
close to AP2,AN1,BC1,BB2,BB15,BG1,BF2
+V1P0S
close to R1 close to AK45
C1038 C1039 C1040 C1041 C1042 C1043 C1044 C1045 C1046
0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF +V1P2A +V1P2SX
6.3v 6.3v 6.3v 6.3v 6.3v 6.3v 6.3v 6.3v 6.3v
20% 20% 10% 10% 10% 10% 10% 10% 10%
0402 0402 0402 0402 0402 0402 0402 0402 0402
X5R X5R X5R X5R X5R X5R X5R X5R X5R C1047 C1048 C1049 C1050 C1051
0.47uF 0.47uF 0.47uF 0.47uF 0.47uF
6.3v 6.3v 6.3v 6.3v 6.3v
10% 10% 10% 10% 10%
0402 0402 0402 0402 0402
X5R X5R X5R X5R X5R
C C
+V1P0SX
+V1P0SX_S close to M36 close to AA1
+V1P0S
0R R1002
R1001 0/NC EMPTY +V1P2SX
close to AH27,AP16
R0402 0603 5% 1/10W
C1052 C1053 C1054 C1055 C1056 C1057 C1058 C1059 C1060 C1061 C1062
0.47uF 0.1uF 0.1uF 1/16W 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF
6.3v 10V 10V 6.3v 6.3v 6.3v 6.3v 6.3v 6.3v 6.3v 6.3v C1063 C1064 C1065
20% 10% 10% 20% 20% 20% 10% 10% 10% 10% 10% 0.47uF 0.47uF 0.47uF
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 6.3v 6.3v 6.3v
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R 10% 10% 10%
close to P44
0402 0402 0402
X5R X5R X5R
+V1P0SX_DIGDP
close to M36 close to BF32,P2,N1
R1003 Etch
Short
short0603_M C1070 C1071 C1072
C1066 C1067 C1068 C1069 1uF/NC 0.47uF 0.47uF
0.1uF 0.47uF 0.47uF 0.47uF 6.3V 6.3v 6.3v
10V 6.3v 6.3v 6.3v 10% 10% 10%
close to BW35,BW36,M40
10% 20% 20% 20% 0402 0402 0402
0402 0402 0402 0402 X5R X5R X5R
X5R X5R X5R X5R EMPTY
B B
close to AF2,AG1 close to AM15, AP12
+V1P2S +V1P2S
close to P21,P23,P27 C1073 C1074

close to K2,J1 close to BW17,BV18 close to M20 close to T19,T18,P17,P15,W1
close to BW23 0.47uF 0.47uF
6.3v 6.3v
+V1P8A 10% 10%
+V3P3S +V1P0A 0402 0402
+V3P3SX +V3P3A +VSDIO X5R X5R
C1077 C1080 C1081 C1082 C1083 C1084

C1075 C1076 0.47uF C1078 C1079 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF
0.47uF 0.47uF 6.3v 0.47uF 0.47uF 6.3v 6.3v 6.3v 6.3v 6.3v
6.3v 6.3v 10% 6.3v 6.3v 10% 10% 10% 10% 10%
10% 10% 0402 10% 10% 0402 0402 0402 0402 0402
0402 0402 X5R 0402 0402 X5R X5R X5R X5R X5R
X5R X5R X5R X5R
close to AD15, G1
A A
Drawing Rule
Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
LPDDR3 MEMORY CHANNEL A +VDDQ_VTT +VDDQ +VDDQ
H9CCNNN8KTMBR‐NTM‐GP for layout:

closed to
R1102
100K/NC
R1103
10K
R1101 R1104 R1105 R1106 +VREF_DQ0 1% +VREF_CA0 1%
RAM1 49.9/NC 49.9/NC 49.9/NC 49.9/NC 0402 0402
U1101B LPDDR3 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
1% 1% 1% 1% EMPTY
M0_A_ZQ1C11 C8 M0_CLK0_DN 2 0402 0402 0402 0402
M0_A_ZQ0B11 ZQ1_A CK_C_A B8 R1107 R1108
D
ZQ0_A CK_T_A M0_CLK0_DP 2 EMPTY EMPTY EMPTY EMPTY D
M0_ODT0 100K 10K
M0_B_ZQ1 E3 H2 M0_CLK2_DN 2 M0_ODT2 1% 1%
M0_B_ZQ0 E2 ZQ1_B CK_C_B H3 M0_CS0# 0402 0402
ZQ0_B CK_T_B M0_CLK2_DP 2
M0_CS2# 1/16W 1/16W
2,11 M0_CA0 B5
C5 CA0_A C7 M0_A_ZQ0
2,11 M0_CA1 CA1_A CKE0_A M0_CKE0 2
2,11 M0_CA2 D5 D7 M0_CKE2 2 M0_A_ZQ1
B6 CA2_A CKE1_A M0_B_ZQ0
2,11 M0_CA3
C6 CA3_A M0_B_ZQ1
LPDDR3 CLK TERMINATION
2,11 M0_CA4 CA4_A
2,11 M0_CA5 C9
D9 CA5_A CKE0_B
J3
J4
M0_CKE1 2 for layout:close to RAM1
2,11 M0_CA6 CA6_A CKE1_B M0_CKE3 2
2,11 M0_CA7 B10 R1109 R1110 R1111 R1112
C10 CA7_A 240 240 240 240
2,11 M0_CA8 CA8_A
2,11 M0_CA9 D10 D6 M0_CS0# 2,11 1% 1% 1% 1%
CA9_A CS0_N_A B7 0402 0402 0402 0402 M0_CLK0_DP
CS1_N_A M0_CS2# 2,11
1/16W 1/16W 1/16W 1/16W
2,11 M0_CA0 L2 K4 M0_CS0# 2,11 R1113

L3 CA0_B CS0_N_B J2 300
2,11 M0_CA1 CA1_B CS1_N_B M0_CS2# 2,11
2,11 M0_CA2 L4 1%
K2 CA2_B 0402
2,11 M0_CA3
K3 CA3_B N6
LPDDR3 CA TERMINATION 1/16W
2,11 M0_CA4 CA4_B DM0_A M0_DM0 2
2,11 M0_CA5 G3 P8 M0_DM2 2 +VDDQ_VTT M0_CLK0_DN
G4 CA5_B DM1_A P4
2,11 M0_CA6 CA6_B DM2_A M0_DM1 2
2,11 M0_CA7 F2 P11 M0_DM3 2 M0_CA0 100 R1114
CA7_B DM3_A 2,11 M0_CA0
2,11 M0_CA8 F3 0402 1% 1/16W
F4 CA8_B M0_CA1 100 R1115
2,11 M0_CA9 CA9_B 2,11 M0_CA1
H14 M0_DM5 2 0402 1% 1/16W
C DM0_B F13 M0_CA2 100 R1116 M0_CLK2_DP C
DM1_B M0_DM7 2 2,11 M0_CA2
L14 M0_DM4 2 0402 1% 1/16W
N8 DM2_B D14 M0_CA3 100 R1117
2 M0_ODT0 ODT_A DM3_B M0_DM6 2 2,11 M0_CA3
2 M0_ODT2 H13 0402 1% 1/16W R1118
ODT_B M0_CA4 100 R1119 300
2,11 M0_CA4
0402 1% 1/16W 1%
M0_CA5 100 R1120 0402
2,11 M0_CA5
2 M0_DATA0 N4 L15 M0_DATA40 2 0402 1% 1/16W M0_CLK2_DN 1/16W
T5 DQ0_A DQ0_B L16 M0_CA6 100 R1121
2 M0_DATA1 DQ1_A DQ1_B M0_DATA41 2 2,11 M0_CA6
2 M0_DATA2 R5 K13 M0_DATA42 2 0402 1% 1/16W
P5 DQ2_A DQ2_B K14 M0_CA7 100 R1122
NO SWAP 2
2
M0_DATA3
M0_DATA4 N5 DQ3_A DQ3_B K15
M0_DATA43
M0_DATA47
2
2
SWAP OK 2,11 M0_CA7
0402 1% 1/16W
T6 DQ4_A DQ4_B K16 M0_CA8 100 R1123
2 M0_DATA6 R6 J15 M0_DATA45 2 0402 1% 1/16W
P6 DQ6_A DQ6_B J16 M0_CA9 100 R1124 U1101C LPDDR3
2 M0_DATA21 T9 F14 M0_DATA62 2 0402 1% 1/16W A2 G16
R9 DQ8_A DQ8_B F15 A3 VSS0 VSS34 H5
2 M0_DATA23 DQ9_A DQ9_B M0_DATA56 2 VSS1 VSS35
2 M0_DATA16 T10 F16 M0_DATA58 2 A4 H12
R10 DQ10_A DQ10_B E13 A5 VSS2 VSS36 H15
2 M0_DATA22
P10 DQ11_A DQ11_B E14
M0_DATA63 2 SWAP OK +V1P8U_LPDDR3 +VDDQ A8 VSS3 VSS37 J5
SWAP OK 2
2
M0_DATA20
M0_DATA19 N10 DQ12_A DQ12_B E15
M0_DATA60
M0_DATA59
2
2 U1101A
LPDDR3
A12 VSS4 VSS38 K5
T11 DQ13_A DQ13_B E16 A15 A6 A14 VSS5 VSS39 L5
2 M0_DATA17 DQ14_A DQ14_B M0_DATA61 2 VDD1_0 VDDCA0 VSS6 VSS40
2 M0_DATA18 R11 D13 M0_DATA57 2 A16 A9 B1 L12
T2 DQ15_A DQ15_B P15 B2 VDD1_1 VDDCA1 B9 B3 VSS7 VSS41 M1
2 M0_DATA13 R2 P16 M0_DATA38 2 R1 E1 B4 M4
P2 DQ17_A DQ17_B N14 T1 VDD1_3 VDDCA3 G2 C1 VSS9 VSS43 M5
N2 N15 T16 K1 C2 M6
SWAP OK 2
2
M0_DATA15
M0_DATA9 T3 DQ19_A DQ19_B N16
M0_DATA35
M0_DATA37
2
2
SWAP OK +VDDQ VDD1_5 VDDCA5 +VDDQ C4 VSS11 VSS45 M8
R3 DQ20_A DQ20_B M13 D1 VSS12 VSS46 M11
B
2 M0_DATA12 DQ21_A DQ21_B M0_DATA32 2 VSS13 VSS47 B
2 M0_DATA14 P3 M14 M0_DATA36 2 A7 A13 D2 M17
N3 DQ22_A DQ22_B L13 A11 VDD2_0 VDDQ0 B12 D3 VSS14 VSS48 N13
2 M0_DATA8 DQ23_A DQ23_B M0_DATA33 2 VDD2_1 VDDQ1 VSS15 VSS49
2 M0_DATA26 N11 C13 M0_DATA53 2 B17 C12 D4 N17
N12 DQ24_A DQ24_B C14 C3 VDD2_2 VDDQ2 E17 D12 VSS16 VSS50 P1
2 M0_DATA30 P12 C15 M0_DATA48 2 C17 G12 D17 P14
T13 DQ26_A DQ26_B C16 H1 VDD2_4 VDDQ4 G17 E5 VSS18 VSS52 R7
2 M0_DATA28
R13 DQ27_A DQ27_B B13
M0_DATA49 2 SWAP OK H16 VDD2_5 VDDQ5 E6 VSS19 VSS53 R8
SWAP OK 2
2
M0_DATA31
M0_DATA24 P13 DQ28_A DQ28_B B14
M0_DATA54
M0_DATA50
2
2 L1 VDD2_6 K12 E7 VSS20 VSS54 R16
T14 DQ29_A DQ29_B B15 R15 VDD2_7 VDDQ7 K17 E8 VSS21 VSS55 R17
2 M0_DATA29 R14 B16 M0_DATA52 2 T8 L17 E9 T7
DQ31_A DQ31_B U2 VDD2_9 VDDQ9 M2 E10 VSS23 VSS57 T15
U3 VDD2_10 VDDQ10 M3 E11 VSS24 VSS58 T17
VDD2_11 VDDQ11 M7 E12 VSS25 VSS59 U4
N7 J13 M0_DQS5_DN VDDQ12 M10 F1 VSS26 VSS60 U6
2 M0_DQS0_DN DQS0_C_A DQS0_C_B M0_DQS5_DN 2 VDDQ13 VSS27 VSS61
2 M0_DQS0_DP P7 J14 M0_DQS5_DP M12 F5 U9
DQS0_T_A DQS0_T_B M0_DQS5_DP 2 VDDQ14 VSS28 VSS62
N1 F12 U12
N9 G13 M0_DQS7_DN D8 VDDQ15 P17 F17 VSS29 VSS63 U13
2 M0_DQS2_DN DQS1_C_A DQS1_C_B M0_DQS7_DN 2 RFU0 VDDQ16 VSS30 VSS64
2 M0_DQS2_DP P9 G14 M0_DQS7_DP D11 U5 G1 U15
DQS1_T_A DQS1_T_B M0_DQS7_DP 2 RFU1 VDDQ17 VSS31 VSS65
E4 U7 G5 U16
R4 M15 M0_DQS4_DN H4 RFU2 VDDQ18 U10 G15 VSS32 VSS66 J17
2 M0_DQS1_DP T4 M16 M0_DQS4_DP J12 U11 3/3
DQS2_T_A DQS2_T_B M0_DQS4_DP 2 RFU4 VDDQ20
M9 U14
RFU5 VDDQ21 LPDDR3_H9_8GB
2 M0_DQS3_DN R12 D15 M0_DQS6_DN +VREF_CA0
DQS3_C_A DQS3_C_B M0_DQS6_DN 2
2 M0_DQS3_DP T12 D16 M0_DQS6_DP
DQS3_T_A DQS3_T_B M0_DQS6_DP 2
A10
2/3 A1 VREF_CA_A J1
A17 NC0 VREF_CA_B
LPDDR3_H9_8GB NC1
U1 +VREF_DQ0
Pay attention to DQS and DM order if Data Bytes need swapping. U17 NC2
A NC3 A
U8
VREF_DQ_A H17 Drawing Rule
1/3
VREF_DQ_B
LPDDR3_H9_8GB Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
LPDDR3 MEMORY CHANNEL B +VDDQ_VTT +VDDQ +VDDQ
H9CCNNN8KTMBR‐NTM‐GP for layout:

R1202
100K/NC
R1203
10K
R1204 R1205 R1206 R1201 +VREF_DQ1 1% +VREF_CA1 1%
U1201B LPDDR3
closed to RAM2 49.9/NC
1/16W
49.9/NC
1/16W
49.9/NC
1/16W
49.9/NC
1/16W
0402
1/16W
0402
1/16W
M1_A_ZQ1C11 C8 M1_CLK2_DN 2 1% 1% 1% 1% EMPTY
M1_A_ZQ0B11 ZQ1_A CK_C_A B8 0402 0402 0402 0402
ZQ0_A CK_T_A M1_CLK2_DP 2
D EMPTY EMPTY EMPTY EMPTY R1207 R1208 D
M1_B_ZQ1 E3 H2 M1_CLK0_DN 2 M1_ODT0 100K 10K
M1_B_ZQ0 E2 ZQ1_B CK_C_B H3 M1_ODT2 1% 1%
ZQ0_B CK_T_B M1_CLK0_DP 2
M1_CS0# 0402 0402
2,12 M1_CA0 B5 M1_CS2# 1/16W 1/16W
C5 CA0_A C7
2,12 M1_CA1 CA1_A CKE0_A M1_CKE1 2
2,12 M1_CA2 D5 D7 M1_CKE3 2 M1_A_ZQ0
B6 CA2_A CKE1_A M1_A_ZQ1
2,12 M1_CA3 CA3_A
2,12 M1_CA4 C6 M1_B_ZQ0
C9 CA4_A J3 M1_B_ZQ1
2,12 M1_CA5
D9 CA5_A CKE0_B J4
M1_CKE0 2 LPDDR3 CLK TERMINATION
2,12 M1_CA6 CA6_A CKE1_B M1_CKE2 2
2,12 M1_CA7 B10
C10 CA7_A R1209 R1210 R1211 R1212
for layout:close to RAM2
2,12 M1_CA8 CA8_A
2,12 M1_CA9 D10 D6 M1_CS0# 2,12 240 240 240 240
CA9_A CS0_N_A B7 1% 1% 1% 1%
CS1_N_A M1_CS2# 2,12
0402 0402 0402 0402
1/16W 1/16W 1/16W 1/16W M1_CLK0_DP
2,12 M1_CA0 L2 K4 M1_CS0# 2,12
L3 CA0_B CS0_N_B J2
2,12 M1_CA1 CA1_B CS1_N_B M1_CS2# 2,12
2,12 M1_CA2 L4 R1213
K2 CA2_B 300
2,12 M1_CA3 CA3_B
K3 N6 1%
2,12 M1_CA4
G3 CA4_B DM0_A P8
M1_DM6 2 LPDDR3 CA TERMINATION +VDDQ_VTT 0402
2,12 M1_CA5 CA5_B DM1_A M1_DM4 2
2,12 M1_CA6 G4 P4 M1_DM7 2 M1_CLK0_DN 1/16W
F2 CA6_B DM2_A P11 M1_CA0 100 R1214
2,12 M1_CA7 CA7_B DM3_A M1_DM5 2 2,12 M1_CA0
2,12 M1_CA8 F3 0402 1% 1/16W
F4 CA8_B M1_CA1 100 R1215
2,12 M1_CA9 CA9_B 2,12 M1_CA1
H14 M1_DM0 2 0402 1% 1/16W
DM0_B F13 M1_CA2 100 R1216
DM1_B M1_DM2 2 2,12 M1_CA2
C L14 M1_DM3 2 0402 1% 1/16W C
N8 DM2_B D14 M1_CA3 100 R1217 M1_CLK2_DP
2 M1_ODT2 ODT_A DM3_B M1_DM1 2 2,12 M1_CA3
2 M1_ODT0 H13 0402 1% 1/16W
ODT_B M1_CA4 100 R1218
2,12 M1_CA4
0402 1% 1/16W R1220
M1_CA5 100 R1219 300
2,12 M1_CA5
2 M1_DATA54 N4 L15 M1_DATA0 2 0402 1% 1/16W 1%
T5 DQ0_A DQ0_B L16 M1_CA6 100 R1221 0402
2 M1_DATA49 R5 K13 M1_DATA2 2 0402 1% 1/16W M1_CLK2_DN 1/16W
P5 DQ2_A DQ2_B K14 M1_CA7 100 R1222
2 M1_DATA55
N5 DQ3_A DQ3_B K15
M1_DATA3 2 NO SWAP 2,12 M1_CA7
0402 1% 1/16W
NO SWAP 2
2
M1_DATA50
M1_DATA48 T6 DQ4_A DQ4_B K16
M1_DATA4
M1_DATA5
2
2 M1_CA8 100 R1223
DQ5_A DQ5_B 2,12 M1_CA8
2 M1_DATA51 R6 J15 M1_DATA6 2 0402 1% 1/16W
P6 DQ6_A DQ6_B J16 M1_CA9 100 R1224
2 M1_DATA37 T9 F14 M1_DATA18 2 0402 1% 1/16W
R9 DQ8_A DQ8_B F15 U1201C LPDDR3
2 M1_DATA38 DQ9_A DQ9_B M1_DATA22 2
2 M1_DATA35 T10 F16 M1_DATA17 2 A2 G16
R10 DQ10_A DQ10_B E13 A3 VSS0 VSS34 H5
P10 E14 A4 H12
SWAP OK 2
2
M1_DATA32
M1_DATA33 N10 DQ12_A DQ12_B E15
M1_DATA23
M1_DATA21
2
2
SWAP OK +V1P8U_LPDDR3 LPDDR3 +VDDQ A5 VSS2 VSS36 H15
T11 DQ13_A DQ13_B E16 U1201A A8 VSS3 VSS37 J5
2 M1_DATA39 R11 D13 M1_DATA20 2 A15 A6 A12 K5
T2 DQ15_A DQ15_B P15 A16 VDD1_0 VDDCA0 A9 A14 VSS5 VSS39 L5
2 M1_DATA61 R2 P16 M1_DATA27 2 B2 B9 B1 L12
P2 DQ17_A DQ17_B N14 R1 VDD1_2 VDDCA2 E1 B3 VSS7 VSS41 M1
N2 N15 T1 G2 B4 M4
SWAP OK 2 M1_DATA63
T3 DQ19_A DQ19_B N16
M1_DATA24 2
T16 VDD1_4 VDDCA4 K1 C1 VSS9 VSS43 M5
2
2
M1_DATA58
M1_DATA56 R3 DQ20_A DQ20_B M13
M1_DATA31
M1_DATA25
2
2
SWAP OK +VDDQ VDD1_5 VDDCA5 +VDDQ C2 VSS10 VSS44 M6
P3 DQ21_A DQ21_B M14 C4 VSS11 VSS45 M8
B
2 M1_DATA62 DQ22_A DQ22_B M1_DATA30 2 VSS12 VSS46 B
2 M1_DATA57 N3 L13 M1_DATA26 2 A7 A13 D1 M11
N11 DQ23_A DQ23_B C13 A11 VDD2_0 VDDQ0 B12 D2 VSS13 VSS47 M17
2 M1_DATA44 N12 C14 M1_DATA11 2 B17 C12 D3 N13
P12 DQ25_A DQ25_B C15 C3 VDD2_2 VDDQ2 E17 D4 VSS15 VSS49 N17
T13 C16 C17 G12 D12 P1
SWAP OK 2 M1_DATA40
R13 DQ27_A DQ27_B B13
M1_DATA13 2
H1 VDD2_4 VDDQ4 G17 D17 VSS17 VSS51 P14
2
2
M1_DATA43
M1_DATA42 P13 DQ28_A DQ28_B B14
M1_DATA12
M1_DATA15
2
2
SWAP OK H16 VDD2_5 VDDQ5 E5 VSS18 VSS52 R7
T14 DQ29_A DQ29_B B15 L1 VDD2_6 K12 E6 VSS19 VSS53 R8
2 M1_DATA47 R14 B16 M1_DATA14 2 R15 K17 E7 R16
DQ31_A DQ31_B T8 VDD2_8 VDDQ8 L17 E8 VSS21 VSS55 R17
N7 J13 VDD2_11 VDDQ11 M7 E11 VSS24 VSS58 T17
2 M1_DQS6_DP P7 J14 M1_DQS0_DP 2 M10 E12 U4
DQS0_T_A DQS0_T_B VDDQ13 M12 F1 VSS26 VSS60 U6
N9 G13 VDDQ14 N1 F5 VSS27 VSS61 U9
2 M1_DQS4_DP P9 G14 M1_DQS2_DP 2 D8 P17 F12 U12
DQS1_T_A DQS1_T_B D11 RFU0 VDDQ16 U5 F17 VSS29 VSS63 U13
R4 M15 E4 RFU1 VDDQ17 U7 G1 VSS30 VSS64 U15
2 M1_DQS7_DP T4 M16 M1_DQS3_DP 2 H4 U10 G5 U16
DQS2_T_A DQS2_T_B J12 RFU3 VDDQ19 U11 G15 VSS32 VSS66 J17
R12 D15 M9 RFU4 VDDQ20 U14 VSS33 3/3 VSS67
2 M1_DQS5_DN DQS3_C_A DQS3_C_B M1_DQS1_DN 2 RFU5 VDDQ21
2 M1_DQS5_DP T12 D16 M1_DQS1_DP 2 +VREF_CA1
DQS3_T_A DQS3_T_B LPDDR3_H9_8GB
2/3 A10
A1 VREF_CA_A J1
LPDDR3_H9_8GB NC0 VREF_CA_B
A17
Notice DQS and DM order if Data Bytes need swapping. U1 NC1 +VREF_DQ1
U17 NC2
A NC3 A
U8
VREF_DQ_A H17 Drawing Rule
1/3
VREF_DQ_B
LPDDR3_H9_8GB Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
LPDDR3 MEMORY CHANNEL 1

LPDDR3 MEMORY CHANNEL 0
+VDDQ +VDDQ +VDDQ

+VDDQ +VDDQ
VDDQ CH 1 VDD2 CH 1 VDDQ CH 0 VDD2 CH 0
D D
C1355 C1301 C1302 C1303 C1304 C1305 C1306 C1307 C1308 C1309 C1356 C1310 C1311 C1312 C1313 C1314 C1315 C1316 C1317 C1318 C1358
C1353 C1354 C1360 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 1uF 0.1uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 1uF 0.1uF 0.47uF 0.47uF 0.47uF 0.47uF
22uF 22uF 0.47uF 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 10V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 10V 6.3V 6.3V 6.3V 6.3V
6.3V 6.3V 6.3V 10% 10% 10% 10% 10% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 20% 10% 10% 10% 10% 10%
10% 10% 10% 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
0603 0603 0402 X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
X5R X5R X5R
+V1P8U +V1P8U_LPDDR3 +V1P8U_LPDDR3

+VDDQ +VDDQ
VDD1 CH 1 VDDCA CH 1 VDD1 CH 0 VDDCA CH 0
R1302 Etch
Short
short0603_M C1319 C1320 C1321 C1322 C1323 C1324 C1325 C1326 C1327 C1357 C1328 C1329 C1330 C1331 C1332 C1333 C1334 C1335 C1336 C1359
0.47uF 0.47uF 0.47uF 0.47uF 0.1uF 0.47uF 0.1uF 0.1uF 0.1uF 0.47uF 0.47uF 0.47uF 0.47uF 0.47uF 0.1uF 0.47uF 0.1uF 0.1uF 0.1uF 0.47uF
6.3V 6.3V 6.3V 6.3V 10V 6.3V 10V 10V 10V 6.3V 6.3V 6.3V 6.3V 6.3V 10V 6.3V 10V 10V 10V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
C C
VREFCA CH 1 VREFDQ CH 1 VREFCA CH 0 VREFDQ CH 0

+VDDQ_VTT +VREF_CA1 +VREF_DQ1 +VDDQ_VTT +VREF_CA0 +VREF_DQ0
CH 1 CH 0
C1337 C1338 C1339 C1340 C1349 C1350 C1345 C1346 C1347 C1348 C1341 C1342 C1343 C1344
0.1uF 0.47uF 1uF 1uF 0.47uF 0.47uF C1351 C1352 0.1uF 0.47uF 1uF 1uF 0.47uF 0.47uF 0.47uF 0.47uF
10V 6.3V 6.3V 6.3V 6.3V 6.3V 0.47uF 0.47uF 10V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 20% 20% 10% 10% 6.3V 6.3V 10% 10% 20% 20% 10% 10% 10% 10%
0402 0402 0402 0402 0402 0402 10% 10% 0402 0402 0402 0402 0402 0402 0402 0402
X5R X5R X5R X5R X5R X5R 0402 0402 X5R X5R X5R X5R X5R X5R X5R X5R
X5R X5R
B B
Drawing Rule
A
A
Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
U1401B 2 OF 2
+V1P8S
Device :eMMC A4
A6
A9
NC#A4
NC#A6
NC#A9
NC#R1
NC#R2
NC#R3
R1
R2
R3
A11 R5
B2 NC#A11 NC#R5 R12
+V2P85S +V2P85S_EMMC_VCC B13 NC#B2 NC#R12 R13
EMPTY EMPTY EMPTY EMPTY EMPTY EMPTY EMPTY EMPTY EMPTY D1 NC#B13 NC#R13 R14
R1402 R1403 R1404 R1405 R1406 R1407 R1410 R1408 R1409 D14 NC#D1 NC#R14 T1
4.7K/NC 4.7K/NC 4.7K/NC 4.7K/NC 4.7K/NC 4.7K/NC 4.7K/NC 4.7K/NC H1 NC#D14 NC#T1 T2
100K/NC NC#H1 NC#T2
R1401 Etch 1% 1% 1% 1% 1% 1% 1% 1% 1/16W H2 T3
Short 0402 0402 0402 0402 0402 0402 0402 0402 H6 NC#H2 NC#T3 T5
short0603_M C1401 C1402 C1403 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1% H7 NC#H6 NC#T5 T12
D D
4.7uF 0.1uF 0.1uF/NC 0402 H8 NC#H7 NC#T12 T13
6.3V 10V 10V H9 NC#H8 NC#T13 T14
20% 10% 10% H10 NC#H9 NC#T14 U1
0402 0402 0402 EMMC_DATA_0 H11 NC#H10 NC#U1 U2
X5R X5R X5R H12 NC#H11 NC#U2 U3
+V1P8S EMPTY GND EMMC_DATA_1 H13 NC#H12 NC#U3 U6
H14 NC#H13 NC#U6 U7
U1401A 1 OF 2 EMMC_DATA_2 J1 NC#H14 NC#U7 U10
J7 NC#J1 NC#U10 U12
M6 W5 EMMC_DATA_3 J8 NC#J7 NC#U12 U13
VCC CMD EMMC_CMD 4 NC#J8 NC#U13
N5 J9 U14
T10 VCC1 EMMC_DATA_4 J10 NC#J9 NC#U14 V1
C1405 C1404 C1406 U9 VCC2 W6 J11 NC#J10 NC#V1 V2
VCC3 CLK EMMC_CLK 4 NC#J11 NC#V2
0.1uF/NC 1uF 4.7uF EMMC_DATA_5 J12 V3
10V 10V 6.3V K6 C1407 50 J13 NC#J12 NC#V3 V12
10% 10% 20% W4 VCCQ 10pF/NC 10% EMMC_DATA_6 J14 NC#J13 NC#V12 V13
0402 0402 0402 Y4 VCCQ1 EMPTY 0402 K1 NC#J14 NC#V13 V14
X5R X5R X5R AA3 VCCQ2 X5R EMMC_DATA_7 K3 NC#K1 NC#V14 W1
EMPTY AA5 VCCQ3 U5 K5 NC#K3 NC#W1 W2
C1408 VCCQ4 RST# EMMC_RESET# 4 NC#K5 NC#W2
EMMC_RESET# K7 W3
EMMC_VDDI K2 K8 NC#K7 NC#W3 W7
VDDI M7 K9 NC#K8 NC#W7 W8
1uF H3
VSS1
VSS2
P5
R10
for RF K10
K11
NC#K9
NC#K10
NC#W8
NC#W9
W9
W10
6.3V
4
4
EMMC_DATA_0
EMMC_DATA_1 H4 DATA0
DATA1
VSS3
VSS4
U8 Closed to eMMC K12 NC#K11
NC#K12
NC#W10
NC#W11
W11
20% 4 EMMC_DATA_2 H5 +V1P8S K13 W12
J2 DATA2 K4 K14 NC#K13 NC#W12 W13
X5R 4 EMMC_DATA_3 DATA3 VSSQ NC#K14 NC#W13
0402 4 EMMC_DATA_4 J3 Y2 L1 W14
C J4 DATA4 VSSQ1 Y5 L2 NC#L1 NC#W14 Y1 C
4 EMMC_DATA_5 DATA5 VSSQ2 NC#L2 NC#Y1
4 EMMC_DATA_6 J5 AA4 L3 Y3
J6 DATA6 VSSQ3 AA6 R1411 L4 NC#L3 NC#Y3 Y6
4 EMMC_DATA_7 DATA7 VSSQ4 NC#L4 NC#Y6
100K/NC L12 Y7
1% L13 NC#L12 NC#Y7 Y8
8GB-KE4CN3K6A-GP 0402 L14 NC#L13 NC#Y8 Y9
1/16W M1 NC#L14 NC#Y9 Y10
EMPTY M2 NC#M1 NC#Y10 Y11
EMMC_CMD M3 NC#M2 NC#Y11 Y12
M5 NC#M3 NC#Y12 Y13
M8 NC#M5 NC#Y13 Y14
M9 NC#M8 NC#Y14 AA1
M10 NC#M9 NC#AA1 AA2
N1 NC#M14 NC#AA9 AA10
N2 NC#N1 NC#AA10 AA11
N13 NC#N12 NC#AA14 AE1
N14 NC#N13 NC#AE1 AE14
Device :SD CARD P1 NC#N14 NC#AE14 AG2

P2 NC#P1 NC#AG2 AG13
P3 NC#P2 NC#AG13 AH4
P10 NC#P3 NC#AH4 AH6
B P14 NC#P13 NC#AH11 B
+VSD NC#P14
+V3P3S U1402
+V3P3S_SD
A2 A1 R1413 Etch
Layout 20 mil 8GB-KE4CN3K6A-GP
VIN VOUT
GND
B2 Short
ON short0603_M C1409 C1410 C1411
1uF 1uF 22pF
B1
TPS22910 10V 10V 50V

10% 10% 5%
4,30 SDIO_PWR_EN
0402 0402 0402 CARD1401
X5R X5R NPO
C1420
C1412 4 9
1uF VDD 9
R1412 1uF 10
10V CD# MC1CD# 4
100K 10V 12
10% 12
1% 10% 7 13
0402 4 MC1DA0 DAT0 13
0402 0402 8 14
X5R 4 MC1DA1 DAT1 14
1/16W X5R 4 MC1DA2 1 15
2 DAT2 VSS1
4 MC1DA3 CD/DAT3
4 MC1CK 5 6
3 CLK VSS 11
4 MC1CM CMD 11
for EMI/RF Closed to CARD1
SDCARD-8P-5-GP
A
MC1DA0 C1414 22pF C0402 A
MC1DA1 C1413 22pF C0402
MC1DA2 C1416 22pF C0402 Drawing Rule
MC1DA3
MC1CM
MC1CK
C1415
C1417
C1419
22pF
22pF
22pF
C0402
C0402
C0402
MC1CD# C1418 22pF/NC C0402
Project:
EMPTY
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
+V3P3S
XDP Debug Connector
R1502
100K XDP1501
1% 62 61
+V1P8A 0402
JTAG2_TDI 1/16W 2 1
TP1501 XDP_H_TDI 6
R15011% 51K R0402 JTAG2_TMS JTAG2_TDO 4 3 XDP_H_TDO 6
TP1502
R15031% 51K R0402 JTAG2_TDI JTAG2_TCK 6 5
TP1504 XDP_H_TMS 6
D R15041% 51K R0402 JTAG2_TCK JTAG2_TMS 8 7 D
TP1505 XDP_H_TRST# 6
10 9
PMIC_EEPROM_SEL 12 11 XDP_H_TCK 6
TP1503 XDP_H_PREQ# 6
5 LPC_AD0 R1505 0 LPC_DBG_AD0_R 14 13 XDP_H_PRDY# 6
5 LPC_AD1 R1506 0 LPC_DBG_AD1_R 16 15 XDP_P15
TP1506
5 LPC_AD2 R1507 0 LPC_DBG_AD2_R 18 17
5 LPC_AD3 R1509 0 LPC_DBG_AD3_R 20 19 XDP_BPM0 R1510 0 1/16W 5% 0402 SOC_DFX_GPIO1 6
5 LPC_FRAME# R1508 0 LPC_DBG_FRAME#_R 22 21 XDP_BPM1 R1511 0 1/16W 5% 0402 SOC_DFX_GPIO2 6 SLP_S4#
TP1520
5 LPC_CLKOUT_1 R1513 0 LPC_DBG_CLKOUT_1 24 23 XDP_BPM2 R1514 0 1/16W 5% 0402 SOC_DFX_GPIO3 6 SLP_S3#
5 LPC_CLKRUN# R1512 0 LPC_DBG_CLKRUN#_R 26 25 XDP_BPM3 R1516 0 1/16W 5% 0402 SOC_DFX_GPIO4 6 TP1521
5 LPC_SERIRQ R1515 0 LPC_DBG_SERIRQ_R 28 27 SLP_S3# 6,28 PLTRST#
TP1522
30 29 SLP_S4# 6,28
+V1P8S 32 31 SLP_S0IX# 6,18,28
JTAG_SENSOR_SWCLK 34 33 PROG_SPI_MOSI +VSPI_PROG
TP1507
JTAG_SENSOR_SWDIO 36 35 PROG_SPI_MISO
TP1508
SENSOR_HUB_PROG_RST 38 37 PROG_SPI_CS#
TP1509
I2C_DBG_PMIC_SCL 40 39 PROG_SPI_CLK
TP1510
I2C_DBG_PMIC_SDA 42 41 PROG_SPI_IO3 PROG_SPI_IO3 15
TP1511
44 43 +VSPI_PROG
+V3P3A 6,28 PLTRST# 46 45
48 47 SRT_CRST# 6
6 DBG_RESETBTN# RSMRST# 6,28
50 49 POWER_BUTTON_INPUT 27,28
5 USB2_DEBUG_DP 52 51 CORE_PWROK 6,28
5 USB2_DEBUG_DN 54 53 SOC_RTEST# 6,28
I2C_NFC_DBG_SCL 56 55 UART3_DEBUG_TXD R1517 22R 1/16W 1% 0402
TP1512
I2C_NFC_DBG_SDA 58 57 UART3_DEBUG_RXD R1518 22R 1/16W 1% 0402
UART_3_TXD 5,21 Add the test point for flash
TP1513 UART_3_RXD 5,21
60 59 +VSPI
64 63
C TP1514 C
PSC-CONN60D-GP SPI_CLK TP1515
SPI_MOSI TP1516
SPI_CS# TP1517
SPI_MISO TP1518
+VSPI
NOR Flash +VSPI TP1519
R1519 R1520 R1521 C1502

10K 10K 10K 0.1uF
1% 1% 1% 10V
0402 0402 0402 10%
1/16W 1/16W U1501 1/16W 0402
X5R
6 SOC_SPI_CS# R1522 0/NC EMPTY SPI_CS# 1 9
R1523 0/NC EMPTY SPI_MISO 2 CS# GND 8
6 SOC_SPI_MISO NOR_WP# 3 DO/IO1 VCC 7 NOR_HOLD#
4 WP#/IO2 HOLD#/RESET/IO3 6 SPI_CLK R1524 0/NC EMPTY
GND CLK SOC_SPI_CLK 6
5 SPI_MOSI R1525 0/NC EMPTY SOC_SPI_MOSI 6
DI/IO0
W25Q64FWZPIG
C1503
B 10pF/NC B
+VSPI 50
+VSPI_PROG +V1P8A 10%
0402
X5R
+V1P8A +VSPI EMPTY
R1526
R1527
C1501 0 0
0.1uF 5% 5%
10V R0402 R0402
10% R1528 0/NC EMPTY +V1P8A +VSPI_PROG
2BAT64_SPI1
1BAT64_SPI2
0402 R0402
X5R
U1502
+VSPI
C2 B4 C1504
V+ IN1 D3 PROG_SPI_IO3 D1501 1uF
IN2 6.3V C1505
BAT54C-7-F
SOC_SPI_CLK R1530 0 5% R0402 SOC_SPI_CLK_R B3 C4 20% 1uF
SOC_SPI_MOSI R1529 0 5% R0402 SOC_SPI_MOSI_R A2 NC1 EN# 0402 6.3V
SOC_SPI_MISO R1532 0 5% R0402 SOC_SPI_MISO_R A4 NC2 A1 SPI_CLK 3 U1503 X5R 20% C1506
SOC_SPI_CS# R1531 0 5% R0402 SOC_SPI_CS#_R B5 NC3 COM1 B1 SPI_MOSI 0402 1uF
C5 NC4 COM2 C1 SPI_MISO SPI_PWR_MUX_EN A1 A2 X5R 6.3V
A5 NC5 COM3 D1 SPI_CS# B1 EN VINA B2 20%
NC6 COM4 15 PROG_SPI_IO3 SEL VOUT
E1 C1 C2 0402
COM5 D2 GND VINB X5R
PROG_SPI_CLK R1533 0 5% R0402 PROG_SPI_CLK_R E2 COM6 R1535
PROG_SPI_MOSI R1534 0 5% R0402 PROG_SPI_MOSI_R E3 NO1 100K FPF1320UCX-1-GP
A NO2 A
PROG_SPI_MISO R1537 0 5% R0402 PROG_SPI_MISO_R E4 A3 1%
PROG_SPI_CS# R1536 0 5% R0402 PROG_SPI_CS#_R D5 NO3 NC#A3 0402 Drawing Rule
D4
E5
NO4
NO5
NO6 GND
C3
1/16W
Project:
TS3A27518EZQSR-GP Ducati2 OrCAD Lib Ver
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
Device : MIPI LCM
LCM_3D3V
+V3P3A MDSI_A_DP_1_CN
MDSI_A_DN_1_CN
MDSI_A_DP_2_CN MDSI_A_DP_0_CN
MDSI_A_DN_2_CN MDSI_A_DN_0_CN
D D
PU1601
A2 A1 PR1601 Etch
VIN1 VOUT1 Short
B2 B1 short0603_M
VIN2 VOUT2
3
*
*
1.05K R1615 L1604 L1602 L1603
16,28 PANEL_EN C2 C1 SDCW2012C-2-900TF SDCW2012C-2-900TF SDCW2012C-2-900TF
1% 0402 1/16W ON GND EMPTY EMPTY EMPTY
2
EMPTY PC1605 PC1601
6 LCM_3P3V_EN R1616 0/NC 1uF PC1602 1uF
R0402 10V 1uF TPS22964CYZPR 10V
10% 10V 10%
0402 10% 0402
X5R 0402 X5R
X5R
MDSI_A_DN_2 MDSI_A_DN_0
LCM_1D8V MDSI_A_DP_2 MDSI_A_DP_0
+V1P8S MDSI_A_DN_1
MDSI_A_DP_1
MDSI_A_CLKP_CN
PU1602 MDSI_A_CLKN_CN
A2 A1 PR1602 Etch MDSI_A_CLKN_CN
VIN1 VOUT1 Short MDSI_A_DN_3_CN MDSI_A_CLKP_CN
B2 B1 short0603_M
VIN2 VOUT2 MDSI_A_DP_3_CN
C C
0 R1618
C2 C1 C1602 C1601
16,28 PANEL_EN
5% 0402 1/16W ON GND 10pF/NC 10pF/NC Closed to LCM8
EMPTY PC1603 PC1604 50 50
R1617 0/NC 1uF 1uF 10% 10%
6 LCM_1P8V_EN
for EMI/RF
2
R0402 10V 10V EMPTY EMPTY 0402 0402
TPS22964CYZPR SDCW2012C-2-900TF SDCW2012C-2-900TF
10% 10% X5R X5R
0402 0402 L1605 L1601 EMPTY EMPTY
X5R X5R
*
4
3
+V1P8S LCM_3D3V
MDSI_A_DP_3
3V3 MDSI_A_DN_3
R1620
100K/NC
LCM_3D3V MDSI_A_CLKN NTK3043N/NC
1%
MDSI_A_CLKP Q1603 EMPTY EMPTY
0402
1V8 1/16W
C1606 2 3
D
5,16 LCM_RST# LCM_RST_3P3V# 16
2.2uF/NC C1605 LCM_1D8V
6.3V 0.1uF
G
EMPTY 20% 10V R1621 0 5% 04021/16W
1
0402 10% LCM_RST#_PMIC 28
X5R 0402
X5R LCD1601 EMPTY C1603 C1604
B LCM_3D3V 1 0.1uF/NC 1uF/16V B
10V C0603
0 R1608 2 10%
+V1P8S LCM_3D3V
EDID_3V3 3 0402
5% 0402 1/16W 4 X5R
5 R1619 0 5% 04021/16W
6 LCM_RST#_R LCM_RST# 5,16
7
6 LCM_ID 1/16W 0402 5% 0 R1612 8 LCD_SDA2
R1613 R1614
MDSI_A_DP_2_CN 9 R1602
3 MDSI_A_DP_2 4.7K 4.7K
1/16W 0402 5% 0 R1611 10 LCD_SCL2 100K/NC
NTK3043N/NC 1% 1%
MDSI_A_DN_2_CN 11 1%
3 MDSI_A_DN_2 Q1601 0402 0402
12 0402
1/16W 1/16W
13 R1610 0 5% 04021/16W 1/16W
1/16W 0402 5% 0 R1607 14 MDSI_A_DP_1_CN EMPTY
MDSI_A_DP_1 3 2 3 LCD_SCL2
D
MDSI_A_CLKP_CN 15 R1609 0 5% 04021/16W 5,20 I2C_1_SCL
3 MDSI_A_CLKP
1/16W 0402 5% 0 R1606 16 MDSI_A_DN_1_CN
MDSI_A_DN_1 3 EMPTY
MDSI_A_CLKN_CN 17
G
3 MDSI_A_CLKN
18
1
19 R1605 0 5% 04021/16W
NTK3043N/NC
1/16W 0402 5% 0 R1603 20 MDSI_A_DP_0_CN
MDSI_A_DP_0 3 Q1602
MDSI_A_DP_3_CN 21 R1604 0 5% 04021/16W
3 MDSI_A_DP_3
1/16W 0402 5% 0 R1601 22 MDSI_A_DN_0_CN
MDSI_A_DN_0 3 2 3 LCD_SDA2
D
MDSI_A_DN_3_CN 23 5,20 I2C_1_SDA
3 MDSI_A_DN_3
24
EMPTY
TP1605 25
G
26
1
BL_LED1 32
32 BL_LED2 27
A
28 BL_LED3 32 VLCD: 19.6/21.7/23.8 A
16 LCM_RST_3P3V# 29
30 Drawing Rule
31 32
33 +VBKLT_EDP Acer Inc. Allegro Lib Ver
FH35C-31S-0.3SHW
Project:
C1607 Title: <Title>
1uF/ 50V
C1206 Approved: Size: Document Number: Rev
Designer:
5 4 3 2 1
5 4 3 2 1
Touch Panel
+V3P3S_TCH_CON
C1702
change power name 0.1uF/NC
+V3P3S_TCH_CON 10V
+V3P3S 10%
D TCH1701 D
X5R
+V1P8S +V1P8S_TCH 1 EMPTY
R1701 Etch 2 I2C_5_SCL
Short 3 I2C_5_SDA I2C_5_SCL 5
4 TOUCH_INT# I2C_5_SDA 5 +V1P8S_TCH
short0603_M TOUCH_INT# 6
R1702 Etch 5 TOUCH_RESET#
Short 6 TOUCH_RESET# 5
C1703
short0603_M 7
1uF TOUCH_ID 6
8
10V
9
10%
10
C1706 C1704
X5R
1uF 0.1uF/NC
F0560-0801
10V 10V
10% 10%
X5R
Interface to Host X5R
EMPTY
C C
shielding can
MH
ShIELD1 ShIELD2 ShIELD3 ShIELD4

ShIELD_CLIP_ICSRC-52128SFR ShIELD_CLIP_ICSRC-52128SFR ShIELD_CLIP_ICSRC-52128SFR ShIELD_CLIP_ICSRC-52128SFR
1
MH2
ShIELD5 ShIELD6 ShIELD7 ShIELD8 MH1 MHNC236D158_C20D10_8PIN MHNC236D158_C20D10_8PIN
MHNC256D95_C20D10_8PIN MHNC256D95_C20D10_8PIN
MH3 MH4
7 6 7 6
8 5 8 5
9 4 9 4
2
3
2
3
* *
1
B B
ShIELD9 ShIELD10 ShIELD11 ShIELD12

MH5 MH6 MH7 MH8
1
ShIELD13 ShIELD14
ShIELD15
ShIELD_CLIP_ICSRC-52128SFR ShIELD_CLIP_ICSRC-52128SFR
ShIELD_CLIP_ICSRC-52128SFR
1
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
for EMI Co-lay

HDMI 0/NC 5% R1817 1/16W
HDMI_TX2_CMC_DP
EMPTY HDMI_TX2_CMC_DN
10% SDCW2012C-2-900TF HDMI_TX1_CMC_DP

3 DDI0_TX0_DP DDI0_TX0_DP 0.1uF C1801 HDMI_TX2_CMC_DP 1 4 HDMI_TX2_DP
HDMI_TX1_CMC_DN
3 DDI0_TX0_DN DDI0_TX0_DN 0.1uF C1802 HDMI_TX2_CMC_DN 2 3 HDMI_TX2_DN
* HDMI_TX0_CMC_DP
X5R 10V L1802
EMPTY HDMI_TX0_CMC_DN
D 0/NC 5% R1818 1/16W D
HDMI_CLK_CMC_DP
0/NC5% R1819 1/16W R1802 R1803 R1804 R1801
EMPTY HDMI_CLK_CMC_DN 680 680 680 680
10% L1803 1% 1% 1% 1%
*
3 DDI0_TX1_DP DDI0_TX1_DP 0.1uF C1803 HDMI_TX1_CMC_DP 2 3 HDMI_TX1_DP
1/16W 1/16W 1/16W 1/16W
3 DDI0_TX1_DN DDI0_TX1_DN 0.1uF C1804 HDMI_TX1_CMC_DN 1 4 HDMI_TX1_DN
R1805 R1807 R1806 R1808
X5R 10V SDCW2012C-2-900TF 680 680 680 680
EMPTY 1% 1% 1% 1%
0/NC 5% R1820 1/16W
1/16W 1/16W 1/16W 1/16W HDMI_PLS_FET
0/NC 5% R1821 1/16W
EMPTY
3
10% SDCW2012C-2-900TF D Q1801
3 DDI0_TX2_DP DDI0_TX2_DP 0.1uF C1805 HDMI_TX0_CMC_DP 1 4 HDMI_TX0_DP NTK3043N
SLP_S0IX# 1/16W R1809 PLS_FET 1
6,15,28 SLP_S0IX#
3 DDI0_TX2_DN DDI0_TX2_DN 0.1uF C1806 HDMI_TX0_CMC_DN 2 3 HDMI_TX0_DN 0 5% G S
*
2
X5R 10V L1804
EMPTY
0/NC 5% R1822 1/16W
0/NC 5% R1823 1/16W
change to Micro HDMI

EMPTY
10% L1801
*
C
3 DDI0_TX3_DP DDI0_TX3_DP 0.1uF C1807 HDMI_CLK_CMC_DP 2 3 HDMI_CLK_DP C
3 DDI0_TX3_DN DDI0_TX3_DN 0.1uF C1808 HDMI_CLK_CMC_DN 1 4 HDMI_CLK_DN Micro_HDMI1801

20
X5R 10V SDCW2012C-2-900TF SHELL1 21
EMPTY HDMI_HPD 1 SHELL2
0/NC 5% R1824 1/16W 2 HP DET
HDMI_TX2_DP 3 Utility
4 D2+
HDMI_TX2_DN 5 D2 Shield
HDMI_TX1_DP 6 D2-
7 D1+
ESD1802 ESD1801 D1 Shield
HDMI_TX1_DN 8
HDMI_TX0_DP 9 D1-
HDMI_TX0_DN 1 10 HDMI_TX0_DN HDMI_TX1_DP 1 10 HDMI_TX1_DP 10 D0+
1 10 1 10 HDMI_TX0_DN 11 D0 Shield
HDMI_TX0_DP 2 9 HDMI_TX0_DP HDMI_TX1_DN 2 9 HDMI_TX1_DN HDMI_CLK_DP 12 D0-
2 9 2 9 13 CK+
3 8 3 8 HDMI_CLK_DN 14 CK Shield
3 8 3 8 HDMI_CEC_1 15 CK-
HDMI_TX2_DN 4 7 HDMI_TX2_DN HDMI_CLK_DP 4 7 HDMI_CLK_DP +VHDMI TP1801 16 CEC
4 7 4 7 HDMI_DDC_SCL 17 GND
HDMI_TX2_DP 5 6 HDMI_TX2_DP HDMI_CLK_DN 5 6 HDMI_CLK_DN HDMI_DDC_SDA 18 DDC CLK
5 6 5 6 R1811 Etch 19 DDC DATA
Short +5V 22
SHELL3 23
ESD/NC ESD/NC short0603_M SHELL4
EMPTY EMPTY *
C1809 C1810 AHR48-AK1200
B 1uF 22pF B
10V 50V
10% 5%
0402
+V1P8S +V1P8S +VHDMI X5R NPO
+V1P8S
D1801
MMSD301T1
R1810
1K
R1812 R1813 RN_+VHDMI 1/16W
10K 10K 1%
1% 1% C1811
1uF 3 DDI0_HPD#
Closed to HDMI CONN
3
1/16W 1/16W R1814 R1815 10V
NTK3043N 10K 10K 10% Q1802 D
Q1803 1% 1% NTK3043N
X5R 1 HDMI_HPD
1/16W 1/16W S G
DDI0_DDC_SCL 2 3 HDMI_DDC_SCL C1812
S
3 DDI0_DDC_SCL
2
1uF R1816
10V 100K
G
10% 1%
1
NTK3043N X5R 1/16W

Q1804
DDI0_DDC_SDA 2 3 HDMI_DDC_SDA
S
A 3 DDI0_DDC_SDA A
Drawing Rule
Acer Inc.
G
1
Project: Allegro Lib Ver

Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
Device :Rear Camera\Front Camera Camera conn and LDO change
+V2P8_CAM
+V3P3A ESD1901
500mA, 2.85 V LDO ESD1902
U1901 MCSI_1_CLK_DP_C 1 10 MCSI_1_CLK_DP_C

1 10 MCSI_1_DATA1_DP 1 10 MCSI_1_DATA1_DP
1 10
D 1 5 U1901_VOUT R1916 Etch MCSI_1_CLK_DN_C 2 9 MCSI_1_CLK_DN_C D
VIN VOUT 2 9 MCSI_1_DATA1_DN 2 9 MCSI_1_DATA1_DN
2 Short 2 9
3 GND 4 short0603_M 3 8
4 SOC_+V2P8_CAM_EN EN NC#4 3 8 3 8
C1904 3 8
C1902 C1903 0.1uF MCSI_1_DATA0_DP 4 7 MCSI_1_DATA0_DP
4 7 4 7
1uF 22pF RT9013-2HPU5-GP C1901 10V 4 7
10V 50V 1uF 10% MCSI_1_DATA0_DN 5 6 MCSI_1_DATA0_DN
5 6 5 6
R1903 10% 5% H active 10V 5 6
100K 0402 10% X5R
1% X5R NPO ESD/NC
X5R ESD/NC
1/16W EMPTY
EMPTY
ESD1903
for EMI/RF MCSI_2_CLK_DP_C 1

1 10
10 MCSI_2_CLK_DP_C
MCSI_2_CLK_DN_C 2 9 MCSI_2_CLK_DN_C
2 9
3 8
MCSI_1_CLK_DN_C MCSI_2_CLK_DN_C 3 8
MCSI_1_CLK_DP_C MCSI_2_CLK_DP_C MCSI_2_DATA_DP 4 7 MCSI_2_DATA_DP
4 7
MCSI_2_DATA_DN 5 6 MCSI_2_DATA_DN
C 5 6 C
C1905 C1906 C1907 C1908 ESD/NC

12pF/NC 12pF/NC 12pF/NC 12pF/NC
50 50 50 50 EMPTY
5% 5% 5% 5%
NPO NPO NPO NPO

EMPTY EMPTY EMPTY EMPTY
MCSI_2 Front Camera(2M) Front Camera
+V2P8_CAM
+V1P8SX
C1914
C1913 4.7uF
0.1uF 6.3V
+V2P8_CAM +V1P8SX 10V 20% CAM_CN1902
10% 1
X5R
B MCSI_1 Rear Camera (5M) Rear Camera X5R 2
4
3 B
C1911 C1909 5
+V2P8_CAM 4.7uF 4.7uF 6
6 PLT_CLK1_CAM2
6.3V 6.3V 7
20% 20% 8
3 CAMERA_2_RESET#
+V1P8SX 9
TP1604 I2C_3_SDA 5,19
X5R X5R 10
5,19 I2C_3_SCL
11 CAMERA_2_PD 3 TP1603
C1912 12
0.1uF 13
10V 14
C1910 10% 15 MCSI_2_CLK_DP_C
MCSI_2_CLK_DP 3
0.1uF CAM_CN1901 3 MCSI_2_CLK_DN R0402 MCSI_2_CLK_DN_C 16 R1908 0
10V X5R 1 R1910 0 17 R0402
10% 18
3 MCSI_2_DATA_DP
+V2P8_CAM 2 19
MCSI_2_DATA_DN 3
X5R 3 20
4 21
5
6 FH35C-21S-0.3SHW
6 PLT_CLK1_CAM1
7
TP1602 8
9
I2C_3_SDA 5,19
10
5,19 I2C_3_SCL
11
CAMERA_1_PD# 3
12
3 MCSI_1_DATA1_DP
13
MCSI_1_DATA1_DN 3
A
14 A
15 MCSI_1_CLK_DP_C
MCSI_1_CLK_DP 3
3 MCSI_1_CLK_DN R0402 MCSI_1_CLK_DN_C 16 R1909 0 Drawing Rule
R1911
3
0
MCSI_1_DATA0_DP
18
17
19
R0402
20
MCSI_1_DATA0_DN 3 Project:
21
CAMERA_1_VCM_PD# 3 Ducati2 OrCAD Lib Ver
FH35C-21S-0.3SHW
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
+V1P8S_CODEC
for EMI Closed to Audio Codec
+V1P8S_DACREF_CODEC R2001
0 C2001 +V3P3S_MICVDD
R0402 0.1uF/NC
10V
R2002 10% +V1P2S_CODEC
0 0402 C2002 C2003
R0402 X5R 2.2uF 0.1uF C2004 C2005
EMPTY 10V 10V 0.1uF 2.2uF C2006 22pF C0402
C0402 C0402 10V 6.3V I2S_2_FS
C2009 C2010 10% 20% C2011 22pF C0402
D
+V5P0S PWR_SPKR C2007 C2008 10uF 0.1uF 0402 0402 I2S_2_TXD D
10uF 0.1uF 10V 10V GND_AUD X5R X5R C2012 22pF C0402
10V 10V 20% 10% I2S_2_RXD
R2003 Etch 20% 10% 0603 0402 U2001 C2017 22pF C0402
Short 0603 0402 X5R X5R I2S_2_CLK
short0603_M X5R X5R 3 42 C0402
MICVDD DCVDD 43 +V1P8S_DBVDD R2004 CLK_I2S_MCLK C2018 22pF/NC
DBVDD +V1P8S_CODEC
GND_AUD +V1P8S_AVDD 15 0 R0402 EMPTY
PWR_SPKR GND_AUD AVDD 23 +V1P8S_CPVDD 0 R2007
CPVDD +V1P8S_CODEC
+V1P8S_DACREF_CODEC 10 +V1P8S C2021 C2022 C2023 22pF
DACREF 27 CODEC_CPVEE C2019 2.2uF C2014 C2020 0.1uF 2.2uF I2S_0_TXD C0402
46 CPVEE 0.1uF 10uF 10V 6.3V C2015 22pF
2 SPKVDDR 24 CODEC_CPVPP C2013 2.2uF 10V 10V 10% 20% I2S_0_RXD C0402
SPKVDDL CPVPP 100K
C2016 C2024 C2025 C2026 10% 20% 0402 0402 C2027 22pF
10uF 10uF 0.1uF 0.1uF/NC4 I2S_0_TXD I2S_0_TXD 33 17 0402 0603 R2005 X5R X5R I2S_0_FS C0402
DACDAT1 LOUTR TP2002
10V 10V 10V 10V I2S_0_RXD 34 16 GND_AUD X5R X5R 1% C2028 22pF
4 I2S_0_RXD ADCDAT1 LOUTL TP2003
20% 20% 10% 10% I2S_0_CLK 36 1/16W I2S_0_CLK C0402
4 I2S_0_CLK BCLK1
0603 0603 0402 0402 I2S_0_FS 35 7 HP_MIC_IN_C EMPTY 0402
4 I2S_0_FS LRCK1 IN2+
X5R X5R X5R X5R 8 JACK_DET#_R 0/NC R2011 R0402 GND_AUD JACK_DET# JACK_DET# 6,21
EMPTY I2S_2_TXD 31 IN2-/JD2
4 I2S_2_TXD DACDAT2
I2S_2_RXD 32 5 DMIC_DATA_R R2014 R0402
4 I2S_2_RXD ADCDAT2 IN1+/DMIC1_DAT DMIC_DATA 21
I2S_2_CLK 30 6 22R 1%
4 I2S_2_CLK BCLK2 IN1-/DMIC2_DAT/JD1
I2S_2_FS 29
4 I2S_2_FS LRCK2 26 HP_OUT_R
39 HPO_R 28 HP_OUT_L HP_OUT_R 21
5,16 I2C_1_SDA SDA HPO_L HP_OUT_L 21
38
5,16 I2C_1_SCL SCL 1
0 R2017 CLK_I2S_MCLK_R 37 SPO_L+ 48 SPK_LP 21
6 CLK_I2S_MCLK MCLK SPO_L- SPK_LN 21
C 0 R2018 GPIO_SUS4_R 40 45 C
6 GPIO_SUS4 GPIO1/IRQ SPO_R+ SPK_RP 21
22R R2019 DMIC_SCL_R 41 47
21 DMIC_SCL GPIO2/DMIC_SCL SPO_R- SPK_RN 21
D2001 CH751H-40-1
K A LDO1_EN 44 13 C2029 C2030
28 CODEC_RESET# RESET MONO+ TP2005
14 0.1uF 0.1uF
MONO- TP2006 MICBIAS
CODEC_VREF1 11 10V 10V
CODEC_VREF2 12 VREF1 4 10% 10%
VREF2 MICBIAS1 0402 0402
+V1P8S
20% 2.2uF C2031 CPP1 20 25 X5R X5R
C2032 C2033 6.3V X5R 0402 CPN1 21 CPP1 HPOFB
4.7uF 4.7uF CPN1 9
6.3V 6.3V 20% 2.2uF C2034 CPP2 19 AGND 22 R2021 R2022
R2020 CPP2 CPGND
20% 20% 6.3V X5R 0402 CPN2 18 22R 22R
10K CPN2
0402 0402 49 1% 1%
1% <E-PAD> SPKGND/DGND
X5R X5R R0402 R0402
0402 +V1P8S_CODEC
1/16W ALC5642
GND_AUD
LDO1_EN PJP2001
GND_AUD
1 2
I2S_2_TXD TP2008
short0603_M
R2029
GND_AUD GND_AUD GND_AUD TP2007
Etch Short
3
PWR_SPKR D Q2002
+V1P8S NTK3043N
EMPTY 28 TXE_UNLOCK 1
0R/NC R2028 MICBIAS G S
0603 1% 1/10W
2
B B
A
R2023
PU2001 D2002 100K/NC
A2 A1 SD103AWS-1-GP 1%
R2027 VIN1 VOUT1 0402
100K B2 B1 1/16W
K
1% VIN2 VOUT2 EMPTY
0402
1/16W
C2 C1 MICBIAS_K
ON GND C2035
4.7uF
PC2037
PC2036 6.3V X5R
1uF
R2025 1uF R2024 20%
TPS22922YZPR 10V
100K 10V 2.2K 0402
10%
1% 10% 1%
0402
0402 0402 0402
X5R C2038
1/16W X5R 1/16W L2001
HP_MIC_IN_C HP_MIC_IN_RC R2026 HP_MIC_IN_LR 1 2 HP_MIC_IN HP_MIC_IN 21
MHC1608S601LBP-GP_0
R0402 0
1uF C2039
10V 220pF /NC
10%
EMPTY
0402
C0402
X5R
Drawing Rule
Acer Inc.
A A
GND_AUD GND_AUD

Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
Device :JACK_PHONE
Jack_DET_N: Low=inserted=detected
+V1P8A
1/16W
D 0402 EMPTY 0 R2104 D
R2102 0/NC R2103 GND_AUD
+V3P3S_SWITCH +V3P3S 100K/NC 0402 5% 1/16W
GND_AUD
1% 0402 5% 1/16W
0 R2105 EMPTY
0402 5% 1/16W 0/NC R2106
U2101 20,21 HP_MIC_IN 0402 5% 1/16W
C2101 1% 0 R2107 EMPTY
0.1uF A2 A3 UART3_RX_AUDIO R2101 1 2 22R R0402 20,21 HP_MIC_IN 0402 5% 1/16W
10V V+ NO1 A1 UART3_TX_AUDIO R2108 1 2 22R R0402 UART_3_RXD 5,15 1 PJ-362_3
NO2 UART_3_TXD 5,15 EMPTY
10% HP_OUT_CN_L B3 1% 20 HP_OUT_R HP_OUT_R 0/NC R2120 HP_OUT_CN_R 33 R2109 3
0402 HP_OUT_CN_R B1 COM1 HP_OUT_L 0/NC R2121 HP_OUT_CN_L 33 1% R2110 5
COM2 20 HP_OUT_L
X5R D3 UART3_SW 5 1%
IN1 EMPTY
D1
HP_OUT_L C3 IN2 JACK_DET# 4
NC1 6,20 JACK_DET#
HP_OUT_R C1 D2 2
NC2 GND
R2111 PHONE_JACK2101
TS5A22362YZPR-GP-U 100K
GND_AUD 1%
0402 Low :ADUIO
1/16W
HI :UART3 R2112 R2113
ESD2103 100K 10K
ESD2101 ESD2102 ESD 1% ESD2104 1%
FUNCTION TABLE ESD ESD 0402 ESD 0402
1/16W 1/16W
GND_AUD
NC TO COM NO TO COM
C IN C
COM TO NC COM TO NO
GND_AUD
GND_AUD GND_AUD
Low ON OFF
Hi OFF ON
R2514 is reserved for test
for EMI/RF Closed to AUDIO JACK
22pF/NC C2102
EMPTY JACK_DET#
20 SPK_RP 0R R3411 SPK_RP_R
0603 5% 1/10W 22pF/NC C2104
EMPTY HP_OUT_L
20 SPK_RN 0R R3412 SPK_RN_R
0603 5% 1/10W 22pF/NC C2103
EMPTY HP_OUT_R
22pF/NC C2105
EMPTY HP_MIC_IN
1
1
ESD2704 ESD2705 C2720 C2719
Device :DMIC / SPEAKER ESD/NC ESD/NC 1000pF

50V
1000pF
50V
2
EMPTY EMPTY 10% 10%

0402 0402
B X7R X7R GND_AUD B
+V1P8S
R2114 Etch +V1P8S_DMIC

SPK2101
Short 20 SPK_LP 0R R2118 SPK_LP_R 1 5
short0603_M C2106 C2107 C2108 0603 5% 1/10W 2
1uF 1uF 0.1uF/NC 20 SPK_LN 0R R2119 SPK_LN_R
6.3V 6.3V 10V 0603 5% 1/10W SPK_RP_R 3
20% 20% 10% SPK_RN_R 4 6
0402 0402 0402
X5R X5R X5R W1256-04R
EMPTY
1
ESD2105 ESD2106 C2109 C2110
ESD/NC ESD/NC 1000pF 1000pF
R2115 50V 50V
2
0 DMIC_R2101 EMPTY EMPTY 10% 10%
5% 0402 0402
R0402 6 1 X7R X7R
1/16W GND1 VDD
2 4 DMIC_DATA
SELECT DATA DMIC_DATA 20
R2116 5 3 DMIC_SCL DMIC_SCL 20
R0402 GND2 CLOCK
0/NC 7 8
1/16W GND3 GND4
A A
EMPTY SPK0415HM4H-B
Drawing Rule
R2117
0
Project:
R0402
1/16W
DMIC_GND
5% Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
+V1P8A
USB_ULPI_DATA_0
USB_ULPI_DATA_1
OTG / Charger EMPTY
R2202
USB_ULPI_DATA_2 2.2K/NC
USB_ULPI_DATA_3
USB_ULPI_DATA_4
ID pin: 1%
USB_ULPI_DATA_5
USB_ULPI_DATA_6 Charger => High +VUSB_CHARGER_PHY
+V1P8A 1/16W
USB_ULPI_DATA_7
C2202 C2203 C2204 C2205

OTG =>Low C2206
USB_ULPI_RST#
D 10pF/NC 10pF/NC 10pF/NC 10pF/NC +VUSB_PHY 0.1uF/NC D

50 50 50 50 10V
10% 10% 10% 10% C2207 C2208 10%
0.47uF 0.1uF/NC
C2209 X5R C2210 X5R C2211 X5R C2212 X5R C2201 10V 10V X5R
EMPTY
10pF/NC EMPTY
10pF/NC EMPTY
10pF/NC EMPTY
10pF/NC 0.1uF/NC 20% 10% EMPTY
50 50 50 50 10V USB_ULPI_0_CLK_R
10% 10% 10% 10% 10% X5R X5R USB_ULPI_REFCLK_R
U2201 EMPTY C2213
X5R X5R X5R X5R X5R 0.47uF
EMPTY EMPTY EMPTY EMPTY EMPTY F3 F4 10V
VBAT VBUS 20%
R2201 0 5% 1/16W
REG3V3
E3 C2217 2.2uF C2216 C2214 Closed to USBPHY
USB_ULPI_REFCLK_R F5 X5R 10pF/NC 10pF/NC
5 USB_ULPI_REFCLK REFCLK E6 6.3V 20% X5R C2215 2.2uF 50 50
5
5
USB_ULPI_DATA_0
USB_ULPI_DATA_1
R2206
R2205
150
150
USB_ULPI_DATA_R_0
USB_ULPI_DATA_R_1
B1
A1 DATA0
REG1V5
B5 6.3V 20% X5R
10% 10% for EMI/RF
R2204 150 USB_ULPI_DATA_R_2 A2 DATA1 VDDIO_1 B2 X5R X5R
5 USB_ULPI_DATA_2 DATA2 VDDIO_2
5 USB_ULPI_DATA_3 R2207 150 USB_ULPI_DATA_R_3 A3 EMPTY EMPTY
R2209 150 USB_ULPI_DATA_R_4 A5 DATA3 D4 USB_OTG_VBUS_EN R2210 100K
5 USB_ULPI_DATA_4 DATA4 PSW
5 USB_ULPI_DATA_5 R2208 150 USB_ULPI_DATA_R_5 A6 1/16W 1%
R2212 150 USB_ULPI_DATA_R_6 B6 DATA5 F2 ULPI_0_CHRG_DET# TP2202
5 USB_ULPI_DATA_6 DATA6 CHRG_DET
5 USB_ULPI_DATA_7 R2211 150 USB_ULPI_DATA_R_7 C6
DATA7 F1
USB_ULPI_0_CLK R2213 0 5% 1/16W USB_ULPI_0_CLK_R A4 CHRG_POL
5 USB_ULPI_0_CLK CLOCK E1
USB_ID_FSA9285 R2214 0/NC TUSB1211_ID D3 CHRG_EN_N
2,23,33 USB_ID_FSA9285 ID
5% 1/16W EMPTY E2
R2215 0 5% 1/16W USB_ULPI_0_STP_R D6 FAULT
C
5 USB_ULPI_0_STP
R2216 150 USB_ULPI_NXT_R D5
STP
NC
C2 Two frequencies are supported: C
5 USB_ULPI_NXT NXT
5 USB_ULPI_DIR
R2217 150 USB_ULPI_DIR_R E5
DIR
SOF
F6 TUSB1211_SOF
TP2201 19.2MHz (when CFG = 0), and 26MHz
D1 USB2_ULPI_OTG_DP
6 USB_ULPI_RST#
R2218 0 5% 1/16W USB_ULPI_RST#_R C4
RESET_N
DP
DM
C1 USB2_ULPI_OTG_DN (when CFG = 1).
0 R2219 CFG_C B4
5% 1/16W CFG
0 R2220 TUSB1211_CS# C3 C5
5% 1/16W CS_N GND_1 D2
USB_ULPI_0_CS B3 GND_2 E4
5 USB_ULPI_0_CS CS GND_3
TUSB1211
R2221
2.2K
1%
1/16W
+V1P8S
+VBATA
+VUSB_CONN
C2218 C2219
+VBATA 0.47uF 0.1uF/NC
C2223 C2220 C2221 10V 10V EMPTY
0.1uF/NC 0.47uF 0.1uF/NC 20% 10%
B +VBATA C2222 25v 10V 10V B
R2222 10% 20% 10% X5R X5R
100K 1uF/25V U2202
1% C0603 X5R X5R X5R
R2223 EMPTY EMPTY B4 D3
Q2201 VDDIO AUDIO_L
100K 1/16W D2
1% A4 AUDIO_R B2
4 3 +VUSB_CHARGER_PHY VBAT MIC
PMIC_USB_DCP# 28
1/16W +VBATA D4 E1
5 2 CHG_DET_FSA_ULPI# VBUS_OUT ID_CON USB_ID_FSA9285 22,23,33
E4 E2 USB2_DOCK_CHOKE_DP 23
VBUS_IN DP_CON E3
CHGDET_PMIC 6 1 DM_CON USB2_DOCK_CHOKE_DN 23
5 USB2_CPU_P0_DP D1 B3 I2C_2_SDA 5
2N7002KDW-GP DP_HOST1 I2C_SDA
R2224 5 USB2_CPU_P0_DN C1 C3 I2C_2_SCL 5
100K DM_HOST1 I2C_SCL C4
INT# FSA9285_INT#_R 6
1% USB2_ULPI_OTG_DP A2
DP_HOST2 R2225 +V1P8S
USB2_ULPI_OTG_DN A3
1/16W DM_HOST2 A1
CHG_DET_FSA_ULPI# C2 GND B1 EMPTY
CHG_DET# GND1 10K/NC
1/16W
FSA9285UCX-1-GP 1%
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
+VUSB_CONN
Device :USB HS IF C2301 C2303 C2304
K
1
22uF/25v 470pF/NC 0.1uF/25v
If mini-A connector insert => CID < 0V => Low 25v 50V 25v D2302 D2301
20% 10% 10% ESD/NC UDZV-5D6B-GP
If mini-B connector insert => CID > 1.2V => High 0805 0402 0402 EMPTY
2
X5R X7R X5R
A
IDPULLUP pin is replaced by 1.2V power source. EMPTY
D D
10
6
7
0/NC R2301
0402 5% 1/16W EMPTY USB2301
6
7
10
SDCW2012C-2-900TF 1 MUC4B-536207
1 4 USB_DP_C USB_DN_C 2 1
22 USB2_DOCK_CHOKE_DP USB_DP_C 3 2
2 3 USB_DN_C USB_ID_FSA9285 4 3
22 USB2_DOCK_CHOKE_DN * 22,33 USB_ID_FSA9285 5 4
F2301 5
11
8
9
0/NC R2302
8
9
11
0402 5% 1/16W EMPTY
3NOD :update the ESD part and USB connector

C C
B B
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
COMBO MODULE
(BLUETOOTH & WIFI) Q2401
RW1A025APT2CR +VBATA_WIFI
VDD_WL_PA +V1P8S_WIFI
+VBATA 6
+VBATA_WIFI
5
R2402
4 2
D
S
1 Short
U2402 Etch
+VBATA C2401
G
1uF 1 5 short0603_M
10V 2 VIN VOUT
3
10% C2402 PALDO_PU R2425 0 PALDO_PU_R 3 GND 4
R2401 0402 C2403 C2404 C2405 C2406 1uF EN NC#4
D 100K X5R 4.7uF 2.2uF 1uF 4.7uF 10V C2407 C2408 D
1% 10V 10V 10V 10V 10% RT9013-33GU5-GP 4.7uF 0.1uF
+V2P85S
0402 10% C0402 10% 10% 0402 10V 10V
1/16W 0402 0402 0402 X5R 10% 10%
WIFI_PWR_EN# X5R X5R X5R U2403 0402 0402 +V1P8S_WIFI
X5R X5R
3
1 5
D Q2402 2 VIN VOUT
NTK3043N 3 GND 4
5,24 WIFI_PWR_EN EN NC#4
5,24 WIFI_PWR_EN
1
G S C2410
C2409
RT9013-18GU5-GP 1uF
1uF
2
10V 10K/NC
10V
10% BT_DEV_RESET#_R R2403 EMPTY 1/16W
10K/NC 1% 0402
10%
0402 BT_DEV_EN R2404 EMPTY 1/16W 1% 0402
0402
X5R WL_DEV_EN R2405 10K1/16W 1% 0402
X5R
10K/NC
+VBATA_WIFI WLAN_HOST_WAKE R2406 EMPTY 1/16W 1% 0402
VIN_LDO BT_HOST_WAKE R2407 EMPTY 1/16W 1% 0402
2.2uH L2401 10K/NC
2016
C2412 C2413
C2411 0.1uF/NC 4.7uF
10uF 10V 10V
10V 10% 10% U2401
20% 0402 0402
0603 X5R X5R A1 E1
X5R +VBATA_WIFI A2 GND GND E2
EMPTY A3 VBAT_IN NC#E2 E3 WL_UART_TX
NC#A3 WL_UART_TX TP2401
A4 E4
A5 GND WL_GPIO_2 E5
A6 ANT_FM_RX GND E6 WL_GPIO_8
A7 NC#A6 WL_GPIO_8 E7 UART_BT_CTS#_R R2413 0
VIN_LDO NC#A7 BT_UART_RTS# UART_BT_CTS# 6
A8 E8 UART_BT_TXD_R R2414 0
NC#A8 BT_UART_RXD UART_BT_TXD 6
A9 E9
GND GND
VIN_LDO_1 B1 F1 SDIO2_DATA_1
CBUCK_OUT SDIO_DATA1_SPI_IRQ SDIO2_DATA_1 4
B2 F2 SDIO2_DATA_0 SDIO2_DATA_0 4
C2414 B3 GND SDIO_DATA0_SPI_DO F3 SDIO2_DATA_3
NC#B3 SDIO_DATA3_SPI_CS SDIO2_DATA_3 4
0.1uF B4 F4
NC#B4 BT_PCM_IN I2S_1_TXD 4
C 10V B5 F5 C
GND BT_PCM_CLK I2S_1_CLK 4
10% I2C_SCK B6 F6 WLAN_HOST_WAKE
TP2402 BT_I2S_CLK WL_HOST_WAKE WLAN_HOST_WAKE 6
0402 BT_HOST_WAKE B7 F7 UART_BT_RTS#_R R2416 0
6 BT_HOST_WAKE BT_HOST_WAKE BT_UART_CTS# UART_BT_RTS# 6
X5R B8 F8 UART_BT_RXD_R R2415 0
B9 GND BT_UART_TXD F9 UART_BT_RXD 6
NC#B9 GND
C1 G1 SDIO2_CLK
VIN_LDO SDIO_CLK_SPI_CLK SDIO2_CLK 4
C2 G2 SDIO2_DATA_2 SDIO2_DATA_2 4
BT_DEV_EN C3 NC#C2 SDIO_DATA2_SPI_NC G3 SDIO2_CMD
5 BT_DEV_EN BT_SHUTDOWN# SDIO_CMD_SPI_DI SDIO2_CMD 4 VDD_WL_PA
R2417 0 BT_DEV_RESET#_R C4 G4 I2S_1_FS 4
5 BT_DEV_RESET# NC#C4 BT_PCM_SYNC
C5 G5 +V1P8S_WIFI
WL_GPIO_6 C6 GND BT_PCM_OUT G6 I2S_1_RXD 4
I2C_WS C7 WL_GPIO_6 GND G7 WL_UART_RX
TP2403 BT_I2S_WS WL_UART_RX TP2404
R2418 0 BT_WAKE_R C8 G8
5 BT_WAKE BT_WAKE GND
C9 G9
GND VDD_WL_PA
2.7pF/NC C2415
68pF/NC C2416
D1 H1
NC#D1 VDDIO
68pF/NC C2419
2.7pF/NC C2420
WL_DEV_EN D2 H2
5 WL_DEV_EN WL_SHUTDOWN_N_RST# NC#H2
SUS_CLK_WLAN D3 H3
6 SUS_CLK_WLAN RTC_CLK HSIC_DATA
D4 H4 C2417
I2C_DO D5 GND NC#H4 H5 0.1uF/NC
TP2405 BT_I2S_DO GND
D6 H6 16V C2418
I2C_DI D7 WL_GPIO_5 NC#H6 H7 10% 0.1uF/NC
TP2406 BT_I2S_DI GND
D8 H8 X5R 16V
D9 GND NC#H8 H9 C0402 10%
NC#D9 NC#H9 EMPTY X5R
+V1P8S_WIFI +V1P8S_WIFI A10 J1 C0402
B10 GND GND J2 EMPTY
EMPTY EMPTY
C10 JTAG_SEL HSIC_STROBE J3
D10 GND NC#J3 J4 EMPTY EMPTY
R2419 R2420 E10 WL_TRST_L GND J5
F10 GND GND J6
0 0/NC GND GND
R0402 R0402 G10 J7
EMPTY H10 GND NC#J7 J8
J10 GND GND J9
WL_GPIO_8 WL_GPIO_6 GND GND
K1 M1 RF2401
K2 GND GND M2 C2421 0 RF_AW_RF_WIFI4 1
R2421 R2422 K3 GND GND M3
PALDO_PU K4 GND GND M4 3 4
0/NC 0 PALDO_PU GND
R0402 R0402 K5 M5
GND GND
2
2
B EMPTY K6 M6 2 B
GND GND
K8 M8 EMPTY 20429-001E
K9 GND GND M9 LQP15MN4N7B02D LQP15MN2N0B02D
K10 GND GND M10 L2422 L2423
GND GND
1
1
L1 N1 RF_WIFI_3 RF2402
L2 GND ANT_1 N2 2
Ground
SDIO2_CLK GND GND
L3 N3 C2424 0 RF_AW_RF_WIFI_2 1 3
L4 GND GND N4 4
SUS_CLK_WLAN L5 GND GND N5
L6 GND GND N6
2
GND GND 2 20369-001E

L8 N8 L2426
C2425 GND GND
C2427 L9 N9 LQG15HN6N8J02D/NC
10pF/NC 10pF/NC L10 GND GND N10 RF_WIFI_1 LQP15MN2N7B02D
50 GND ANT_0 L2428
50 EMPTY
10%
1
10%
1
0402 AW-AH691A-DS
0402
X5R
X5R
EMPTY
EMPTY
50 Ohm trace
Differential impedence 100 Ohm
Surround by ground in all direction (alone)
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
+VBATA_GPS +V1P8S_GPS
GPS
+VBATA
U2502
1 5
+V_GPS_AUXOUT +V1P8S_GPS VIN VOUT
2
L2502 3 GND 4
EN NC#4
1 2 +V_GPS_AUXOUT_X1901
C2502 C2503
D SBJ100505T-601Y-N D
+V2P85S 1uF RT9013-33GU5-GP 1uF
EMPTY
10V 10V
C2504 C2505
10% 10%
1uF 22pF/NC
0402 U2503 0402
10V 50V
X5R X5R
10% 5%
1 5
0402 0402 VIN VOUT
2
X5R C0G R2507 GND
4 GPS_POWERON 0 3 4
EN NC#4
X2501 R0402
C2507
4 3 C2506
VCC OUT RT9013-18GU5-GP 1uF
1uF
10V
1 2 10V
NC/GND GND 10%
C2508 10%
U2501 0402
0.1uF 0402
X5R
16V 7L26003009 X5R
GPS_RF_IN D6 D4 AUX_OP
10% GPS_RFIN GPS_TEST_OUT TP2502
0402
GPS_TCXO
X7R
E4 A2
GPS_TCXO UART_TXD/SCL A1 UART_GPS_RXD 6
R2501 UART_RXD/SDA UART_GPS_TXD 6
0 A6 B1
6 SUS_CLK_GPS CLK32 UART_RTS#/HOST_REQ UART_GPS_CTS 6
B2
R0402 UART_CTS#/ANT_SEL UART_GPS_RTS 6
C2501 CLK_GPS_CAL A5
TP2501 GPS_CAL
10pF/NC
50 GPS_WAKEUP_R B3 B6 GPS_LNA_EN_R 0 R2502 GPS_LNA_EN
10% GPS_TIMESTAMP B5 NSTANDBY LNA_EN/CAL_REQ
TP2503 SYNC/PPS R0402
0402 GPS_BLANKING A3
TP2504 IFVALID
X5R CLK_GPS_REQ C3
TP2505 CLK_REQ
+V1P8S VDD_GPS_IF
C EMPTY C
R2503 GPS_VDDIO E2
0/NC VDD1P2_GRF L2503
E5
R0402 VDD_GPS_IF
0 R2504 A4 E6 VDD_GPS_LNA 2 1 C2513
VDD_IO VDD_GPS_LNA SBJ100505T-601Y-N 1uF
R0402
0 R2505 6.3V
4 GPS_WAKEUP
E1 D1 VDD1P1_CORE 20%
R0402 VDD_3P3_IN VDD1P1_CORE C1 0402
VDD_CORE X5R
+V1P8S_GPS E3 D3 C2510
VDD_AUX_IN VDD1P8_AUX 1uF VDD_GPS_LNA
6.3V
REF_CAP C2 D5 20% C2509
REF_CAP VSS_GPS_LNA C6 0402 47pF
C2512 VSS_GPS_IF
C2511 B4 X5R 50V
0.01uF VSS_CORE1 +V_GPS_AUXOUT
1uF C5 C4 5%
16V TM0 VSS_CORE2
10V D2 0402
10% VSS_PMU
10% C0G
0402
0402
X7R C2514 C2515
X5R BCM4752IUB2G-GP
1uF 0.1uF
10V 10V
+VBATA_GPS
10% 10%
0402 0402
X5R X5R
C2516
1uF
B 10V B
10%
0402 +V_GPS_AUXOUT
X5R
+V_GPS +V_GPS_AUXOUT
L2504
R2506 2 1
100K/NC SBJ100505T-601Y-N
1% 39pF/NC C2518
0402 C2517 0.047uF
1/16W C0402 10V
EMPTY EMPTY 10%
GPS_LNA_EN 0402
X5R
CN2502 U2504
U2505 C2519 4 U2506
C2524 L2505 VCC
2
Ground
3 1 RFIN_B8401_CONN 1 2RFIN_B8401_CONN_2 1 1 2RFIN_2657_L 1 2RFIN_2657 3 6 RFIN_B8401 1

4 INPUT 5 IN OUT INPUT 5
2 GND_CASE1 470P/50V 6.8nH 1 2 GND_CASE1
47P/50V GND_CASE GND GND_CASE L2501
5 2
20369-001E SHDN GND 1 2GPS_RF_IN
1
3 4 3 4 GPS_RF_IN_1
GND OUTPUT R2512 R2513 GND OUTPUT
1
C2522
6.8nH
1
2.7P/50V/NC C2523 0/NC 0/NC MAX2659 B9482
2
2.7P/50V/NC B9482 R0402 R0402 C2520

EMPTY
2
1.8P/50V close to u2501

EMPTY
2
DY DY
A
EMPTY EMPTY A
Drawing Rule
3NOD :update the FL part Acer Inc. Allegro Lib Ver

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
Gyro Sensor & G‐sensor Combo
D D
+V1P8S_GYRO
+V1P8S
U2602 +V3P3S +V3P3S_GYRO
A2 A1
VIN1 VOUT1
R2601 Etch
B2 B1
VIN2 VOUT2 Short
+V3P3S_GYRO short0603_M
C2 C1
ON GND
C2601
C2602 1uF
1uF 10V
TPS22922BYZP
10V 10%
10% 0402
0402 X5R
X5R
+V1P8S_GYRO
C
MPU‐6050 C
C2603 C2604
0.1uF/NC 1uF
U2601 10V 10V
10% 10%
MPU-6050 0402 0402
X5R X5R
QFN24G4-G265275-SH38 EMPTY
TP2601 GYRO_AUX_DA 6 3
TP2602 GYRO_AUX_CL 7 ES_DA RESV/CCS 8
ES_CL CS/VLOGIC 9
AD0/SDO 24
+V3P3S_GYRO SDA/ SDI I2C_4_SDA 5
23
SCL/ SCLK I2C_4_SCL 5
12
6 GPIO_SUS3 11 INT 1
FSYNC CLK_I
13 10 REG_O
18 VDD REGOUT 20 CP_OUT
GND CPOUT
RESV/DRDY
C2606 C2607
1uF 0.1uF 22 2
10V 10V 21 RESV3 NC1 4
RESV2 NC2
1
CAD0
CAD1
10% 10% 19 5 C2608 C2609

0402 0402 RESV1 NC3 2200P/50V 0.1uF
NC
X5R X5R C0402 10V

2
B 10% B
14
16
17
15
0402
X5R
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
VIBRATOR Switch buttom and volumn up/down buttom

D D
+V3P3S
J1_SW2701
+V3P3S_VIB F0560-0401
PU2701
6
W0801-0202N PWR
5 416001666300 R2703 0 SW_PWR 4
6
VIN 15,28 POWER_BUTTON_INPUT 4
R0402 1/16W 1 1
OUT P1
1
28 PMIC_VIBRA_PWM1 R2707 0/NC EMPTY 2 2 R0402
GND P2 ESD2702 C2703 3
R2708 0 4 3 C2704 C2702 3 1/16W 1000pF 3
28 PMIC_VIBE_EN EN /OC PAD1
10uF 0.1uF 4 5% ESDL0402-05 C0402 Volume+
2
10V 10V PAD2 2
R0402 2
20% 10% *
1/16W G5250M1T1U
0603 0402 MOTOR_CON2701
5% C2718 X5R X5R 1
1
5
R2710 1uF R2704 0 SW_VOL+
100K 10V 27,28 VOLUME_UP_PMIC
5
1
1% 10% R0402
0402 0402 ESD2701 C2705
1/16W X5R 1/16W 1000pF
5% ESDL0402-05 C0402
2
GND GND GND
R2705 0 SW_VOL-
Volume-
27,28 VOLUME_DOWN_PMIC
1
C R0402 C
ESD2703 C2706
1/16W 1000pF
5% ESDL0402-05 C0402
2
3NOD :update the reset/volum up down Connector
+V1P8A
R2706 10K
27,28 VOLUME_UP_PMIC
1/16W 1% 0402
R2709 10K
27,28 VOLUME_DOWN_PMIC
1/16W 1% 0402
B B
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
+VBATA
+VBATA +VUSB_CONN
1
EMPTY PR2805
PR2804 348K
PR2803
0/NC 1%
0
5% R0402
5%
0402
0402
2
+V1P0S 1/16W PMIC_VBUS_DIV
1/16W
PMICM_I2C_SZ
PR2806
100K
D PR2807 PR2808 PR2809 PR2817 1% D
71.5 100 71.5 0 0402
1% 1% 1% 5% 1/16W
0402 0402 0402 +V1P8S 0402
1/16W 1/16W 1/16W PMIC2801A 1/16W +VREFB
1%
22R PR2811 SVID_R_CLK E4 E8 VDCIN
6 SVID_CLK SVID_CLK VDCIN
0402 1/16W F4 E9 PMIC_VBUS_DIV
6 SVID_DATA SVID_DIO VBUS
F5 P4 PR2818
6 SVID_ALERT# SVID_ALERT_B CHGDET_B PMIC_USB_DCP# 22
M4 M2 PMIC_CHGRINT_B PR2812 0/NC 47K
I2C_VIO CHGRINT_B GPIO_SUS2 6,33
M5 D7 EMPTY 1%
5 I2C_6_SCL I2C_CLK ILIM0
M6 D8 0402
+V1P0S 5 I2C_6_SDA I2C_DATA ILIM1
N4 M7 PMIC_BATID 1/16W PMIC_BATID 34
31 I2C_M_SCL N5 I2CM_CLK BATID
31 I2C_M_SDA I2CM_DATA
R0402 PR2813 71.5 1% TP_DBG_SVID_ALERT_B PMICM_I2C_SZ P9 L11
I2CM_SZ GPIO0P0_BATIDIN VOLUME_UP_PMIC 27
DEBUG_I2C_CLK_PMIC R1 K11
DEBUG_I2C_CLK GPIO0P1_BATIDOUT VOLUME_DOWN_PMIC 27
R0402 PR2814 71.5 1% TP_DBG_SVID_DIO DEBUG_I2C_DATA_PMIC P1 J11 BOARD_ID_0
DEBUG_I2C_DATA GPIO0P2 L10
PR2816 10K GPIO0P3 CODEC_RESET# 20
R0402 PR2815 71.5 1% TP_DBG_SVID_CLK DEBUG_CS R2 K10
TP_DBG_SVID_CLK A1 DEBUG_CS GPIO0P4 J10 BOARD_ID_1 PMIC_VIBE_EN 27
1/16W 1% 0402 DEBUG_SVID_CLK GPIO0P5
TP_DBG_SVID_DIO B1 J9 BOARD_ID_2 +V1P8A
TP_DBG_SVID_ALERT_B A2 DEBUG_SVID_DATA GPIO0P6 H9 PMIC_GPIO0P7 TP2802
DEBUG_SVID_ALERT_B GPIO0P7 J13 PMIC_GPIO0VDD 0 PR2819
J8 GPIO0VDD 1/16W 5% 0402
15,27 POWER_BUTTON_INPUT PWRBTNIN_B
D4 PC2802 +V1P8A +V1P8A +V3P3A
6 SOC_PWRBTN# PWRBTN_B E7 HOME_SCREEN_FPC TP2801 0.1uF
K5 GPIO1P0_UIBTN_B F7 LCM_RST#_PMIC 16V
+V1P8S 6,15 PLTRST# PLTRST_B GPIO1P1 LCM_RST#_PMIC 1610%
L3 F8 BOARD_ID_3
6,15,18 SLP_S0IX# SLP_S0IX_B GPIO1P2
L5 F9 TXE_UNLOCK_R 0 PR2820 0402 EMPTY EMPTY EMPTY
6,15 SLP_S3# SLP_S3_B GPIO1P3 TXE_UNLOCK 20 X5R
C K7 G9 PMIC_MEMCFG0 1/16W 5% 0402 PR2821 PR2822 PR2823 PR2824 C
6,15 SLP_S4# SLP_S4_B GPIO1P4 +V3P3A
E10 PMIC_MEMCFG1 10K/NC 10K/NC 10K 10K/NC
J4 GPIO1P5 G8 PMIC_FABID_0 1% 1% 1% 1%
6,15 RSMRST# K3 RSMRST_B GPIO1P6 E11 PMIC_FABID_1 0402 0402 0402 0402
2 DRAM_PWROK J5 DRAMPWROK GPIO1P7 C5 BOARD_ID_1 1/16W 1/16W BOARD_ID_3 1/16W 1/16W
PR2825 2 VCCA_PWROK VCCAPWROK GPIO1VDD
PR2826 K4 BOARD_ID_2
10K 6,15 CORE_PWROK COPEPWROK BOARD_ID_0
10K L4 PC2803
1% 6 SUS_PWRDOWNACK SUSPWRDNACK
1% H5 K8 SYSTHERM_0 0.1uF EMPTY
0402 6 AC_PRESENT ACPRESENT SYSTHERM0
0402 H4 L7 SYSTHERM_1 16V PR2827 PR2828 PR2829 PR2830
1/16W 6 PMU_BATTLOW# BATLOW_B SYSTHERM1
1/16W L8 SYSTHERM_2 10% 10K 10K 10K/NC 10K
DEBUG_I2C_CLK_PMIC SYSTHERM2
J6 0402 1% 1% 1% 1%
DEBUG_I2C_DATA_PMIC 6 PMIC_INT J7 IRQ M9 BPTHERM0 X5R 0402 0402 0402 0402
K6 THERMTRIP_B BPTHERM0 L9 1/16W 1/16W 1/16W 1/16W
4 PROCHOT# PROCHOT_B BPTHERM1
+VREFB +VREFT +VBATBKUP
K9 +VBATTERY
+VRTC VBATSENSE M8
PMIC_PANEL_PWM0 F6 VREFB N7 +V3P3A +V3P3A
32 PMIC_PANEL_PWM0 E6 PWM0 VREFT E3 +VBATBKUP_PMIC 0 PR2831
27 PMIC_VIBRA_PWM1 D6 PWM1 VBATBKUP L6 0402 5% 1/16W
PR2832 PWM2 ULPI_VBUS_EN
20K G5 ULPI_VBUS_EN PC2804 EMPTY
1% 32 PMIC_LCM_BKLT_EN H6 BACKLIGHT_EN N6 10uF PR2833 PR2834 PR2835 PR2836
0402 16 PANEL_EN PANEL_EN ADCVDD 6.3V 10K/NC 10K 10K 10K
1/16W SOC_RTEST# K2 20% 1% 1% 1% 1%
TP2804 G6 MODEM_OFF_B VREF25 0603 0402 0402 0402 0402
PC2801 H7 SDWN_B X5R PMIC_MEMCFG1 1/16W 1/16W 1/16W 1/16W
6,15 SOC_RTEST# RTC_POR PMIC_FABID_1
1uF B4 D9 PMIC_MEMCFG0
BCUDISA VREF25_2 PMIC_FABID_0
10V E5 J3 PC2805 PC2806
B 10% D5 BCUDISB VREF25_1 N9 1uF 1uF B
0402 BCUDISCRIT VREF25_0 6.3V 6.3V EMPTY EMPTY EMPTY
X5R BD2610GW 20% 20% PR2837 PR2838 PR2839 PR2840
TP2805 SUS_PWRDOWNACK
0402 0402 10K 10K/NC 10K/NC 10K/NC
X5R X5R 1% 1% 1% 1%
TP2806 DRAM_PWROK
0402 0402 0402 0402
1/16W 1/16W 1/16W 1/16W
TP2807 VCCA_PWROK +VBATA
TP2808 CORE_PWROK
PR2841
100K
+VREFT 1%
0402
1/16W
ULPI_VBUS_EN
PR2842 PR2843 PR2844 PR2845 PC2807

+VRTC 24.9K 24.9K 24.9K 24.9K 100pF/NC
+VRTC
1% 1% 1% 1% 50V
0402 0402 0402 0402 5%
PD2802 BPTHERM0 1/16W 1/16W 1/16W 1/16W 0402EMPTY
+V3P3A
SYSTHERM_0 C0G
1 SYSTHERM_1
PR2846 SYSTHERM_2
3 10K
+VBATBKUP
1%
1
A
2 0402 A
1/20W
PC2808
BAT54C-7-F +VRTC_SUPCAP 47K 47K 47K 47K Drawing Rule
1uF
10V Acer Inc.
PRT1
PRT2
PRT3
PRT4
PC2809
10%
2
PR2848 10uF Allegro Lib Ver

0/NC
0402
6.3V
Project:
1/16W
R0402
X5R
20%
0603
EMPTY X5R
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
+VBATA +VBATA +V1P8U
PMIC2801B
+V1P0A +V1P0A_PMIC R11 D10 V1P8U_EN_N

P11 V1P0A_VIN0 V1P8U_EN_B C8 V1P8U_EN_N 31
PL2901 V1P0A_VIN1 V1P8U_FB
1900 MA
PR2905 Etch +V1P0A_LX R12 A11
Short P12 V1P0A_LX0 VDDQ_VIN0 B11
short0805_M PC2902 PC2903 0.47uH R13 V1P0A_LX1 VDDQ_VIN1
47uF 47uF 2520 P13 V1P0A_GND0 +VDDQ_PMIC +VDDQ
V1P0A_GND1 PL2902
6.3V 6.3V 2800 MA
20% 20% M10 A12 VDDQ_LX1 PR2908 Etch
0805 0805 V1P0A_FBP VDDQ_LX0 B12 Short
D D
X5R X5R VDDQ_LX1 0.47uH PC2905 PC2906 PC2907 short0805_M
2520 47uF 47uF 47uF
A9 6.3V 6.3V 6.3V
+V1P8A +V1P8A_PMIC V1P8A_VIN D12 20% 20% 20%
PL2903 VDDQ_FBP
1627 MA +V1P0A 0805 0805 0805
PR2906 Etch +V1P8A_LX A8 X5R X5R X5R
Short V1P8A_LX A13 PMIC_VDDQ_VTT
short0805_M 1uH VDDQ_GND0 B13 PC2915
PC2910 PC2911 25X20 A7 VDDQ_GND1 0.1uF
47uF 22uF V1P8A_GND 6.3V PC2947
6.3V 6.3V 10% +VDDQ_VTT 47uF
20% 10% C11 0402 6.3V
+V1P2A 0805 0603 C9 VDDQ_VTT_VIN X5R short0603_M 20%
V1P8A_FBP 325 MA
X5R X5R 30 MA C12 PMIC_VDDQ_VTT PR2909 Etch 0805
C7 VDDQ_VTT C13 Short +VDDQ +VREF_DQ1 +VREF_DQ0 X5R
V1P2A VDDQ_VTT_GND
10 MA 10 MA
K15 D11
K14 V3P3A_VIN0 VDDQ_VTT_R C6 +V5P0S_PMIC
V3P3A_LX1 V3P3A_VIN1 VREFDQ1 B6
VREFDQ0
955 MA
J14 L14
PL2904 J15 V3P3A_LX00 V5P0S0 L15
H14 V3P3A_LX01 V5P0S1 +VBATA
0.47uH V3P3A_LX10 PL2905
2520 G15 M14 PC2916 PC2917 PC2918
V3P3A_LX11 V5P0S_LX0 M15 +V5P0S_LX 22uF 22uF 22uF
K
V3P3A_LX2 V5P0S_LX1 10V 10V 10V
1uH
TFZ 6.2B
PD2901
N14 PC2924 20% 20% 20%
H15 V5P0S_GND0 N15 25X20 4.7uF 0805 0805 0805
C V3P3A_GND V5P0S_GND1 10V X5R X5R X5R C
M12 10%
A
V5P0S_FBP +V5P0S_PMIC 0402
F12 X5R +VHDMI
+V3P3A +V3P3A_PMIC V3P3A_FBP L13
1569 MA VHDMI_VIN 55 MA
M13
PR2904 Etch F15 VHDMI H10 PMIC_VBUS_EN PC2925
V3P3A_0 VBUS_EN TP2902
Short G14 H11 TP_PMIC_VHOST_EN 1uF
V3P3A_1 VHOST_EN TP2901
short0805_M PC2926 PC2927 PC2928 PC2929 PC2933 10V
47uF 47uF 47uF 22uF 0.1uF +VUSB_PHY C14 PMIC_VDDQ_VTT 10%
6.3V 6.3V 6.3V 6.3V 16V +VSDIO G3 VDDQ_VTT_FB 0402
20% 20% 20% 10% 10% H13 VSDIO_V3P3A_VIN X5R
0805 0805 0805 0603 0402 G2 VUSBPHY G1
VSDIO VSDIO_V1P8A_VIN +V1P8A
X5R X5R X5R X5R X5R
PC2934 PC2935 BD2610GW
1uF 1uF PC2936
10V 10V 4.7uF
10% 10% 10V
0402 0402 10%
X5R X5R 0402
+VBATA X5R
PC2938 PC2940 PC2941 PC2942

4.7uF 4.7uF 4.7uF 4.7uF
10V 10V 10V 10V
10% 10% 10% 10%
0402 0402 0402 0402
B X5R X5R X5R X5R B
1P0A 1P8A VDDQIN 3P3A
+V1P2A +VREF_DQ0 +VREF_DQ1 +VDDQ
PC2949 PC2950 PC2951 PC2952

10uF 10uF 10uF 1uF/NC
4V 4V 4V 6.3V
20% 20% 20% 10%
0402 0402 0402 0402
X5R X5R X5R X5R
EMPTY
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
+V_VCC
VCC_COMP_R 0 PR3001 VCC_COMP
0402 5% 1/16W
PC3002
PC3023 PC3024 PC3025 PC3026 PC3027 PC3028 PC3029 PC3030 PC3031 47pF
22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 50V
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 5%
20% 20% 20% 20% 20% 20% 20% 20% 20% 0402
0603 0603 0603 0603 0603 0603 0603 0603 0603 C0G PMIC2801C +V_VNN
X5R X5R X5R X5R X5R X5R X5R X5R X5R +VBATA F2 +V_VNN_SENSE +VBATA
VNN_FBP +V_VNN_SENSE 8
L2 H2
M1 VCC_VIN0 VNN_VIN0 E2
PC3007 PC3008 PC3009 PC3010 PC3011 PC3012 R4 VCC_VIN1 VNN_VIN1 D1 PC3017 PC3018 PC3019 PC3020 PC3021 PC3013 PC3034 PC3035 PC3036 PC3032 PC3037 PC3038 PC3039 PC3033 PC3040
D D
0.1uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF P5 VCC_VIN2 VNN_VIN2 A4 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 0.1uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
10V 10V 10V 10V 10V 10V R8 VCC_VIN3 VNN_VIN3 B5 10V 10V 10V 10V 10V 10V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% VCC_VIN4 VNN_VIN4 10% 10% 10% 10% 10% 10% 20% 20% 20% 20% 20% 20% 20% 20% 20%
0402 0402 0402 0402 0402 0402 VCC_COMPM3 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603 0603 0603 0603
X5R X5R X5R X5R X5R X5R VCC_COMP X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
(1.0V)
2520 1uH PL3001 VCC_LX0 L1 H1 VNN_LX0
VCC_LX1 N1 VCC_LX0 VNN_LX0 E1 VNN_LX1 +V_VNN_PMIC +V_VNN (1.0V)
0.47uH PL3002 VCC_LX1 VNN_LX1
+V_VCC +V_VCC_PMIC 2520 VCC_LX2 R3 C1 VNN_LX2
VCC_LX3 R5 VCC_LX2 VNN_LX2 A3 VNN_LX3 PL3003 1uH 2520 PR3004 Etch
0.47uH PL3004 VCC_LX3 VNN_LX3
PR3002 Etch 2520 VCC_LX4 R7 A5 VNN_LX4 0.47uH Short
VCC_LX4 VNN_LX4 PL3005
Short 0.47uH PL3006 2520 PC3051 PC3052 PC3053 PC3054 short2512_M PC3016
PC3001 short2512_M PC3042 PC3043 PC3044 PC3045 2520 VNN_COMP D3 0.47uH 47uF 47uF 47uF 47uF 0.1uF
VNN_COMP PL3007
0.1uF 47uF 47uF 47uF 47uF 0.47uH PL3008 2520 6.3V 6.3V 6.3V 6.3V 10V
10V 6.3V 6.3V 6.3V 6.3V 2520 C2 0.47uH 20% 20% 20% 20% 10%
VNN_GND2 PL3009
10% 20% 20% 20% 20% K1 F1 2520 0805 0805 0805 0805 0402
VNN_COMP_R 0 PR3006 VCC_GND0 VNN_GND1
0402 0805 0805 0805 0805 N2 C3 0.47uH X5R X5R X5R X5R X5R
5% VCC_GND1 VNN_GND23 PL3010
X5R X5R X5R X5R X5R PC3041 R0402 N3 2520
47pF P3 VCC_GND12 B3
VCC_GND2 VNN_GND3 +VBATA
C0402 R6
P6 VCC_GND3 A6
+VBATA P7 VCC_GND34 VNN_GND4 J1
VCC_GND4 VNN_GND0 PC3050
4.7uF
PL3011
J2 E15 0.47uH 2520 C0402
8 +V_VCC_SENSE VCC_FBP V2P85S_VIN
PC3059 G4 E14 V2P85_LX0
8 +V_VSS_SENSE VCC_FBN V2P85S_LX0
(1.05V) 4.7uF D14 V2P85_LX1
10V M11 V2P85S_LX1
C +V1P05S +V1P05S_PMIC 10% 31 V1P0S_EN L12 V1P0S_EN C
0402 31 V1P0S_SENSE V1P0S_FB D15
X5R R10 V2P85S_GND
PR3007 Etch V1P05S_LX1 P10 V1P05S_VIN
V1P0S_SENSE Short V1P05S_LX
short0603_M PC3067 PL3012 1uH 2520 R9 C15
V1P05S_GND V2P85S +V2P85S
47uF E13
PC3066 V2P85S_FBP
6.3V P8 PC3060 PC3061 PC3062 PC3063
1uF +V1P8A V1P05S_FBP
20% 1uF 47uF 47uF 22uF
C0402 0805 +V1P8SX F13 6.3V 6.3V 6.3V 6.3V
+V1P8S X5R B8 V2P85SX_VIN F14 20% 20% 20% 10%
PR3008 Etch PMIC_+V1P8SX B7 V1P8S_VIN V2P85SX H8 SDMMC3_1P8_EN_R 0 PR3009 0402 0805 0805 0603
34mA V1P8SX SDMMC3_1P8_EN SDMMC3_1P8_EN 4
Short D2 SDMMC3_PWR_EN_R 0 PR3010 X5R X5R X5R X5R
+V1P2S PR3011 Etch short0603_M PMIC_+V1P8S B9 SDMMC3_PWR_EN_B SDIO_PWR_EN 4,14
short0603_M Short V1P8S A10
V1P2SX_VIN +VDDQ
C10 B10 +V1P2SX
V1P2S V1P2SX
H12 N11 PC3069
31 V3P3S_EN_N G13 V3P3S_EN_B V1P0SX_EN K12 V1P0SX_EN 31 2.2uF PC3070
+V3P3S V3P3S_FB V1P0SX_FB +V1P0SX
F11 6.3V 1uF
G12 V3P3U_EN_B N13 20% 6.3V
V3P3U_FB VLP VREF25
PC3073 PC3074 0402 20%
PC3072 1uF 1uF X5R 0402
PC3071 1uF 6.3V 6.3V PC3075 X5R
BD2610GW
10uF 6.3V 20% 20% 2.2uF
10V 20% 0402 0402 6.3V
20% 0402 X5R X5R 20%
0603 X5R 0402
X5R X5R
B B
Drawing Rule
Acer Inc.
A A

Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
+V1P8U
PQ3101
RW1A025APT2CR
+VSYS_S
+V1P8A 6
5
PMIC2801D
4 2
355 MA
D
S
1
J12
VSYS_S
PC3102 PC3103
G
PC3104 +VBATA +VBATA_SYS
1uF 1uF
1uF +VBATA
3
6.3V 6.3V
D 10V D
20% 20%
10% R3120 Etch H3
0402 0402 VSYS1
0402 K13
X5R X5R VSYS2
X5R Short
PC3105 PC3101 short0603_M
V1P8U_EN_N
29 V1P8U_EN_N 10uF 10uF
10V 10V
20% 20%
0603 0603 B2
X5R X5R T9 P2 PR3118 PR3117
T8 B15
T7 0/NC 0/NC
P15 R0402 R0402
T6 A15
T5 A14 PMIC_T4 EMPTY EMPTY
PQ3102
T4 B14
RW1A025APT2CR +V3P3S T3
TP3101 TP_VSYS_U_EN_N F10 P14 PMIC_T2
+V3P3A 6
5
584 MA G11 VSYS_U_EN_B T2
VSYS_U_FB T1
R15
R14
4 2 T0
D
S
TP3102 TP_VSYS_SX_EN_N E12 PR3119 PR3120

1 VSYS_SX_EN_B
G10 0 0
PC3106 VSYS_SX_FB
R0402 R0402
G
1uF PC3107
10V 1uF
3
10% 10V
0402 10%
X5R 0402
X5R
C C
V3P3S_EN_N
30 V3P3S_EN_N N10
N12 GND0
D13 GND1
C4 GND2
F3 GND3
916 MA N8 GND4
+V1P0SX_PMIC +V1P0SX GND5
BD2610GW
+V1P0A
PQ3103 PR3103 Etch PMIC_AGND
RQ1C075UNTR Short
PC3108 8 short0603_M
1uF 7 3
6.3V 6 2 PC3109
D
20% 5 1 1uF
0402 6.3V PR3105
X5R 20% R0402 0 +V3P3A
G
+V3P3SX
4
0402
30 V1P0SX_EN
X5R PU3102
PMIC_AGND A2 A1
VIN1 VOUT1
+V1P0S B2 B1
VIN2 VOUT2
410 MA
PR3115 Etch +V5P0S_PMIC +V5P0S
Short EMPTY C2 C1
6 PWR_3P3_SX_EN ON GND
+V1P0S_PMIC short0603_M 0R/NC PR3129
+V1P0A
0603 1% 1/10W
B PQ3105 PC3115 B
PR3106 Etch PC3114
RQ1C075UNTR V1P0S_SENSE 30 1uF
Short PR3116 1uF
PC3110 8 TPS22922BYZPR 10V
short0603_M PQ3104 100K/NC 10V
1uF 7 3 PC3111 10%
1% 10%
6.3V 6 2 1uF 0402
D
0402 0402
20% 5 1 6.3V X5R
A2 A1 1/16W X5R
0402 20% VIN VOUT EMPTY
GND
X5R 0402
G
B2 PC3113
4
X5R ON
V1P0S_EN PC3112 1uF
30 V1P0S_EN
1uF 10V
B1
10V TPS22910 10%
10% 0402
0402 X5R
X5R
EEPROM
6 EN_V5P0S
+VBATA
PR3101
100K
1%
0402
1/16W
+VBATA PR3107 PR3108 PR3109
10K 2.2K 2.2K
1% 1% 1%
0402 0402 0402
A
PC3116 1/16W 1/16W 1/16W A
0.1uF
10V Drawing Rule
R0402 PR3111 0 PMIC_EEPROM_A0 1

PU3101
8
10%
0402
X5R
R0402 PR3110 0 PMIC_EEPROM_A1 2 A0 VCC 7 I2C_EEPROM_WP
Project:
R0402 PR3113 0 PMIC_EEPROM_A2 3
4
A1
A2
WP
SCL
6
5
I2C_EEPROM_SCL
I2C_EEPROM_SDA
R0402 PR3114 0
R0402 PR3112 0
I2C_M_SCL 28
GND SDA I2C_M_SDA 28 Title: <Title>
BR24G32FJ Approved: Size: Document Number: Rev

Designer:
5 4 3 2 1
5 4 3 2 1
D D
LCM LED BOOST
PU3202 +VBKLT_EDP_1 +VBKLT_EDP
AON7407
+VBATA 1 S D
PL3201
2 S D PD3201
PR3201 Etch RT8567_VIN 3 S D 1 2 RT8567_LX A K 1N5819HW-7-F PR3202 Etch
Short D 5 RT8567_VIN_1 Short
short0805_M G short0805_M
CMI-DOP252012NH-100M
PC3202
1
PC3201 PR3203
10uF 10 R2 PR3204 10uF/50V
16
10V 1% PU3201 220K C1206
C PR3205 20% R0402 1% C
LX
100K PR3207 0603 R0402
2
1% 0 X5R RT8567_VIN_2 19
0402 5% PC3203 PC3204 VIN 14 RT8567_OVP
1/16W R0402 EMPTY 0.1uF/NC 1uF OVP
20130825 change by Kenny 10V 10V
RT8567_VIN_G 10% 10% 2
EMPTY EMPTY 0402 0402 EN
PR3208 0/NC LCM_BKLT_EN PR3206 0/NC LCM_BKLT_EN_1 X5R X5R R1 PR3209
28 PMIC_LCM_BKLT_EN
1/16W 5% R0402 R0402 10K VOCP=1.2*(1+(R2/R1))
28 PMIC_PANEL_PWM0 20 12 1%
PR3210 0 PWM CH1 BL_LED1 16
0402 =1.2*(1+(220K/10K))=27.6V
D
4 SOC_LCM_BKLT_EN
5% R0402 11 1/16W
CH2 BL_LED2 16
PQ3201 RT8567_RT 3
G SSN3541 RT 10
CH3 BL_LED3 16
RT8567_VDC 1
PR3214 VDC 8
PR3211 PR3212 PR3213 PC3205 CH4
51K
300K 300K 100K 0.1uF 7
S
R0402 1% 1% 5% 10V RT8567_COMP 18 CH5

1% R0402 0402 R0402 10% COMP 6
1/16W 0402 CH6
X5R PR3215
10K RT8567_ISET 4
1% ISET 9
0402 AGND1
1/16W 5 21
NC#5 AGND2
13
B NC#13 B
17 15 PR3217 0
PC3206 NC#17 PGND R0402
0.01uF/ 50V PR3216
C0402 46.4K 1% RT8567AGQW-GP BL_GND
R0603
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
D
+VUSB_CONN D
PC3303 PC3301
4.7uF/25V 0.1uF/NC PU3301
25V 25v A6 A5
20% 10% A7 DCIN MID#A5 B5 PC3306
0603 0402 B6 DCIN MID#B5 C5 CH_MIDUSBIN
X5R X5R B7 DCIN MID#C5 4.7uF
EMPTY C6 DCIN 16V
C7 DCIN
DCIN 20%
+V_SYSON
X5R
0603
D6 D2 +V_BOOT
SYSON BOOT +VBATA_SMB349 +VBATA
PC3304 PC3305 A3 PC3307
4.7uF 0.1uF/NC SW#A3 A4 0.027uF
SW#A4 PL3301
10V 10V E6 B3 C0402
10% 10% D- SW#B3 B4 25v +V_SW PR3302 Etch
5% R0402 0402 0402 SW#B4 C3 2520 short
+VBATA CHG_OTG_1 PR3301 0 X5R X5R F7 SW#C3 C4 1uH short0805_M
EMPTY D+ SW#C4 D3 EMPTY PC3309 PC3308
SW#D3 D4 R0402 EMPTY 10uF 0.1uF
PR3303 0/NC USB_OTG# D5 SW#D4 4.7R/NC PC3310 10V 10V
22,23 USB_ID_FSA9285 OTG/ID
EMPTY R0402 PR3304 CH_SW_RC 20% 10%
5% R0402 0603 0402
C PR3315 0 D7 +VBATA_SMB349 SMB_BGATEDRV 1000pF/NC X5R X5R C
5,34 I2C_0_SCL SCL
PR3305 5% R0402 E1 50V 10%
10K PR3316 0 E7 SYS#E1 E2 X7R
5,34 I2C_0_SDA SDA SYS#E2
4
1% E3 0402
0402 close to PU3301 SYS#E3 E4 5 G
1/16W SMB349_SUSP G1 SYS#E4 D
3
SUSP/SHDN F5
D S
2
+V1P8S FETDRV D S
1
PR3306 PR3307 10K SMB_PGOOD G4 F1
D S +VBATTERY
100K/NC 1/16W 1% 0402 PGOOD/SYSOK CHGOUT#F1 F2
1% CHGOUT#F2 F3 PU3302
0402 G5 CHGOUT#F3 F4 AON7407
5 CH_DISABLE_R EN CHGOUT#F4
1/16W
EMPTY +VBATTERY_SENSE PC3311 PC3312 PC3313
PR3308 G2 10uF 0.1uF 100pF
10K VBATT 10V 10V 50V
+V1P8S PR3309 10K 1% 20% 10% 5%
0402 +V_SYSON 0603 0402 0402
1/16W G3 CHT_THERM X5R X5R C0G
1/16W 1% 0402 THERM
PC3314
6,28 GPIO_SUS2 G7 0.1uF
STAT E5 TP_USB2/3 PR3310 10V
+VBATA USB2/3/VCHG PC3315 13K 10%
PR3311 10K 47pF 1% 0402
TP_USBCS F6 50V 0402 X5R
+VBATA USBCS 5% 1/16W PR3314 BATT_THERM 34
AGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
1/16W 1% 0402 0402
C0G 0/NC
1
B PC3316 R0402 B
PR3312 1/16W
G6
A1
A2
B1
B2
C1
C2
D1
10K SMB349ET-2167Y-GP 0.027uF 10K EMPTY
1%
NTC3301
0402
2
1/16W CHG_OTG_1
PR3313 0 close to PL3301

3
R0402
D PQ3301
NTK3043N
6 CHG_OTG 1
G S CHRG_AGND
2
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1
5 4 3 2 1
FUEL_GAUGE BATTERY CONN

D
+VBATTERY
MAX17050 D
TP3103
TEST_POINT_40
+VBATTERY
1
PC3404 PC3405 PC3406 PC3407
PC3401 10uF 1uF 0.1uF 0.1uF
1uF 10V 10V 16V 16V
10V 20% 10% 10% 10%
10% PU3401 0603 0402 0402 0402
0402 X5R X5R X7R X7R
X5R B1 B2 FG_ALERT 6
BAT_AGND VBATT ALRT
R3409 +VBATTERY_SENSE
FG_REG B3 C1 0
REG SDA R3410 I2C_0_SDA 5,33
A2 0 I2C_0_SCL 5,33 BATCN3401
SCL R0402 R2508
PC3402 FG_THERM C2 0 7
THRM R0402 to PU3401
1uF C3 close 1
10V A1 CSP A3 R0402 2
10% PR3401 AIN CSN 3
28 PMIC_BATID
0402 10K 33 BATT_THERM 4
X5R 1/16W MAX17050X-T10-GP 5
TP3104
6
BAT_AGND 1% BATT_THERM 0.01 PR3402 1 8
0402 1%
2512
2w
TEST_POINT_40 C-WB1202H-060GN
1
C PC3403 C
1uF/NC RT3401
10V 47K/NC
10% 1% BAT_AGND
0402 R0402
2
X5R EMPTY BAT_AGND

EMPTY
BAT_AGND BAT_AGND
B B
A A
Drawing Rule

Project:
Title: <Title>

Designer:
5 4 3 2 1

Ducati2 SCH 20140506 0930 PDF

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5 4 3 2 1

CONTENTS 22.4V (TYP)

Combo UART 1 SDMMC3 Micro SD Conn.

GPS UART 2 I2C5 Touch Screen

SYSTHERM0 Thermal sensor: SOC SVID Realtek

Approved: Size: Document Number: Rev

M50 H42 M0_DATA0 11 BH50 BU53 M1_DATA0 12

Approved: Size: Document Number: Rev

Acer Inc. Allegro Lib Ver

Approved: Size: Document Number: Rev

1G Hynix 1G Samsung 2G Samsung 2G Hynix R402 R403

High Low Low R404 R405

BU19 EMMC1_D4/GPIO_S0_21 EMMC GPIO_S0_6 BN9 MC1CD# SOC_+V2P8_CAM_EN 19

SD2_CMD/GPIO_S0_32 LPE_I2S2_CLK/GPIO_S0_62 BT36 I2S_2_CLK 20

BP24 BN3 P_RCOMP_P 402/NC R407

Acer Inc. Allegro Lib Ver

Approved: Size: Document Number: Rev

Approved: Size: Document Number: Rev

SOC_XTAL_IN AR7 BV38

V0.1 V0.2 V0.3 V0.4

HW_Board_ID0 Low High Low Low

TOUCH_INT# R616 10K

2 51R 1% R0402 XDP_H_TCK

Approved: Size: Document Number: Rev

VLV2_EDS1P1 Approved: Size: Document Number: Rev

+V_VCC SOC_VLV2 +V_VNN

Acer Inc. Allegro Lib Ver

Approved: Size: Document Number: Rev

D +V1P0SX_S +V1P0S +V1P8S +V3P3A +VSDIO D

Acer Inc. Allegro Lib Ver

Approved: Size: Document Number: Rev

close to AF2,AG1 close to AM15, AP12

close to P21,P23,P27 C1073 C1074

C1077 C1080 C1081 C1082 C1083 C1084

Approved: Size: Document Number: Rev

LPDDR3 MEMORY CHANNEL A +VDDQ_VTT +VDDQ +VDDQ

H9CCNNN8KTMBR‐NTM‐GP for layout:

2,11 M0_CA0 L2 K4 M0_CS0# 2,11 R1113

Approved: Size: Document Number: Rev

LPDDR3 MEMORY CHANNEL B +VDDQ_VTT +VDDQ +VDDQ

H9CCNNN8KTMBR‐NTM‐GP for layout:

Approved: Size: Document Number: Rev

LPDDR3 MEMORY CHANNEL 1

+VDDQ +VDDQ +VDDQ

+V1P8U +V1P8U_LPDDR3 +V1P8U_LPDDR3

VREFCA CH 1 VREFDQ CH 1 VREFCA CH 0 VREFDQ CH 0

Approved: Size: Document Number: Rev

Device :SD CARD P1 NC#N14 NC#AE14 AG2

TPS22910 10V 10V 50V

Approved: Size: Document Number: Rev

R1519 R1520 R1521 C1502

Approved: Size: Document Number: Rev

ShIELD1 ShIELD2 ShIELD3 ShIELD4

ShIELD9 ShIELD10 ShIELD11 ShIELD12

Acer Inc. Allegro Lib Ver

Approved: Size: Document Number: Rev

for EMI Co-lay

10% SDCW2012C-2-900TF HDMI_TX1_CMC_DP

0/NC 5% R1823 1/16W

change to Micro HDMI

3 DDI0_TX3_DN DDI0_TX3_DN 0.1uF C1808 HDMI_CLK_CMC_DN 1 4 HDMI_CLK_DN Micro_HDMI1801

NTK3043N X5R 1/16W