Addressing Modes & Instruction Set

ADDRESSING MODES
&
Instruction set
8086 Microprocessor
Introduction
Program
A set of instructions written to solve
a problem.
Instruction
Directions which a microprocessor
follows to execute a task or part of a
task.
Computer language
High Level Low Level
Machine Language Assembly Language
 Binary bits  English Alphabets

 ‘Mnemonics’
 Assembler
Mnemonics  Machine
Language 2
8086 Microprocessor
Introduction
Program is a set of instructions written to solve a problem. Instructions are

the directions which a microprocessor follows to execute a task or part of a
task. Broadly, computer language can be divided into two parts as high-
level language and low level language. Low level language are machine
specific. Low level language can be further divided into machine language
and assembly language.
Machine language is the only language which a machine can understand.

Instructions in this language are written in binary bits as a specific bit
pattern. The computer interprets this bit pattern as an instruction to
perform a particular task. The entire program is a sequence of binary
numbers. This is a machine-friendly language but not user friendly.
Debugging is another problem associated with machine language.
To overcome these problems, programmers develop another way in which

instructions are written in English alphabets. This new language is known
as Assembly language. The instructions in this language are termed
mnemonics. As microprocessor can only understand the machine
language so mnemonics are translated into machine language either
manually or by a program known as assembler.
Efficient software development for the microprocessor requires a complete

familiarity with the instruction set, their format and addressing modes. Here
in this chapter, we will focus on the addressing modes and instructions
formats of microprocessor 8086. 3
ADDRESSING MODES
8086 Microprocessor
Addressing Modes
Every instruction of a program has to operate on a data.

The different ways in which a source operand is denoted
in an instruction are known as addressing modes.
1. Register Addressing
Group I : Addressing modes for
2. Immediate Addressing register and immediate data
3. Direct Addressing
4. Register Indirect Addressing

Group II : Addressing modes for
memory data
5. Based Indexed Addressing
6. Indexed Addressing
7. Register Relative Addressing
8. Relative Based Indexed Addressing
9. Intrasegment Direct Mode

Group III : Addressing modes for
10. Intrasegment Indirect Mode control transfer instructions
11. Intersegment Direct Mode
12. Intersegment Indirect Mode 5

8086 Microprocessor Group I : Addressing modes for
Addressing Modes register and immediate data
1. Register Addressing The instruction will specify the name of the

register which holds the data to be operated by
2. Immediate Addressing the instruction.
3. Direct Addressing Example:
MOV CL, DH
The content of 8-bit register DH is moved to
6. Indexed Addressing another 8-bit register CL
7. Register Relative Addressing (CL)  (DH)

10. Intrasegment Indirect Mode
12. Intersegment Indirect Mode
6
8086 Microprocessor Group I : Addressing modes for
Addressing Modes register and immediate data
In immediate addressing mode, an 8-bit or 16-bit
2. Immediate Addressing data is specified as part of the instruction
Example:
MOV DL, 08H
The 8-bit data (08H) given in the instruction is
6. Indexed Addressing moved to DL

(DL)  08H
9. Intrasegment Direct Mode MOV AX, 0A9FH
10. Intrasegment Indirect Mode The 16-bit data (0A9FH) given in the instruction is
moved to AX register

(AX)  0A9FH
7
8086 Microprocessor
Addressing Modes
2. Immediate Addressing

Group II : Addressing modes for
memory data
12. Intersegment Indirect Mode 8

8086 Microprocessor
Addressing Modes : Memory Access
Offset Value (16 bits)
Segment Register (16 bits) 0000
Adder
Physical Address (20 Bits)
9
8086 Microprocessor
Addressing Modes : Memory Access
20 Address lines  8086 can address up to

220 = 1M bytes of memory
However, the largest register is only 16 bits
Physical Address will have to be calculated

Physical Address : Actual address of a byte in
memory. i.e. the value which goes out onto the
address bus.
Memory Address represented in the form –

Seg : Offset (Eg - 89AB:F012)
Each time the processor wants to access

memory, it takes the contents of a segment
register, shifts it one hexadecimal place to the
16 bytes of
left (same as multiplying by 1610), then add the contiguous memory
required offset to form the 20- bit address
89AB : F012  89AB  89AB0 (Paragraph to byte  89AB x 10 = 89AB0)

F012  0F012 (Offset is already in byte unit)
+ -------
98AC2 (The absolute address)
10
8086 Microprocessor Group II : Addressing modes
Addressing Modes for memory data
1. Register Addressing Here, the offset address of the memory location at

which the data operand is stored is given in the
2. Immediate Addressing instruction.
3. Direct Addressing The effective address is 10H*DS+16-bit number

written directly in the instruction.
Example:
6. Indexed Addressing MOV BX, [1354H]

MOV BL, [0400H]
The square brackets around the 1354H denotes
8. Relative Based Indexed the contents of the memory location. When
Addressing executed, this instruction will copy the contents of
the memory location into BX register.
10. Intrasegment Indirect Mode This addressing mode is called direct because the
displacement of the operand from the segment
11. Intersegment Direct Mode base is specified directly in the instruction.
12
1. Register Addressing In Register indirect addressing, name of the

register which holds the offset address will be
2. Immediate Addressing specified in the instruction.
3. Direct Addressing Registers used to hold the offset address are any
of the following registers:
BX, BP, DI and SI.
Content of the DS register is used for base
address calculation.ES also used.
Example:
8. Relative Based Indexed
Addressing MOV CX, [BX]
9. Intrasegment Direct Mode Data is present in memory location in DS whose
offset address is in BX. Effective address of data

10H*DS+[BX]
13
1. Register Addressing In Based Indexed Addressing, effective address is

formed by adding the contents of base register
2. Immediate Addressing BX or BP to the content of index register SI or DI.
3. Direct Addressing Default segment register may be ES or DS.
4. Register Indirect Addressing Example:

MOV AX, [BX] [SI]
Effective Address:
7. Register Relative Addressing 10H*DS+[BX]+[SI]
14
1. Register Addressing Offset of the operand is stored in one of the index

registers.
DS is the default segment for index registers SI
3. Direct Addressing and DI.
4. Register Indirect Addressing For string instructions DS and ES are default

segments for SI and DI respectively.
Example:
7. Register Relative Addressing MOV AX, [SI]

Data is available at an offset address stored in SI
9. Intrasegment Direct Mode in DS.
The effective address 10H*+DS+[SI].
10. Intrasegment Indirect Mode The content of this address will be transferred to
AX
15
1. Register Addressing In Based Index Addressing, the data is available

at an effective address formed by adding an 8-bit
2. Immediate Addressing or 16-bit displacement with the content of any
one of the registers BX, BP, SI or DI in the default
3. Direct Addressing segment.
Example:
5. Based Indexed Addressing MOV AX, 50H[BX]

10H*DS+50H+[BX]
16
The effective address is formed by adding
• 8 or 16-bit displacement
• Content of base registers BX or BP
3. Direct Addressing • Any one of the index registers
In default segment.
Example:
MOV AX, 50H [BX][SI]
7. Register Relative Addressing 10H*DS+[BX]+[SI]+50H

17
8086 Microprocessor Group III : Addressing for control
Addressing Modes transfer instructions
For control transfer instructions, the addressing modes depends on the

segment of destination location.
Modes for control transfer

instruction
Intersegment Intrasegment
Intersegment Intersegment Intrasegment Intrasegment

direct indirect direct indirect
18
1. Register Addressing Here the address to which the control is to be

transferred lies in the same segment.
It appears directly in the instruction as an
3. Direct Addressing immediate value.
4. Register Indirect Addressing Displacement is computed relative to the IP.
5. Based Indexed Addressing Effective address = 8 or 16-bit Disp. + IP

8-bit Disp (ie. -128 to +127) : Short Jump
16-bit Disp (ie. -32768 to +32767) : Long Jump
Example:
JMP SHORT LABEL
11. Intersegment Direct Mode SHORT LABEL indicate the 8-bit signed
displacement.
19
1. Register Addressing Here also the destination to which the control is

to be transferred lies in the same segment.
But the displacement is passed to the instruction
3. Direct Addressing indirectly.
4. Register Indirect Addressing Example:

JMP [BX]
Jump to effective address stored in BX.
20
1. Register Addressing Here also the destination to which the control is

to be transferred lies in a different segment.
Ie. From one code segment to another code
3. Direct Addressing segment.
4. Register Indirect Addressing Here CS and IP of the destination address are

specified directly in instruction.
Example:
7. Register Relative Addressing JMP 5000H : 2000H

8. Relative Based Indexed Addressing Jump to effective address 2000H in segment
5000H.
21
Here also the destination to which the control is
to be transferred lies in a different segment.
3. Direct Addressing Here CS and IP of the destination address are

specified indirectly.
Ie. The content of a memory block containing
5. Based Indexed Addressing IP(LSB),IP(MSB),CS(LSB),CS(MSB) sequentially.
6. Indexed Addressing Example:

JMP [5000H]
Jump to an address in the other segment
9. Intrasegment Direct Mode specified effective address 5000H in DS, that
points to the memory block.
22
Example
The content of different registers are given bellow. From effective

addresses for different addresses in the different modes.
Offset (displacement) = 5000H
[AX]=1000H, [BX]=2000H, [SI]=3000H, [DI]=4000H, [BP]=5000H,

[SP]=6000H, [CS]=0000H, [DS]=1000H, [SS]=2000H, [IP]=7000H
Shifting a number four times is equivalent to multiplying it by 𝟏𝟔𝑫 or 𝟏𝟎𝑯
Effective Address
i. Direct addressing mode MOV AX, [5000H] 15000
ii. Register indirect MOV AX, [BX] 12000

iii. Register relative MOV AX, 5000[BX] 17000
iv. Based indexed MOV AX, [BX] [SI] 15000
v. Relative based indexed MOV AX, 5000 [BX] [SI] 1A000
23

Addressing Modes & Instruction Set

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ADDRESSING MODES

High Level Low Level

Machine Language Assembly Language

 Binary bits  English Alphabets

Program is a set of instructions written to solve a problem. Instructions are

Machine language is the only language which a machine can understand.

To overcome these problems, programmers develop another way in which

Efficient software development for the microprocessor requires a complete

Every instruction of a program has to operate on a data.

4. Register Indirect Addressing

7. Register Relative Addressing

8. Relative Based Indexed Addressing

9. Intrasegment Direct Mode

12. Intersegment Indirect Mode 5

1. Register Addressing The instruction will specify the name of the

7. Register Relative Addressing (CL)  (DH)

9. Intrasegment Direct Mode

10. Intrasegment Indirect Mode

11. Intersegment Direct Mode

12. Intersegment Indirect Mode

7. Register Relative Addressing

9. Intrasegment Direct Mode MOV AX, 0A9FH

12. Intersegment Indirect Mode

4. Register Indirect Addressing

7. Register Relative Addressing

8. Relative Based Indexed Addressing

9. Intrasegment Direct Mode

10. Intrasegment Indirect Mode

11. Intersegment Direct Mode

12. Intersegment Indirect Mode 8

Offset Value (16 bits)

Segment Register (16 bits) 0000

Physical Address (20 Bits)

20 Address lines  8086 can address up to

However, the largest register is only 16 bits

Physical Address will have to be calculated

Memory Address represented in the form –

Each time the processor wants to access

89AB : F012  89AB  89AB0 (Paragraph to byte  89AB x 10 = 89AB0)

1. Register Addressing Here, the offset address of the memory location at

3. Direct Addressing The effective address is 10H*DS+16-bit number

6. Indexed Addressing MOV BX, [1354H]

12. Intersegment Indirect Mode

1. Register Addressing In Register indirect addressing, name of the

11. Intersegment Direct Mode

12. Intersegment Indirect Mode

1. Register Addressing In Based Indexed Addressing, effective address is

3. Direct Addressing Default segment register may be ES or DS.

4. Register Indirect Addressing Example:

5. Based Indexed Addressing

9. Intrasegment Direct Mode

10. Intrasegment Indirect Mode

11. Intersegment Direct Mode

12. Intersegment Indirect Mode

1. Register Addressing Offset of the operand is stored in one of the index

4. Register Indirect Addressing For string instructions DS and ES are default

7. Register Relative Addressing MOV AX, [SI]

12. Intersegment Indirect Mode

1. Register Addressing In Based Index Addressing, the data is available

5. Based Indexed Addressing MOV AX, 50H[BX]

8. Relative Based Indexed Addressing

9. Intrasegment Direct Mode