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(PIC18F14K50)
PIC18 Tradicional
PIC18 serie - J
PIC18 serie - K
4KB 32KB 128KB
Program Flash
Tipicamente los productos con mucha memoria tambien tienen muchos pines y perifericos avanzados integrados
Espacio de Espacio de
Programa Datos
Tabla de RAM
8-bit 8-bit
Acceso
Memoria
Peripfericos
Flash Bus de Bus de datos
instrucciones
16-bit 8-bit CPU 8-bit
Puertos I/O
acceso directo
Banco13 GPR
Banco14 GPR
Banco15 GPR
* La división 50/50 no se mantiene en
ACCESS SFR
los dispositivos con muchos registros
SFR (Special Function Registers)
Vector de Reset
Hasta 2MB (1M Words) 000000h
Memoria de Programa
En el chip
Contador de Programa de 21-bit
007FFEh
Nivel de Stack 2
Memoria de Programa
Nivel de Stack 30
Sin implementar
Nivel de Stack 31
(Read as ‘0’)
Stack de 31 niveles
1FFFFEh
22-bit Address
0x001 0x000003 0x000002
0x002 0x000005 0x000004
0x003 0x000007 0x000006
0x004 0x000009 2C 0x000008
0x005 TABLAT 0x00000B 0x00000A
2C 8-bit Data
ICSP™ Connector
User Memory
Watchdog Timer
Tipo de Oscilador User Flash
Opcion de Debug
Otras…
Configuration
Registro CONFIGlocalizado en la
Memory
memoria de programa, fuera del area Registros de Configuración
de ejecución del código
Device ID
(inicia en @ 0x300000)
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 26
Bits de Configuración
PIC18F4520 (4 of 11)
CONFIG1H Register
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CONFIG2L Register
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CONFIG2H Register
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CONFIG3H Register
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
#fuses HS,NOWDT
USB 2.0
500 Kb/s 1 Mb/s 1.5 Mb/s 12 Mb/s 100 Mb/s 480 Mb/s 1 Gb
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 34
Grandes Mitos
Mito: un Periférico USB Low-Speed puede transferir datos hasta
la velocidad de 187.5 KB/s (1.5 Mbps)
Real: Imposible, 1.5 MB/s es el total del ancho de banda del BUS
El ancho de banda se reparte entre todos los periféricos USB
El Over head del Protocolo
Las restricciones del Protocolo
La realidad de la transferencia de datos de un único periférico puede
llegar a ~1.0 MB/s en el mejor de los casos
Solo 64 KB/s en la mayoría de los casos
Tier 5 Hub
PIC18 USB esta diseñado para
Tier 6 Hub ser periferico. PIC24/PIC32
puede funcionar como Host o
Periférico.
Tier 7 Data Logger
Hub
Hasta 126 periféricos...
“A”
USB Host
“B” “mini-B”
FS, HS FS, HS
Device Device
Micro-A/B receptaculo
Permitido en productos OTG
Micro-A plug
Indicacual es escencialmente el host (OTG)
Floppy
Data Glove Drive
Ethernet
Adapter
Mouse
External
Hard Drive
PICkit™ 3
Starter Kit Modem
Mass Storage Device
Joystick Class (MSD)
Communication Device
Class (CDC) MPLAB®
Keyboard REAL ICE™
in-circuit emulator
Custom Class
(Vendor Class)
Human Interface Device Class
(HID)
Muchas mas clases….
POWERED
Power Bus
(self/bus) reset
ATTACHED DEFAULT
DETACHED ADDRESS
Get
Descriptors
CONFIGURED
VUSB 3.3 V
Full Speed Identification
D+ line pull-up
1.5 kΩ 5%
+5V
D+
Transceiver
D-
GND
USB
Connector
VUSB 3.3 V
Low Speed Identification
D- line pull-up
1.5 kΩ 5%
+5V
D+
Transceiver
D-
GND
USB
Connector
Peripheral Device
USB PIC® MCU
VUSB 3.3 V
+5V
D+
Transceiver
D-
GND
USB
Connector
Function Controller +
Function
“High Power”
100-500 mA desde el bus
Debe ser enumerado a low power (100 mA)
Device pide el bMaxPower
Host habilita la configuración deseada solicitando el
Set_Configuration
Power from V DD
USB Cable
≤10µF
Self-Powered
VBUS from
USB Cable V DD
I/O
PIC24F
Mid-Range, Capacitive-Touch Capable
Up to 16 MIPS
64-, 80- & 100-Pin Packages
Up to 256 KB Flash
Up to 16KB RAM
USB 2.0 Device, Embedded Host, OTG
PIC18F
Small, Low Power, Low Cost 32-bit
Up to 12 MIPS
18- to 80-Pin Packages 16-bit
Up to 128KB Flash
Up to 4KB RAM 8-bit
USB 2.0 Device Support
Migration
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 53
Control USB with CCS compiler
usb_init()
usb_task()
usb_enumerated()
usb_cdc_kbhit()
usb_cdc_getc()
usb_cdc_putc(c)
usb_cdc_puts(*str)
Include files:
<usb_desc_cdc.h> & <usb_cdc.h>
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 54
PICPeriféricos Comunes
PIC18 Common Peripherals
Puertos I/O
Analog Comparator
Converso Analógico Digital
Timers (0,1,2,3)
CCP como PWM
Addressable USART (AUSART)
LATx 0 1 0 1 0 0 1 1
PORTx
Pines son todos entradas
(I/O Pins) por default
Dirección de Datos
TRISx 0 0 1 1 0 1 0 0 (1 = IN, 0 = OUT)
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 61
PORTB Opciones
Todos lod pines del PORTB tienen resistores de
PULL UP.
Un bit controla el pull up de todos los pines
INTCON2 Register
R/W-1 R/W-1 R/W-1 R/W-1 U-0 R/W-1 U-0 R/W-1
bit 7 bit 0
AN12
AN12
AN10
AN9
13:1 Analog Mux
AN8
AN7* 10-bit A/D Result Registers
VAIN
AN6*
AN5*
ADC ADRESH ADRESL
AN4
VREF+ / AN3 VREF+ VREF-
VREF- / AN2
AN1 VDD
AN0
x0
x1
1x
0x
VSS
•FS = Fondo de
escala
•N-bits, 2N Codigos
posibles
Respuesta:
Tamaño del Bit = 5.12 / 1024 = 5 mV
10
Tiempo de adquisición
time
determinado por la
SOURCE
capacidad CHold y la
Impedancia de fuente RS < 10kΩ
Ω
ADC
+ Este tiempo le permite cargarse V
VC completamente a CHold
CHOLD
-
VSS
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 69
ADC Conversion
Acquisition Time Conversion Time
Acquisition Time
time
VC
VIN
ADRES
ADC Result
10 time
11 ADC Conversion
Clock cycles (TAD)
ADC time
+
CHOLD VC
-
VSS
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 70
Conversor A/D de 10-bit
Configuración
ADCON0 Register
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
bit 7 bit 0
bit 7 bit 0
bit 7 bit 0
A = Analog Input
D = Digital I/O
bit 7 bit 0
NOTE: This parameter determines the value of TAD: the conversion time per bit.
TAMP EXT: Es el tiempo del amplificador externo. Este es muy importante cuando el
circuito externo acondiciona la señal. Para la placa de micorochip PICDEM2 Plus
es un POTENCIOMETRO, y este número es 0 µs.
TAMP = 0.2 µs
CHOLD = 25pF
RIC = 1kΩ
Ω
RSS = 2kΩ
Ω
RS = 2.5kΩ
Ω MAX
TCOFF = 1.2µ
µs
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 79
Conversor A/D de 10-bit
Configuración
Para Rs = 2.5k Ω
Temp. = 85 C
TAMP = 0.2 µs
bit 7 bit 0
bit 7 bit 0
ADRESH ADRESL
b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 = Justificado a la izquierda
ADRESH ADRESL
b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
setup_adc(mode)
setup_adc_ports(value)
set_adc_channel(channel)
read_adc(mode)
adc_done()
#device adc=xx (xx=8,10,12 o16 bits)
FOSC/4 0 TMR0IF
1
T0CKI Clock
1 TMR0L
Sync
Programmable
0
Prescaler
T0SE T0CS
T0PS2:T0PS0 PSA
FOSC/4 0 TMR0IF
1
T0CKI Clock
1 High Byte TMR0L
Sync
Programmable
0
Prescaler READ
WRITE
TMR0L
T0SE T0CS TMR0L
FOSC/4 TMR0IF
0
1
T0CKI Clock
1 TMR0L
Sync
Programmable
0
Prescaler
T0SE T0CS
T0PS2:T0PS0 PSA
DATA BUS
T0CON Register
TMR0ON T08BIT T0CS T0SE PSA T0PS2:0
T08BIT
1 = 8 BIT
0 = 16 BIT
T08BIT
1 = 8 BIT
0 = 16 BIT
T0CON Register
TMR0ON T08BIT T0CS T0SE PSA T0PS2:0
FOSC/4 0 TMR0IF
1
T0CKI Clock
1 High Byte TMR0L
Sync
Programmable
0
Prescaler READ
WRITE
TMR0L
T0SE T0CS TMR0L
T0CON Register
TMR0ON T08BIT T0CS T0SE PSA T0PS2:0
FOSC/4 0 TMR0IF
1
T0CKI Clock
1 High Byte TMR0L
Sync
Programmable
0
Prescaler READ
WRITE
TMR0L
T0SE T0CS TMR0L
T0CON Register
TMR0ON T08BIT T0CS T0SE PSA T0PS2:0
Prescaler Assignment
1= prescaler NOT assigned
0= prescaler IS assigned
T0CON Register
TMR0ON T08BIT T0CS T0SE PSA T0PS2:0
TMR0ON
1 = ON
0 = STOPPED
Timer 1 Oscillator 0
T1OSO/
1
T13CKI Prescaler Sync 1
1, 2, 4, 8 Detect
FOSC/4 0
T1OSI Sleep Input T1SYNC
T1OSCEN TMR1CS
TMR1ON
T1CKPS1: T1CKPS0
TMR1IF
Clear Timer 1
High Byte TMR1L
(CCP Special Event Trigger)
READ
TMR1L WRITE
TMR1L
Bit 7 Bit 0
T1CON Register
8-bit Data Bus
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 96
Timer1 and Timer3
Timer 1 Oscillator 0
T1OSO/
1
T13CKI Prescaler Sync 1
1, 2, 4, 8 Detect
FOSC/4 0
T1OSI Sleep Input T1SYNC
T1OSCEN TMR1CS
TMR1ON
T1CKPS1: T1CKPS0
16-bit Read/Write Mode Enable
1 = Read/Write of Timer TMR1IF
in one operation
0 = Read/Write of Timer TMR1H TMR1L
in two 8-bit operations Clear Timer 1
(CCP Special Event Trigger)
TMR1H
TMR1IF
Clear Timer 1
High Byte TMR1L
Timer1 Oscillator Enable (CCP Special Event Trigger)
1 = T1OSC Enabled READ
TMR1L WRITE
0 = T1OSC off TMR1L
TMR1H
T1CON Register
8-bit Data Bus
RD16 T1RUN TCKPS1:0 T1OSCEN T1SYNC TMR1CS TMR1ON
Bit 7 Bit 0
Clear Timer 1
High Byte TMR1L
(CCP Special Event Trigger)
READ
TMR1L WRITE
TMR1L
T1CON Register
TMR1H
RD16 T1RUN TCKPS1:0 T1OSCEN T1SYNC TMR1CS TMR1ON
Bit 7 Bit 0
READ
TMR1L WRITE
T1CON Register TMR1L
TMR1H
RD16 T1RUN TCKPS1:0 T1OSCEN T1SYNC TMR1CS TMR1ON
Bit 7 Bit 0
READ
TMR1L WRITE
TMR1L
T1CON
RD16 Register
T1RUN TCKPS1:0 T1OSCEN T1SYNC TMR1CS TMR1ON TMR1H
Bit 7 Bit 0
TMR0IE
Other Core
Interrupts Wakeup
to CPU
TMR1IF Peripheral
TMR1IE Interrupts Interrupt to
CPU
Vector to 0x0008
Other GIE
Peripheral
Interrupts
PEIE
IP INT0IF INT0IE
IE
IF GIEH
Vector to 0x0008
High Priority
Interrupt to CPU
Wakeup to CPU
Low Priority
Interrupt to CPU
IP
IE Vector to 0x0018
IF GIEL
OSCIP: Oscillator Fail Interrupt Priority BCLIP: Bus Collision Interrupt Priority
CMIP: Comparator Interrupt Priority HLVDIP: High/Low Voltage Detect Interrupt Priority
---- Unimplemented Bit TMR3IP: Timer3 Interrupt Priority
EEIP: Data EEPROM/Flash Write CCP2IP: CCP2 Interrupt Priority
Operation Interrupt Priority
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 114
Habilitando las Interrupciones
(3 de 9)
Ensure Peripheral Interrupt Flags are clear
If set, an interrupt is pending or being processed
1 = Set, 0 = Clear
PIR1 Register
PSPIF ADIF RCIF TXIF SSPIF CCPIF TMR2IF TMR1IF
PSPIF: Parallel Slave Interrupt Flag SSPIF: MSSP Interrupt Flag
ADIF: A/D Converter Interrupt Flag CCPIF: CCP1 Interrupt Flag
RCIF: EUSART Rcv Interrupt Flag TMR2IF: Timer2 Interrupt Flag
TXIF: EUSART Tx Interrupt Flag TMR1IF: Timer1 Interrupt Flag
PIR2 Register
OSCIF CMIF --- EEIF BCLIF HLVDIF TMR3IF CCP2IF
OSCIF: Oscillator Fail Interrupt Flag BCLIF: Bus Collision Interrupt Flag
CMIF: Comparator Interrupt Flag HLVDIF: High/Low Voltage Detect Interrupt Flag
---- Unimplemented Bit TMR3IF: Timer3 Interrupt Flag
EEIF: Data EEPROM/Flash Write CCP2IF: CCP2 Interrupt Flag
Operation Interrupt Flag
© 2011 Microchip Technology Incorporated. All Rights Reserved. Slide 115
Habilitando las Interrupciones
(4 de 9)
Set Peripheral Interrupt Enables
1 = Enabled, 0 = Disabled
PIE1 Register
PSPIE ADIE RCIE TXIE SSPIE CCPIE TMR2IE TMR1IE
PSPIE: Parallel Slave Interrupt Enable SSPIE: MSSP Interrupt Enable
ADIE: A/D Converter Interrupt Enable CCPIE: CCP1 Interrupt Enable
RCIE: EUSART Rcv Interrupt Enable TMR2IE: Timer2 Interrupt Enable
TXIE: EUSART Tx Interrupt Enable TMR1IE: Timer1 Interrupt Enable
PIE2 Register
OSCIE CMIE --- EEIE BCLIE HLVDIE TMR3IE CCP2IE
OSCIE: Oscillator Fail Interrupt Enable BCLIE: Bus Collision Interrupt Enable
CMIE: Comparator Interrupt Enable HLVDIE: High/Low Voltage Detect Interrupt Enable
---- Unimplemented Bit TMR3IE: Timer3 Interrupt Enable
EEIE: Data EEPROM/Flash Write CCP2IE: CCP2 Interrupt Enable
Operation Interrupt Enable
INTCON2 Register
RBPU INTEDG0 INTEDG1 INTEDG2 --- TMR0IP --- RBIP
INTCON3 Register
INT2IP INT1IP --- INT2IE INT1IE --- INT2IF INT1IF
INTCON3 Register
INT2IP INT1IP --- INT2IE INT1IE --- INT2IF INT1IF
INTCON Register
GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
INTCON3 Register
INT2IP INT1IP --- INT2IE INT1IE --- INT2IF INT1IF
INTCON Register
GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
PEIE/GIEL :
Peripheral Interrupt Enable (PIC16 Compatibility Mode) /
Global Interrupt Enable Low (Priority Mode)
INTCON Register
GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
GIE/GIEH :
Global Interrupt Enable (PIC16 Compatibility Mode) /
Global Interrupt Enable High (Priority Mode)
#int_rda
void isr_recepcion (void)
{
sentencias
}