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List of Intel chipsets

This article provides a list of motherboard chipsets made by Intel, divided into three main categories: those that use the PCI bus for
interconnection (the 4xx series), those that connect using specialized "hub links" (the 8xx series), and those that connect using PCI Express (the 9xx
series). The chipsets are listed in chronological order.

Contents
Pre-chipset situation
Early chipsets
Intel ICH7 southbridge on an Intel
4xx chipsets D945GCPE desktop motherboard
80486 chipsets
Pentium chipsets
Pentium Pro/II/III chipsets
Southbridge 4xx chipsets
8xx chipsets
Pentium II/III chipsets
Pentium III mobile chipsets
Pentium 4 chipsets
Pentium 4-M/Pentium M/Celeron M mobile chipsets
Southbridge 8xx chipsets
9xx chipsets and 3/4 Series chipsets
Pentium 4/Pentium D/Pentium EE chipsets
Pentium M/Celeron M mobile chipsets
Core/Core 2 mobile chipsets
Core 2 chipsets
Core 2 mobile chipsets
Southbridge 9xx and 3/4 Series chipsets
5/6/7/8/9 Series chipsets
LGA 1156
LGA 1155
LGA 1150
LGA 1366, LGA 2011, and LGA 2011-v3
Mobile chipsets
100/200/300 Series chipsets
LGA 1151 rev 1
LGA 1151 rev 2
Xeon chipsets
LGA 2066
Mobile chipsets
See also
Notes
References
External links

Pre-chipset situation
Early IBM XT-compatible mainboards did not have a chipset yet, but relied instead on a collection of discrete TTL chips by Intel:[1]

the 8284 clock generator


the 8288 bus controller
the 8254 Programmable Interval Timer
the 8255 parallel I/O interface
the 8259 Programmable Interrupt Controller
the 8237 DMA controller

Early chipsets
To integrate the functions needed on a mainboard into a smaller amount of ICs, Intel licensed the ZyMOS POACH chipset for its Intel 80286 and Intel 80386SX processors (the 82230/82231 High
Integration AT-Compatible Chip Set). This chipset can be used with an 82335 High-integration Interface Device to provide support for the Intel 386SX.[2]

List of early Intel chipset includes:[3][4]

82091AA EISA/ISA - Advanced Integrated Peripheral (AIP), includes: floppy disk controller, 2× UARTs, parallel port, IDE controller, oscillator, etc.[5]
82310 MCA - announced in April 1988.[6] Includes: 82306 Local Channel Support Chip, 82307 DMA Controller/Central Arbiter, 82308 Micro Channel Bus Controller, 82309
Address Bus Controller, 82706 VGA Graphics Controller.[2]
82350 EISA - announced in September 1988.[7][8]
82311 MCA - announced in November 1988.[9][10] Includes: 82303 and 82304 Local I/O Channel Support Chips, 82307 DMA Controller/Central Arbiter, 82308 Micro Channel
Bus Controller, 82309 Address Bus Controller, 82706 VGA Graphics Controller, 82077 Floppy Disk Controller.[2][8]
82320 MCA - announced in April 1989.[11]
82340SX PC AT - announced in January 1990, it is the Topcat chipset licensed from VLSI.[12]
82340DX PC AT - announced in January 1990, it is the Topcat chipset licensed from VLSI.[12]
82360SL - announced in October 1990.[13] It was a chipset for the mobile 80386SL and 80486SL processors. It integrated DMA controller, an interrupt controller PIC, serial
and parallel ports, and power-management logic for the processor.
82350DT EISA - announced in April 1991.[14]

4xx chipsets

80486 chipsets

L2
Code Part South Release Memory Max. PCI
Chipset Processors FSB SMP Parity/ECC Cache
Name Numbers Bridge Date types memory support
Type
82424TX, November
420TX Saturn 5 V 486 128 MB[15] 1.0
82423TX 1992 Up to
SIO
Saturn 82424ZX, 33 MHz
420ZX No FPM 160 MB Parity Async. 2.1
II 82423TX March 5 V/3.3 V
1994 486 Up to
420EX Aries 82425EX 82426EX 128 MB 2.0
50 MHz

Pentium chipsets
While not an actual Intel chipset bug, the Mercury and Neptune chipsets could be found paired with RZ1000 and CMD640 IDE controllers with data corruption bugs. L2 caches are direct-mapped
with SRAM tag RAM, write-back for 430FX, HX, VX, and TX.

South Release Max. Max.


Chipset Code Name Part Numbers Processors FSB SMP Memory types
Bridge Date memory cacheable

SIO (ISA)
82434LX (PCMC) March
430LX Mercury[16] PCEB/ESC P60/66 60/66 MHz No 192 MB 192 MB
2x 82433LX (LBX) 1993
(EISA)
SIO (ISA) FPM
SIO.A (DP
82434NX (PCMC) March
430NX Neptune[17] ISA) Yes 512 MB 512 MB
2x 82433NX (LBX) 1994
PCEB/ESC
(EISA)
82437FX/JX (TSC) January
430FX Triton[18][19] PIIX
2x 82438FX (TDP) 1995
50/60/66 MHz No 128 MB 64 MB
October
430MX Mobile Triton 82437MX MPIIX
1995
P75+ FPM/EDO
64 MB
512 MB
430HX Triton II[19][20] 82439HX/JHX (TXC) Yes 512 MB (w/ 11-bit
February tag
PIIX3
1996 RAM)[21]
82437VX (TVX)
430VX Triton II[19][22] 128 MB
2x 82438VX (TDX)
60/66 MHz No FPM/EDO/SDRAM 64 MB
February
430TX[23] 82439TX (MTXC) PIIX4 256 MB
1997

Pentium Pro/II/III chipsets


Code Part South Release Memory PCI
Chipset
Name numbers Bridge Date Processors[a] FSB SMP Parity/ECC
support s
Type Max. Bank
82451KX, SIO, SIO.A
82452KX, (ISA)
450KX Mars Yes 1 GB
82453KX, PCEB/ESC
82454KX (EISA) November
Pentium Pro FPM 2.0
82451GX, SIO.A 1995 Yes
82452GX, (ISA) 60/66 MHz (up
450GX Orion 8 GB
82453GX, PCEB/ESC to
82454GX (EISA) four) Both

PIIX3 (ISA) FPM /


82441FX, Pentium Pro,
440FX Natoma PCEB/ESC May 1996 EDO / 1 GB
82442FX Pentium II
(EISA) BEDO
Yes 4
FPM / 1 GB EDO 2.1
August
440LX Balboa 82443LX PIIX4 Pentium II, EDO / / 512 MB
1997 66 MHz
Celeron SDRAM SDRAM[26]
440EX N/A 82443EX No 256 MB 2 Neither
512 MB A
EDO / 2.1 (64-
April 1998 Pentium II/III, (non-ECC)
440BX Seattle 82443BX 66/100 MHz SDRAM bit
Celeron Yes / 1 GB
optional)
(ECC)[27]
440GX 82443GX SDRAM 2 GB 4 Both 2.1
82451NX, PIIX4E Yes
June Pentium II/III, 2.1 (64-
82452NX, 66/100 MHz (up FPM /
450NX 1998 Xeon 8 GB bit
82453NX, to EDO
optional)
82454NX four)
440ZX- N/A
November Celeron, 66 MHz
66 82443ZX 512 MB
1998 Pentium II/III
440ZX
2.1 A
Pentium III,
440ZX- 82443ZX- No SDRAM 2 Neither
PIIX4M mobile 256 MB
M M
Celeron 66/100 MHz
Pentium II/III,
440MX Banister 82443MX Same chip mobile 512 MB 2.2
Celeron

Southbridge 4xx chipsets

Chipset Part Number ATA support USB support CMOS/clock ISA support LPC support Power management
ESC 82374EB/SB
PCEB 82375EB/SB
None
SIO 82378IB/ZB
None
SIO.A 82379AB
MPIIX 82371MX PIO No
Yes
PIIX 82371FB
PIO/WDMA No SMM
PIIX3 82371SB
PIIX4 82371AB
1 Controller, 2 Ports
PIIX4E 82371EB PIO/UDMA 33 Yes
PIIX4M 82371MB

8xx chipsets

Pentium II/III chipsets


Parity
Code Part South Release Max. Memory
Chipset Processors FSB SMP Memory types or PCI
name numbers bridge date memory banks
ECC
EDO/PC100
810 82810 ICH/ICH0 April 1999 66/100 MHz
SDRAM
Whitney September 4
810E ICH No
82810E 1999 Celeron,
Pentium
810E2 ICH2
II/III
815 ICH
82815 June 2000 Yes
815E ICH2 512 MB Neither
(2) PC100/133
815G ICH/ICH0 SDRAM
September v2.2/33 M
82815G
815EG Solano ICH2 2001 Celeron, 6
Pentium III
March 66/100/133 MHz No
815P ICH/ICH0
2001
82815EP
November
815EP ICH2
2000
Celeron,
November Pentium PC800
820 ICH RDRAM/PC100
82820 1999 II/III 1 GB 2
SDRAM (with
820E Camino ICH2 June 2000 Yes MTH) Both
v2.2/33 M
October Pentium III, Dual-Channel
840 82840 ICH 4 GB 2×4 + PCI-
1999 Xeon PC800 RDRAM
X/66 MH

Pentium III mobile chipsets

Parity
Code Part South Release Memory Max. Memory Ext
Chipset Processors FSB SMP or PCI
name numbers bridge date types memory banks AGP/sp
ECC
Mobile
ICH2- October Celeron, PC100 Yes/AG
815EM 82815EM 100 MHz No 512 MB 2 Neither v2.2/33 MHz
M 2000 Mobile SDRAM 4×
Pentium III
July
830M 82830M Yes/AG
2001 Celeron,
ICH3- PC133 4×
Almador Pentium III- 100/133 MHz No 1 GB 2 Neither v2.2/33 MHz
830MP 82830MP M SDRAM
M
830MG 82830MG No

Pentium 4 chipsets
Part Release Processor FSB
Chipset Code name South bridge Socket SMP Memor
numbers date brands [ MT/s ]

82860 PC800/6
860 Colusa May 2001 Socket 604 Xeon Yes
(MCH) RDRAM
82845 January 400 MT/s DDR 20
845 Brookdale ICH2 Socket 423
(MCH) 2002 (100 MHz QDR) SDR 13
Socket 478
82850 November Celeron, PC800/6
850 Tehama
(MCH) 2000 Pentium 4 RDRAM
82850E PC1066
850E Tehama-E ICH2/ICH4
(MCH) RDRAM
Brookdale- 82845E
845E May 2002 Socket 478 DDR 20
E (MCH)
Celeron, 400/533 MT/s
Brookdale- 82845G DDR 20
845G Celeron D,
G (GMCH) SDR 13
Pentium 4
Brookdale- 82845GV October Socket 478 DDR 20
845GV
GV (GMCH) 2002 LGA 775 SDR 13

ICH4
Brookdale- 82845GL Celeron, DDR 20
845GL May 2002 Socket 478 400 MT/s
GL (GMCH) Pentium 4 SDR 13

Brookdale- 82845GE Socket 478


845GE Celeron,
GE (GMCH) October LGA 775 DDR
Celeron D, 400/533 MT/s
Brookdale- 82845PE 2002 200/266
845PE Socket 478 Pentium 4
PE (MCH)
Pentium 4,
Pentium 4
EE,
82848P August DDR-40
848P Breeds Hill Pentium 400/533/800 MT/s
(MCH) 2003 (single-c
D,
Celeron, No
Celeron D
Springdale- Pentium 4,
865P 82865P 400/533 MT/s DDR-33
P Celeron D
Pentium 4,
Springdale- ICH5/ICH5R Pentium 4
865PE 82865PE
PE May 2003 EE,
Pentium
D,
82865G Pentium
865G Springdale Socket 478 Extreme
(GMCH)
LGA 775 Edition,
Celeron,
Celeron D,
Springdale- 82865GV September Core 2,
865GV
GV (GMCH) 2003 Pentium
Dual Core 400/533/800 MT/s DDR-40

Pentium 4,
Pentium 4
EE,
Pentium
D,
82875P
875P Canterwood ICH5/ICH5R/6300ESB April 2003 Pentium
(MCH)
Extreme
Edition,
Celeron,
Celeron D,
Xeon
E7205
E7205 Granite Bay ICH4 Nov 2002 Pentium 4 400/533 MT/s
(MCH)
E7500 Plumas Feb 2002 Xeon 400 MT/s
E7500 Xeon,
ICH3-S Socket 604 DDR-26
E7501 Plumas 533 (MCH) Dec 2002 Pentium M
[29] Yes
400/533 MT/s
E7505
E7505 Placer ICH4 Nov 2002 Xeon
(MCH)
No

Pentium 4, DDR 33
Copper E7221 September
E7221 [30][31] ICH6/ICH6R LGA 775 Pentium 4 533/800 MT/s DDR2 4
River (MCH) 2004
HT (dual-ch

E7230 [30][32] Mukilteo E7230 ICH7/ICH7R July 2005 LGA 775 Pentium 533/800/1066 MT/s DDR2
(MCH) D, 400/533
Pentium 4, (dual-ch
Pentium 4
HT,
Pentium 4
EE,
Celeron D

Summary:

845 (Brookdale)

two distinct versions 845 MCH for SDR and 845 MCH for DDR[33][34]
875P (Canterwood)

Similar to E7205, but adds support for 800 MHz bus, DDR at 400 MHz, Communication Streaming Architecture (CSA), Serial ATA (with RAID in certain configurations)
and Performance Acceleration Technology (PAT), a mode purported to cut down memory latency.
SMP capability exists only on Xeon-based (socket 604) motherboards using the 875P chipset. FSB is rated at 533 MHz on these motherboards.
865PE (Springdale)

875P without PAT, though it was possible to enable PAT in some early revisions. Also lacks ECC Memory support.
Sub-versions:

865P - Similar to 865PE, but supports only 400/533 MHz bus and 333 MHz memory.
848P - Single memory channel version of 865PE.
865G (Springdale-G)

865PE with integrated graphics (Intel Extreme Graphics 2). PAT never supported in any revisions.
Sub-versions:

865GV - 865G without external AGP slot.


E7221 (Copper River)

Designed for Pentium 4-based server.


Supports only one physical processor.
A basic SVGA controller is integrated for analog video.
One PCI-X slot can be bridged to the PCI-e ×8 using the Intel® 6702PXH 64-bit PCI Hub.
E7230 (Mukilteo)

Similar to the Intel 3000 MCH, but mainly designed for Pentium D-based server.
Supports only one physical processor.
DDR2-667 4-4-4 is not supported [32].
No integrated graphics.
One PCI-X slot can be bridged to the PCI-e ×8 using Intel® 6700PXH 64-bit PCI Hub/Intel® 6702PXH 64-bit PCI Hub.

Pentium 4-M/Pentium M/Celeron M mobile chipsets

Code Part South Release Memory Max.


Chipset Processors FSB SMP Parity/ECC PCI Type Graph
name numbers bridge date types memory
Brookdale- Mobile
845MZ DDR 200
MZ 82845 ICH3- March Celeron,
AGP 4
Brookdale- (MCH) M 2002 Pentium 4-
845MP M
M
400 MT/s 1 GB
82852GM DDR Integr
852GM Q2, '04 Pentium 4-
(GMCH) 200/266 32-bit
M, Celeron,
82852GMV Core @
852GMV Celeron M
(GMCH) 133 M
Montara-
GM 82852PM AGP
852PM Pentium 4-
(MCH) DDR 1x/2×/
M, Celeron, 400/533 MT/s No No/No v2.2/33 MHz
82852GME 200/266/333
852GME Q4, '03 Celeron D
(GMCH) ICH4-
M Integr
[35] 82854 March Celeron M DDR Extrem
854
(GMCH) 2005 ULV 266/333 Graph
2 GB
82855GM DDR 2
855GM graph
Montara- (GMCH) 200/266
400 MT/s core
GM 82855GME March Pentium M,
855GME
(MCH) 2003 Celeron M DDR
82855PM 200/266/333 AGP
855PM Odem
(MCH) 2×/4×

Southbridge 8xx chipsets


USB PCI
Chipset Part Number ATA SATA RAID Level
v1.1 v2.0 Rev 2.2 Rev 2.3
ICH 82801AA UDMA 66/33 6 PCI slots
ICH0 82801AB UDMA 33 2 ports 4 PCI slots
ICH2-M 82801BAM 2 PCI slots
N/A
ICH2 82801BA 4 ports 6 PCI slots
N/A
ICH3-M 82801CAM No 2 ports 2 PCI slots
No
ICH3-S 82801CA 6 ports 6 PCI slots
ICH4-M 82801DBM 4 ports 3 PCI slots
ICH4 82801DB UDMA 100/66/33 6 ports 6 PCI slots
ICH5-M 82801EBM 4 ports 4 PCI slots
N/A
ICH5 82801EB 8 ports N/A
6 PCI slots
ICH5R 82801ER 6 ports
SATA 1.5 Gbit/s, 2 ports
RAID0, RAID1 Rev 2.2 4 PCI slots,
6300ESB 6300ESB 4 ports
Rev 1.0 2 PCI-X slots + 2 PCI-X devices

9xx chipsets and 3/4 Series chipsets

Pentium 4/Pentium D/Pentium EE chipsets


All Chipsets listed in the table below:

Do not support SMP


Support (-R and -DH) variants for South Bridges
Memory Graphics
Code Part South Release Supported Parity /
Chipset FSB [MT/s] max. integrated
Name numbers Bridge Date Processors types ECC PCIe
[GB] core
910GL ICH6/ICH6R
(https://
ark.inte
l.com/p
roduct
s/2771
Pentium 4,
2/Intel- 82910GL September
Celeron, 533 2
82910G (GMCH) 2004
Celeron D
L-Grap
hics-an
d-Mem
ory-Co
ntrolle
r) Grantsdale- N/A GMA 900
915GL GL
(https://
ark.inte
l.com/p
roduct
s/2771 DDR
4/Intel- 82915GL 333/400
4
82915G (GMCH)
L-Grap
hics-an
d-Mem
ory-Co
ntrolle March
r) 2005
915PL
(https://
ark.inte
l.com/p
roduct
s/2771 Grantsdale- 82915PL
2
6/Intel- PL (MCH)
82915P
L-Mem
ory-Co
ntrolle
r) No/No
N/A
915P (h June 2004
ttps://ar
k.intel.
com/pr
oducts/
27735/I
82915P Pentium 4,
ntel-91 Grantsdale 533/800
(MCH) Celeron D ×16
5P-Gra
phics-a
nd-Me
mory-C
ontrolle
r)
915G (h
ttps://ar
k.intel.
com/pr
oducts/
DDR
27733/I
Grantsdale- 82915G 333/400,
ntel-91 4
G (GMCH) DDR2
5G-Gra
400/533
phics-a
nd-Me
mory-C
ontrolle
r)
GMA 900
915GV
(https://
ark.inte
l.com/p
roduct
s/2773
Grantsdale- 82915GV
4/Intel- N/A
GV (GMCH)
915GV-
Graphi
cs-and-
Memor
y-Contr
oller)
925X Alderwood 82925X Pentium 4, 800 DDR2 4[*] Yes/Yes ×16 N/A
(MCH) Pentium 4 400/533
EE
Alderwood- 82925XE November
925XE 800/1066
XE (MCH) 2004

945PL
(https://
ark.inte
l.com/p
roduct Pentium 4,
s/2772 Lakeport- 82945PL March Pentium D,
ICH7 533/800 2[*]
4/Intel- PL (MCH) 2006 Celeron D,
82945P Core 2 Duo
L-Mem
ory-Co
ntrolle
r)
945P (h
ttps://ar
k.intel.
com/pr
oducts/
82945P No/No
27723/I Lakeport
(MCH)
ntel-82
945P-M
emory-
Control Pentium 4,
ler) Pentium D, DDR2
May 2005
Celeron D,
533/800/1066
400/533/667 4[*]
945G (h
ttps://ar Core 2 Duo
k.intel.
com/pr
oducts/
82945G
27720/I Lakeport-G ICH7/ICH7R GMA 950
(GMCH)
ntel-82
945G-M
emory-
Control
ler)
955X (h
ttps://ar
k.intel. Pentium 4,
com/pr Pentium 4
oducts/ EE,
82955X DDR2
27727/I Lakeport-X April 2005 Pentium D, 800/1066 8 Yes/Yes N/A
(MCH) 533/667
ntel-82 Pentium
955X-M XE, Core 2
emory- Duo
Control
ler)

[*] Remapping of PCIE/APIC memory ranges not supported,[36][37] some physical memory might not be accessible (e.g. limited to 3.5 GB or similar).

Summary:

915P (Grantsdale)

Supports Pentium 4 on an 800 MT/s bus. Uses DDR memory up to 400 MHz, or DDR2 at 533 MHz. Replaces AGP and CSA with PCI Express, and also supports "Matrix
RAID", a RAID mode designed to allow the usage of RAID levels 0 and 1 simultaneously with two hard drives. (Normally RAID1+0 would have required four hard drives)
Sub-versions:

915PL - Cut-down version of 915P with no support for DDR2 and only supporting 2 GB of memory.
915G (Grantsdale-G)

915P with an integrated GMA 900. This core contains Pixel Shader version 2.0 only, it does not contain Vertex Shaders nor does it feature Transform & Lighting (T&L)
capabilities and therefore is not Direct X 8.1 or 9.0 compliant.
Sub-versions:

915GL - Same feature reductions as 915PL, but supports 4 GB of memory. No support for external graphics cards.
915GV - Same as 915G, but has no way of adding an external graphics card.
910GL - No support for external graphics cards or 800 MT/s bus.
925X (Alderwood)

Higher end version of 915. Supports another PAT-like mode and ECC memory, and exclusively uses DDR-II RAM.
Sub-versions:

925XE - Supports a 1066 MT/s bus.


945P (Lakeport)

Update on 915P, with support for Serial ATA II, RAID mode 5, an improved memory controller with support for DDR-II at 667 MHz and additional PCI Express lanes.
Support for DDR-I is dropped. Formal dual-core support was added to this chipset.
Sub-versions:

945PL - No support for 1066 MT/s bus, only supports 2 GB of memory.


945G (Lakeport-G)
A version of the 945P that has a GMA 950 integrated, supports a 1066 MT/s bus.
Sub-versions:

945GC - Same feature reductions as 945PL but with an integrated GMA 950.
945GZ - Same as 945GC but only supports DDR2 memory at 400/533 MT/s. No support for external graphics cards (some boards, like Asus P5GZ-MX, support
through ICH7 on PCIe ×16 @4 lanes mode).
955X (Lakeport)

Update for 925X, with additional features of "Lakeport" (e.g., PAT features and ECC memory), and uses DDR2.

Pentium M/Celeron M mobile chipsets

Code Part South Release Supported Memory Max.


Chipset FSB Parity/ECC Graphics TDP
Name numbers Bridge Date Processors Types Memory
910GML (htt
ps://ark.inte
l.com/produ DDR
cts/27713/Int 82910GML 333/400,
Celeron M 6W
el-82910GM (GMCH) DDR2
L-Graphics- 400
and-Memory
-Controller)
400 MT/s
915GMS (htt
ps://ark.inte
l.com/produ
cts/27855/Int Alviso- 82915GMS DDR2 Integrated
4.8 W
el-82915GM GM (GMCH) 400 GMA 900
S-Graphics-
and-Memory
-Controller) ICH6- January
2 GB No/No
915GM (http M 2005
s://ark.intel.
com/produc
ts/27715/Inte 82915GM Pentium M,
6W
l-82915GM- (GMCH) Celeron M
Graphics-an
d-Memory-C DDR
ontroller) 333,
400/533 MT/s
915PM (http DDR2
s://ark.intel. 400/533
com/produc
PCI
ts/27717/Inte 82915PM
Alviso Express 5.5 W
l-82915PM-G (MCH)
×16
raphics-and-
Memory-Co
ntroller)

Core/Core 2 mobile chipsets


Processors Memory Graphics
Code Part South Release FSB TDP
Chipset supported max. graphics 3D
name numbers bridge date [MT/s] types [W]
(official) [GB] core Render
940GML (https://ark.int
el.com/products/27876/
82940GML Max.
Intel-82940GML-Graphi Celeron M 7
(GMCH) 166 MHz
cs-and-Memory-Contro January
ller) 533
2006
Celeron M, Core
82943GML Max.
943GML Solo, Pentium
(GMCH) 200 MHz
Dual-Core[b]
945GSE (https://ark.int DDR2
2
el.com/products/36549/ 400/533
82945GSE
Intel-82945GSE-Graphi Q1'06 Intel Atom Integrated 6
(GMCH)
cs-and-Memory-Contro GMA 950
ller) Max.
ICH7-
945GMS (https://ark.int Calistoga 166 MHz
M
el.com/products/27856/
82945GMS
Intel-82945GMS-Graphi 7
(GMCH)
cs-and-Memory-Contro
ller) 533/667
Core 2 Duo,
945GM/E (https://ark.int
Core Duo,
el.com/products/32281/ January
82945GM/E Pentium Dual- Max.
Intel-82945GME-Graphi 2006
(GMCH) Core, Core Solo, 250 MHz
cs-and-Memory-Contro
Celeron M DDR2
ller) 4* 7
400/533/667
945PM (https://ark.inte
l.com/products/27858/I 82945PM
PCI Express ×16
ntel-82945PM-Memory- (MCH)
Controller)

[*] Remapping of PCIE/APIC memory ranges not supported,[36] some physical memory might not be accessible (e.g. limited to 3.5 GB or similar).

Core 2 chipsets
All Core 2 Duo chipsets support the Pentium Dual-Core and Celeron processors based on the Core architecture. Support for all NetBurst based processors was officially dropped starting with the
Bearlake chipset family.[38] However, some motherboards still support the older processors.[39]
Part Release Intel VT-d M
Chipset Code Name South Bridge Processors Lithography FSB [MT/s]
numbers Date support[40] types
945GC 130 nm No
(https://
ark.inte
l.com/p
Pentium 4,
roduct
Pentium D,
s/3450
Celeron D,
5/Intel- 82945GC ICH7/ICH7R/ICH7-DH DDR2
82945G
Lakeport-GC
(MCH) [42] 2005.05[43] Core 2 Duo,
400/533/66
Pentium
C-Grap
Dual-Core,
hics-an
Atom
d-Mem
ory-Co
ntrolle
r)[41]
945GZ
(https://
ark.inte
l.com/p
roduct
s/2772 82945GZ
Lakeport-GZ ICH7 2005.06 DDR2 400/
2/Intel- (GMCH)
82945G
Z-Mem
ory-Co
ntrolle
r) 533/800 (last
946PL rev.1066)
(https://
ark.inte
l.com/p
roduct Pentium 4,
s/2772 82946PL Pentium D,
Lakeport-PL
6/Intel- (MCH) Celeron D,
82946P Core 2 Duo,
L-Mem Pentium
ory-Co Dual-Core
ntrolle
r)
946GZ ICH7/ICH7R 2006.07 DDR2 533/
(https://
ark.inte
l.com/p
roduct
s/2772
5/Intel- 82946GZ
Lakeport-GZ
82946G (GMCH)
Z-Grap
hics-an
d-Mem
ory-Co
ntrolle
r)
P965 (h ICH8/ICH8R/ICH8-DH 2006.06 533/800/1066 DDR2
ttps://ar 533/667/80
k.intel.
com/pr Pentium
oducts/ Dual-Core,
82P965
27730/I Broadwater(P) Core 2
(MCH)
ntel-82 Quad, Core
P965-M 2 Duo
emory-
Control
ler)
G965 (h Pentium
ttps://ar Dual-Core,
k.intel. Core 2 Duo
com/pr
oducts/
27729/I
82G965
ntel-82 Broadwater(GC)
(GMCH)
G965-G
raphics
-and-M
emory-
Control
ler)
Q965 (h Broadwater(G) 82Q965
ttps://ar (GMCH)
k.intel.
com/pr
oducts/
27732/I
ntel-82
Q965-G
raphics
-and-M
emory-
Control
ler)
Q963 (h
ttps://ar
k.intel.
com/pr
oducts/
27731/I
82Q963
ntel-82 Broadwater(G)
(GMCH)
Q963-G
raphics
-and-M
emory-
Control
ler)
975X (h
ttps://ar
k.intel.
Pentium D,
com/pr
Core 2
oducts/ 82975X DDR2
Quad, Core
27728/I Glenwood ICH7/ICH7R/ICH7-DH 2005.11 533/800/1066
(MCH)[46] 2 Duo, 533/667/80
ntel-82
Pentium
975X-M
Dual-Core
emory-
Control
ler)
P31 (htt Pentium 90 nm 800/1066/1333
ps://ar Dual-Core, (P45 unofficial 1600)
k.intel. 82P31 Core 2 Duo,
Bearlake (P)
com/pr (MCH) Core 2
oducts/ Quad
33041)
ICH7 2007.08 DDR2 667/
G31 (ht
tps://ar
k.intel. 82G31
Bearlake (G)
com/pr (GMCH)
oducts/
31913)
G33 (ht
tps://ar
DDR2 667/
k.intel. 82G33
Bearlake (G+) DDR3
com/pr (GMCH)
800/1066
oducts/
31914)
P35 (htt
ps://ar
k.intel. 2007.06
com/pr
oducts/ DDR2 or
82P35
31916/I Bearlake (P+) ICH9/ICH9R/ICH9-DH DDR3
(MCH)
ntel-82 667/800/10
P35-Me
mory-C
ontrolle
r)
G35 (ht DDR2 667/
tps://ar
k.intel. 82G35
Bearlake 2007.08
com/pr (GMCH)
oducts/
31915)
Q33 (ht 2007.06
tps://ar
k.intel.
com/pr
oducts/
31917/I
82Q33
ntel-82 Bearlake (QF) ICH9/ICH9R
(GMCH)
Q33-Gr
aphics-
and-Me
mory-C
ontrolle
r)
Q35 (ht Bearlake (Q) 82Q35 ICH9/ICH9R/ICH9-DO Yes4
tps://ar (GMCH)
k.intel.
com/pr
oducts/
31918/I
ntel-82
Q35-Gr
aphics-
and-Me
mory-C
ontrolle
r)
G41 (ht Core 2 Duo, 65 nm
tps://ar Core 2
k.intel. Quad
com/pr
oducts/
36528/I
82G41
ntel-82 Eaglelake (G) ICH7 2008.09
(GMCH)
G41-Gr
aphics-
and-Me
mory-C
ontrolle
r-Hub)
DDR3
82B43
B43 Eaglelake (B) ICH10D 2008.12 800/1066
(GMCH)
DDR2 667/
P43 (htt
ps://ar
k.intel.
com/pr
oducts/
36525/I
82P43
ntel-82 Eaglelake (P)
(MCH)
P43-Gr
aphics-
and-Me
mory-C
ontrolle
r-Hub)
P45 (htt
ps://ar
k.intel.
com/pr
DDR3
oducts/
82P45 800/1066/1
35133/I Eaglelake (P+)
(MCH) DDR2
ntel-82
667/800/10
P45-Me
mory-C
ontrolle
r-Hub)
No
G43 (ht ICH10/ICH10R 2008.06 DDR3
tps://ar 800/1066
k.intel. DDR2 667/
com/pr
oducts/
36524/I
82G43
ntel-82 Eaglelake (G)
(GMCH)
G43-Gr
aphics-
and-Me
mory-C
ontrolle
r-Hub)
G45 (ht
tps://ar
k.intel.
com/pr
oducts/
35132/I
82G45
ntel-82 Eaglelake (G+)
(GMCH)
G45-Gr
aphics-
and-Me
mory-C
ontrolle
r-Hub)
Q43 (ht 2008.08
tps://ar
k.intel.
com/pr
oducts/
36526/I
82Q43
ntel-82 Eaglelake (Q) ICH10/ICH10R/ICH10D
(GMCH)
Q43-Gr
aphics-
and-Me
mory-C
ontrolle
r-Hub)
Q45 (ht Eaglelake (Q) 82Q45 ICH10/ICH10R/ICH10- Yes4
tps://ar (GMCH) DO
k.intel.
com/pr
oducts/
36527/I
ntel-82
Q45-Gr
aphics-
and-Me
mory-C
ontrolle
r-Hub)
X38 (htt
ps://ar
k.intel.
com/pr
oducts/ 2007.09
82X38
31919/I [47]
(MCH)
ntel-82
X38-Me
mory-C
ontrolle Core 2 Duo, DDR3
r) Core 2 800/1066/1
Bearlake (X) ICH9/ICH9R/ICH9-DH 90 nm
X48 (htt Quad, Core DDR2
ps://ar 2 Extreme 667/800/10
k.intel.
com/pr
oducts/
82X48
35143/I 2008.03 800/1066/1333/1600
(MCH)
ntel-82
X48-Me
mory-C
ontrolle
r-Hub)

[*] Remapping of PCIE/APIC memory ranges not supported,[36] some physical memory might not be accessible (e.g. limited to 3.5 GB or similar). Operational configuration is 4 ranks - 2× 2 GB
dual rank modules or 4× 1 GB single rank modules - depends on number of motherboard DDR2 slots.

Summary:

946PL (Lakeport)

Update on 945PL, supports 4 GB of memory.


946GZ (Lakeport-G)

A version of 946PL with GMA 3000 graphics core.


P965 (Broadwater)

Update on 945P, no native PATA support, improved memory controller with support for DDR2 memory up to 800 MHz and official Core 2 Duo support.
G965 (BroadwaterG)

A version of P965 that has a GMA X3000 integrated graphics core.


Q965 (Broadwater)

Expected G965 intended for Intel's vPro office computing brand, with GMA 3000 graphics instead of GMA X3000 graphics. Supports an ADD2 card to add a second
display.
Sub-versions:

Q963 - Q965 without an external graphics interface or support for ADD2.


975X (Glenwood)

Update of 955, with support for ATI Crossfire Dual Graphics systems and 65 nm processors, including Core 2 Duo.
P35 (Bearlake)

The P35 chipset provides updated support for the new Core 2 Duo E6550, E6750, E6800, and E6850. Processors with a number ending in "50" have a 1333 MT/s FSB.
Support for all NetBurst based processors is dropped with this chipset.[38]
G33 (BearlakeG)

A version of P35 with a GMA 3100 integrated graphics core and uses an ICH9 South Bridge.
Sub-versions:

G35 - G33 with a GMA x3500 integrated graphics core and uses an ICH8 South Bridge, no DDR3 support.
Q35 (BearlakeG)

Expected G33 intended for Intel's vPro office computing brand, no DDR3 Support.
Sub-versions:

Q33 - Q35 without vPro support.


P31 (BearlakeG)

A version of P35 with an ICH7 South Bridge, supports only 4 GB of DDR2 memory and does not support DDR3 memory.
Operational configuration is 4 ranks - 2× 2 GB dual rank modules or 4 × 1 GB single rank modules - depends on number of motherboard DDR2 slots. 4GBs modules are
not supported.
G31 (BearlakeG)

A version of P31 with a GMA 3100 integrated graphics core. It supports a 1333 MT/s FSB with Core 2 Duo processors, but Core 2 Quad processors are only supported up
to 1066 MT/s.[48]
G41 (EaglelakeG)

Update of G31 with a GMA X4500 integrated graphics core and DDR3 800/1066 support.
P45 (Eaglelake)

Update of P35, with PCIe 2.0 support, Hardware Virtualization, Extreme Memory Profile (XMP) and support for ATI Crossfire (x8+x8).
Sub-versions:

P43 - P45 without Crossfire and DDR2-1066/DDR3-1333 support.


G45 (EaglelakeG)
A version of P45 that has a GMA X4500HD integrated graphics core and lacks Crossfire support.
Sub-versions:

G43 - Same feature reductions as P43, but with a GMA X4500 integrated graphics core.
Q45 (EaglelakeQ)

Expected G43 intended for Intel's vPro office computing brand. Also supports Hardware Virtualization Technology and Intel Trusted Platform Module 1.2 feature.
Sub-versions:

Q43 - Q45 without vPro support. Also lacks Intel Trusted Platform Module 1.2 support.
B43 - Q43 with an ICH10D South Bridge.
[1] The 975X chipset supports only ×16 PCI Express (electrically) in the top slot when the slot below it is unpopulated. Otherwise it and the lower slot (both attached to the Memory Controller
Hub) operate at ×8 electrically.

[2] Officially 975X supports a maximum of 1066 MT/s FSB. Unofficially, third-party motherboards (Asus, Gigabyte) support certain 1333FSB 45 nm Core2 processors, usually with later BIOS
updates.

[3] The 975X chipset technical specification shows only DDR2-533/667 memory support. Actual implementations of 975X do support DDR2 800.

[4] VT-d is inherently supported on these chipsets, but may not be enabled by individual OEMs. Always read the motherboard manual and check for BIOS updates. X38/X48 VT-d support is limited
to certain Intel, Supermicro, DFI (LanParty) and Tyan boards. VT-d is broken or non existent on some boards until the BIOS is updated. Note that VT-d is a chipset Memory Controller Hub
technology, not a processor feature, but this is complicated by later processor generations (Core i3/i5/i7) moving the MCH from the motherboard to the processor package, making only certain I
series CPUs support VT-d.

Core 2 mobile chipsets

Processors Memory Graphics


Code Part South Release TDP
Chipset Lithography supported FSB [MT/s] max. graphics 3D
name numbers bridge date types. [W]
(official) [GB] core Render
GL960 (h
ttps://ar
Celeron M,
k.intel.co 82960GL Max.
Pentium 533 3/51
m/produ (GMCH) 400 MHz
Dual-Core
cts/2983
0) Integrated
GMA 13.5
GM965 X3100
(https://a
rk.intel.c 82965GM ICH8- May DDR2 Max.
Crestline ?? nm
om/prod (GMCH) M 2007 533/667 500 MHz
ucts/298
21)
Core 2 Duo 533/667/800 4/82
PM965 (h
ttps://ar
k.intel.co 82965PM
PCIe ×16 8
m/produ (MCH)
cts/2982
2)
GL40 (htt Core 2 Duo,
ps://ark.i Celeron,
82GL40
ntel.com/ Celeron M, 8
(GMCH)
product Pentium
s/35501) Dual-Core
Max.
GS40 (ht 667/800 12
Core 2 Duo, 400 MHz
tps://ark.
Celeron,
intel.co 82GS40
Celeron M?, 4
m/produ (GMCH)
Pentium
cts/4179
Dual-Core
4) Integrated
GS45 (ht GMA
Core 2 Solo, X4500HD
tps://ark. 82GS45
Core 2 Duo, DDR2
intel.co (GMCH)
ICH9- Sep Core 2 800/1066 667/800, 7/8/123
m/produ Cantiga (For 65 nm
M 2008 Extreme, DDR3
cts/3550 CULV)
Celeron M 800/1066
5) Max.
GM45 (ht 533 MHz
tps://ark. Core 2 Duo,
intel.co 82GM45 Core 2
8 12
m/produ (GMCH) Extreme,
cts/3513 Celeron M
4)
667/800/1066
PM45 (ht
tps://ark.
Core 2 Duo,
intel.co 82PM45
Core 2 PCIe ×16 7
m/produ (MCH)
Extreme
cts/3513
5)

1 Unofficially this chipset support 5GB.


2 Officially only 4GB is supported. Unofficially many laptops with this chipset support 8GB.
3 Low power mode, HD playback mode and Full performance mode respectively.
Southbridge 9xx and 3/4 Series chipsets

Part Serial ATA USB TDP


Chipset Parallel ATA AHCI Support RAID Levels
Number 3.0Gbit/s 1.5Gbit/s v2.0 [W]

ICH6-M 82801FBM 2 ports Yes None 4 ports


ICH6 82801FB No None 8 ports 3.8
N/A 4 ports
ICH6R 82801FR Yes 0, 1, Matrix 8 ports
ICH7-M 82801GBM 2 ports No
Yes 4 ports
ICH7-M DH 82801GHM 0, 1, Matrix
UDMA 100/66/33
ICH7 82801GB No None 3.3
4 ports
ICH7DH 82801GDH 0, 1, Matrix 8 ports
Yes
ICH7R 82801GR 0, 1, 5, 10, Matrix
ICH8M 82801HM None
3 ports 2.4
ICH8M-E 82801HEM 0, 1, Matrix
ICH8 82801HB 4 ports None
10 ports
ICH8R 82801HR 0, 1, 5, 10, Matrix
3.7
ICH8DH 82801HH 6 ports
ICH8DO 82801HO
N/A
ICH9M 82801IBM None
8 ports 2.5
ICH9M-E 82801IEM 4 ports 0, 1, Matrix
ICH9 82801IB None
No
ICH9R 82801IR
4.3
ICH9DH 82801IH 0, 1, 5, 10, Matrix
ICH9DO 82801IO
12 ports
ICH10 82801JB 6 ports
None
ICH10D 82801JH
4.5
ICH10R 82801JR
0, 1, 5, 10, Matrix
ICH10DO 82801JO

5/6/7/8/9 Series chipsets


The Nehalem microarchitecture moves the memory controller into the processor. For high-end Nehalem processors, the X58 IOH acts as a bridge from the QPI to PCI Express peripherals and DMI
to the ICH10 southbridge. For mainstream and lower-end Nehalem processors, the integrated memory controller (IMC) is an entire northbridge (some even having GPUs), and the PCH (Platform
Controller Hub) acts as a southbridge.

Not listed below is the 3450 chipset (see Xeon chipsets) which is compatible with Nehalem mainstream and high-end processors but does not claim core iX-compatibility. With either a Core i5 or
i3 processor, the 3400-series chipsets enable the ECC functionality of unbuffered ECC memory.[49] Otherwise these chipsets do not enable unbuffered ECC functionality.

The Cougar Point Intel 6 series chipsets with stepping B2 were recalled due to a hardware bug that causes their 3 Gbit/s Serial ATA to degrade over time until they become unusable. Stepping B3
of the Intel 6 series chipsets will have the fix for this. The Z68 chipset which supports CPU overclocking and use of the integrated graphics does not have this hardware bug, however all other ones
with B2 did.[50] The Z68 also added support for transparently caching hard disk data on to solid-state drives (up to 64 GB), a technology called Smart Response Technology.[51]

LGA 1156
Chipsets supporting LGA 1156 CPUs (Lynnfield and Clarkdale).

Link PCI SATA USB


Code sSpec Release Bus FDI
Chipset Part numbers Express PCI TDP
Name Number Date Interface Speed[c] 3 Gbit/s v2.0 support
lanes
6 PCIe
H55 (https://ark.intel. Jan 12
SLGZX(B3) BD82H55 (PCH) 2.0 at Yes 5.2 W
com/products/42703) 2010 ports
2.5 GT/s
P55 (https://ark.intel.
com/products/42690/ SLH24 (B3), Sep
Ibex BD82P55 (PCH) No 4.7 W
Intel-P55-Express-Ch SLGWV (B2) 2009 DMI 2 GB/s Yes 6 ports
ipset) Peak 8 PCIe
14
2.0 at
H57 (https://ark.intel. ports
SLGZL(B3) BD82H57 (PCH) 2.5 GT/s 5.2 W
com/products/42700) Jan
Yes
Q57 (https://ark.intel. BD82Q57 2010
SLGZW(B3) 5.1 W
com/products/42706) (PCH)

LGA 1155
Chipsets supporting LGA 1155 CPUs (Sandy Bridge and Ivy Bridge). The PCIe 2.0 lanes from the PCH ran at 5 GT/s in this series, unlike in the previous LGA 1156 chips.[52]
Link PCI SATA USB
Code sSpec Part Release Bus FDI
Chipset Express PCI TDP
name number numbers date interface speed[c] 6 Gbit/s 3 Gbit/s v3.0 v2.0 support
lanes
H61 (ht
tps://ar
k.intel. SLH83(B2) BD82H61 February 6 PCIe
No None 4 ports 10 ports
com/pr SLJ4B(B3) (PCH) 20, 2011 2.0
oducts/
52806)1
B65 (ht
tps://ar
k.intel. SLH98(B2) BD82B65 February
12 ports Yes
com/pr SLJ4A(B3) (PCH) 25, 2011
oducts/
52801)1
Yes 1 port 5 ports
Q65 (ht
tps://ar
k.intel. SLH99(B2) BD82Q65
Q2 2011
com/pr SLJ4E(B3) (PCH)
oducts/
52811)1
P67 (htt
ps://ar SLH84(B2)
k.intel. Cougar (Recalled) BD82P67
None No 6.1 W
com/pr Point SLJ4C (PCH)
oducts/ (B3)
52810)1 January
No
H67 (ht 9, 2011
tps://ar SLH82(B2)
k.intel. (Recalled) BD82H67
14 ports
com/pr SLJ49 (PCH)
oducts/ (B3)
52807)1
2 ports 4 ports
Q67 (ht
tps://ar
k.intel. SLH85(B2) BD82Q67 February
Yes
com/pr SLJ4D(B3) (PCH) 20, 2011
oducts/
52812)1
Z68 (htt
ps://ar
k.intel. BD82Z68 May 11,
SLJ4F(B3) DMI 2.0 4 GB/s No
com/pr (PCH) 2011
oducts/
52816)1 8 PCIe
B75 (ht 2.0
tps://ar
k.intel. BD82B75
SLJ85(C1) 8 ports
com/pr (PCH)
oducts/
64030)2 May 13,
Yes 1 port 5 ports
Q75 (ht 2012
tps://ar
k.intel. BD82Q75
SLJ84(C1) Yes
com/pr (PCH)
oducts/
64033)2
Z75 (htt
ps://ar
k.intel. BD82Z75
SLJ87(C1)
com/pr (PCH)
oducts/
64021)2 Panther April 8,
No 4 ports 6.7 W
H77 (ht Point 2012
tps://ar
k.intel. BD82H77
SLJ88(C1) 10 ports
com/pr (PCH)
oducts/
64018)2
2 ports 4 ports
Q77 (ht
tps://ar
k.intel. BD82Q77 May 13,
SLJ83(C1) Yes
com/pr (PCH) 2012
oducts/
64027)2
Z77 (htt
ps://ar
k.intel. BD82Z77 April 8,
SLJC7(C1) No
com/pr (PCH) 2012
oducts/
64024)2

1 For Sandy Bridge mainstream desktop and business platforms. Sandy Bridge CPUs provide 16 PCIe 2.0 lanes for direct GPU connectivity.
2 For Ivy Bridge mainstream desktop platform. Ivy Bridge CPUs provide 16 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes.[53]

LGA 1150
Chipsets that support LGA 1150 CPUs are listed below. Haswell and Haswell Refresh CPUs are supported by all listed chipsets; however, a BIOS update is usually required for 8-Series Lynx Point
motherboards to support Haswell Refresh CPUs.[54] Broadwell CPUs are supported only by 9-Series chipsets, which are usually referred to as Wildcat Point.[55]

The C1 stepping of the Lynx Point chipset contains a bug – a system could lose connectivity with USB devices plugged into USB 3.0 ports provided by the chipset if the system enters the S3 sleep
mode.[56]

Link PCI Intel SATA USB


Code sSpec Part Release Bus FDI
Chipset Express VT-d PCI
name number numbers date Interface Speed[c] 6 Gbit/s 3 Gbit/s v3.0 v2.0 suppor
lanes support
H81 (ht
tps://ar
k.intel. SR13B(C1) DH82H81 6 PCIe
2 ports 2 ports
com/pr SR177(C2) (PCH) 2.0
oducts/
75016)
B85 (ht
tps://ar
k.intel. SR13C(C1) DH82B85
No 2 ports 4 ports
com/pr SR178(C2) (PCH)
oducts/
75019)
4 ports
Q85 (ht
tps://ar
k.intel. SR138(C1) DH82Q85
com/pr SR174(C2) (PCH)
oducts/
75010) Lynx June
Q87 (ht Point 2013
tps://ar
SR137(C1)
k.intel. DH82Q87
SR173(C2) Yes
com/pr (PCH)
SR19E(C2)
oducts/
75007)
DMI 2.0 4 GB/s No 8 ports Yes
H87 (ht
tps://ar
k.intel. SR139(C1) DH82H87 8 PCIe
com/pr SR175(C2) (PCH) 2.0
oducts/
75004)
6 ports
Z87 (htt
ps://ar
k.intel. SR13A(C1) DH82Z87
6 ports None
com/pr SR176(C2) (PCH)
oducts/
75013)
No
Z97 (htt
ps://ar
k.intel. DH82Z97
SR1JJ(A0)
com/pr (PCH)
oducts/
82012) Wildcat May
H97 (ht Point 2014
tps://ar
k.intel. DH82H97
SR1JK(A0)
com/pr (PCH)
oducts/
82010)

LGA 1366, LGA 2011, and LGA 2011-v3


Single socket chipsets supporting LGA 1366, LGA 2011, and LGA 2011-v3 CPUs. Please consult List of Intel Xeon chipsets for further, multi-socket, chipsets for these sockets.
Link PCI Intel SATA
Code sSpec Release Bus
Chipset Part numbers Socket Express VT-d PCI
Name Number Date Interface Speed[c] 6 Gbit/s 3 Gbit/s v3.0
lanes support
X58 (htt
ps://ar
k.intel. 36 PCIe
SLGBT
com/pr 2.0 at 5
(B2),
oducts/ GT/s
SLGMX November LGA Up to
36785/I Tylersburg AC82X58 (IOH) QPI (IOH); Yes None 6 ports
(B3), 2008 1366 12.8 GB/s
ntel-X5 6 PCIe
SLH3M
8-Expre 1.1
(C2)
ss-IO-H (ICH)
ub) (I/O
hub)1 Non
X79 (htt
ps://ar
k.intel.
com/pr SLJHW
Yes
oducts/ (C0),[57] November LGA
64015/I
Patsburg
SLJN7 BD82X79 (PCH)[59] 14, 2011 2011
2 ports 4 ports
ntel-X7 (C1)[58]
9-Expre
ss-Chip
set)3 8 PCIe
DMI 2.0 4 GB/s No
2.0
X99 (htt
ps://ar
k.intel.
SLKDE
com/pr LGA
(B1), DH82031PCH August 6
oducts/ Wellsburg 2011- 10 ports None
SLKM9 (PCH) 29, 2014 ports
81761/I v3
(B1)
ntel-X9
9-Chips
et)4

1 X58 South Bridge is ICH10/ICH10R.


2 X58 TDP includes the X58 IOH TDP in addition to the ICH10/ICH10R TDP.
3For Sandy Bridge enthusiast desktop platform. Sandy Bridge CPUs will provide up to 40 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes. NOTE :
This reference number 4 is on X79, which is a Sandy bridge -E, not Sandy Bridge, and PCIe 3.0 only is enabled when an Ivy Bridge-E CPU or Xeon E-5 series is used.
4 For Haswell enthusiast desktop platform. Haswell CPUs will provide up to 40 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes.

Mobile chipsets
All Core-i series mobile chipsets have an integrated south bridge.
Link PCI Intel SATA USB
Code sSpec Part Release Process Bus
Chipset Express VT-d
Name Number numbers Date support Interface Speed[c] 6 Gbit/s 3 Gbit/s v3.0 v2.0
lanes support
PM55
(https://
ark.inte SLGWN(B2),
BD82PM55 September 8 PCIe 14
l.com/p SLH23(B3), 6 ports
(PCH) 2009 2.0 ports
roduct SLGWP
s/4269
4)
HM55
(https://
ark.inte
BD82HM55 6 PCIe 12
l.com/p SLGZS(B3) 4 ports
(PCH) 2.0 ports
roduct
s/4318
3)
HM57
(https://
ark.inte
Ibex BD82HM57 45 nm,
l.com/p SLGZR(B3) DMI 2 GB/s Yes None
Peak-M (PCH) 32 nm
roduct
s/4317
9) January
QM57 2010
(https://
ark.inte
BD82QM57 8 PCIe 14
l.com/p SLGZQ(B3) 6 ports
(PCH) 2.0 ports
roduct
s/4318
7)
QS57
(https://
ark.inte
BD82QS57
l.com/p SLGZV(B3)
(PCH)
roduct
s/4758
0)
HM65 DMI 2.0 4 GB/s
None
(https://
ark.inte SLH9D(B2)
BD82HM65 12
l.com/p (Recalled)
(PCH) ports
roduct SLJ4P(B3)
s/5280
8) January 9,
HM67 2011
(https://
ark.inte SLH9C(B2)
BD82HM67
l.com/p (Recalled) No
(PCH)
roduct SLJ4N(B3)
s/5280
9)
UM67
(https://
ark.inte
Cougar SLH9U(B2) BD82UM67 8 PCIe
l.com/p 32 nm 2 ports 4 ports
Point-M SLJ4L(B3) (PCH) 2.0
roduct
s/5281
5) 14
QM67 ports
(https://
ark.inte
SLH9B(B2) BD82QM67 February
l.com/p
SLJ4M(B3) (PCH) 20, 2011
roduct
s/5281
3)
Yes
QS67
(https://
ark.inte
SLHAG(B2) BD82QS67
l.com/p
SLJ4K(B3) (PCH)
roduct
s/5281
4)
Panther BD82NM70 August 22 nm 4 PCIe 8
NM70 SLJTA(C1) ? 3 ports
Point-M (PCH) 2012 2.0 ports
HM70 April 8, 8 PCIe No 4 ports
(https:// 2012 2.0
ark.inte 1 port
BD82HM70 4 6
l.com/p SJTNV(C1)
(PCH) ports ports
roduct
s/6741
9)
HM75 SLJ8F(C1) BD82HM75 2 ports None 12
(https:// (PCH) ports
ark.inte
l.com/p
roduct
s/6434
8)
HM76
(https://
ark.inte
BD82HM76 8
l.com/p SLJ8E(C1)
(PCH) ports
roduct
s/6434
5)
UM77
(https://
ark.inte
BD82UM77 4 PCIe 6
l.com/p SLJ8D(C1) 1 port 3 ports
(PCH) 2.0 ports
roduct
s/6434
2)
HM77
(https://
ark.inte
BD82HM77 4
l.com/p SLJ8C(C1)
(PCH) ports
roduct
s/6433
9)
QM77
(https://
ark.inte
BD82QM77
l.com/p SLJ8A(C1) 2 ports 4 ports
(PCH)
roduct
s/6433
3) 10
QS77 ports
(https://
ark.inte
BD82QS77
l.com/p SLJ8B(C1)
(PCH)
roduct
s/6433
6)
HM86 8 PCIe
(https:// 2.0
ark.inte
SR13J(C1) DH82HM86 5
l.com/p Yes
SR17E(C2) (PCH) ports
roduct
s/7553
1)
QM87
(https://
ark.inte
Lynx SR13G(C1) DH82QM87 8
l.com/p June 2013
Point-M SR17C(C2) (PCH) ports
roduct 4 ports 2 ports
s/7552
5)
HM87 6
(https:// ports
ark.inte
SR13H(C1) DH82HM87
l.com/p
SR17D(C2) (PCH) 10
roduct
s/7552 ports
8)
Wildcat DH82HM97
HM97 SR1JN(A0) May 2014 ?
Point-M (PCH)

100/200/300 Series chipsets


All support Intel VT-d and do not support PCI.

LGA 1151 rev 1


The 100 Series chipsets (codenamed Sunrise Point), for Skylake processors using the LGA 1151 socket,[60] were released in the third quarter of 2015.[61]

The 200 Series chipsets (codenamed Union Point) were introduced along with Kaby Lake processors, which also use the LGA 1151 socket;[62] these were released in the first quarter of 2017.[63]
Intel SATA USB ports
PCI
Code sSpec Part Release Bus Link Optane PCIe v3.1 v3.1
Chipset Express SATAe T
Name Number numbers Date Interface Speed[c] lanes
Memory 6 Gbit/s M.2 Gen Gen Total
support 1 2
H110 (h
ttps://ar
k.intel. SR2CA(D1) GL82H110 Sep. 27, 6 PCIe Up Up
DMI 2.0 4.0 GB/s 4 None
com/pr SR286 (PCH) 2015 2.0 to 4 to 10
oducts/
90590)
B150 (h
ttps://ar
k.intel. SR2C7(D1) GL82B150 Sep. 1, 8 PCIe Up Up
None
com/pr SR283 (PCH) 2015 3.0 to 6 to 12
oducts/
90592) Up to
Q150 (h 1
ttps://ar
k.intel. SR2C6(D1) GL82Q150 10 PCIe
H2 2015
com/pr SR282 (PCH) 3.0
oducts/
90588) Sunrise Up
No
H170 (h Point to 8
ttps://ar
k.intel. SR2C8(D1) GL82H170 Sep. 1, 16 PCIe Up to Up to
com/pr SR284 (PCH) 2015 3.0 2 2
oducts/
90595) Up
Q170 (h to 14
ttps://ar
k.intel. SR2C5(D1) GL82Q170 Oct.
com/pr SR281 (PCH) 2015
oducts/
90587) Up
20 PCIe Up to Up to
to
Z170 (h 3.0 3 3
10
ttps://ar
k.intel. SR2C9(D1) GL82Z170 Aug.
None 6
com/pr SR285 (PCH) 2015
oducts/
90591)
DMI 3.0 7.9 GB/s 6
B250 (h
ttps://ar
k.intel. 12 PCIe Up Up
SR2WC(A0) GL82B250
com/pr 3.0 to 6 to 12
oducts/
98086/) Up to Up to
Q250 (h 1 1
ttps://ar
k.intel. 14 PCIe
SR2WD(A0) GL82Q250
com/pr 3.0
oducts/
98084/) Up
H270 (h to 8
ttps://ar
k.intel. Union Jan. 3, 20 PCIe Up to Up to
SR2WA(A0) GL82H270 Yes
com/pr Point 2017 3.0 2 2
oducts/
98090/) Up
Q270 (h to 14
ttps://ar
k.intel.
SR2WE(A0) GL82Q270
com/pr
oducts/
98088/) Up
24 PCIe Up to Up to
to
Z270 (h 3.0 3 3
10
ttp://ar
k.intel.
SR2WB(A0) GL82Z270
com/pr
oducts/
98089/)

LGA 1151 rev 2


While Coffee Lake shares the same socket as Skylake and Kaby Lake, this revision of LGA 1151 is electrically incompatible with 100 and 200 series CPUs.

The 300 Series chipsets were introduced along with Coffee Lake processors, which use the LGA 1151 socket; the enthusiast model was released in the last quarter of 2017,[64] the rest of the line
will be released in 2018.[65]
Intel SATA USB ports
PCI
Code sSpec Part Release Bus Link Optane PCIe v3.1 v3.1
Chipset Express SATAe T
Name Number numbers Date Interface Speed[c] lanes
Memory 6 Gbit/s M.2 Gen Gen Total
support 1 2
Z370 (h
ttps://ar
up
k.intel. October 24 PCIe up to Up
SR3MD(A0) GL82Z370 DMI 3.0 7.9 GB/s Yes 6 up to 3 to
com/pr 5, 2017 3.0 3 to 14
10
oducts/
125903)
None
H310 (h
ttps://ar
SR409(B0)
k.intel. Cannon 6 PCIe Up Up
SRCXT(B0) DMI 2.0 4.0 GB/s No 4 None None
com/pr Point 2.0 to 4 to 10
SRCXY(B0)
oducts/
133348) April 3,
B360 (h 2018
ttps://ar
k.intel. 12 PCIe Up to Up to Up Up to Up
SR408(B0)
com/pr 3.0 1 1 to 6 4 to 12
oducts/
133332)
B365 (h
ttps://ar
k.intel. Union Dec. 14,
SREVJ(A0) ? None
com/pr Point 2018 6
oducts/
189763) 20 PCIe Up to Up to Up
H370 (h 3.0 2 2 to 8
ttps://ar
k.intel. April 3, Up to
SR405(B0)
com/pr 2018 DMI 3.0 7.9 GB/s Yes 6 4
oducts/
133284)
Up
Q370 (h to 14
ttps://ar
k.intel.
Cannon SR404(B0) Q2 2018
com/pr
Point
oducts/
133282) Up
24 PCIe Up to Up to Up to
Z390 (h to
3.0 3 3 6
ttps://ar 10
k.intel.
October
com/pr SR406(B0) FH82Z390
8, 2018
oducts/
13329
3/)

Xeon chipsets
Chipset C232 does not support CPU integrated GPUs.

Link PCI SATA USB ports


Code sSpec Part Release Bus PCIe
Chipset Express SATAe TDP
Name Number numbers Date Interface Speed[c] 6 Gbit/s M.2 v3.0 v2.0
lanes
C232 (https://ark.in
tel.com/products/9 GL82C232 8 PCIe Up
SR2CB(D1) 6 6
0578/Intel-GL82C2 (PCH) 3.0 to 6
32-PCH) Sunrise September Up to Up
C236 (https://ark.in Point 1, 2015 3 to 3
Up
tel.com/products/9 GL82C236 20 PCIe
SR2CC(D1) 8 to 4
0594/Intel-GL82C2 (PCH) 3.0
10
36-PCH)
DMI 3.0 7.9 GB/s 6W
C242 (https://ark.in
tel.com/products/1 November 10 PCIe
? SR40C(B0) FH82C242 6 ? ? ? ?
47324/Intel-C242-C 2018 3.0
hipset)
C246 (https://ark.in
tel.com/products/1 24 PCIe
? SR40A(B0) FH82C246 July 2018 8 ? ? ? ?
47326/Intel-C246-C 3.0
hipset)

LGA 2066
Chipsets supporting LGA 2066 socket for Skylake-X processors and Kaby Lake-X processors.

The C621 Chipset also supports FCLGA3647 socket for Skylake-SP as well as Cascade Lake-W and Cascade Lake-SP processors.
Link PCI SATA USB ports
Code sSpec Part Release Bus PCIe
Chipset Express SATAe TDP
Name Number numbers Date Interface Speed[c] 6 Gbit/s M.2 v3.0 v2.0
lanes
X299 (https://ark.
Basin May 30,
intel.com/produc SR2Z2(A0) GL82X299 ? ? 6W
Falls 2017
ts/122941)
24 PCIe
C422 (https://ark. DMI 3.0 7.9 GB/s Up to 8
3.0
intel.com/produc Kaby
SR2WG(A0) GL82C422 ? ? 6W
ts/126691/Intel-C Lake
422-Chipset)
C621 (https://ark. SR36S(B1)
intel.com/produc SR354(S0) 15
EY82C621x ? ? ?
ts/97338/Intel-C6 SR3HE(B2) W
21-Chipset) SR3HL(S1)
C622 (https://ark.
intel.com/produc SR36X(S0) 17
EY82C622 ? ? ?
ts/97340/Intel-C6 SR3HK(S1) W
22-Chipset)
C624 (https://ark.
intel.com/produc SR36Y(S0) Up Up 19
EY82C624 ? ? ?
ts/97341/Intel-C6 SR3HM(S1) to to W
24-Chipset) July 11, 10 14
C625 (https://ark. 2017
intel.com/produc SR36W(B1) 20 PCIe Up to 21
Lewisburg EY82C625 UPI ? ? ?
ts/97342/Intel-C6 SR3HJ(B2) 3.0 14 W
25-Chipset)
C626 (https://ark.
intel.com/produc SR36V(B1) 23
EY82C626 ? ? ?
ts/97339/Intel-C6 SR3HH(B2) W
26-Chipset)
C627 (https://ark.
intel.com/produc SR36U(B1) 28.6
EY82C627 ? ? ?
ts/97343/Intel-C6 SR3HG(B2) W
27-Chipset)
C628 (https://ark.
intel.com/produc SR36T(B1) 26.3
EY82C628 ? ? ?
ts/97337/Intel-C6 SR3HF(B2) W
28-Chipset)

Mobile chipsets
SATA USB ports
Link PCI
Code sSpec Part Release Bus PCIe v3.1
Chipset Express 6 Gbit/s SATAe TDP
Name Number numbers Date Interface Speed[c] M.2 v2.0
lanes ports Gen Gen
1 2
HM170
(http://a
rk.intel. SR2C4(D1) GL82HM170
com/pro SR27Z (PCH)
ducts/9
0584) 16 PCIe Up Up
Up to 4 2.6 W
QM170 3.0 to 2 to 8
(http://a
rk.intel. SR2C3(D1) GL82QM170 September
com/pro SR27Y (PCH) 1, 2015
ducts/9
0583)
CM236
(http://a
Up
rk.intel. GL82CM236 20 PCIe Up
SR2CE(D1) Up to 8 to 3.67 W
com/pro (PCH) 3.0 to 3
10
ducts/9
0593)
GLQMS180
QMS180 Skylake SR2NH(D1) ? ? ? ? ? None ?
(PCH)
HM175
(http://a
rk.intel. GL82HM175
SR30W(D1)
com/pro (PCH)
ducts/9
8085) 16 PCIe Up Up
Up to 4 2.6 W
QM175 3.0 to 2 to 8
Up
(http://a DMI 3.0 7.9 GB/s ? to
rk.intel. GL82QM175 January 3, 14
SR30V(D1)
com/pro (PCH) 2017
ducts/9
8083)
CM238
(http://a
Up
rk.intel. GL82CM238 20 PCIe Up
SR30U(D1) Up to 8 to 3.67 W
com/pro (PCH) 3.0 to 3
10
ducts/9
8087)
HM370
(https://
ark.inte FH82HM370 16 PCIe Up Up to
SR40B(B0)
l.com/pr (PCH) 3.0 to 8 4
oducts/
135101) Up
Up to 4
QM370 to 2
(https://
ark.inte Coffee FH82QM370 20 PCIe
SR40D(B0) Q2 2018 3W
l.com/pr Lake (PCH) 3.0
oducts/
135102) Up
Up to
to
CM246 6
10
(https://
ark.inte 24 PCIe
SR40E(B0) FH82CM246 Up to 8 ?
l.com/pr 3.0
oducts/
135100)

See also
Acer Laboratories Incorporated – for ALi chipsets Intel Xeon chipsets
Chips and Technologies List of Intel microprocessors
List of AMD chipsets Silicon Integrated Systems – for SiS motherboard chipsets
List of ATI chipsets VIA chipsets
Comparison of Nvidia nForce chipsets

Notes
a. The Pentium Pro, Pentium II/III, and the Celerons based on them are essentially the same design with minor internal revisions and varying cache designs. Because of this,
the same chipset can be used for Socket 8, Socket 370, Slot 1, or Slot 2 designs with any CPU in the P6 family. In practice however, newer chipset designs are usually made
only for the newer processor packages, and older ones may not be updated to accommodate for recent package designs. In addition, certain chipsets may be implemented in
motherboards with different processor packages, much like how the 440FX could be used either with a Pentium Pro (Socket 8) or Pentium II (Slot 1). A new feature for the
latest Intel chipsets is hardware virtualization support (Intel VT-d).[24] The chipset support for this technology is not very clear for the moment.[25]
b. The Intel 82943GML mobile chipset unofficially supports Core Duo, Core 2 Duo, and Pentium Dual Core processors as well as 667 MHz FSB, which is a popular upgrade for
many older notebook computers such as certain models of Acer Aspire 3680.
c. Aggregated speed for both directions
References
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1. Michael H. Tooley (2005). PC Based Instrumentation and Control. Elsevier. p. 32.
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ISBN 9780750647168.
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21. System RAM Cacheability (http://www.pcguide.com/ref/mbsys/cache/charCacheabi
Internet Archive. Archived (https://web.archive.org/web/20160703235950/https://ar
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B4%E4%BF%AE/%E4%B8%BB%E6%9D%BF%E7%BB%B4%E4%BF%AE%E
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8%A7%86%E9%A2%91/%E4%B8%BB%E6%9D%BF%E8%A7%86%E9%A2%91
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(https://web.archive.org/web/20170227013930/https://books.google.com/books?id= 6%E7%BB%B4%E4%BF%AE/%E4%B8%BB%E6%9D%BF%E7%BB%B4%E4%B
wTsEAAAAMBAJ) from the original on February 27, 2017. Retrieved October 15, F%AE%E8%A7%86%E9%A2%91/%E4%B8%BB%E6%9D%BF%E8%A7%86%E
2016. 9%A2%918DVD%E4%B9%8B01%E7%BB%B4%E4%BF%AE%E8%B5%84%E
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1988. Missing or empty |url= (help) 7%E7%BB%B4%E4%BF%AEVCD7-%E4%B8%BB%E6%9D%BF%E7%94%B5%
E8%B7%AF%E7%9B%981/INTEL%E8%8A%AF%E7%89%87%E7%BB%84%E
11. Copeland, Ron (April 17, 1989). "Intel Adds Low-Power 386SX To List of Chip
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InfoWorld. p. 105. Archived (https://web.archive.org/web/20140627030632/http://bo
oks.google.com/books?id=CDoEAAAAMBAJ) from the original on June 27, 2014. 27. "BX_DS_10.book" (http://www.o3one.org/hwdocs/p2manuals/440BX_82443BX_29
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www.o3one.org/hwdocs/p2manuals/440BX_82443BX_29063301.pdf) (PDF) from
12. Copeland, Ron (January 8, 1990). "Intel to Market VLSI Topcat Chips" (https://book
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rchive.org/web/20140627030754/http://books.google.com/books?id=dzAEAAAAM 28. "Intel 82845G/82845GL/82845GV GMCH Thermal and Mechanical Design
BAJ) from the original on June 27, 2014. Retrieved October 15, 2016. Guidelines" (https://web.archive.org/web/20160304062219/http://download.intel.co
m/design/chipsets/designex/29865502.pdf) (PDF). Archived from the original (http
13. Krohn, Nico (October 15, 1990). "Intel to Introduce 20-MHz Chip Set" (https://book
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External links
Search MDDS Database (https://qdms.intel.com/MDDS/MDDSView.aspx)
Intel Processors and Chipsets by Platform Code Name (https://www.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/platform-codename
s.html)
Intel Product Comparison Charts (https://web.archive.org/web/20081123092802/http://compare.intel.com/)
Intel ARK (https://ark.intel.com/content/www/us/en/ark.html)

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