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CHAPTER 3

BASIC INPUT/OUTPUT
3.1 ACCESSING I/O DEVICES
 Components of computer – communicate through interconnection network
 Interconnection network consists of – circuits – to transfer information between
the processor, the memory unit and a number of I/O devices.
 Chapter 2 – discuss – address space
 How processor access memory locations within the address space.
 Load and Store instructions use addressing modes – generate effective address –
identify the desired location.
 Same idea can be extended to deal with I/O devices.
 Each I/O device must appear to the processor – consisting some addressable
locations same as the memory
 Addresses from processor address space assigned to these I/O locations rather
than main memory
 These locations – implemented as bit storage circuits (flip-flop) organized in the
form of registers
 Referred as I/O registers
 I/O devices and memory share same address space – arrangement – memory-
mapped I/O
 Used in most computers
 Same instructions that are used to access the memory can be used to transfer
data to or from an I/O device.
 E.g. DATAIN – address of register in an input device
Instruction  Load R2, DATAIN
reads the data from the DATAIN register and loads them into processor register
R2.
 E.g. DATAOUT – address of register in an output device
Instruction  Store R2, DATAOUT
sends the contents of register R2 to location DATAOUT
 3.1.1 I/O DEVICE INTERFACE
 I/O device – connected to the interconnection – using circuit called device interface
 Provides the means for data transfer and for the exchange of status and control
information needed to facilitate the data transfers and govern the operation of the
device.
 Interface includes some registers – accessed by the processor.
 One register may serve as a buffer for data transfers, another may hold the
information about the current status of the device, and yet another may store the
information that controls the operation behavior of the device.
 These data, status and control registers are accessed by program instructions as if
they were memory locations.
 Typical transfers of information are between I/O registers and the registers in the
processor.

 3.1.2 PROGRAM-CONTROLLED I/O


 Two essential I/O devices for human-computer interaction – keyboard and
display.
 Consider a task – reads characters typed in keyboard, stores the data in the
memory and displays the same characters on a display screen.
 To implement this task – write a program that performs the functions needed to
realize the desired actions.
 This method is known as program-controlled I/O.
 Reading and writing the character and then display must happen at the right
time.
 Input character must be read in response to a key being pressed.
 Character must be send to display inly when the display device is able to accept
it.
 Rate of data transfer from the keyboard to a computer is limited by the use typing
speed – exceeds few characters per second.
 Rate of output transfer from the computer to display is much higher.
 Determined by the rate at which the characters can be transferred to and display
on the display device – several thousand characters per second.
 Processor speed – execute billions of instructions per second
 Because of this difference in the speed of processor and I/O device –
synchronization is required to perform the task.
 One solution is signaling protocol.
 When the processor reads the status flag to determine its state, we say that the
processor polls the I/O device.
 Desired action to perform read operation;
READWAIT Read the KIN flag
Branch to READWAIT if KIN = 0
Transfer data from KBD_DATA to R5
 Desired action to perform write operation;
WRITEWAIT Read the DOUT flag
Branch to WRITEWAIT if DOUT = 0
Transfer data from R5 to DISP_DATA
 Wait loop is executed repeatedly until the DOUT is set to 1 by the display when it
is free to receive a character.
 Assume initial state of KIN is 0 and DOUT is 1.
 Initialization is normally performed the computer is turned on.
 Computers use memory-mapped I/O – some addresses are used to refer to
registers in I/O interface – data can be transferred between these registers and
the processor using instructions such as Load, Store and Move.
 Keyboard KBD_DATA acts as the buffer where the contents of this buffer are
transferred to register R5.
LoadByte R5, KBD_DATA
 Similarly for Store instruction
StoreByte R5, DISP_DATA
 Read operation instructions;
READWAIT: LoadByte R4, KBD_STATUS
And R4, R4, #2
Branch_if_[R4]=0 READWAIT
LoadByte R5, KBD_DATA
 Write operation instructions;
WRITEWAIT: LoadByte R4, DISP_STATUS
And R4, R4, #4
Branch_if_[R4]=0 WRITEWAIT
StoreByte R5, DISP_DATA
 And instruction is used to test the KIN flag, which is bit b1 of the status
information in R4 that was read from the KBD_STATUS.
 As long as the b1=0, the result of the AND operation leaves the value of R4 equal
to zero and READWAIT loop continues to execute.
 3.1.3 RISC-style program that reads a line of characters and displays it.
 3.1.4 CISC – style program to read a line and display it.

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