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  • Acer Aspire E1-431 E1-431G E1-471G ZQSA - ZQTA MB - Reve Unlock PDF

    Transféré par

    Moh Ham
    175 vues44 pages
    This document provides a block diagram of the ZQTA/ZQSA CRV system. It shows the connections and components including the Intel Ivy Bridge processor, integrated graphics, discrete graphics, Optimus technology, display connections and ports. Key components illustrated are the CPU, integrated graphics, discrete graphics, VRAM, SATA ports, USB ports, display connections including eDP, HDMI, LVDS. It provides labels for the different GPU configurations including integrated graphics only, discrete graphics only, and Optimus.

    Description originale:

    Titre original

    Acer Aspire E1-431 E1-431G E1-471G ZQSA_ZQTA MB_revE unlock.pdf

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    This document provides a block diagram of the ZQTA/ZQSA CRV system. It shows the connections and components including the Intel Ivy Bridge processor, integrated graphics, discrete graphics, Optimus technology, display connections and ports. Key components illustrated are the CPU, integrated graphics, discrete graphics, VRAM, SATA ports, USB ports, display connections including eDP, HDMI, LVDS. It provides labels for the different GPU configurations including integrated graphics only, discrete graphics only, and Optimus.

    Droits d'auteur :

    © All Rights Reserved
    Téléchargez comme PDF, TXT ou lisez en ligne sur Scribd
    Signaler comme contenu inapproprié
    175 vues44 pages

    Acer Aspire E1-431 E1-431G E1-471G ZQSA - ZQTA MB - Reve Unlock PDF

    Transféré par

    Moh Ham
    This document provides a block diagram of the ZQTA/ZQSA CRV system. It shows the connections and components including the Intel Ivy Bridge processor, integrated graphics, discrete graphics, Optimus technology, display connections and ports. Key components illustrated are the CPU, integrated graphics, discrete graphics, VRAM, SATA ports, USB ports, display connections including eDP, HDMI, LVDS. It provides labels for the different GPU configurations including integrated graphics only, discrete graphics only, and Optimus.

    Droits d'auteur :

    © All Rights Reserved
    Téléchargez comme PDF, TXT ou lisez en ligne sur Scribd
    Signaler comme contenu inapproprié
    sur 44

    5 4 3 2 1

    BOM

    www.rosefix.com
    ZQTA/ZQSA CRV SYSTEM BLOCK DIAGRAM IV@ : iGPU
    EV@ : dGPU
    OP@ : Optimus
    DO@ : Discrete only
    SP@ : Special
    SNP@: N13PGS/GL
    IV@: UMA
    DIS._eDP
    D
    GL@: N13PGL D

    GS@: N13P/MGS

    eDP Con. INT._eDP eDP Optimus : IV@ + EV@ + OP@


    eDP
    P22 N13P-GS VRAM Discrete only : EV@ + DO@
    P20,P21
    IVY Bridge N13P-GL
    PEG N13M-GS
    Dual Channel DDR III rPGA 989 TX/RX
    DDRIII-SODIMM1 DIS._HDMI
    1066/1333/1600 MHZ IMC GFX GPU
    DDRIII-SODIMM2
    P13, 14 Display
    DIS._CRT
    P3, 4, 5, 6
    P15~P19
    DIS._LVDS
    FDI DMI Int. MIC
    DMI(x4) USB-8 LVDS/CCD/MIC
    Con. P22
    FDI DMI
    INT_LVDS

    CLK
    INT_CRT
    CRT Con. P22
    SATA 0 Display
    SATA - HDD
    C C
    P25
    SATA INT_HDMI
    HDMI Con. P23
    SATA - ODD SATA 1 USB3.0/2.0 USB3-2/USB2-1
    P25
    USB Charger USB3 Port
    P29 MB side P29
    Panther Point
    PCH
    SATA5
    SATA MINI-SSD
    USB-9
    USB Board USB2-1,3 P7, 8, 9, 10, 11, 12 P24
    Connector PCI-E x1 PCIE-8
    P31
    USB-10
    MINI CARD
    USB2-4 WLAN
    Bluetooth Con. USB2.0 X'TAL P25
    32.768KHz
    P31
    RJ45
    USB2-8 PCIE-3
    RTL8411 P28
    CCD(Camera) X'TAL 25MHz 10/100/1G
    P22
    Cardreader Cardreader
    P8 BATTERY RTC SPI SPI ROM CONN.
    P28 P29
    B P8 B
    Azalia IHDA
    CLK
    LPC

    EC
    Int. MIC ALC271X-VB6
    AUDIO CODEC P26 NPCE885L BQ24707A TPS51216 Discharger
    P32 Batery Charger P33 +1.5V_SUS P37 Thermal Protection
    P41
    RT8223P RT8241A
    3V/5V P33 VCCSA P38
    MIC JACK
    P27
    ISL95836 TPS51728
    HP Speaker CPU core/VAXG P35 VGPU Core P39
    P27 P27
    EM-6781-T3 Touch Pad Fan Driver
    K/B Con. HALL SENSOR Board Con. (PWM Type)
    TPS51219 MDV1660URH
    P31 P22 P31 P31 +1.05V_PCH / +1.05V_VTT +1.5V_GFX/1.05V_GFX/3V_GFX
    P36 P40

    A A

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    Block Diagram
    Date: Friday, February 03, 2012 Sheet 1 of 44
    5 4 3 2 1
    1 2 3 4 5 6 7 8

    www.rosefix.com
    VGA power up sequence

    +3V
    EC
    MOSFET +3V_GFX
    A A
    dGPU_RWR_EN

    VIN
    +VGACORE
    +1.05V
    PWM
    dGPU_VRON VGA_PG DGPU_PWROK
    MOSFET +1.05V_GFX
    MOSFET +1.5V_GFX
    +1.5VSUS
    VGA_VID

    VGA_PG

    MOSFET +1.8V_GFX
    B B
    +1.8V

    Power States
    CONTROL
    POWER PLANE VOLTAGE DESCRIPTION ACTIVE IN
    SIGNAL
    VIN +10V~+19V MAIN POWER ALWAYS ALWAYS

    +3V_RTC +3V~+3.3V RTC POWER ALWAYS ALWAYS

    +3VPCU +3.3V EC POWER ALWAYS ALWAYS


    Thermal Follow Chart
    +5VPCU +5V CHARGE POWER ALWAYS ALWAYS

    +15V +15V CHARGE PUMP POWER ALWAYS ALWAYS

    +3V_S5 +3.3V LAN/BT/CIR POWER S5_ON S0-S5 NTC


    Thermal
    C +5V_S5 +5V USB POWER S5_ON S0-S5 C
    Protection
    +5V +5V HDD/ODD/Codec/TP/CRT/HDMI POWER MAINON S0

    +3V +3.3V PCH/GPU/Peripheral component POWER MAINON S0

    +1.5VSUS +1.5V CPU/SODIMM CORE POWER SUSON S0-S3 CPU 3V/5 V


    H_PROCHOT# PM_THRMTRIP# SYS_SHDN#
    CORE PWR
    CPU WIRE-AND SYS PWR
    +0.75V_DDR_VTT +0.75V SODIMM Termination POWER MAINON S0 H/W Throttling

    +VGFX_AXG variation Internal GPU POWER VRON S0

    +1.8V +1.8V CPU/PCH/Braidwood POWER MAINON S0


    SML1ALERT#
    +1.5V +1.5V MINI CARD/NEW CARD POWER MAINON S0
    PCH FAN Driver FAN
    +1.05V +1.05V PCH CORE POWER/IVY/SNB bridge VCCIO MAINON S0

    +VCCSA +0.9V CPU POWER HWPG_VTT S0


    SM-Bus
    +VCC_CORE variation CPU CORE POWER VRON S0

    LCDVCC +3.3V LCD POWER LVDS_VDDEN S0


    EC
    MAINON S0 CPUFAN#
    D D

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    PWR Status & GPU PWR CRL & THRM
    Date: Friday, February 03, 2012 Sheet 2 of 44
    1 2 3 4 5 6 7 8
    5 4 3 2 1

    www.rosefix.com For Sandy Bridge processor only implementation:


    PROC_SELECT can be left NC. IVY Bridge Processor (CLK,MISC,JTAG) wo eDP and dGPU
    IVY Bridge Processor (DMI,PEG,FDI) For IVY/Sandy processor compatibility:
    Needs a pull-up resistor to PCH VccDFTERM rail (1.8V) through a 2.2 K±5% pull-up resistor.
    Connect DPLL_REF_SSCLK on Processor to GND through 1K ± 5% resistor.
    U16A Connect to the DF_TVS of PCH though a 1K±5% series resistor. U16B Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K ± 5% resistor
    J22 PEG_COMP
    PEG_ICOMPI
    PEG_ICOMPO J21
    7 DMI_TXN0 B27
    DMI_RX#[0] PEG_RCOMPO
    H22 PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.
    7 DMI_TXN1 B25 PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils. A28 CLK_CPU_BCLKP CLK_CPU_BCLKP 9
    DMI_RX#[1] BCLK

    MISC

    CLOCKS
    D H_SNB_IVB# D
    7 DMI_TXN2 A25 DMI_RX#[2] 8 H_SNB_IVB# C26 PROC_SELECT# BCLK# A27 CLK_CPU_BCLKN CLK_CPU_BCLKN 9
    7 DMI_TXN3 B24 K33 PEG_RX#0 15
    DMI_RX#[3] PEG_RX#[0]
    M35 PEG_RX#1 15
    PEG_RX#[1] SKTOCC#
    7 DMI_TXP0 B28
    DMI_RX[0] PEG_RX#[2]
    L34 PEG_RX#2 15 TP45 AN34
    SKTOCC# Ra
    7 DMI_TXP1 B26 J35 PEG_RX#3 15 A16 CLK_DPLL_SSCLKP_R 3 4 CLK_DPLL_SSCLKP 9
    DMI_RX[1] PEG_RX#[3] DPLL_REF_CLK

    DMI
    7 DMI_TXP2 A24 DMI_RX[2] PEG_RX#[4] J32 PEG_RX#4 15 DPLL_REF_CLK# A15 CLK_DPLL_SSCLKN_R 1 2 CLK_DPLL_SSCLKN 9
    B23 H34 PEG_RX#5 15 R440 IV@0_4P2R
    7 DMI_TXP3 DMI_RX[3] PEG_RX#[5]
    H31 PEG_RX#6 15 Rb
    PEG_RX#[6] TP_CATERR# R442 DO@1K_4
    7 DMI_RXN0 G21 DMI_TX#[0] PEG_RX#[7] G33 PEG_RX#7 15 TP11 AL33 CATERR# +1.05V
    7 DMI_RXN1 E22 DMI_TX#[1] PEG_RX#[8] G30 PEG_RX#8 15 Rc
    F21 F35 PEG_RX#9 15 R438 DO@1K_4
    7 DMI_RXN2 DMI_TX#[2] PEG_RX#[9]

    THERMAL
    7 DMI_RXN3 D21 DMI_TX#[3] PEG_RX#[10] E34 PEG_RX#10 15 EV UMA/OPT.
    E32 AN33 R8 CPU_DRAMRST#
    PEG_RX#[11] PEG_RX#11 15 32 EC_PECI PECI SM_DRAMRST# CPU_DRAMRST# 4
    7 DMI_RXP0 G22 D33 PEG_RX#12 15 Ra NA 0 ohm

    DDR3
    MISC
    DMI_TX[0] PEG_RX#[12]
    7 DMI_RXP1 D22 D31 PEG_RX#13 15
    DMI_TX[1] PEG_RX#[13]
    F20 B33 PEG_RX#14 15 Rb 1K NA

    PCI EXPRESS* - GRAPHICS


    7 DMI_RXP2 DMI_TX[2] PEG_RX#[14]
    C21 C32 PEG_RX#15 15 32,35 H_PROCHOT# H_PROCHOT# R124 56_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R173 140/F_4
    7 DMI_RXP3 DMI_TX[3] PEG_RX#[15] PROCHOT# SM_RCOMP[0]
    A5 SM_RCOMP_1 R458 25.5./F_4 Rc 1K NA
    SM_RCOMP[1] SM_RCOMP_2 R460 200/F_4
    J33 PEG_RX0 15 A4
    PEG_RX[0] SM_RCOMP[2]
    L35 PEG_RX1 15
    PEG_RX[1] PM_THRMTRIP#
    PEG_RX[2] K34 PEG_RX2 15 10 PM_THRMTRIP# AN32 THERMTRIP# CRB 1.0 : SM_RCOMP[2..0] W:20mils, S:15mils, L 500mils
    7 FDI_TXN0 A21 H35 PEG_RX3 15
    FDI0_TX#[0] PEG_RX[3]
    7 FDI_TXN1 H19 H32 PEG_RX4 15
    FDI0_TX#[1] PEG_RX[4]
    7 FDI_TXN2 E19 FDI0_TX#[2] PEG_RX[5] G34 PEG_RX5 15
    F18 G31
    Intel(R) FDI

    7 FDI_TXN3 FDI0_TX#[3] PEG_RX[6] PEG_RX6 15


    B21 F33 Intel recommended UNCOREPWRGOOD AP29 XDP_PRDY#
    7 FDI_TXN4 FDI1_TX#[0] PEG_RX[7] PEG_RX7 15 PRDY# TP53
    C20 F30 PEG_RX8 15 AP27 XDP_PREQ#
    7 FDI_TXN5 FDI1_TX#[1] PEG_RX[8] routing on one layer PREQ# TP18
    7 FDI_TXN6 D18 E35 PEG_RX9 15
    FDI1_TX#[2] PEG_RX[9] XDP_TCLK
    7 FDI_TXN7 E17 FDI1_TX#[3] PEG_RX[10] E33 PEG_RX10 15 TCK AR26 TP20

    PWR MANAGEMENT
    F32 AR27 PCH_JTAG_TMS

    JTAG & BPM


    PEG_RX[11] PEG_RX11 15 TMS TP19
    D34 PM_SYNC AM34 AP30 XDP_TRST#
    PEG_RX[12] PEG_RX12 15 7 PM_SYNC PM_SYNC TRST# TP12
    7 FDI_TXP0 A22 FDI0_TX[0] PEG_RX[13] E31 PEG_RX13 15
    G19 C33 apply C5205 for nosie C165 0.1u/10V_4 AR28 PCH_JTAG_TDI
    7 FDI_TXP1 FDI0_TX[1] PEG_RX[14] PEG_RX14 15 TDI TP56
    E20 B32 PEG_RX15 15 AP26 PCH_JTAG_TDO
    7 FDI_TXP2 FDI0_TX[2] PEG_RX[15] H_PWRGOOD TDO
    7 FDI_TXP3 G18 10 H_PWRGOOD AP33
    FDI0_TX[3] R_PEG_TX#0 C395 SNP@0.22u/10V_4 UNCOREPWRGOOD
    7 FDI_TXP4 B20 FDI1_TX[0] PEG_TX#[0] M29 PEG_TX#0 15
    C19 M32 R_PEG_TX#1 C400 SNP@0.22u/10V_4 PEG_TX#1 15 R116 10K_4
    7 FDI_TXP5 FDI1_TX[1] PEG_TX#[1]
    D19 M31 R_PEG_TX#2 C402 SNP@0.22u/10V_4 AL35
    C 7 FDI_TXP6 FDI1_TX[2] PEG_TX#[2] PEG_TX#2 15 DBR# XDP_DBRST# 7 C
    F17 L32 R_PEG_TX#3 C405 SNP@0.22u/10V_4 PEG_TX#3 15 PM_DRAM_PWRGD_R V8
    7 FDI_TXP7 FDI1_TX[3] PEG_TX#[3] R_PEG_TX#4 SM_DRAMPWROK
    L29 C407 SNP@0.22u/10V_4 PEG_TX#4 15
    PEG_TX#[4] R_PEG_TX#5 C413 SNP@0.22u/10V_4 XDP_BPM0
    7 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#[5] K31 PEG_TX#5 15 BPM#[0] AT28 TP54
    J17 K28 R_PEG_TX#6 C414 SNP@0.22u/10V_4 +1.05V AR29 XDP_BPM1
    7 FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] PEG_TX#6 15 BPM#[1] TP55
    J30 R_PEG_TX#7 C418 SNP@0.22u/10V_4 AR30 XDP_BPM2
    PEG_TX#[7] PEG_TX#7 15 BPM#[2] TP51
    H20 J28 R_PEG_TX#8 C421 EV@0.22u/10V_4 R107 75_4 R113 43_4 CPU_PLTRST#_R AR33 AT30 XDP_BPM3
    7 FDI_INT FDI_INT PEG_TX#[8]
    PEG_TX#[9] H29 R_PEG_TX#9
    R_PEG_TX#10
    C424 EV@0.22u/10V_4
    PEG_TX#8 15
    PEG_TX#9 15
    RESET# BPM#[3]
    BPM#[4] AP32 XDP_BPM4
    XDP_BPM5
    TP52
    TP49
    For XDP
    J19 G27 C425 EV@0.22u/10V_4 PEG_TX#10 15 AR31
    7 FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] BPM#[5] TP47
    H17 E29 R_PEG_TX#11 C430 EV@0.22u/10V_4 PEG_TX#11 15 AT31 XDP_BPM6
    7 FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] BPM#[6] TP50
    F27 R_PEG_TX#12 C431 EV@0.22u/10V_4 CPU_PLTRST# AR32 XDP_BPM7
    PEG_TX#[12] PEG_TX#12 15 BPM#[7] TP46
    D28 R_PEG_TX#13 C434 EV@0.22u/10V_4 PEG_TX#13 15 R115
    PEG_TX#[13] R_PEG_TX#14 C439 EV@0.22u/10V_4
    F26 PEG_TX#14 15
    PEG_TX#[14] R_PEG_TX#15 C440 EV@0.22u/10V_4 *750/F_4
    PEG_TX#[15] E25 PEG_TX#15 15
    A18
    eDP_COMP eDP_COMPIO R_PEG_TX0 C398 SNP@0.22u/10V_4 Ivy Bridge_rPGA_2DPC_Rev0p61
    A17 M28 PEG_TX0 15
    eDP_ICOMPO PEG_TX[0] R_PEG_TX1 C401 SNP@0.22u/10V_4
    22 INT_eDP_HPD_Q B16 M33 PEG_TX1 15
    eDP_HPD PEG_TX[1] R_PEG_TX2 C404 SNP@0.22u/10V_4
    M30 PEG_TX2 15
    PEG_TX[2] R_PEG_TX3 C406 SNP@0.22u/10V_4
    L31 PEG_TX3 15
    PEG_TX[3] R_PEG_TX4 C408 SNP@0.22u/10V_4
    22 EDP-AUX+ C15 L28 PEG_TX4 15
    eDP_AUX PEG_TX[4] R_PEG_TX5 C409 SNP@0.22u/10V_4
    22 EDP-AUX- D15 K30 PEG_TX5 15
    eDP_AUX# PEG_TX[5]
    eDP

    K27 R_PEG_TX6 C417 SNP@0.22u/10V_4 PEG_TX6 15


    PEG_TX[6] R_PEG_TX7 C419 SNP@0.22u/10V_4 R114 *1.5K/F_4
    PEG_TX[7] J29 PEG_TX7 15 9 PCI_PLTRST#
    C17 J27 R_PEG_TX8 C420 EV@0.22u/10V_4
    22 EDP-ML0+ eDP_TX[0] PEG_TX[8] PEG_TX8 15
    F16 H28 R_PEG_TX9 C422 EV@0.22u/10V_4 PEG_TX9 15 +3V
    eDP_TX[1] PEG_TX[9] R_PEG_TX10 C427 EV@0.22u/10V_4
    TP59 C16 G28 PEG_TX10 15
    eDP_TX[2] PEG_TX[10] R_PEG_TX11 C428 EV@0.22u/10V_4
    G15 E28 PEG_TX11 15
    eDP_TX[3] PEG_TX[11] R_PEG_TX12
    PEG_TX[12]
    F28 C433 EV@0.22u/10V_4 PEG_TX12 15 C167 CRB 1.0 : change to +3V(S0)
    C18 D27 R_PEG_TX13 C436 EV@0.22u/10V_4 U3 0.1u/10V_4
    22 EDP-ML0- eDP_TX#[0] PEG_TX[13] PEG_TX13 15
    E16 E26 R_PEG_TX14 C437 EV@0.22u/10V_4 PEG_TX14 15 1 5
    eDP_TX#[1] PEG_TX[14] R_PEG_TX15 C444 EV@0.22u/10V_4 NC VCC
    TP58 D16 eDP_TX#[2] PEG_TX[15] D25 PEG_TX15 15
    F15 2 +3V_S5
    eDP_TX#[3] IN
    3 4 CPU_PLTRST#
    Ivy Bridge_rPGA_2DPC_Rev0p61 GND OUT
    74LVC1G07GW +1.5V_CPU
    HPD disable DG 1.0 : C516
    The recommended AC cap value is changed to 220nF for compatibility with 0.1u/10V_4
    B This signal can be left as no PCIe Gen3 on future platforms. B

    connect if entire eDP interface For Gen2 only designs, it is acceptable to continue to use the 100nF capacitor. R461

    5
    is disabled. U18 200/F_4
    7 SYS_PWROK 2
    4 PM_DRAM_PWRGD_Q R459 130/F_4 PM_DRAM_PWRGD_R
    7 PM_DRAM_PWRGD 1

    74AHC1G09

    3
    R462 *39_4 3 1

    Q30 *2N7002K

    2
    MAINON_ON_G
    MAINON_ON_G 41

    FDI Disabling (Discrete Only) DP & PEG Compensation


    +1.05V

    3
    +1.05V Processor pull-up(CPU)
    9/26 add 7,35 IMVP_PWRGD 2 Q4 22,32,35,36,41 +1.05V
    6,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41 +3V
    FDV301N
    +1.05V Routed within 500 mils +1.05V

    1
    FDI_INT

    R444
    R446
    DO@0_4
    DO@0_4
    FDI_FSYNC0
    FDI_FSYNC1
    Routed within 25 mils R439 24.9/F_4 PEG_COMP H_PROCHOT#
    PCH_JTAG_TDO
    R122
    R134
    62_4
    51_4
    R86
    1K_4
    R443 DO@0_4 FDI_LSYNC0 PEG_ICOMPI and RCOMPO signals should PCH_JTAG_TMS R135 51_4
    A FDI_LSYNC1 R433 24.9/F_4 eDP_COMP be routed within 500 mils PCH_JTAG_TDI R430 51_4 9/27 modify A
    XDP_PREQ# R132 *51_4
    typical impedance = 43 mohms

    2
    FDI_FSYNC can gang eDP_COMPIO and ICOMPO signals should XDP_TCLK R137 51_4
    R441 all these 4 be shorted near balls and routed with XDP_TRST# R128 51_4 Q5
    R447 PEG_ICOMPO signals should PM_THRMTRIP# 1 3 MMBT3904 SYS_SHDN# 18,34,41
    DO@1K/F_4 DO@1K/F_4 signals together typical impedance <25 mohms
    and tie them with be routed within 500 mils
    only one 1K typical impedance = 14.5 mohms
    resistor to GND
    (DG V0.5 Ch2.2.9).
    Quanta Computer Inc.
    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    IVY Bridge 1/4 1A

    Date: Friday, February 03, 2012 Sheet 3 of 44


    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com
    IVY Bridge Processor (DDR3)

    U16C U16D

    13 M_A_DQ[63:0] SA_CLK[0] AB6 M_A_CLK0 13 14 M_B_DQ[63:0] SB_CLK[0] AE2 M_B_CLK0 14


    SA_CLK#[0] AA6 M_A_CLK0# 13 SB_CLK#[0] AD2 M_B_CLK0# 14
    D M_A_DQ0 M_B_DQ0 D
    C5 SA_DQ[0] SA_CKE[0] V9 M_A_CKE0 13 C9 SB_DQ[0] SB_CKE[0] R9 M_B_CKE0 14
    M_A_DQ1 D5 M_B_DQ1 A7
    M_A_DQ2 SA_DQ[1] M_B_DQ2 SB_DQ[1]
    D3 SA_DQ[2] D10 SB_DQ[2]
    M_A_DQ3 D2 M_B_DQ3 C8
    M_A_DQ4 SA_DQ[3] M_B_DQ4 SB_DQ[3]
    D6 AA5 M_A_CLK1 13 A9 AE1 M_B_CLK1 14
    M_A_DQ5 SA_DQ[4] SA_CLK[1] M_B_DQ5 SB_DQ[4] SB_CLK[1]
    C6 SA_DQ[5] SA_CLK#[1] AB5 M_A_CLK1# 13 A8 SB_DQ[5] SB_CLK#[1] AD1 M_B_CLK1# 14
    M_A_DQ6 C2 V10 M_B_DQ6 D9 R10
    SA_DQ[6] SA_CKE[1] M_A_CKE1 13 SB_DQ[6] SB_CKE[1] M_B_CKE1 14
    M_A_DQ7 C3 M_B_DQ7 D8
    M_A_DQ8 SA_DQ[7] M_B_DQ8 SB_DQ[7]
    F10 SA_DQ[8] G4 SB_DQ[8]
    M_A_DQ9 F8 M_B_DQ9 F4
    M_A_DQ10 SA_DQ[9] M_B_DQ10 SB_DQ[9]
    G10 SA_DQ[10] SA_CLK[2] AB4 F1 SB_DQ[10] SB_CLK[2] AB2
    M_A_DQ11 G9 AA4 M_B_DQ11 G1 AA2
    M_A_DQ12 SA_DQ[11] SA_CLK#[2] M_B_DQ12 SB_DQ[11] SB_CLK#[2]
    F9 SA_DQ[12] SA_CKE[2] W9 G5 SB_DQ[12] SB_CKE[2] T9
    M_A_DQ13 F7 M_B_DQ13 F5
    M_A_DQ14 SA_DQ[13] M_B_DQ14 SB_DQ[13]
    G8 F2
    M_A_DQ15 SA_DQ[14] M_B_DQ15 SB_DQ[14]
    G7 G2
    M_A_DQ16 SA_DQ[15] M_B_DQ16 SB_DQ[15]
    K4 SA_DQ[16] SA_CLK[3] AB3 J7 SB_DQ[16] SB_CLK[3] AA1
    M_A_DQ17 K5 AA3 M_B_DQ17 J8 AB1
    M_A_DQ18 SA_DQ[17] SA_CLK#[3] M_B_DQ18 SB_DQ[17] SB_CLK#[3]
    K1 SA_DQ[18] SA_CKE[3] W10 K10 SB_DQ[18] SB_CKE[3] T10
    M_A_DQ19 J1 M_B_DQ19 K9
    M_A_DQ20 SA_DQ[19] M_B_DQ20 SB_DQ[19]
    J5 J9
    M_A_DQ21 SA_DQ[20] M_B_DQ21 SB_DQ[20]
    J4 J10
    M_A_DQ22 SA_DQ[21] M_B_DQ22 SB_DQ[21]
    J2 SA_DQ[22] SA_CS#[0] AK3 M_A_CS#0 13 K8 SB_DQ[22] SB_CS#[0] AD3 M_B_CS#0 14
    M_A_DQ23 K2 AL3 M_B_DQ23 K7 AE3
    SA_DQ[23] SA_CS#[1] M_A_CS#1 13 SB_DQ[23] SB_CS#[1] M_B_CS#1 14
    M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
    M_A_DQ25 SA_DQ[24] SA_CS#[2] M_B_DQ25 SB_DQ[24] SB_CS#[2]
    N10 SA_DQ[25] SA_CS#[3] AH1 N4 SB_DQ[25] SB_CS#[3] AE6
    M_A_DQ26 N8 M_B_DQ26 N2
    M_A_DQ27 SA_DQ[26] M_B_DQ27 SB_DQ[26]
    N7 N1
    M_A_DQ28 SA_DQ[27] M_B_DQ28 SB_DQ[27]
    M10 SA_DQ[28] M4 SB_DQ[28]
    M_A_DQ29 M9 AH3 M_B_DQ29 N5 AE4
    SA_DQ[29] SA_ODT[0] M_A_ODT0 13 SB_DQ[29] SB_ODT[0] M_B_ODT0 14

    DDR SYSTEM MEMORY B


    M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4
    DDR SYSTEM MEMORY A

    SA_DQ[30] SA_ODT[1] M_A_ODT1 13 SB_DQ[30] SB_ODT[1] M_B_ODT1 14


    M_A_DQ31 M7 AG2 M_B_DQ31 M1 AD5
    C M_A_DQ32 SA_DQ[31] SA_ODT[2] M_B_DQ32 SB_DQ[31] SB_ODT[2] C
    AG6 SA_DQ[32] SA_ODT[3] AH2 AM5 SB_DQ[32] SB_ODT[3] AE5
    M_A_DQ33 AG5 M_B_DQ33 AM6
    M_A_DQ34 SA_DQ[33] M_B_DQ34 SB_DQ[33]
    AK6 AR3
    M_A_DQ35 SA_DQ[34] M_B_DQ35 SB_DQ[34]
    AK5 SA_DQ[35] AP3 SB_DQ[35]
    M_A_DQ36 AH5 M_B_DQ36 AN3
    M_A_DQ37 SA_DQ[36] M_A_DQS#0 M_B_DQ37 SB_DQ[36] M_B_DQS#0
    AH6 C4 AN2 D7
    M_A_DQ38 SA_DQ[37] SA_DQS#[0] M_A_DQS#1 M_B_DQ38 SB_DQ[37] SB_DQS#[0] M_B_DQS#1
    AJ5 SA_DQ[38] SA_DQS#[1] G6 AN1 SB_DQ[38] SB_DQS#[1] F3
    M_A_DQ39 AJ6 J3 M_A_DQS#2 M_B_DQ39 AP2 K6 M_B_DQS#2
    M_A_DQ40 SA_DQ[39] SA_DQS#[2] M_A_DQS#3 M_B_DQ40 SB_DQ[39] SB_DQS#[2] M_B_DQS#3
    AJ8 SA_DQ[40] SA_DQS#[3] M6 AP5 SB_DQ[40] SB_DQS#[3] N3
    M_A_DQ41 AK8 AL6 M_A_DQS#4 M_B_DQ41 AN9 AN5 M_B_DQS#4
    M_A_DQ42 SA_DQ[41] SA_DQS#[4] M_A_DQS#5 M_B_DQ42 SB_DQ[41] SB_DQS#[4] M_B_DQS#5
    AJ9 SA_DQ[42] SA_DQS#[5] AM8 AT5 SB_DQ[42] SB_DQS#[5] AP9
    M_A_DQ43 AK9 AR12 M_A_DQS#6 M_B_DQ43 AT6 AK12 M_B_DQS#6
    M_A_DQ44 SA_DQ[43] SA_DQS#[6] M_A_DQS#7 M_B_DQ44 SB_DQ[43] SB_DQS#[6] M_B_DQS#7
    AH8 SA_DQ[44] SA_DQS#[7] AM15 M_A_DQS#[7:0] 13 AP6 SB_DQ[44] SB_DQS#[7] AP15 M_B_DQS#[7:0] 14
    M_A_DQ45 AH9 M_B_DQ45 AN8
    M_A_DQ46 SA_DQ[45] M_B_DQ46 SB_DQ[45]
    AL9 AR6
    M_A_DQ47 SA_DQ[46] M_B_DQ47 SB_DQ[46]
    AL8 AR5
    M_A_DQ48 SA_DQ[47] M_B_DQ48 SB_DQ[47]
    AP11 AR9
    M_A_DQ49 SA_DQ[48] M_A_DQS0 M_B_DQ49 SB_DQ[48] M_B_DQS0
    AN11 D4 AJ11 C7
    M_A_DQ50 SA_DQ[49] SA_DQS[0] M_A_DQS1 M_B_DQ50 SB_DQ[49] SB_DQS[0] M_B_DQS1
    AL12 F6 AT8 G3
    M_A_DQ51 SA_DQ[50] SA_DQS[1] M_A_DQS2 M_B_DQ51 SB_DQ[50] SB_DQS[1] M_B_DQS2
    AM12 SA_DQ[51] SA_DQS[2] K3 AT9 SB_DQ[51] SB_DQS[2] J6
    M_A_DQ52 AM11 N6 M_A_DQS3 M_B_DQ52 AH11 M3 M_B_DQS3
    M_A_DQ53 SA_DQ[52] SA_DQS[3] M_A_DQS4 M_B_DQ53 SB_DQ[52] SB_DQS[3] M_B_DQS4
    AL11 AL5 AR8 AN6
    M_A_DQ54 SA_DQ[53] SA_DQS[4] M_A_DQS5 M_B_DQ54 SB_DQ[53] SB_DQS[4] M_B_DQS5
    AP12 AM9 AJ12 AP8
    M_A_DQ55 SA_DQ[54] SA_DQS[5] M_A_DQS6 M_B_DQ55 SB_DQ[54] SB_DQS[5] M_B_DQS6
    AN12 AR11 AH12 AK11
    M_A_DQ56 SA_DQ[55] SA_DQS[6] M_A_DQS7 M_B_DQ56 SB_DQ[55] SB_DQS[6] M_B_DQS7
    AJ14 AM14 M_A_DQS[7:0] 13 AT11 AP14 M_B_DQS[7:0] 14
    M_A_DQ57 SA_DQ[56] SA_DQS[7] M_B_DQ57 SB_DQ[56] SB_DQS[7]
    AH14 AN14
    M_A_DQ58 SA_DQ[57] M_B_DQ58 SB_DQ[57]
    AL15 SA_DQ[58] AR14 SB_DQ[58]
    M_A_DQ59 AK15 M_B_DQ59 AT14
    M_A_DQ60 SA_DQ[59] M_B_DQ60 SB_DQ[59]
    AL14 AT12
    M_A_DQ61 SA_DQ[60] M_A_A0 M_B_DQ61 SB_DQ[60] M_B_A0
    AK14 AD10 AN15 AA8
    M_A_DQ62 SA_DQ[61] SA_MA[0] M_A_A1 M_B_DQ62 SB_DQ[61] SB_MA[0] M_B_A1
    AJ15 W1 AR15 T7
    M_A_DQ63 SA_DQ[62] SA_MA[1] M_A_A2 M_B_DQ63 SB_DQ[62] SB_MA[1] M_B_A2
    AH15 W2 AT15 R7
    B SA_DQ[63] SA_MA[2] M_A_A3 SB_DQ[63] SB_MA[2] M_B_A3 B
    SA_MA[3] W7 SB_MA[3] T6
    V3 M_A_A4 T2 M_B_A4
    SA_MA[4] M_A_A5 SB_MA[4] M_B_A5
    V2 T4
    SA_MA[5] M_A_A6 SB_MA[5] M_B_A6
    SA_MA[6] W3 SB_MA[6] T3
    13 M_A_BS#0 AE10 W6 M_A_A7 14 M_B_BS#0 AA9 R2 M_B_A7
    SA_BS[0] SA_MA[7] M_A_A8 SB_BS[0] SB_MA[7] M_B_A8
    13 M_A_BS#1 AF10 V1 14 M_B_BS#1 AA7 T5
    SA_BS[1] SA_MA[8] M_A_A9 SB_BS[1] SB_MA[8] M_B_A9
    13 M_A_BS#2 V6 W5 14 M_B_BS#2 R6 R3
    SA_BS[2] SA_MA[9] M_A_A10 SB_BS[2] SB_MA[9] M_B_A10
    AD8 AB7
    SA_MA[10] M_A_A11 SB_MA[10] M_B_A11
    V4 R1
    SA_MA[11] M_A_A12 SB_MA[11] M_B_A12
    SA_MA[12] W4 SB_MA[12] T1
    AE8 AF8 M_A_A13 AA10 AB10 M_B_A13
    13 M_A_CAS# SA_CAS# SA_MA[13] 14 M_B_CAS# SB_CAS# SB_MA[13]
    AD9 V5 M_A_A14 AB8 R5 M_B_A14
    13 M_A_RAS# SA_RAS# SA_MA[14] 14 M_B_RAS# SB_RAS# SB_MA[14]
    AF9 V7 M_A_A15 AB9 R4 M_B_A15
    13 M_A_WE# SA_WE# SA_MA[15] M_A_A[15:0] 13 14 M_B_WE# SB_WE# SB_MA[15] M_B_A[15:0] 14

    Ivy Bridge_rPGA_2DPC_Rev0p61 Ivy Bridge_rPGA_2DPC_Rev0p61

    +1.5VSUS

    R503
    1K/F_4
    A Q36 2N7002K A
    R502 1K/F_4 CD_DRAMRST# 3 1
    13,14 DDR3_DRAMRST# CPU_DRAMRST# 3
    2

    9,13,14 DRAMRST_CNTRL_PCH
    R500
    C547 4.99K/F_4 Quanta Computer Inc.
    0.047u/16V_4
    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    IVY Bridge 2/4 1A

    Date: Friday, February 03, 2012 Sheet 4 of 44


    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com
    22,32,35,36,41 +1.05V
    35 +VCC_CORE
    10,41 +1.8V CPU VTT
    35 +VCC_GFX
    IVY 45W:8.5A
    CPU VGT IVY SPEC IVY Bridge Processor (GRAPHIC POWER)
    3 +1.5V_CPU IVY Processor (POWER) Cose down IVY 45W:TDC 38A Cose down 22uF_8 x2 Socket TOP cavity
    +VDDR_REF_CPU SNB : Spec 330uF x1 330uF x1 22uF_8 x2 Socket BOT cavity
    38 +VCCSA 330uF/6mohm x 2
    Spec 22uF_8 x4 Socket TOP edge

    22uF x 12
    22uF x 2
    10uF x 10
    470uF/4mohm x 2 22uF x 4
    22uF x 12 10uF x 10
    22uF_8 x4 Socket BOT edge
    470uF_7343 x2 U16G
    POWER 0929 change value by CRB
    +1.05V
    CPU Core Power 22uF x 7 (Non-stuff) reserved x 4
    POWER R81 IV@100/F_4 +VCC_GFX

    SENSE
    LINES
    IVY 45W:TDC 52A U16F +VCC_GFX AT24 AK35 VCC_AXG_SENSE 35
    VAXG1 VAXG_SENSE
    AT23 VAXG2 VSSAXG_SENSE AK34 VSS_AXG_SENSE 35
    IVY SPEC +VCC_CORE AT21 R98 IV@100/F_4
    + C502 + C233 + C514 VAXG3
    D AT20 D
    22uF_8 x8 Socket TOP cavity + C511 + C213 VAXG4
    AT18 VAXG5
    22uF_8 x10 Socket BOT cavity AG35 330u/2V_7343 *330u/2V_7343 IV@330u/2V_7343 *IV@330u/2V_7343 AT17
    VCC1 *330u/2V_7343 VAXG6
    AG34 AH13 AR24
    22uF_8 x8 Socket TOP edge VCC2 VCCIO1 VAXG7
    AG33 AH10 AR23
    VCC3 VCCIO2 VAXG8
    470uF_7343 x4 AG32
    VCC4 VCCIO3
    AG10 AR21
    VAXG9 10 mil For M3 solution
    AG31 VCC5 VCCIO4 AC10 AR20 VAXG10
    total : 10uF x 10 , RSVD x 1 AG30 Y10 AR18 AL1 +VDDR_REF_CPU +VDDR_REF_CPU
    need Rb4, Rd1
    VCC6 VCCIO5 VAXG11 SM_VREF
    total : 22uF x 16 , RSVD x 3 AG29
    VCC7 VCCIO6
    U10 AR17
    VAXG12 W/O M3 then NC

    VREF
    AG28 VCC8 VCCIO7 P10 AP24 VAXG13
    tatal : 470u x 4, RSVD x2 AG27 L10 C506 C198 C209 C509 C212 C510 C477 C471 C493 C470 AP23 ball B4 and D1
    VCC9 VCCIO8 IV@22u/6.3V_8 IV@22u/6.3V_8 VAXG14 R234 *1K_4
    AG26
    VCC10 VCCIO9
    J14 AP21
    VAXG15 Rb4
    AF35 J13 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 IV@22u/6.3V_8 IV@22u/6.3V_8 AP20 B4 SMDDR_VREF_DQ0_M3 13
    VCC11 VCCIO10 VAXG16 SA_DIMM_VREFDQ
    AF34 J12 AP18 D1 SMDDR_VREF_DQ1_M3 14
    VCC12 VCCIO11 VAXG17 SB_DIMM_VREFDQ R239 *1K_4
    SNB : Spec Cose down AF33 VCC13 VCCIO12 J11 AP17 VAXG18 Rd1
    AF32 H14 AN24
    VCC14 VCCIO13 VAXG19
    470uF/4mohm x 4 330uF x2 AF31
    VCC15 VCCIO14
    H12 AN23
    VAXG20
    AF30
    VCC16 VCCIO15
    H11 AN21
    VAXG21 IVY SPEC
    22uF x 16 22uF x 4 AF29
    VCC17 VCCIO16
    G14 AN20
    VAXG22 330uF x1, 10uF_8 x6 Socket BOT edge. +1.5V_CPU

    DDR3 -1.5V RAILS


    AF28 G13 C508 C507 C215 C501 C503 C505 AN18
    VCC18 VCCIO17 VAXG23

    PEG AND DDR


    10uF x 10 10uF x 20 AF27
    VCC19 VCCIO18
    G12 AN17
    VAXG24

    GRAPHICS
    AF26 F14 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 C484 C472 C190 C180 AM24 AF7
    reserved x 5 VCC20 VCCIO19 *IV@22u/6.3V_8 IV@22u/6.3V_8 VAXG25 VDDQ1
    AD35 F13 AM23 AF4
    VCC21 VCCIO20 *IV@22u/6.3V_8 IV@22u/6.3V_8 VAXG26 VDDQ2
    AD34 F12 AM21 AF1
    VCC22 VCCIO21 VAXG27 VDDQ3
    AD33 VCC23 VCCIO22 F11 AM20 VAXG28 VDDQ4 AC7
    AD32 E14 AM18 AC4 C526 C524 C534 C531 C232
    C185 C489 C498 C497 C176 C187 C186 VCC24 VCCIO23 VAXG29 VDDQ5 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8
    AD31 E12 AM17 AC1
    VCC25 VCCIO24 VAXG30 VDDQ6
    AD30 VCC26 AL24 VAXG31 VDDQ7 Y7
    22u/6.3V_8 22u/6.3V_8 *22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 AD29 E11 C202 C495 C500 C494 C512 C515 AL23 Y4
    *22u/6.3V_8 VCC27 VCCIO25 VAXG32 VDDQ8
    AD28 VCC28 VCCIO26 D14 AL21 VAXG33 VDDQ9 Y1
    AD27 D13 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 AL20 U7
    VCC29 VCCIO27 C183 C473 C179 C178 VAXG34 VDDQ10
    AD26 D12 AL18 U4
    VCC30 VCCIO28 *IV@22u/6.3V_8 IV@22u/6.3V_8 VAXG35 VDDQ11
    AC35 VCC31 VCCIO29 D11 AL17 VAXG36 VDDQ12 U1
    AC34 C14 *IV@22u/6.3V_8 IV@22u/6.3V_8 AK24 P7 C533
    C211 C201 C487 C170 C485 C181 C486 VCC32 VCCIO30 VAXG37 VDDQ13 C236 C234 C229 +
    AC33
    VCC33 VCCIO31
    C13 IVY SPEC AK23
    VAXG38 VDDQ14
    P4
    AC32 C12 22uF_8 x7 Socket TOP cavity AK21 P1 10u/6.3V_8 *10u/6.3V_8 *10u/6.3V_8
    *22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 VCC34 VCCIO32 VAXG39 VDDQ15 330u/2V_7343
    AC31 VCC35 VCCIO33 C11 AK20 VAXG40
    *22u/6.3V_8 *22u/6.3V_8 AC30 B14 22uF_8 x5 Socket BOT cavity AK18
    C VCC36 VCCIO34 VAXG41 C
    AC29 B12 22uF_8 x2 Socket TOP cavity (no stuff) AK17
    VCC37 VCCIO35 VAXG42
    AC28 A14 22uF_8 x5 Socket BOT cavity (no stuff) AJ24
    VCC38 VCCIO36 C488 C499 C482 C492 VAXG43
    AC27 A13 330uF_7343 x2 AJ23
    VCC39 VCCIO37 IV@22u/6.3V_8 IV@22u/6.3V_8 VAXG44
    AC26 VCC40 VCCIO38 A12 AJ21 VAXG45
    AA35 A11 IV@22u/6.3V_8 IV@22u/6.3V_8 AJ20
    VCC41 VCCIO39 VAXG46
    AA34 AJ18
    VCC42 +1.05V_VTT_40 R436 *SHORT_4 VAXG47
    AA33 J23 AJ17 M27

    SA RAIL
    VCC43 VCCIO40 +1.05V VAXG48 VCCSA1 +VCCSA
    C490 C184 C197 C491 C496 AA32 AH24 M26
    VCC44 VAXG49 VCCSA2
    AA31 AH23 L26
    10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 *10u/6.3V_8 VCC45 VAXG50 VCCSA3 C196 C188 C192 + C415
    AA30 AH21 J26
    VCC46 VAXG51 VCCSA4 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 330u/2V_7343
    AA29 AH20 J25
    AA28
    VCC47 R157 Ra DO@0/J_4 AH18
    VAXG52 VCCSA5
    J24
    VCC48 VAXG53 VCCSA6
    AA27 AH17 H26
    VCC49 VAXG54 VCCSA7
    AA26 VCC50 VCCSA8 H25
    CORE SUPPLY

    Y35
    C199 C479 C480 C481 C194 Y34
    VCC51 DIS. VGA UMA/ Optimus
    VCC52
    Y33
    10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 Y32
    VCC53 Ra 0 ohm NA
    VCC54

    1.8V RAIL
    *10u/6.3V_8 Y31
    VCC55
    Y30 H23 VCCSA_SENSE 38
    VCC56 R476 0_8 VCCSA_SENSE
    Y29 +1.8V
    VCC57
    Y28 VCC58
    Y27 R470 0_8 CPU_VCCPLL B6
    VCC59 VCCPLL1

    MISC
    10uF (Reserved) Y26
    VCC60
    A6
    VCCPLL2 VCCSA_VID[0]
    C22 VCCSA_VID0 38
    V35 A2 C24
    VCC61 CPU VCCPL VCCPLL3 VCCSA_VID[1] VCCSA_VID1 38
    SVID

    V34 AJ29 H_CPU_SVIDALRT#


    C191 C189 C182 C205 C195 VCC62 VIDALERT# H_CPU_SVIDCLK C537 C528 C529 + C535
    V33 AJ30
    VCC63 VIDSCLK H_CPU_SVIDDAT 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4 *330u/2V_7343
    V32
    VCC64 VIDSOUT
    AJ28 IVY 45W:1.5A VCCIO_SEL_NC
    22u/6.3V_8 22u/6.3V_8 *10u/6.3V_8 *10u/6.3V_8 *10u/6.3V_8 V31 A19
    VCC65 VCCIO_SEL TP57
    V30
    V29
    VCC66 Spec Real
    VCC67 Ivy Bridge_rPGA_2DPC_Rev0p61
    V28
    VCC68 330uF/7mohm x 1 10uF x 1
    V27
    VCC69
    Voltage selection for VCCIO:
    V26
    VCC70 10uF x 1 1uF x 2 this pin must be pulled high
    U35 VCC71 on the motherboard
    C193 C200 C169 C168 U34 1uF x 2
    + + + + VCC72
    B U33 B
    VCC73 On CRB
    U32
    330u/2V_7343 330u/2V_7343 *470u/2V_7343 *470u/2V_7343 VCC74
    U31
    VCC75 IVY SPEC H_SNB_IVB#_PWRCTRL = low, 1.0V
    U30 330uF x1, 10uF_8 x1, 1uF_4 x2 H_SNB_IVB#_PWRCTRL = high/NC, 1.05V
    VCC76
    U29
    VCC77 Socket BOT edge.
    U28
    VCC78
    U27
    VCC79
    U26 VCC80 IVY SPEC
    R35
    R34
    VCC81 Layout note: need routing 330uF x1, 10uF_8 x1 Socket BOT edge, CPU MCH
    VCC82 SVID CLK 10uF_8 x2 Socket BOT cavity.
    R33
    R32
    VCC83 together and ALERT need IVY 45W: 5A
    VCC84
    R31
    R30
    VCC85 between CLK and DATA Remove PU resistor 54.9/F, CPU SA Spec
    VCC86 stuff at IMVP7 page
    R29
    VCC87 IVY 45W: 6A 330uF/6mohm x 1
    SENSE LINES

    R28 R83 100/F_4 +VCC_CORE


    VCC88 R100 0_4
    R27 VCC89 VCC_SENSE AJ35 VCC_SENSE 35 Spec Real 10uF x 6
    R26 AJ34 R99 0_4 VSS_SENSE 35
    VCC90 VSS_SENSE R82 100/F_4
    P35 VCC91 330uF/7mohm x 1 10uF x 3 Real
    P34 VCC92
    P33 H_CPU_SVIDCLK R78 *SHORT_4 VR_SVID_CLK 35 10uF x 3 10uF x 8
    VCC93 VTT_VCCP_SENSE
    P32 B10 VTT_VCCP_SENSE 36
    VCC94 VCCIO_SENSE VTT_VSSP_SENSE
    P31 A10 VTT_VSSP_SENSE 36
    VCC95 VSS_SENSE_VCCIO
    P30 VCC96
    JP12 P29
    4.5A +1.5VSUS *SHORT_PAD +1.5V_CPU P28
    VCC97 Place PU resistor close to CPU
    P27
    VCC98 R456 10/F_4 SVID DATA
    VCC99 +1.05V +1.05V +SMDDR_VREF +VDDR_REF_CPU +1.5VSUS
    2 1 +1.5V_CPU P26 VCC100 R457 10/F_4 Remove PU resistor 130/F,
    Q34 AO4496
    stuff at IMVP7 page
    Trace Route to Power IC area.
    8 1 R492 *0_8 R497
    7 2 Ivy Bridge_rPGA_2DPC_Rev0p61 R97 *1K/F_4
    6 3 130/F_4
    5
    H_CPU_SVIDDAT R80 *SHORT_4 VR_SVID_DATA 35 3 1
    4

    A Q32 A
    MAIND 2N7002K R498

    2
    R466 MAIND R499
    220_8 Place PU resistor close to CPU SVID ALERT 34,37,41 MAIND
    100K_4
    *1K/F_4

    C543
    *470p/50V_4 +1.05V
    3

    MAINON_ON_G 2
    41 MAINON_ON_G
    R96
    Q29 75_4 Quanta Computer Inc.
    DMN601K-7 35 +VCC_GFX
    H_CPU_SVIDALRT# R95 43_4 R79 *SHORT_4
    35 +VCC_CORE VR_SVID_ALERT# 35 PROJECT : ZQTA/ZQSA
    1

    Size Document Number Rev


    IVY Bridge 3/4 1A

    Date: Friday, February 03, 2012 Sheet 5 of 44


    5 4 3 2 1
    5 4 3 2 1

    IVY Bridge Processor (GND) IVY Bridge Processor (RESERVED, CFG)


    AT35
    AT32
    AT29
    U16H

    VSS1
    VSS2
    VSS3
    www.rosefix.com VSS81
    VSS82
    VSS83
    AJ22
    AJ19
    AJ16 T35
    U16I

    VSS161 VSS234 F22


    U16E

    VCC_DIE_SENSE AH27 VCC_DIE_SENSE


    TP14
    AT27 AJ13 T34 F19 XDP_CFG0 AK28 AH26 VSS_DIE_SENSE
    VSS4 VSS84 VSS162 VSS235 TP16 CFG[0] VSS_DIE_SENSE TP21
    AT25 AJ10 T33 E30 CFG1 AK29
    VSS5 VSS85 VSS163 VSS236 TP13 CFG2 CFG[1]
    AT22 VSS6 VSS86 AJ7 T32 VSS164 VSS237 E27 AL26 CFG[2]
    AT19 AJ4 T31 E24 CFG3 AL27 Rs R136
    VSS7 VSS87 VSS165 VSS238 TP17 CFG[3]
    AT16 AJ3 T30 E21 CFG4 AK26 L7 *SP@0_4 For Sandy For IVY
    VSS8 VSS88 VSS166 VSS239 CFG5 CFG[4] RSVD28
    AT13 VSS9 VSS89 AJ2 T29 VSS167 VSS240 E18 AL29 CFG[5] RSVD29 AG7
    D AT10 AJ1 T28 E15 CFG6 AL30 AE7 Rs Stuff NC D
    VSS10 VSS90 VSS168 VSS241 CFG7 CFG[6] RSVD30
    AT7 VSS11 VSS91 AH35 T27 VSS169 VSS242 E13 AM31 CFG[7] RSVD31 AK2
    AT4 VSS12 VSS92 AH34 T26 VSS170 VSS243 E10 AM32 CFG[8]

    CFG
    AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9 AM30 CFG[9] RSVD32 W8
    AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8 AM28 CFG[10]
    AR22 VSS15 VSS95 AH29 P6 VSS173 VSS246 E7 AM26 CFG[11]
    AR19 VSS16 VSS96 AH28 P5 VSS174 VSS247 E6 AN28 CFG[12] RSVD33 AT26
    AR16 VSS17 VSS98 AH25 P3 VSS175 VSS248 E5 AN31 CFG[13] RSVD34 AM33
    AR13 VSS18 VSS99 AH22 P2 VSS176 VSS249 E4 AN26 CFG[14] RSVD35 AJ27
    AR10 VSS19 VSS100 AH19 N35 VSS177 VSS250 E3 AM27 CFG[15]
    AR7 VSS20 VSS101 AH16 N34 VSS178 VSS251 E2 AK31 CFG[16]
    AR4 AH7 N33 E1 AN29 +3V
    VSS21 VSS102 VSS179 VSS252 CFG[17]
    AR2 VSS22 VSS103 AH4 N32 VSS180 VSS253 D35
    AP34 AG9 N31 D32 eDP_EN#
    VSS23 VSS104 VSS181 VSS254
    AP31 VSS24 VSS105 AG8 N30 VSS182 VSS255 D29 RSVD37 T8
    AP28 AG4 N29 D26 J16 R29
    VSS25 VSS106 VSS183 VSS256 RSVD38
    AP25 VSS26 VSS107 AF6 N28 VSS184 VSS257 D20 TP10 AJ31 VAXG_VAL_SENSE RSVD39 H16

    3
    AP22 AF5 N27 D17 AH31 G16 IV@10K_4
    VSS27 VSS108 VSS185 VSS258 TP15 VSSAXG_VAL_SENSE RSVD40
    AP19 VSS28 VSS109 AF3 N26 VSS186 VSS259 C34 AJ33 VCC_VAL_SENSE
    AP16 VSS29 VSS110 AF2 M34 VSS187 VSS260 C31 AH33 VSS_VAL_SENSE
    AP13 AE35 L33 C28 2 R666
    VSS30 VSS111 VSS188 VSS261
    AP10 VSS31 VSS112 AE34 L30 VSS189 VSS262 C27 *0_4

    3
    AP7 AE33 L27 C25 AJ26 AR35 Q51
    VSS32 VSS113 VSS190 VSS263 RSVD5 RSVD41

    RESERVED
    AP4 AE32 L9 C23 AT34 IV@2N7002K
    VSS33 VSS114 VSS191 VSS264 RSVD42
    AP1 AE31 L8 C10 AT33 22 CABLE_ID 2

    1
    VSS34 VSS115 VSS192 VSS265 RSVD43
    AN30 VSS35 VSS116 AE30 L6 VSS193 VSS266 C1 RSVD44 AP35
    AN27 AE29 L5 B22 AR34 Q52
    VSS36 VSS117 VSS194 VSS267 RSVD45 IV@DTC144EUA
    AN25 AE28 L4 B19
    VSS VSS

    1
    VSS37 VSS118 VSS195 VSS268
    C AN22 VSS38 VSS119 AE27 L3 VSS196 VSS269 B17 C
    AN19 VSS39 VSS120 AE26 L2 VSS197 VSS270 B15 F25 RSVD8
    AN16
    AN13
    VSS40 VSS121 AE9
    AD7
    L1
    K35
    VSS198 VSS271 B13
    B11
    F24
    F23
    RSVD9 Patent pending
    VSS41 VSS122 VSS199 VSS272 RSVD10
    AN10
    AN7
    VSS42 VSS123 AC9
    AC8
    K32
    K29
    VSS200 VSS273 B9
    B8
    D24
    G25
    RSVD11 RSVD46 B34
    A33
    Quanta Confidential
    VSS43 VSS124 VSS201 VSS274 RSVD12 RSVD47
    AN4 VSS44 VSS125 AC6 K26 VSS202 VSS275 B7 G24 RSVD13 RSVD48 A34
    AM29 VSS45 VSS126 AC5 J34 VSS203 VSS276 B5 E23 RSVD14 RSVD49 B35
    AM25 VSS46 VSS127 AC3 J31 VSS204 VSS277 B3 D23 RSVD15 RSVD50 C35
    AM22 VSS47 VSS128 AC2 H33 VSS205 VSS278 B2 C30 RSVD16
    AM19 VSS48 VSS129 AB35 H30 VSS206 VSS279 A35 A31 RSVD17
    AM16 VSS49 VSS130 AB34 H27 VSS207 VSS280 A32 B30 RSVD18
    AM13 VSS50 VSS131 AB33 H24 VSS208 VSS281 A29 B29 RSVD19
    AM10 VSS51 VSS132 AB32 H21 VSS209 VSS282 A26 D30 RSVD20 RSVD51 AJ32 TP8
    AM7 VSS52 VSS133 AB31 H18 VSS210 VSS283 A23 B31 RSVD21 RSVD52 AK32 TP9
    AM4 VSS53 VSS134 AB30 H15 VSS211 VSS284 A20 A30 RSVD22
    AM3 VSS54 VSS135 AB29 H13 VSS212 VSS285 A3 C29 RSVD23
    AM2 VSS55 VSS136 AB28 H10 VSS213
    AM1 VSS56 VSS137 AB27 H9 VSS214 BCLK_ITP AN35 TP43
    AL34 VSS57 VSS138 AB26 H8 VSS215 J20 RSVD24 BCLK_ITP# AM35 TP44
    AL31 VSS58 VSS139 Y9 H7 VSS216 B18 RSVD25
    AL28 VSS59 VSS140 Y8 H6 VSS217
    AL25 VSS60 VSS141 Y6 H5 VSS218
    AL22 VSS61 VSS142 Y5 H4 VSS219
    AL19 VSS62 VSS143 Y3 H3 VSS220 J15 RSVD27 RSVD56 AT2
    AL16 VSS63 VSS144 Y2 H2 VSS221 RSVD57 AT1
    AL13 VSS64 VSS145 W 35 H1 VSS222 RSVD58 AR1
    AL10 VSS65 VSS146 W 34 G35 VSS223
    B AL7 VSS66 VSS147 W 33 G32 VSS224 B
    AL4 VSS67 VSS148 W 32 G29 VSS225
    AL2 VSS68 VSS149 W 31 G26 VSS226 KEY B1
    AK33 VSS69 VSS150 W 30 G23 VSS227
    AK30 VSS70 VSS151 W 29 G20 VSS228
    AK27 VSS71 VSS152 W 28 G17 VSS229
    AK25 VSS72 VSS153 W 27 G11 VSS230
    AK22 VSS73 VSS154 W 26 F34 VSS231
    AK19 U9 F31 Ivy Bridge_rPGA_2DPC_Rev0p61
    VSS74 VSS155 VSS232
    AK16 VSS75 VSS156 U8 F29 VSS233
    AK13 VSS76 VSS157 U6
    AK10 VSS77 VSS158 U5
    AK7 VSS78 VSS159 U3
    AK4 VSS79 VSS160 U2
    AJ25 VSS80

    Ivy Bridge_rPGA_2DPC_Rev0p61 Ivy Bridge_rPGA_2DPC_Rev0p61

    The CFG signals have a default value of '1' if not terminated on the board. 9/26 modify
    Processor Strapping CFG[6:5] (PCIE Port Bifurcation Straps)
    CFG2 R133 1K/F_4
    1 0 CFG5 R130 SNM@1K/F_4 11: (Default) x16 - Device 1 functions 1 and 2 disabled
    CFG6 R127 *1K/F_4 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
    CFG2 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
    A (PEG Static Lane Reversal) Normal Operation Lane Reversed CFG4 eDP_EN# 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled A
    R129 IV@1K/F_4

    CFG4
    (DP Presence Strap) Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP
    CFG7 R123 *1K/F_4
    Quanta Computer Inc.
    CFG7 PEG train immediately following PEG wait for BIOS training
    (PEG Defer Training) xxRESETB de assertion PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    IVY Bridge 4/4 1A

    Date: Friday, February 03, 2012 Sheet 6 of 44


    5 4 3 2 1
    5 4 3 2 1

    22,32,35,36,41
    6,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41
    3,28,30,31,34,35,36,41,42
    +3V
    www.rosefix.com
    +1.05V

    +3V_S5 CPT/PPT (LVDS,DDI)


    U20D

    CPT/PPT (DMI,FDI,PM) 22 INT_LVDS_BLON J47


    M45
    L_BKLTEN SDVO_TVCLKINN
    AP43
    AP45
    22 INT_LVDS_DIGON L_VDD_EN SDVO_TVCLKINP
    U20C
    22 INT_LVDS_BRIGHT P45 L_BKLTCTL SDVO_STALLN AM42
    AM40
    D SDVO_STALLP D
    3 DMI_RXN0 BC24 DMI0RXN FDI_RXN0 BJ14 FDI_TXN0 3 22 INT_LVDS_EDIDCLK T40 L_DDC_CLK
    3 DMI_RXN1 BE20 AY14 FDI_TXN1 3 22 INT_LVDS_EDIDDATA K47 AP39
    DMI1RXN FDI_RXN1 L_DDC_DATA SDVO_INTN
    3 DMI_RXN2 BG18 BE14 FDI_TXN2 3 AP40
    DMI2RXN FDI_RXN2 R164 2.2K_4 SDVO_INTP
    3 DMI_RXN3 BG20 DMI3RXN FDI_RXN3 BH13 FDI_TXN3 3 +3V T45 L_CTRL_CLK
    BC12 R188 2.2K_4 P39
    FDI_RXN4 FDI_TXN4 3 L_CTRL_DATA
    3 DMI_RXP0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TXN5 3
    3 DMI_RXP1 BC20 BG10 R186 2.37K/F_4 AF37 P38
    DMI1RXP FDI_RXN6 FDI_TXN6 3 LVD_IBG SDVO_CTRLCLK HDMI_DDCCLK_SW 23
    3 DMI_RXP2 BJ18 DMI2RXP FDI_RXN7 BG9 FDI_TXN7 3 T7 AF36 LVD_VBG SDVO_CTRLDATA M39 HDMI_DDCDATA_SW 23
    3 DMI_RXP3 BJ20 DMI3RXP
    FDI_RXP0 BG14 FDI_TXP0 3 AE48 LVD_VREFH

    INT. HDMI
    3 DMI_TXN0 AW24 BB14 FDI_TXP1 3 AE47 AT49
    DMI0TXN FDI_RXP1 LVD_VREFL DDPB_AUXN
    3 DMI_TXN1 AW20 DMI1TXN FDI_RXP2 BF14 FDI_TXP2 3 DDPB_AUXP AT47
    3 DMI_TXN2 BB18 DMI2TXN FDI_RXP3 BG13 FDI_TXP3 3 DDPB_HPD AT40 HDMI_HP 23
    3 DMI_TXN3 AV18 BE12 22 INT_TXLCLKOUT- AK39

    DMI
    FDI

    LVDS
    DMI3TXN FDI_RXP4 FDI_TXP4 3 LVDSA_CLK#
    BG12 22 INT_TXLCLKOUT+ AK40 AV42 INT_HDMITX2N_R RP184 3 IV@0_4P2R
    FDI_RXP5 FDI_TXP5 3 LVDSA_CLK DDPB_0N INT_HDMITX2N 23
    3 DMI_TXP0 AY24 BJ10 AV40 INT_HDMITX2P_R 2 1
    DMI0TXP FDI_RXP6 FDI_TXP6 3 DDPB_0P INT_HDMITX2P 23
    3 DMI_TXP1 AY20 BH9 22 INT_TXLOUT0- AN48 AV45 INT_HDMITX1N_R RP194 3 IV@0_4P2R
    DMI1TXP FDI_RXP7 FDI_TXP7 3 LVDSA_DATA#0 DDPB_1N INT_HDMITX1N 23
    3 DMI_TXP2 AY18 22 INT_TXLOUT1- AM47 AV46 INT_HDMITX1P_R 2 1 INT_HDMITX1P 23

    Digital Display Interface


    DMI2TXP LVDSA_DATA#1 DDPB_1P INT_HDMITX0N_R RP204 IV@0_4P2R
    3 DMI_TXP3 AU18 DMI3TXP 22 INT_TXLOUT2- AK47 LVDSA_DATA#2 DDPB_2N AU48 3 INT_HDMITX0N 23
    AW16 AJ48 AU47 INT_HDMITX0P_R 2 1
    FDI_INT FDI_INT 3 LVDSA_DATA#3 DDPB_2P INT_HDMITX0P 23
    AV47 INT_HDMICLK-_R RP214 3 IV@0_4P2R
    DDPB_3N INT_HDMICLK- 23
    BJ24 AV12 22 INT_TXLOUT0+ AN47 AV49 INT_HDMICLK+_R 2 1
    DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 3 LVDSA_DATA0 DDPB_3P INT_HDMICLK+ 23
    22 INT_TXLOUT1+ AM49 LVDSA_DATA1
    +1.05V R521 49.9/F_4 DMI_COMP BG25 BC10 22 INT_TXLOUT2+ AK49
    DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 3 LVDSA_DATA2
    AJ47 P46
    R527 750/F_4 LVDSA_DATA3 DDPC_CTRLCLK DDPC_HPD_PU
    1/6 modify BH21
    DMI2RBIAS FDI_LSYNC0
    AV14 FDI_LSYNC0 3 DDPC_CTRLDATA
    P42

    BB10 FDI_LSYNC1 3 AF40


    +1.05V_M_PG_R FDI_LSYNC1 LVDSB_CLK#
    AF39 AP47
    32 +1.05V_M_PG_R LVDSB_CLK DDPC_AUXN
    C AP49 C
    C686 *0.1u/10V_4 DDPC_AUXP
    AH45 AT38
    LVDSB_DATA#0 DDPC_HPD
    DSWVRMEN A18 DSWVREN 8 AH47 LVDSB_DATA#1
    AF49 AY47
    LVDSB_DATA#2 DDPC_0N DDPC_HPD_PU R169 *2.2K_4

    System Power Management


    AF45 LVDSB_DATA#3 DDPC_0P AY49
    SUS_PWR_ACK R539 *0_4 SUSACK#_R C12 E22 PCH_RSMRST# AY43
    SUSACK# DPWROK DDPC_1N DDPD_HPD_PU R197 *2.2K_4
    AH43 LVDSB_DATA0 DDPC_1P AY45
    XDP_DBRST# AH49 BA47
    3 XDP_DBRST# LVDSB_DATA1 DDPC_2N
    K3 B9 PCIE_WAKE# PCIE_WAKE# 28 AF47 BA48 0 : Port not detected
    C607 *1u/10V_4 SYS_RESET# WAKE# LVDSB_DATA2 DDPC_2P
    AF43 BB47
    LVDSB_DATA3 DDPC_3N
    BB49
    SYS_PWROK CLKRUN# DDPC_3P
    P12
    SYS_PWROK +3V CLKRUN# / GPIO32
    N3 CLKRUN# 32
    INT_CRT_BLU N48 M43
    22 INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
    R583 *0_4 L22 +3V_S5 G8 SUS_STAT# T15 INT_CRT_GRN P49 M36 DDPD_HPD_PU
    PWROK SUS_STAT# / GPIO61 22 INT_CRT_GRN CRT_GREEN DDPD_CTRLDATA
    INT_CRT_RED T49
    22 INT_CRT_RED CRT_RED
    PWROK_EC R661 NBA@0_4
    L10 +3V_S5 N14 PCH_SUSCLK T12 AT45

    CRT
    R662 BA@0_4 +1.05V_M_PG_R APWROK SUSCLK / GPIO62 DDPD_AUXN
    42 +1.05V_M_PG 22 INT_CRT_DDCCLK T39 CRT_DDC_CLK DDPD_AUXP AT43
    22 INT_CRT_DDCDAT M40 BH41
    PM_DRAM_PWRGD PCH_SLP_S5# CRT_DDC_DATA DDPD_HPD
    3 PM_DRAM_PWRGD B13
    DRAMPWROK +3V_S5 SLP_S5# / GPIO63
    D10 T14
    BB43
    R126 IV@33_4 INT_CRT_HSYNC_R DDPD_0N
    22 INT_HSYNC M47 CRT_HSYNC DDPD_0P BB45
    32 PCH_RSMRST# PCH_RSMRST# C21 H4 SUSC# 32 R125 IV@33_4 INT_CRT_VSYNC_R M49 BF44
    RSMRST# SLP_S4# 22 INT_VSYNC CRT_VSYNC DDPD_1N
    BE44
    DDPD_1P
    +3V_S5 The required series-resistors are: DDPD_2N
    BF42
    SUS_PWR_ACK K16 F4 SUSB# 32 ‧Direct Connect - 33 Ω DAC_IREF T43 BE42
    SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# DAC_IREF DDPD_2P
    ‧Docking Topology - 20 Ω T42 BJ42
    CRT_IRTN DDPD_3N
    BG42
    SLP_A# R187 DDPD_3P
    32 DNBSWON# E20 G10 SLP_A# 32
    B PWRBTN# SLP_A# 1K/F_4 PANTHER POINT
    B

    10/31 modify R place close to PCH


    AC_PRESENT H20 DSW G16 SLP_SUS# T10
    ACPRESENT / GPIO31 SLP_SUS# R483 IV@150/F_4 INT_CRT_BLU

    PM_BATLOW# R482 IV@150/F_4 INT_CRT_GRN


    E10 BATLOW# / GPIO72 +3V_S5 PMSYNCH AP14 PM_SYNC 3
    R484 IV@150/F_4 INT_CRT_RED
    PM_RI# A10 +3V_S5 K14 SLP_LAN#
    RI# SLP_LAN# / GPIO29

    PANTHER POINT

    System PWR_OK(CLG) IMVP_PWRGD PU +3V


    PCH Pull-high/low(CLG) +3V_S5 +3V_S5
    PWROK_EC PD
    CRB 1.0 change R8315 to 1K so AND gate output dont need PD again
    +3V
    PM_RI# R545 10K_4

    CLKRUN# R584 8.2K_4 PM_BATLOW# R282 8.2K_4 C629


    *0.1u/10V_4
    XDP_DBRST# R567 4.99K/F_4 PCIE_WAKE# R261 10K_4
    5

    R554 *1K_4 SLP_LAN# R230 *10K_4 to PCH Pin12, XDP and EE debug U24
    2 IMVP_PWRGD 3,35
    A PCH_RSMRST# R219 10K_4 SUS_PWR_ACK R538 10K_4 3 SYS_PWROK SYS_PWROK 4 A
    1 PWROK_EC
    PWROK_EC 32
    AC_PRESENT R220 10K_4
    TC7SH08FU
    3

    SYS_PWROK R601 *10K_4


    R594
    PM_DRAM_PWRGD R232 200/F_4 100K_4
    Quanta Computer Inc.
    wo S3 leakage, remove R
    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    Panther Point 1/6
    Date: Friday, February 03, 2012 Sheet 7 of 44
    5 4 3 2 1
    5 4 3 2 1

    PCH2(CLG)
    RTC Circuitry(RTC)
    20mils
    +3VPCU
    R445 0_6

    +3V_RTC_1
    D11 www.rosefix.com
    +3V_RTC

    R596 20K_4 RTC_RST# C564 18p/50V_4


    CPT/PPT (HDA,JTAG,SATA)

    2
    1
    20MIL J1
    BAT54C C614 Y3 U20A
    1u/6.3V_4 32.768KHZ R524
    R448 30mils *SHORT_PAD 10M_4 RTC_X1 A20 C38

    2
    RTCX1 FWH0 / LAD0 LPC_LAD0 24,32
    1K_4 A38

    LPC
    LPC_LAD1 24,32

    3
    4
    C563 18p/50V_4 RTC_X2 FWH1 / LAD1
    C20 RTCX2 FWH2 / LAD2 B37 LPC_LAD2 24,32
    20MIL CN11 FWH3 / LAD3 C37 LPC_LAD3 24,32
    R593 20K_4 SRTC_RST# RTC_RST# D20 RTCRST#
    D 1 FWH4 / LFRAME# D36 LPC_LFRAME# 24,32 D

    1
    J2 SRTC_RST# G22
    2 SRTCRST#
    C620 C612 E36 PCH_DRQ#0 TP24

    RTC
    SM_INTRUDER# LDRQ0#
    RTC_CON. 1u/6.3V_4 1u/6.3V_4 +3V_RTC R216 1M_4 K22 INTRUDER# +3V LDRQ1# / GPIO23 K36 PCH_DRQ#1 TP23
    *SHORT_PAD

    2
    PCH_INVRMEN
    10/5 chnage footprint & PN Add MOSFET to separate CODEC SYNC signal C17 INTVRMEN SERIRQ V5
    R287 8.2K_4
    IRQ_SERIRQ 32
    +3V
    CN13 battery +5V R201 10K_4
    AM3 SATA_RXN0_C 25
    DFWF02MS118 AHL03003022 SATA0RXN

    2
    ACZ_BITCLK_R N34 AM1
    HDA_BCLK SATA0RXP SATA_RXP0_C 25

    SATA 6G
    AHL03003024 SATA0TXN AP7 SATA_TXN0 25 SATA HDD
    ACZ_SYNC_CODEC 1 3 ACZ_SYNC_R L34 AP5 SATA_TXP0 25
    HDA_SYNC SATA0TXP
    Q13 SPKR T10 AM10
    HDA Bus(CLG) 26 PCH_AZ_CODEC_BITCLK R202 33_4 ACZ_BITCLK_R CRB 1.0
    R175
    2N7002K
    26 SPKR
    ACZ_RST#_R
    SPKR SATA1RXN
    SATA1RXP AM8
    SATA_RXN_SSD
    SATA_RXP_SSD
    24
    24
    R176 33_4 ACZ_SYNC_CODEC 1M_4
    K34 HDA_RST# SATA1TXN AP11
    AP10
    SATA_TXN_SSD 24 SSD
    26 PCH_AZ_CODEC_SYNC SATA1TXP SATA_TXP_SSD 24

    26 PCH_AZ_CODEC_RST# R198 33_4 ACZ_RST#_R 26 PCH_AZ_CODEC_SDIN0 E34 AD7


    HDA_SDIN0 SATA2RXN
    SATA2RXP AD5
    26 PCH_AZ_CODEC_SDOUT R506 33_4 ACZ_SDOUT_R G34 AH5 DG recommended that AC coupling capacitors should be
    TP25 HDA_SDIN1 SATA2TXN
    SATA2TXP AH4 TP64 close to the connector (<100 mils) for optimal signal quality.
    C34

    IHDA
    HDA_SDIN2
    SATA3RXN AB8
    A34 AB10
    PCH JTAG Debug (CLG) +3V_S5 HDA_SDIN3 SATA3RXP
    SATA3TXN AF3
    SATA3TXP AF1 TP65
    ACZ_SDOUT_R A36

    SATA
    HDA_SDO
    9/27 add SATA4RXN Y7
    SATA4RXP Y5
    PCH_GPIO33 C36 +3V AD3
    TP60 HDA_DOCK_EN# / GPIO33 SATA4TXN
    R564 R292 R293 AD1 TP37
    210/F_4 210/F_4 210/F_4 PCH_GPIO13 SATA4TXP
    TP28 N32 HDA_DOCK_RST# / GPIO13 +3V_S5
    SATA5RXN Y3 SATA_RXN5_C 25
    PCH_JTAG_TMS_R Y1 SATA ODD
    SATA5RXP SATA_RXP5_C 25
    PCH_JTAG_TDI_R AB3 SATA_TXN5 25
    C PCH_JTAG_TCK PCH_JTAG_TCK SATA5TXN C
    J3 JTAG_TCK SATA5TXP AB1 SATA_TXP5 25
    PCH_JTAG_TDO_R
    PCH_JTAG_TMS_R H7 Y11

    JTAG
    JTAG_TMS SATAICOMPO
    R553 R552 PCH_JTAG_TDI_R K5 Y10 SATA_COMP R236 37.4/F_4 +1.05V
    51_4 *100/F_4 R279 R280 JTAG_TDI SATAICOMPI
    100/F_4 100/F_4 PCH_JTAG_TDO_R H1 JTAG_TDO SATA3_COMP R231 49.9/F_4
    SATA3RCOMPO AB12

    SATA3COMPI AB13

    PCH_SPI_CLK T3 AH1 SATA3_RBIAS R561 750/F_4


    PCH Dual SPI (CLG) (Default for WIN8) 32 PCH_SPI_CLK
    PCH_SPI_CS0#
    SPI_CLK SATA3RBIAS
    Y14 SPI_CS0#
    W25Q32BVSSIG / AKE391P0N00----->4MB R570 10K_4 +3V
    MX25L3206EM2I / AKE39FP0Z02----->4MB R336 10K_4 PCH_SPI_CS1# T1

    SPI
    +3VPCU SPI_CS1#
    MX25L1606EM2I / AKE38FP0Z01----->2MB P3 SATA_ACT# SATA_ACT# 31
    SATALED#
    W25Q16BVSSIG / AKE38FP0N01----->2MB
    32 PCH_SPI_SI PCH_SPI_SI V4 +3V V14 SATA0GP R274 10K_4 +3V
    SPI_MOSI SATA0GP / GPIO21
    for BA W25Q64BVSSIG / AKE3EFP0N00----->8MB
    32 PCH_SPI_SO PCH_SPI_SO U3 +3V P1 BBS_BIT0 SATA0GP/GPIO21
    R319 NBA@0_6 SPI_MISO SATA1GP / GPIO19
    +3V_S5 +3V_PCH_ME SATA4GP/GPIO16

    +3V_M R551 BA@0_6 PCH Strap Table PANTHER POINT


    SATA5GP/GPIO49
    If these pins are unused use 8.2k
    10/31 add 10/11 add +3V_PCH_ME to 10k pull-up to +Vcc3_3 or 8.2k
    U6 to 10k pull-down to ground
    PCH_SPI_CS0# Pin Name Strap description Sampled Configuration
    1 CE# VDD 8
    PCH_SPI_CLK R324 33_4 6 0 = Default (weak pull-down 20K)
    PCH_SPI_SI R334 33_4 5 SCK R301 *1K_4 SPKR
    PCH_SPI_SO SI SPKR No reboot mode setting PWROK +3V
    R322 33_4 2 7 R320 3.3K_4 1 = Setting to No-Reboot mode
    SO HOLD#
    3 WP# VSS 4 0 = "top-block swap" mode
    C344 C338 GNT3# / GPIO55 Top-Block Swap Override PWROK R171 *1K_4 Used as GPIO only. at chklist 1.2
    PCI_GNT3# 9
    B *22p/50V_4 ROM-2M 0.1u/10V_4 1 = Default (weak pull-up 20K) B

    INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up R526 330K_4 PCH_INVRMEN
    +3V_RTC
    +3V_PCH_ME R328 3.3K_4

    +3V_PCH_ME
    GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK GNT1# GNT0# Boot Location
    10/11 add
    U8 Default weak pull-up on GNT0/1#
    PCH_SPI_CS1# 1 1 SPI R473 *1K_4
    PCH_SPI_CLK R325
    1
    33_4 6 CE# VDD 8 * BBS_BIT1 9
    [Need external pull-down for LPC BIOS]
    PCH_SPI_SI R333 33_4 5 SCK R558 *1K_4 BBS_BIT0
    PCH_SPI_SO R326 33_4 2 SI GPIO19 Boot BIOS Selection 0 [bit-0] PWROK 0 0 LPC
    SO HOLD# 7 R335 3.3K_4

    C343
    3 WP# VSS 4
    C351
    0 = effect (default)(weak pull-down 20K) R505 *SHORT_4 ACZ_SDOUT_R
    HDA_SDO Flash Descriptor Security RSMRST 32 ME_WR ME_WR default EC setting folating
    *22p/50V_4 SP@ROM-4M 0.1u/10V_4 1 = overridden
    0 = Set to Vss (weak pull-down 20K) R548 2.2K_4 for future CPU, Sandy Bridge NC
    +1.8V 0930
    DF_TVS DMI/FDI Termination voltage PWROK H_SNB_IVB# 3 DF_TVS needs to be pulled up to VccDFTERM power rail
    +3V_PCH_ME R339 3.3K_4 1 = Set to Vcc R546 1K_4 DF_TVS 10 through 2.2 kOhm ±5% - R8361 change to 0 or not??
    0 = Disable
    GPIO28 On-die PLL Voltage Regulator RSMRST# R277 *1K_4 PLL_ODVR_EN 10
    R321 *0_4 PCH_SPI_CS0# 1 = Enable (weak pull-up 20K)
    0 = Support by 1.8V (weak pull-down) R177 1K_4 ACZ_SYNC_R
    HDA_SYNC On-Die PLL VR Voltage Select RSMRST +3V_S5 Needs to be pulled High for Huron River platform.
    1 = Support by 1.5V chklist 1.2
    32 SPI_CS0#_UR_ME R331 0_4 PCH_SPI_CS1#
    Intel ME Crypto Transport Layer 0 = Disable (Default)
    GPIO15 Security (TLS) cipher suite RSMRST R563 1K_4
    1 = Enable +3V_S5 PCH_GPIO15 10
    internal PD
    A A

    DEEP S4/S5 well High = Enable (Default) +3V_RTC R530 330K_4 DSWVREN 7
    DSWVREN On Die DSW VR Enable DSW
    Low = Disable R528 *330K_4
    22,24,25,30,31,32,33,34,41,42 +3VPCU
    22,23,25,26,31,34,41 +5V
    3,28,30,31,34,35,36,41,42 +3V_S5

    Intel Anti-Theft HDD protection


    22,32,35,36,41 +1.05V NV_ALE PWROK 0 = Disable (Internal pull-down 20kohm) +1.8V R308 *1K_4
    NV_ALE 9
    Quanta Computer Inc.
    22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41 +3V Only for Interposer
    10,41 +1.8V PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    Panther Point 2/6
    Date: Friday, February 03, 2012 Sheet 8 of 44
    5 4 3 2 1
    5 4 3 2 1

    6,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41
    3,28,30,31,34,35,36,41,42
    22,32,35,36,41
    +3V
    +3V_S5
    +1.05V

    www.rosefix.com CPT/PPT (PCI,USB,NVRAM)


    U20E
    CPT/PPT (PCI-E,SMBUS,CLK)

    BG34
    BJ34
    U20B

    PERN1
    PERP1 +3V_S5 SMBALERT# / GPIO11
    E12 SMBALERT#
    AY7 AV32
    RSVD1 PETN1 SMB_PCH_CLK
    AV7 AU32 H14
    RSVD2 PETP1 SMBCLK SMB_PCH_CLK 24
    BG26 AU3
    TP1 RSVD3 SMB_PCH_DAT
    BJ26 BG4 BE34 C9
    TP2 RSVD4 PERN2 SMBDATA SMB_PCH_DAT 24
    BH25 BF34
    TP3 PERP2
    BJ16 AT10 BB32
    TP4 RSVD5 PETN2
    BG16 BC8 AY32

    SMBUS
    TP5 RSVD6 PETP2 DRAMRST_CNTRL_PCH
    AH38
    TP6 +3V_S5 SML0ALERT# / GPIO60
    A12 DRAMRST_CNTRL_PCH 4,13,14
    AH37 AU2 28 PCIE_RX3- BG36
    D TP7 RSVD7 PERN3 SMB_ME0_CLK D
    AK43 AT4 28 PCIE_RX3+ BJ36 C8
    TP8 RSVD8 C252 0.1u/10V_4 PCIE_TXN3_C PERP3 SML0CLK
    AK45
    C18
    TP9 RSVD9
    AT3
    AT1
    LAN 28 PCIE_TX3-
    C249 0.1u/10V_4 PCIE_TXP3_C
    AV34
    AU34
    PETN3
    G12 SMB_ME0_DAT For LAN
    TP10 RSVD10 28 PCIE_TX3+ PETP3 SML0DATA
    N30 AY3
    TP11 RSVD11
    H3 AT5 BF36
    TP12 RSVD12 PERN4
    AH12 AV3 BE36
    TP13 RSVD13 PERP4 SML1ALERT#_R R536 *0_4
    AM4
    TP14 RSVD14
    AV1 AY34
    PETN4 +3V_S5 SML1ALERT# / PCHHOT# / GPIO74
    C13 SML1ALERT# 10,31
    AM5 BB1 BB34
    TP15 RSVD15 PETP4 SMB_ME1_CLK
    Y13 BA3 +3V_S5 E14

    PCI-E*
    TP16 RSVD16 SML1CLK / GPIO58
    K24
    L24
    TP17 RSVD17
    BB5
    BB3
    BG37
    BH37
    PERN5
    +3V_S5 M16 SMB_ME1_DAT For EC
    TP18 RSVD18 PERP5 SML1DATA / GPIO75
    AB46 BB7 AY36
    TP19 RSVD19 PETN5
    AB45 BE8 BB36

    RSVD
    TP20 RSVD20 PETP5
    BD4
    RSVD21
    BF6 BJ38
    RSVD22 PERN6
    BG38

    Controller
    PERP6 CL_CLK1
    B21 AV5 NV_ALE 8 AU36 M7 TP33
    TP21 RSVD23 PETN6 CL_CLK1
    M20 AV10 AV36
    TP22 RSVD24 PETP6
    AY16

    Link
    TX AC cap place at connector side, AC cap to TP23 CL_DATA1
    BG46 AT8 BG40 T11 TP36
    TP24 RSVD25 PERN7 CL_DATA1
    connector < 400mils BJ40
    PERP7
    AY5 AY40
    RSVD26 PETN7 CL_RST1#
    BA2 BB40 P10 TP35
    RSVD27 PETP7 CL_RST1#
    BE28 USB30_RX1N
    TP25
    BC30 AT12 BE38
    USB3.0 30 USB30_RX3-
    USB30_RX3- BE32
    TP26 USB30_RX2N
    USB30_RX3N
    RSVD28
    BF3
    24 PCIE_RX8-
    24 PCIE_RX8+ BC38
    PERN8
    TP62 USB30_RX4- TP27 RSVD29 C250 0.1u/10V_4 PCIE_TXN8_C PERP8
    BJ32
    BC28
    TP28 USB30_RX4N
    Port1 and port9 can be used on debug mode
    Wireless 24 PCIE_TX8-
    C253 0.1u/10V_4 PCIE_TXP8_C
    AW38
    AY38
    PETN8
    TP29 USB30_RX1P 24 PCIE_TX8+ PETP8
    BE30 USB30_RX2P
    USB30_RX3+ TP30 CLK_PEGA_REQ#
    30 USB30_RX3+ BF32
    TP31 USB30_RX3P +3V_S5 PEG_A_CLKRQ# / GPIO47
    M10 CLK_PEGA_REQ# 15
    TP61 USB30_RX4+ BG32 C24 USBP0- T41 Y40
    TP32 USB30_RX4P USBP0N CLKOUT_PCIE0N
    TP30 USB30_TX1- AV26 USB30_TX1N A24 USBP0+ T40 Reserve for USB I/O function Y39
    TP33 USBP0P CLKOUT_PCIE0P
    BB26 USB30_TX2N C25 USBP1- 30 XHCI for USBP0-3 AB37 CLK_PCIE_VGA# 15

    CLOCKS
    USB30_TX3- TP34 USBP1N PCIE_CLK_USB30_REQ# CLKOUT_PEG_A_N
    30 USB30_TX3- AU28
    TP35 USB30_TX3N USBP1P
    B25 USBP1+ 30 USB/B-USB1-1/USB debug J2
    PCIECLKRQ0# / GPIO73 +3V_S5 CLKOUT_PEG_A_P
    AB38 CLK_PCIE_VGA 15
    TP26 USB30_TX4- AY30 C26
    TP36 USB30_TX4N USBP2N USBP2- 30
    TP29 USB30_TX1+ AU26 A26 MB USB
    TP37 USB30_TX1P USBP2P USBP2+ 30
    AY26 K28 USBP3- AB49 AV22 CLK_CPU_BCLKN 3
    TP38 USB30_TX2P USBP3N USBP3- 24 CLKOUT_PCIE1N CLKOUT_DMI_N
    USB30_TX3+ AV28 H28 USBP3+ Mini-SSD AB47 AU22 CLK_CPU_BCLKP 3
    30 USB30_TX3+ TP39 USB30_TX3P USBP3P USBP3+ 24 CLKOUT_PCIE1P CLKOUT_DMI_P
    TP27 USB30_TX4+ AW30 E28 EHCI1
    TP40 USB30_TX4P USBP4N USBP4- 30
    C D28 BLUETOOTH PCIE_CLKREQ1# M1 +3V C
    USBP4P USBP4+ 30 PCIECLKRQ1# / GPIO18
    C28 USBP5- T39 AM12 CLK_DPLL_SSCLKN 3
    USBP5N USBP5+ T38 CLKOUT_DP_N
    USBP5P
    A28 Reserve for SIM card CLKOUT_DP_P
    AM13 CLK_DPLL_SSCLKP 3
    C29 AA48
    USBP6N USB port6/7 may not be available on all PCH sku CLKOUT_PCIE2N
    B29 AA47
    PCI_PIRQA# USBP6P (HM55 support 12port only) CLKOUT_PCIE2P CLK_BUF_PCIE_3GPLLN
    K40 N28 BF18
    PCI_PIRQB# PIRQA# USBP7N PCIE_CLK_REQ2# CLKIN_DMI_N CLK_BUF_PCIE_3GPLLP
    K38 M28 V10 +3V BE18
    PCI

    PCI_PIRQC# PIRQB# USBP7P PCIECLKRQ2# / GPIO20 CLKIN_DMI_P


    H38 L30 USBP8- 22
    PCI_PIRQD# PIRQC# USBP8N
    G38
    PIRQD# USBP8P
    K30 USBP8+ 22 Camera
    G30 Y37 BJ30 CLK_BUF_BCLKN
    USBP9N USBP9- 30 CLKOUT_PCIE3N CLKIN_GND1_N
    dGPU_EDIDSEL# CLK_BUF_BCLKP
    REQ1# / GPIO50 +3V USB/B-USB1-2
    C46 E30 Y36 BG30
    USB

    USBP9P USBP9+ 30 CLKOUT_PCIE3P CLKIN_GND1_P


    dGPU_SELECT#
    REQ2# / GPIO52 +3V
    C44 C30 USBP10- 24
    REQ#3 USBP10N PCIE_CLKREQ3#
    REQ3# / GPIO54 +3V Mini Card (WLAN) +3V_S5
    E40 A30 USBP10+ 24 A8
    USBP10P PCIECLKRQ3# / GPIO25 CLK_BUF_DREFCLKN
    USBP11N
    L32 EHCI2 CLKIN_DOT_96N
    G24
    CLK_BUF_DREFCLKP
    GNT1# / GPIO51 +3V Reserve for card reader
    8 BBS_BIT1 D47 K32 E24
    USBP11P CLKIN_DOT_96P
    GNT2# / GPIO53 +3V
    10 BOARD_ID2 E42 G32 Y43
    USBP12N CLKOUT_PCIE4N
    GNT3# / GPIO55 +3V Reserve for Touch pad
    8 PCI_GNT3# F46 E32 Y45
    USBP12P CLKOUT_PCIE4P CLK_BUF_DREFSSCLKN
    C32 AK7
    11/2 modify USBP13N PCIE_CLKREQ4# CLKIN_SATA_N CLK_BUF_DREFSSCLKP
    USBP13P
    A32 Reserve for FP L12
    PCIECLKRQ4# / GPIO26 +3V_S5 CLKIN_SATA_P
    AK5
    G_SENSOR_INT#_PCH
    PIRQE# / GPIO2 +3V
    25 G_SENSOR_INT#_PCH G42
    dGPU_PWR_EN
    PIRQF# / GPIO3 +3V
    40 dGPU_PWR_EN G40
    DGPU_HOLD_RST# USB_BIAS R507 22.6/F_4 CLK_PCH_SRC5# CLK_PCH_14M
    PIRQG# / GPIO4 +3V
    15 DGPU_HOLD_RST# C42 C33 24 CLK_PCH_SRC5# V45 K45
    EXTTS_SNI_DRV1_PCH USBRBIAS# CLK_PCH_SRC5 CLKOUT_PCIE5N REFCLK14IN
    PIRQH# / GPIO5 +3V
    D44 24 CLK_PCH_SRC5 V46
    CLKOUT_PCIE5P
    B33
    Wireless PCIE_CLKREQ5# L14 +3V_S5 H45 CLK_PCI_FB C538 27p/50V_4
    USBRBIAS 24 PCIE_CLK_REQ5# PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK
    TP32 PCI_PME# K10

    2
    PME#
    3 PCI_PLTRST# PCI_PLTRST# C6 +3V_S5 A14 USB_OC0# CLK_PCIE_LOM# AB42 V47 XTAL25_IN Y2
    PLTRST# OC0# / GPIO59 28 CLK_PCIE_LOM# CLKOUT_PEG_B_N XTAL25_IN
    +3V_S5 K20 USB_OC1# USB_OC1# 30 CLK_PCIE_LOM AB40 V49 XTAL25_OUT R486 25MHz
    OC1# / GPIO40 28 CLK_PCIE_LOM CLKOUT_PEG_B_P XTAL25_OUT
    +3V_S5 USB_OC2# 1M_4
    B17 LAN

    1
    OC2# / GPIO41 USB_OC3# CLK_PCIE_LAN_REQ#
    H49
    CLKOUT_PCI0 +3V_S5 OC3# / GPIO42
    C16 28 CLK_PCIE_LAN_REQ# E6
    PEG_B_CLKRQ# / GPIO56+3V_S5
    TP22 H43 +3V_S5 L16 USB_OC4# USB_OC4# 30 C539 33P/50V_4
    CLK_PCI_FB R485 22_4 CLK_PCI_FB_C CLKOUT_PCI1 OC4# / GPIO43 USB_OC5# XCLK_RCOMP R478 90.9/F_4
    J48
    CLKOUT_PCI2 +3V_S5 OC5# / GPIO9
    A16
    XCLK_RCOMP
    Y47 +1.05V
    24 CLK_LPC_DEBUG R183 22_4 CLK_LPC_DEBUG_C K42 +3V_S5 D14 USB_OC6# V40
    R184 22_4 CLK_PCI_775_C CLKOUT_PCI3 OC6# / GPIO10 USB_OC7# T6 CLK_PCH_SRC6P CLKOUT_PCIE6N
    32 CLK_PCI_775 H40
    CLKOUT_PCI4 +3V_S5 OC7# / GPIO14
    C14 V42
    CLKOUT_PCIE6P
    CLK_PCIE_REQ6# T13 +3V_S5
    PANTHER POINT PCIECLKRQ6# / GPIO45
    V38 +3V K43 SKU_ID1

    FLEX CLOCKS
    T8 CLK_PCH_SRC7P CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
    V37
    B CLKOUT_PCIE7P Zero_ODD_ID 11/24 modify B
    +3V CLKOUTFLEX1 / GPIO65
    F47 Zero_ODD_ID 10
    CLK_PCIE_REQ7# K12 +3V_S5
    PCIECLKRQ7# / GPIO46
    +3V CLKOUTFLEX2 / GPIO66
    H47 BOARD_ID4 10,31
    T11 CLK_ITPN AK14
    For XDP T13 CLK_ITPP AK13
    CLKOUT_ITPXDP_N
    CLKOUT_ITPXDP_P +3V CLKOUTFLEX3 / GPIO67
    K49 48M_CLK_CR T37

    PANTHER POINT

    PLTRST#(CLG) PCI/USBOC# Pull-up(CLG) +3V CLK_REQ/Strap Pin(CLG) SMBus(EC) SMBus(PCH)


    +3V_S5 PCI_PIRQA# R161 8.2K_4 +3V_S5 +3V
    R534 PCI_PIRQB# R191 8.2K_4 +3V_S5
    +3V 10/11 modify 10 1 USB_OC6# PCI_PIRQC# R469 8.2K_4
    USB_OC1# 9 2 USB_OC0# PCI_PIRQD# R170 8.2K_4 R565 10K_4 PCIE_CLK_USB30_REQ#
    USB_OC4# 8 3 USB_OC7# R549 10K_4 PCIE_CLKREQ3#
    USB_OC2# 7 4 USB_OC5# R294 10K_4 PCIE_CLKREQ4# R149 R603
    USB_OC3# 6 5 11/2 modify R225 10K_4 PCIE_CLKREQ5# 2.2K_4 S5 4.7K_4 S0

    2
    C605 +3V R306 10K_4 CLK_PCIE_LAN_REQ#
    0.1u/10V_4 10K_10P8R R479 R278 10K_4 CLK_PCIE_REQ6#
    10 1 DGPU_HOLD_RST# R281 10K_4 CLK_PCIE_REQ7# 32 2ND_MBCLK 3 1 SMB_ME1_CLK SMB_PCH_DAT 3 1
    5

    11/2 modify G_SENSOR_INT#_PCH 9 2 EXTTS_SNI_DRV1_PCH CLK_SDATA 13,14,25,31


    PCI_PLTRST# 2 8 3 dGPU_EDIDSEL# +3V Q7 Q41
    4 PLTRST# 15,24,28,32 REQ#3 7 4 dGPU_SELECT# 2N7002K 2N7002K
    1 dGPU_PWR_EN 6 5 R556 10K_4 PCIE_CLKREQ1#
    R273 10K_4 PCIE_CLK_REQ2# +3V_S5 +3V
    U22 10K_10P8R
    3

    TC7SH08FU R582
    100K_4 9/26 modify
    R586 *10K_4 CLK_PEGA_REQ# R150 R602
    dGPU_PW_CTRL# SKU_ID1 SKU_ID0 VGA H/W Setup 2.2K_4 4.7K_4

    2
    +3V (GPIO68) (GPIO64) (GPIO16) Signal Menu
    CTL : dGPU_VRON
    R495 SP@1K_4 dGPU_PW_CTRL# 10 32 2ND_MBDATA 3 1 SMB_ME1_DAT SMB_PCH_CLK 3 1
    A R496 SP@100K_4 CLK_SCLK 13,14,25,31 A
    UMA Only 1 0 0 UMA Hidden UMA boot CLK_BUF_BCLKN R514 10K_4 Q8 Q40
    CLK_BUF_BCLKP R513 10K_4 2N7002K 2N7002K

    +3V dGPU Only 0 0 1 GPU Hidden GPU boot


    CLK_BUF_PCIE_3GPLLN R532 10K_4
    R166 SP@10K_4 SKU_ID1 Switchable CLK_BUF_PCIE_3GPLLP R531 10K_4
    R162 SP@10K_4 (Mux) UMA+GPU dGPU/SG UMA boot CLK_BUF_DREFCLKN R211 10K_4 +3V_S5
    CLK_BUF_DREFCLKP R205 10K_4
    Optimize CLK_BUF_DREFSSCLKN R240 10K_4
    (Muxless) 0 1 1 UMA UMA/SG UMA boot CLK_BUF_DREFSSCLKP R244 10K_4 R246 1K_4 DRAMRST_CNTRL_PCH
    +3V CLK_PCH_14M R163 10K_4

    R571 SP@10K_4
    R295
    R590
    10K_4
    2.2K_4
    SMBALERT#
    SMB_PCH_CLK
    Quanta Computer Inc.
    SKU_ID0 10 dGPU_PW_CTRL# CLOCK TERMINATION for FCIM
    R559 SP@10K_4 1 = GPU power is control by H/W (pure Discrete SKU) R591 2.2K_4 SMB_PCH_DAT
    0 = GPU power is control by PCH GPIO (Discrete, SG or Optimize) R296 2.2K_4 SMB_ME0_CLK PROJECT : ZQTA/ZQSA
    --->(Default) R283 2.2K_4 SMB_ME0_DAT Size Document Number Rev
    R537 10K_4 SML1ALERT#_R 1A
    Panther Point 3/6
    Date: Friday, February 03, 2012 Sheet 9 of 44
    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com
    6,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41
    3,28,30,31,34,35,36,41,42
    +3V
    +3V_S5 CPT/PPT (GPIO,VSS_NCTF,RSVD)
    U20F

    S_GPIO R276 100_4 T7 +3V +3V C40 dGPU_PW _CTRL# 9


    BMBUSY# / GPIO0 TACH4 / GPIO68
    SIO_EXT_SMI# A42 +3V +3V B41
    32 SIO_EXT_SMI# TACH1 / GPIO1 TACH5 / GPIO69 CABLE_ID 22 GPIO Pull-up/Pull-down(CLG)
    BOARD_ID1 H36 +3V +3V C41 BOARD_ID3
    D TACH2 / GPIO6 TACH6 / GPIO70 D

    32 SIO_EXT_SCI# SIO_EXT_SCI# E38 +3V +3V A40 R491 10K_4 +3V +3V_S5
    TACH3 / GPIO7 TACH7 / GPIO71
    TP63 C10 +3V_S5 PCH_GPIO24 R307 *10K_4
    GPIO8
    TP66 GPIO12 C4 +3V_S5 PLL_ODVR_EN R303 10K_4
    LAN_PHY_PWR_CTRL / GPIO12
    SIO_A20GATE
    8 PCH_GPIO15 G2 GPIO15 +3V_S5 A20GATE P4 SIO_A20GATE 32 +3V
    10/31 modify
    AU16 PCH_PECI TP31
    PECI SIO_EXT_SMI# R148 10K_4
    9 SKU_ID0 U2 SATA4GP / GPIO16 +3V SIO_RCIN# SIO_EXT_SCI# R145 10K_4
    RCIN# P5 SIO_RCIN# 32

    GPIO
    15,19 DGPU_PW ROK D40 +3V AY11 H_PW RGOOD 3 STP_PCI# R566 *10K_4

    CPU/MISC
    TACH0 / GPIO17 PROCPWRGD SIO_A20GATE R290 10K_4
    G_SENSOR_ID T5 +3V AY10 PCH_THRMTRIP# R249 390_4 PM_THRMTRIP# 3 SIO_RCIN# R304 10K_4
    SCLOCK / GPIO22 THRMTRIP# CRIT_TEMP_REP# R560 10K_4
    PCH_GPIO24 E8 GPIO24 / MEM_LED +3V_S5 INIT3_3V# T14
    +1.8V
    1/5 modify 32 W K_GPIO27 W K_GPIO27 E16 DSW AY1 DF_TVS DF_TVS 8 DF_TVS R550 *1K_4
    GPIO27 DF_TVS

    8 PLL_ODVR_EN PLL_ODVR_EN P8 +3V_S5 Follow the Emerald Lake 2 CRB


    GPIO28
    TS_VSS1 AH8
    STP_PCI# K1 +3V
    STP_PCI# / GPIO34 W K_GPIO27 R223 *10K_4
    TS_VSS2 AK11
    39,40 dGPU_VRON K4 GPIO35 +3V
    TS_VSS3 AH10
    C DMI_OVRVLTG V8 +3V C
    SATA2GP / GPIO36
    TS_VSS4 AK10
    FDI_OVRVLTG M5 +3V GPIO27 : If not used then use 8.2-kΩ to 10-kΩ pull-down to GND.
    SATA3GP / GPIO37
    MFG_MODE N2 +3V P37
    SLOAD / GPIO38 NC_1
    BOARD_ID0 M3 +3V
    SDATAOUT0 / GPIO39
    TEST_SET_UP V13 +3V BG2
    SDATAOUT1 / GPIO48 VSS_NCTF_15

    9,31 SML1ALERT# R572 *SHORT_4 CRIT_TEMP_REP# V3 +3V BG48


    SATA5GP / GPIO49 VSS_NCTF_16
    TP34 SV_DET_NC 11/24 add
    D6 GPIO57 +3V_S5 VSS_NCTF_17 BH3

    R266 100K_4 BH47


    VSS_NCTF_18
    Zero ODD ID
    A4 VSS_NCTF_1 VSS_NCTF_19 BJ4

    10/11 modify A44 VSS_NCTF_2 VSS_NCTF_20 BJ44 Zero ODD ------->High


    A45 BJ45
    None Zero ODD ------->Low
    VSS_NCTF_3 VSS_NCTF_21 +3V

    NCTF
    A46 VSS_NCTF_4 VSS_NCTF_22 BJ46
    R348 ZP@10K_4
    Zero_ODD_ID 9
    A5 VSS_NCTF_5 VSS_NCTF_23 BJ5
    R357 NZP@10K_4
    A6 VSS_NCTF_6 VSS_NCTF_24 BJ6
    B B
    B3 VSS_NCTF_7 VSS_NCTF_25 C2

    B47 VSS_NCTF_8 VSS_NCTF_26 C48

    BD1 D1 SV_SET_UP Reserve for future +3V


    VSS_NCTF_9 VSS_NCTF_27
    BD49 D49 R555 U3@10K_4 BOARD_ID0 R568 U2@10K_4
    VSS_NCTF_10 VSS_NCTF_28 High = Strong (Default) R471 NCH@10K_4BOARD_ID1 R467 CH@10K_4
    BE1 E1 +3V
    VSS_NCTF_11 VSS_NCTF_29 R490 *10K_4 BOARD_ID3 R487 10K_4
    BE49 E49 TEST_SET_UP R272 10K_4 R472 *10K_4 BOARD_ID4 R468 10K_4
    VSS_NCTF_12 VSS_NCTF_30 R285 *1K_4
    BF1 VSS_NCTF_13 VSS_NCTF_31 F1 BOARD_ID3 31
    BOARD_ID4 9,31
    BF49 VSS_NCTF_14 VSS_NCTF_32 F49

    SGPIO BOARD_ID2
    PANTHER POINT

    8 Layer ------->High *
    SATA2GP : strap for reserved at chklist 1.2 +3V 6 Layer ------->Low
    +3V
    SATA3GP : strap for reserved at chklist 1.2 S_GPIO R302 1K_4
    NOTE: The internal pull-down is disabled after PLTRST# deasserts. R289 *1K_4 R167 *10K_4
    BOARD_ID2 9
    NOTE: This signal should not be pulled high when strap is sampled. R172 10K_4
    A A

    +3V +3V +3V


    R288
    R305 100K_4 FDI_OVRVLTG R291 *1K_4 DMI_OVRVLTG R286 *200K/F_4 G_SENSOR_ID NGS@10K_4
    R275 GS@1K_4
    MFG-TEST Quanta Computer Inc.
    +3V
    Low = Tx, Rx terminated to
    FDI TERMINATION LOW - Tx, Rx terminated DMI TERMINATION same voltage (DC Coupling Mode) High = W/O G_SENSOR MFG_MODE R569 10K_4 PROJECT : ZQTA/ZQSA
    VOLTAGE OVERRIDE to same voltage VOLTAGE OVERRIDE (DEFAULT) BIOS RECOVERY R557 *1K_4 Size Document Number Rev
    Low = W G_SENSOR Panther Point 4/6 1A

    Date: Friday, February 03, 2012 Sheet 10 of 44


    5 4 3 2 1
    5 4 3 2 1

    PCH5(CLG)

    +1.05V +1.05V_PCH_VCC
    www.rosefix.com CPT/PPT (POWER)

    U20G POWER
    VccADAC =1mA(8mils)
    +VCCA_DAC_1_2

    L30
    +3V

    HCB1608KF-181T15/180ohm/1.5A_6
    +1.05V R480 *0_8
    CPT/PPT (POWER)
    +1.05V_VCCUSBCORE +1.05V
    VccCORE =1.3 A(60mils) C525 C541 C540 C527
    R284 *SHORT_1206 AA23
    VCCCORE[1] VCCADAC
    U48 22u/6.3V_8 0.01u/25V_4 0.1u/10V_4 10u/6.3V_6 U20J POWER R203 *SHORT_8
    AC23 VCCCORE[2]

    CRT
    AD21 +VCCACLK AD49 N26
    C266 C272 C262 C289 VCCCORE[3] +VCCALVDS +3V VCCACLK VCCIO[29] C269
    AD23 VCCCORE[4] VSSADAC U47

    VCC CORE
    1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6 AF21 VccALVDS=1mA(8mils) VCCDSW3_3= 3mA P26 1u/6.3V_4 VCCSUS3_3 = 119mA(15mils)
    VCCCORE[5] R195 IV@0_4 R250 *SHORT_4 +VCCPDSW VCCIO[30]
    AF23 VCCCORE[6] +3V_S5 T16 VCCDSW3_3
    AG21 P28 +3V_S5
    D R5285 near PCH ball for VCCP GND sense VCCCORE[7] R190 DO@0_4 VCCIO[31] D
    AG23
    VCCCORE[8] C319 PCH_VCCDSW R243 *SHORT_6
    AG24 VCCCORE[9] VCCALVDS AK36 V12 DCPSUSBYP VCCIO[32] T27
    +1.05V +1.05V_PCH_VCCDPLL_EXP AG26 When Dis sku, LVDS power can short to GND 0.1u/10V_4
    VCCCORE[10]
    AG27 VCCCORE[11] VSSALVDS AK37 VCCIO[33] T29
    R224 *SHORT_6 AG29 +VCC_TX_LVDS +1.8V C309 +3V_SUS_CLKF33 T38 C316
    VCCCORE[12] +1.05V +VCCAPLL_CPY_PCH *0.1u/10V_4 VCC3_3[5] 0.1u/10V_4
    AJ23 VccTX_LVDS=60mA(10mils)

    LVDS
    VCCCORE[13] L34 +3V_VCCPUSB
    AJ26 AM37 T23
    +1.05V +1.05V_VCCAPLL_EXP VCCCORE[14] VCCTX_LVDS[1] IV@0.1uH/250mA_8 L35 *10uH/100mA_8 VCCSUS3_3[7]
    AJ27 BH23
    VCCCORE[15] VCCAPLLDMI2
    AJ29 VCCCORE[16] VCCTX_LVDS[2] AM38 VCCSUS3_3[8] T24
    L36 *1uH/25mA_6 AJ31 C554 C553 C552 R511 DO@0_4 +1.05V R199 *SHORT_6 +VCCDPLL_CPY AL29 R235 *SHORT_6
    VCCCORE[17] IV@0.01u/25V_4 IV@22u/6.3V_8 C565 VCCIO[14]
    AP36 V23

    USB
    VCCTX_LVDS[3] *10u/6.3V_6 VCCSUS3_3[9]
    C569 AP37 IV@0.01u/25V_4 +VCCSUS1 AL24 V24 C308
    *10u/6.3V_6 VCCTX_LVDS[4] DCPSUS[3] VCCSUS3_3[10] 0.1u/10V_4
    AN19 VCCIO[28]
    P24 +3V_VCCAUBG
    C271 VCCSUS3_3[6]
    VCCME(+1.05V) = ??A(??mils)
    BJ22 +3V_VCC_GIO +3V *1u/6.3V_4 AA19
    +1.05V +1.05V_VCCIO VCCAPLLEXP VCCASW[1] +VCCAUPLL R209 *SHORT_6
    VCCIO[34] T26 +1.05V
    R196 *SHORT_6 +1.05V +1.05V_VCCEPW VCC5REFSUS=1mA
    VccIO =2.925 A(140mils) V33 AA21

    HVCMOS
    R533 *SHORT_1206 VCC3_3[6] VCCASW[2]
    AN16
    VCCIO[15] VccASW =1.01 A(60mils)
    VCCDMI = 42mA(10mils) R587 NBA@0_1206 AA24 M26 +5V_PCH_VCC5REFSUS R229 10/F_4 +5V_S5
    C260 +1.05V VCCASW[3] V5REF_SUS
    AN17 VCCIO[16]

    Clock and Miscellaneous


    C290 C259 C263 V34 0.1u/10V_4 +1.1V_VCC_DMI R648 BA@0_1206 AA26 D6 RB500V-40
    VCC3_3[7] +1.05V_M VCCASW[4] +3V_S5
    1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 C267 C286 C273 AN23 +VCCA_USBSUS C302
    R258 *SHORT_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 DCPSUS[4] 0.1u/10V_4
    AN21 AA27
    VCCIO[17] VCCASW[5] +3V_VCCPSUS
    VCCSUS3_3[1] AN24
    AN26 AA29 C285
    VCCIO[18] VCCASW[6] *1u/6.3V_4
    AN27 AT16 +VCCAFDI_VRM +VCCAFDI_VRM C318 AA31 V5REF= 1mA
    VCCIO[19] VCCVRM[3] VCCASW[7]
    1u/6.3V_4
    C265 C291 AP21 AC26 P34 +5V_PCH_VCC5REF R168 10/F_4 +5V
    1u/6.3V_4 10u/6.3V_6 VCCIO[20] C603 C257 VCCASW[8] V5REF
    AP23 AT20 VCCCLKDMI = 20mA(8mils) 22u/6.3V_8 22u/6.3V_8 AC27 D5 RB500V-40 +3V
    VCCIO[21] VCCDMI[1] VCCASW[9] C240
    N20

    DMI

    PCI/GPIO/LPC
    +1.1V_VCC_DMI_CCI +VCC_DMI_CCI +1.05V VCCSUS3_3[2] 1u/6.3V_4
    AP24 AC29

    VCCIO
    VCCIO[22] VCCASW[10]
    VCCSUS3_3[3] N22
    AP26 AB36 L31 R477 *1/F_4 AC31
    VCCIO[23] VCCCLKDMI *10uH/100mA_8 VCCASW[11] +3V_VCCPSUS R238 *SHORT_6
    P20 +3V_S5
    R474 0_4 VCCSUS3_3[4]
    AT24 AD29
    +3V +3V_VCC_EXP VCCIO[24] C532 C530 VCCASW[12]
    C
    VCCSUS3_3[5] P22 VCCSUS3_3 = 119mA(15mils) C
    1u/6.3V_4 *10u/6.3V_6 AD31 C311
    R519 *SHORT_8 VCCASW[13] 1u/10V_4
    AN33
    VCCIO[25]
    W21 AA16
    VCCASW[14] VCC3_3[1]
    AN34 AG16
    C558 VCCIO[26] VCCDFTERM[1] +VCCP_NAND +1.8V +3V_VCCPCORE R247 *SHORT_6
    VCCPNAND = 190 mA(15mils) W23 VCCASW[15] VCC3_3[8] W16 +3V
    0.1u/10V_4
    BH29 AG17 R300 *SHORT_8 W24 T34 VCCPCORE = 28mA(10mils)

    DFT / SPI
    VCC3_3[3] VCCDFTERM[2] VCCASW[16] VCC3_3[4] +3V
    C315
    W26 0.1u/10V_4
    C332 VCCASW[17] C255
    VCCDFTERM[3] AJ16
    0.1u/10V_4 W29 0.1u/10V_4
    +VCCAFDI_VRM VCCASW[18]
    +VCCAFDI_VRM AP16
    VCCVRM[2] +1.05V
    AJ17 W31 AJ2 +3V
    VCCDFTERM[4] VCCASW[19] VCC3_3[2]
    +1.05V R542 *0_8 +1.05V_VCCAPLL_FDI BG6 VCCSPI = 20mA(8mils) R562 *SHORT_6 W33
    VccAFDIPLL VCCASW[20] C317
    AF13
    +3V_VCCME_SPI +3V_S5 VCCIO[5] 0.1u/10V_4
    R267 *SHORT_8 +1.05V_VCCDPLL_FDI AP17 C599 C299 0.1u/10V_4 +VCCRTCEXT N16
    VCCIO[27] DCPRTC
    FDI

    V1 R575 NBA@0_6 10/31 add 1u/6.3V_4 AH13 +V1.05S_SATA3 R299 *SHORT_8 +1.05V
    VCCSPI VCCIO[12]

    +1.1V_VCC_DMI AU20 R647 BA@0_6 +VCCAFDI_VRM +VCCAFDI_VRM Y49 AH14


    VCCDMI[2] +3V_M VCCVRM[4] VCCIO[13]
    R192 *SHORT_6 C331
    1u/10V_4
    PANTHER POINT C593 Reserve +3V_S5 to VCCSPI for EC 795 AF14
    1u/6.3V_4 C256 +1.05V_VCCA_A_DPL VCCIO[6]
    65mA(10mils) BD47 ??mA(??mils)

    SATA
    1u/6.3V_4 VCCADPLLA +V1.1LAN_VCCAPLL L37
    VCCAPLLSATA AK1 +1.05V
    8mA(8mils) +1.05V_VCCA_B_DPL BF47 VCCVRM= 114mA(15mils) *10uH/100mA_8
    VCCADPLLB C594
    R481 *SHORT_6 AF11 +VCCAFDI_VRM *10u/6.3V_6
    +VCCDIFFCLK VCCVRM[1]
    AF17
    +VCCDIFFCLKN VCCIO[7]
    AF33
    C544 VCCDIFFCLKN[1] R228 *SHORT_6
    VCCDIFFCLKN= 55mA(10mils) AF34
    VCCDIFFCLKN[2] VCCIO[2]
    AC16 +1.05V
    1u/6.3V_4 AG34
    +1.05V VCCDIFFCLKN[3]
    AC17
    VCCIO[3] C294
    VCCSSC= 95mA(10mils)
    R226 *0_6 +V1.05V_SSCVCC AG33 AD17 1u/6.3V_4
    +VCCAFDI_VRM VCCSSC VCCIO[4]

    C295 C298 0.1u/10V_4 +VCCSST V16 +1.05V_VCCEPW VCCME = 1.01A(60mils)


    B
    *1u/6.3V_4 DCPSST B
    VCCVRM: 1.8V (Destop)
    +1.5V R263 0_6 1.5V (Mobile)
    +1.05V T17 T21
    R264 *0_6 +V1.05M_VCCSUS DCPSUS[1] VCCASW[22]
    +1.05V V19

    MISC
    DCPSUS[2]
    1mA(8mils)
    R535 *SHORT_4 +VTT_VCCPCPU V21
    VCCASW[23]

    CPU
    BJ8
    C583 C586 V_PROC_IO
    VCCASW[21] T19
    C580 0.1u/10V_4 0.1u/10V_4
    VCCRTC<1mA(8mils) 4.7u/6.3V_6 R159 *0_4 +1.5VSUS

    RTC
    A22 P32 +V3.3A_1.5A_HDA_IO R160 0_4 VCCSUSHDA= 10mA(8mils)

    HDA
    +3V_RTC VCCRTC VCCSUSHDA +3V_S5

    C288 C296 C287 PANTHER POINT C239 C238


    1u/6.3V_4 0.1u/10V_4 0.1u/10V_4 *1u/6.3V_4 0.1u/10V_4

    3,28,30,31,34,35,36,41,42 +3V_S5
    26,30,34,35,36,37,38,39 +5V_S5

    4,5,37 +1.5VSUS

    22,23,25,26,31,34,41 +5V
    6,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41 +3V
    24,37,41 +1.5V +1.05V L32 10uH/100mA_8 +1.05V_VCCA_A_DPL
    22,32,35,36,41 +1.05V

    1
    10,41 +1.8V
    C546 C542
    8 +3V_RTC 1u/6.3V_4
    100U/6.3V_3528

    2
    +3V

    L33 10uH/100mA_8 +1.05V_VCCA_B_DPL


    R165 1/F_4 L15 10uH/100mA_8 +3V_SUS_CLKF33

    1
    C548 C551
    C235 C237 1u/6.3V_4
    10u/6.3V_6 1u/10V_4 100U/6.3V_3528

    2
    A A

    Quanta Computer Inc.


    PROJECT :ZQTA/ZQSA
    Size Document Number Rev
    1A
    Panther Point 5/6
    Date: Friday, February 03, 2012 Sheet 11 of 44
    5 4 3 2 1
    5 4 3 2 1

    PCH6(CLG)
    www.rosefix.com
    U20I

    AY4 H46
    IBEX PEAK-M (GND) AY42
    AY46
    VSS[159]
    VSS[160]
    VSS[259]
    VSS[260] K18
    K26
    VSS[161] VSS[261]
    D AY8 VSS[162] VSS[262] K39 D
    B11 VSS[163] VSS[263] K46
    B15 VSS[164] VSS[264] K7
    B19 VSS[165] VSS[265] L18
    B23 VSS[166] VSS[266] L2
    B27 VSS[167] VSS[267] L20
    B31 VSS[168] VSS[268] L26
    B35 VSS[169] VSS[269] L28
    B39 VSS[170] VSS[270] L36
    B7 VSS[171] VSS[271] L48
    U20H F45 M12
    VSS[172] VSS[272]
    H5 VSS[0] BB12 VSS[173] VSS[273] P16
    BB16 VSS[174] VSS[274] M18
    AA17 VSS[1] VSS[80] AK38 BB20 VSS[175] VSS[275] M22
    AA2 VSS[2] VSS[81] AK4 BB22 VSS[176] VSS[276] M24
    AA3 VSS[3] VSS[82] AK42 BB24 VSS[177] VSS[277] M30
    AA33 VSS[4] VSS[83] AK46 BB28 VSS[178] VSS[278] M32
    AA34 VSS[5] VSS[84] AK8 BB30 VSS[179] VSS[279] M34
    AB11 VSS[6] VSS[85] AL16 BB38 VSS[180] VSS[280] M38
    AB14 VSS[7] VSS[86] AL17 BB4 VSS[181] VSS[281] M4
    AB39 VSS[8] VSS[87] AL19 BB46 VSS[182] VSS[282] M42
    AB4 VSS[9] VSS[88] AL2 BC14 VSS[183] VSS[283] M46
    AB43 VSS[10] VSS[89] AL21 BC18 VSS[184] VSS[284] M8
    AB5 VSS[11] VSS[90] AL23 BC2 VSS[185] VSS[285] N18
    AB7 VSS[12] VSS[91] AL26 BC22 VSS[186] VSS[286] P30
    AC19 VSS[13] VSS[92] AL27 BC26 VSS[187] VSS[287] N47
    AC2 VSS[14] VSS[93] AL31 BC32 VSS[188] VSS[288] P11
    AC21 VSS[15] VSS[94] AL33 BC34 VSS[189] VSS[289] P18
    AC24 VSS[16] VSS[95] AL34 BC36 VSS[190] VSS[290] T33
    AC33 VSS[17] VSS[96] AL48 BC40 VSS[191] VSS[291] P40
    AC34 VSS[18] VSS[97] AM11 BC42 VSS[192] VSS[292] P43
    AC48 VSS[19] VSS[98] AM14 BC48 VSS[193] VSS[293] P47
    C C
    AD10 VSS[20] VSS[99] AM36 BD46 VSS[194] VSS[294] P7
    AD11 VSS[21] VSS[100] AM39 BD5 VSS[195] VSS[295] R2
    AD12 VSS[22] VSS[101] AM43 BE22 VSS[196] VSS[296] R48
    AD13 VSS[23] VSS[102] AM45 BE26 VSS[197] VSS[297] T12
    AD19 VSS[24] VSS[103] AM46 BE40 VSS[198] VSS[298] T31
    AD24 VSS[25] VSS[104] AM7 BF10 VSS[199] VSS[299] T37
    AD26 VSS[26] VSS[105] AN2 BF12 VSS[200] VSS[300] T4
    AD27 VSS[27] VSS[106] AN29 BF16 VSS[201] VSS[301] W34
    AD33 VSS[28] VSS[107] AN3 BF20 VSS[202] VSS[302] T46
    AD34 VSS[29] VSS[108] AN31 BF22 VSS[203] VSS[303] T47
    AD36 VSS[30] VSS[109] AP12 BF24 VSS[204] VSS[304] T8
    AD37 VSS[31] VSS[110] AP19 BF26 VSS[205] VSS[305] V11
    AD38 VSS[32] VSS[111] AP28 BF28 VSS[206] VSS[306] V17
    AD39 VSS[33] VSS[112] AP30 BD3 VSS[207] VSS[307] V26
    AD4 VSS[34] VSS[113] AP32 BF30 VSS[208] VSS[308] V27
    AD40 VSS[35] VSS[114] AP38 BF38 VSS[209] VSS[309] V29
    AD42 VSS[36] VSS[115] AP4 BF40 VSS[210] VSS[310] V31
    AD43 VSS[37] VSS[116] AP42 BF8 VSS[211] VSS[311] V36
    AD45 VSS[38] VSS[117] AP46 BG17 VSS[212] VSS[312] V39
    AD46 VSS[39] VSS[118] AP8 BG21 VSS[213] VSS[313] V43
    AD8 VSS[40] VSS[119] AR2 BG33 VSS[214] VSS[314] V7
    AE2 VSS[41] VSS[120] AR48 BG44 VSS[215] VSS[315] W17
    AE3 VSS[42] VSS[121] AT11 BG8 VSS[216] VSS[316] W19
    AF10 VSS[43] VSS[122] AT13 BH11 VSS[217] VSS[317] W2
    AF12 VSS[44] VSS[123] AT18 BH15 VSS[218] VSS[318] W27
    AD14 VSS[45] VSS[124] AT22 BH17 VSS[219] VSS[319] W48
    AD16 VSS[46] VSS[125] AT26 BH19 VSS[220] VSS[320] Y12
    AF16 VSS[47] VSS[126] AT28 H10 VSS[221] VSS[321] Y38
    AF19 VSS[48] VSS[127] AT30 BH27 VSS[222] VSS[322] Y4
    AF24 VSS[49] VSS[128] AT32 BH31 VSS[223] VSS[323] Y42
    AF26 VSS[50] VSS[129] AT34 BH33 VSS[224] VSS[324] Y46
    B AF27 AT39 BH35 Y8 B
    VSS[51] VSS[130] VSS[225] VSS[325]
    AF29 VSS[52] VSS[131] AT42 BH39 VSS[226] VSS[328] BG29
    AF31 VSS[53] VSS[132] AT46 BH43 VSS[227] VSS[329] N24
    AF38 VSS[54] VSS[133] AT7 BH7 VSS[228] VSS[330] AJ3
    AF4 VSS[55] VSS[134] AU24 D3 VSS[229] VSS[331] AD47
    AF42 VSS[56] VSS[135] AU30 D12 VSS[230] VSS[333] B43
    AF46 VSS[57] VSS[136] AV16 D16 VSS[231] VSS[334] BE10
    AF5 VSS[58] VSS[137] AV20 D18 VSS[232] VSS[335] BG41
    AF7 VSS[59] VSS[138] AV24 D22 VSS[233] VSS[337] G14
    AF8 VSS[60] VSS[139] AV30 D24 VSS[234] VSS[338] H16
    AG19 VSS[61] VSS[140] AV38 D26 VSS[235] VSS[340] T36
    AG2 VSS[62] VSS[141] AV4 D30 VSS[236] VSS[342] BG22
    AG31 VSS[63] VSS[142] AV43 D32 VSS[237] VSS[343] BG24
    AG48 VSS[64] VSS[143] AV8 D34 VSS[238] VSS[344] C22
    AH11 VSS[65] VSS[144] AW14 D38 VSS[239] VSS[345] AP13
    AH3 VSS[66] VSS[145] AW18 D42 VSS[240] VSS[346] M14
    AH36 VSS[67] VSS[146] AW2 D8 VSS[241] VSS[347] AP3
    AH39 VSS[68] VSS[147] AW22 E18 VSS[242] VSS[348] AP1
    AH40 VSS[69] VSS[148] AW26 E26 VSS[243] VSS[349] BE16
    AH42 VSS[70] VSS[149] AW28 G18 VSS[244] VSS[350] BC16
    AH46 VSS[71] VSS[150] AW32 G20 VSS[245] VSS[351] BG28
    AH7 VSS[72] VSS[151] AW34 G26 VSS[246] VSS[352] BJ28
    AJ19 VSS[73] VSS[152] AW36 G28 VSS[247]
    AJ21 VSS[74] VSS[153] AW40 G36 VSS[248]
    AJ24 VSS[75] VSS[154] AW48 G48 VSS[249]
    AJ33 VSS[76] VSS[155] AV11 H12 VSS[250]
    AJ34 VSS[77] VSS[156] AY12 H18 VSS[251]
    AK12 VSS[78] VSS[157] AY22 H22 VSS[252]
    AK3 VSS[79] VSS[158] AY28 H24 VSS[253]
    H26 VSS[254]
    PANTHER POINT H30 VSS[255]
    A H32 VSS[256] A
    H34 VSS[257]
    F3 VSS[258]

    PANTHER POINT

    Quanta Computer Inc.


    PROJECT :ZQTA/ZQSA
    Size Document Number Rev
    Panther Point 6/6 1A

    Date: Friday, February 03, 2012 Sheet 12 of 44


    5 4 3 2 1
    5 4 3 2 1

    4 M_A_A[15:0] www.rosefix.com M_A_A0


    M_A_A1
    98
    97
    JDIM1A

    A0 DQ0 5
    7
    M_A_DQ4
    M_A_DQ0
    M_A_DQ[63:0] 4
    +1.5VSUS

    75
    76
    81
    JDIM1B

    VDD1
    VDD2
    VSS16
    VSS17
    44
    48
    49
    M_A_A2 A1 DQ1 M_A_DQ2 VDD3 VSS18
    96 A2 DQ2 15 82 VDD4 VSS19 54
    M_A_A3 95 17 M_A_DQ3 87 55
    M_A_A4 A3 DQ3 M_A_DQ1 VDD5 VSS20
    92 A4 DQ4 4 88 VDD6 VSS21 60
    M_A_A5 91 6 M_A_DQ5 93 61
    M_A_A6 A5 DQ5 M_A_DQ6 VDD7 VSS22
    90 A6 DQ6 16 2.48A 94 VDD8 VSS23 65
    M_A_A7 86 18 M_A_DQ7 99 66
    M_A_A8 A7 DQ7 M_A_DQ12 VDD9 VSS24
    D 89 A8 DQ8 21 100 VDD10 VSS25 71 D
    M_A_A9 85 23 M_A_DQ13 105 72
    M_A_A10 A9 DQ9 M_A_DQ11 VDD11 VSS26

    PC2100 DDR3 SDRAM SO-DIMM


    107 A10/AP DQ10 33 106 VDD12 VSS27 127
    M_A_A11 84 35 M_A_DQ10 111 128
    M_A_A12 A11 DQ11 M_A_DQ8 VDD13 VSS28
    83 A12/BC# DQ12 22 112 VDD14 VSS29 133
    M_A_A13 119 24 M_A_DQ9 117 134
    M_A_A14 A13 DQ13 M_A_DQ14 VDD15 VSS30
    80 A14 DQ14 34 118 VDD16 VSS31 138
    M_A_A15 78 36 M_A_DQ15 123 139
    A15 DQ15 M_A_DQ17 VDD17 VSS32

    PC2100 DDR3 SDRAM SO-DIMM


    DQ16 39 124 VDD18 VSS33 144
    109 41 M_A_DQ20 145
    4 M_A_BS#0 BA0 DQ17 VSS34
    108 51 M_A_DQ18 199 150
    4 M_A_BS#1 BA1 DQ18 +3V VDDSPD VSS35
    79 53 M_A_DQ19 151
    4 M_A_BS#2 BA2 DQ19 VSS36
    114 40 M_A_DQ16 77 155
    4 M_A_CS#0 S0# DQ20 NC1 VSS37
    121 42 M_A_DQ21 122 156
    4 M_A_CS#1 S1# DQ21 NC2 VSS38
    101 50 M_A_DQ22 R206 *10K_4 125 161
    4 M_A_CLK0 CK0 DQ22 +3V NCTEST VSS39
    103 52 M_A_DQ23 162
    4 M_A_CLK0# CK0# DQ23 VSS40
    102 57 M_A_DQ24 PM_EXTTS#0 198 167
    4 M_A_CLK1 CK1 DQ24 EVENT# VSS41
    104 59 M_A_DQ28 30 168
    4 M_A_CLK1# CK1# DQ25 4,14 DDR3_DRAMRST# RESET# VSS42
    M_A_DQ25
    4 M_A_CKE0 73
    74
    CKE0 DQ26 67
    69 M_A_DQ26
    M3 solution VSS43 172
    173
    4 M_A_CKE1 CKE1 DQ27 VSS44
    115 56 M_A_DQ27 R222 *M3@0_6 +SMDDR_VREF_DQ0 1 178
    4 M_A_CAS# CAS# DQ28 5 SMDDR_VREF_DQ0_M3 VREF_DQ VSS45
    110 58 M_A_DQ29 126 179
    4 M_A_RAS# RAS# DQ29 +SMDDR_VREF_DIMM VREF_CA VSS46
    113 68 M_A_DQ31 184
    4 M_A_WE# WE# DQ30 VSS47
    R208 10K_4 DIMM0_SA0 197 70 M_A_DQ30 185
    R207 10K_4 DIMM0_SA1 SA0 DQ31 M_A_DQ36 VSS48
    201 SA1 DQ32 129 2 VSS1 VSS49 189
    CLK_SCLK 202 131 M_A_DQ33 3 190
    9,14,25,31 CLK_SCLK CLK_SDATA SCL DQ33 M_A_DQ34 VSS2 VSS50
    200 141 8 195

    (204P)
    9,14,25,31 CLK_SDATA SDA DQ34 M_A_DQ39 VSS3 VSS51
    C DQ35 143 9 VSS4 VSS52 196 C
    116 130 M_A_DQ32 13
    4 M_A_ODT0 ODT0 DQ36 VSS5
    120 132 M_A_DQ37 14
    4 M_A_ODT1 ODT1 DQ37 VSS6
    140 M_A_DQ38 19
    DQ38 M_A_DQ35 VSS7
    11 DM0 DQ39 142 20 VSS8
    28 147 M_A_DQ45 25
    DM1 DQ40 M_A_DQ44 VSS9
    46 149 26 203 +0.75V_DDR_VTT
    63
    DM2
    DM3
    (204P) DQ41
    DQ42 157 M_A_DQ40 31
    VSS10
    VSS11
    VTT1
    VTT2 204
    136 159 M_A_DQ42 32
    DM4 DQ43 M_A_DQ47 VSS12
    153 DM5 DQ44 146 37 VSS13 GND 205
    170 148 M_A_DQ41 38 206
    DM6 DQ45 M_A_DQ46 VSS14 GND
    187 DM7 DQ46 158 43 VSS15
    160 M_A_DQ43
    M_A_DQS0 DQ47 M_A_DQ53
    12 DQS0 DQ48 163
    M_A_DQS1 29 165 M_A_DQ52 DDR3-DIMM1_H=9.2_Reverse
    M_A_DQS2 DQS1 DQ49 M_A_DQ50 +1.5VSUS
    47 DQS2 DQ50 175
    M_A_DQS3 64 177 M_A_DQ55
    M_A_DQS4 DQS3 DQ51 M_A_DQ49
    137 DQS4 DQ52 164
    M_A_DQS5 154 166 M_A_DQ48
    M_A_DQS6 DQS5 DQ53 M_A_DQ54 R194 +SMDDR_VREF_DIMM
    171 DQS6 DQ54 174
    M_A_DQS7 188 176 M_A_DQ51 change to 1K/F_4 1K/F_4
    4 M_A_DQS[7:0] DQS7 DQ55
    M_A_DQS#0 10 181 M_A_DQ56
    M_A_DQS#1 DQS#0 DQ56 M_A_DQ57
    27 DQS#1 DQ57 183
    M_A_DQS#2 45 191 M_A_DQ62 +SMDDR_VREF R182 *0_6 +SMDDR_VREF_DIMM 14
    M_A_DQS#3 DQS#2 DQ58 M_A_DQ59
    62 DQS#3 DQ59 193
    M_A_DQS#4 135 180 M_A_DQ60
    M_A_DQS#5 DQS#4 DQ60 M_A_DQ61 R218 C300
    152 DQS#5 DQ61 182
    B M_A_DQS#6 169 192 M_A_DQ63 1K/F_4 470p/50V_4 B
    M_A_DQS#7 DQS#6 DQ62 M_A_DQ58 +1.5VSUS +SMDDR_VREF_DQ0
    4 M_A_DQS#[7:0] 186 DQS#7 DQ63 194

    DDR3-DIMM1_H=9.2_Reverse R213
    1K/F_4
    change to 1K/F_4
    M1 solution
    Place these Caps near So-Dimm0. +SMDDR_VREF R221 *0_6 +SMDDR_VREF_DQ0

    SMDDR_VREF_DQ0_M3 1 3 C281
    +1.5VSUS 470p/50V_4
    +SMDDR_VREF_DIMM +SMDDR_VREF_DQ0 REV:B Add
    C244 C279 C274 C247 C278 Q14 R214

    2
    10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 4,9,14 DRAMRST_CNTRL_PCH BA@AP2302GN 1K/F_4

    C246 + C241 C293 C283 C280 C275


    *330u/2V_7343
    10u/6.3V_6 0.1u/16V_4 0.1u/16V_4

    C242 C277 C245 C243 C276 2.2u/6.3V_6 2.2u/6.3V_6


    10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4

    A
    +3V 4,5,37 +1.5VSUS A
    +0.75V_DDR_VTT 6,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41 +3V
    37,41 +0.75V_DDR_VTT

    C555 C557 C561 C572 C560 C562 C567


    C576
    2.2u/6.3V_6
    C575
    0.1u/16V_4
    1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
    4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6
    5,37 +SMDDR_VREF
    Quanta Computer Inc.
    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    DDRIII SO-DIMM-0
    Date: Friday, February 03, 2012 Sheet 13 of 44
    5 4 3 2 1
    5 4 3 2 1

    4 M_B_A[15:0] www.rosefix.com M_B_A0


    M_B_A1
    98
    97
    JDIM2A

    A0 DQ0 5
    7
    M_B_DQ5
    M_B_DQ1
    M_B_DQ[63:0] 4
    +1.5VSUS

    75
    76
    JDIM2B

    VDD1 VSS16 44
    48
    M_B_A2 A1 DQ1 M_B_DQ2 VDD2 VSS17
    96 A2 DQ2 15 81 VDD3 VSS18 49
    M_B_A3 95 17 M_B_DQ3 82 54
    M_B_A4 A3 DQ3 M_B_DQ0 VDD4 VSS19
    92 A4 DQ4 4 87 VDD5 VSS20 55
    M_B_A5 91 6 M_B_DQ4 88 60
    M_B_A6 A5 DQ5 M_B_DQ6 VDD6 VSS21
    90 A6 DQ6 16 93 VDD7 VSS22 61
    M_B_A7 86 18 M_B_DQ7 94 65
    M_B_A8 A7 DQ7 M_B_DQ13 VDD8 VSS23
    D 89 A8 DQ8 21 2.48A 99 VDD9 VSS24 66 D
    M_B_A9 85 23 M_B_DQ9 100 71
    M_B_A10 A9 DQ9 M_B_DQ10 VDD10 VSS25
    107 A10/AP DQ10 33 105 VDD11 VSS26 72
    M_B_A11 M_B_DQ11

    PC2100 DDR3 SDRAM SO-DIMM


    84 A11 DQ11 35 106 VDD12 VSS27 127
    M_B_A12 83 22 M_B_DQ12 111 128
    M_B_A13 A12/BC# DQ12 M_B_DQ8 VDD13 VSS28
    119 A13 DQ13 24 112 VDD14 VSS29 133
    M_B_A14 80 34 M_B_DQ14 117 134
    M_B_A15 A14 DQ14 M_B_DQ15 VDD15 VSS30
    78 A15 DQ15 36 118 VDD16 VSS31 138
    M_B_DQ20

    PC2100 DDR3 SDRAM SO-DIMM


    DQ16 39 123 VDD17 VSS32 139
    109 41 M_B_DQ17 124 144
    4 M_B_BS#0 BA0 DQ17 VDD18 VSS33
    108 51 M_B_DQ23 145
    4 M_B_BS#1 BA1 DQ18 VSS34
    79 53 M_B_DQ18 199 150
    4 M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
    114 40 M_B_DQ16 151
    4 M_B_CS#0 S0# DQ20 VSS36
    121 42 M_B_DQ21 77 155
    4 M_B_CS#1 S1# DQ21 NC1 VSS37
    101 50 M_B_DQ19 122 156
    4 M_B_CLK0 CK0 DQ22 NC2 VSS38
    103 52 M_B_DQ22 R529 *10K_4 125 161
    4 M_B_CLK0# CK0# DQ23 +3V NCTEST VSS39
    102 57 M_B_DQ28 162
    4 M_B_CLK1 CK1 DQ24 VSS40
    104 59 M_B_DQ24 PM_EXTTS#1 198 167
    4 M_B_CLK1# CK1# DQ25 EVENT# VSS41
    M_B_DQ31
    4 M_B_CKE0 73
    74
    CKE0 DQ26 67
    69 M_B_DQ27
    M3 solution 4,13 DDR3_DRAMRST# 30 RESET# VSS42 168
    172
    4 M_B_CKE1 CKE1 DQ27 VSS43
    115 56 M_B_DQ29 173
    4 M_B_CAS# CAS# DQ28 VSS44
    110 58 M_B_DQ25 R270 *M3@0_6 +SMDDR_VREF_DQ1 1 178
    4 M_B_RAS# RAS# DQ29 5 SMDDR_VREF_DQ1_M3 VREF_DQ VSS45
    113 68 M_B_DQ30 126 179
    4 M_B_WE# WE# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
    R573 10K_4 DIMM1_SA0 197 70 M_B_DQ26 184
    R574 10K_4 DIMM1_SA1 SA0 DQ31 M_B_DQ32 VSS47
    +3V 201 SA1 DQ32 129 VSS48 185
    202 131 M_B_DQ33 2 189
    9,13,25,31 CLK_SCLK SCL DQ33 M_B_DQ34 VSS1 VSS49
    200 SDA DQ34 141 3 VSS2 VSS50 190
    9,13,25,31 CLK_SDATA 143 M_B_DQ35 8 195

    (204P)
    C DQ35 VSS3 VSS51 C
    116 130 M_B_DQ36 9 196
    4 M_B_ODT0 ODT0 DQ36 VSS4 VSS52
    120 132 M_B_DQ37 13
    4 M_B_ODT1 ODT1 DQ37 VSS5
    140 M_B_DQ38 14
    DQ38 M_B_DQ39 VSS6
    11 DM0 DQ39 142 19 VSS7
    28 147 M_B_DQ40 20
    DM1 DQ40 M_B_DQ41 VSS8
    46 149 25
    63
    DM2
    DM3
    (204P) DQ41
    DQ42 157 M_B_DQ46 26
    VSS9
    VSS10 VTT1 203 +0.75V_DDR_VTT
    136 159 M_B_DQ43 31 204
    DM4 DQ43 M_B_DQ44 VSS11 VTT2
    153 DM5 DQ44 146 32 VSS12
    170 148 M_B_DQ45 37 205
    DM6 DQ45 M_B_DQ47 VSS13 GND
    187 DM7 DQ46 158 38 VSS14 GND 206
    160 M_B_DQ42 43
    M_B_DQS0 DQ47 M_B_DQ49 VSS15
    12 DQS0 DQ48 163
    M_B_DQS1 29 165 M_B_DQ53
    M_B_DQS2 DQS1 DQ49 M_B_DQ55
    47 DQS2 DQ50 175 DDR3-DIMM1_H=5.2_Reverse
    M_B_DQS3 64 177 M_B_DQ54
    M_B_DQS4 DQS3 DQ51 M_B_DQ52
    137 DQS4 DQ52 164
    M_B_DQS5 154 166 M_B_DQ48
    M_B_DQS6 DQS5 DQ53 M_B_DQ51
    171 DQS6 DQ54 174
    M_B_DQS7 188 176 M_B_DQ50
    4 M_B_DQS[7:0] DQS7 DQ55
    M_B_DQS#0 10 181 M_B_DQ60
    M_B_DQS#1 DQS#0 DQ56 M_B_DQ56
    27 DQS#1 DQ57 183
    M_B_DQS#2 45 191 M_B_DQ59
    M_B_DQS#3 DQS#2 DQ58 M_B_DQ58
    62 DQS#3 DQ59 193
    M_B_DQS#4 135 180 M_B_DQ61
    M_B_DQS#5 DQS#4 DQ60 M_B_DQ57 +1.5VSUS +SMDDR_VREF_DQ1
    152 DQS#5 DQ61 182
    B M_B_DQS#6 169 192 M_B_DQ62 B
    M_B_DQS#7 DQS#6 DQ62 M_B_DQ63
    4 M_B_DQS#[7:0] 186 DQS#7 DQ63 194
    M1 solution R271
    DDR3-DIMM1_H=5.2_Reverse 1K/F_4

    +SMDDR_VREF R233 *0_6 +SMDDR_VREF_DQ1

    change to 1K/F_4
    +1.5VSUS Place these Caps near So-Dimm1. C327
    +SMDDR_VREF_DIMM +SMDDR_VREF_DQ1 SMDDR_VREF_DQ1_M3 1 3 470p/50V_4
    C325 C304 C303 C305 C322
    10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 REV:B Add
    Q15 R269

    2
    C324 + C301 C248 C282 C328 C329 BA@AP2302GN 1K/F_4
    4,9,13 DRAMRST_CNTRL_PCH
    330u/2V_7343
    10u/6.3V_6 0.1u/16V_4 0.1u/16V_4

    C326 C306 C307 C321 C323 2.2u/6.3V_6 2.2u/6.3V_6


    10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4

    +3V +0.75V_DDR_VTT

    4,5,37 +1.5VSUS
    A C588 C589 C568 C570 C581 C584 C587 6,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41 +3V A
    C601 C600 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 37,41 +0.75V_DDR_VTT
    2.2u/6.3V_6 0.1u/16V_4 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6
    13 +SMDDR_VREF_DIMM
    5,37 +SMDDR_VREF
    Quanta Computer Inc.
    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    DDRIII SO-DIMM-1
    Date: Friday, February 03, 2012 Sheet 14 of 44
    5 4 3 2 1
    1 2 3 4 5 6 7 8

    +1.05V_GFX

    To be placed no further from the GPU C435


    www.rosefix.com
    1000mA

    EV@22u/6.3V_8 U15A
    IV@:iGPU
    N13P-GL

    N13P-GS
    AJ0N13P0T08

    AJ0N13P0T32
    than bewteen the PS and GPU C441 EV@22u/6.3V_8 AG19 AN12 PEG_TX15
    PEX_IOVDD_1 PEX_RX0 PEG_TX15 3
    C388 EV@10u/6.3V_6 AG21 AM12 PEG_TX#15 N13M-GS AJ0N13M0T08
    C392 EV@10u/6.3V_6 AG22
    PEX_IOVDD_2 [PEG Interface] PEX_RX0_N
    AN14 PEG_TX14
    PEG_TX#15 3
    PEG_TX14 3
    EV@:dGPU
    PLACE UNDER BGA C74 EV@4.7u/6.3V_6 PEX_IOVDD_3 PEX_RX1 PEG_TX#14
    AG24 AM14 PEG_TX#14 3
    C91 EV@1u/6.3V_4 AH21
    PEX_IOVDD_4
    PEX_IOVDD_5
    PEX_RX1_N
    PEX_RX2 AP14 PEG_TX13 PEG_TX13 3 OP@:Optimus
    PLACE NEAR BALLS C98 EV@1u/6.3V_4 AH25 AP15 PEG_TX#13 PEG_TX#13 3
    PEX_IOVDD_6 PEX_RX2_N
    PEX_RX3 AN15 PEG_TX12
    PEG_TX#12
    PEG_TX12 3 DO@:Discrete only +3V_GFX
    +3V_S5
    A +1.05V_GFX AG13 PEX_IOVDDQ_1 PEX_RX3_N AM15 PEG_TX#12 3 A

    To be placed no further from the GPU


    C443
    C432
    EV@22u/6.3V_8
    EV@22u/6.3V_8
    AG15 PEX_IOVDDQ_2 PEX_RX4 AN17 PEG_TX11
    PEG_TX#11
    PEG_TX11 3 SP@:Special R589 10K/F_4
    AG16 PEX_IOVDDQ_3 PEX_RX4_N AM17 PEG_TX#11 3
    than bewteen the PS and GPU C114 EV@10u/6.3V_6 AG18 AP17 PEG_TX10
    PEX_IOVDDQ_4 PEX_RX5 PEG_TX10 3
    C109 EV@10u/6.3V_6 AG25 AP18 PEG_TX#10 PEG_TX#10 3 R384
    PLACE UNDER BGA PEX_IOVDDQ_5 PEX_RX5_N CLK_PEGA_REQ# 9
    C52 EV@4.7u/6.3V_6 AH15 AN18 PEG_TX9 PEG_TX9 3 10/31 modify EV@10K/F_4
    PEX_IOVDDQ_6 PEX_RX6

    3
    C86 EV@1u/6.3V_4 AH18 AM18 PEG_TX#9 PEG_TX#9 3
    PLACE NEAR BALLS C78 EV@1u/6.3V_4 PEX_IOVDDQ_7 PEX_RX6_N PEG_TX8
    AH26 PEX_IOVDDQ_8 PEX_RX7 AN20 PEG_TX8 3
    AH27 AM20 PEG_TX#8 PEG_TX#8 3 10,19 DGPU_PW ROK R649 *EV@10K/F_4 2 Q39
    PEX_IOVDDQ_9 PEX_RX7_N PEG_TX7 EV@DTC144EUA
    AJ27 PEX_IOVDDQ_10 PEX_RX8 AP20 PEG_TX7 3

    3
    AK27 AP21 PEG_TX#7
    2500mA AL27
    PEX_IOVDDQ_11 PEX_RX8_N
    AN21 PEG_TX6
    PEG_TX#7 3
    PEG_TX6 3

    1
    PEX_IOVDDQ_12 PEX_RX9 PEG_TX#6 PEX_CLKREQ# Q22
    AM28 PEX_IOVDDQ_13 PEX_RX9_N AM21 PEG_TX#6 3 2
    AN28 AN23 PEG_TX5 PEG_TX5 3
    PEX_IOVDDQ_14 PEX_RX10 PEG_TX#5
    PEX_RX10_N AM23 PEG_TX#5 3
    AP23 PEG_TX4 PEG_TX4 3 EV@PDTC143TT

    1
    PEX_RX11 PEG_TX#4 +3V_GFX
    PEX_RX11_N AP24 PEG_TX#4 3
    AN24 PEG_TX3 PEG_TX3 3 10/11 chnage type 10/5 modify
    PEX_RX12 PEG_TX#3
    PEX_RX12_N AM24 PEG_TX#3 3
    AN26 PEG_TX2 PEG_TX2 3
    PEX_RX13 PEG_TX#2
    PEX_RX13_N AM26 PEG_TX#2 3
    AP26 PEG_TX1 PEG_TX1 3
    PEX_RX14 PEG_TX#1 C390
    PEX_RX14_N AP27 PEG_TX#1 3
    AN27 PEG_TX0 PEG_TX0 3 EV@0.1u/10V_4
    PEX_RX15 PEG_TX#0
    PEX_RX15_N AM27 PEG_TX#0 3

    5
    9,24,28,32 PLTRST# 2
    AK14 R_PEG_RX15 C133 EV@0.22u/10V_4 PEG_RX15 3 4 PEGX_RST#
    PEX_TX0 R_PEG_RX#15 C138 EV@0.22u/10V_4
    PEX_TX0_N AJ14 PEG_RX#15 3 9 DGPU_HOLD_RST# 1
    B AH14 R_PEG_RX14 C140 EV@0.22u/10V_4 PEG_RX14 3
    B
    PEX_TX1 R_PEG_RX#14 C145 EV@0.22u/10V_4 R374
    AG14 PEG_RX#14 3

    3
    PEX_TX1_N R_PEG_RX13 C128 EV@0.22u/10V_4 U14
    PEX_TX2 AK15 PEG_RX13 3
    AJ15 R_PEG_RX#13 C130 EV@0.22u/10V_4 PEG_RX#13 3 EV@100K_4
    PEX_TX2_N R_PEG_RX12 C120 EV@0.22u/10V_4 EV@MC74VHC1G08DFT2G
    PEX_TX3 AL16 PEG_RX12 3
    AK16 R_PEG_RX#12 C123 EV@0.22u/10V_4 PEG_RX#12 3
    PEX_TX3_N R_PEG_RX11 C112 EV@0.22u/10V_4
    PEX_TX4 AK17 PEG_RX11 3
    AJ17 R_PEG_RX#11 C119 EV@0.22u/10V_4 PEG_RX#11 3
    PEX_TX4_N R_PEG_RX10 C106 EV@0.22u/10V_4
    PEX_TX5 AH17 PEG_RX10 3
    AC6 AG17 R_PEG_RX#10 C111 EV@0.22u/10V_4 PEG_RX#10 3
    NC_1 PEX_TX5_N R_PEG_RX9 C100 EV@0.22u/10V_4
    AJ28 NC_2 PEX_TX6 AK18 PEG_RX9 3
    AJ4 AJ18 R_PEG_RX#9 C105 EV@0.22u/10V_4 PEG_RX#9 3
    NC_3 PEX_TX6_N R_PEG_RX8 C99 EV@0.22u/10V_4
    AJ5 NC_4 PEX_TX7 AL19 PEG_RX8 3
    AL11 AK19 R_PEG_RX#8 C95 EV@0.22u/10V_4 PEG_RX#8 3
    NC_5 PEX_TX7_N R_PEG_RX7 C93 SNP@0.22u/10V_4
    C15 NC_6 PEX_TX8 AK20 PEG_RX7 3
    D19 AJ20 R_PEG_RX#7 C89 SNP@0.22u/10V_4 PEG_RX#7 3
    NC_7 PEX_TX8_N R_PEG_RX6 C87 SNP@0.22u/10V_4
    D20 NC_8 PEX_TX9 AH20 PEG_RX6 3
    D23 AG20 R_PEG_RX#6 C84 SNP@0.22u/10V_4 PEG_RX#6 3
    NC_9 PEX_TX9_N R_PEG_RX5 C81 SNP@0.22u/10V_4
    D26 NC_10 PEX_TX10 AK21 PEG_RX5 3
    H31 AJ21 R_PEG_RX#5 C77 SNP@0.22u/10V_4 PEG_RX#5 3
    NC_11 PEX_TX10_N R_PEG_RX4 C76 SNP@0.22u/10V_4
    T8 NC_12 PEX_TX11 AL22 PEG_RX4 3
    V32 AK22 R_PEG_RX#4 C71 SNP@0.22u/10V_4 PEG_RX#4 3
    NC_13 PEX_TX11_N R_PEG_RX3 C64 SNP@0.22u/10V_4
    PEX_TX12 AK23 PEG_RX3 3
    AJ23 R_PEG_RX#3 C62 SNP@0.22u/10V_4 PEG_RX#3 3
    PEX_TX12_N R_PEG_RX2 C55 SNP@0.22u/10V_4
    PEX_TX13 AH23 PEG_RX2 3
    AG23 R_PEG_RX#2 C54 SNP@0.22u/10V_4 PEG_RX#2 3
    PEX_TX13_N R_PEG_RX1 C61 SNP@0.22u/10V_4
    PEX_TX14 AK24 PEG_RX1 3
    AJ24 R_PEG_RX#1 C59 SNP@0.22u/10V_4 PEG_RX#1 3
    PEX_TX14_N R_PEG_RX0 C57 SNP@0.22u/10V_4
    PEX_TX15 AL25 PEG_RX0 3
    C R_PEG_RX#0 C56 SNP@0.22u/10V_4 C
    PEX_TX15_N AK25 PEG_RX#0 3

    AL13 CLK_PCIE_VGA CLK_PCIE_VGA 9


    PEX_REFCLK CLK_PCIE_VGA#
    PEX_REFCLK_N AK13 CLK_PCIE_VGA# 9

    AJ26 PEX_TSTCLK R53 *EV@200_4


    PEX_TSTCLK_OUT PEX_TSTCLK#
    +3V_GFX J8 VDD33_1 PEX_TSTCLK_OUT_N AK26
    K8 VDD33_2
    L8 VDD33_3 PEX_WAKE AJ11 TP5
    M8 AJ12 PEGX_RST# PEGX_RST# 18
    VDD33_4 PEX_RST_N
    10/11 change to 1k
    AK12 PEX_CLKREQ# R390 EV@1K_4 +3V_GFX
    PEX_CLKREQ_N

    AP29 PEX_TERMP R372 EV@2.49K/F_4


    PEX_TERMP
    for N13P/M-GS for N13P-GL PEX_RST timing
    TESTMODE R393 EV@10K/F_4
    AK11 R46 GSS@0_6 +1.05V_GFX
    +3V_GFX TESTMODE L3 GL@160808-120
    PLACE CLOSE TO BGA Stuff--> R Reserve--> R
    C154 EV@4.7u/6.3V_6 AG26 PEX_PLLVDD C47 EV@4.7u/6.3V_6 PLACE NEAR BGA I/O 3.3V
    PEX_PLLVDD CLOSE TO CAPS
    C159 EV@1u/35V_6 C48 EV@1u/6.3V_4
    Reserve -->L Stuff--> L
    PEX_PLL_HVDD AH12
    AG12 PLACE UNDER BGA PEX_RST
    C143 EV@0.1u/10V_4 PEX_SVDD_3V3 C63 EV@0.1u/10V_4
    C142 EV@0.1u/10V_4 PLACE NEAR BALLS
    D D
    C144 EV@0.1u/10V_4 P8
    C141 EV@0.1u/10V_4 3.3V_AUX_NC
    +3V_GFX
    C124 EV@0.1u/10V_4 Trise >= 1uS Tfail <=500nS
    L4 C459 EV@4.7u/6.3V_6
    PLACE CLOSE TO GPU BALLS VDD_SENSE C447 EV@4.7u/6.3V_6

    GND_SENSE L5 12~16 mils width PLACE NEAR BGA Quanta Computer Inc.
    EV@N13x
    GPUVCC_SENSE 39 PROJECT : ZQTA/ZQSA
    N13P GPUVSS_SENSE 39 19,40 +1.05V_GFX
    Size Document Number Rev
    19,39,40 +3V_GFX
    1A
    3,28,30,31,34,35,36,41,42 +3V_S5 DGPU 1/5 (PEG)
    6,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41 +3V
    Date: Friday, February 03, 2012 Sheet 15 of 44
    1 2 3 4 5 6 7 8
    1 2 3 4 5 6 7 8

    www.rosefix.com
    FBA_CMD0 U30
    U15B

    L28 VMA_DQ0
    21 FBC_CMD[30:0]
    FBC_CMD0
    FBC_CMD1
    FBC_CMD2
    D13
    E14
    F14
    U15C
    FBB_CMD0 (FBC_CMD25)
    FBB_CMD1 (FBC_CMD23)
    FBC_D00
    FBC_D01
    G9
    E9
    G8
    VMC_DQ0
    VMC_DQ1
    VMC_DQ2 FBA_CMD2 R37 EV@10K/F_4
    20 FBA_CMD[30:0]
    FBA_CMD1 FBA_CMD0 (FBA_CMD25) FBA_D00 VMA_DQ1 FBC_CMD3 FBC_CMD2 MEMORY I/F C FBC_D02 VMC_DQ3
    FBA_CMD1 (FBA_CMD23) [MEMORY I/F A]
    T31 M29 A12 F9
    FBA_CMD2 FBA_D01 VMA_DQ2 FBC_CMD4 FBB_CMD3 (FBC_CMD0) FBC_D03 VMC_DQ4 FBA_CMD3 R363 EV@10K/F_4
    U29 FBA_CMD2 FBA_D02 L29 B12 FBB_CMD4 (FBC_CMD10) FBC_D04 F11
    FBA_CMD3 R34 M28 VMA_DQ3 FBC_CMD5 C14 G11 VMC_DQ5
    FBA_CMD4 FBA_CMD3 (FBA_CMD0) FBA_D03 VMA_DQ4 FBC_CMD6 FBB_CMD5 (FBC_CMD26) FBC_D05 VMC_DQ6 FBA_CMD5 R367 EV@10K/F_4
    R33 N31 B14 F12
    FBA_CMD5 FBA_CMD4 (FBA_CMD10) FBA_D04 VMA_DQ5 FBC_CMD7 FBB_CMD6 (FBC_CMD14) FBC_D06 VMC_DQ7
    U32 P29 G15 G12
    FBA_CMD6 FBA_CMD5 (FBA_CMD26) FBA_D05 VMA_DQ6 FBC_CMD8 FBC_CMD7 FBC_D07 VMC_DQ8 FBA_CMD18 R368 EV@10K/F_4
    U33 R29 F15 G6
    FBA_CMD7 FBA_CMD6 (FBA_CMD14) FBA_D06 VMA_DQ7 FBC_CMD9 FBB_CMD8 (FBC_CMD1) FBC_D08 VMC_DQ9
    U28 P28 E15 F5
    FBA_CMD8 FBA_CMD7 FBA_D07 VMA_DQ8 FBC_CMD10 FBB_CMD9 (FBC_CMD22) FBC_D09 VMC_DQ10 FBA_CMD19 R33 EV@10K/F_4
    V28 J28 D15 E6
    A FBA_CMD9 FBA_CMD8 (FBA_CMD1) FBA_D08 VMA_DQ9 FBC_CMD11 FBB_CMD10 (FBC_CMD20) FBC_D10 VMC_DQ11 A
    V29 FBA_CMD9 (FBA_CMD22) FBA_D09 H29 A14 FBB_CMD11 (FBC_CMD24) FBC_D11 F6
    FBA_CMD10 V30 J29 VMA_DQ10 FBC_CMD12 D14 F4 VMC_DQ12 FBC_CMD2 R66 EV@10K/F_4
    FBA_CMD11 FBA_CMD10 (FBA_CMD20) FBA_D10 VMA_DQ11 FBC_CMD13 FBB_CMD12 (FBC_CMD18) FBC_D12 VMC_DQ13
    U34 FBA_CMD11 (FBA_CMD24) FBA_D11 H28 A15 FBB_CMD13 (FBC_CMD9) FBC_D13 G4
    FBA_CMD12 U31 G29 VMA_DQ12 FBC_CMD14 B15 E2 VMC_DQ14 FBC_CMD3 R386 EV@10K/F_4
    FBA_CMD13 FBA_CMD12 (FBA_CMD18) FBA_D12 VMA_DQ13 FBC_CMD15 FBB_CMD14 (FBC_CMD29) FBC_D14 VMC_DQ15
    V34 FBA_CMD13 (FBA_CMD9) FBA_D13 E31 C17 FBB_CMD15 (FBC_CMD8) FBC_D15 F3
    FBA_CMD14 V33 E32 VMA_DQ14 FBC_CMD16 D18 C2 VMC_DQ16 FBC_CMD5 R61 EV@10K/F_4
    FBA_CMD15 FBA_CMD14 (FBA_CMD29) FBA_D14 VMA_DQ15 FBC_CMD17 FBB_CMD16 (FBC_CMD27) FBC_D16 VMC_DQ17
    Y32 FBA_CMD15 (FBA_CMD8) FBA_D15 F30 E18 FBB_CMD17 (FBC_CMD15) FBC_D17 D4
    FBA_CMD16 AA31 C34 VMA_DQ16 FBC_CMD18 F18 D3 VMC_DQ18 FBC_CMD18 R378 EV@10K/F_4
    FBA_CMD17 FBA_CMD16 (FBA_CMD27) FBA_D16 VMA_DQ17 FBC_CMD19 FBB_CMD18 (FBC_CMD11) FBC_D18 VMC_DQ19
    AA29 D32 A20 C1
    FBA_CMD18 FBA_CMD17 (FBA_CMD15) FBA_D17 VMA_DQ18 FBC_CMD20 FBB_CMD19 (FBC_CMD16) FBC_D19 VMC_DQ20 FBC_CMD19 R47 EV@10K/F_4
    AA28 B33 B20 B3
    FBA_CMD19 FBA_CMD18 (FBA_CMD11) FBA_D18 VMA_DQ19 FBC_CMD21 FBB_CMD20 (FBC_CMD28) FBC_D20 VMC_DQ21
    AC34 C33 C18 C4
    FBA_CMD20 FBA_CMD19 (FBA_CMD16) FBA_D19 VMA_DQ20 FBC_CMD22 FBB_CMD21 (FBC_CMD3) FBC_D21 VMC_DQ22
    FBA_CMD21
    AC33 FBA_CMD20 (FBA_CMD28) FBA_D20 F33
    VMA_DQ21 FBC_CMD23
    B18 FBB_CMD22 (FBC_CMD17) FBC_D22 B5
    VMC_DQ23
    For Fermi
    AA32 F32 G18 C5
    FBA_CMD22 FBA_CMD21 (FBA_CMD3) FBA_D21 VMA_DQ22 FBC_CMD24 FBB_CMD23 (FBC_CMD5) FBC_D23 VMC_DQ24
    AA33 H33 G17 A11
    FBA_CMD23 FBA_CMD22 (FBA_CMD17) FBA_D22 VMA_DQ23 FBC_CMD25 FBB_CMD24(FBC_CMD4) FBC_D24 VMC_DQ25
    Y28 H32 F17 C11
    FBA_CMD24 FBA_CMD23 (FBA_CMD5) FBA_D23 VMA_DQ24 FBC_CMD26 FBB_CMD25 (FBC_CMD21) FBC_D25 VMC_DQ26 VMA_DQ[63:0]
    Y29 P34 D16 D11 VMA_DQ[63:0] 20
    FBA_CMD25 FBA_CMD24 (FBA_CMD4) FBA_D24 VMA_DQ25 FBC_CMD27 FBB_CMD26 (FBC_CMD6) FBC_D26 VMC_DQ27
    W31 P32 A18 B11
    FBA_CMD26 FBA_CMD25 (FBA_CMD21) FBA_D25 VMA_DQ26 FBC_CMD28 FBB_CMD27 (FBC_CMD13) FBC_D27 VMC_DQ28 VMC_DQ[63:0]
    Y30 P31 D17 D8 VMC_DQ[63:0] 21
    FBA_CMD27 FBA_CMD26 (FBA_CMD6) FBA_D26 VMA_DQ27 FBC_CMD29 FBB_CMD28 (FBC_CMD19) FBC_D28 VMC_DQ29
    AA34 FBA_CMD27 (FBA_CMD13) FBA_D27 P33 A17 FBB_CMD29 (FBC_CMD12) FBC_D29 A8
    FBA_CMD28 Y31 L31 VMA_DQ28 FBC_CMD30 B17 C8 VMC_DQ30
    FBA_CMD29 FBA_CMD28 (FBA_CMD19) FBA_D28 VMA_DQ29 FBC_CMD30 FBC_D30 VMC_DQ31
    Y34 FBA_CMD29 (FBA_CMD12) FBA_D29 L34 E17 FBC_CMD31 (NC) FBC_D31 B8
    FBA_CMD30 Y33 L32 VMA_DQ30 T3 F24 VMC_DQ32
    FBA_CMD30 FBA_D30 VMA_DQ31 FBC_D32 VMC_DQ33
    V31 L33 G23
    T1 FBA_CMD31 (NC) FBA_D31 VMA_DQ32 VMC_DM0 FBC_D33 VMC_DQ34
    FBA_D32 AG28 21 VMC_DM[7:0] E11 FBC_DQM0 FBC_D34 E24
    AF29 VMA_DQ33 VMC_DM1 E3 G24 VMC_DQ35
    VMA_DM0 FBA_D33 VMA_DQ34 VMC_DM2 FBC_DQM1 FBC_D35 VMC_DQ36
    20 VMA_DM[7:0] P30 AG29 A3 D21
    VMA_DM1 FBA_DQM0 FBA_D34 VMA_DQ35 VMC_DM3 FBC_DQM2 FBC_D36 VMC_DQ37
    F31 FBA_DQM1 FBA_D35 AF28 C9 FBC_DQM3 FBC_D37 E21
    VMA_DM2 F34 AD30 VMA_DQ36 VMC_DM4 F23 G21 VMC_DQ38
    VMA_DM3 FBA_DQM2 FBA_D36 VMA_DQ37 VMC_DM5 FBC_DQM4 FBC_D38 VMC_DQ39
    M32 FBA_DQM3 FBA_D37 AD29 F27 FBC_DQM5 FBC_D39 F21
    VMA_DM4 AD31 AC29 VMA_DQ38 VMC_DM6 C30 G27 VMC_DQ40
    VMA_DM5 FBA_DQM4 FBA_D38 VMA_DQ39 VMC_DM7 FBC_DQM6 FBC_D40 VMC_DQ41
    AL29 AD28 A24 D27
    VMA_DM6 FBA_DQM5 FBA_D39 VMA_DQ40 FBC_DQM7 FBC_D41 VMC_DQ42
    AM32 FBA_DQM6 FBA_D40 AJ29 FBC_D42 G26
    VMA_DM7 AF34 AK29 VMA_DQ41 E27 VMC_DQ43
    FBA_DQM7 FBA_D41 VMA_DQ42 VMC_WDQS0 FBC_D43 VMC_DQ44
    B FBA_D42 AJ30 21 VMC_WDQS[7:0] D10 FBC_DQS_WP0 FBC_D44 E29 B
    AK28 VMA_DQ43 VMC_WDQS1 D5 F29 VMC_DQ45
    VMA_WDQS0 FBA_D43 VMA_DQ44 VMC_WDQS2 FBC_DQS_WP1 FBC_D45 VMC_DQ46
    20 VMA_WDQS[7:0] M31 AM29 C3 E30
    VMA_WDQS1 FBA_DQS_WP0 FBA_D44 VMA_DQ45 VMC_WDQS3 FBC_DQS_WP2 FBC_D46 VMC_DQ47
    G31 AM31 B9 D30
    VMA_WDQS2 FBA_DQS_WP1 FBA_D45 VMA_DQ46 VMC_WDQS4 FBC_DQS_WP3 FBC_D47 VMC_DQ48
    E33 AN29 E23 A32
    VMA_WDQS3 FBA_DQS_WP2 FBA_D46 VMA_DQ47 VMC_WDQS5 FBC_DQS_WP4 FBC_D48 VMC_DQ49
    M33 AM30 E28 C31
    VMA_WDQS4 FBA_DQS_WP3 FBA_D47 VMA_DQ48 VMC_WDQS6 FBC_DQS_WP5 FBC_D49 VMC_DQ50
    AE31 AN31 B30 C32
    VMA_WDQS5 FBA_DQS_WP4 FBA_D48 VMA_DQ49 VMC_WDQS7 FBC_DQS_WP6 FBC_D50 VMC_DQ51
    AK30 AN32 A23 B32
    VMA_WDQS6 FBA_DQS_WP5 FBA_D49 VMA_DQ50 FBC_DQS_WP7 FBC_D51 VMC_DQ52
    AN33 AP30 D29
    VMA_WDQS7 FBA_DQS_WP6 FBA_D50 VMA_DQ51 FBC_D52 VMC_DQ53
    AF33 AP32 A29
    FBA_DQS_WP7 FBA_D51 VMA_DQ52 VMC_RDQS0 FBC_D53 VMC_DQ54
    AM33 21 VMC_RDQS[7:0] D9 C29
    FBA_D52 VMA_DQ53 VMC_RDQS1 FBC_DQS_RN0 FBC_D54 VMC_DQ55
    FBA_D53 AL31 E4 FBC_DQS_RN1 FBC_D55 B29
    VMA_RDQS0 M30 AK33 VMA_DQ54 VMC_RDQS2 B2 B21 VMC_DQ56
    20 VMA_RDQS[7:0] FBA_DQS_RN0 FBA_D54 FBC_DQS_RN2 FBC_D56
    VMA_RDQS1 H30 AK32 VMA_DQ55 VMC_RDQS3 A9 C23 VMC_DQ57
    VMA_RDQS2 FBA_DQS_RN1 FBA_D55 VMA_DQ56 VMC_RDQS4 FBC_DQS_RN3 FBC_D57 VMC_DQ58
    E34 AD34 D22 A21
    VMA_RDQS3 FBA_DQS_RN2 FBA_D56 VMA_DQ57 VMC_RDQS5 FBC_DQS_RN4 FBC_D58 VMC_DQ59
    M34 AD32 D28 C21
    VMA_RDQS4 FBA_DQS_RN3 FBA_D57 VMA_DQ58 VMC_RDQS6 FBC_DQS_RN5 FBC_D59 VMC_DQ60
    AF30 AC30 A30 B24
    VMA_RDQS5 FBA_DQS_RN4 FBA_D58 VMA_DQ59 VMC_RDQS7 FBC_DQS_RN6 FBC_D60 VMC_DQ61
    AK31 AD33 B23 C24
    VMA_RDQS6 FBA_DQS_RN5 FBA_D59 VMA_DQ60 FBC_DQS_RN7 FBC_D61 VMC_DQ62
    AM34 AF31 B26
    VMA_RDQS7 FBA_DQS_RN6 FBA_D60 VMA_DQ61 FBC_D62 VMC_DQ63
    AF32 FBA_DQS_RN7 FBA_D61 AG34 FBC_D63 C26
    AG32 VMA_DQ62
    FBA_D62 VMA_DQ63
    AG33
    FBA_D63 VMC_CLK0
    +1.5V_GFX AA27 FBVDDQ_1 FBC_CLK0 D12 VMC_CLK0 21
    AA30 E12 VMC_CLK0# VMC_CLK0# 21
    FBVDDQ_2 VMA_CLK0 FBC_CLK0_N VMC_CLK1
    AB27 R30 VMA_CLK0 20 E20 VMC_CLK1 21
    FBVDDQ_3 FBA_CLK0 VMA_CLK0# FBC_CLK1 VMC_CLK1#
    AB33 R31 VMA_CLK0# 20 F20 VMC_CLK1# 21
    FBVDDQ_4 FBA_CLK0_N VMA_CLK1 FBC_CLK1_N
    AC27 FBVDDQ_5 FBA_CLK1 AB31 VMA_CLK1 20
    AD27 AC31 VMA_CLK1# VMA_CLK1# 20
    FBVDDQ_6 FBA_CLK1_N FBC_DEBUG R65 EV@60.4/F_4
    AE27
    FBVDDQ_7
    15mils width (FBC_DEBUG) FBB_DEBUG0
    G14 +1.5V_GFX
    AF27 G20 FBC_DEBUG1 R60 EV@60.4/F_4
    FBVDDQ_8 FBA_DEBUG R50 EV@60.4/F_4 (NC) FBB_DEBUG1
    AG27 R28 +1.5V_GFX
    FBVDDQ_9 (FBA_DEBUG) FBA_DEBUG0 FBA_DEBUG1 R54 EV@60.4/F_4
    B13 AC28 C12
    FBVDDQ_10 (NC) FBA_DEBUG1 FBB_CMD_RFU0
    B16 H26 C20
    FBVDDQ_11 FB_VREF_NC T2 FBB_CMD_RFU1
    B19
    FBVDDQ_12
    C E13 R32 F8 C
    FBVDDQ_13 FBA_CMD_RFU0 FBB_WCK01
    E16 AC32 E8
    FBVDDQ_14 FBA_CMD_RFU1 FBB_WCK01_N
    E19 FBVDDQ_15 FBB_WCK23 A5
    H10 K31 A6
    FBVDDQ_16 FBA_WCK01 FBB_WCK23_N
    H11 L30 D24
    FBVDDQ_17 FBA_WCK01_N FBB_WCK45
    H12 FBVDDQ_18 FBA_WCK23 H34 FBB_WCK45_N D25
    H13 J34 B27
    FBVDDQ_19 FBA_WCK23_N FBB_WCK67
    H14 FBVDDQ_20 FBA_WCK45 AG30 FBB_WCK67_N C27
    H15 AG31
    FBVDDQ_21 FBA_WCK45_N
    H16 AJ34
    FBVDDQ_22 FBA_WCK67
    H18 FBVDDQ_23 FBA_WCK67_N AK34 FBB_WCKB01 D6
    +1.5V_GFX H19 D7
    FBVDDQ_24 FBB_WCKB01_N
    H20 J30 C6
    FBVDDQ_25 FBA_WCKB01 FBB_WCKB23
    H21 FBVDDQ_26 FBA_WCKB01_N J31 FBB_WCKB23_N B6
    H22
    FBVDDQ_27 FBA_WCKB23
    J32 for N13P/M-GS N13P- GL FBB_WCKB45
    F26
    H23 J33 E26
    FBVDDQ_28 FBA_WCKB23_N FBB_WCKB45_N
    PLACE CLOSE TO GPU BALLS H24 AH31 A26
    FBVDDQ_29 FBA_WCKB45 FBB_WCKB67
    C366 EV@4.7u/6.3V_6
    H8 FBVDDQ_30 FBA_WCKB45_N AJ31 Stuff Ra Reserve Ra FBB_WCKB67_N A27
    H9 FBVDDQ_31 FBA_WCKB67 AJ32
    C387 EV@4.7u/6.3V_6 L27 AJ33
    C12 1 FBVDDQ_32 FBA_WCKB67_N
    2 EV@1u/35V_6 M27 FBVDDQ_33 Ra FBB_PLL_AVDD H17 +FB_PLLAVDD C107 EV@0.1u/10V_4
    C46 1 2 EV@1u/35V_6 N27 E1 PS_FB_CLAMP R415 GSS@10K_4
    C85 EV@0.1u/10V_4 FBVDDQ_34 RSVD PLACE CLOSE TO BALL
    P27
    C127 EV@0.1u/10V_4 FBVDDQ_35 +FB_PLLAVDD C70 EV@0.1u/10V_4
    R27 K27
    C82 EV@0.1u/10V_4 FBVDDQ_36 FB_DLL_AVDD PLACE CLOSE TO BALL EV@N13x
    T27
    C129 EV@0.1u/10V_4 FBVDDQ_37 +FB_PLLAVDD L2 EV@PBY160808T-30Y-N_6
    T30 U27 +1.05V_GFX
    C69 EV@0.1u/10V_4 FBVDDQ_38 FBA_PLL_AVDD C45 EV@22u/6.3V_8
    T33
    C373 EV@0.1u/10V_4 FBVDDQ_39 FBVDDQ_SENSE_NC PLACE CLOSE TO BGA
    V27 FBVDDQ_40 FBVDDQ_PROBE F1
    C36 EV@0.1u/10V_4 W27 T18 C66 EV@0.1u/10V_4
    C65 EV@0.1u/10V_4 FBVDDQ_41 FB_GND_SENSE_NC C67 EV@0.1u/10V_4
    W30 F2
    FBVDDQ_42 GND_PROBE T19
    W33 FBVDDQ_43
    Y27 J27 FB_CAL_PD_VDDQ R55 EV@40.2/F_4 +1.5V_GFX
    C18 EV@10u/6.3V_8 FBVDDQ_44 FB_CAL_PD_VDDQ
    C19 EV@10u/6.3V_8 FB_CAL_PU_GND R57 EV@42.2/F_4
    N13P-GL AJ0N13P0T08
    H27
    D C17 EV@10u/6.3V_8 FB_CAL_PU_GND D
    C367 EV@10u/6.3V_8 H25 FB_CAL_TERM_GND R59 EV@51.1/F_4 N13P-GS AJ0N13P0T32
    FB_CALTERM_GND
    PLACE CLOSE TO BGA PLACE CLOSE TO GPU BALLS
    EV@N13x N13M-GS AJ0N13M0T08

    C43 *EV@330u/2.5V_3528 19,40 +1.5V_GFX


    Quanta Computer Inc.
    +

    +1.5V_GFX 19,40 +1.05V_GFX


    C39 EV@330u/2.5V_3528
    PROJECT : ZQTA/ZQSA
    +

    10/7 add Size Document Number Rev


    1A
    DGPU 2/5 (Memory)
    Date: Friday, February 03, 2012 Sheet 16 of 44
    1 2 3 4 5 6 7 8
    1 2 3 4 5 6 7 8

    R77
    www.rosefix.com
    OP@10K/F_4
    C157
    C158
    C136
    C161
    *DO@0.1u/10V_4
    DO@1u/6.3V_4
    DO@0.1u/10V_4
    DO@4.7u/6.3V_6
    10/7 add 0929 Exchange + & - ; because symbol error
    IV@:iGPU
    EV@:dGPU
    OP@:Optimus
    U15D
    +1.05V_GFX L4 DO@160808-120 IFPAB_PLLVDD 50 mA AH8 AN6 EV_TXLCLK- 22 DO@:Discrete only
    IFPAB_PLLVDD IFPA_TXC
    [IFPA/B_LVDS] IFPA_TXC_N AM6 EV_TXLCLK+ 22
    L5 DO@4.3_6 IFPAB_IOVDD 320 mA IFPA_TXD0 AN3 EV_TXLOUT0- 22 SP@:Special
    +3V_GFX AG8 IFPA_IOVDD IFPA_TXD0_N AP3 EV_TXLOUT0+ 22
    10/6 modify IFPA_TXD1 AM5 EV_TXLOUT1- 22
    C153 *DO@0.1u/10V_4 AG9 AN5 EV_TXLOUT1+ 22
    R75 OP@10K/F_4 C150 DO@1u/6.3V_4 IFPB_IOVDD IFPA_TXD1_N
    A
    C156 DO@4.7u/6.3V_6 IFPA_TXD2 AK6 EV_TXLOUT2- 22 N13P-GL AJ0N13P0T08 A
    10/7 add IFPA_TXD2_N AL6 EV_TXLOUT2+ 22
    IFPA_TXD3 AH6
    R396 *EV@1K/F_4 IFPAB_RSET AJ8 AJ6 N13P-GS AJ0N13P0T32
    IFPAB_RSET IFPA_TXD3_N

    IFPB_TXC AH9
    IFPB_TXC_N AJ9 N13M-GS AJ0N13M0T08
    IFPB_TXD4 AP5
    IFPB_TXD4_N AP6
    IFPB_TXD5 AL7
    IFPB_TXD5_N AM7
    IFPB_TXD6 AM8
    IFPB_TXD6_N AN8
    IFPB_TXD7 AL8
    IFPB_TXD7_N AK8

    DO@SBK160808T-301Y-N_6
    +3V_GFX L26 +IFPCD_PLLVDD 220 mA AF7 AG3 EV_HDMI_DDCCK_C EV_HDMI_DDCCK_C 23
    IFPC_PLLVDD IFPC_AUX_I2CW_SCL EV_HDMI_DDCDAT_C
    C149 *DO@0.1u/10V_4
    [IFPC/D_TMDS]IFPC_AUX_I2CW_SDA_N AG2 EV_HDMI_DDCDAT_C 23
    AG7 IFPD_PLLVDD IFPC_L0 AK1 EV_HDMITX2P 23
    C463 *DO@0.1u/10V_4 AJ1
    IFPC_L0_N EV_HDMITX2N 23
    C457 DO@1u/6.3V_4 10/7 add AJ3
    IFPC_L1 EV_HDMITX1P 23
    R426 OP@10K/F_4 C146 DO@0.1u/10V_4 AJ2
    IFPC_L1_N EV_HDMITX1N 23
    C462 DO@4.7u/6.3V_6 AH3
    IFPC_L2 EV_HDMITX0P 23
    IFPC_L2_N AH4 EV_HDMITX0N 23
    DO@BLM18PG221SN1D AG5
    L28 +IFPCD_IOVDD 285 mA AF6
    IFPC_L3
    AG4
    EV_HDMICLK+ 23
    (1.05V +/- 3% ) +1.05V_GFX IFPC_IOVDD IFPC_L3_N EV_HDMICLK- 23
    C155 DO@0.1u/10V_4 AG6 AK3 EV_EDP-AUX+ 22
    B R425 OP@10K/F_4 C460 DO@1u/6.3V_4 IFPD_IOVDD IFPD_AUX_I2CX_SCL B
    IFPD_AUX_I2CX_SDA_N AK2 EV_EDP-AUX- 22
    C461 DO@4.7u/6.3V_6 AM1 EV_EDP-ML0+ 22
    C151 *DO@0.1u/10V_4 IFPD_L0
    10/7 add IFPD_L0_N AM2 EV_EDP-ML0- 22
    IFPD_L1 AM3
    R397 DO@1K/F_4 IFPC_RSET AF8 AM4
    IFPC_RSET IFPD_L1_N
    IFPD_L2 AL3
    R399 DO@1K/F_4 IFPD_RSET AN2 AL4
    IFPD_RSET IFPD_L2_N
    IFPD_L3 AK4
    IFPD_L3_N AK5

    R413 EV@10K/F_4 IFPEF_PLLVDD AB8 AB3


    IFPEF_PLLVDD IFPE_AUX_I2CY_SCL +3V_GFX
    [IFPE/F_DP] IFPE_AUX_I2CY_SDA_N AB4
    IFPE_L0 AD2
    IFPEF_IOVDD AC7 AD3 EV_HDMI_DDCCK_C R362 OP@4.7K/F_4
    R398 EV@10K/F_4 IFPE_IOVDD IFPE_L0_N EV_HDMI_DDCDAT_C R387 OP@4.7K/F_4
    AC8 IFPF_IOVDD IFPE_L1 AD1
    IFPE_L1_N AC1
    AC2 EV_CRTDCLK R389 OP@4.7K/F_4
    IFPE_L2 EV_CRTDDAT R464 OP@4.7K/F_4
    AD6 IFPEF_RSET IFPE_L2_N AC3
    IFPE_L3 AC4
    IFPE_L3_N AC5

    AF3 S 1217 Modify


    IFPF_AUX_I2CZ_SCL
    IFPF_AUX_I2CZ_SDA_N AF2
    IFPF_L0 AE3
    IFPF_L0_N AE4
    IFPF_L1 AF4
    DO@BLM18PG221SN1D AF5
    L27 C455 DO@0.1u/10V_4 IFPF_L1_N
    +3V_GFX IFPF_L2 AD4
    C C452 DO@1u/6.3V_4 C
    IFPF_L2_N AD5
    C458 DO@4.7u/6.3V_6 AG1
    C134 DO@0.1u/10V_4 IFPF_L3
    IFPF_L3_N AF1

    R400 OP@10K/F_4 +DACA_VDD 120 mA AG10 AK9 EV_CRT_RED EV_CRT_RED 22 EV_CRT_RED R72 DO@150/F_4
    DACA_VDD DACA_RED EV_CRT_GRN EV_CRT_GRN R67 DO@150/F_4
    [DACA/B_CRT] DACA_GREEN AL10
    EV_CRT_BLU
    EV_CRT_GRN 22
    EV_CRT_BLU R71 DO@150/F_4
    DACA_BLUE AL9 EV_CRT_BLU 22
    C449 DO@0.1u/10V_4 DACA_VREF AP9 DACA_VREF
    AM9 EV_HSYNC_R R103 DO@33_4 HSYNC_COM 22
    R395 DO@124/F_4 DACA_RSET DACA_HSYNC EV_VSYNC_R R102 DO@33_4
    AP8 DACA_RSET DACA_VSYNC AN9 VSYNC_COM 22

    R4 EV_CRTDCLK EV_CRTDCLK 22
    I2CA_SCL EV_CRTDDAT
    I2CA_SDA R5 EV_CRTDDAT 22

    +1.05V_GFX L29 EV@160808-30Y NV_PLLVDD AD8 PLLVDD


    C454 C135
    R414 EV@0.1u/10V_4
    *EV@0_4 EV@22u/6.3V_8

    SP_PLLVDD AE8 19,40 +1.05V_GFX


    SP_PLLVDD
    D 19,39,40 +3V_GFX D

    PLACE CLOSE TO GPU


    H3 CLK_27M_VGA_2
    L25 EV@160808-0180P VID_PLLVDD XTAL_IN XTALOUT Y1
    +1.05V_GFX AD7 VID_PLLVDD XTAL_OUT H2
    [XTAL IN] J4 R91 EV@10K/F_4 2 1
    C456 C451 C147 C450 XTAL_OUTBUFF R401 EV@10K/F_4
    H1

    EV@N13x
    XTAL_SSIN EV@27MHZ
    C162 C163
    Quanta Computer Inc.
    EV@22u/6.3V_8 EV@4.7u/6.3V_6 EV@0.1u/10V_4 EV@27p/50V_4 EV@27p/50V_4 PROJECT : ZQTA/ZQSA
    EV@0.1u/10V_4 Size Document Number Rev
    PLACE CLOSE TO BALLS 1A
    DGPU 3/5 (Display)
    Date: Friday, February 03, 2012 Sheet 17 of 44
    1 2 3 4 5 6 7 8
    1 2 3 4 5 6 7 8

    Logical Strap Bit Mapping

    19,39,40 +3V_GFX
    www.rosefix.com 4.99K
    PU-VDD PD
    1000 0000 ROM_SO
    ROM_SCLK
    Logical
    Strapping Bit3
    FB_1
    PCI_DEVIDE[4]
    Logical
    Strapping Bit2
    FB_0
    SUB_VENDOR
    Logical
    Strapping Bit1
    SMB_ALT_ADDR
    PCI_DEVID[5]
    Logical
    Strapping Bit0
    VGA_DEVICE
    PEX_PLL_EN_TERM
    0001
    1010
    U15E 10K 1001 0001
    ROM_SI RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0] XXXX
    [MIOA] 15K 1010 0010
    STRAP2 STRAP0 USER[3] USER[2] USER[1] USER[0] 1111
    20K 1011 0011
    N13P-GL (1001) ---> 10k PU STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] 0110
    N13P-GS (1011) ---> 15K PD
    24.9K 1100 0100
    A PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] A
    30.1K 1101 0101 STRAP2 1110
    STRAP3 SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED 0010
    34.8K 1110 0110
    STRAP4 RESERVED PCI SPEED CHANGE GEN3 PCI_MAX SPEED DP_PLL_VDD33 0011
    STRAP1 45.3K 1111 0111
    N13P-GL (0111) ---> 45.3k PD
    +3V_GFX
    N13P-GS (0000) ---> 4.99K PU N13P-GL AJ0N13P0T08 +3V_GFX

    N13P-GS AJ0N13P0T32
    R420 R85 R89 R109 R110
    STRAP3 N13M-GS AJ0N13M0T08 SNP@45.3K/F_4 SP@34.8K/F_4 *EV@10K/F_4
    R111 R87 R112
    Optimus ---> 4.99k PD *SP@4.99K/F_4 SP@10K/F_4 SP@4.99K/F_4 STRAP0 SP@4.99K/F_4 *SP@34.8K/F_4
    STRAP1
    Discrete only ---> 15K PD ROM_SI STRAP2
    ROM_SO STRAP3
    ROM_SCLK STRAP4
    S 1217
    Change EV@ to SP@
    STRAP4 R93 R88 R94 R421 R76 R84 R90 R92
    N13P-GL ---> 10K PD [MIOB] SP@34.8K/F_4 SP@10K/F_4 SP@15K/F_4 SP@34.8K/F_4 SP@15K/F_4 SP@10K/F_4
    N13M-GS ---> 10K PD SNM@10K/F_4 SP@34.8K/F_4
    N13P-GS ---> 45.3K PD +3V_GFX

    SYS_SHDN_R# R404 EV@10K/F_4 S 1217


    B Change EV@ to SP@ B
    Resistor P/N JTAG_TMS R392 *EV@10K/F_4
    4.99K---> CS24992FB26 N13P-GS/-GL Straping table
    JTAG_TDI R394 *EV@10K/F_4
    10K ---> CS31002FB26
    ROM_SI
    15K ---> CS31502FB24 VGA_OVT# R403 EV@10K/F_4 ROM_SO ROM_SCLK
    1G Hynix 64Mx16 -->15K PD
    20K ---> CS32002FB29 ALERT R423 EV@10K/F_4 N13P-GL --> 10K PD N13P-GL (0010) ---> 15k PD
    1G Micron 64Mx16 -->20K PD
    30.1K --->CS33012FB18 N13P-GS --> 10K PU N13P-GS (1000) ---> 4.99K PU
    JTAG_TCK R68 *EV@10K/F_4 2G Hynix 128Mx16 -->35K PD (Default)
    34.8K---> CS33482FB22
    JTAG_TRST# R391 EV@10K/F_4 2G Micron 128Mx16 -->45K PD
    45.3K ---> CS34532FB18
    2G Hynix 128Mx16 (D Die) -->30.1K PD
    DGPU_DPST_PWM R73 *EV@2K/F_4

    N13M-GS Straping table


    TP6 JTAG_TCK AM10 P6
    JTAG_TCK GPIO0 GPU_VID4 39
    TP41 JTAG_TMS
    JTAG_TMS [MISC_GPIO/I2C/JTAG/THER]
    AP11 M3
    TP42 JTAG_TDI AM11
    JTAG_TDI
    GPIO1
    GPIO2
    L6 DGPU_DPST_PWM
    GPU_VID3 39
    DGPU_DPST_PWM 22 Pin Name Strap Mapping Value
    TP39 JTAG_TDO AP12 P5 DGPU_DISP_ON 22
    TP40 JTAG_TRST# JTAG_TDO GPIO3
    AN11 JTAG_TRST_N GPIO4 P7 DGPU_LVDS_BLON 22
    GPIO5 L7 GPU_VID1 39 ROM_SCLK SMB_ALT_ADDR 0
    M7 GPU_VID2 39
    R410 EV@2.2K_4 N13P_SCL GPIO6
    +3V_GFX R7 N8
    R409 EV@2.2K_4 N13P_SDA I2CB_SCL GPIO7 SYS_SHDN_R#
    R6
    I2CB_SDA GPIO8
    M1 11/30 modify ROM_SI SUB_VENDOR 0
    M2 ALERT
    C GPIO9 C
    L1
    R411 OP@2.2K_4 DGPU_EDIDCLK R2 GPIO10
    +3V_GFX
    R412 OP@2.2K_4 DGPU_EDIDDATA R3 I2CC_SCL GPIO11
    M5
    VGA_OVT#
    GPU_VID0 39 ROM_SO VGA_DEVICE 0
    I2CC_SDA GPIO12
    N3 10/3 modify
    M4 GPU_VID5 39
    GPIO13
    GFx_SCL GPIO14 N4 0100(Hynix 64Mx16)
    GFx_SDA
    T4
    I2CS_SCL GPIO15
    P2 EV_HDMI_HPD 23 STRAP[3..0] RAM_CFG[3..0]
    T3
    I2CS_SDA GPIO16
    R8 GPU_DPRSLPVR 39 0110(Hynix 128Mx16)
    GPIO17 M6 EV_eDP_HPD 22
    R1
    TP48 THERM+ GPIO18
    TP7 THERM-
    K4
    THERMDP GPIO19
    P3 STRAP[4] PCIE_MAX_SPEED 0
    K3 P4
    THERMDN GPIO20
    P1
    GPIO21 Remark :
    DGPU_EDIDCLK 0 -> 10K PD
    22 DGPU_EDIDCLK
    22 DGPU_EDIDDATA DGPU_EDIDDATA

    STRAP0
    STRAP1
    J2
    J7
    STRAP0 [MISC2_ROM]
    ROM_SCLK
    ROM_CS_N
    H4
    H6
    H5
    ROM_SCLK
    R69
    ROM_SI
    EV@10K_4 +3V_GFX
    GFx SMBus Isolation
    GFx_SCL 1 3
    **
    GPUT_CLK 32
    1 -> 10K PU

    STRAP2 STRAP1 ROM_SI ROM_SO


    J6 STRAP2 ROM_SO H7
    STRAP3 J5 R406 Q26
    STRAP4 STRAP3 EV@4.7K_4 EV@2N7002
    J3
    R422 STRAP4
    2 +3V_GFX

    N13P-GS/GL 40.2K R422 SNP@40.2K/F_4 J1 L2 R402 *EV@10K_4 R405


    MULTISTRAP_REF_GND BUFRST_N
    2

    EV@4.7K_4 Q25
    EV@2N7002
    N13M-GS NC L3 R108 GL@10K_4 +3V_GFX GFx_SDA 1 3
    D CEC GPUT_DATA 32 D

    EV@N13x for N13P/M-GS for N13P- GL 11/8 change for GPU temp detect
    Quanta Computer Inc.
    SYS_SHDN_R# 1 3 R248 *EV@0_4 Reserve R108 Stuff R108
    R256 EV@0_4
    SYS_SHDN# 3,34,41
    ALERT 1 3 GPU_THERMAL_ALERT# 32
    PROJECT : ZQTA/ZQSA
    GPU_TRIP# 32
    VGA_OVT# 1 3 DGPU_OVT# 32 Size Document Number Rev
    EV@DTC144EUA Q10 1A
    Q23 EV@2N7002 DGPU 4/5 (MIO/GPIO)
    2

    Q47 EV@2N7002 Date: Friday, February 03, 2012 Sheet 18 of 44


    2

    PEGX_RST# 15
    +3V_GFX
    11/30 modify +3V_GFX

    1 2 3 4 5 6 7 8
    1 2 3 4 5 6 7 8

    +VGACORE
    www.rosefix.com A2
    AA17
    AA18
    U15G
    GND_1
    GND_2
    GND_3
    [GPU GND]
    GND_101
    GND_102
    GND_103
    D2
    D31
    D33 +VGACORE
    N13P-GL

    N13P-GS
    AJ0N13P0T08

    AJ0N13P0T32

    AA20
    GND_4 GND_104
    E10 N13M-GS AJ0N13M0T08
    AA22 E22
    U15F GND_5 GND_105 C92 EV@1u/6.3V_4
    AB12 GND_6 GND_106 E25
    AA12 U1 AB14 E5 C75 EV@0.1u/10V_4
    VDD_001 XVDD_001 GND_7 GND_107 C110 EV@0.1u/10V_4
    AA14
    VDD_002 [GPU VDD] XVDD_002
    U2 AB16
    GND_8 GND_108
    E7
    C116 EV@0.1u/10V_4
    AA16 U3 AB19 F28
    VDD_003 XVDD_003 GND_9 GND_109 C115 EV@0.1u/10V_4
    AA19 U4 AB2 F7
    VDD_004 XVDD_004 GND_10 GND_110 C104 EV@0.1u/10V_4
    AA21 U5 AB21 G10
    VDD_005 XVDD_005 GND_11 GND_111 C113 EV@0.1u/10V_4
    AA23 U6 A33 G13
    A
    AB13
    VDD_006
    VDD_007
    XVDD_006
    XVDD_007 U7 AB23
    GND_12
    GND_13
    GND_112
    GND_113 G16 PLACE UNDER GPU C83 EV@0.1u/10V_4 A

    AB15 U8 AB28 G19 C94 EV@0.1u/10V_4


    VDD_008 XVDD_008 GND_14 GND_114
    AB17 VDD_009 XVDD_009 V1 AB30 GND_15 GND_115 G2
    AB18 VDD_010 XVDD_010 V2 AB32 GND_16 GND_116 G22
    AB20 VDD_011 XVDD_011 V3 AB5 GND_17 GND_117 G25
    AB22 VDD_012 XVDD_012 V4 AB7 GND_18 GND_118 G28
    AC12 V5 AC13 G3 +VGACORE
    VDD_013 XVDD_013 GND_19 GND_119
    AC14 VDD_014 XVDD_014 V6 AC15 GND_20 GND_120 G30
    AC16 V7 AC17 G32
    VDD_015 XVDD_015 GND_21 GND_121
    AC19 V8 AC18 G33
    VDD_016 XVDD_016 GND_22 GND_122
    AC21 W2 AA13 G5
    VDD_017 XVDD_017 GND_23 GND_123 C103 C131 C102 C122 C126 C139 C80 C117
    AC23 VDD_018 XVDD_018 W3 AC20 GND_24 GND_124 G7
    M12 W4 AC22 K2
    VDD_019 XVDD_019 GND_25 GND_125
    M14 W5 AE2 K28
    VDD_020 XVDD_020 GND_26 GND_126 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6
    M16 W7 AE28 K30
    VDD_021 XVDD_021 GND_27 GND_127 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6
    M19 W8 AE30 K32
    VDD_022 XVDD_022 GND_28 GND_128
    M21 Y1 AE32 K33
    VDD_023 XVDD_023 GND_29 GND_129
    M23 Y2 AE33 K5
    VDD_024 XVDD_024 GND_30 GND_130
    N13 VDD_025 XVDD_025 Y3 AE5 GND_31 GND_131 K7
    N15 Y4 AE7 M13
    VDD_026 XVDD_026 GND_32 GND_132
    N17 VDD_027 XVDD_027 Y5 AH10 GND_33 GND_133 M15
    N18 VDD_028 XVDD_028 Y6 AA15 GND_34 GND_134 M17
    N20 Y7 AH13 M18
    VDD_029 XVDD_029 GND_35 GND_135
    N22 VDD_030 XVDD_030 Y8 AH16 GND_36 GND_136 M20
    P12 AA1 AH19 M22 +VGACORE
    VDD_031 XVDD_031 GND_37 GND_137
    P14 AA2 AH2 N12
    VDD_032 XVDD_032 GND_38 GND_138
    P16 VDD_033 XVDD_033 AA3 AH22 GND_39 GND_139 N14
    P19 AA4 AH24 N16
    VDD_034 XVDD_034 GND_40 GND_140
    P21 VDD_035 XVDD_035 AA5 AH28 GND_41 GND_141 N19
    P23 AA6 AH29 N2 C118 C72 C125 C101 C108 C90 C73
    VDD_036 XVDD_036 GND_42 GND_142
    R13 AA7 AH30 N21
    VDD_037 XVDD_037 GND_43 GND_143
    R15 VDD_038 XVDD_038 AA8 AH32 GND_44 GND_144 N23
    R17 AH33 N28 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6
    VDD_039 GND_45 GND_145 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6 EV@4.7u/6.3V_6
    B R18 VDD_040 AH5 GND_46 GND_146 N30 B
    R20 AH7 N32
    VDD_041 GND_47 GND_147
    R22 AJ7 N33
    VDD_042 GND_48 GND_148
    T12 AK10 N5
    VDD_043 GND_49 GND_149
    T14 AK7 N7
    VDD_044 GND_50 GND_150
    T16 AL12 P13
    VDD_045 GND_51 GND_151
    T19 AL14 P15
    VDD_046 GND_52 GND_152
    T21 AL15 P17
    VDD_047 GND_53 GND_153
    T23 AL17 P18
    VDD_048 GND_54 GND_154
    U13 AL18 P20
    VDD_049 GND_55 GND_155
    U15 AL2 P22
    VDD_050 GND_56 GND_156
    U17 VDD_051 AL20 GND_57 GND_157 R12
    U18 AL21 R14
    VDD_052 GND_58 GND_158
    U20 AL23 R16
    VDD_053 GND_59 GND_159
    U22 AL24 R19
    VDD_054 GND_60 GND_160
    V13 AL26 R21
    VDD_055 GND_61 GND_161
    V15 AL28 R23
    V17
    VDD_056
    VDD_057
    AL30
    GND_62
    GND_63
    GND_162
    GND_163
    T13 PLACE NEAR GPU +VGACORE
    V18 AL32 T15
    VDD_058 GND_64 GND_164
    V20 VDD_059 AL33 GND_65 GND_165 T17
    V22 AL5 T18
    VDD_060 GND_66 GND_166
    W12 AM13 T2
    VDD_061 GND_67 GND_167 C96
    W14 VDD_062 AM16 GND_68 GND_168 T20
    W16 AM19 T22 + C467 C164 C166 C464 C465 C160 C466
    VDD_063 GND_69 GND_169
    W19 AM22 AG11
    VDD_064 GND_70 GND_170 EV@4.7u/25V_8 EV@4.7u/25V_8 EV@4.7u/25V_8 EV@47u/6.3V_8
    W21 AM25 T28
    VDD_065 GND_71 GND_171 EV@330u/2.5V_3528 EV@4.7u/25V_8 EV@4.7u/25V_8 EV@22u/6.3V_8
    W23 VDD_066 AN1 GND_72 GND_172 T32
    Y13 VDD_067 AN10 GND_73 GND_173 T5
    Y15 AN13 T7
    VDD_068 GND_74 GND_174
    Y18 VDD_069 AN16 GND_75 GND_175 U12
    Y17 AN19 U14
    VDD_070 GND_76 GND_176
    Y20 AN22 U16
    VDD_071 GND_77 GND_177
    Y22 AN25 U19
    VDD_072 GND_78 GND_178 +3V_GFX
    AN30 U21
    EV@N13x GND_79 GND_179
    C AN34 U23 C
    GND_80 GND_180
    AN4 V12
    GND_81 GND_181
    AN7 GND_82 GND_182 V14
    AP2 V16 R383
    GND_83 GND_183 +3V EV@4.7K_4
    AP33 V19
    GND_84 GND_184
    B1 GND_85 GND_185 V21
    B10 V23
    GND_86 GND_186 R380
    B22 GND_87 GND_187 W13 DGPU_PWROK 10,15
    B25 W15 EV@4.7K_4
    GND_88 GND_188
    B28 W17
    GND_89 GND_189

    3
    B31 W18 R382
    GND_90 GND_190
    B34 W20 EV@100K/F_4
    GND_91 GND_191 DGPU_PGOK-1
    B4 W22 2
    GND_92 GND_192
    B7 GND_93 GND_193 W28
    C10 Y12
    GND_94 GND_194

    3
    C13 Y14 Q21

    1
    GND_95 GND_195 R381 DGPU_POK4 C411 EV@DTC144EUA
    C19 Y16 2
    for meet Power down sequence for +3V_GFX C22
    GND_96 GND_196
    Y19
    +1.5V_GFX
    EV@4.7K_4 Q20 EV@1000P/50V_4
    GND_97 GND_197 EV@MMBT3904-7-F
    C25 Y21

    1
    GND_98 GND_198 C412
    C28 Y23
    D4 EV@RB500V-40 GND_99 GND_199 *EV@1000P/50V_4
    +VGACORE C7 GND_100 GND_200 AH11 10/31 modify

    +3V_GFX C16
    GND_OPT_1

    3
    +1.5V_GFX D3 EV@RB500V-40 W32 +1.05V_GFX R375 DGPU_POK2 2
    GND_OPT_2 EV@4.7K_4
    Q19

    1
    EV@N13x C396 EV@MMBT3904-7-F
    *EV@1000P/50V_4

    +VGACORE

    31,39 +VGACORE
    15,16,17,40 +1.05V_GFX
    D D
    16,20,21,40 +1.5V_GFX
    15,17,18,39,40 +3V_GFX
    3,6,7,8,9,10,11,13,14,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41 +3V
    + +

    C476 C171
    *EV@330u/2V_7343 EV@330u/2V_7343

    Quanta Computer Inc.


    9/27 add PROJECT : ZQTA/ZQSA
    Power request Size Document Number Rev
    1A
    ESR DGPU 5/5 (Power/Ground)
    Date: Friday, February 03, 2012 Sheet 19 of 44
    1 2 3 4 5 6 7 8
    5 4 3 2 1

    www.rosefix.com
    CHANNEL A: 256MB/512MB DDR3
    16 VMA_DQ[63..0]
    16 VMA_DM[7..0]
    16 VMA_WDQS[7..0]
    HYNIX 900MHz 1G AKD5LZWTW05
    HYNIX 900MHz 2G AKD5MGWTW03
    16 VMA_RDQS[7..0]
    VRAM2 VRAM5 VRAM1 VRAM6

    VREFC_VMA1 M8 E3 VMA_DQ15 VREFC_VMA1 M8 E3 VMA_DQ27 VREFC_VMA3 M8 E3 VMA_DQ42 VREFC_VMA3 M8 E3 VMA_DQ62


    VREFD_VMA1 VREFCA DQL0 VMA_DQ10 VREFD_VMA1 VREFCA DQL0 VMA_DQ29 VREFD_VMA3 VREFCA DQL0 VMA_DQ45 VREFD_VMA3 VREFCA DQL0 VMA_DQ57
    H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
    F2 VMA_DQ14 F2 VMA_DQ25 F2 VMA_DQ43 F2 VMA_DQ63
    FBA_CMD9 DQL2 VMA_DQ9 FBA_CMD9 DQL2 VMA_DQ31 FBA_CMD9 DQL2 VMA_DQ47 FBA_CMD9 DQL2 VMA_DQ59
    D 16 FBA_CMD9 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 D
    FBA_CMD11 P7 H3 VMA_DQ12 FBA_CMD11 P7 H3 VMA_DQ26 FBA_CMD11 P7 H3 VMA_DQ41 FBA_CMD11 P7 H3 VMA_DQ61
    16 FBA_CMD11 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
    FBA_CMD8 P3 H8 VMA_DQ8 FBA_CMD8 P3 H8 VMA_DQ28 FBA_CMD8 P3 H8 VMA_DQ46 FBA_CMD8 P3 H8 VMA_DQ58
    16 FBA_CMD8 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
    FBA_CMD25 N2 G2 VMA_DQ13 FBA_CMD25 N2 G2 VMA_DQ24 FBA_CMD25 N2 G2 VMA_DQ40 FBA_CMD25 N2 G2 VMA_DQ60
    16 FBA_CMD25 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
    FBA_CMD10 P8 H7 VMA_DQ11 FBA_CMD10 P8 H7 VMA_DQ30 FBA_CMD10 P8 H7 VMA_DQ44 FBA_CMD10 P8 H7 VMA_DQ56
    16 FBA_CMD10 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
    FBA_CMD24 P2 FBA_CMD24 P2 FBA_CMD24 P2 FBA_CMD24 P2
    16 FBA_CMD24 A5 A5 A5 A5
    FBA_CMD22 R8 FBA_CMD22 R8 FBA_CMD22 R8 FBA_CMD22 R8
    16 FBA_CMD22 A6 A6 A6 A6
    FBA_CMD7 R2 D7 VMA_DQ5 FBA_CMD7 R2 D7 VMA_DQ16 FBA_CMD7 R2 D7 VMA_DQ33 FBA_CMD7 R2 D7 VMA_DQ55
    16 FBA_CMD7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
    FBA_CMD21 T8 C3 VMA_DQ3 FBA_CMD21 T8 C3 VMA_DQ22 FBA_CMD21 T8 C3 VMA_DQ36 FBA_CMD21 T8 C3 VMA_DQ49
    16 FBA_CMD21 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
    FBA_CMD6 R3 C8 VMA_DQ6 FBA_CMD6 R3 C8 VMA_DQ18 FBA_CMD6 R3 C8 VMA_DQ32 FBA_CMD6 R3 C8 VMA_DQ54
    16 FBA_CMD6 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
    FBA_CMD29 L7 C2 VMA_DQ0 FBA_CMD29 L7 C2 VMA_DQ23 FBA_CMD29 L7 C2 VMA_DQ38 FBA_CMD29 L7 C2 VMA_DQ50
    16 FBA_CMD29 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
    FBA_CMD23 R7 A7 VMA_DQ4 FBA_CMD23 R7 A7 VMA_DQ17 FBA_CMD23 R7 A7 VMA_DQ34 FBA_CMD23 R7 A7 VMA_DQ52
    16 FBA_CMD23 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
    FBA_CMD28 N7 A2 VMA_DQ2 FBA_CMD28 N7 A2 VMA_DQ21 FBA_CMD28 N7 A2 VMA_DQ37 FBA_CMD28 N7 A2 VMA_DQ48
    16 FBA_CMD28 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
    FBA_CMD20 T3 B8 VMA_DQ7 FBA_CMD20 T3 B8 VMA_DQ19 FBA_CMD20 T3 B8 VMA_DQ35 FBA_CMD20 T3 B8 VMA_DQ53
    16 FBA_CMD20 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
    FBA_CMD4 T7 A3 VMA_DQ1 FBA_CMD4 T7 A3 VMA_DQ20 FBA_CMD4 T7 A3 VMA_DQ39 FBA_CMD4 T7 A3 VMA_DQ51
    16 FBA_CMD4 A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
    FBA_CMD14 M7 FBA_CMD14 M7 FBA_CMD14 M7 FBA_CMD14 M7
    16 FBA_CMD14 A15 A15 A15 A15
    10/12 SWAP Pin 10/12 SWAP Pin 10/12 SWAP Pin
    FBA_CMD12 M2 B2 FBA_CMD12 M2 B2 FBA_CMD12 M2 B2 FBA_CMD12 M2 B2
    16 FBA_CMD12 BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2
    FBA_CMD27 N8 D9 FBA_CMD27 N8 D9 FBA_CMD27 N8 D9 FBA_CMD27 N8 D9
    16 FBA_CMD27 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
    FBA_CMD26 M3 G7 FBA_CMD26 M3 G7 FBA_CMD26 M3 G7 FBA_CMD26 M3 G7
    16 FBA_CMD26 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
    K2 K2 K2 K2
    VDD#K2 VDD#K2 VDD#K2 VDD#K2
    VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
    VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
    16 VMA_CLK0 VMA_CLK0 J7 N9 VMA_CLK0 J7 N9 16 VMA_CLK1 VMA_CLK1 J7 N9 VMA_CLK1 J7 N9
    VMA_CLK0# CK VDD#N9 VMA_CLK0# CK VDD#N9 VMA_CLK1# CK VDD#N9 VMA_CLK1# CK VDD#N9
    16 VMA_CLK0# K7 R1 K7 R1 16 VMA_CLK1# K7 R1 K7 R1
    FBA_CMD3 CK VDD#R1 FBA_CMD3 CK VDD#R1 FBA_CMD19 CK VDD#R1 FBA_CMD19 CK VDD#R1 +1.5V_GFX
    16 FBA_CMD3 K9 R9 K9 R9 16 FBA_CMD19 K9 R9 K9 R9
    CKE VDD#R9 CKE VDD#R9 +1.5V_GFX CKE VDD#R9 CKE VDD#R9

    FBA_CMD2 K1 A1 FBA_CMD2 K1 A1 FBA_CMD18 K1 A1 FBA_CMD18 K1 A1


    16 FBA_CMD2 ODT VDDQ#A1 ODT VDDQ#A1 16 FBA_CMD18 ODT VDDQ#A1 ODT VDDQ#A1
    C FBA_CMD0 L2 A8 FBA_CMD0 L2 A8 FBA_CMD16 L2 A8 FBA_CMD16 L2 A8 C
    16 FBA_CMD0 CS VDDQ#A8 CS VDDQ#A8 16 FBA_CMD16 CS VDDQ#A8 CS VDDQ#A8
    FBA_CMD30 J3 C1 FBA_CMD30 J3 C1 FBA_CMD30 J3 C1 FBA_CMD30 J3 C1
    16 FBA_CMD30 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
    FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9
    16 FBA_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
    FBA_CMD13 L3 D2 FBA_CMD13 L3 D2 FBA_CMD13 L3 D2 FBA_CMD13 L3 D2
    16 FBA_CMD13 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
    VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
    VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
    VMA_WDQS1 F3 H2 VMA_WDQS3 F3 H2 VMA_WDQS5 F3 H2 VMA_WDQS7 F3 H2
    VMA_RDQS1 DQSL VDDQ#H2 VMA_RDQS3 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2
    G3 H9 G3 H9 G3 H9 G3 H9
    DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9

    VMA_DM1 E7 A9 VMA_DM3 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9


    VMA_DM0 DML VSS#A9 VMA_DM2 DML VSS#A9 VMA_DM4 DML VSS#A9 VMA_DM6 DML VSS#A9
    D3 B3 D3 B3 D3 B3 D3 B3
    DMU VSS#B3 DMU VSS#B3 DMU VSS#B3 DMU VSS#B3
    E1 E1 E1 E1
    VSS#E1 VSS#E1 VSS#E1 VSS#E1
    G8 G8 G8 G8
    VMA_WDQS0 VSS#G8 VMA_WDQS2 VSS#G8 VMA_WDQS4 VSS#G8 VMA_WDQS6 VSS#G8
    C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2
    VMA_RDQS0 B7 J8 VMA_RDQS2 B7 J8 VMA_RDQS4 B7 J8 VMA_RDQS6 B7 J8
    DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8
    M1 M1 M1 M1
    VSS#M1 VSS#M1 VSS#M1 VSS#M1
    M9 M9 M9 M9
    VSS#M9 VSS#M9 VSS#M9 VSS#M9
    P1 P1 P1 P1
    FBA_CMD5 VSS#P1 FBA_CMD5 VSS#P1 FBA_CMD5 VSS#P1 FBA_CMD5 VSS#P1
    16 FBA_CMD5 T2 P9 T2 P9 T2 P9 T2 P9
    RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
    VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
    VMA_ZQ1 L8 T9 VMA_ZQ2 L8 T9 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
    ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
    Should be 240 Should be 240 Should be 240 Should be 240
    Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
    VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
    R43 D1 R364 D1 R34 D1 R373 D1
    VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
    EV@243/F_4 D8 EV@243/F_4 D8 EV@243/F_4 D8 EV@243/F_4 D8
    VSSQ#D8 VSSQ#D8 VSSQ#D8 VSSQ#D8
    E2 E2 E2 E2
    VSSQ#E2 VSSQ#E2 VSSQ#E2 VSSQ#E2
    J1 E8 J1 E8 J1 E8 J1 E8
    B NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 B
    L1 F9 L1 F9 L1 F9 L1 F9
    NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
    J9 G1 J9 G1 J9 G1 J9 G1
    NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
    L9 G9 L9 G9 L9 G9 L9 G9
    NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
    96-BALL 96-BALL 96-BALL 96-BALL
    SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
    EV@VRAM _DDR3 EV@VRAM _DDR3 EV@VRAM _DDR3 EV@VRAM _DDR3

    +1.5V_GFX +1.5V_GFX FBA_CMD17 TP1 +1.5V_GFX +1.5V_GFX


    16 FBA_CMD17
    FBA_CMD1 TP2
    16 FBA_CMD1
    10/14 modify
    VMA_CLK0 R366 R39 R36 R370
    EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4
    R371 VMA_CLK1
    EV@162/F_4
    VREFC_VMA1 VREFD_VMA1 R41 VREFC_VMA3 VREFD_VMA3
    VMA_CLK0# EV@162/F_4

    Fermi : Change to 160 ohm C376 VMA_CLK1# C24 C380


    R365 R38 C34 R35 EV@0.1u/10V_4 R369 EV@0.1u/10V_4
    1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402) EV@0.1u/10V_4 EV@0.1u/10V_4 Fermi : Change to 160 ohm
    2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402) EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4
    1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
    2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
    +1.5V_GFX
    A +1.5V_GFX A

    C416 EV@10u/6.3V_8 C386 EV@10u/6.3V_8 +1.5V_GFX


    19,40 +1.5V_GFX
    +1.5V_GFX C26 EV@1u/10V_4 C368 EV@10u/6.3V_8 C44 EV@10u/6.3V_8
    C375 EV@1u/10V_4
    +1.5V_GFX C369 EV@10u/6.3V_8 C28 EV@1u/10V_4 C381 EV@0.1u/10V_4 C88 EV@10u/6.3V_8

    C30 EV@1u/10V_4
    C379
    C382
    EV@1u/10V_4
    EV@1u/10V_4 C37 EV@1u/10V_4
    C35
    C377
    EV@0.1u/10V_4
    EV@0.1u/10V_4
    Quanta Computer Inc.
    C27 EV@1u/10V_4 C23 EV@1u/10V_4 C33 EV@1u/10V_4 C372 EV@0.1u/10V_4
    C374 EV@1u/10V_4 C29 EV@1u/10V_4 C31 EV@1u/10V_4 C378 EV@0.1u/10V_4 C385 EV@0.1u/10V_4 PROJECT : ZQTA/ZQSA
    C25 EV@1u/10V_4 C32 EV@1u/10V_4 C371 EV@1u/10V_4 C370 EV@0.1u/10V_4 C383 EV@0.1u/10V_4 Size Document Number Rev
    1A
    DGPU Memory 1/2 (DDR3)
    Date: Friday, February 03, 2012 Sheet 20 of 44
    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.comCHANNEL B: 256MB/512MB DDR3 16 VMC_DQ[63..0]


    16 VMC_DM[7..0]
    16 VMC_WDQS[7..0]
    16 VMC_RDQS[7..0]
    HYNIX 900MHz 1G AKD5LZWTW05
    HYNIX 900MHz 2G AKD5MGWTW03

    VRAM8 VRAM4 VRAM3 VRAM7

    VREFC_VMC1 M8 E3 VMC_DQ4 VREFC_VMC1 M8 E3 VMC_DQ30 VREFC_VMC3 M8 E3 VMC_DQ39 VREFC_VMC3 M8 E3 VMC_DQ50


    VREFD_VMC1 VREFCA DQL0 VMC_DQ1 VREFD_VMC1 VREFCA DQL0 VMC_DQ24 VREFD_VMC3 VREFCA DQL0 VMC_DQ34 VREFD_VMC3 VREFCA DQL0 VMC_DQ53
    H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
    F2 VMC_DQ6 F2 VMC_DQ28 F2 VMC_DQ37 F2 VMC_DQ51
    FBC_CMD9 DQL2 VMC_DQ2 FBC_CMD9 DQL2 VMC_DQ27 FBC_CMD9 DQL2 VMC_DQ33 FBC_CMD9 DQL2 VMC_DQ55
    D 16 FBC_CMD9 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 D
    FBC_CMD11 P7 H3 VMC_DQ7 FBC_CMD11 P7 H3 VMC_DQ29 FBC_CMD11 P7 H3 VMC_DQ38 FBC_CMD11 P7 H3 VMC_DQ48
    16 FBC_CMD11 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
    FBC_CMD8 P3 H8 VMC_DQ0 FBC_CMD8 P3 H8 VMC_DQ26 FBC_CMD8 P3 H8 VMC_DQ35 FBC_CMD8 P3 H8 VMC_DQ52
    16 FBC_CMD8 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
    FBC_CMD25 N2 G2 VMC_DQ5 FBC_CMD25 N2 G2 VMC_DQ31 FBC_CMD25 N2 G2 VMC_DQ36 FBC_CMD25 N2 G2 VMC_DQ49
    16 FBC_CMD25 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
    FBC_CMD10 P8 H7 VMC_DQ3 FBC_CMD10 P8 H7 VMC_DQ25 FBC_CMD10 P8 H7 VMC_DQ32 FBC_CMD10 P8 H7 VMC_DQ54
    16 FBC_CMD10 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
    FBC_CMD24 P2 FBC_CMD24 P2 FBC_CMD24 P2 FBC_CMD24 P2
    16 FBC_CMD24 A5 A5 A5 A5
    FBC_CMD22 R8 FBC_CMD22 R8 FBC_CMD22 R8 FBC_CMD22 R8
    16 FBC_CMD22 A6 A6 A6 A6
    FBC_CMD7 R2 D7 VMC_DQ19 FBC_CMD7 R2 D7 VMC_DQ9 FBC_CMD7 R2 D7 VMC_DQ44 FBC_CMD7 R2 D7 VMC_DQ59
    16 FBC_CMD7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
    FBC_CMD21 T8 C3 VMC_DQ21 FBC_CMD21 T8 C3 VMC_DQ12 FBC_CMD21 T8 C3 VMC_DQ42 FBC_CMD21 T8 C3 VMC_DQ61
    16 FBC_CMD21 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
    FBC_CMD6 R3 C8 VMC_DQ18 FBC_CMD6 R3 C8 VMC_DQ8 FBC_CMD6 R3 C8 VMC_DQ46 FBC_CMD6 R3 C8 VMC_DQ58
    16 FBC_CMD6 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
    FBC_CMD29 L7 C2 VMC_DQ23 FBC_CMD29 L7 C2 VMC_DQ13 FBC_CMD29 L7 C2 VMC_DQ40 FBC_CMD29 L7 C2 VMC_DQ63
    16 FBC_CMD29 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
    FBC_CMD23 R7 A7 VMC_DQ16 FBC_CMD23 R7 A7 VMC_DQ10 FBC_CMD23 R7 A7 VMC_DQ45 FBC_CMD23 R7 A7 VMC_DQ57
    16 FBC_CMD23 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
    FBC_CMD28 N7 A2 VMC_DQ22 FBC_CMD28 N7 A2 VMC_DQ14 FBC_CMD28 N7 A2 VMC_DQ43 FBC_CMD28 N7 A2 VMC_DQ62
    16 FBC_CMD28 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
    FBC_CMD20 T3 B8 VMC_DQ17 FBC_CMD20 T3 B8 VMC_DQ11 FBC_CMD20 T3 B8 VMC_DQ47 FBC_CMD20 T3 B8 VMC_DQ56
    16 FBC_CMD20 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
    FBC_CMD4 T7 A3 VMC_DQ20 FBC_CMD4 T7 A3 VMC_DQ15 FBC_CMD4 T7 A3 VMC_DQ41 FBC_CMD4 T7 A3 VMC_DQ60
    16 FBC_CMD4 A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
    FBC_CMD14 M7 FBC_CMD14 M7 FBC_CMD14 M7 FBC_CMD14 M7
    16 FBC_CMD14 A15 A15 A15 A15
    10/12 SWAP Pin 10/12 SWAP Pin 10/12 SWAP Pin 10/12 SWAP Pin
    FBC_CMD12 M2 B2 FBC_CMD12 M2 B2 FBC_CMD12 M2 B2 FBC_CMD12 M2 B2
    16 FBC_CMD12 BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2
    FBC_CMD27 N8 D9 FBC_CMD27 N8 D9 FBC_CMD27 N8 D9 FBC_CMD27 N8 D9
    16 FBC_CMD27 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
    FBC_CMD26 M3 G7 FBC_CMD26 M3 G7 FBC_CMD26 M3 G7 FBC_CMD26 M3 G7
    16 FBC_CMD26 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
    K2 K2 K2 K2
    VDD#K2 VDD#K2 VDD#K2 VDD#K2
    VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
    VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
    16 VMC_CLK0 VMC_CLK0 J7 N9 VMC_CLK0 J7 N9 16 VMC_CLK1 VMC_CLK1 J7 N9 VMC_CLK1 J7 N9
    VMC_CLK0# CK VDD#N9 VMC_CLK0# CK VDD#N9 VMC_CLK1# CK VDD#N9 VMC_CLK1# CK VDD#N9
    16 VMC_CLK0# K7 R1 K7 R1 16 VMC_CLK1# K7 R1 K7 R1
    FBC_CMD3 CK VDD#R1 FBC_CMD3 CK VDD#R1 +1.5V_GFX FBC_CMD19 CK VDD#R1 FBC_CMD19 CK VDD#R1 +1.5V_GFX
    16 FBC_CMD3 K9 R9 K9 R9 16 FBC_CMD19 K9 R9 K9 R9
    CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9

    FBC_CMD2 K1 A1 FBC_CMD2 K1 A1 FBC_CMD18 K1 A1 FBC_CMD18 K1 A1


    16 FBC_CMD2 ODT VDDQ#A1 ODT VDDQ#A1 16 FBC_CMD18 ODT VDDQ#A1 ODT VDDQ#A1
    C FBC_CMD0 L2 A8 FBC_CMD0 L2 A8 FBC_CMD16 L2 A8 FBC_CMD16 L2 A8 C
    16 FBC_CMD0 CS VDDQ#A8 CS VDDQ#A8 16 FBC_CMD16 CS VDDQ#A8 CS VDDQ#A8
    FBC_CMD30 J3 C1 FBC_CMD30 J3 C1 FBC_CMD30 J3 C1 FBC_CMD30 J3 C1
    16 FBC_CMD30 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
    FBC_CMD15 K3 C9 FBC_CMD15 K3 C9 FBC_CMD15 K3 C9 FBC_CMD15 K3 C9
    16 FBC_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
    FBC_CMD13 L3 D2 FBC_CMD13 L3 D2 FBC_CMD13 L3 D2 FBC_CMD13 L3 D2
    16 FBC_CMD13 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
    VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
    VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
    VMC_WDQS0 F3 H2 VMC_WDQS3 F3 H2 VMC_WDQS4 F3 H2 VMC_WDQS6 F3 H2
    VMC_RDQS0 DQSL VDDQ#H2 VMC_RDQS3 DQSL VDDQ#H2 VMC_RDQS4 DQSL VDDQ#H2 VMC_RDQS6 DQSL VDDQ#H2
    G3 H9 G3 H9 G3 H9 G3 H9
    DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9

    VMC_DM0 E7 A9 VMC_DM3 E7 A9 VMC_DM4 E7 A9 VMC_DM6 E7 A9


    VMC_DM2 DML VSS#A9 VMC_DM1 DML VSS#A9 VMC_DM5 DML VSS#A9 VMC_DM7 DML VSS#A9
    D3 B3 D3 B3 D3 B3 D3 B3
    DMU VSS#B3 DMU VSS#B3 DMU VSS#B3 DMU VSS#B3
    E1 E1 E1 E1
    VSS#E1 VSS#E1 VSS#E1 VSS#E1
    G8 G8 G8 G8
    VMC_WDQS2 VSS#G8 VMC_WDQS1 VSS#G8 VMC_WDQS5 VSS#G8 VMC_WDQS7 VSS#G8
    C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2
    VMC_RDQS2 B7 J8 VMC_RDQS1 B7 J8 VMC_RDQS5 B7 J8 VMC_RDQS7 B7 J8
    DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8
    M1 M1 M1 M1
    VSS#M1 VSS#M1 VSS#M1 VSS#M1
    M9 M9 M9 M9
    VSS#M9 VSS#M9 VSS#M9 VSS#M9
    P1 P1 P1 P1
    FBC_CMD5 VSS#P1 FBC_CMD5 VSS#P1 FBC_CMD5 VSS#P1 FBC_CMD5 VSS#P1
    16 FBC_CMD5 T2 P9 T2 P9 T2 P9 T2 P9
    RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
    VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
    VMC_ZQ1 L8 T9 VMC_ZQ2 L8 T9 VMC_ZQ3 L8 T9 VMC_ZQ4 L8 T9
    ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
    Should be 240 Should be 240 Should be 240 Should be 240
    Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
    VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
    R385 D1 R64 D1 R52 D1 R379 D1
    VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
    SNP@243/F_4 D8 SNP@243/F_4 D8 SNP@243/F_4 D8 SNP@243/F_4 D8
    VSSQ#D8 VSSQ#D8 VSSQ#D8 VSSQ#D8
    E2 E2 E2 E2
    VSSQ#E2 VSSQ#E2 VSSQ#E2 VSSQ#E2
    J1 E8 J1 E8 J1 E8 J1 E8
    B NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 B
    L1 F9 L1 F9 L1 F9 L1 F9
    NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
    J9 G1 J9 G1 J9 G1 J9 G1
    NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
    L9 G9 L9 G9 L9 G9 L9 G9
    NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
    96-BALL 96-BALL 96-BALL 96-BALL
    SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
    SNP@VRAM _DDR3 SNP@VRAM _DDR3 SNP@VRAM _DDR3 SNP@VRAM _DDR3

    +1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX

    VMC_CLK0 R62 R74 VMC_CLK1 R56 R376


    SNP@1.33K/F_4 SNP@1.33K/F_4 SNP@1.33K/F_4 SNP@1.33K/F_4
    R388 R49
    SNP@162/F_4 SNP@162/F_4
    VREFC_VMC1 VREFD_VMC1 VREFC_VMC3 VREFD_VMC3
    VMC_CLK0# VMC_CLK1#

    Fermi : Change to 160 ohm Fermi : Change to 160 ohm C79 C403
    R63 C121 R70 C148 R58 SNP@0.1u/10V_4 R377 SNP@0.1u/10V_4
    1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402) SNP@0.1u/10V_4 SNP@0.1u/10V_4 1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
    2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402) SNP@1.33K/F_4 SNP@1.33K/F_4 2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402) SNP@1.33K/F_4 SNP@1.33K/F_4

    A +1.5V_GFX A
    19,40 +1.5V_GFX
    FBC_CMD17 TP3
    +1.5V_GFX +1.5V_GFX 16 FBC_CMD17
    C152 SNP@10u/6.3V_8
    FBC_CMD1 TP4
    16 FBC_CMD1
    C21 SNP@0.1u/10V_4 C53 SNP@1u/10V_4
    C448 SNP@10u/6.3V_8 C445 SNP@0.1u/10V_4 C410 SNP@1u/10V_4
    +1.5V_GFX C132 SNP@0.1u/10V_4 C51 SNP@1u/10V_4

    C137 SNP@1u/10V_4
    C446 SNP@1u/10V_4 C393
    C397
    SNP@0.1u/10V_4
    SNP@0.1u/10V_4
    C22
    C97
    SNP@1u/10V_4
    SNP@1u/10V_4
    Quanta Computer Inc.
    C384 SNP@1u/10V_4 C394 SNP@1u/10V_4 C399 SNP@0.1u/10V_4 C426 SNP@1u/10V_4
    C68 SNP@1u/10V_4 C58 SNP@1u/10V_4 C442 SNP@0.1u/10V_4 C391 SNP@1u/10V_4 PROJECT : ZQTA/ZQSA
    C423 SNP@1u/10V_4 C429 SNP@1u/10V_4 C50 SNP@0.1u/10V_4 C389 SNP@1u/10V_4 Size Document Number Rev
    1A
    DGPU Memory 2/2 (DDR3)
    Date: Friday, February 03, 2012 Sheet 21 of 44
    5 4 3 2 1
    1 2 3 4 5 6 7 8

    C504 0.1u/10V_4
    CRT
    www.rosefix.com F1
    D12 SSM22LLPT CRTVDD5

    16
    +5V 2 1
    CN12
    From EXT VGA From PCH SMD KMC3S110RY/1.1A_1206 CRT
    6
    R106 DO@0_4 CRT_RED_COM R121 IV@0_4 CRT_RED_COM L14 SP@SBK160808T-600Y-N/0.4A/60ohm_6
    CRT_R1 1 11 CRT_11 T4
    17 EV_CRT_RED 7 INT_CRT_RED
    7
    R105 DO@0_4 CRT_GRN_COM R120 IV@0_4 CRT_GRN_COM L12 CRT_G1
    SP@SBK160808T-600Y-N/0.4A/60ohm_6 2 12 DDCDAT_1
    17 EV_CRT_GRN 7 INT_CRT_GRN
    8
    R104 DO@0_4 CRT_BLU_COM R119 IV@0_4 CRT_BLU_COM L10 CRT_B1
    SP@SBK160808T-600Y-N/0.4A/60ohm_6 3 13 CRTHSYNC
    17 EV_CRT_BLU 7 INT_CRT_BLU
    9
    4 14 CRTVSYNC
    VSYNC_COM R117 IV@0_4 VSYNC_COM R158 R153 R151 C230 C225 C219 C221 C227 C231 10
    17 VSYNC_COM 7 INT_VSYNC
    HSYNC_COM R118 IV@0_4 HSYNC_COM 5 15 DDCCLK_1
    17 HSYNC_COM 7 INT_HSYNC
    150/F_4 150/F_4 150/F_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4
    R408 DO@0_4 CRT_DDCDAT_COM R417 IV@0_4 CRT_DDCDAT_COM
    A 17 EV_CRTDDAT 7 INT_CRT_DDCDAT A
    R407 DO@0_4 CRT_DDCCLK_COM R416 IV@0_4 CRT_DDCCLK_COM
    17 EV_CRTDCLK 7 INT_CRT_DDCCLK

    17
    +3V
    C520 U19
    CRTVDD5 1 16 CRT_VSYNC2 R450 0_4 CRTVSYNC C513 0.1u/10V_4 CRTVDD5
    0.1u/10V_4 VCC_SYNC SYNC_OUT2 CRT_HSYNC2 R451 0_4 CRTHSYNC
    14
    SYNC_OUT1 C210 10p/50V_4 CRTVSYNC
    7
    C517 0.22u/25V_6 CRT_BYP VCC_DDC
    8
    BYP VSYNC_COM CRTVDD5 C214 10p/50V_4 CRTHSYNC
    15
    SYNC_IN2 HSYNC_COM +3V
    +3V 2 13
    VCC_VIDEO SYNC_IN1 C204 *10p/50V_4 DDCCLK_1
    C521 R455 R452
    CRT_R1 3 10 CRT_DDCCLK_COM R454 2.7K_4 C216 *10p/50V_4 DDCDAT_1
    0.1u/10V_4 CRT_G1 VIDEO_1 DDC_IN1 CRT_DDCDAT_COM R453 2.7K_4 2.7K_4 2.7K_4
    4 11
    CRT_B1 VIDEO_2 DDC_IN2
    5
    VIDEO_3 DDCCLK_1
    9
    DDC_OUT1 DDCDAT_1
    6 12
    GND DDC_OUT2
    CM2009-02QR

    LVDS & eDP LCD Power


    From PCH From EXT VGA
    R32 *DO@0_4 +3V
    18 DGPU_DPST_PWM
    INT_LVDS_EDIDCLK RP25 4 3 IV@0_4P2R LVDS_EDIDCLK_CON RP24 4 3 DO@0_4P2R
    7 INT_LVDS_EDIDCLK DGPU_EDIDCLK 18
    INT_LVDS_EDIDDATA 2 1 LVDS_EDIDDATA_CON 2 1 R21 DO@0_4 LVDS_BRIGHT
    7 INT_LVDS_EDIDDATA DGPU_EDIDDATA 18 32 CONTRAST
    RP1 4 3 IV@0_4P2R TXLCLKOUT+_CON RP2 4 3 DO@0_4P2R R20 IV@0_4 C7 U1
    7 INT_TXLCLKOUT+ EV_TXLCLK+ 17 7 INT_LVDS_BRIGHT
    2 1 TXLCLKOUT-_CON 2 1
    7 INT_TXLCLKOUT- EV_TXLCLK- 17
    B RP7 4 3 IV@0_4P2R TXLOUT0+_CON RP8 4 3 DO@0_4P2R 1u/6.3V_4 6 1 LCDVCC B
    7 INT_TXLOUT0+ EV_TXLOUT0+ 17 IN OUT
    2 1 TXLOUT0-_CON 2 1
    7 INT_TXLOUT0- EV_TXLOUT0- 17
    RP3 4 3 IV@0_4P2R TXLOUT1+_CON RP4 4 3 DO@0_4P2R 4 2 C6 C38 C4 C3 C13
    7 INT_TXLOUT1+ EV_TXLOUT1+ 17 IN GND
    2 1 TXLOUT1-_CON 2 1 R27 0_4
    7 INT_TXLOUT1- EV_TXLOUT1- 17
    RP5 4 3 IV@0_4P2R TXLOUT2+_CON RP6 4 3 DO@0_4P2R L1 R11 IV@0_4 3 5 *0.1u/10V_4 *2.2u/10V_8 0.1u/10V_4 0.01u/25V_4 22u/6.3V_8
    7 INT_TXLOUT2+ EV_TXLOUT2+ 17 7 INT_LVDS_DIGON ON/OFF GND
    2 1 TXLOUT2-_CON 2 1 3 4 USBP8+_R
    7 INT_TXLOUT2- EV_TXLOUT2- 17 9 USBP8+ 3 4
    2 1 USBP8-_R R10 DO@0_4
    9 USBP8- 2 1 18 DGPU_DISP_ON
    G5243AT11U
    *MCM2012B900GBE/400mA/90ohm
    R28 0_4 R9
    Enable/Disable LVDS
    S 1217 Stuff L1 ,Unstuff R28 & R29
    Pull Up--->Enable 100K_4
    NC-->Disable

    +3V R419 2.2K_4 LVDS_EDIDDATA_CON


    R418 2.2K_4 LVDS_EDIDCLK_CON

    +1.05V Lid Switch (Hall sensor)


    R350
    3 INT_eDP_HPD_Q
    1K_4
    3

    +3V
    +3VPCU
    R355 10K_4 CABLE_ID
    2 R353 SP@0_4 eDP-HPD R360 0_6
    R354 *10K_4
    Q18 IV@/OP@-->0 ohm
    2N7002E C364 0.1u/10V_4
    DO@-->10K ohm
    1

    1
    R351 DO@0_4 2 LID591#
    C 18 EV_eDP_HPD C

    2
    HE1
    R352 APX9132H AI D10

    3
    100K_4 EM-6781-T3: AL006781000 *VPORT_6
    APX9132H AI-TRG: AL009132001

    1
    CN1 VIN AH9249NTR-G1: AL009249000
    G_5

    G_6

    VIN R12 *SHORT_8 INVCC0


    R15 *SHORT_8 40
    39 C5 C11
    From PCH 38

    3
    3
    EDP-ML0+
    EDP-ML0-
    RP12 2
    4
    1 IV@0_4P2R
    3
    COM_EDP-ML0+
    COM_EDP-ML0-
    C9
    C8
    0.1u/10V_4
    0.1u/10V_4
    EDP-ML0+_R
    EDP-ML0-_R
    37
    36
    4.7u/25V_8 1000p/50V_4 Backlight Control +3VPCU
    35
    RP11 COM_EDP-AUX+ EDP-AUX+_R 34
    3 EDP-AUX+ 2 1 IV@0_4P2R C16 0.1u/10V_4
    COM_EDP-AUX- C20 0.1u/10V_4 EDP-AUX-_R 33 R25
    3 EDP-AUX- 4 3
    32 *100K_4
    TXLCLKOUT+_CON 31 G_4 +3V
    TXLCLKOUT-_CON 30 +3V LID591#
    29 LID591# 32
    TXLOUT0+_CON 28
    27 LID591#,EC intrnal PU

    1
    TXLOUT0-_CON C15 C14
    From EXT VGA 26
    25
    D2
    RP10 4 3 DO@0_4P2R COM_EDP-ML0+ TXLOUT1+_CON 0.1u/10V_4 R40 BAS316
    17 EV_EDP-ML0+ 24
    2 1 COM_EDP-ML0- TXLOUT1-_CON 1000p/50V_4
    17 EV_EDP-ML0- 23 R18 10K_4

    2
    RP9 22
    17 EV_EDP-AUX+ 4 3 DO@0_4P2R COM_EDP-AUX+ TXLOUT2+_CON BL_ON
    COM_EDP-AUX- TXLOUT2-_CON 21 10K_4
    17 EV_EDP-AUX- 2 1
    20

    3
    LVDS_EDIDDATA_CON 19
    LVDS_EDIDCLK_CON 18
    eDP-HPD 17 BL# 2 2 EC_FPBACK# 32
    LVDS_BRIGHT R31 16
    15

    3
    BL_ON BLM15AG121SS1/0.5A/120ohm_4 R23 IV@0_4 Q2 Q3
    14 7 INT_LVDS_BLON
    +3V R359 *SHORT_6 2N7002K DTC144EUA

    1
    +3V LCDVCC 13

    1
    12 R24 DO@0_4
    D 0.8A 11 18 DGPU_LVDS_BLON 2 D

    CABLE_ID 10 G_1 Q1
    6,10 CABLE_ID 9 R22 2N7002K
    R358 CCD_PWR 8
    CCD +3V-current budget 0.2A +3V

    1
    R16 R17 *SHORT_6 7 100K_4
    DO@100K_4 USBP8-_R 6
    DO@100K_4 USBP8+_R 5
    EDP-AUX+_R COM_EDP-AUX+
    CCD-USB 4
    EDP-AUX-_R COM_EDP-AUX- 3
    26 MIC2_INTL1 2
    1 Quanta Computer Inc.
    G_0

    R13 R14 R19 R30 3,6,7,8,9,10,11,13,14,19,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41 +3V


    DO@100K_4 DO@100K_4
    DO@100K_4 DO@100K_4
    8,11,23,25,26,31,34,41
    8,24,25,30,31,32,33,34,41,42
    +5V
    +3VPCU
    PROJECT : ZQTA/ZQSA
    ADOGND GS12401-1011-40P-R-NH 3,5,7,8,9,11,32,35,36,40,41 +1.05V Size Document Number Rev
    1A
    10/3 add 9/26 modify pin define
    33,34,35,36,37,38,39,40,41,42,43 VIN CRT/LVDS/CAMERA/LID
    Date: Friday, February 03, 2012 Sheet 22 of 44
    1 2 3 4 5 6 7 8
    5 4 3 2 1

    HDMI
    www.rosefix.com HDMI connector
    CN13
    20
    INT_HDMITX2P_C SHELL1
    1
    From PCH 2
    D2+
    D2 Shield
    C270 0.1u/10V_4 INT_HDMITX2N_C INT_HDMITX2N_C 3
    7 INT_HDMITX2N D2-
    C284 0.1u/10V_4 INT_HDMITX2P_C INT_HDMITX1P_C 4
    7 INT_HDMITX2P D1+
    5
    C258 0.1u/10V_4 INT_HDMITX1N_C INT_HDMITX1N_C D1 Shield
    D 7 INT_HDMITX1N 6 D
    C261 0.1u/10V_4 INT_HDMITX1P_C INT_HDMITX0P_C D1-
    7 INT_HDMITX1P 7
    D0+
    8
    C264 0.1u/10V_4 INT_HDMITX0N_C INT_HDMITX0N_C D0 Shield
    7 INT_HDMITX0N 9
    C268 0.1u/10V_4 INT_HDMITX0P_C INT_HDMICLK+_C D0-
    7 INT_HDMITX0P 10
    CK+
    11
    C254 0.1u/10V_4 INT_HDMICLK+_C INT_HDMICLK-_C CK Shield
    7 INT_HDMICLK+ 12
    C251 0.1u/10V_4 INT_HDMICLK-_C CK-
    7 INT_HDMICLK- 13
    CE Remote
    14
    +5V HDMI_DDCCLK_MB NC
    15
    SMD KMC3S110RY/1.1A_1206 HDMI_DDCDATA_MB DDC CLK
    DO@--->499 ohm 16
    DDC DATA
    R512 R515 R522 R520 R518 R516 R525 R523 F2 D19 17
    P/N:CS14992FB24 SP@590_4 SP@590_4 SP@590_4 SP@590_4 2 1 HDMI_5V_R SSM22LLPT HDMI_5V 18
    GND
    SP@590_4 SP@590_4 SP@590_4 SP@590_4 +5V
    IV@/OP@--->590 ohm 19
    HP DET
    P/N:CS15902FB00 21
    C545 HDMI_MB_HP R178 0_4 HP_DET_CN SHELL2
    470p/50V_4 HDMI CONN

    3
    R179
    Q38 9/22 change parts
    +5V 2 100K_4

    R517 2N7002E
    *100K/F_4

    1
    From EXT VGA
    C RP14 2 C
    1 DO@0_4P2R INT_HDMITX2N +3V
    17 EV_HDMITX2N
    17 EV_HDMITX2P 4 3 INT_HDMITX2P IV@:iGPU +3V

    17 EV_HDMITX1N
    RP15 2 1 DO@0_4P2R INT_HDMITX1N
    INT_HDMITX1P
    EV@:dGPU HDMI-detect R181
    4 3
    17 EV_HDMITX1P
    OP@:Optimus R174 10K_4
    RP16 2 1 DO@0_4P2R INT_HDMITX0N 10K_4
    17 EV_HDMITX0N
    17 EV_HDMITX0P 4 3 INT_HDMITX0P DO@:Discrete only R185 IV@0_4
    HDMI_HP 7

    3
    17 EV_HDMICLK-
    RP17 2
    4
    1 DO@0_4P2R
    3
    INT_HDMICLK-
    INT_HDMICLK+
    SP@:Special R189 DO@0_4
    17 EV_HDMICLK+ 32 HDMI_HPD_EC# EV_HDMI_HPD 18
    2

    3
    +5V R180 *10K_4 Q12
    2N7002E

    1
    HDMI_MB_HP 2

    Q11
    I2C 2N7002E

    1
    R239
    UMA R245 CS22202JB18
    R239 +5V
    DIS R245 CS24702JB38

    2
    +3V
    D20
    RB501V-40
    +3V

    1
    B B

    R489 Q35 R494


    EMI
    2

    SP@2.2K_4 BSN20 2.2K_4


    From EXT VGA 1 3 HDMI_DDCCLK_MB
    INT_HDMITX2P_C
    R493 DO@0_4 HDMI_DDCCLK_COM
    17 EV_HDMI_DDCCK_C
    R212 IV@100/F_4
    R508 DO@0_4 HDMI_DDCDATA_COM
    17 EV_HDMI_DDCDAT_C
    INT_HDMITX2N_C
    +5V
    INT_HDMITX1P_C
    2

    R200 IV@100/F_4
    +3V D21
    RB501V-40 INT_HDMITX1N_C
    +3V
    INT_HDMITX0P_C
    From PCH
    1

    Q37 R204 IV@100/F_4


    R501 IV@0_4 HDMI_DDCCLK_COM R510 R509
    7 HDMI_DDCCLK_SW
    2

    SP@2.2K_4 BSN20 2.2K_4 INT_HDMITX0N_C

    R504 IV@0_4 HDMI_DDCDATA_COM 1 3 HDMI_DDCDATA_MB INT_HDMICLK+_C


    7 HDMI_DDCDATA_SW
    R193 IV@100/F_4

    INT_HDMICLK-_C

    A A

    Quanta Computer Inc.


    3,6,7,8,9,10,11,13,14,19,22,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41
    8,11,22,25,26,31,34,41
    +3V
    +5V
    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    HDMI (PS8101)
    Date: Friday, February 03, 2012 Sheet 23 of 44
    5 4 3 2 1
    1 2 3 4 5 6 7 8

    MINI-CARD WLAN(MPC)
    +3.3V: 1000mA
    +3.3Vaux:330mA
    www.rosefix.com +WL_VDD +3V
    +3V

    R347 *0_8 +WL_VDD


    +WL_VDD

    +1.5V:500mA 30,32 BT_POWERON#


    C354 C636 C640 C638

    2
    Q42 R652 R660 10u/6.3V_8 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
    10K_4 *10K_4
    DTC144EUA Q48 AO3413
    Check LED signal. (active high or low)
    1 3BT_PWRON +3VPCU 1 3
    +3V
    A CN18 +1.5V A
    Debug TP70 51 52 +WL_VDD C685

    2
    CL_RST1#_WLAN Reserved +3.3V R597 1/5 modify 0.33u/10V_6
    49 Reserved GND 50
    PLTRST# R636 *0_4 CL_DATA1_WLAN 47 48 +1.5V_Mimi *10K_4
    R639 *0_4 CL_CLK1_WLAN Reserved +1.5V +1.5V_Mimi R605 *0_6
    9 CLK_LPC_DEBUG 45 Reserved LED_WPAN# 46
    43 GND LED_WLAN# 44 LED_WLAN# 31
    +WL_VDD 41 42 R659 4.7K_4
    +3.3Vaux LED_WWAN# 32 IOAC_LANPWR# C639 C641 C635
    39 +3.3Vaux GND 40
    *1000p/50V_4 *0.1u/10V_4 *10u/6.3V_8
    37
    35
    GND
    GND
    USB_D+
    USB_D-
    38
    36
    USBP10+
    USBP10-
    9
    9
    EC GPIO46
    9 PCIE_TX8+ 33 34
    PETp0 GND WL_CLK_SDATA R663 *0_4 SMB_PCH_DAT
    9 PCIE_TX8- 31 32
    PETn0 SMB_DATA WL_CLK_SCLK R664 *0_4 SMB_PCH_CLK SMB_PCH_DAT 9
    29 GND SMB_CLK 30
    27 28 SMB_PCH_CLK 9
    GND +1.5V +1.5V_Mimi
    9 PCIE_RX8+ 25 26 1/5 add
    PERp0 GND
    9 PCIE_RX8- 23 24 +WL_VDD
    PERn0 +3.3Vaux PLTRST#
    21 22 PLTRST# 9,15,28,32
    GND PERST#
    19 20 RF_EN 32
    UIM_C4 W_DISABLE#
    17 18
    UIM_C8 GND
    A_LFRAME#_R R610 0_4
    Debug
    15 16 LPC_LFRAME# 8,32
    CLK_PCH_SRC5 GND UIM_VPP A_LAD3_R R609 0_4
    9 CLK_PCH_SRC5 13 REFCLK+ UIM_RESET 14 LPC_LAD3 8,32
    CLK_PCH_SRC5# 11 12 A_LAD2_R R608 0_4
    9 CLK_PCH_SRC5# REFCLK- UIM_CLK LPC_LAD2 8,32
    9 10 A_LAD1_R R607 0_4
    GND UIM_DATA LPC_LAD1 8,32
    PCIE_CLK_REQ5#_R 7 8 A_LAD0_R R606 0_4
    CLKREQ# UIM_PWR LPC_LAD0 8,32
    5 6 +1.5V_Mimi
    Reserved +1.5V
    3 4

    GND

    GND
    PCIE_WAKE#_R Reserved GND
    32 WAKE_WALN# 3 1 1 WAKE# +3.3V 2 +WL_VDD
    MINI-CARD1

    53

    54
    Q49
    DTC144EUA
    2

    B B

    +WL_VDD
    3 1 PCIE_CLK_REQ5#_R
    9 PCIE_CLK_REQ5#

    Q50
    DTC144EUA
    2

    +WL_VDD

    SSD-MINI moule +3V_SATA

    R615 *SHORT_8 +3V


    C616 C615 C647

    *0.1u/10V_4 *0.1u/10V_4 *10u/10V_8

    +3V_SATA

    C C

    CN7
    51 52
    LED_OUT Reserved +3.3V
    TP38 49 50
    Reserved GND
    47 Reserved +1.5V 48
    45 46
    Reserved LED_WPAN#
    43 44
    GND LED_WLAN#
    41 +3.3Vaux LED_WWAN# 42
    39 40
    +3.3Vaux GND
    37 GND USB_D+ 38 USBP3+ 9
    35 36 USBP3- 9
    C345 *0.01u/16V_4 SATA_TXP_SSD_R GND USB_D-
    8 SATA_TXP_SSD 33 34
    C347 *0.01u/16V_4 SATA_TXN_SSD_R PETp0 GND
    8 SATA_TXN_SSD 31 PETn0 SMB_DATA 32
    29 30
    GND SMB_CLK
    27 28
    C346 *0.01u/16V_4 SATA_RXN_SSD_R GND +1.5V
    8 SATA_RXN_SSD 25 PERp0 GND 26
    C348 *0.01u/16V_4 SATA_RXP_SSD_R 23 24
    8 SATA_RXP_SSD PERn0 +3.3Vaux
    21 22
    GND PERST#
    19 20
    UIM_C4 W_DISABLE#
    17 UIM_C8 GND 18

    15 16
    GND UIM_VPP
    13 REFCLK+ UIM_RESET 14
    11 12
    REFCLK- UIM_CLK
    9 10
    GND UIM_DATA
    7 8
    CLKREQ# UIM_PWR
    5 6
    Reserved +1.5V
    3 4
    GND

    GND

    Reserved GND
    1 2
    WAKE# +3.3V
    *MINI-CARD1
    53

    54

    D D
    S 1217
    Unstuff for C2-test

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    MINI PCI-E / SSD
    Date: Friday, February 03, 2012 Sheet 24 of 44
    1 2 3 4 5 6 7 8
    1 2 3 4

    MAIN SATA HDD(HDD) www.rosefix.com +3V


    G Sensor
    CN14
    R330
    1 1 *SHORT_6
    2 SATA_TXP0_C C556 0.01u/25V_4 SATA_TXP0 8
    A 3 SATA_TXN0_C C559 0.01u/25V_4 SATA_TXN0 8 U9 A
    4 +VDD_3 1 4
    SATA_RXN0 C566 0.01u/25V_4 VDD_IO SCL/SPC CLK_SCLK 9,13,14,31
    5 SATA_RXN0_C 8
    6 SATA_RXP0 C571 0.01u/25V_4 8 6
    SATA_RXP0_C 8 CS SDA/SDI/SDO CLK_SDATA 9,13,14,31
    7
    8 +VDD_3 15 9 T17
    ADC2 INT2
    9
    10 C353 C350 14 11
    VDD INT1 G_SENSOR_INT#_PCH 9
    11
    12 +5V_HDD GS@0.1u/10V_4 GS@10u/6.3V_6 13 16
    ADC3 ADC1
    13
    14 12 GND RES 10
    15
    16 5 7 R346 *SHORT_4
    GND SDO/SA0
    17
    18 2 NC NC 3
    19 19
    GS@LIS3DHTR

    SATA HDD
    B B
    R541 *SHORT_8 +5V_HDD
    +5V G-Sensor -->GS@
    C592 C585 C579 C578 C582 C577
    +
    *100u/6.3V_3528 10u/6.3V_6 *0.1u/16V_4 *0.1u/16V_4 0.01u/25V_4 0.01u/25V_4

    +5V +5V_ODD
    ODD (ODD) Zero Power (ODD) Q24
    +5V

    ZP@AO6402A
    6
    5 4 R428 NZP@0_8
    2
    +3VPCU 1
    CN10 Zero Power -->ZP@ R131
    C 14 ZP@22_8 C

    3
    GND14 R431 MOD_EN_5V
    +15V
    1 R432 ZP@100K
    GND1

    3
    2 SATA_TXP5_C C223 0.01u/25V_4 SATA_TXP5 8 ZP@100K 10/3 add
    RXP

    3
    3 SATA_TXN5_C C222 0.01u/25V_4 SATA_TXN5 8
    RXN
    GND2 4
    5 SATA_RXN5 C208 0.01u/25V_4 ODD_POWER_R 2
    TXN SATA_RXN5_C 8

    1
    6 SATA_RXP5 C207 0.01u/25V_4 2 ODD_POWER_R
    TXP SATA_RXP5_C 8

    3
    7 C453
    GND3 +5V_ODD ZP@ME2N7002D Q27

    2
    Q6 ZP@ME2N7002D

    1
    8 SATA_DP R140 *1K_4 32 EC_ODD_EN 2

    1
    DP
    +5V 9
    10 Q28 ZP@0.1u/50V_6
    +5V C175 C177 C474 C475 C469 C468 ZP@ME2N7002D
    +

    RSVD 11
    12 R437

    1
    GND 0.01u/25V_4 0.01u/25V_4 *0.1u/16V_4 *0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528 *ZP@100K
    GND 13

    GND15 15

    C18534-11305-L
    EC_ODD_EJ 32
    D D
    10/3 change PN
    Quanta Computer Inc.
    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    SATA-HDD/ODD/G Sensor
    Date: Friday, February 03, 2012 Sheet 25 of 44
    1 2 3 4
    5 4 3 2 1

    Codec(ADO)
    www.rosefix.com Mute(ADO) +3V +5VA

    reverse R441 R633 R634


    R618 *0_4
    HP 27 HP-L ADOGND
    MIC1-VREFO-L
    *10K_4 10K_4
    27 HP-R R622 0_4
    MIC1-VREFO-L 27
    PD# *BAS316 D24 EAPD#
    MIC1-VREFO-R 27
    D D
    MIC2-VREFO BAS316 D22 AMP_MUTE#
    ADOGND
    R627 *0_4 MIC1-VREFO-L
    BAS316 D26 PCH_AZ_CODEC_RST#
    C661 10u/6.3V_6 ADOGND
    C653
    +
    2.2u/6.3V_6
    Place next to pin 27
    C666 C665
    C648 ADOGND 2.2u/6.3V_6 0.1u/10V_4 +5VA
    +5VA +
    Place next to pin 25
    2.2u/6.3V_6
    C633 C634
    10u/6.3V_6 0.1u/10V_4 C668 C669
    10/6 change footprint

    36

    35

    34

    33

    32

    31

    30

    29

    28

    27

    26

    25
    Place next to pin 38 U26
    0.1u/10V_4 10u/6.3V_6

    CBP

    CPVEE

    HP-OUT-L

    MIC1-VREFO-L

    MIC2-VREFO

    LDO-CAP

    AVSS1

    AVDD1
    CBN

    HP-OUT-R

    MIC1-VREFO-R

    VREF
    ADOGND
    ADOGND
    +5V_S5
    37 24 ADOGND
    AVSS2 LINE1-R T42
    ANALOG
    Spilt by AGND 38 23 T43 U25
    AVDD2 LINE1-L

    5
    32 AMP_MUTE# 1
    +5V R599 *SHORT_6 +5VPVDD1 39 22 4 R595 *SHORT_4 HP_MUTE# 27
    PVDD1 MIC1-R MIC1-R 27
    EAPD# 2
    C611 C621 C627 C631 27 L_SPK+ L_SPK+ 40 21 MIC1-L 27
    MIC TC7SH08FU C609

    3
    SPK-L+ MIC1-L *4.7u/10V_6
    10u/6.3V_6 0.1u/10V_4 10u/6.3V_6 0.1u/10V_4 27 L_SPK- L_SPK- 41 20
    C SPK-L- MONO-OUT C

    R632 20K/F_4
    42 PVSS1 (Vista Premium Version) JDREF 19 ADOGND
    43 PVSS2 Sense-B 18

    27 R_SPK- R_SPK- 44 17 MIC2_INT_R C671 1u/35V_6 MIC2_INT_R_C R638 1K_4 MIC2_INTL1


    SPK-R- MIC2-R
    27 R_SPK+ R_SPK+ 45 16 MIC2_INT_L C670 1u/35V_6 MIC2_INT_L_C R637 1K_4
    SPK-R+ MIC2-L MIC2_INT_R_C
    +5V R598 *SHORT_6 +5VPVDD2 46 15
    PVDD2 LINE2-R MIC2_INT_L_C

    GPIO0/DMIC-DATA
    C610 C617 C626 C630 EAPD# 47

    GPIO1/DMIC-CLK
    SPDIFO2/EAPD LINE2-L 14
    C673 C674
    10u/6.3V_6 0.1u/10V_4 10u/6.3V_6 0.1u/10V_4 48 13 SENSEA R630 20K/F_4

    SDATA-OUT
    SPDIFO Sense A MIC1_JD 27
    *1000p/50V_4 *1000p/50V_4

    SDATA-IN

    DVDD-IO

    PCBEEP
    RESET#
    BIT-CLK
    49 R631 39.2K/F_4
    DVDD1

    DVSS2
    PGND HPOUT_JD 27

    SYNC
    ANALOG
    PD#
    Place next to pin 46
    Spilt by DGND ALC271X-VB6-GR ADOGND ADOGND
    1

    10

    11

    12
    PCBEEP dont coupling any signals if possible
    DIGITAL 8/17 separate PCBEEP to Digital from Realtek suggestion vendor suggest reserved for layout issue with noise

    1.6Vrms
    +3V R617 *SHORT_6
    PCBEEP C662 1u/35V_6 BEEP_1 R624 47K/F_4 BEEP_2 D23 BAS316
    SPKR 8
    C650 C649 C663 R626
    0.1u/10V_4 10u/6.3V_6 4.7K_4 D25 BAS316
    PCBEEP_EC 32
    100p/50V_4

    C660 *100p/50V_4
    B B
    Place next to pin 1 PCH_AZ_CODEC_RST# 8
    PCH_AZ_CODEC_SYNC 8

    +3V
    PD# C659 C657
    0V : Power down Class D SPK amplifer
    3.3V : Power up Class D SPK amplifer 0.1u/10V_4 10u/6.3V_6

    Place next to pin 9


    ACZ_SDIN0_R R623 22_4
    PCH_AZ_CODEC_SDIN0 8
    C656 *22p/50V_4

    PCH_AZ_CODEC_BITCLK 8

    PCH_AZ_CODEC_SDOUT 8

    Power (ADO) INT MIC array


    DIGITAL ANALOG
    +5V L39 UPB201209T-310Y-N/6A/31ohm_8 R625
    +5VA 22 MIC2_INTL1 MIC2_INTL1 MIC2-VREFO
    U27 R643 0_4
    3 4 C658 2.2K_4
    IN OUT R588 0_4
    2 R298 0_4 *22p/50V_4 1/7 by FAE's recommend
    GND C672 C676 R641 0_4
    +
    A A
    1 5 R635 *29.4K/F_4 R309 0_4
    SHDN SET *10u/10V_3216 *0.1u/10V_4 C619 *1000p/50V_4
    *G923-330T1UF C664 *1000p/50V_4
    C667 + C675 R629 ADOGND
    *10K/F_4
    *0.1u/10V_4 *10u/10V_3216 ADOGND ADOGND
    C677 0.1u/10V_4
    R628 *0_4
    Tied at one point only under Quanta Computer Inc.
    ADOGND the codec or near the codec
    ADOGND PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    cap place close to MIC-connector 1A
    C730, C787 close U37 pin3 and L65 REALTEK ALC271X-VB6-GR
    Date: Friday, February 03, 2012 Sheet 26 of 44
    5 4 3 2 1
    5 4 3 2 1

    MIC
    www.rosefix.com
    26 MIC1-VREFO-R

    26 MIC1-VREFO-L
    Internal Speaker
    Normal OPEN Jack
    R314 R312
    4.7K/F_4 4.7K/F_4
    CN17
    1 CN16
    D C336 4.7u/6.3V_6 MIC1_L2 R316 1K/F_4 MIC1_L3 L19 MIC1_L4 R311 0_6 L_SPK+_1 D
    26 MIC1-L 2 26 L_SPK+ 1
    BLM15AG121SS1/0.5A/120ohm_4 6 26 L_SPK- R297 0_6 L_SPK-_1
    C335 4.7u/6.3V_6 MIC1_R2 R310 1K/F_4 MIC1_R3 L18 MIC1_R4 R259 0_6 R_SPK-_1 2
    26 MIC1-R 3 26 R_SPK- 3
    BLM15AG121SS1/0.5A/120ohm_4 5 26 R_SPK+ R260 0_6 R_SPK+_1
    MIC1_JD_R 4
    4
    C330 50273-0047N-001
    +3V LINE-IN-SP6 C333 C313 C314
    Max. 100mVrms input for Mic-IN C334 C337 1000p/50V_6 1000p/50V_6 1000p/50V_6 1000p/50V_6
    470p/50V_4 470p/50V_4

    R651
    ADOGND
    100K_4
    ADOGND
    MIC1_JD_R MIC1_JD_R

    1
    D7
    26 MIC1_JD 3 1 ADOGND
    *VPORT_6

    2
    Q44
    9/19 modify
    10/31 add ADOGND
    2N7002K
    C C

    HP

    26 HP_MUTE# HP_MUTE# CN19


    1
    2

    HP-L2 R332 47/F_4 HP-L3 L23 BLM15AG121SS1/0.5A/120ohm_4 HP-L4 2


    HP-R2 R323 47/F_4 HP-R3 L22 BLM15AG121SS1/0.5A/120ohm_4 HP-R4 6
    26 HP-L 3 1 HP-L2 3
    HP_JD_R 5
    Q17 R329 R337 C342 C352 4
    *FDV301N
    R338 0_6 *1K_4 *1K_4 2200p/50V_4 2200p/50V_4 LINE-IN-SP6

    10/11 add ADOGND

    ADOGND
    HP_MUTE#
    B HP_JD_R B
    2

    1
    3 1 HP-R2 +3V
    26 HP-R
    D8
    Q16
    *FDV301N *VPORT_6

    2
    R327 0_6 R650
    10/31 add
    10/11 add 100K_4
    ADOGND
    HP_JD_R
    2

    10/31 add
    3 1 ADOGND
    26 HPOUT_JD

    Q43
    2N7002K

    A A

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    AUDIO JACK CONN
    Date: Friday, February 03, 2012 Sheet 27 of 44
    5 4 3 2 1
    5 4 3 2 1

    LAN/Card reader
    www.rosefix.com
    X'tal 25MHz
    (1.5A) 60 mils +3V_S5 R621

    R616
    *SHORT_6

    *SHORT_6
    VDD33

    VDDREG
    40 mils
    50 mils
    Transformer
    S 1217
    LAN_XTALI 1. remove R5 R6 & R7 TXCT0
    TXCT1
    R592 TXCT2
    1M/F_4 SP16 SP15 R3 75/F_8 TXCT3
    Y4 SP14
    VDD33

    2
    LAN_XTAL2 2 1 LAN_XTALI SP13
    LAN_XTAL2 VDD33/18
    C613 25MHz C618 VDD10 VDD10 R4 C2 D9
    D R585 2.49K/F_4 LED0/SPICSB 10/31 modify *1M_8 SG@B88069X9231T203 D
    220p/3KV_1808
    27P/50_4 27P/50_4 GPO_NC R646 10K_4
    VDD33
    LED1/SPICLK/EESK L24

    1
    24 TXCT0
    MCT0
    1
    TCT0 RJ45-TX0+

    64
    63
    62
    61
    60
    59
    58
    57
    56
    55
    54
    53
    52
    51
    50
    49
    TX0+ 23
    U23 GND_LAN MDI0+ 2
    TD0+ RJ45-TX0-
    65 22

    GPO
    AVDD33
    AVDD33

    AVDD10
    CKXTAL2
    CKXTAL1
    AVDD33
    XD_CD#
    MS_D0/xD_D1
    MS_D4/xD_D0

    VDD33/18
    DVDD10
    RSET

    SD_CD#/MS_D5/xD_ALE

    LED0/SPICSB

    LED1/SPISCK
    GND MDI0- TX0-
    Power source mode: 3 TD0-
    21 TXCT1
    Pin45 :Pull-up VDD33 for SWR mode 4
    MCT1
    TCT1 RJ45-TX1+
    Pull-down for LDO mde TX1+
    20
    MDI1+ 5 TD1+ RJ45-TX1-
    19
    MDI1- TX1-
    (1.5A) 70 mils 6
    TD1- TXCT2
    18
    MDI0+ REGOUT MCT2
    1 MDIP0 REGOUT 48 7 TCT2
    MDI0- 2 47 +3V 17 RJ45-TX2+
    MDIN0 VDDREG VDDREG TX2+
    VDD10 3 46 C362 *6.8P/50V_4 MDI3+ MDI2+ 8
    MDI1+ AVDD10 VDDREG ENSWREG R612 *SHORT_4 C363 *6.8P/50V_4 MDI3- TD2+ RJ45-TX2-
    4 45 VDD33 16
    MDI1- MDIP1 ENSWREG_H SDA/SPIDI C360 *6.8P/50V_4 MDI2+ MDI2- TX2-
    5 44 9
    MDI2+ MDIN1 SDA/SPIDI LED3/SPIDO/EEDO_NC TP69 C361 *6.8P/50V_4 MDI2- TD2- TXCT3
    6 43 15
    MDI2- MIDP2 LED3/SPIDO SCL/LED_CR_NC TP68 R619 C358 *6.8P/50V_4 MDI1+ MCT3
    7 MDIN2 SCL/LED_CR 42 10 TCT3
    8 41 1K_4 C359 *6.8P/50V_4 MDI1- 14 RJ45-TX3+
    VDD10 AVDD10 DVDD10 VDD10 TX3+
    MDI3+ 9 40 PCIE_WAKE# C356 *6.8P/50V_4 MDI0+ C355 MDI3+ 11
    MDI3- 10
    MDIP3 RTL8411 LANWAKEB
    39 VDD33 C357 *6.8P/50V_4 MDI0- 0.01u/25V_4 TD3+
    13 RJ45-TX3-
    MDIN3 DVDD33 ISOLATEB MDI3- TX3-
    VDD33 11 38 12
    AVDD33 ISOLATEB TD3-
    12
    DVDD33 PERSTB
    37 Reserver for EMI
    CARD_3V3 13 36 CLK_PCIE_LAN_REQ# LFE9276C-R
    SP1 Card_3V3 CLKREQB SP12 R620
    14 SD_D7/xD_RDY SD_WP/MS_D1/xD_WP# 35
    SP2 15 34 SP11
    SP3 SD_D6/MS_INS#/xD_RE# MS_BS/xD_CLE VDD33/18 15K/F_4
    16 33

    SD_CMD/MS_D6/xD_D3
    SD_D1/MS_CLK/xD_D6

    SD_CLK/MS_D3/xD_D4
    C SD_D5/xD_CE# VDD33/18 C
    SD_D0/MS_D7/xD_D5

    SD_D3/MS_D2/xD_D2
    RJ45
    SD_D4/xD_WE#

    SD_D2/xD_D7

    REFCLK_N
    REFCLK_P
    CN8

    EVDD10
    LED0/SPICSB 9 YELLOW_N

    HSON
    HSOP
    R349 220_8 ACT_LED_PWR
    HSIN
    10
    HSIP
    GND

    GND
    +3V_S5 YELLOW_P
    9,15,24,32 PLTRST#
    14
    CARD_3V3 RJ45-TX0+ GND2
    1 13
    17
    18
    19
    20
    21
    22
    23
    24
    25
    26
    27
    28
    29
    30
    31
    32
    29 CARD_3V3 0+ GND1
    RJ45-TX0- 2
    RJ45-TX1+ 0- GND_LAN
    3 1+
    SP1 SP4 RJ45-TX2+ 4 S 1217
    29 SP1 SP2 SP5 RJ45-TX2- 2+ Change from short pad to 0805
    29 SP2 5
    SP3 SP6 PCIE_RXN3_R C637 0.1u/10V_4 RJ45-TX1- 2-
    29 SP3 PCIE_RX3- 9 6
    SP4 SP7 PCIE_RXP3_R C632 0.1u/10V_4 RJ45-TX3+ 1-
    29 SP4 PCIE_RX3+ 9 7
    SP5 SP8 RJ45-TX3- 3+
    29 SP5 EVDD10 8
    SP6 SP9 3-
    29 SP6 SP7 SP10 CLK_PCIE_LOM# 9 R356 *SHORT_8
    29 SP7 SP8 CLK_PCIE_LOM 9 LED1/SPICLK/EESK11
    29 SP8 PCIE_TX3- 9 GREEN_N
    SP9 R8 220_8 LNK_LED_PWR 12
    29 SP9 PCIE_TX3+ 9 +3V_S5 GREEN_P
    SP10
    29 SP10
    SP11 RJ45 GND_LAN
    29 SP11 SP12
    29 SP12 SP13
    29 SP13
    SP14
    29 SP14
    SP15
    29 SP15 SP16
    29 SP16

    CLK_PCIE_LAN_REQ#
    B 9 CLK_PCIE_LAN_REQ# B

    7 PCIE_WAKE#
    PCIE_WAKE# SURGE
    U11 U10
    MDI1- 1 8 RJ45-TX1- 1 8
    MDI1+ 1 8 RJ45-TX1+ 1 8
    2 7 2 7
    MDI0- 2 7 RJ45-TX0- 2 7
    3 6 3 6
    MDI0+ 3 6 RJ45-TX0+ 3 6
    4 5 4 5
    4 5 4 5
    *SG@UCLAMP2512T.TCT *SG@UCLAMP2512T.TCT
    10 mils
    VDD33 VDD33/18
    10 mils
    Power-on Strapping
    VDD33/18
    VDD10
    SDA/SPIDI R611 1.5K/F_4 C643 C644
    *4.7u/6.3V_6 0.1u/10V_4 REGOUT L38 C628 C622
    PCIE_WAKE# U13 U12
    R614 *10K_4 (1.5A) 60 mils 2.2uH/1A *4.7u/6.3V_6 0.1u/10V_4
    C651 C654 MDI3- 1 8 RJ45-TX3- 1 8
    CLK_PCIE_LAN_REQ# R613 *10K_4 4.7u/6.3V_6 MDI3+ 1 8 RJ45-TX3+ 1 8
    0.1u/10V_4 2 7 2 7
    MDI2- 2 7 RJ45-TX2- 2 7
    9/22 change footprint 3 3 6 6 3 3 6 6
    LED1/SPICLK/EESK R604 10K_4 MDI2+ 4 5 RJ45-TX2+ 4 5
    4 5 4 5
    Close to Chip Place close to pin 33 *SG@UCLAMP2512T.TCT *SG@UCLAMP2512T.TCT
    Place Close pins-- 48 Place close to pin 53

    VDDREG EVDD10
    VDD33 40 mils 30 mils
    40 mils (1.5A) 60 mils VDD10
    A R600 3,7,8,9,10,11,15,30,31,34,35,36,41,42 +3V_S5 A
    *SHORT_6
    C596 C595 C645 C655 C602 C606 C652 C642 C646 C625 C608 C597 C598 C624
    0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 C623 0.1u/10V_4
    0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 1u/6.3V_4 Quanta Computer Inc.
    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    LAN-RTL8411/CARD READER
    Place Close to LAN chip, for VDD33 pins-- 11, 12, 39, 58, 63, 64 Place connect to Pin46/47 Place Close to LAN chip, for VDD33 pins-- 3, 8, 41, 52, 61 Close to Pin29 Date: Friday, February 03, 2012 Sheet 28 of 44

    5 4 3 2 1
    A B C D E

    CARD READER CONNECTOR www.rosefix.com XD,MMC 4.2/SD,MS/MSP


    7 IN1 CARD READER
    Share Pin
    SP1 SD_D7 xD_RDY
    SP2 SD_D6 MS_INS# xD_RE#
    SP3 SD_D5 xD_CE# CN5
    SP4 SD_D4 xD_WE#
    4 CARD_3V3 4
    SP5 SD_D1 MS_CLK xD_D6 13 SD-VCC
    SP6 SD_D0 MS_D7 xD_D5 SP13=SD_CD#=MS_D5=XD_ALE 1
    SP12=SD_WP=MS_D1=XD_WP# SD-CD-SW CARD_3V3
    SP7 SD_CLK MS_D3 xD_D4 2 SD-WP-SW XD-VCC 45
    SP8 SD_CMD MS_D6 xD_D3 SP5=SD_D1=MS_CLK=XD_D6 3
    SP6=SD_D0=MS_D7=XD_D5 SD-DAT1
    SP9 SD_D3 MS_D2 xD_D2 4 SD-DAT0
    SP10 SD_D2 xD_D7 SP7=SD_CLK=MS_D3=XD_D4 10 28 SP16=XD_CD#
    SP8=SD_CMD=MS_D6=XD_D3 SD-CLK XD-CD SP1=SD_D7=XD_RDY
    SP11 MS_BS xD_CLE 19 SD-CMD XD-R/B 29
    SP12 SD_WP MS_D1 xD_WP# SP9=SD_D3=MS_D2=XD_D2 23 30 SP2=SD_D6=MS_INS#=XD_RE#
    SP10=SD_D2=XD_D7 SD-DATA3 XD-RE SP3=SD_D5=XD_CE#
    SP13 SD_CD# MS_D5 xD_ALE 25 SD-DAT2 XD-CE 31
    SP14 MS_D4 xD_D0 SP1=SD_D7=XD_RDY 5 32 SP11=MS_BS=XD_CLE
    SP2=SD_D6=MS_INS#=XD_RE# MMC-DATA7 XD-CLE SP13=SD_CD#=MS_D5=XD_ALE
    SP15 MS_D0 xD_D1 8 MMC-DATA6 XD-ALE 33
    SP16 xD_CD# SP3=SD_D5=XD_CE# 17 34 SP4=SD_D4=XD_WE#
    SP4=SD_D4=XD_WE# MMC-DATA5 XD-WE SP12=SD_WP=MS_D1=XD_WP#
    21 MMC-DATA4 XD-WP 35

    7 SD-GND1
    15 37 SP14=MS_D4=XD_D0
    SD-GND2 XD-D0 SP15=MS_D0=XD_D1
    26 SD-WP-GND XD-D1 38
    27 39 SP9=SD_D3=MS_D2=XD_D2
    SD-CD-GND XD-D2 SP8=SD_CMD=MS_D6=XD_D3
    XD-D3 40
    CARD_3V3 22 41 SP7=SD_CLK=MS_D3=XD_D4
    SP11=MS_BS=XD_CLE MS-VCC XD-D4 SP6=SD_D0=MS_D7=XD_D5
    9 MS-BS XD-D5 42
    CARD_3V3 SP12=SD_WP=MS_D1=XD_WP# 11 43 SP5=SD_D1=MS_CLK=XD_D6
    28 CARD_3V3 SP15=MS_D0=XD_D1 MS-DATA1 XD-D6 SP10=SD_D2=XD_D7
    12 MS-DATA0 XD-D7 44
    SP9=SD_D3=MS_D2=XD_D2 14
    R577 *SHORT_4 SP1=SD_D7=XD_RDY SP2=SD_D6=MS_INS#=XD_RE# MS-DATA2
    28 SP1 16 MS-INS
    R251 *SHORT_4 SP2=SD_D6=MS_INS#=XD_RE# SP7=SD_CLK=MS_D3=XD_D4 18
    28 SP2 R252 *SHORT_4 SP3=SD_D5=XD_CE# SP5=SD_D1=MS_CLK=XD_D6 MS-DATA3
    28 SP3 20 MS-SCLK XD-GND1 36
    3
    R255 *SHORT_4 SP4=SD_D4=XD_WE# 46 3
    28 SP4 XD-GND2
    6 MS-GND1
    R254 *SHORT_4 SP5=SD_D1=MS_CLK=XD_D6 24
    28 SP5 R578 *SHORT_4 SP6=SD_D0=MS_D7=XD_D5 MS-GND2
    28 SP6 R242 *SHORT_4 SP7=SD_CLK=MS_D3=xD_D4
    28 SP7 R245 *SHORT_4 SP8=SD_CMD=MS_D6=xD_D3 R013-P13-HM
    28 SP8

    R253 *SHORT_4 SP9=SD_D3=MS_D2=XD_D2 1 : DFHS44FR012


    28 SP9 R257 *SHORT_4 SP10=SD_D2=XD_D7
    28 SP10 R581 *SHORT_4 SP11=MS_BS=XD_CLE 2 : :DFHS44FR014
    28 SP11 R580 *SHORT_4 SP12=SD_WP=MS_D1=XD_WP#
    28 SP12
    R576 *SHORT_4 SP13=SD_CD#=MS_D5=XD_ALE
    28 SP13 R640 *SHORT_4 SP14=MS_D4=XD_D0
    28 SP14 R579 *SHORT_4 SP15=MS_D0=XD_D1
    28 SP15 R642 *SHORT_4 SP16=XD_CD#
    28 SP16

    10/7 change 0 ohm

    10 mils
    SP5=SD_D1=MS_CLK=XD_D6 CARD_3V3

    SP7=SD_CLK=MS_D3=xD_D4
    2 C604 2
    10u/6.3V_6
    C591 C590

    *6P/50V_4 *6P/50V_4

    10/7 add
    Place close to connector
    EMI solution pin 13 or 22 or45

    1 1

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    CARD READER CONNECTOR
    Date: Friday, February 03, 2012 Sheet 29 of 44
    A B C D E
    5 4 3 2 1

    USB3.0/2.0
    www.rosefix.com
    S 1217 Stuff L17 ,Unstuff R248 & R256
    Blutooth
    +3V_S5
    Q33

    1
    AO3413

    3 BT_POWER

    C550
    BLUETOOTH CONNECTOR for BT3.0

    USBP4+_R
    5
    4
    3
    CN4
    5
    4
    C536 R475 + C549 1000p/50V_4 USBP4-_R 3
    USB 3.0 Connector 2 7

    2
    0.33u/10V_6 BT_LED 2 7
    47K_4 2.2u/6.3V_6 T9 1 1 6 6
    CN15
    SP@USB3.0 CONN 87213-0500G
    L17 USBPWR1 1
    D 1 VBUS D
    USBP2-_C 2 1 USBP2-_R 2 R653 4.7K_4
    2 1 2 D- 24,32 BT_POWERON#
    USBP2+_C 3 4 USBP2+_R 3
    3 4 3 D+
    4 4
    MCM2012B900GBE/400mA/90ohm USB30_RX3-_R GND R215 0_4
    5 5 SSRX- 9 USBP4+
    10/14 modify USB30_RX3+_R 6 R210 0_4
    6 SSRX+ 9 USBP4-
    7 7
    USB30_TX3-_R 8 GND
    USB30_TX3+_R 8 SSTX-
    9 9 SSTX+

    13
    12
    11
    10
    R265 U3@0_4 USB30_RX3+_R
    9 USB30_RX3+ +5V_S5
    R268 U3@0_4 USB30_RX3-_R
    9 USB30_RX3-
    USB/B

    13
    12
    11
    10
    U7
    2 8 +5VPCU_USBP0
    IN1 OUT3
    9 USB30_TX3+ 3 IN2 OUT2 7

    1
    6 C341 C339
    9 USB30_TX3- OUT1
    4 C340
    32 USBON# EN# 470P/50V_4 .1u/10V_4
    9/22 change footprint 1 GND
    5 *100U/6.3V_3528

    2
    USB30_TX3+ C310 U3@0.1u/10V_4 USB30_TX3+_C R237 U3@0_4 USB30_TX3+_R C349 OC#
    USB2.0 connector P/N:
    USB30_TX3- C312 U3@0.1u/10V_4 USB30_TX3-_C R241 U3@0_4 USB30_TX3-_R 1u/6.3V_4 G547E2P81U
    DFHS04FR487
    USB_OC4# CN20
    9 USB_OC4#
    C
    +5VPCU_USBP0 1 C
    2
    3
    4
    5
    +5VPCU L21 USBP1+_R 6
    USBP2-_R RV4 1 2 *EGA_4 2 1 USBP1+_R USBP1-_R 7 +5VPCU_USBP0
    9 USBP1+ 2 1
    C574 1u/6.3V_4 10/11 add 3 4 USBP1-_R 8
    9 USBP1- 3 4
    USBP2+_R RV5 1 2 *EGA_4 USBP9+_R 9
    U21 MCM2012B900GBE/400mA/90ohm USBP9-_R 10 13
    2 8 USBPWR1 USB30_RX3-_R RV7 1 2 *EGA_4 11 14
    IN1 OUT3
    3 IN2 OUT2 7 12
    1

    6 C573 USB30_RX3+_RRV6 1 2 *EGA_4 S 1217 Stuff L21 ,Unstuff R318 & R317
    USB_BC_EN 4 OUT1 C297 USB_CONN
    EN Stuff L20 ,Unstuff R315 & R313
    1 1000p/50V_4
    GND 100U/6.3V_3528 USB30_TX3-_R RV3 1
    5 2 *EGA_4 L20
    2

    OC# USBP9+_R
    9 USBP9+ 2 2 1 1 11/28 change footprint
    G547E1P81U USB30_TX3+_R RV2 1 2 *EGA_4 3 4 USBP9-_R
    9 USBP9- 3 4
    9 USB_OC1#
    MCM2012B900GBE/400mA/90ohm
    10/11 change to 3528 type

    B B
    USB Charger -->CH@
    USB Charger to 3.0 None Charger--> NCH@
    CB SELCDP Funcion
    0 X DCP autodetect with mouse/keyboard wakeup CEN:SLG55584A----pull up +3VPCU
    SLG55584----pull low
    1 0 S0 charging with SDP only
    R217 CH@47K_4 C292 *CH@0.1u/10V_4
    1 1 S0 charging with CDP or SDP only (depending on external device)

    5
    BC_CEN 2
    4 USB_BC_EN
    R544 CH@0_4 USB_CHARGE_ON 32 USB_BC_ON 1
    32 USB_BC_ON
    U5
    BC_CEN 1 8 R547 *CH@0_4 MAINON 32,36,37,40,41 U4

    3
    USBP2-_C CEN CB1 USBP2- CH@TC7SH08FU
    2 DM TDM 7 USBP2- 9
    USBP2+_C 3 6 USBP2+
    DP TDP USBP2+ 9
    4 5 C320 CH@0.1u/10V_4 R227 NCH@0_4
    SELCDP VDD
    Thermal Pad 9
    10/14 modify
    CH@SLG55584A
    A A
    R262 CH@10K_4 +5VPCU

    Quanta Computer Inc.


    USBP2-_C R540 U2@0_4 USBP2-
    USBP2+_C R543 U2@0_4 USBP2+ PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    10/18 add 1A
    USB/ BT/CHARGER
    Date: Friday, February 03, 2012 Sheet 30 of 44
    5 4 3 2 1
    5 4 3 2 1

    K/B
    www.rosefix.com 32
    32
    MY0
    MY1
    MY0
    MY1
    MY2
    1
    2
    3
    CN2 CPU FAN
    +3V
    32 MY2
    MY3 4
    32 MY3
    MY4 5
    32 MY4
    MY5 6
    32 MY5
    MY6 7 R42
    32 MY6
    MY7 8
    D 32 MY7 +5V D
    MY8 9 10K_4
    32 MY8
    MY9 10
    32 MY9
    MY10 11 R45 *0_8
    32 MY10
    MY11 12
    32 MY11

    2
    MY12 13 10/11 modify C49
    32 MY12 32 FANSIG
    MY13 14 2.2u/6.3V_6
    32 MY13
    MY14 15 U2 CN9
    32 MY14

    1
    MY15 16 2 3R44 *SHORT_8 TH_FAN_POWER
    32 MY15 VIN VO 1
    MY16 17 5
    32 MY16 GND 2
    MY17 18 1 6
    32 MY17 9,10 SML1ALERT# /FON GND 3

    2
    MX7 19 +VGACORE 7 C40 C41 C42
    32 MX7 GND
    MX6 20 4 8 FAN_CONN.
    32 MX6 32 CPUFAN#_DAC VSET GND
    MX5 21 2.2u/6.3V_6 *0.01u/25V_4 53398-0310-3P-L
    32 MX5

    1
    MX4 22 G995P1U 0.01u/25V_4 DFHD03MR026
    32 MX4
    MX3 23
    32 MX3
    MX2
    32 MX2
    MX1
    24
    25
    27
    28
    FANPWR = 1.6*VSET
    32 MX1
    MX0 26
    +3VPCU 32 MX0
    KB CONN

    RP13 10K_10P8R
    10 1 MX3
    C
    MX7 9 2 MX2 C
    9/14 modify MX6 8 3 MX1
    MX5 4 MX0
    MX4
    7
    6 5 TOUCHPAD & Switch CONN. Model EA/EG/BA---->SW3,SW4
    VA/VG--------->SW5,SW6

    +3V R101 0_6


    R424 *0_6 L9 0_6
    LED +3V_S5 R655
    R656
    1M/F_4
    1M/F_4
    +5V +3V
    +5V L8 *0_6

    +3V_S5 C174
    11/24 modify Power TP/B
    LED2 R427 R429 0.1u/10V_4 50mil
    PWRLED# R340 422/F_4 2 3 10K_4 10K_4 +TPVDD 1
    32 PWRLED#
    2
    R341 590/F_4 1 L6 0_6 TPCLK_R TPDATA_R 3
    32 SUSLED# 32 TPCLK
    L7 0_6 TPDATA_R TPCLK_R 4
    32 TPDATA
    LED_AMBER/BLUE 5
    C173 C172 10/5 modify 6
    *0.01u/25V_4 *0.01u/25V_4 RIGHT# 7
    Power Botton Blue 9,10 BOARD_ID4 8
    B +3V_S5 9 B
    10 BOARD_ID3
    R138 0_4 10 13
    PWRLED# R2 80.6/F_4 LED1 1 2 9,13,14,25 CLK_SDATA R139 0_4 11 14
    BEBL0089Z00 9,13,14,25 CLK_SCLK LEFT# 12
    LTST-C190TBKT/BLUE
    SW5 SW6 CN3
    +3VPCU R658 1M/F_4 RIGHT# LEFT#
    R657 1M/F_4 1 2 1 2
    5 6 5 6
    11/1 modify pin define
    3 4 3 4
    Battery +3VPCU
    11/24 modify LED5 VA@SWITCH VA@SWITCH
    R342 422/F_4 2 3
    32 BATLED0#
    SW3 SW4
    R343 590/F_4 1 RIGHT# LEFT#
    32 BATLED1# 1 2 1 2
    LED_AMBER/BLUE 5 6 5 6
    3 4 3 4
    Blue +3V
    NVA@SWITCH NVA@SWITCH
    HDD
    LED3
    R344 330/F_4 1 3
    8 SATA_ACT#
    HDD_LED
    For BA WLAN function
    A SW1 A
    AMBER +3V 1 2
    WLAN 5 6
    LED4 RF_SW#
    24 LED_WLAN#
    R345 422/F_4 1 3
    32 RF_SW# 3 4 Quanta Computer Inc.
    1
    BA@SWITCH
    WLAN_LED RV1
    PROJECT : ZQTA/ZQSA
    *BA@EGA-0402 Size Document Number Rev
    2

    1A
    KB/FAN/TP+FP/LED
    Date: Friday, February 03, 2012 Sheet 31 of 44
    5 4 3 2 1
    5 4 3 2 1

    EC(KBC)

    +3VPCU
    L13

    www.rosefix.com
    PBY160808T-250Y-N/3A/25ohm_6

    30mil

    E775AGND
    C228

    0.1u/10V_4
    +A3VPCU

    C226

    10u/6.3V_6
    +3V
    Power on bottom

    +3VPCU

    R156 2.2_6 D13 C522 C523


    1 2 +3VPCU_EC 0.03A(30mils)
    RB500V-40 4.7u/6.3V_6 0.1u/10V_4 R1
    C224 C220 C203 C217 C206 C483 10K_4

    115

    102
    SW2

    19
    46
    76
    88

    4
    4.7u/6.3V_6 0.1u/10V_4 *0.1u/16V_4 0.1u/10V_4 *0.1u/16V_4 0.1u/10V_4 U17
    1 2

    AVCC

    VDD
    VCC1
    VCC2
    VCC3
    VCC4
    VCC5
    E775AGND C519 10u/6.3V_8 ICM NBSWON# 5 6
    D CLK_PCI_775 3 4 D

    1
    C518 0.01u/25V_4 SWITCH
    3 97 C1 D1
    8,24 LPC_LFRAME# LFRAME GPIO90/AD0 TEMP_MBAT 33 11/04 modify
    126 98 0.1u/10V_4 *VPORT_6
    8,24 LPC_LAD0 LAD0 GPIO91/AD1 WAKE_WALN# 24
    R152 127 A/D 99 T32
    8,24 LPC_LAD1 LAD1 GPIO92/AD2
    128 100 ICM
    8,24 LPC_LAD2 ICM 33

    2
    *22_4 LAD2 GPIO93/AD3
    8,24 LPC_LAD3 1 LAD3
    9 CLK_PCI_775 2 LCLK
    101 T33
    GPIO94/DA0
    C218
    7 CLKRUN# 8 GPIO11/CLKRUN D/A GPI95/DA1 105 CPUFAN#_DAC 31
    106 WK_GPIO27 10
    GPI96/DA2
    *10p/50V_4 10 SIO_A20GATE 121 GPIO85/GA20

    10 SIO_RCIN# 122 KBRST/GPIO86


    64
    10 SIO_EXT_SCI# 29
    ECSCI/GPIO54 LPC
    GPIO01/TB2
    GPIO02
    79 T26
    ACIN 33
    SM BUS PU(KBC) +3VPCU
    95 NBSWON#
    GPIO03 MBCLK R434 10K_4
    22 EC_FPBACK# 6 96 RF_SW# 31
    GPIO24/LDRQ GPIO04 MBDATA R435 10K_4
    108 T36
    GPIO05
    26 AMP_MUTE# 124 93 LID591# 22
    GPIO10/LPCPD GPIO06/IOX_DOUT/RTS1 M_PON_R R644 *SHORT_4 GPUT_CLK R155 10K_4
    94 M_PON 42
    PLTRST# GPIO07 SLP_A#_R R645 *SHORT_4 GPUT_DATA R154 10K_4
    9,15,24,28 PLTRST# 7 114 SLP_A# 7
    LREST GPIO16 NUMLED# R313 *0_4
    GPIO30
    109 +1.05V_M_PG_R 7 1/6 modify
    24 RF_EN 123
    GPIO67/PWUREQ GPIO36/CTS1
    15 DGPU_OVT# 18 10/11 add
    80 2ND_MBCLK R143 10K_4
    GPIO41 VRON 35
    125 17 HWPG 2ND_MBDATA R144 10K_4
    8 IRQ_SERIRQ SERIRQ GPIO42/SCL3B/TCK
    20 VGA_THERM#_R R449 *SHORT_4
    GPIO43/SDA3B/TMS GPU_THERMAL_ALERT# 18
    10 SIO_EXT_SMI# 9 21 SUSB# 7
    GPIO65/SMI GPIO44/TDI 12/26 modify
    GPIO GPO47/SCL4
    24 GPU_TRIP# 18 del. T21
    25 D/C# 33
    GPIO50/PSCLK3/TDO S5_ON
    31 MX0 54 26 S5_ON 34,41
    KBSIN0 GPIO51
    31 MX1 55 KBSIN1 GPIO52/PSDAT3/RDY 27 HDMI_HPD_EC# 23
    56 28 12/22 modify
    31 MX2 KBSIN2 GPIO53/SDA4 GPU_PWR_ALERT# 39 del. T22
    C 31 MX3 57 KBSIN3 GPIO70 73 SUSC# 7 C
    31 MX4 58 74 PWROK_EC 7
    KBSIN4 GPIO71
    31 MX5 59 75 PCH_RSMRST# 7 H_PROCHOT# 3,35
    KBSIN5 GPIO72
    31 MX6 60 KBSIN6 GPIO75/SPI_SCK 82 MAINON 30,36,37,40,41

    3
    31 MX7 61 KBSIN7 GPO76/SHBM 83 T29
    84 Q31
    GPIO77 EC_ODD_EJ 25
    31 MY0 53 91 DNBSWON# 7
    KBSOUT0/JENK GPIO81 Do not use it PROCHOT_EC
    31 MY1 52 110 T34 2
    KBSOUT1/TCK GPO82/IOX_LDSH/TEST
    31 MY2 51 112 USBON# 30
    KBSOUT2/TMS GPO84/IOX_SCLK/XORTR
    31 MY3 50 107 USB_CHARGE_ON 30
    KBSOUT3/TDI GPIO97 R465 2N7002K
    31 MY4 49 KBSOUT4/JEN0 KB
    31 MY5 48

    1
    KBSOUT5/TDO 100K_4
    31 MY6 47 31 T20
    KBSOUT6/RDY GPIO56/TA1
    31 MY7 43 KBSOUT7 GPIO20/TA2/IOX_DIN_DIO 117 SUSON 37
    31 MY8 42 63 FANSIG 31
    KBSOUT8 GPIO14/TB1
    31 MY9 41
    KBSOUT9/SDP_VIS
    31 MY10 40
    KBSOUT10/P80_CLK TIMER GPIO15/A_PWM
    32 CONTRAST 22
    31 MY11 39 118 PCBEEP_EC 26
    KBSOUT11/P80_DAT GPIO21/B_PWM
    31 MY12 38 62 PWRLED# 31
    KBSOUT12/GPIO64 GPIO13/C_PWM
    31 MY13 37 65 BATLED0# 31
    KBSOUT13/GPIO63 GPIO32/D_PWM
    31 MY14 36 22 T25
    KBSOUT14/GPIO62 GPIO45/E_PWM SUSLED#
    31 MY15 35 16 SUSLED# 31
    KBSOUT15/GPIO61/XOR_OUT GPIO40/F_PWM/RI1
    31 MY16 34 81 T27
    GPIO60/KBSOUT16 GPIO66/G_PWM
    31 MY17 33 66 BATLED1# 31
    GPIO57/KBSOUT17 GPIO33/H_PWM/SOUT1

    MBCLK 70
    33 MBCLK GPIO17/SCL1
    MBDATA 69
    33 MBDATA GPIO22/SDA1
    9 2ND_MBCLK 2ND_MBCLK 67 SMB 113
    GPIO73/SCL2 GPIO87/CIRRXM/SIN_CR USB_BC_ON 30
    9 2ND_MBDATA 2ND_MBDATA 68 14
    GPIO74/SDA2 GPIO34/SIN1/CIRRXL +0.75V_ON 37 12/16 modify
    18 GPUT_CLK 119
    GPIO23/SCL3 IR GPIO46/CIRRXM/TRST
    23
    PROCHOT_EC
    IOAC_LANPWR# 24
    18 GPUT_DATA 120 111
    GPIO31/SDA3 GPO83/SOUT_CR/TRIST

    B 31 TPCLK 72 GPIO37/PSCLK1 F_SDI/F_SDIO1 86 PCH_SPI_SO 8


    To PCH GPIO27 B
    31 TPDATA 71 GPIO35/PSDAT1 F_SDO/F_SDIO0 87 PCH_SPI_SI 8
    Reserve for writing ME ROM 8 ME_WR 10
    GPIO26/PSCLK2 PS/2 FIU F_CS0
    90 SPI_CS0#_UR_ME 8
    24,30 BT_POWERON# 11 92 PCH_SPI_CLK 8
    GPIO27PSDAT2 F_SCK

    25 EC_ODD_EN 77 30 T23
    GPIO00/32KCLKIN GPIO55/CLKOUT/IOX_DIN_DIO +3V

    R147 0_4 +1.05V_VTT_EC VCC_POR


    85 VCC_POR# R146 47K/F_4 +3VPCU HWPG(KBC)
    12
    VCORF

    +1.05V VTT
    AGND
    GND1
    GND2
    GND3
    GND4
    GND5
    GND6

    3 EC_PECI R142 43_4 EC_PECR_R 13 104 +A3VPCU R463


    PECI VREF

    VTT - the power supply for the PECI signal WPCE885 10K_4
    5
    18
    45
    78
    89
    116

    103

    VCORF_uR 44

    PECI - the PECI 3.0 data bus, bidirectional signal. D14 BAS316 HWPG
    SM BUS ARRANGEMENT TABLE 38 HWPG_VCCSA
    DG0.9 and chklist 0.9 apply one series 43ohm near EC side D17 BAS316
    41 HWPG_1.8V
    SM Bus 1 Battery
    L11 PBY160808T-250Y-N/3A/25ohm_6 D15 *BAS316
    36,38 HWPG_VTT
    C478 SM Bus 2 PCH D16 BAS316
    37 HWPG_VDDR
    1u/6.3V_4 D18 BAS316
    pin14 +VCC_GFX pin13 GFX_PWRGD 34 SYS_HWPG
    E775AGND SM Bus 3 VGA
    pin22 +3V_D for ATI pin21 dGPU_VRON
    pin24 +1V for ATI pin23 +VGPU_CORE
    pin26 +1.8V_GPU for ATI pin25 +1.5V_GPU SM Bus 4 HDMI
    pin28 GPU_RST# pin27 dGPU_PWROK

    A A

    +3VPCU

    S5_ON R141 10K_4

    M_PON R654 BA@10K_4

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    WPCE885 & FLASH
    Date: Friday, February 03, 2012 Sheet 32 of 44
    5 4 3 2 1
    5 4 3 2 1

    PJ1
    POWER_JACK
    1
    2
    www.rosefix.com VA
    PL3
    FBMA-11-201209-800A50T
    VA1 PD5
    SBR1045SP5-13
    1

    2
    3
    VA2

    VA2
    1
    2
    3
    PQ30
    AOL1413

    5 1
    PR164
    0.01/F_0612

    2
    VIN
    1
    2
    3
    PQ31
    AOL1413

    3 C-Test

    1
    4
    PC97 PC5 PR8 PR161 24707_ACN PC107 PC104

    4
    0.1u/50V_6 0.1u/50V_6 220K_4 *Short_4 0.1u/50V_6 0.1u/50V_6 PR28
    PL2 PD6 33K/F_4
    FBMA-11-201209-800A50T SMAJ20A PR158 24707_ACP

    2
    D
    C-Test *Short_4 D
    PC2 PC1
    0.1u/50V_6 0.1u/50V_6 1 6 PR11
    PD1 *Short_4
    1SS355 PR1 2 5 PR29
    D/C# 32
    220K_4 10K_4
    recommend 200mA at least. 3 4

    3
    PQ1
    IMD2AT108
    2

    PQ3
    24707_ACP 2N7002K

    1
    VA2 24707_ACN
    12/28 Modify
    C-Test PC99 PC8 PC100
    0.1u/50V_6 0.1u/50V_6 0.1u/50V_6

    PR19 PR17 PR3


    *0_6 *Short_6 63.4K/F_4

    1
    VIN
    PR162 PC101

    ACP

    ACN
    10K/F_4 1u/35V_6
    C
    +3VPCU +3VPCU 24707_ACDET 6 16 24707_REGN C
    ACDET REGN

    C-Test PD2
    24707_VCC 20 RB500V-40
    PR24 PR25 VCC PR27 PC106
    100K_4 100K_4 PR22 PC10 *Short_6 PC105 4.7u/25V_8
    20_1206 0.47u/25V_6
    BTST 17 24707_BST 2200p/50V_4

    5
    32 ACIN 1226 Change from 1206 to 0805
    PC11
    3

    47n/50V_6

    18 24707_DH 4
    HIDRV
    2 5 ACOK#
    PQ4 19 24707_LX PQ33

    3
    2
    1
    2N7002K PHASE MDV1528 PR166
    C-Test
    0.01/F_0612
    1

    MBDATA PR5 8 PU1 PL6


    *Short_4 SDA BQ24707A 6.8uH_7X7X3
    15 24707_DL 1 2 BAT-V
    LCDRV
    MBCLK PR4 9 SCL

    5
    *Short_4
    PC95 +3VPCU
    0.1u/50V_6 PR10 14 PR26 C-Test
    10K_4 PGND *4.7_6
    24707_IFAULT# 11 4 PR159 PR160
    PC102 IFAULT# *Short_4 *Short_4
    B B
    *100p/50V_6 PL5 PR12 PR20 PC98
    FBMA-11-201209-800A50T *10K_4 24707_CMPOUT 3 10_6 0.1u/25V_4 PQ32

    3
    2
    1
    CMPOUT 24707_SRP MDV1528 24707_SRP PC6 PC94 PC103
    SRP 13
    MBAT+ BAT-V PC9 0.1u/50V_6 10u/25V_1206 10u/25V_1206
    24707_ILIM 10 PC7 *680p/50V_6 24707_SRN
    PJ2 ILIM 0.1u/25V_4
    PL4 PR2
    10 1 PR7 FBMA-11-201209-800A50T 316K/F_4 24707_CMPIN 4 24707_SRN
    2 CMPIN SRN 12
    100_4
    3 TEMP_MBAT PR13

    IOUT

    GND
    GND
    GND
    GND
    GND
    4 TEMP_MBAT 32
    7.5_6 PC96
    5 0.1u/25V_4
    6 PR165 7
    REGN MAX voltage 6.5V

    21
    22
    23
    24
    25
    7 PR23 1M_4
    9 8 +3VPCU *100K_4 V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
    C114F3-108A1-L_Batt_Conn
    1226 Change to 10 ohm
    PC4 PC3
    =0.793V for 3.965A current limit
    *47p/50V_6 *47p/50V_6

    C-Test PR163 PC93


    100K/F_4 0.01u/25V_4
    PR6 PR21 PR18
    *Short_4 100_4 100_4

    MBCLK 32
    32 ICM
    MBDATA 32
    A A

    PU2
    1

    IP4223-CZ6 PC92
    1 6 MBDATA 100P/50V_4
    CH1 CH4
    Quanta Computer Inc.
    2

    2 VN VP 5 +3VPCU
    TEMP_MBAT 3 4 MBCLK
    CH2 CH3 PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    Add ESD diode base on EC FAE suggestion 1A
    Charger(bq24707A)
    Date: Friday, February 03, 2012 Sheet 33 of 44
    5 4 3 2 1
    5 4 3 2 1

    MAIND
    www.rosefix.com MAIND 5,37,41
    SYS_SHDN#
    SYS_SHDN# 3,18,41

    Ven=7.23V

    10/7 add
    32 SYS_HWPG VIN VIN
    +3VPCU VL 8223REF VL C-Test
    C-Test
    D VIN VIN D
    PR134

    10u/6.3V_8
    4.7u/6.3V_6
    PR126 10/F_8

    1
    665K/F_4 PC172 C-Test
    1u/6.3V_4 +
    PR132

    8223_EN
    +5VPCU *0_4 PC168

    2
    8223_VIN
    PC175 PC177 PC80 PR254 PR130 PC169 PC170 100u/25V_6X5.8

    PC79

    PC81
    4.7u/25V_8 2200p/50V_4 PR138 0.1u/25V_4 *Short_4 *Short_4 2200p/50V_4 4.7u/25V_8
    *Short_4
    +5VPCU 30
    PR131

    5
    PR136 PR129 C-Test *0_4
    *100K/F_4 330K/F_4 +3VPCU

    5
    C-Test +5VPCU +3VPCU

    16

    17
    8

    3
    5 Volt +/- 5% 4 3.3 Volt +/- 5%

    VIN

    VREG3

    VREG5

    REF
    TDC : 6.63A PQ57
    MDV1528
    4 SYS_SHDN# 13 EN SKIPSEL 14 +3V_SKIP TDC : 7.75A C-Test

    3
    2
    1
    PEAK : 8.5A +3V_PG 23 PGOOD TONSEL 4 +3V_TON PQ53 PEAK : 8.5A
    MDV1528
    OCP : 9A OCP : 9A

    1
    2
    3
    5V_DH 21 10 +3V_DH
    UGATE1 UGATE2
    Width : 260mil PL15 PC82 PR135 22 BOOT1 BOOT2 9 PR125 PC77 PL14 Width : 3000mil
    2.2uH_7X7X3 0.1u/50V_6 1/F_6 PU9 1/F_6 0.1u/50V_6 2.2uH_7X7X3
    5V_LX 20 RT8223P 11 +3V_LX
    PHASE1 PHASE2
    5V_DL 19 12 3V_DL
    LGATE1 LGATE2

    5
    C PR133 24 7 C
    VOUT1 OUT2

    ENTRIP1

    ENTRIP2
    15.4K/F_4 PR123 PR128
    PQ58 +5VPCU_FB 2 5 +3VPCU_FB *4.7_6 6.81K/F_4

    GND

    GND
    ENC
    + PR137 MDV1595 FB1 FB2 +
    4
    *4.7_6 C-Test 4
    PC179 PC178 PC171 PC173

    18

    25

    15
    330u/6.3V_6X5.7 0.1u/50V_6 1 PR249 0.1u/50V_6 330u/6.3V_6X5.7
    2
    3
    *Short_4 PC76

    3
    2
    1
    8223_EN *680p/50V_6
    PR256 PC83 PQ55 PR253

    2
    10K/F_4 *680p/50V_6 MDV1595 10K/F_4
    PR251 PC174
    100K/F_4 0.1u/10V_4

    1
    PR252
    PR257 121K/F_4
    107K/F_4
    10/31 Modify
    C-Test 12/28 Mosidy OCP:8A
    PC75 PR124 C-Test L(ripple current)
    2 0.1u/50V_6 *Short_6
    OCP:9A PD4 3V_DL PR255 *Short_6 =(9-3.3)*3.3/(2.2u*0.5M*9)
    DA3J101F0L 3
    L(ripple current) ~1.9A
    =(9-5)*5/(2.2u*0.4M*9) 1 PR250 *Short_6
    PC78
    Iocp=9-(1.9/2)=8.05A
    B =2.525A 0.1u/50V_6 Vth=8.05A*14mOhm=112.7mV B
    2
    Iocp=9-(2.525/2)=7.74A PD3
    R(Ilim)=(112.7mV*10)/10uA
    Vth=7.74A*14mOhm=0.10832mV 3
    DA3J101F0L =112.7K
    PC74
    R(Ilim)=(108.32mV*10)/10uA 1 0.1u/50V_6
    ~107K
    +15V_ALWP
    +15V
    PR127
    22_8
    PC73
    0.1u/50V_6

    VIN +3V_S5 +5V_S5 +15V VIN +5VPCU +5VPCU +3VPCU


    +3VPCU

    PR150 PR151 PR152 PR248 PR258


    5

    5
    1M_6 22_8 22_8 1M_6 *1M_6

    3
    S5D 4 PQ60 MAIND 4 PQ59 MAIND 4 PQ17 S5D 2
    A MDV1528Q MDV1528Q MDV1528Q A
    3

    PQ54
    3
    2
    1

    3
    2
    1

    3
    2
    1

    2 AO3404
    32,41 S5_ON

    1
    2 2 2
    +5V_S5 +5V +3V +3V_S5
    PR153 PQ27 PQ29
    Quanta Computer Inc.
    1

    PQ28 1M_6 2N7002K 2N7002K


    DTC144EUA PQ56 PC176
    TDC : 2.63A TDC : 3.45A TDC : 3.2A TDC : 1.28A
    1

    2N7002K *2200p/50V_4
    PROJECT : ZQTA/ZQSA
    PEAK : 3.5A PEAK : 4.6A PEAK : 4.27A PEAK : 1.7A Size Document Number Rev
    Width : 120mil Width : 140mil Width : 140mil Width : 60mil SYSTEM 5V/3V (RT8223P) 1A

    Date: Friday, February 03, 2012 Sheet 34 of 44


    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com +VCC_CORE

    PC36 51650_CBST1
    PR81
    2.2/F_6
    C-Test

    VIN

    2200p/50V_4

    1
    PR75 *330p/50V_4

    0.1u/50V_6

    4.7u/25V_8

    4.7u/25V_8
    5

    1
    C-Test PC49 +

    PC121

    PC124

    PC123

    PC122
    Parallel *10_4
    0.22u/25V_6
    PC146

    2
    5 VCC_SENSE PR74 *Short_4 51650_CDH1 4 100u/25V_6X5.8

    5 VSS_SENSE PR73 *Short_4

    1
    2
    3
    PQ40 PL11
    AON6414AL 0.36uH DCR=1.1mOhm
    D D
    51650_CSW1 1 2 +VCC_CORE
    PR69

    5
    PC38

    PR71
    *10_4

    4
    2.2_6
    *0.01u/50V_4

    17.8K/F_4

    *Short_4
    Close to the 51650_CDL1 4 +

    330u/2V_7343
    0.1u/10V_4

    10u/6.3V_8
    CPU side.

    PC32

    PC31

    PC39
    2200p/50V_4
    1
    2
    3

    PC42
    PQ44
    AON6780

    *2200p/50V_4
    51650_VREF

    PR60

    PR61
    PC132
    51650_VREF
    51650_VREF 51650_CCSP1 C-Test

    47p/50V_4

    10.7K/F_4

    28.7K/F_4
    PR186
    IV@200K/F_4 PC130

    90.9K/F_4

    39.2K/F_4
    *22.6K/F_4

    IV@4.7K/F_4
    *0.1u/25V_4

    PR80
    PR226

    PR214

    PR209

    PR191

    PR194
    *0_4

    Close to the

    0.022u/25V_4
    VR side.

    100K/F_4_4250NTC
    51650_COCP-R

    PC34
    10/7 add

    PC127

    PR193
    C-Test 51650_CCSN1

    PR185

    PR65
    20K/F_4

    140K/F_4
    IV@75K/F_4
    IV@100K/F_4

    IV@30.1K/F_4

    51650_VREF PC128
    PR217

    PR208

    PR204

    PR199

    PR192

    PR195
    24K/F_4

    56.2K/F_4
    +3V_S5 VIN +5V_S5 *0.1u/25V_4

    51650_CTHERM
    51650_CCOMP

    51650_CCSN3

    51650_CCSN2

    51650_CCSN1
    51650_CCSP3

    51650_CCSP2

    51650_CCSP1
    C-Test Close with

    51650_CGFB

    51650_CVFB

    PR101
    10K/F_4
    0.1u/10V_4
    phase1 inductor

    PC129

    PR196
    10_6
    11/7 modify 11/7 modify PR201
    PC44 *Short_6
    1u/6.3V_4

    14

    12

    11

    10

    61
    60
    59
    9

    1
    C-Test

    2.2u/6.3V_4

    4.7u/6.3V_6
    PC51
    C 58 C

    CCSN3

    CCSP3

    CCSP2

    CCSN2

    CCSN1

    CCSP1

    T12
    T11
    T10
    VREF

    CGFB

    CVFB

    CCOMP

    CTHERM
    T9

    PC131
    2 57
    COCP-R T8
    56
    51650_CF-IMAX T7 51650_VBAT PR94
    3 37 VIN
    CF-IMAX VBAT 51650_V5 2.2/F_6
    Check pull up resister to +1.05V +3V +3V_S5 V5
    48
    51650_GOCP-R 13 62 51650_CBST2

    2200p/50V_4
    1.05V for H_PROCHOT# GOCP-R T13
    63

    0.1u/50V_6

    4.7u/25V_8

    4.7u/25V_8
    T14

    1
    51650_SLEW PC53

    PC159

    PC150

    PC151

    PC145
    22 64
    SLEW T15 51650_V5DRV 0.22u/25V_6 + PC155
    43
    51650_GF-IMAX V5DRV 51650_CDH1 100u/25V_6X5.8
    24 47

    2
    GF-IMAX CDH1 51650_CDH2 4
    1.91K/F_4

    1.91K/F_4

    *100K/F_4

    2
    51650_GSKIP# 51650_CBST1
    PR89

    PR97
    PR202

    PR200

    33 46
    *499/F_4

    GSKIP CBST1
    C-Test

    1
    2
    3
    15 45 51650_CSW1 PQ50 PL12
    V3R3 CSW1 AON6414AL 0.36uH
    PR82 *Short_4 51650_VRON PU6 51650_CDL1 51650_CSW2
    DCR=1.1mOhm
    32 VRON 16 44 1 2 +VCC_CORE
    VR_ON TPS51650RSLR CDL1

    5
    51650_CDL2

    PR88
    3,7 IMVP_PWRGD 17 41

    4
    CPGOOD CDL2

    2.2_6

    17.8K/F_4
    PR98 *0_4 23 40 51650_CSW2 +
    +VCC_CORE

    *Short_4
    GPGOOD CSW2 51650_CDL2 4
    51650_CBST2
    21 39 TDC : 53A

    0.1u/10V_4

    10u/6.3V_8

    330u/2V_7343
    3,32 H_PROCHOT# VR_HOT CBST2

    PC52

    PC54

    PC50
    2200p/50V_4
    1
    2
    3
    VR_SVID_CLK 51650_CDH2 PEAK : 53A

    PC55
    5 VR_SVID_CLK 18 38 PQ49
    PC135 VCLK CDH2 AON6780

    *2200p/50V_4
    43p/50V_4 PC43 VR_SVID_ALERT# 19 42 OCP : 60A

    GTHERM
    5 VR_SVID_ALERT# ALERT PGND

    GPWM1

    GPWM2
    GCOMP

    CPWM3

    PR95

    PR96
    1u/6.3V_4

    PC134
    55
    GCSN1

    GCSN2
    GCSP1

    GCSP2
    T6 Width : 2120mil
    GGFB
    GVFB

    5 VR_SVID_DATA VR_SVID_DATA 20 54

    PAD
    VDIO T5

    T16
    53 51650_CCSP2 C-Test

    T1
    T2
    T3
    T4
    VCORE Load Line :

    28.7K/F_4
    PR236
    26

    25

    27

    28

    29

    30

    31

    32

    34

    35

    36
    65
    49
    50
    51
    52
    PC125
    *0.1u/25V_4
    1.9mV/A
    Close to the
    51650_GTHERM

    51650_GPWM1
    51650_GCSN1

    51650_GCSN2
    51650_GCSP1

    51650_GCSP2

    C-Test

    0.022u/25V_4
    VR side.
    51650_GGFB

    100K/F_4_4250NTC
    51650_GVFB

    +VCC_GFX

    PC35
    10/7 add
    51650_CCSN2

    PR235
    B B

    PR68
    PC56 PR203

    140K/F_4
    *330p/50V_4 *Short_6 PC126
    *0.1u/25V_4
    Parallel PR108 +3V
    PR107 *10_4 PC141
    IV@0_4 0.1u/10V_4 Close with
    5 VCC_AXG_SENSE phase2 inductor
    C-Test
    5 VSS_AXG_SENSE
    PR106
    IV@0_4
    PC58
    *0.01u/50V_4
    PR247
    IV@2.2/F_6
    AXG
    0923 PR104
    *10_4
    PR287 PR288 51650_CBST3
    VIN

    DO@0_4 DO@0_4

    IV@2200p/50V_4
    11/7 modify PC163
    IV@100p/50V_4

    IV@5.62K/F_4

    IV@0.1u/50V_6

    IV@4.7u/25V_8

    IV@4.7u/25V_8

    IV@4.7u/25V_8
    5

    1
    PC72
    IV@0.22u/25V_6

    PC161

    PC162

    PC167

    PC165
    PU8
    PC147

    PR213

    Close to the IV@TPS51601DRBR

    2
    CPU side. 4
    1 8 51650_CDH3
    51650_GSKIP# BST DRVH 51650_CSW3
    2 7

    1
    2
    3
    51650_GPWM1 SKIP SW PQ51 PL13
    11/7 modify 3
    PWM VDD
    6 +5V_S5
    51650_VREF 4 5 IV@AON6414AL IV@0.36uH DCR=1.1mOhm
    GND DRVL PC164
    9 1 2 +VCC_GFX
    PAD IV@1u/10V_4
    T1
    T2
    T3
    T4
    T5

    IV@2.2_6

    4
    PR122

    IV@17.8K/F_4
    10
    11
    12
    13
    14

    *Short_4
    51650_VREF 51650_CDL3 4

    IV@330u/2V_7343
    +1.05V
    Close to VR

    IV@0.1u/10V_4

    IV@10u/6.3V_8
    *IV@2200p/50V_4

    PC60

    PC69
    PC148
    IV@2200p/50V_6
    1
    2
    3
    PQ52
    PC71

    PC70
    10/7 add IV@AON6780
    +3V +VCC_GFX
    PR272
    TDC : 24A
    PR83

    PR87

    PR84

    PR116

    PR117
    130/F_4

    *75/F_4
    54.9/F_4
    0.1u/10V_4

    DO@0_4
    PC133

    12/28 modify
    A
    PR225
    15.4K/F_4 PR78
    51650_GCSP1 C-Test PEAK : 33A A

    IV@100K/F_4_4250NTCIV@28.7K/F_4
    VR_SVID_ALERT# 15.4K/F_4 OCP : 35.8A

    PR239
    PC142
    51650_VRON VR_SVID_DATA 51650_GTHERM 51650_CTHERM 10/31 Add *IV@0.1u/25V_4 Width : 1320mil
    Close to the
    VR_SVID_CLK
    VR side. GFX_CORE Load Line :

    IV@0.022u/25V_4
    PR198
    PR205 PR197 -3.9mV/A for GT2

    PC57
    100K/F_4
    IV@100K/F_4_4250NTC 100K/F_4_4250NTC 51650_GCSN1

    PR238

    PR112
    IV@140K/F_4
    PC138
    11/7 modify PR273 *IV@0.1u/25V_4 Quanta Computer Inc.
    +VCC_CORE 5 DO@0_4
    Place NTC close to the Place NTC close to the PROJECT : ZQTA/ZQSA
    GFX_CORE Hot-Spot. VCORE Hot-Spot. +VCC_GFX 5 Close with
    Size Document Number Rev
    AXG inductor
    IV@ for Internal VGA(+VCC_GFX enable) 1A
    +VCC_CORE/+VGFX (TPS51650)
    DO@ for External VGA(+VCC_GFX disable discrete only) Date: Friday, February 03, 2012 Sheet 35 of 44
    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com C-Test
    VIN

    D D

    PC113 PC22 PC115


    +3V +5V_S5 2200p/50V_4 4.7u/25V_8 4.7u/25V_8 +1.05V
    1.05 Volt +/- 2%
    TDC : 13.2A
    PEAK : 17A

    5
    PR177
    PR180 10_6

    22

    21

    20

    19

    18

    17
    100K_4 OCP : 20A
    51219_DH 4 Width : 680mil

    PAD

    PAD

    PAD

    PAD

    PAD

    PAD
    PQ36
    RJK03J6DPA

    1
    2
    3
    16 11 PR42 PC20 +1.05V
    32,38 HWPG_VTT PGOOD DH 2_6 0.1u/25V_6 C-Test
    51219_EN 14 13 PL8 Close to output cap
    30,32,37,40,41 MAINON EN BST 0.68uH_7X7X3
    PR181 51219_V5 9 PU3 12 51219_SW
    *Short_4 V5 TPS51219RTER SW
    51219_MODE 15 10 51219_DL
    MODE DL

    5
    C-Test 51219_TRIP 6
    TRIP PGND 8
    PR43 PR39 +
    4 *4.7_6 *100_4 PC117 PC116

    COMP
    REFIN
    C C

    GSNS

    VSNS
    VREF
    560u/2.5V_6X5.7 0.1u/50V_6

    GND
    C-Test

    1
    2
    3
    PC110 PC17 PR178 PR176 PQ35 PC19
    *0.1u/10V_4 1u/6.3V_4 1K/F_4 64.9K/F_4 RJK03K5DPA *680p/50V_6

    7
    VREF=2V PR173
    *Short_6 RDSon 3.9mOhm

    51219_REFIN

    51219_GSNS

    51219_VSNS
    51219_REF

    PC15
    C-Test
    0.01u/16V_4 PR35
    +3V_S5 PC108 PR31 10_4 PR167
    0.1u/10V_4 *10K/F_4 *Short_4
    PR30
    VTT_VCCP_SENSE 5
    0.01u/25V_4
    OCP=18A 10_4
    L ripple current VTT_VSSP_SENSE 5

    1n/50V_4

    1n/50V_4
    =(19-1.05)*1.5/(0.68u*500k*19) PR169 PR168
    *Short_4 *Short_4
    =2.918A RC filter is for improve PR170
    Vtrip=20-(2.918/2)*4.3mohm C-Test PR175
    Jitter performance. *100_4
    PC13

    PC12

    PC14
    *11K/F_4
    =0.07972V
    B Rlimit = 0.07972/10uA*8=63.78Kohm B

    +3VPCU 8,22,24,25,30,31,32,33,34,41,42
    +1.05V 3,5,7,8,9,11,22,32,35,40,41
    +3V_S5 3,7,8,9,10,11,15,28,30,31,34,35,41,42
    VIN 22,33,34,35,37,38,39,40,41,42,43
    +5V_S5 11,26,30,34,35,37,38,39
    +3V 3,6,7,8,9,10,11,13,14,19,22,23,24,25,26,27,28,31,32,34,35,37,38,39,40,41
    +5VPCU 30,34

    A A

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    +1.05V (TPS51219)
    Date: Friday, February 03, 2012 Sheet 36 of 44
    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com TDC : 0.75A


    PEAK : 1A
    +0.75V_DDR_VTT

    Width : 40mil +0.75V_DDR_VTT 13,14,41

    PC85 PC86
    10u/6.3V_8 10u/6.3V_8
    TDC : 0.38A
    D D
    PEAK : 0.5A +SMDDR_VREF
    Width : 20mil

    Close to IC Greater than or equal 40mil


    PC182
    0.22u/10V_4

    +5V_S5

    +3V

    PC184 PC87
    C-Test

    22

    21
    10u/6.3V_8 1u/10V_4

    2
    PR265
    VIN
    100K/F_4

    PAD

    PAD

    VTTGND

    VLDOIN
    VTTSNS
    VTTREF

    VTT

    5
    20 12 51216_V5IN
    32 HWPG_VDDR PGOOD V5IN
    C
    PC194 C
    4.7u/25V_8
    PR267 51216_S3 17 14 51216_DRVH 4
    30,32,36,40,41 MAINON S3 DRVH +1.5VSUS 4,5,11,13,14,40
    *0_4 PR263 PC186
    PR286 0_4 2_6 0.1u/50V_6 PC188 PC193
    32 +0.75V_ON

    1
    2
    3
    PR268 51216_S5 16 15 51216_VBST 2200p/50V_4 4.7u/25V_8 C-Test
    32 SUSON S5 VBST
    0_4 PU10 PQ62
    TPS51216RUKR RJK03J6DPA
    PR261 51216_MODE 19 13 51216_SW +1.5VSUS
    200K/F_4 MODE SW
    PL16

    5
    PR262 51216_TRIP 18 11 51216_DRVL 0.68uH_7X7X3
    60.4K/F_4 TRIP DRVL
    +1.5V_SUS
    VDDQSNS

    PR266
    26 PAD PGND 10 4 *4.7_6 1.5 Volt +/- 5%
    REFIN

    GND
    PAD

    PAD

    PAD
    REF

    TDC : 14.67A

    1
    2
    3
    PQ61 +
    VREF=1.8V RJK03K5DPA PC185 PC180 PC195 PEAK : 18A
    6

    25

    24

    23

    7 *680p/50V_6 560u/2.5V_6X5.7 0.1u/50V_6


    51216_REF C-Test OCP : 20A
    51216_REFIN

    Width : 600mil
    PC183 PR259
    B 0.1u/10V_4 *Short_6 RDSon=3.9mohm B
    51216_S3 PR264 51216_S5
    *0_4
    PR140
    10K/F_4 Close to output cap
    +1.5VSUS

    3
    TDC : 0.38A
    PR260
    51K/F_4
    PC181
    0.01u/25V_4
    +1.5V 11,24,41
    2
    PEAK : 0.5A
    +5V_S5 11,26,30,34,35,36,38,39 5,34,41 MAIND
    Width : 20mil
    +SMDDR_VREF 5,13,14
    PQ18
    AO3404

    1
    +1.5V

    OCP=20A
    A L ripple current A
    S3 S5 +1.5VSUS REF VTT
    =(19-1.5)*1.5/(0.68u*400k*19)
    =5.079A
    S0 1 1 ON ON ON Quanta Computer Inc.
    Vtrip=20-(5.079/2)*4.3mohm
    =0.07508V
    S3 (mainon off) 0 1 ON ON OFF PROJECT : ZQTA/ZQSA
    Rlimit=0.07508/10uA*8=60.063Kohm
    Size Document Number Rev
    S4/S5 0 0 OFF OFF OFF 1A
    DDR 1.5V(TPS51216)
    Date: Friday, February 03, 2012 Sheet 37 of 44
    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com G0
    0
    G1
    0
    +VCCSA
    0.9V
    0 1 0.8V
    1 0 0.725V
    D
    1 1 0.675V D

    +3V +5V_S5 default 0.9V C-Test

    VIN

    PR37
    10_6
    +VCCSA

    5
    VSA_VCC
    PR34
    *100K_4 PQ37 PC112 PC23
    TDC : 4.5A
    PC16
    1u/6.3V_4 VSA_DH
    MDV1528 2200p/50V_4 4.7u/25V_8 PEAK : 6A
    4
    OCP : 7A
    Width : 180mil

    3
    2
    1
    VCC
    3 PR41 PC18 +VCCSA
    UGATE 3.3_6 0.1u/25V_6
    32 HWPG_VCCSA 9 PGOOD VSA_BST1 PL7
    C-Test
    BOOST 4
    C
    2.2uH_7X7X3 C
    VSA_EN 6 2 VSA_LX
    32,36 HWPG_VTT EN PHASE +VCCSA 5
    PU4
    PR174 VSA_CS 11 RT8241DZ 1 VSA_DL
    *Short_4 PC109 CS LGATE
    C-Test

    5
    *0.1u/10V_4 12

    PAD
    GND PR44
    C-Test
    G0

    G1

    FB
    *Short_6 PR172 PR179 *4.7_6 +
    71.5K/F_4
    7

    10

    13

    4 PC111 PC114
    *Short_6 PR171 0.1u/50V_6 560u/2.5V_6X5.7

    PQ34 PC21

    3
    2
    1
    MDV1595 *680p/50V_6

    5 VCCSA_VID0
    Close to output cap
    5 VCCSA_VID1

    VSA_FB
    5 VCCSA_SENSE
    B B
    PR38 PR40
    *Short_4 100_4

    C-Test

    PR33 PR32
    1K_4 1K_4

    OCP=7A
    Iripple=(19-0.9)*0.9/(2.2u*300K*19)
    =1.299A
    A Rth=14mohm*8*(7-0.65)/10uA A
    =71.125K
    Ipeak=8.299A
    Quanta Computer Inc.
    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    VCCSA(RT8241DZ)
    Date: Friday, February 03, 2012 Sheet 38 of 44
    5 4 3 2 1
    5 4 3 2 1

    +3V_GFX

    PR207
    default 1.1V

    *EV@10K/F_4
    www.rosefix.com H_VID0
    1013
    VID5 VID4 VID3 VID2 VID1 VID0
    H_VID1
    PR212 *EV@10K/F_4
    H_VID2
    N13P-GL QS 1 0 1 1 0 0
    PR221 GL@10K/F_4
    H_VID3
    PR223 GL@10K/F_4
    N13P-GS QS
    H_VID4 N13M-GS ES 1 1 0 0 0 0
    D D
    PR228 GSS@10K/F_4
    H_VID5
    PR234 EV@10K/F_4 PR85
    EV@2.2/F_6 VIN
    +3V

    EV@10K/F_4

    EV@10K/F_4
    51728_VBST2
    GL@10K/F_4

    PR231 GSS@10K/F_4

    PR218 GSS@10K/F_4
    *EV@10K/F_4

    1
    EV@2200p/50V_4
    EV@0.1u/50V_6

    EV@4.7u/25V_8

    EV@4.7u/25V_8
    5

    PC149

    PC140

    PC139
    PC47 + PC160 11/9 Del

    PC152
    EV@100K/F_4

    EV@200/F_4

    EV@100K/F_4
    EV@0.22u/25V_6 EV@100u/25V_6X5.8

    *EV@10K/F_4

    2
    51728_DRVH2 4
    PR232

    PR230

    PR219

    PR220
    +5V_S5 PR206

    1
    2
    3
    *EV@10K/F_4 PQ47 PL10
    EV@AOL1448 EV@0.36uH DCR=1.1mOhm

    PR99

    PR92

    PR119

    PR114
    51728_LL2 1 2 +VGACORE

    4
    5

    PR72
    EV@2200p/50V_4EV@2.2_6
    PC144

    EV@17.8K/F_4
    EV@2.2u/10V_6
    +
    51728_DRVL24

    *Short_4

    EV@0.1u/10V_4

    EV@10u/6.3V_8
    40 VGA_PG 4

    PC24

    PC29
    PC37
    PC119

    48
    49
    50
    51
    52
    53
    54
    26
    47
    46
    45
    44
    43
    42
    18 GPU_DPRSLPVR

    1
    2
    3

    1
    2
    3
    PQ46 PQ15 EV@330u/2V_7343

    *EV@2200p/50V_4
    EV@AON6780 *EV@AON6780

    T7
    T8
    T9
    T10
    T11
    T12
    T13

    T6
    T5
    T4
    T3
    T2
    T1
    V5IN
    PR237 *EV@100K/F_4 33 30 51728_DRVH2
    PGD DRVH2

    PC136

    PR66

    PR63
    34 29 51728_VBST2
    C PR242 EV@2.2K_4 PG VBST2 C
    51728_PCNT 13 28 51728_LL2 C-Test
    PCNT LL2 51728_CSP2
    PR227 EV@100K/F_4 51728_SLP 12 27 51728_DRVL2
    SLP DRVL2

    EV@200K/F_4
    EV@27.4K/F_4
    PR184

    PR246
    51728_EN 35 3 51728_CSP2 PC65
    10,40 dGPU_VRON EN CSP2
    PR224 EV@0_4 *EV@0.1u/25V_4
    32 GPU_PWR_ALERT# 10 4 51728_CSN2 Close to the
    +VGPU_CORE (N13P-GS)
    THAL CSN2

    EV@0.022u/25V_4
    0929 VR side. Countinue current:50A

    PC157
    PR91 *Short_4 H_VID0 20
    18 GPU_VID0 VID0
    10/7 add Peak current:55A
    PR93 *Short_4 H_VID1 19 21 51728_DRVH1 51728_CSN2
    18 GPU_VID1 VID1 DRVH1
    PR100 *Short_4 H_VID2 18 22 51728_VBST1 PC66 OCP minimum 60A
    18 GPU_VID2 VID2 VBST1 *EV@0.1u/25V_4
    PR103 *Short_4 H_VID3 17 23 51728_LL1 Loadline=0mV/A
    18 GPU_VID3 VID3 LL1
    PR109 *Short_4 H_VID4 16 24 51728_DRVL1 PR183
    18 GPU_VID4 VID4 DRVL1 EV@100K/F_4_3540NTC
    PR111 *Short_4 H_VID5 15 6 51728_CSP1
    18 GPU_VID5 VID5 CSP1
    C-Test H_VID6 51728_CSN1
    14 VID6 CSN1 5
    PU7 +3V
    51728_DROOP EV@TPS51728RHAR
    PC59 EV@68p/50V_4 25 11/9 Del
    PGND
    39 PR86
    DROOP PR90 EV@2.2/F_6 VIN
    PC62 PR113 *EV@0_4 51728_VBST1

    EV@2200p/50V_4
    EV@0.1u/50V_6

    EV@4.7u/25V_8

    EV@4.7u/25V_8
    B
    EV@1200p/50V_4 EV@8.2K/F_4
    TONSEL 36 51728_TONSEL B
    51728_V5FILT +3V 51728_VREF 40
    VREF

    1
    PC41

    PC46

    PC45
    PC143
    TRIPSEL 31 51728_TRIPSEL PC48
    EV@0.22u/25V_6 + PC154
    PC63 PR110
    OSRSEL 32 51728_OSRSEL EV@100u/25V_6X5.8
    EV@0.22u/25V_6 EV@113K/F_4 51728_DRVH1 4

    2
    EV@0_4

    *EV@0_4
    PR211

    1
    2
    3
    PR216

    PR210
    51728_SLEW 37 *EV@10K/F_4 PQ48 PL9
    SLEW +VGACORE 19,31
    PR229 PR102 PR105 PR233 *EV@316K/F_4 EV@AOL1448 EV@0.36uH DCR=1.1mOhm
    *EV@0_4 *EV@0_4 EV@0_4 51728_LL1 1 2 +VGACORE

    EV@2.2_6
    9 THRM

    EV@17.8K/F_4
    1

    4
    PU

    5
    EV@0_4
    *EV@0_4

    PR77
    PR241 PR240
    51728_TONSEL 38 51728_V5FILT

    *Short_4
    EV@11.8K/F_4 EV@100K/F_4_3540NTC +
    V5FILT
    51728_DRVL1 4
    PwPd

    EV@0.1u/10V_4

    EV@10u/6.3V_8
    IMON

    Place NTC close to the 4


    GND
    GFB
    VFB

    T16

    T15
    T14

    PC25

    PC27
    EV@2200p/50V_4
    PC120
    GPU Hot-Spot.

    PC40
    EV@330u/2V_7343

    1
    2
    3

    1
    2
    3
    PR222

    PC153 PR215 PQ45 PQ16


    8

    11

    41
    57
    2
    56
    55

    +VGACORE

    PR67

    PR64
    *EV@2200p/50V_4
    EV@2.2u/10V_6 EV@AON6780 *EV@AON6780

    PC137
    51728_CSP1
    C-Test
    PR243 C-Test

    EV@200K/F_4
    51728_IMON

    EV@27.4K/F_4
    C-Test EV@100_4

    PR189

    PR245
    PC68

    EV@0.022u/25V_4
    *EV@0.1u/25V_4
    *Short_4 PR118 51728_VFB PR244 Close to the
    15 GPUVCC_SENSE
    A *Short_6 A
    VR side.

    PC156
    15 GPUVSS_SENSE *Short_4 PR121 51728_GFB
    10/7 add
    PR115 PC61
    EV@11.3K/F_4 EV@3300p/50V_4
    PR120 PC67
    EV@100_4 *EV@0.1u/25V_4
    51728_CSN1 Quanta Computer Inc.
    Close to the PR188
    PC158 PC64 EV@100K/F_4_3540NTC PROJECT : ZQTA/ZQSA
    GPU side. EV@1n/50V_4 EV@1n/50V_4 Size Document Number Rev
    1A
    VGPU Core (TPS51728)
    Date: Friday, February 03, 2012 Sheet 39 of 44
    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com VIN +3V_GFX +15V +3V

    PR50 PR49 PR56 TDC : 1.04A

    3
    D PR48
    *EV@0_4
    EV@1M_4 EV@22_8 EV@1M_4 PEAK : 1.38A D

    30,32,36,37,41 MAINON dGPU_D


    Width : 50mil
    2

    3
    PQ9

    3
    PR47 EV@AO3404
    EV@0_4 PR45

    1
    9 dGPU_PWR_EN 2 EV@1M_4 2 2
    PC26 +3V_GFX
    PQ7 PQ8 *EV@2200p/50V_4
    PR46 PQ6 EV@2N7002K EV@2N7002K

    1
    EV@100K_4 EV@PDTC143TT

    1
    VIN +1.5V_GFX +15V +1.5VSUS

    C TDC : 5.67A C

    PR53 PR58 PR57 PEAK : 7.56A

    5
    PR51 EV@1M_4 EV@22_8 EV@1M_4
    EV@0_4 Width : 240mil
    39 VGA_PG dGPU_D1 4

    1
    2
    3
    3

    PR52 PQ13 1006


    *EV@0_4 PR54 1006 EV@AOL1718
    2 EV@1M_4 2 2 +1.5V_GFX
    10,39 dGPU_VRON PC30
    PQ12 PQ11 *EV@2200p/50V_4
    PR55 PQ10 EV@2N7002K EV@2N7002K
    1

    PC28 EV@100K_4 EV@PDTC143TT

    1
    EV@1u/10V_4

    B B

    VIN +1.05V_GFX +15V +1.05V

    5
    PR15 PR36 PR182
    EV@1M_4 EV@22_8 EV@1M_4
    TDC : 3.5A
    PEAK : 5A
    +1.5V_GFX dGPU_D2 4 Width : 120mil
    3

    3
    3

    PR16 PQ38

    3
    2
    1
    EV@0_4 PR14 EV@MDV1660
    2 EV@1M_4 2 2
    PC118 +1.05V_GFX
    PQ5 PQ39 *EV@2200p/50V_4
    PR9 PQ2 EV@2N7002K EV@2N7002K
    1

    EV@100K_4 EV@PDTC143TT
    1

    A A

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    GPU_PWR
    Date: Friday, February 03, 2012 Sheet 40 of 44
    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com
    +3VPCU
    C-Test
    +1.8V
    +1.8V
    1.8 Volt +/- 5%
    TDC : 1.61A
    PC190 C-Test
    PC187 0.1u/25V_4 PEAK : 2A
    10u/6.3V_8
    PU11 TPS54318RTER Width : 60mil
    16 VIN PH 10

    1 11 PL1
    D VIN PH 1uH_7X7X3
    D

    2 VIN PH 12

    15 13 PR269 *Short_6
    30,32,36,37,40 MAINON EN BOOT
    54418-1_VFB 6 14 PC189
    VSNS PW RGD 0.1u/50V_6
    C-Test
    PR154 PC89 7 3
    *100K/F_4 COMP GND
    1000p/50V_4
    8 4 R1 PR157
    RT/CLK GND 100K/F_4

    PAD
    PAD
    PAD
    PAD
    PAD
    PAD
    HWPG_1.8V 32
    9 SS AGND 5 PR155
    PR271 PR270
    *100K/F_4
    10K/F_4 121K/F_4 +3V_S5

    22
    21
    20
    19
    18
    17
    PC90
    PC192 PC88 10u/6.3V_8 PC91
    *100p/50V_4 PC191 0.1u/25V_4 10u/6.3V_8
    0.01u/25V_4 54418-1_VFB

    PC196
    V0=0.8*(R1+R2)/R2
    1200p/50V_4
    PR156
    R2 78.7K/F_4

    C C
    VIN

    PD7
    DA2J10100L

    PR190
    1M_6
    Thermal protection
    1

    PQ41
    AO3409
    2
    3

    S5_ON 2
    32,34 S5_ON

    PQ42 PR59
    1

    DTC144EUA 0_6
    VIN +3V +5V +0.75V_DDR_VTT +1.5V +1.05V +1.8V +15V
    B B

    VL VL
    SYS_SHDN# 3,18,34
    PR143 PR146 PR145 PR148 PR147 PR144 PR149 PR139
    1M_4 22_8 22_8 *22_8 22_8 22_8 22_8 1M_4
    PR62
    200K_6
    PR76 PC166 MAINON_ON_G MAIND
    200K/F_4 0.1u/50V_6 3,5 MAINON_ON_G MAIND 5,34,37
    3

    3
    PR70
    8

    3
    PR187 1K/F_4
    10K_6_NTC 2.469V 3 PR142
    + MAINON PQ19
    1 2 2 1M_4 2 2 2 2 2 2 2
    2 DTC144EUA PC84
    - PQ14 PQ22 PQ21 PQ25 PQ24 PQ20 PQ26 PQ23 *2200p/50V_4
    3

    PU5A 2N7002K 2N7002K 2N7002K *2N7002K 2N7002K 2N7002K 2N7002K 2N7002K


    4

    BA10393F PC33 PR141


    1

    1
    0.1u/50V_6 *100K/F_6
    S5_ON 2
    PR79
    PQ43 200K/F_4
    2N7002K
    1

    A A
    13,14,37 +0.75V_DDR_VTT
    5
    +
    7
    6
    -
    PU5B
    BA10393F Quanta Computer Inc.
    PROJECT : ZQTA/ZQSA
    For EC control thermal protection (output 3.3V) Size Document Number Rev
    1A
    +1.8V/Discharge/Thermal
    Date: Friday, February 03, 2012 Sheet 41 of 44
    5 4 3 2 1
    5 4 3 2 1

    www.rosefix.com
    +3VPCU

    D D
    +1.05V_M
    1.05Volt +/- 5%
    PC197
    TDC : 0.8A
    BA@10u/6.3V_8 PC198 PEAK : 1.1A +1.05V_M
    BA@0.1u/25V_6 PU12 BA@TPS54318RTER
    16 VIN PH 10
    Width : 40mil
    1 11 PL17
    VIN PH BA@1uH_5X5X3
    PR274 2 12
    BA@0_4 VIN PH
    15 13 PR275 BA@0_6
    32 M_PON EN BOOT
    PC200 1.05M_FB 6 14 PC199 PR276 R1
    BA@1000p/50V_4 VSNS PWRGD BA@0.1u/50V_6 BA@24.9K/F_4
    7 COMP GND 3
    PC202
    8 4 1.05M_FB PC201 BA@10u/6.3V_8
    RT/CLK GND +1.05V_M_PG 7
    BA@0.1u/10V_4

    PAD
    PAD
    PAD
    PAD
    PAD
    PAD
    9 SS AGND 5 PR279
    PR277 PR278 PR280
    C BA@100K/F_4 C
    BA@2.49K/F_4 BA@182K/F_4 +3V_S5 BA@78.7K/F_4R2

    22
    21
    20
    19
    18
    17
    PC205 V0=0.8*(R1+R2)/R2
    PC203 PC204 BA@0.01u/25V_4
    *BA@100P/50V_4 BA@1200p/50V_4

    11/7 modify

    B B

    VIN +3V_M +15V +3VPCU

    PR281 PR282 PR283

    3
    BA@1M_4 BA@22_8 BA@1M_4

    SUSD 2
    TDC : 0.09A
    PEAK : 0.1A
    3

    3
    3

    PR284
    PQ63 Width : 10mil
    BA@AO3404

    1
    2 BA@1M_4 2 2
    32 M_PON PC206
    +3V_M
    1

    PQ65 PQ66 *BA@2.2n/50V_4


    PR285 PQ64 BA@2N7002K BA@2N7002K
    1

    *BA@100K_4 BA@DTC144EUA
    1

    1
    2

    A A

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    +1.05V_M/+3V_M
    Date: Friday, February 03, 2012 Sheet 42 of 44
    5 4 3 2 1
    5 4 3 2 1

    Hole
    www.rosefix.com
    HOLE7 HOLE14 HOLE2 HOLE1
    HOLE10 *HG-C315D110P2 *HG-C315D110P2 *HG-C315D110P2 *HG-C315D110P2
    D *H-C217D106PT 7 6 7 6 7 6 7 6 HOLE17 HOLE3 HOLE16 HOLE22 HOLE9 HOLE21 HOLE4 D
    8 5 8 5 8 5 8 5 EV@H-C256D161PT h-tc256bc315d161p2 *H-C236D165P2 H-C224D123P2 *H-TC433BC315D110P2 H-C236D65PT *O-ZQS-1
    9 4 9 4 9 4 9 4

    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3
    1

    1
    HOLE11 HOLE5 HOLE12 HOLE6
    *hg-tc256bc315d110p2 *HG-C315D110P2 *ZQS-HOLE2 *HG-C315D110P2 HOLE15 HOLE19 HOLE20 HOLE8
    7 6 7 6 7 6 7 6 EV@H-C256D161PT *H-C236D165P2 H-C224D123P2 *ZQS-HOLE1
    8 5 8 5 8 5 8 5
    9 4 9 4 9 4 9 4
    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    HOLE13 HOLE18
    *HG-C315D110P2 *H-C236D165P2
    7 6
    8 5
    9 4
    1
    2
    3

    1
    C C

    VIN VIN VIN VIN VIN VIN

    C60 C365 C438 C678 C679 C680


    0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4

    VIN VIN VIN VIN

    C681 C682 C683 C684


    0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4
    B B

    A A

    Quanta Computer Inc.


    PROJECT : ZQTA/ZQSA
    Size Document Number Rev
    1A
    Hole
    Date: Friday, February 03, 2012 Sheet 43 of 44
    5 4 3 2 1
    5 4 3 2 1

    Model www.rosefix.com
    Date CHANGE LIST
    page3 : add R511,R525,R527,R528,R529 for Discrete Only &PCH_JTAG_TDO net change pull-up from +3V_S5 to +1.05 rail
    9/26
    ZQSA MB
    Update power circuit
    D
    9/27 D
    Page19 : add C3777,C3778

    Page18 : add Q3508 for U7 GPU_THERMAL_ALERT net


    9/30
    Page31 : Del CN1

    Page18 : add dGPU_ACDC# net to U7 GPIO04 & add R347


    10/3 Page22 : add R557,R554 to pull-down & R548,R547 stuff for Discrete only
    Page25 : add R3693,C116 for ODD zero power circuit

    Page31 : CN8 add board id3 & board id4 net for touch pad ID control
    10/4
    Page31 : CN8.2,CN8.3 add CLK_SDATA & CLK_SCLK net for touch pad & add R278,R279
    Page15 : U41 Power rail change to +3V_GFX
    10/5 Page24 : Del Q16 no't support wake up function
    Page18 : add Q3509 for dGPU_ACDC# net
    Page31 : add L35,R3694,R3695 for touch pad 5V & 3V option & add R297,R295 Fan PWR option
    C C
    Page17 : IFPAB_PLLVDD rail change from +1.8V_GFX to +3V_GFX
    Page27 : U6 change footprint
    10/6
    Page39 : PWR engineer add PQ3006,PQ3005
    Page40 : PWR engineer Del PR193,PQ51,PQ54

    Page16 :add C3779,C3780


    Page29 :add C542,C530 for EMI solution & C544 change to 4.7u 0603 type
    10/7
    Page35 :PWR engineer add PC3037,PC3038,PC3039
    Page35 :PWR engineer add PC3035,PC3036

    Page8 :add R376,R381,R393,R407,R421,R434 for Dual SPI ROM


    Page9 :U13 power rail change to +3V
    Page10 :SV_DET_NC net add R250 to pull-down
    10/11 Page27 :add R133,R235
    Page30 :C443 change to 3528 type & add C366,R340
    B Page31 :CN2.27 pin change to +VGACORE B

    Page32 :add R330,R328 pull-up +3VPCU for GPUT_CLK,GPUT_DATA net

    Page20 :add C3781,C3782,R3569,R3570,R3571,R3576


    10/14
    Page21 :add C3783,C3784,R3577,R3578,R3579,R3581

    Page22 :Change L10 , L12 , L14 bead value because of monitor test fail
    Page28 :Change D9 value because of LAN surge test fail
    Page22 :Change R360 to 0 ohms requested by PL
    12/17
    Page6 :Change R130 to SNM@ because N13M used PCIE 8 LANE
    Page18 :Add D-die VRAM strapping setting
    Page24 :Add IOAC function connection
    Page24 :Change Q48 power from +3V_S5 to +3VPCU for IOAC
    Page32 :Change CN18 pin1 connection to EC GPIO91 for IOAC
    1/6 Page7 :Add connection from U20.L10 to PU12.pin14 for SBA function
    Page39 :Change PQ47,PQ48 from AON6414AL to AOL1448 due to 3DMARK06 hang up issue
    A A

    Quanta Computer Inc. PROJECT MODEL : ZQTA/ZQSA APPROVED BY: Weiting Lu DATE:
    PROJECT : ZQTA/ZQSA DOC NO.
    Size Document Number Rev
    1A
    Change list PART NUMBER: DRAWING BY: Cruise Tsai REVISON:
    Date: Friday, February 03, 2012 Sheet 44 of 44

    5 4 3 2 1

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