IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO.
1, JANUARY 2009
Multilevel Inverter For Grid-Connected PV System
Employing Digital PI Controller
Jeyraj Selvaraj and Nasrudin A. Rahim, Senior Member, IEEE
Abstract—This paper presents a single-phase five-level photo-
voltaic (PV) inverter topology for grid-connected PV systems with
a novel pulsewidth-modulated (PWM) control scheme. Two refer-
ence signals identical to each other with an offset equivalent to the
amplitude of the triangular carrier signal were used to generate
PWM signals for the switches. A digital proportional–integral
current control algorithm is implemented in DSP TMS320F2812
to keep the current injected into the grid sinusoidal and to have
high dynamic performance with rapidly changing atmospheric
conditions. The inverter offers much less total harmonic distortion
and can operate at near-unity power factor. The proposed system
is verified through simulation and is implemented in a prototype,
and the experimental results are compared with that with the con-
ventional single-phase three-level grid-connected PWM inverter.
Index Terms—DSP TMS320F2812, grid connected, photovoltaic
(PV), proportional–integral (PI) current control, pulsewidth-
modulated (PWM) inverter.
I. I NTRODUCTION
T HE DEMAND for renewable energy has increased sig-
nificantly over the years because of shortage of fossil
fuels and greenhouse effect. Among various types of renewable
energy sources, solar energy and wind energy have become
very popular and demanding due to advancement in power
electronics techniques. Photovoltaic (PV) sources are used to-
day in many applications as they have the advantages of being
maintenance and pollution free. Solar-electric-energy demand
has grown consistently by 20%–25% per annum over the past
20 years, which is mainly due to the decreasing costs and
prices. This decline has been driven by the following factors:
1) an increasing efficiency of solar cells; 2) manufacturing-
technology improvements; and 3) economies of scale [1]. PV
inverter, which is the heart of a PV system, is used to convert
dc power obtained from PV modules into ac power to be fed
into the grid. Improving the output waveform of the inverter
reduces its respective harmonic content and, hence, the size
of the filter used and the level of electromagnetic interference
(EMI) generated by switching operation of the inverter [2]. In
recent years, multilevel inverters have become more attractive
for researchers and manufacturers due to their advantages over
Manuscript received January 8, 2008; revised June 23, 2008. First published
July 9, 2008; current version published December 30, 2008.
The authors are with the Center of Research for Power Electronics, Drives,
Automation and Control (UMPEDAC), Department of Electrical Engineering,
University Malaya, 50603 Kuala Lumpur, Malaysia (e-mail: jeyraj95@um.
edu.my).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2008.928116
0278-0046/$25.00 © 2008 IEEE
149
Fig. 1. Carrier and reference signals.
conventional three-level pulsewidth-modulated (PWM) invert-
ers. They offer improved output waveforms, smaller filter size,
lower EMI, lower total harmonic distortion (THD), and others
[3]–[8].
The three common topologies for multilevel inverters are as
follows: 1) diode clamped (neutral clamped) [9]–[11]; 2) ca-
pacitor clamped (flying capacitors) [12]–[14]; and 3) cascaded
H-bridge inverter [15]–[17]. In addition, several modulation
and control strategies have been developed or adopted for mul-
tilevel inverters, including the following: multilevel sinusoidal
(PWM), multilevel selective harmonic elimination, and space-
vector modulation [3], [18].
A typical single-phase three-level inverter adopts full-bridge
configuration by using approximate sinusoidal modulation
technique as the power circuits. The output voltage then has
the following three values: zero, positive (+Vdc), and negative
(−Vdc) supply dc voltage (assuming that Vdc is the supply
voltage). The harmonic components of the output voltage are
determined by the carrier frequency and switching functions.
Therefore, their harmonic reduction is limited to a certain
degree [4].
To overcome this limitation, this paper presents a five-level
PWM inverter whose output voltage can be represented in
the following five levels: zero, +1/2Vdc, Vdc, −1/2Vdc, and
−Vdc. As the number of output levels increases, the harmonic
content can be reduced. This inverter topology uses two refer-
ence signals, instead of one reference signal, to generate PWM
signals for the switches. Both the reference signals Vref1 and
Vref2 are identical to each other, except for an offset value
equivalent to the amplitude of the carrier signal Vcarrier , as
shown in Fig. 1.
Because the inverter is used in a PV system, a proportional–
integral (PI) current control scheme is employed to keep the
output current sinusoidal and to have high dynamic perfor-
mance under rapidly changing atmospheric conditions and to
maintain the power factor at near unity. Simulation and exper-
imental results are presented to validate the proposed inverter
configuration.
150 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 1, JANUARY 2009

Fig. 4. Basis of equivalence for sinusoidal PWM: volt–seconds.

Fig. 2. Single-phase five-level inverter topology.

Fig. 3. Sinusoidal PWM signal. Fig. 5. Characterization of pulse.

The switching period Δ and the frequency modulation ratio

II. F IVE -L EVEL I NVERTER T OPOLOGY AND PWM L AW p are, respectively, given by
The proposed single-phase five-level inverter topology is
shown in Fig. 2. The inverter adopts a full-bridge configuration Δ = 2π/p (1)
with an auxiliary circuit [4]. PV arrays are connected to the p = fs /f1 (2)
inverter via a dc–dc boost converter. Because the proposed
inverter is used in a grid-connected PV system, utility grid is where fs is the switching frequency and f1 is the fundamental
used instead of load. The dc–dc boost converter is used
√ to step frequency. The quarter period of pulse δ0 is given as
up inverter output voltage Vinv to be more than 2 of grid
voltage Vg to ensure power flow from the PV arrays into the δ0 = Δ/4. (3)
grid [19]. A filtering inductance Lf is used to filter the current
injected into the grid. The injected current must be sinusoidal αk is the position from the origin of the fundamental period of
with low harmonic distortion. In order to generate sinusoidal the midpoint of the period Δ. The angles δ1k and δ2k are the
current, sinusoidal PWM is used because it is one of the most modulating angles which vary throughout the cycle, and it is to
effective methods. Sinusoidal PWM is obtained by comparing a calculate these angles that a modulation law must be derived.
high-frequency carrier with a low-frequency sinusoid, which is Consider first the average voltages V 1k and V 2k during the
the modulating or reference signal. The carrier has a constant two halves of the modulating pulse
period; therefore, the switches have constant switching fre-
quency. The switching instant is determined from the crossing V 1k = (Vs ) {δ1k − (2δ0 − δ1k )} /2δ0 (4)
of the carrier and the modulating signal.
∴ V 1k = (Vs )(δ1k − δ0 )/δ0 (5)
= (Vs )β1k (6)
A. Sinusoidal PWM Law
A fundamental period in Fig. 3 consists of p pulses whose where
widths vary sinusoidally throughout the cycle to give the fun-
damental component of frequency. The basis of equivalence β1k = (δ1k − δ0 )/δ0 (7)
between the desired sinusoid and the actual pulsed waveform
is taken to be volt–seconds, as shown in Fig. 4, i.e., As1 = Ap1 and, similarly
and As2 = Ap2 . One of these pulses, the general kth pulse, is
characterized in detail in Fig. 5. V 2k = (Vs )β2k (8)
SELVARAJ AND RAHIM: MULTILEVEL INVERTER FOR GRID-CONNECTED PV SYSTEM EMPLOYING PI CONTROLLER 151

where

β2k = (δ2k − δ0 )/δ0 . (9)

The volt–second As1 is the half-pulsewidth of the sine wave

and is given according to Fig. 4 by
αk
As1 = Vm sin θ dθ (10)
αk −2δ0

= 2Vm sin δ0 sin(αk − δ0 ). (11)

However, sin δ0 → δ0 when δ0 is small

∴ As1 = 2δ0 Vm sin(αk − δ0 ) (12)

and, similarly,

As2 = 2δ0 Vm sin(αk + δ0 ). (13)

For the corresponding volt–second Ap1 , in the PWM waveform,

Ap1 = 2δ0 V 1k (14)

∴ Ap1 = 2δ0 β1k (Vs ) (15)

and, similarly,

Ap2 = 2δ0 β2k (Vs ). (16)

For equivalence of volt–seconds from which the modulation

law can be derived, we require that

As1 = Ap1 (17)

As2 = Ap2 . (18) Fig. 6. Carrier and reference signals for different values of modulation index
M . (a) M = 0.3. (b) M = 0.5. (c) M = 0.7. (d) M = 1.2.
By equating (12) and (14), and (13) and (16)
commonly expressed in terms of δ1k and δ2k , by substituting
β1k = M sin(αk − δ0 ) (19) from (7) and (9) to give
and, similarly,
δ1k = δ0 [1 + M sin(αk − δ0 )] (22)
β2k = M sin(αk + δ0 ) (20) δ2k = δ0 [1 + M sin(αk + δ0 )] . (23)
where M is the “modulation index” and
Thus, the switching angles δ1k and δ2k for the kth pulse can
Vm be calculated from (22) and (23) in terms of modulation index
M= . (21) M and angles αk and δ0 which depend upon the fundamental
Vs
frequency and frequency ratio.
Equation (21) can be expressed in terms of amplitude of carrier
signal Vc by replacing Vs with Vc . Because, in this topology,
two identical reference signals are used, Vs = 2Vc and Vm = B. Harmonic Spectrum of Sinusoidal PWM Waveform
Vref1 = Vref2 .
The voltage harmonics produced by the sinusoidal PWM
If M > 1, higher harmonics in the phase waveform are
can be computed by first calculating the harmonics due to
obtained. Therefore, M is maintained between zero and one.
the kth pulse alone, Ank , and then summating the harmonic
If the amplitude of the reference signal is increased to be higher
contributions of all p pulses
than the amplitude of the carrier signal, i.e., M > 1, this will
lead to overmodulation. Large values of M in sinusoidal PWM
αk+2δ0
techniques lead to full overmodulation [20]. Fig. 6 shows the 1
carrier and reference signals for different values of M . Equa- Ank = V (θ)e−jnθ dθ (24)
2π
tions (19) and (20) define the modulation law, which is more αk −2δ0
152 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 1, JANUARY 2009

Fig. 7. Ideal five-level inverter output voltage Vinv .

where V (θ) is the voltage pulse shown in Fig. 5

⎧ α −δ
 1k αk+δ2k
1 ⎨
k

−jnθ
∴ Ank = − Vs e dθ + Vs e−jnθ dθ
2π ⎩
αk −2δ0 αk −δ1k
αk+2δ0
⎫ Fig. 8. Switching pattern for the single-phase five-level inverter.
⎬
TABLE I
− Vs e−jnθ dθ (25) INVERTER OUTPUT VOLTAGE DURING S1 −S5 SWITCH ON AND OFF
⎭
αk +δ2k

1 −2
= (Vs )
2π jn
× {e−jnδ2k − ejnδ1k + j sin 2nδ0 }e−jnαk . (26)

Equation (25) cannot be readily simplified. Therefore, for the

harmonic amplitudes due to all p pulses in a fundamental cycle
p
An = Ank . (27)
k=1
III. O PERATIONAL P RINCIPLE OF
THE P ROPOSED I NVERTER
Because PV arrays are used as input voltage sources, the
voltage produced by the arrays is known as Varrays √ . Varrays
is boosted by a dc–dc boost converter to exceed 2Vg . The
voltage across the dc-bus capacitors is known as Vpv . The
operational principle of the proposed inverter is to generate five-
level output voltage, i.e., 0, +Vpv /2, +Vpv , −Vpv /2, and −Vpv
as in Fig. 7. As shown in Fig. 2, an auxiliary circuit which
consists of four diodes and a switch S1 is used between the
dc-bus capacitors and the full-bridge inverter. Proper switching
control of the auxiliary circuit can generate half level of PV
supply voltage, i.e., +Vpv /2 and −Vpv /2 [4].
Two reference signals Vref1 and Vref2 will take turns to be
compared with the carrier signal at a time. If Vref1 exceeds
the peak amplitude of the carrier signal Vcarrier , Vref2 will be
compared with the carrier signal until it reaches zero. At this
point onward, Vref1 takes over the comparison process until it
exceeds Vcarrier . This will lead to a switching pattern, as shown
in Fig. 8. Switches S1 –S3 will be switching at the rate of the
carrier signal frequency, whereas S4 and S5 will operate at
a frequency equivalent to the fundamental frequency. Table I
illustrates the level of Vinv during S1 –S5 switch on and off.
IV. C ONTROL S YSTEM A LGORITHM AND
I MPLEMENTATION
The feedback controller used in this application utilizes the
PI algorithm. As shown in Fig. 9, the current injected into the
grid, also known as grid current Ig , is sensed and fed back to a
comparator which compares it with the reference current Iref .
Iref is obtained by sensing the grid voltage and converting it to
reference current and multiplying it with constant m. This is to
ensure that Ig is in phase with grid voltage Vg and always at
near-unity power factor.
One of the problems in the PV generation systems is the
amount of the electric power generated by solar arrays always
changing with weather conditions, i.e., the intensity of the solar
radiation. A maximum power point tracking (MPPT) method
or algorithm, which has quick-response characteristics and is
able to make good use of the electric power generated in any
weather, is needed to solve the aforementioned problem [21].
Various MPPT control methods have been discussed in detail
in [22]. Constant m is derived from the MPPT algorithm.
The perturb-and-observe algorithm is used to extract maxi-
mum power from PV arrays and deliver it to the inverter [23],
[24]. The instantaneous current error is fed to a PI controller.
The integral term in the PI controller improves the tracking
by reducing the instantaneous error between the reference and
the actual current. The resulting error signal u which forms
Vref1 and Vref2 is compared with a triangular carrier signal,
and intersections are sought to produce PWM signals for the
inverter switches.
A. Mathematical Formulation
The PI algorithm can be expressed in the continuous time
domain as
t
u(t) = Kp e(t) + Ki e(τ )dτ (28)
τ =0
SELVARAJ AND RAHIM: MULTILEVEL INVERTER FOR GRID-CONNECTED PV SYSTEM EMPLOYING PI CONTROLLER 153

Fig. 9. Five-level inverter with control algorithm implemented in DSP TMS320F2812.

where
u(t) control signal;
e(t) error signal;
t continuous-time-domain time variable;
τ calculus variable of integration;
Kp proportional-mode control gain;
Ki integral-mode control gain.
Implementing this algorithm using a DSP requires one to Fig. 10. PI control algorithm implemented in DSP TMS320F2812.
transform it into the discrete-time domain. Trapezoidal sum
To eliminate the need to calculate the full summation at each
approximation is used to transform the integral term into the
time step (which would require an ever-increasing amount of
discrete-time domain because it is the most straightforward
computation as time goes on), the summation is expressed as a
technique. The proportional term is directly used without ap-
running sum
proximation.
sum(k) = sum(k − 1) + [e(k) + e(k − 1)] (33)
P term : Kp e(t) = Kp e(k). (29)
u(k) = Kp e(k) + Ki sum(k). (34)
t 
k
h
I term : Ki e(τ )dτ ∼
= Ki [e(i) + e(i − 1)] . These two equations, which represent the discrete-time PI
i=0
2 control law, are implemented in DSP TMS320F2812 to control
τ =0
the overall operation of the inverter.
(30)

Time relationship: t = k ∗ h B. Algorithm Implementation

where
Control signal saturation and integral-mode antiwindup lim-
h sampling period;
iting are easily implemented in software. In this work, the
k discrete-time index: k = 0, 1, 2, . . ..
control signal itself takes the form of PWM outputs from the
For simplification, it is convenient to define new controller
DSP. Therefore, the control signal is saturated at the value
gains as
that corresponds to 100% duty cycle for the PWM. An un-
h desirable side effect of saturating the controller output is the
Ki = Ki (31) integral-mode windup. When the control output saturates, the
2
integral-mode control term (i.e., the summation) will continue
from which one can construct the discrete-time PI control to increase but will not produce a corresponding increase in
law as controller output (and hence will not produce any additional

k increase in plant response). The integral can become quite large,
u(k) = Kp e(t) + Ki [e(i) + e(i − 1)] . (32) and it can take a long time before the controller is able to reduce
i=0 it once the error signal changes sign. The effects of windup
154 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 1, JANUARY 2009

Fig. 11. PWM switching strategy.

Fig. 12. Inverter output voltage (Vinv ) and grid current (Ig ) for different values of M . (a) Vinv for M < 0.5. (b) Ig for M < 0.5. (c) Vinv for M > 1.0.
(d) Ig for M > 1.0. (e) Vinv for 0.5 ≤ M ≤ 1.0. (f) Ig for 0.5 ≤ M ≤ 1.0.
SELVARAJ AND RAHIM: MULTILEVEL INVERTER FOR GRID-CONNECTED PV SYSTEM EMPLOYING PI CONTROLLER 155

on the closed-loop output are larger transient overshoot and

undershoot and longer settling times.
One approach for overcoming the integral-mode windup is to
simply limit in software the maximum absolute value allowed
for the integral, independent of the controller output saturation
[25], as shown in Fig. 10.

V. S IMULATION AND E XPERIMENTAL R ESULTS

A. Simulation Results
In order to verify that the proposed inverter can be practically
implemented in a PV system, simulations were performed by Fig. 13. Step response of the PI current control scheme.
using MATLAB SIMULINK. It also helps to confirm the PWM
switching strategy which then can be implemented in a DSP. TABLE II
PV MODULE CHARACTERISTICS
Fig. 11 shows the PWM switching strategy used in this paper. It
consists of two reference signals and a triangular carrier signal.
Both the reference signals are compared with the triangular
carrier signal to produce PWM switching signals for switches
S1 −S5 as in Fig. 8.
Note that one leg of the inverter is operating at a high
switching rate equivalent to the frequency of the carrier signal,
whereas the other leg is operating at the rate of fundamental TABLE III
PV MULTILEVEL INVERTER SPECIFICATIONS AND
frequency (i.e., 50 Hz). The switch at the auxiliary circuit S1 CONTROLLER PARAMETERS
also operates at the rate of the carrier signal. As mentioned
earlier, the modulation index M will determine the shape of
the inverter output voltage Vinv and the grid current Ig . Fig. 12
shows Vinv and Ig for different values of M√.
The dc-bus voltage is set at 400 V (> 2Vg ; in this case,
Vg is 240 V) in order to inject
√ current into the grid. Fig. 12(a)
shows that Vinv is less than 2Vg due to M being less than 0.5.
The inverter should not operate at this condition because the
current will be injected from the grid into the inverter, rather
than the PV system injecting the current into the grid, as shown
in Fig. 12(b). Overmodulation condition, which happens when
M > 1.0, is shown in Fig. 12(c). It has a flat top at the peak
of the positive and negative cycles because both the reference
signals exceed the maximum amplitude of the carrier signal.
This will cause Ig to have a flat portion at the peak of the
sine waveform, as shown in Fig. 12(d). To optimize the power
transferred from PV arrays to the grid, it is recommended to
operate at 0.5 ≤ M ≤ 1.0. Vinv and Ig for optimal operating
condition are shown in Fig. 12(e) and (f), respectively. As Ig
is almost a pure sinewave, the THD can be reduced compared
with that under other values of M .
To analyze the performance of the PI current control scheme,
a sudden step change is applied to the simulation process.
This step change is similar to real-time environment condition
(for example, the sun is emerging from the clouds). The step Fig. 14. Prototype of the five-level PWM inverter.
response is monitored, as shown in Fig. 13.
shows the prototype of the five-level PWM inverter. PWM
switching signals for the switches are generated by comparing
B. Experimental Results
a triangular carrier signal with two reference signals, as shown
The simulation results are verified experimentally by using in Fig. 15.
a DSP TMS320F2812. The proposed inverter is tested with Fig. 16 shows the experimental results for Vinv and Ig ,
a PV array of 750 W. The module’s ratings are shown in whereas Fig. 17 shows a zoom-in view of both the waveforms.
Table II, whereas Table III shows the PV multilevel inverter It can be seen that Vinv consists of five levels of output voltage,
specifications and its controller parameters. Ten modules are and Ig has been filtered to resemble a pure sinewave. The
connected in series to produce 750 W of peak power. Fig. 14 modulation index M is 0.8. For M that is less than 0.5, Vinv is
156
Fig. 15. PWM switching signals for S1 –S5 . (a) S1 . (b) S2 and S3 . (c) S4
and S5 .
√
less than 2Vgrid . Therefore, current will be injected from the
grid into the PV system, as shown in Fig. 18. This condition
should be avoided to protect the PV system from damage.
For the case of M being more than 1.0, the results are not
shown because the PV system is designed to operate at condi-
tion of M being less than one. This is done by calculating the
input current and voltage corresponding to the output voltage
and current. Then, M is varied accordingly for the inverter to
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 1, JANUARY 2009
Fig. 16. Experimental result of Vinv and Ig for M = 0.8.
Fig. 17. Zoom-in view of Fig. 16.
Fig. 18. Experimental result of Vinv and Ig for M = 0.2.
operate at minimum and maximum power conditions. Below
the minimum power condition (for example, during heavy
clouds or nighttime) or above the maximum power condition
(for example, over rating of PV arrays which exceeds the rating
of the inverter), the inverter should not operate to ensure the
safety of the PV system and the environment.
THD and power factor measurements for the proposed in-
verter are measured by using FLUKE 43B Power Quality
SELVARAJ AND RAHIM: MULTILEVEL INVERTER FOR GRID-CONNECTED PV SYSTEM EMPLOYING PI CONTROLLER 157

Fig. 19. THD result of the proposed multilevel PV inverter voltage waveform
shown in Fig. 17.

Fig. 21. Conventional three-level PWM inverter for PV application.

Fig. 20. Grid voltage Vg and grid current Ig at near-unity power factor.
Fig. 22. Experimental result of Vinv and Ig for the three-level PWM inverter.

Analyzer. The THD is shown in Fig. 19. This result is mea-

sured corresponding to Fig. 16 where the M value is 0.8. The
corresponding power factor is measured, and the result is shown
in Fig. 20. It is notable that both the grid voltage Vg and the
current injected into the grid Ig are in phase with a power factor
of 0.96.
The results from the five-level PWM inverter are compared
with those from the three-level PWM inverter in terms of
THD. Fig. 21 shows the conventional three-level PWM inverter
for grid-connected PV application. The same current control
techniques were used to control the overall performance of
the inverter. The only difference between Fig. 21 and Fig. 9
is the elimination of auxiliary circuit, and therefore, only one
dc-bus capacitor is used. The resulting waveform of Vinv and
Ig is shown in Fig. 22. The results were taken at almost the
same environmental conditions to ensure that Ig is similar to
the measurement made for the five-level inverter. As shown in Fig. 23. THD result of the three-level PV inverter.
Fig. 23, THD measurement for the three-level inverter is much
higher when compared with that for the five-level inverter. This Efficiency measurement has been carried out to compare
proves that multilevel inverters can reduce the THD which is an the efficiency of the three-level PWM inverter with that of
essential criterion for grid-connected PV systems. the five-level PWM inverter for PV application. The measured
158 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 1, JANUARY 2009
efficiency of the three-level PWM inverter is approximately
90%, whereas that of the five-level PWM inverter is 86%.
As expected, the efficiency of the five-level PWM inverter
is lower compared with that with the conventional three-level
PWM inverter. The main reason is the addition of the auxiliary
circuit between the dc–dc boost converter and the full-bridge
inverter configuration. Switching losses of switch S1 in the aux-
iliary circuit have caused the efficiency of the five-level PWM
inverter to be approximately 4% less than that of the three-level
PWM inverter. However, simulation and experimental results
show that the THD of the proposed inverter is lower when
compared to that of the conventional three-level PWM inverter,
which is an important element for grid-connected PV systems.
VI. C ONCLUSION
This paper presented a single-phase multilevel inverter for
PV application. It utilizes two reference signals and a carrier
signal to generate PWM switching signals. The circuit topol-
ogy, modulation law, and operational principle of the proposed
inverter were analyzed in detail. A digital PI current control
algorithm is implemented in DSP TMS320F2812 to optimize
the performance of the inverter. Experimental results indicate
that the THD of the five-level inverter is much lesser than that of
the conventional three-level inverter. Furthermore, both the grid
voltage and the grid current are in phase at near-unity power
factor.
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Jeyraj Selvaraj was born in Kedah, Malaysia, in
1980. He received the B.Eng. (Hons) degree from
Multimedia University, Cyberjaya, Malaysia, and the
M.Sc. degree in power electronics and drives from
the University of Birmingham, Birmingham, U.K.,
and University of Nottingham, Nottingham, U.K., in
2002 and 2004, respectively. He is currently working
toward the Ph.D. degree at the Center of Research for
Power Electronics, Drives, Automation and Control
(UMPEDAC), Department of Electrical Engineer-
ing, University Malaya, Kuala Lumpur, Malaysia.
His research interests include single- and three-phase multilevel inverters,
digital proportional–integral current control techniques, photovoltaic inverters,
and dc–dc converters.
Nasrudin A. Rahim (M’89–SM’08) was born in
Johor, Malaysia, in 1960. He received the B.Sc.
(Hons.) and M.Sc. degrees from the University
of Strathclyde, Glasgow, U.K., and the Ph.D. de-
gree from Heriot–Watt University, Edinburgh, U.K.,
in 1995.
He is currently a Professor in the Department of
Electrical Engineering, University of Malaya, Kuala
Lumpur, Malaysia, and the Director of the Center of
Research for Power Electronics, Drives, Automation
and Control (UMPEDAC).
Prof. Rahim is the Chairman of the working group WG-8 covering reluc-
tance motors of the IEEE Motor Subcommittee under the IEEE-PES Electric
Machinery Committee. His research interests include power electronics, real-
time control systems, and electrical drives.