FPGA-based Servo Control IC for PMLSM Drives with
Adaptive Fuzzy Control
*Ying-Shieh Kung, Member, IEEE, Ming-Hung Tsai, Chia-Sheng Chen
Department of Electrical Engineering,
Southern Taiwan University of Technology,
No.1 Nan-Tai Street, Yung-Kang, Tainan County, 710, Taiwan
*Email:kung@mail.stut.edu.tw
Abstract
A FPGA-based servo control IC for use in a permanent
magnet linear synchronous motor (PMLSM) drive is
presented in this paper. Mathematic model of the
PMLSM is presented and the vector control scheme is
used in the current loop of the PMLSM drive. Then, to
increase the performance of the PMLSM drive, an
adaptive fuzzy controller (AFC) constructed by a fuzzy
basis function and a parameter adjustable mechanism is
derived and applied to the position loop of PMLSM
drive to cope with the dynamic uncertainty and external
load effect. After that, a FPGA-based control IC is
designed to realize the controllers. The FPGA-based
control IC has two IPs (Intellectual Properties), an Nios
embedded processor IP and an application IP. The Nios
processor is used to perform the function of an adaptive
fuzzy position controller for PMLSM drive. The
application IP is used to perform the current vector
control of the PMLSM drive, which includes SVPWM
generation, coordinate transformation, PI controller and
the pulse detection of the quadrature encoder. At last, an
experimental system has been set up and some
experimental results have been demonstrated.
1 Introduction
The advantages of superior power density, high-
performance motion control with fast speed and better
accuracy, are such that permanent magnet linear
synchronous motors (PMLSM) are being increasingly
used in many automation control fields as actuators [1-
2], including computer-controlled machining tools, X-Y
driving devices, robots, semiconductor manufacturing
equipment, transport propulsion, etc. However, the
PMLSM does not use conventional gears or ball screws,
so uncertainty in the drive system greatly affects servo
performance [3]. These uncertainties include parameter
variations, external load disturbance, friction force and
unknown dynamics. They always diminish the
performance of the pre-designed PMLSM driving
system. To solve the above problems, an intelligent
control techniques [4-5] such as fuzzy control, neural
networks control, adaptive fuzzy control, have been
developed and applied to the position control of servo
motor drives to yield high operating performance.
0-7803-9514-X/06/$20.00 ©2006 IEEE
Due to the progress of VLSI technology in recent
year, the FPGA has brought more attention before. The
advantages of the FPGA includes their programmable
hard-wired feature, fast time-to-market, shorter design
cycle, embedding processor, low power consumption
and higher density for the implementation of the digital
system [6]. Many practical applications in ac motor
control have been studied [7-8]. But, the researchers
used the FPGA only to realize the hardware part of the
overall servo control system. Nowadays, an embedded
processor and IP design can be developed and
downloaded into FPGA to construct a SoPC
environment [9-10]. Therefore, in this paper, a high
performance servo control IC with adaptive fuzzy
control is designed for PMLSM drive under this SoPC
environment. In the proposed FPGA-based control IC, it
has two IPs, a Nios embedded processor IP and an
application IP. The Nios processor IP is used to
implement an adaptive fuzzy control algorithm by
software, and the application IP is used to realize the
current vector control scheme by hardware. Therefore,
all of the functions to build up a high-performance
PMLSM drive can be integrated in a single FPGA.
2 Description of PMLSM Model and
Design Method
The internal architecture of the proposed FPGA-based
servo system for PMLSM drive is shown in Fig. 1. The
adaptive fuzzy controller in the position loop and P
controller in the speed loop is realized by the software
under the Nios embedded processor, but the current
vector control scheme is implemented by PLD hardware.
2.1 Mathematical Modeling of PMLSM
The dynamic model of a typical PMLSM can be
described as follows
di d R π Lq 1
= − s id + x& p iq + vd (1)
dt Ld τ Ld Ld
di q π Ld R πλf 1 (2)
=− x& p id − s iq − x& p + vq
dt τ Lq Lq τ Lq Lq
where vd, vq are the d and q axis voltages; id, iq, are the d
and q axis currents, Rs is the phase winding resistance;
Ld, Lq are the d and q axis inductance; x& p is the
ICIEA 2006
 FPGA-based servo control IC Current and vector control for ac servo motor
Implemented by hardware (PLD)
Servo control for PMLSM Implemented by software Rectifier AC110V
using Nios embedded processor −1
Modify
−
Park Clarke 1 + −
i d* =0 vd vα vrfx U
xm +ωr−
PI α, β a, b, c v
PWM1
PWM2

+ e uf + u iq* vq vβ
rfy
SVPWM
PWM3
PWM4
3-Phase
inverter
V
Inference KI Kv d, q
d,q α, β vrfz PWM5 W
_ ∆e FI Mechanism
DFI
1 − Z −1 +
PI PWM6
PMLSM
1 − Z −1 + −
- id iα i iu
α,
α,ββ a, b, c a
xp Knowledge
KP ib Current
A/D LPF

iq iβ α, β ic detector iw
Base d, q
d,q A/D LPF
+ − +
Park Clarke A , A ,B

θe π xp − + −
B ,Z ,Z
Adjust A
1-z-1 Sin&Cos Encoder
B
Differ-
Mechanism τ detector &
Z
ential
Transform. Circuit
em
_
xm + xp

Position & speed control: Current loop: 16kHz,

less than 1kHz PWM circuit: 4~8MHz
Fig. 1 The internal architecture of FPGA-based servo control IC for PMLSM drive
translator speed; λ f is the permanent magnet flux ‰ Clarke : stationary a-b-c frame to stationary α-β
linkage; τ is the pole pitch. The developed frame.
electromagnetic thrust force is given by [3]. 2 −1 − 1 f 
 fα   3 (7)
3  f 
a
3π f =
3

Fe = (( Ld − Lq )id + λ f )iq (3)
 β  0
1 −1   b
 f 
2τ 3   c 
 3
The current control of a PMLSM drive is based on
‰ Clarke −1 : stationary α-β frame to stationary a-b-c
a vector control approach. That is, if we control id to 0
frame.
in Fig.1, the PMLSM will be decoupled, so that control
a PMLSM will become easy as to control a DC linear  fa   1 0 
motor. After simplification and considering the  f  =  −1 3 
 fα  (8)
2 
mechanical load, the model of a PMLSM can be  b  2
− 3  β
f 
 f c   −21 2 

written as the following equations,
3π ‰ Park : stationary α-β frame to rotating d-q frame.
Fe = λ f iq ∆ K t iq (4)
2τ  f d   cosθ e sin θ e   fα 
f =
(9)
 
cosθ e   f β 
with
3π  q  − sin θ e
Kt = λf (5)
2τ ‰ Park −1 : rotating d-q frame to stationary α-β frame.
and the mechanical dynamic equation of PMLSM is  fα  cos θ e − sin θ e   f d  (10)
d 2xp f  =   
cos θ e   f q 
dx p
Fe − FL = M m 2
+ Bm (6)  β   sin θ e
dt dt
where Fe is the motor thrust force, K t is force
constant, M m is the total mass of the moving element, 2.3 Adaptive Fuzzy Controller (AFC) in
Position Control Loop
Bm is viscous friction coefficient and FL is the
external force. The structure of an adaptive fuzzy controller for
PMLSM drives is depicted in the dotted line of Fig. 1,
which consists of a fuzzy controller (FC), a reference
2.2 Coordinate Transformation model and an adjusting mechanism. In Fig.1, the
tracking error and the change of the error, e , ∆e are
The coordination transformation of the PMLSM is
similar to that in the synchronous rotating reference defined as
frame. The relations of coordination transformation in e ( k ) = xm ( k ) − x p ( k ) , (11)
the rotating motor between stationary a-b-c frame, ∆e(k ) = e(k ) − e(k − 1) , (12)
stationary α-β frame and synchronously rotating d-q and e, ∆e and uf as input and output variable of fuzzy
frame are are described as follows, and where f s is a controller, respectively. The design procedure of the
space vector refer to current, voltage or flux. fuzzy controller is as follows:
‰ Define the linguist value are { A1 , A2 , E} with the From (19) and (20), we have
symmetrical triangular membership function: x p ( k ) = ( A + 1 − Bk v ) x p ( k − 1) − (1 − BK v ) x p ( k − 2) (21)

 0 xi ≤ xim − wim / 2 + Bk v u I ( k − 2) + Bk v ( K I + K p )u f ( k − 1)
 xi − xim + wim / 2 wm (13) with A = exp(−BmT / M m ) , B = Kt (1− A) / Bm .
xim − i < xi < xim
 2
 wm / 2
ξ m ( xi , xim , wim ) =  m i m
xi + wi / 2 − xi
when m wim Furthermore, according to the chain rule, the partial
 x < xi < xi +
m

wim / 2
i
2 differential equation of J ( k + 1) in (16) can be

 wm
0 xi ≥ xim + i rewritten as
2
∂J ( k + 1) ∂x ( k + 1) ∂u f (k ) (22)
where xi is input value, ξ m (•) is output value, xim and = −αe (k + 1) p
m
∂c j ( k ) ∂u f ( k ) ∂c j (k )
w im are mean value and width of the triangular where α is learning rate. From (21), (15), (22) and (17),
membership function. it is straightforward that the parameters c j of fuzzy
‰ Derive M fuzzy control rules as initial condition,
such as, controller in (15) can be derived by the following
IF e is A1m and ∆e is Am2 THEN u f is Em ,m=1,2,..,M (14)
expression.
µj
‰ Construct the fuzzy system with u f ( x | θ) from those ∆c j ( k ) = αBK v ( K p + K I ) e m (k )
∑µ m (23)
M rules using the singleton fuzzifier, product- m

inference rule, and central average defuzzifier µj

≈ αSgn ( B ) K v ( K p + K I ) e m (k )
method. Therefore, (14) is replaced with the ∑µ m
following expression: m

M M Because the motor parameter B is not easy to know, the

∑ cm[∏i =1 ξm ( xi , xim , wim )] ∑ cm µm
2
(15) sgn(B) is employed to calculate in (23). The sgn(.)
u f ( x |θ ) = m =1
M
∆ m =1
M
denoted the sign operator.
∑ [∏i =1 ξm ( xi , xim , wim )] ∑ µm
2

m =1 m =1 2.4 Design of FPGA-based Servo Control IC

those c1 , c 2 ,.., c M are adjustable parameters. for PMLSM Drive
The gradient descent method is adopted to derive the
fuzzy control law in Fig. 1. The main purpose of The internal architecture of the proposed FPGA-based
adjusting the parameters of the fuzzy controller is to servo control IC for PMSM drive is shown in Fig.2. The
minimum the square error (instantaneous cost function) FPGA chip is manufactured by Altera Corporation and
between the position of moving part of the linear motor it can be embedded by a Nios processor. The FPGA
and the output of the reference model. The used in this paper is Cyclone EP1C20, which has
instantaneous cost function is defined as follows: 20,060 LEs, maximum 301 user I/O pins, total 294,912
1 1
J(k +1) = em(k +1)2 = xm(k +1) − xp(k +1)
2 2
[2
(16) ] RAM bits, and a Nios embedded processor which has a
16-bit or 32-bit configurable CPU core, 1 to 20Kbytes
available on chip and maximum 4G bytes off-chip
and the parameters of cj is adjusted with,
memory. A custom software development kit (SDK)
∂J (k + 1) (17) consists of a compiled library of software routines for
∆c j (k ) ∝ −
∂c j (k ) the SoPC design, a Make-file for rebuilding the library,
To derive the formulation of adjusting the parameters, and C header files containing structures for each
peripheral. In Fig.2, the proposed FPGA-based control
c j at first, we assume FL to be zero, and take Laplace IC has two IPs, a Nios embedded processor IP and an
transformation with (6), and then application IP. The Nios processor is used to perform
x p ( s) K  Bm / M m (18) the AFC function of PMLSM drive and its flow chart of
=  t  interrupt service routine (ISR) for intelligent AFC are
i q* ( s )  Bm  s ( s + Bm / M m )
plotted in Fig. 3. The controller program is coded in C
The bilinear transformation is applied and the difference language. The application IP for current vector control
equation of PMLSM drive system can be derived as of PMLSM in Fig.2 is implemented by hardware using
x p (k ) K  (1 − e − BmT / M m ) z −1 , (19) PLD due to the need of high-speed but simple
=  t  − BmT / M m −1 computation and it includes frequency divider, circuits
*
i q (k )  Bm  (1 − e z )(1 − z −1 )
of two PI controllers, coordinate transformation of
where z −1 is a back-shift operator, and T is the sampling Clarke, Park, inverse Park, inverse Clarke and circuits
period. In Fig.1, the current command iq* and the output of SVPWM, QEP and ADC conversion control. Figure
4 shows the digital circuit of PI controller, which
of fuzzy controller u f can be obtained by the following includes 3 adders, 2 multipliers, 2 D-type flip-flops and
expression 3 max value limiters. Figures 5 to 6 are the circuits of
iq* (k) = Kv (uI (k −1) + (KI + K p )u f (k) − xp (k) + xp (k −1)) (20) Clark-1 and Park-1 transformation in (8) and (10),
respectively. The block diagram of PWM circuit is
shown in Fig. 7. PWM circuit is designed to be 12 kHz performance of the proposed controller. Figure 8 shows
frequency and 1µs dead-band. The overall circuits the position step responses of the moving part of the
included a Nios embedded processor IP (25.7%) and an linear motor under payload of 0 Kg and 3 Kg using FC
application IP (28.2%) in Fig. 2, use 53.9% utility of when the position command is 1.667Hz square wave
Cyclone EP1C20. signal with 5mm amplitude. The fuzzy rule table is
adequately selected in the case of without any payload,
so the step response in Fig. 8(a) is a good dynamic
3 Experiments and Results
response with a rising time of 90ms, no overshoot and a
The overall experimental system is depicted in Fig. 1, near-zero steady state. However, when a 3 kg payload is
and it includes a FPGA (Cyclone EP1C20), a voltage added and the same fuzzy rule and controller parameters
source IGBT inverter and a PMLSM. The PMLSM was are used, the position dynamic response worsens and
manufactured by the BALDOR electric company; and it exhibits a 10.4% overshoot and a little oscillation in Fig.
is a single-axis stage with a cog-free linear motor and a 8(b). It reveals that the dynamic performance of
stroke length with 600mm. The parameters of the motor PMLSM is affected by a variation in the external
are: Rs = 27 Ω , Ld = Lq = 23.3 mH, Kt = 79.9N/A. The payload. Accordingly, the AFC is adopted in Fig. 1 to
maximum speed and acceleration are 4m/s and 4 g but solve with this problem. Figures 9~10 show the
depend on external load. The moving mass is 2.5Kg, the experimental results with and without the proposed
maximum payload is 22.5Kg and the maximum thrust AFC under the effect of 3Kg and 6Kg payload,
force is 73N under continuous operating conditions. A respectively. Figures 9(a) and 10(a) show a poorer
linear encoder with a resolution of 5µm is mounted on dynamic response with overshoot and oscillation when
the PMLSM as the position sensor, and the pole pitch is only the FC is used. However, when the AFC is adopted,
30.5mm (about 6100 pulses). The inverter has three sets the dynamic responses are improved and presented in
of IGBT power transistors. The collector-emitter Figs. 9(b) and 10(b). Second, the frequency response is
voltage of the IGBT is rated 600V; the gate-emitter considered to evaluate the performance of the proposed
controller. A tested input signal of the sinusoid wave
voltage is rated ±20V, and the DC collector current is
with 10 mm amplitude and a frequency of 1.667Hz is
rated 25A and in short time (1ms) is 50A. The photo-IC,
provided. In this design, the frequency tracking
Toshiba TLP250, is used in the gate driving circuit of
response and the tracking error of the moving part of the
IGBT. Input signals of the inverter are PWM signals
PMLSM with and without the proposed AFC are shown
from FPGA device. For the implement, the PWM
switching frequency of inverter, dead-band and the in Figs. 11 and 12, which reveal that the ±0.35 mm
control sampling frequency of position loop are amplitude tracking error obtained using AFC after one
designed to 12kHz, 1µs, and 1kHz, respectively. period time is better than the ±2 mm tracking error
To evaluate the dynamic performance of PMLSM obtained using only FC. Therefore, from Figs. 8 to 12,
drive, the AFC applied in position control loop of Fig. 1 those results demonstrate that the proposed servo
is tested. The transfer function of the reference model is control IC using SoPC technology for PMLSM drive is
chosen by a second order system with the natural effectiveness and robustness.
frequency of 20 rad/s and the damping ratio of 1. The
step response is firstly tested to evaluate the
Altera FPGA (Cyclone EP1C20)

CLK-ctrl
A[22]
Frequency
Nios Embedded Processor IP I-U[11..0] Application IP CLK-sys CLK
CLK-sp divider
A[0] CPU UART I-W[11..0]
D[31] ADIN[11]
Avalon Bus
Avalon Bus

On-chip PIO IQ[11..0]

ADIN[0]
D[0] ROM
sram_be[3]
QEP[15..0] ADC BDIN[11]
Timer CLK-sys
sram_be[2] On-chip
sram_be[1] CLK-ctrl Control
sram_be[0] RAM BDIN[0]
I-U[11..0]
sram_oe SPI CHA
sram_we I-W[11..0] CHB
sram_cs RCA
RCB
STSA
STSB
CLK-sys
KI-p[11..0] Servo on

CLK-ctrl Dead-band[11..0] PWM-1

ID[11..0]=‘0’
CLK-sys PI PWM-2
SVPWM
PWM-f[11..0]
ID[11..0] PWM-3
IDD[11..0] Controller VA[11..0] PWM-4
KP-p[11..0] VB[11..0] PWM-5
Servo on VC[11..0] PWM-6
KI-q[11..0]
CLK-ctrl
IQ[11..0] CLK-sys
IQ[11..0] PI
IQQ[11..0]
KP-q[11..0]
Controller VDD[11..0]
VQQ[11..0] CLK-sys
QEP[15..0] Servo on CLK-sys Modified VA[11..0]
rotor-position[15..0]
INV PARK
VAA[11..0] VB[11..0]

CLK-sys
VBB[11..0]
INV CLARK VC[11..0]

CLK-sp
CLK-sys
SIN/COS
QEP[15..0]
Encoder-A
EN-A
QEP EN-Z Estimation
EN-B
Encoder-B
Encoder-Z
EN-Z
of Flux
Flux-angle[11..0]
CLK-sys angle IQQ[11..0]
CLK-sys

CLK-sp
IDD[11..0] PARK IAA[11..0]
CLARK I-W[11..0]
IBB[11..0]

CLK-sys I-U[11..0]

Fig. 2 The block diagram of internal circuit of a FPGA-based servo control IC

 Start of Start of ISR 8
main program ( each 1kHz ) Command Pay load = 0Kg
6

Position (mm)
Read QEP from current Calculation of q-axis
Initial interrupt
vector control IP and current command and
4
calculate velocity of Send to current vector
control IP
2
PMLSM
Initial timer
0
Calculation of Calculation of error Response
Initial all position error and Between position of -2
peripherals the change of error motor and output of 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
reference model (a) Time (s)
Setting of Calculation of output
position command of Fuzzy controller Parameters adjusting
8
of fuzzy controller
Command Pay load = 3Kg

Position (mm)
6
Calculation of
loop
speed loop End 4
2
Fig. 3 Flow chart of main and ISR program in Nios processor
0
PI Controller
Response
-2
CK
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
D-Type
Ki
CK
FF
Ui(k-1)
+/-
(b) Time (s)
Adder Ui(k)
CK
D-Type
Multi
saturate
Fig. 8 Position step position using FC under (a) without
CK
CMD
+/-
e(k)
FF
e(k-1) payload (b) 3 Kg payload
FBK Sub
saturate CK
U(k)
Up(k) +/-
Kp Multi Adder
saturate

Fig. 4 Digital circuit of PI controller 8

Command Response Without Adaptation
Position (mm)

6
vα va 4
1/2 2‘S COMPLEMENT
2
1/2
0
1/4
-2
0 0.5 1 1.5 2 2.5 3 3.5
1/16 adder vb (a) Time (s)
1/32
vβ adder 8
1/64 Command With Adaptation
6
Position (mm)

1/256
adder 2‘S COMPLEMENT vc
4
1/512
2
1/2048
0
Response
Fig. 5 The designed circuit of Clarke −1 formulation -2
0 0.5 1 1.5 2 2.5 3 3.5
(b) Time (s)

cosθe 12 bits
Fig. 9 Position step response under (a) 3 Kg payload and
multiplier using FC only (b) 3 Kg payload and using the
vd 12 bits vα proposed AFC
adder
− sin θ e 12 bits
vq multiplier
8
Command Response Without Adaptation
sin θ e
Position (mm)

12 bits 6

vd multiplier 4
12 bits
2
cos θ e 12 bits
adder vβ
0
multiplier
vq -2
0 0.5 1 1.5 2 2.5 3 3.5
Fig. 6 The designed circuit of Park −1 formulation (a) Time (s)
8
Generation of Command With Adaptation
Position (mm)

CLK the symmetrical 6

triangular wave
4
Q
12
PWMEA_1
2
S1 CMPR1
Vref1 Comparator PWMEA_2 0
(1) PWM1
12
12 Response
S5 S2 CMPR2 PWMEB_1 PWM2 -2
Vref2 Dead-band
Comparator PWM3 0 0.5 1 1.5 2 2.5 3 3.5
State Machine PWMEB_2 generation
Vref3
12 12 (2) PWM4 (b) Time (s)
CMPR3
unit
S4 S3 Comparator
PWMEC_1 PWM5
PWM6
Fig. 10 Position step response under (a) 6 Kg payload and
12 PWMEC_2
Clk_200n
12 (3) using FC only (b) 6 Kg payload and using the
Clk_40n Clk_200n
SVPWM Algorithm proposed AFC

Fig. 7 Block diagram of SVPWM circuit

 15
Command Without Adaptation References
Position (mm)

10

5
[1]F. Gieras and Z.J. Piech, Linear synchronous motors –
transportation and automation systems, CRC Press,
0 2000.
Response
-5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 [2]P.K. Budig, “The application of linear motors,” in
(a) Time (s) Proceedings of the 3rd international of PIEMC, 2000,
4
vol. 3, pp.1336-1340.
2
error (mm)

0
[3]T.H. Liu, Y.C. Lee and Y.H. Chang, “Adaptive
controller design for a linear motor control system,”
-2
IEEE Trans. on Aerospace and Electronics System,
-4 April 2004, vol. 40, no.2, pp. 601-613.
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
(b) Time (s) [4]G. Qingding, H. Qingtao and Q. Yanli, “Neural
Fig. 11 (a) frequency response of a 1.667Hz sinusoid input network real-time IP position controller on-line design
signal with 3 kg payload using FC (b) tracking error
for permanent magnetic linear synchronous motor,” in
15
Proceedings of the 7th International on Advanced
Command With Adaptation motion control, pp. 386-389, 2002.
Position (mm)

10

5 [5]F.J. Lin, C.H. Lin and P.K. Huang, “Recurrent fuzzy

neural network controller design using sliding-mode
0
Response control for linear synchronous motor drive,” IEE Proc.
-5 Control Theory Application, vol. 151, no.4, pp. 407-
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
(a) Time (s) 416, July 2004.
4
[6]B.W. Bomar, “Implementation of Microprogrammed
Position (mm)

2
control in FPGAs,” IEEE Trans. on Indust. Electr.,
0 vol. 49, no. 2, pp. 415-422, 2002.
-2
[7]Z. Zhou, T. Li, T. Takahahi and E. Ho, “Design of a
-4
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Universal Space Vector PWM Controller Based on
(b) Time (s) FPGA,” in Proceedings of the 2004 Applied Power
Fig. 12 (a) frequency response of a 1.667Hz sinusoid input Electronics Conference and Exposition Conference,
signal with 3 kg payload using AFC (b) tracking error vol 3, pp. 1698 ~1702, 2004.

[8]Z.Zhou, T. Li, T. Takahahi and E. Ho, “FPGA

4 Conclusions Realization of a High-performance Servo Controller
for PMSM,” in Proceeding of the 9th IEEE
A FPGA embedded with a Nios processor is successfully Application Power Electronics conference and
developed in the servo control IC of PMLSM drives in Exposition, vol.3, pp. 1604~1609, 2004.
this paper. The FPGA-based servo control IC allows a
fully digital function and high performance control for [9]Y.S. Kung, P.G. Huang and C.W. Chen,
the PMLSM drive, therefore that the current vector “Development of a SOPC for PMSM Drives,” in
control scheme, SVPWM generation, coordinate Proceeding of the 47th IEEE International Midwest
transformation, QEP detection and adaptive fuzzy Symposium on Circuits and Systems, vol. II, pp. II-
position control strategy are all realized and integrated in 329~II-332, 2004.
a single FPGA. The experiments are successfully
validated, and the experimental results show a good [10] Y.S. Kung and G.S. Shu, “Design and
performance. Implementation of a Control IC for Vertical
Articulated Robot Arm using SOPC Technology,” in
Proceeding of 2005 IEEE International Conference
Acknowledgement on Mechatronics, pp. 532~536, 2005.
This work was supported by National Science Council of
the R.O.C. under grant no. NSC 94-2213-E-218-032.