Suppressing Power and

Ground Noise in High

Performance Consumer
Electronics

Panasonic Electronic Devices,

Co. Ltd
Hiroshi Higashitani
1
 Agenda
Suppressing Power and Ground Noise in High
Performance Consumer Electronics
– Reducing EMI/EMC problems early in the design cycle using a virtual design process has
been a dream for many engineers fettered with the problem of fixing complex coupling issues
on nearly finalized designs. However, the complexity of designs, the lack of tools, and an
under-appreciation for today’s compute power has limited the widespread adoption of
simulation in this area.
– Working together with Panasonic, Ansoft has created a reliable methodology that enables
virtual design for today’s complex EMI/EMC problems. The author will first discuss common
problems high speed board designers face when working to meet challenging noise and
performance specifications. Next, using a reference design board, attendees will witness
how to quickly and accurately predict and suppress board resonances. The design flow
proposed will illustrate how to use 3D extraction together with advance circuit simulation and
common EDA layout tools to pin-point the problems before the actual production of the
board. The insight provided by simulation will be highlighted, design changes that address
these issues will be made, and the new design will be re-simulated.
– Proper measurement techniques will be shown and discussed. Next, results that validate
the method and compare the simulated and measured results for the original design as well
as the improved design will be shown. Ample time will be allotted so that engineers wishing
to engage engineers from Panasonic and Ansoft directly can do so either during and/or after
the presentation.

2
 Main Products in PED
Electro-
Mechanical BU 部品 コン
機構 デン
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Components BU
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モ
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Inductive
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Board BU
 PED Device Solution
We
We provide
provide the
the best
best solution
solution !!!!
For
ForGood
GoodQuality
Quality&&Good
GoodPerformance
Performance SP-
SP-Cap

Radiation Noise
① Radiation noise Power
Supply
reduction

Power Choke Coil

Switching Loss

② Noise reduction
for Parallel data bus line
R,C,Bead-
R,C,Bead-Array &
RC-
RC-Network
Mounting Issue
(Area & Cost)

③High speed 2 Mode Noise Filter

differential transmission
Common & Normal
ESD Noise Common Mode Mode Noise
Chip Varistor
Noise Filter
ESD Suppressor
Common Mode
Noise 4
Interface
 LCR Main Product Line in PED
Smaller, High performance, and High Functionality
Solution
LCR Circuit Components

2 Mode Common Modeﾞ

Modeﾞ Circuit
EMI/ESD Chip Ｒ Chip Ｒ（Array
Ｒ（Array）
） ＲＣ Network Noise Filter Noise Filter Protection
Component
Solution
Solution

Chip L Chip Beads Chip Thermistor Chip Varistor LC Filter ZNR

Power
Solution
Solution
Current Sensor
Power Choke Coil Compression Coil Choke Coil SW Transformer Line Filter
R

Capacitors Chip Multilayer Ceramic C

（MLCC）
MLCC）
Ceramic C Aluminum electrolytic C
Solution
Solution

Electric Double Layer

SP-
SP-CAP Chip Film C Film C X-Y Condenser
Ｃ 5
 Noise, Thermal, and other Components
General and Source Components Noise Reduction Components

●Array Chip Resistor ●Inverter Transformer ●Chip RC Network

（Usage: Pull-up, etc.）
1005x4 Array Type 、8 Array Type
P/N:EXB28V､2HV 10 - 1M ohm
●Chip Resistor： Serge R
（Usage：High Power Chip R）
2012；1/4W、3216；1/3W、3225；
1/2W
P/N:ERJP06､P08､P14 1 - 1M ohm
●Multi-Layer Ceramic C
2012（4 Array）、 1410（2
Array）
P/N:ECJ Series
●Chip Choke Coil
（Usage：DC/DC Filter）
P/N:ELL6U*** Type
●Aluminum electrolytic capacitor
（Usage：AC/DC Voltage Supply）
For high ripple current
P/N:Snap-in terminal type EE series
（Usage： Back light）
●Source SW Transformer
（Usage：Resonator AC/DC）
P/N: （Under development）
●Film Capacitor
（Usage：AC/DC Input
Filter）
P/N:ECQUL***
（Usage:One packing of RC of
the data bus line. ）
2012 P/N:EZACT
●Common Mode Noise Filter
（Usage:IEEE1394/HDMI）
1210、2010 P/N:EXC24CG、
EXC28CE
●EMI/ESD Filter Tentative
（Usage: Digital Noise）
2012 EMI＋ESD Composit Function
●SP-Cap/Polymer Aluminum Capacitors
（Usage: De-coupling）
7343 P/N:CD、LL series
●Chip Multi-Layer Varistor
（Usage: Static electricity ）
1005､1608、1410/2連 P/N:EZJZ series
●Chip ESD Suppressor
（Usage：Static electricity /for GHz Band）
1005､1608 P/N:EZAEG**

Heat Resistance Components Protection Components

●PGS/Graphite seat for ●Micro Chip fuses
（Usage：High temperature conduction
LCD-TV
（Usage:In-rush current）
600～800W/m・K） 1005､1608 P/N:ERBSE､SD type
P/N:EYGA***
6
 Global production and R&D base list

PEDTJ

PTCC

PEDUK PEDBJ

PEDEU PEDCBJ

PEDQD
PEDEU-TC
● ● PEDCA
■
● PEDEU-SK
PEDHK ◆◆■◆ PEDCA-TC
■
◆ ●
PEDJM ● PED ● PEDCA-BC
●
●● ▲ ▲
PEDTH PTW PEDCA-TA
●

MAPREC ●●●
PMX
●
■●
PEDMA PACOB-AM
●
●
MEDEM ● Electronic part special producing company 16
▲ Part overseas production business place 2
PEDSG ◆ Joint venture company 4
■ R&D base 4
PEDSG-ST

PEDSG-BT

PEDIDA 7
 ＬＣＲ Solution on PED WEB Site

http://panasonic.co.jp/ped/

Device Library
・・・Ｄａｔａ Ｌｉｂｒａｒｙ
ｆｏｒ sｉｍｕｌａｔｉｏｎ

ｏｉｓｅ Ｓｕｐｐｒｅｓｓｉｏｎ Ｓｏｌｕｔｉｏｎｓ

・・・Device selection guide

ＳＭＤ Ｃａｐａｃｉｔｏｒ Ｓｅｌｅｃｔｉｏｎ Ｇｕｉｄｅ

・・・Device selection guide

8
 Purpose of Device Library
Customer/Set PED/Device
【Conventional】 【Current】 http://industrial.panasonic.com/i/library.html
Catalog retrieval Catalog retrieval on WEB
Simulator
High frequency circuit & system Device
design tool
Parameter
Sample order Circuit design(simulation)

S Parameter
Equivalent circuit model
Device selection
Shortening Please downloads from Web
and registers it as a component
Sample order on WEB for the simulator. 例） Capacitor

Circuit design and

Experimental
evaluation C ●Chip multi-layer
ceramic capacitors
Experimental ＜MLCC’s＞
evaluation （270 parts numbers）
Improvement of
design perfection
R ●Chip resistors
（186 parts numbers ）
Device selection Efficiency
improvement of
design L ●Chip inductors
（45 parts
Experimental numbers ）
evaluation
9
Circuit design process
Uploaded Devices on PED WEB Site
WEB http://industrial.panasonic.com/i/library.html
●Chip inductors （45 parts numbers ）

●Chip resistors （186 parts numbers ） Radiation noise

LS I
●Chip multi-layer ceramic capacitors （Load）
Load）
＜MLCC’s＞ （270 parts numbers）
New
Radiation noise
● SP-Cap/Polymer Aluminum Capacitors suppression
（19 parts numbers ） of power supply line.
Devices for EMI Devices for ESD
●Chip varistors
●LC-LR Composite Devices （24 parts numbers ）
（9 parts numbers ） New ●ESD Suppressor
（2 parts numbers ）
Connector
New
● 2 mode and Cable IC
Common
mode noise filter
（10 parts EMI and ESD suppression
numbers ） of
audio and video signal
line.

10
 Simulation analysis with substrate CAD data and Device Library
Evaluation block
cutting out

Material constant setting

Substrate CAD data

Electromagnetic field analysis

Circuit simulation
Simulation
block diagram Connector S parameter IC
of circuit board

Device Library Device Library

Common Chip varistors

mode Transmission
noise filter characteristic analysis ESD Suppressor

Simulation result Eye pattern analysis TDR analysis

11
 LCR solution activity flow
Development step of set circuit design Mass
Plan
Making production
Circuit design for trial purposes
Evaluation

Selection of the
Simulation best parts
Noise evaluation at EMC Site
Device selection and recommended Radiation obstruction Electromagnetic radiate Analysis by
pattern proposal wave measurement field immunity electromagnetic field
20
examination probe
Circuit simulation 0
S21(dB)
Ｉ
-20

-40

-60

-80

ｔ -100

V (Frequency analysis)
Source Ground
Resonance Analysis
ｔ
(Transient Radio
analysis) frequency
Conduction obstruction wave
voltage measurement conduction
obstruction
examination
1200

①Solution corresponding to design phase 1000

800

V olts (V )
600

（V）
②Total solution with a lot of devices
400

電圧
200
0
-200
-20 0 20 60 100 140 180
Tim es (nS ecs)
時間
（nSec）

12
 Simulation analysis tool and analytical routine
Circuit board data

Device Library
ＣＡＤ tool

ＣＡＤ data Zuken Convert Allegro PCB

ＣＡＤ・Design tool
gerber
anf file
Convert
DXF file
SI-Wave
gds file

Ansoft Designer(Planar EM) ALIVH-DK HFSS Ansoft Links DataLink

HFSS

S parameter / Co-simulation
Current distribution Radiation characteristic
and magnetic field distribution
Ansoft Designer and NEXXIM

Power supply resonance

Transmission characteristic
characteristic 13
１）TDR ２）Eye pattern
 LCR Solution
PassiveComponents
Passive Components

Noise Suppression
Components

14
 Emission Noise Reduction and DC Source Capacito

10pF 1nF 0.1uF 10uF 1mF 1F Capacitance (F)

Signal Line Source Line
Oscillation and Synchronization Backup
Time Constant Circuit Decoupling and Smoothing
Usage
Coupling, Bias

Smaller：0402 High Capacitor：100uF Miniaturization and lightening

MLCC

Component capacity stability no piezo-electric

Film
Selection Low ESL：GH Excellent decoupling
Polymer
ｚ
Low ESR Ripple
Aluminum electrolytic
（Example） Unnecessary radiation noise reduction
on Power supply line Electric Double
Rival zone High power・Rapid Layer Capacitor
electrical charge and
DC/DC LSI discharge

15
 Specialty Polymer Aluminum
Capacitor
(1)
150

Capacitance(uF)
- Smoothing
100
ripple
voltage SP-Cap
(7) - Less load Polymer Tantalum
50 fluctuation MLCC
■ A large capacity
(1)Mold resin (2)Silver paint Tantalum
■ Low ESR (3)Carbon (4)Specialty polymer
0
(5)Aluminum foil (6)Internal terminal 0.1 1 10 100 1000 10000

■ Low ESL (7)External terminal

Frequency(kHz)

High Frequency Impedance Characteristics

Polymer Tantalum Capacitor
15
(Ω)

SP-Cap/Polymer Aluminum Capacitors

ｲﾝﾋﾟｰﾀﾞﾝｽ(Ω)

10
Impedance

LINE LSI
DC/DC
5

ESR Operation
clock
Decoupling
0 ESL
0 200 400 600 800 1000
Capacitor Low Impedance
周波数(M Hz)
Frequency(MHz) with reduction of ESL

16
 Emission Noise Reduction for DC Source
Simulation Example (Frequency analysis)
LSI Simulation
１

4 pieces LSI

Aluminum electrolysis Characteristic of Insertion loss with each capacitor

（3） 20

＋3 terminal capacitor
decrease LSI 0
2
-20
2 pieces LSI
S21 (dB) １
1
SP-Cap、Ceramic C -40
3
LSI -60 2
3
-80
1 pieces LSI

-100
NEW SP-Cap（Low ESL）
100KHz 1MHz 10MHz 100MHz 1GHz 10GHz

17
Uploaded Devices on PED WEB Site
WEB http://industrial.panasonic.com/i/library.html
●Chip inductors （45 parts numbers ）

●Chip resistors （186 parts numbers ） Radiation noise

LS I
●Chip multi-layer ceramic capacitors （Load）
Load）
＜MLCC’s＞ （270 parts numbers）
New
Radiation noise
● SP-Cap/Polymer Aluminum Capacitors suppression
（19 parts numbers ） of power supply line.
Devices for EMI Devices for ESD
●Chip varistors
●LC-LR Composite Devices （24 parts numbers ）
（9 parts numbers ） New ●ESD Suppressor
（2 parts numbers ）
Connector
New
● 2 mode and Cable IC
Common
mode noise filter
（10 parts EMI and ESD suppression
numbers ） of
audio and video signal
line.

18
 Noise Reduction measure: DC Power
Line
Actual Measurements (Example：Emission
Measurements）
Actual Test
Level [dBµV/m]
Level [dBµV/m]
70
70
60
60
Before
50
50
40
40
30
30
20
20

10
10

00 30M 50M 70M 100M 200M 300M 500M 700M 1G

30M 50M 70M 100M 200M 300M 500M 700M 1G
Frequency [Hz]
Frequency [Hz]

70
After SP-Cap CD series 6V47uF x 3pcs
60
LIM EN 55013_field Voltage QP
50 Limit
40

30

20

10

0
30M 50M 70M 100M 200M 300M 500M 700M 1G19
Frequency [Hz]
 BMT Environment
• Hardware
– Note PC( For Model Verification correction ）
• CPU: IBM ThinkPADT42p Mobile Pentium 2.0GHz
• Memory: 2GB
• GPU: ATI FIREGL T2 128MB Memory
• Disk: 60GB

– Desk Top PC（For Analysis execution ）

• CPU: Dell Precidion PWS380 PentiumD 3.2GHz
• Memory 3.2GB
• GPU: NVIDIA QuadroFX540 128MB Memory
• Disk: 200 GB

• OS
– Windows XP Service Pack2
– Windows XP x64 Edition

• Software
– Ansoft links for Zuken / AnsoftLinks for Allegro
– SIwaveV3.1.1

20
 Power Integrity Analysis

• Power analysis is similar to Signal analysis

but models are traditionally much more
difficult to obtain
• PDS is coupled to Signal nets
• Results can be interpreted through SIwave
or a model exported for SSO, SSN
analysis

21
 PI Analysis Types

• Plane impedance
– Verify low impedance up to device cut-off frequency
• Decoupling solutions
– Verify capacitor placement and effectiveness
• Resonance modes
– Verify signal return path and power delivery
• Frequency sweep
– Verify maximum IR drop across frequencies
• Isolation
– Verify analog power supplies do not affect digital

22
 Target Impedance of PDS
I
High-Speed Power
Digital Device
V Delivery System
V
Z =
I
1. The Impedance looks into PDS at the device should be kept low over a broad
frequency range (from DC to package cut-off frequency)!
2. The Desired Frequency Range and Impedance Value is called Target
Impedance.
3. Target impedance goal is set with the help of allowable ripple on the
power/ground plane over a specified frequency range.

Mag. of Z

Z target
|Z|

f 23
 Target Impedance Calculation

ZTarget =
(Power _ Supply _ Voltage) × (Allowed _ Ripple )
Current

Example:
4A 2A
3.3v
VRM 3.3v plane

ZTarget(3.3v) =
(3.3v ) × (5%) = 82.5mΩ
2A

Target Impendence is the goal that designer should hit !!!

24
 Components of Z
• Impedance consists of
– Capacitive factor, decreases with frequency
1
2πf C – Inductive factor, increases with frequency
– Inductance includes plane inductance, ESL of decoupling
2πf L capacitors, traces and vias which connect planes to
capacitors

Capacitive
Capacitive Inductive
Inductive
Mag. of Z area area
area area

Z target
|Z|

Bulk
Bulk
Capacitance
Capacitance f

25
 Decoupling Capacitors

Z Lower the impedance of the power delivery

system and prevent energy transference from
one circuit to another
Z Supply current bursts for fast switching circuit
Z Provide AC connection between power and
ground planes for signal return current
Z Control EMI

26
 Capacitor Considerations

• Values are important

– Different values affect different frequencies
• Real Capacitors are non-ideal
– Need to include frequency dependent ESR,
ESL
• Location is important
– Spreading inductance limits area of
effectiveness

27
IC Evaluation Board （Source Ground Resonance Analysis）

Noise of IC output

ＣＯＮＤ_1 ＣＯＮＤ_2 ＣＯＮＤ_3 ＣＯＮＤ_4 ＣＯＮＤ_5

Check Layer Structure before resonant analysis.

GND,SVSS,AVSS
Power Plane Layer is COND_7
Multi Layer makes low Frequency Resonant

28
ＣＯＮＤ_6 ＣＯＮＤ_7 ＣＯＮＤ_8
IC Evaluation Board: Source Resonance Analysis System

Board Resonance Analysis Setting Analysis Ports

Power supply Plane(L7)
5V PORT1

Power supply Plane(L7)

2.9V
PORT2
PORT4 PORT5
PORT3 PORT6

Filter Filter Filter Filter Filter

PORT10 PORT11 PORT12 PORT13

PORT7
PORT14

S Parameter PORT8 Filter

Board IC
S parameter Equivalent Model
PORT9
PORT15

IC SPICE Simulator

29
 Virtual noise analysis system
Before Noise Measure After Noise Measure
Board Resonance Analysis Board Resonance Analysis

Impedance control
with capacitor or
power supply plane
modification

MLCC SP-Cap

Before After
Board Board S Parameter
S Parameter
S parameter S Paramter Equivalent Model
Equivalent Model

Virtual
Virtualanalysis
analysissystem
system
With
With substrate dataand
substrate data and
Device Library
Device Library

IC SPICE Simulator IC SPIC Simulator

184MHz
138MHz 184MHz
Noise 92MHz Noise reduction Noise 138MHz
92MHz

30
 Resonant Analysis: Eigen value Analysis
• Form of a substrate -> it resonates as an parallel
monotonous antenna The Rule Of Sum
Board Size is 150mmx140mm
Calculate….
• m=1:n=0
– 477MHz
• m=0:n=1
Resonance frequency – 511MHz
2 2
• m=1:n=1
c0 ⎛m⎞ ⎛n⎞
fc = ⎜ ⎟ +⎜ ⎟ – 699MHz
2 εr ⎝ a ⎠ ⎝b⎠
:
fc : resonance frequency [Hz]
C0 : velocity of light 3.0x108[m/s] • Noise is aspired lower frequency
εr :dielectric constant
m , n : constant 0, 1, 2, and ...
a , b :substrate size [m]

31
 2 Layers Resonant Analysis
Source Corner
• 2 layer Resonant Analysis
– Eigen Mode Analysis
– Voltage Probe
V1
G2 Voltage Probe
V1_G2Right
Voltage Probe
X:190mm
V1_G2Under
Y: 50 mm
X:100mm
Y: 10 mm

200mm

Voltage Probe
V1_G2Upper
X:100mm
100mm Y: 90 mm
32
 Resonant Analysis: Eigen value Analysis
• Form of a substrate -> it resonates as an parallel
monotonous antenna The Rule Of Sum
Board Size is 200mmx100mm
Calculate….
• m=1:n=0
– 358MHz
Resonance frequency • m=0:n=1
2 2
– 715MHz
c0 ⎛m⎞ ⎛n⎞
fc = ⎜ ⎟ +⎜ ⎟ • m=1:n=1
2 εr ⎝ a ⎠ ⎝b⎠
– 800MHz
fc : resonance frequency [Hz]
8
C 0 : velocity of light 3.0x10 [m/s]
:
ε r :dielectric constant • Although approximation is
m , n : constant 0, 1, 2, and ...
a , b :substrate size [m]
possible, loss and board
thickness are not taken into
consideration.
33
 2 Layers Resonant Analysis
Source Corner
• Non Voltage Source

34
 Multi Layers Resonant Analysis

• Resonant Analysis
– 6 Plane layers
G1
G2
V3
G4
V5
G6

200mm

100mm

35
 Multi Layers Resonant Analysis

• 1st Resonant is Lower Frequency

– 105.4 MHz

105.4MHz < 358Mhz!

Different!

Resonant is different
by the numbers of
Power/GND layers.

36
 SIwave Concept of Source/Ground Bounce
SIwave Generated S-parameter

Vref
V
IC

Virtual True Ground

V SIwave S-parameters include all
the complex interference of the
S
Source/Ground and signal lines.

Complex Interference
Thus the any excitation between
the source/round is observable at
probe any points.
37
 SIwave Concept of Source/Ground Bounce

VDD

P-MOS

N-MOS

GND
The area of simultaneous ON

When the Timing is Changing ON with P-MOS and N-MOS,

It make simultaneous ON situation.
Thus we need to consider the both of input Low and High
impedance in EMI analysis.

38
 Voltage Source Resistance
50 Ohm vs 0.05Ohm
• 2 layer Resonant Analysis
– Eigen Mode Analysis
– Voltage Source
• 1V/50 Ohm vs 1V/0.05Ohm

V1
G2 Voltage Probe
V1_G2Right
Voltage Probe
X:190mm
V1_G2Under
Y: 50 mm
X:100mm
Y: 10 mm

200mm

Voltage Probe
V1_G2Upper
X:100mm
100mm Y: 90 mm

39
 2 Layers Resonant Analysis
Source Corner
• 2 layer Resonant Analysis
– Calculate S-,Z- Parameter

V1
G2

200mm

100mm

40
 2 Layers Resonant Analysis
Source Corner
• S para and Z Plot

41
Far Field plot by Voltage Source
Resistance 50Ohm vs 0.05Ohm
• Voltage Source Resistance

50 Ohm 0.05 Ohm

42
 Frequency Sweep
• Voltage Source:1V/50 Ohm

43
 IC Power supply I/F IC602

PowerPlane(L7) REG
+ 5V + +
PORT1

PowerPlane(L7)
2.9V

PORT2 PORT3 PORT4 PORT5 PORT6

+ + + + +

PORT10 PORT12 PORT13

PORT11
PORT7

PORT14

PORT8

IC +

PORT9 PORT15

※部品配置はL1（表層）、L8 44
 Picture scanning line synchronized
Signal1,SIgnal2 I/F
PORT1

PORT2
PORT4 Connector
PORT3
Signal1 Signal1 PORT5
PORT7

Signal1
IC Buffer Signal2
IC PORT6
Signal2
PORT11
Signal2
Signal1
PORT9
Signal2
PORT10
Signal1 PORT12
PORT8
Signal2

45
 Proposed Noise Reduction Method
IC PORT Setting (Power supply PIN) IC PIN Layout
PORT11
Signal2 Signal2 PORT10

PORT7
PORT8
Signal1 PORT9

Signal1

PORT13

PORT15

PORT12

Analyzed S parameter
46
 IC Evaluation Board: Source Resonance Analysis
Voltage Source:0.05,5,50 Ohm
Frequency Sweep 1V
10MHz~200MHz
• Voltage Source:50 Ohm Linearly 50 points
L7-L8 Layers
Time:19min 40 sec

Signal1

138MHz

92MHz 184MHz
47
 Impedance Analysis
10MHz~200MHz at SignalPort1-1

92MHz 138MHz 184MHz

48
 IC Evaluation Board: Source Resonance Analysis
Frequency Sweep
• Voltage Source:0.05 Ohm

Signal1

138MHz

92MHz 184MHz
49
 Calculate the Min Capacitance
CAPARRAY_1 C (F) L (H) R (Ohm)
C1-C22 (22ea) 1.00E-07 2.00E-09 0.2

Contribute 2.2uF

1.9uF

∆I
Cmim @ 1MHz = = 1.929e − 06F
2πf∆V
∆I = 2A
∆V = 3.3 × 0.05
f = 1MHz

50
 Choose Effective Capacitors

Choose
capacitor with
desired SRF
from SIwave’s
vendor Library

Capacitor plots
are actual vendor
measurements 1.5pF
which include 1.2 nF
ESR and ESL 10 nF .15nF
effects
51
 Effect of ESL

Capacitor1 Capacitor2 Capacitor3

C 1nF 1nF 1nF
ESR 100mOhm 100mOhm 100mOhm
ESL 0.1nH 0.5nH 1nH

Decreased ESL
shifts SRF higher
in frequency

52
 Effect of ESR

Decreased ESR
shifts SRF lower
in magnitude
Capacitor1 Capacitor2 Capacitor3
C 1nF 1nF 1nF
ESR 10mOhm 100mOhm 200mOhm
ESL 1nH 1nH 1nH

53
 Decoupling Strategy

Bare PCB
Verify the
effectiveness of
Z11

your selection
and placement
through Z plots
With Capacitors

54
 Resonance Simulation
• Scans entire PCB/PKG on all layers
• Eigen mode analysis identifies location and
frequency of natural cavity resonances that
exist between planes
• If a resonance is excited, Signal Integrity
can be compromised: High Z, null in S21,
EMI etc.
• Resonances should be moved away from
critical parts and outside operating
frequency

55
 Reducing Resonance

Resonances always exist but

you can reduce their impact by:

• Changing the decoupling scheme

• Changing the stackup
• Changing plane dimensions
• Adding via stitching
• Moving discrete parts

56
Evaluate of Capacitor Placement

57
Evaluate of Capacitor Placement

58
Evaluate of Capacitor Placement

59
 Evaluating Capacitor
Placement
• Impedance Plot :No Capacitor

60
Evaluating Capacitor
Placement

61
Evaluating Capacitor
Placement

62
Evaluating Capacitor
Placement

63
Evaluating Capacitor
Placement

64
Evaluating Capacitor
Placement

65
Evaluating Capacitor
Placement

66
Evaluating Capacitor
Placement

67
Evaluating Capacitor
Placement

C28

C27
C23A
C26 C25 C24

68
Source Ground Resonance Noise Measure
(MLCC 6 Components)

C28
ECJ1VC1H471J
(470pF)
C9
(3300pF)

Power Plane (2.9V)

C27 C24
ECJ1VC1H221J (1000pF)
(220pF) C26 C25
(2200pF) (1500pF)

69
Capacitor Performance

MLCC

Simulation model
estimating low ESL

70
 Source Ground Resonance
with different Capacitors
Before: without Capacitors After with 6 Capacitors
MLCC（6 Components ）

Impedances

Far Field

71
 Impedance Plot of different Capacitor
Z Plot (<1GHz)
Original

MLCC（6 Components ）

Simulation model（PED)

Good!! 1 Components
72
Far Field Emission Plot for different Cap Parts
Original

MLCC（6 Components ）

Simulation model(PED)

Good!! 1 Components

73
Comparison of surface voltage distribution
Original when frequency is swept

MLCC（6 Components ）

Simulation model(PED)

Good!! 1 Components

74
 Conclusion
• Panasonic has adapted Ansoft SIwave
solution to nail down the expected problem
before the actual board production.
• This seminar is showing the typical steps to
reduce the unnecessary noise caused by
Source and Ground bounce.
• By the use of Ansoft SIwave, Panasonic is
not just making robust board, but also to
improve their components to be best suited
for the noise reduction and emission from
the board,

75