TS472

Very low noise microphone preamplifier with

2.0 V bias output and active low standby mode

Features Flip-chip - 12 bumps

■ Low noise: 10 nV/√Hz typ. equivalent input
noise at F = 1 kHz
■ Fully-differential input/output
■ 2.2 to 5.5 V single supply operation
■ Low power consumption at 20 dB: 1.8 mA
■ Fast start up time at 0 dB: 5 ms typ. Pin connections (top view)
■ Low distortion: 0.1% typ.
■ 40 kHz bandwidth regardless of the gain
■ Active low standby mode function (1 μA max)
■ Low noise 2.0 V microphone bias output
■ Available in flip-chip lead-free package and in
QFN24 4 x 4 mm package
■ ESD protection (2 kV)

Applications
QFN24
■ Video and photo cameras with sound input
■ Sound acquisition and voice recognition
■ Video conference systems
■ Notebook computers and PDAs
Pin connections (top view)
Description
NC NC GND STBY VCC NC
The TS472 is a differential-input microphone
preamplifier optimized for high-performance PDA 24 23 22 21 20 19

and notebook audio systems. NC 1 18 NC

This device features an adjustable gain from 0 to BYP 2 17 OUT+

40 dB with excellent power-supply and common-
NC 3 16 OUT-
mode rejection ratios. In addition, the TS472 has
a very low noise microphone bias generator of GND 4 15 C2

2 V. IN- 5 14 C1

It also includes a complete shutdown function, NC 6 13 NC

with active low standby mode.
7 8 9 10 11 12

NC IN+ GS BIAS NC NC

August 2009 Doc ID 11015 Rev 6 1/25

www.st.com 25
Contents TS472

Contents

1 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1 Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.2 Higher cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.3 Lower cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.4 Low-noise microphone bias source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.5 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.6 Wake-up time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.7 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.8 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.9 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.10 Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1 Flip-chip package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.2 QFN24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2/25 Doc ID 11015 Rev 6

TS472 Typical application schematic

1 Typical application schematic

Figure 1 shows a typical application schematic for the TS472.

Figure 1. Application schematic (flip-chip)

Optional

C1
VCC

Cs
1uF C2

C3 Rpos
1uF U1 TS472_FC
Vcc

C1
C2
Cout+ Rout+
Cin+
IN+ OUT+
Positive Output
+
IN- OUT-
Negative Output
Electret Mic Cin- Cout- Rout-
GAIN
Rneg
SELECT
G

BIAS BYPASS
Bias
2.0V
Cb
STDBY

1uF
GND

Standby Control

Table 1. Description of external components

Components Functional description

Input coupling capacitors that block the DC voltage at the amplifier input
Cin+, Cin-
terminal.
Output coupling capacitors that block the DC voltage coming from the
Cout+, Cout- amplifier output terminal (pins C2 and D2) and determine the lower cut-off
frequency (see Section 4.3: Lower cut-off frequency).
Output load resistors used to charge the output coupling capacitors Cout.
Rout+, Rout- These output resistors can be represented by an input impedance of a
following stage.
Rpos, Rneg Polarizing resistors for biasing of a microphone.
Cs Supply bypass capacitor that provides power supply filtering.
Cb Bypass pin capacitor that provides half-supply filtering.
C1, C2 Low pass filter capacitors allowing to cut the high frequency.
C3 Bias output filtering capacitor.

Doc ID 11015 Rev 6 3/25

Typical application schematic TS472

Table 2. Pin descriptions

Flip-chip QFN
Pin name Pin description
designator designator

IN+ A1 8 Positive differential input

IN- B1 5 Negative differential input
BIAS A2 10 2 V bias output
GND C1 4, 22 Ground
STBY C3 21 Standby
BYP D1 2 Bypass
GS B2 9 Gain select
OUT- D2 16 Negative differential output
OUT+ C2 17 Positive differential output
C1 A3 14 Low-pass filter capacitor
C2 B3 15 Low-pass filter capacitor
Vcc D3 20 Power supply
3, 6, 7, 11,
NC --- 12, 13, 18, Not connected, floating pins
19, 23, 24

4/25 Doc ID 11015 Rev 6

TS472 Absolute maximum ratings

2 Absolute maximum ratings

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

VCC Supply voltage (1) 6 V

Vi Input voltage -0.3 to VCC+0.3 V
Toper Operating free air temperature range -40 to + 85 °C
Tstg Storage temperature -65 to +150 °C
Tj Maximum junction temperature 150 °C
Thermal resistance junction to ambient:
180
Rthja Flip-chip °C/W
110
QFN24
ESD Human body model 2 kV
ESD Machine model 200 V
Lead temperature (soldering, 10sec) 250 °C
1. All voltage values are measured with respect to the ground pin.

Table 4. Operating conditions

Symbol Parameter Value Unit

VCC Supply voltage 2.2 to 5.5 V

Typical differential gain
A 20 dB
(GS connected to 4.7 kΩ or bias)
Standby voltage input:
VSTBY Device ON 1.5 ≤VSTBY ≤VCC V
Device OFF GND ≤VSTBY ≤0.4

Top Operational free air temperature range -40 to +85 °C

Thermal resistance junction to ambient:
150
Rthja Flip-chip °C/W
60
QFN24

Doc ID 11015 Rev 6 5/25

Electrical characteristics TS472

3 Electrical characteristics

Table 5. Electrical characteristics at VCC = 3 V with GND = 0 V, Tamb = 25° C

(unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit

Equivalent input noise voltage density nV

en 10 ------------
REQ = 100 Ω at 1 kHz Hz

Total harmonic distortion + noise

THD+N 0.1 %
20 Hz ≤F ≤ 20 kHz, gain = 20 dB, Vin = 50 mVRMS
Vin Input voltage, gain = 20 dB 10 70 mVRMS
Bandwidth at -3 dB 40
BW Bandwidth at -1 dB 20 kHz
pin A3, B3 floating
Overall output voltage gain (Rgs variable):
G Minimum gain, Rgs infinite -3 -1.5 0 dB
Maximum gain, Rgs = 0 39.5 41 42.5
Zin Input impedance referred to GND 80 100 120 kΩ
RLOAD Resistive load 10 kΩ
CLOAD Capacitive load 100 pF
ICC Supply current, gain = 20 dB 1.8 2.4 mA
ISTBY Standby current 1 μA
Power supply rejection ratio, gain = 20 dB,
F = 217 Hz, Vripple = 200 mVpp, inputs grounded
PSRR dB
Differential output -70
Single-ended outputs, -46

Table 6. Bias output: VCC = 3 V, GND = 0 V, Tamb = 25° C

(unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit

Vout No load condition 1.9 2 2.1 V

Rout Output resistance 80 100 120 W
Iout Output bias current 2 mA
Power supply rejection ratio, F = 217 Hz,
PSRR 70 80 dB
Vripple = 200 mVpp

6/25 Doc ID 11015 Rev 6

TS472 Electrical characteristics

Table 7. Differential RMS noise voltage

Input referred noise voltage Output noise voltage
Gain (μVRMS) (μVRMS)
(dB)
Unweighted filter A-weighted filter Unweighted filter A-weighted filter

0 15 10 15 10
20 3.4 2.3 34 23
40 1.4 0.9 141 91

Table 8. Bias output RMS noise voltage

C3(1) Unweighted filter A-weighted filter
(μF) (μVRMS) (μVRMS)

1 5 4.4
10 2.2 1.2
1. Bias output filtering capacitor.

Table 9. SNR (signal to noise ratio), THD+N < 0.5%

Unweighted filter 20 Hz - 20 kHz A-weighted filter
Gain (dB) (dB)
(dB)
VCC = 2.2 V VCC = 3 V VCC = 5.5 V VCC = 2.2 V VCC = 3 V VCC = 5.5 V

0 75 76 76 79 80 80
20 82 83 83 89 90 90
40 70 72 74 80 82 84

Doc ID 11015 Rev 6 7/25

Electrical characteristics TS472

Figure 2. Current consumption vs. power Figure 3. Current consumption vs. power
supply voltage supply voltage

3.0 3.0

2.5 2.5
Current Consumption (mA)

Current Consumption (mA)

Tamb=85°C Tamb=85°C
2.0 2.0

Tamb=25°C Tamb=25°C
1.5 1.5

1.0 Tamb=-40°C 1.0 Tamb=-40°C

0.5 0.5
No Loads No Loads
GS floating GS grounded
0.0 0.0
0 1 2 3 4 5 6 0 1 2 3 4 5 6
Power Supply Voltage (V) Power Supply Voltage (V)

Figure 4. Current consumption vs. standby Figure 5. Current consumption vs. standby
voltage voltage

2.5 2.5

2.0 2.0
Current Consumption (mA)

Current Consumption (mA)

1.5 1.5 Vcc=3V Vcc=5V

Vcc=3V Vcc=5V

1.0 1.0

0.5 No Loads 0.5 No Loads

GS floating GS grounded
Tamb = 25°C Tamb = 25°C
0.0 0.0
0 1 2 3 4 5 0 1 2 3 4 5
Standby Voltage (V) Standby Voltage (V)

Figure 6. Standby threshold voltage vs. Figure 7. Frequency response

power supply voltage

1.0 30
Cb=1μ F, T AMB =25° C, Gain=20dB, Rout=100k Ω
Standby Treshold Voltage (V)

0.8 20
PSRR (dB)

0.6 10 no C1,C2

0.4 0 C1,C2=100pF
Cin,Cout=100nF

0.2 -10 C1,C2=220pF

No Loads Cin,Cout=10nF
Tamb = 25°C
0.0 -20
2.2 3 4 5 5.5 10 100 1000 10000 100000
Power Supply Voltage (V) Frequency (Hz)

8/25 Doc ID 11015 Rev 6

TS472 Electrical characteristics

Figure 8. Bias output voltage vs. bias output Figure 9. Bias output voltage vs. power
current supply voltage

2.2 2.2
Vcc=2.5-6V Tamb=25°C
Ibias=0mA

2.0

Bias Output Voltage (V)

2.0
Bias Output Voltage (V)

Tamb=85°C

Ibias=2mA

1.8 1.8

Ibias=4mA
1.6 Tamb=-40°C 1.6

Tamb=25°C
1.4 1.4
0 1 2 3 4 2.2 3 4 5 5.5
Bias Output Current (mA) Power Supply Voltage (V)

Figure 10. Bias PSRR vs. frequency Figure 11. Bias PSRR vs. frequency

0 0
Vripple=200mVpp Vripple=200mVpp
Vcc=3V Vcc=5V
-20 Cb=1 μ F -20 Cb=1 μ F
Tamb =25 ° C Tamb=25 ° C
PSRR (dB)
PSRR (dB)

-40 -40 Bias = 1k Ω to GND

Bias floating or 1k Ω to GND

-60 -60

-80 -80

Bias floating
-100 -100
50 100 1000 10000 20k 50 100 1000 10000 20k
Frequency (Hz) Frequency (Hz)

Figure 12. Differential output PSRR vs. Figure 13. Differential output PSRR vs.
frequency frequency

0 0
Vripple=200mVpp Vripple=200mVpp
-10 Inputs grounded -10 Inputs grounded
Vcc=3V Vcc=5V
-20 Cb=1 μ F -20 Cb=1 μ F
Cin=100nF Cin=100nF
PSRR (dB)

PSRR (dB)

-30 Tamb=25 ° C -30 Tamb=25 ° C

-40 GS grounded -40 GS grounded GS=bias

GS=bias
-50 GS floating -50 GS floating

-60 -60

-70 -70

-80 -80
50 100 1000 10000 20k 50 100 1000 10000 20k
Frequency (Hz) Frequency (Hz)

Doc ID 11015 Rev 6 9/25

Electrical characteristics TS472

Figure 14. Differential output PSRR vs. Figure 15. Differential output PSRR vs.
frequency frequency

0 0
V RIPPLE =200mV PP , Inputs grounded V RIPPLE =200mV PP, Inputs grounded
V CC =3V, Minimum Gain, Cin=1 μ F, T AMB =25° C V CC =3V, Gain=20dB, Cin=1 μ F, T AMB =25° C
-20 -20
PSRR (dB)

PSRR (dB)
-40 -40
Cb=1μ F
Cb=1μ F
Cb=100nF No Cb
No Cb
-60 -60

-80 -80

Cb=100nF
-100 -100
50 100 1k 10k 20k 50 100 1k 10k 20k
Frequency (Hz) Frequency (Hz)

Figure 16. Single-ended output PSRR vs. Figure 17. Equivalent input noise voltage
frequency density

0 1000
Vripple=200mVpp
Cin=100nF
-10 Inputs grounded
R EQ=100 Ω
Cb=1μ F Vcc=3V
-20 Cin=100nF T AMB =25 ° C
Tamb=25° C 100
en (nV/√ Hz)

-30
PSRR (dB)

-40

-50
10
-60

-70
Vcc=2.2V Vcc=5V
-80 1
50 100 1000 10000 20k 10 100 1k 10k 100k
Frequency (Hz) Frequency (Hz)

Figure 18. Δgain vs. power supply voltage Figure 19. Δgain vs. ambient temperature

1.0 0.50
F=1kHz F=1kHz
0.8 Vin=5mV V IN =5mV
Maximum Gain 0.25
Tamb=25°C
0.6
0.00
Δ Gain (dB)

Δ Gain (dB)

0.4
-0.25
0.2 Maximum Gain
-0.50
0.0 Gain=20dB
Minimum Gain
-0.2 -0.75
Gain=20dB Minimum Gain

-0.4 -1.00
2.2 3 4 5 5.5 -40 -20 0 20 40 60 80
Power Supply Voltage (V) Ambient Temperature (°C)

10/25 Doc ID 11015 Rev 6

TS472 Electrical characteristics

Figure 20. Maximum input voltage vs. gain, Figure 21. Maximum input voltage vs. power
THD+N<1% supply voltage, THD+N<1%

150
140 T AMB =25°C, F=1kHz, THD+N<1% Gain=0dB
T AMB =25°C
Maximum Input Voltage (mVRMS)

Maximum Input Voltage (mVRMS)

V CC=5.5V
F=1kHz 120
THD+N<1%

100 100

80

60
50 Gain=30dB Gain=20dB
40 Gain=40dB
V CC =3V

V CC =2.2V 20

0 0
0 10 20 30 40 2.2 3 4 5 5.5
Gain (dB) Power Supply Voltage (V)

Figure 22. THD+N vs. input voltage Figure 23. THD+N vs. input voltage

10 10

GS floating GS floating

GS=bias
GS=bias
1 1
THD+N (%)

THD+N (%)

0.1 0.1

GS grounded GS grounded

Tamb=25°C, Vcc=3V, F=100Hz, Tamb=25°C, Vcc=5V, F=100Hz,

0.01 Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz 0.01 Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz

1E-3 0.01 0.1 0.3 1E-3 0.01 0.1 0.3

Input Voltage (V) Input Voltage (V)

Figure 24. THD+N vs. input voltage Figure 25. THD+N vs. input voltage

10 10
GS floating GS floating

GS=bias GS=bias
1 1
THD+N (%)

THD+N (%)

0.1 0.1

GS grounded GS grounded

Tamb=25°C, Vcc=3V, F=1kHz, Tamb=25°C, Vcc=5V, F=1kHz,

0.01 Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz 0.01 Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz

1E-3 0.01 0.1 0.3 1E-3 0.01 0.1 0.3

Input Voltage (V) Input Voltage (V)

Doc ID 11015 Rev 6 11/25

Electrical characteristics TS472

Figure 26. THD+N vs. input voltage Figure 27. THD+N vs. input voltage

10 10
GS floating GS floating
GS=bias GS grounded
1 1
THD+N (%)

THD+N (%)
GS=bias

0.1 0.1

GS grounded

Tamb=25°C, Vcc=3V, F=20kHz, Tamb=25°C, Vcc=5V, F=20kHz,

0.01 0.01 Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz
Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz

1E-3 0.01 0.1 0.3 1E-3 0.01 0.1 0.3

Input Voltage (V) Input Voltage (V)

Figure 28. THD+N vs. frequency Figure 29. THD+N vs. frequency

10 10
Tamb=25°C Tamb=25 ° C
Vcc=3V Vcc=5V
GS=bias, Vin=100mV
RL=10k Ω RL=10k Ω
Cb=1 μ F Cb=1 μ F
BW=100Hz-120kHz BW=100Hz-120kHz GS=bias, Vin=100mV
THD + N (%)

THD + N (%)

GS grounded, Vin=20mV
1 1 GS grounded, Vin=20mV

GS floating, Vin=100mV GS floating, Vin=100mV

0.1 0.1
50 100 1000 10000 20k 50 100 1000 10000 20k
Frequency (Hz) Frequency (Hz)

Figure 30. Transient response Figure 31. Common mode rejection ratio
(CMRR) vs frequency

0
Δ Vicm=200mVpp, V CC=3V
C IN =1μ F, T AMB=25°C
-20

Maximum Gain
CMRR (dB)

-40
Gain=20dB
Minimum Gain
-60

-80

-100
20 100 1k 10k 20k
Frequency (Hz)

12/25 Doc ID 11015 Rev 6

TS472 Application information

4 Application information

4.1 Differential configuration principle

The TS472 is a fully-differential input/output microphone preamplifier. The TS472 also
includes a common-mode feedback loop that controls the output bias value to average it at
VCC/2. This allows the device to always have a maximum output voltage swing, and by
consequence, maximize the input dynamic voltage range.
The advantages of a fully-differential amplifier are:
● Very high PSRR (power supply rejection ratio).
● High common mode noise rejection.
● In theory, the filtering of the internal bias by an external bypass capacitor is not
necessary. However, to reach maximum performance in all tolerance situations, it is
better to keep this option.

4.2 Higher cut-off frequency

The higher cut-off frequency FCH of the microphone preamplifier depends on the external
capacitors C1, C2.
TS472 has an internal first order low-pass filter (R = 40 kΩ, C = 100 pF) to limit the highest
cut-off frequency on 40 kHz (with a 3 dB attenuation). By connecting C1, C2 you can
decrease FCH by applying the following formula.
1
F CH = ---------------------------------------------------------------------------------------------
-
3 – 12
2π ⋅ 40 × 10 ⋅ ( C 1, 2 + 100 × 10 )

Figure 32 represents the higher cut-off frequency in Hz versus the value of the output
capacitors C1, C2 in nF.

Figure 32. Higher cut-off frequency vs. output capacitors

40
Higher Cut-off Frequency (kHz)

10

1
200 400 600 800 1000
C1, C2 (pF)

For example, FCH is almost 20 kHz with C1,2 = 100 pF.

Doc ID 11015 Rev 6 13/25

Application information TS472

4.3 Lower cut-off frequency

The lower cut-off frequency FCL of the microphone preamplifier depends on the input
capacitors Cin and output capacitors Cout. These input and output capacitors are mandatory
in an application because of DC voltage blocking.
The input capacitors Cin in series with the input impedance of the TS472 (100 kΩ) are
equivalent to a first order high-pass filter. Assuming that FCL is the lowest frequency to be
amplified (with a 3 dB attenuation), the minimum value of Cin is:

1
C in = ------------------------------------------------------
3
2π ⋅ F CL ⋅ 100 × 10

The capacitors Cout in series with the output resistors Rout (or an input impedance of the
next stage) are also equivalent to a first order high-pass filter. Assuming that FCL is the
lowest frequency to be amplified (with a 3 dB attenuation), the minimum value of Cout is:

1
C out = ------------------------------------------
-
2π ⋅ F CL ⋅ R out

Figure 33. Lower cut-off frequency vs. input Figure 34. Lower cut-off frequency vs. output
capacitors capacitors
1000 1000

ZinMAX Rout=10kΩ
Lower Cut-off frequency (Hz)

Lower Cut-off frequency (Hz)

Typical Zin

100 100

ZinMIN
Rout=100kΩ

10 10
1 10 100 1 10 100 1000
Cin (nF) Cout (nF)

Figure 33 and Figure 34 give directly the lower cut-off frequency (with 3 dB attenuation)
versus the value of the input or output capacitors.
Note: If FCL is kept the same for calculation purposes, take into account that the 1st order high-
pass filter on the input and the 1st order high-pass filter on the output create a 2nd order
high-pass filter in the audio signal path with an attenuation of 6 dB on FCL and a roll-off of
40 dB/decade.

4.4 Low-noise microphone bias source

The TS472 provides a very low noise voltage and power supply rejection BIAS source
designed for biasing an electret condenser microphone cartridge. The BIAS output is
typically set at 2.0 VDC (no load conditions), and can typically source 2 mA with respect to
drop-out, determined by the internal 100 Ω resistance (for detailed load regulation curves
see Figure 8).

14/25 Doc ID 11015 Rev 6

TS472 Application information

4.5 Gain settings

The gain in the application depends mainly on:
● the sensitivity of the microphone,
● the distance to the microphone,
● the audio level of the sound,
● the desired output level.
The sensitivity of the microphone is generally expressed in dB/Pa, referenced to 1 V/Pa. For
example, the microphone used in testing had an output voltage of 6.3 mV for a sound
pressure of 1 Pa (where Pa is the pressure unit, Pascal). Expressed in dB, the sensitivity is:
20Log(0.0063) = -44 dB/Pa
To facilitate the first approach, Table 10 gives voltages and gains used with a low-cost omni-
directional electret condenser microphone of -44 dB/Pa.

Table 10. Typical TS472 gain vs. distance to the microphone (sensitivity -44 dB/Pa)
Distance to microphone Microphone output voltage TS472 gain

1 cm 30 mVRMS 20
20 cm 3 mVRMS 100

The gain of the TS472 microphone preamplifier can be set as follows.

1. From -1.5 dB to 41 dB by connecting an external grounded resistor RGS to the GS pin.
This enables the gain to be adapted more precisely to each application.

Table 11. Selected gain vs. gain select resistor

Gain (dB) 0 10 20 30 40

RGS (Ω) 470k 27k 4k7 1k 68

Figure 35. Gain in dB vs. gain select resistor Figure 36. Gain in V/V vs. gain select resistor

50
Tamb=25 ° C Tamb=25 ° C
100
40

30
Gain (V/V)
Gain (dB)

20 10

10

0
1

-10
10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M
R GS (Ω ) R GS (Ω )

2. To 20 dB by applying VGS > 1VDC on the gain select (GS) pin. This setting can help to
reduce a number of external components in an application, because 2.0 VDC is
provided by the TS472 itself on the BIAS pin.

Doc ID 11015 Rev 6 15/25

Application information TS472

Figure 37 gives other values of the gain vs. voltage applied on the GS pin.

Figure 37. Gain vs. gain select voltage

40 Tamb=25° C

20

Gain (dB)
-20

-40

-60

-80
0 0.2 0.4 0.6 0.8 4 5
V GS (V )

Note: In the case of a single-ended output configuration (either positive or negative output is used
for the following signal processing) the overall gain is half. One must also take into account
that all advantages of the differential configuration principles are lost (see the difference in
PSRR in Table 5).

4.6 Wake-up time

When the standby mode is released to switch the device to ON, a signal appears on the
output a few microseconds later, and the bypass capacitor Cb is charged within a few
milliseconds. As Cb is directly linked to the bias of the amplifier, the bias will not work
properly until the Cb voltage is correct.
In a typical application, when a biased microphone is connected to the differential input via
the input capacitors (Cin), (and the output signal is in line with the specification), the wake-up
time will depend upon the values of the input capacitors Cin and the gain. When the gain is
lower than 0 dB, the wake-up time is determined only by the bypass capacitor Cb, as
described above. For a gain superior to 0 dB, refer to Figure 38.

Figure 38. Wake-up time in a typical application vs. input capacitors

60
Tamb = 25°C
Vcc=3V
50 Maximum Gain
Cb=1 μ F
Wake-up Time (ms)

40
Gain=20dB

30

20

10

0
20 40 60 80 100
Input capacitors C IN (nF)

16/25 Doc ID 11015 Rev 6

TS472 Application information

4.7 Standby mode

When the standby command is set, it takes a few microseconds to set the output stages
(differential outputs and 2.0 V bias output) to high impedance and the internal circuitry to
shutdown mode.

4.8 Layout considerations

The TS472 has sensitive pins to connect C1, C2 and Rgs. To obtain high power supply
rejection and low noise performance, it is mandatory that the layout track to these
components be as short as possible.
Decoupling capacitors on VCC and bypass pin are needed to eliminate power supply drops.
In addition, the capacitor location for the dedicated pin should be as close to the device as
possible.

4.9 Single-ended input configuration

It is possible to use the TS472 in a single-ended input configuration. The schematic in
Figure 39 provides an example of this type of configuration.

Figure 39. Typical single-ended input application

Optional

C1
VCC

Cs
1uF C2
D3

A3

B3

C3 Rpos
1uF U1 TS472
Vcc
C1
C2

Cout+ Rout+
Cin+
A1 IN+ OUT+ C2
Positive Output
+
B1 IN- OUT- D2
Negative Output
Electret Mic Cin- Cout- Rout-
GAIN
SELECT B2
G

A2 BIAS BYPASS D1
Bias
2.0V
Cb
STDBY

1uF
GND C1

C3

Standby Control

Doc ID 11015 Rev 6 17/25

Application information TS472

4.10 Demonstration board

A demonstration board for the TS472 is available. For more information about this
demonstration board, refer to application note AN2240 on www.st.com.

Figure 40. PCB top layer Figure 41. PCB bottom layer

Figure 42. Component location

18/25 Doc ID 11015 Rev 6

TS472 Package information

5 Package information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

5.1 Flip-chip package information

Figure 43. TS472 footprint recommendation
75µm min.
500μm 500μm 100μm max.
Φ=250μm
Track

Φ=400μm typ.
150μm min.
500μm

Φ=340μm min.
500μm

Non Solder mask opening

Pad in Cu 18μm with Flash NiAu (2-6μm, 0.2μm max.)

Figure 44. Pinout (top view)

3 C1 C2 STDBY VCC

OUTPUT
2 BIAS
GS OUT+ OUT-

IN+
1 IN- GND BYPASS

A B C D
Balls are underneath

Doc ID 11015 Rev 6 19/25

Package information TS472

Figure 45. Marking (top view)

■ ST logo E

■ Part number: 472

■ E Lead free bumps
■ Three digits datecode: YWW 472

■ The dot indicates pin A1 YWW

Figure 46. Flip-chip - 12 bumps

2.1 mm
● Die size: 2.1 mm x 1.6 mm ± 30 µm
● Die height (including bumps): 600 µm
1.6 mm ● Bumps diameter: 315 µm ±50 µm
0.5mm ● Bump diameter before reflow: 300 µm
±10 µm
● Bump height: 250 µm ±40 µm
0.5mm
∅ 0.315mm
● Die height: 350 µm ±20 µm
● Pitch: 500 µm ±50 µm
600µm
● Coplanarity: 50 µm max

Figure 47. Tape & reel specification (top view)

4 1.5

1 1

A A
Die size Y + 70µm

Die size X + 70µm

4

All dimensions are in mm

User direction of feed

20/25 Doc ID 11015 Rev 6

TS472 Package information

5.2 QFN24 package information

Figure 48. QFN24 package mechanical drawing
D
A

A1
D1

A2
Nd

0.50 DIA. 1

2
3
E1 E

Ne

0
P
b
D2

SEATING Q 1
PLANE
2
3
E2

Doc ID 11015 Rev 6 21/25

Package information TS472

Table 12. QFN24 package mechanical data

Dimensions

Ref. Millimeters Inches

Min. Typ. Max. Min. Typ. Max.

A 0.80 1.00 0.031 0.040

A1 0.05 0.002
A2 0.65 0.80 0.026 0.031
D 4.00 0.158
D1 3.75 0.148
E 4.00 0.158
E1 3.75 0.148
P 0.24 0.42 0.60 0.009 0.017 0.024
R 0.13 0.17 0.23 0.005 0.007 0.009
e 0.50 0.020
N 24.00 0.945
Nd 6.00 0.236
Ne 6.00 0.236
L 0.30 0.40 0.50 0.012 0.016 0.020
b 0.18 0.30 0.007 0.012
Q 0.20 0.45 0.008 0.018
D2 1.95 2.10 2.25 0.077 0.083 0.089
E2 1.95 2.10 2.25 0.077 0.083 0.089
Ø 12°

22/25 Doc ID 11015 Rev 6

TS472 Ordering information

6 Ordering information

Table 13. Order codes

Temperature
Order code Package Packing Marking
range

TS472EIJT -40°C, +85°C Flip-chip Tape & reel 472

TS472IQT -40°C, +85°C QFN24 4x4mm Tape & reel K472

Doc ID 11015 Rev 6 23/25

Revision history TS472

7 Revision history

Table 14. Document revision history

Date Revision Changes

01-Jul-05 1 Initial release corresponding to product preview version.

01-Oct-05 2 First release of fully mature product datasheet.
Added single-ended input operation in Section 4: Application
01-Dec-05 3
information.
Added QFN package information. Updated curves, added new ones
12-Sep-2006 4
in Section 3: Electrical characteristics.
Corrected error on C1 and C2 caps.
02-Mar-2009 5 Added Table 2: Pin descriptions.
Updated QFN24 package information in Section 5.2.
25-Aug-2009 6 Corrected QFN package pinout on cover page.

24/25 Doc ID 11015 Rev 6

TS472

Please Read Carefully:

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.

UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.

Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.

ST and the ST logo are trademarks or registered trademarks of ST in various countries.

Information in this document supersedes and replaces all information previously supplied.

The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.

© 2009 STMicroelectronics - All rights reserved

STMicroelectronics group of companies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com

Doc ID 11015 Rev 6 25/25