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To execute a program the user enters its instructions in binary format into the memory. The
microprocessor then reads these instructions and whatever data is needed from memory, executes the
instructions and places the results either in memory or provides it on an output device.
To execute a program, the microprocessor “reads” each instruction from memory, “interprets” it, then
“executes” it. The microprocessor fetches each instruction, decodes it & then executes it. This sequence
is continued until all instructions are performed.
For this process it uses address bus & data buses. The address bus has 8 signal lines A8 –A15 which are
unidirectional. The other 8 address bits are multiplexed (time shared) with the 8 data bits. So, the bits
AD0 –AD7are bi-directional & and work as A0 –A7 & D0 –D7at the same time. During the execution of
the instruction, these lines carry the address bits during the early part, then during the later parts of the
execution, they carry the 8 data bits.
In order to separate the address from the data, we can use a latch to save the value before the function of
the bits changes. This is called as Demultiplexing AD7-AD0. Since, the AD7–AD0 lines are working as
dual purpose so they need to be demultiplexed to get all the information.
The high order bits of the address remain on the bus for three clock periods. But, the low order bits
remain for only one clock period & they would be lost if they are not saved externally & so, the low
order bits of the address disappear when they are needed.
To make the entire address for the full three clock cycles, we will use an external latch to save the value
of AD7–AD0 when it is carrying the address bits. We use the ALE signal to enable this latch.
1 [Study Notes – For Private Circulation Only]
1|Page
BCA-VI SEM
SUBJECT: MICROPROCESSOR & ASSEMBLY LANGUAGE
PROGRAMMING
UNIT: III
The ALE operates as a pulse during T1 (timing state 1), we will be able to latch the address. Then when
ALE goes low, the address is saved and the AD7–AD0 lines can be used as the bi-directional data lines.
The high order address is placed on
the address bus and hold for 3
clock periods.
The low order address is lost after
the first clock cycle, this address
needs to be hold so we need to use
latch.
The address AD7 –AD0 is
connected as inputs to the latch
74LS373. The ALE signal is
connected to the enable (G) pin of
the latch and the OC –Output
control –of the latch is grounded.
Address decoding circuit using 3X8 decoder: A15 line is use for enabling 74x138 decoder chip. A12,
A13, A14 lines are connected to 74X138 chip as inputs. When theses lines are 010 output should be ‘0’ ie
it should be ‘low’. This is provided at O2 pin of 74X138 chip.
Address decoding circuit using only NAND gates: A15, A14, A13, A12 inputs should be 1010, for
enabling the chip.
4 [Study Notes – For Private Circulation Only]
4|Page
BCA-VI SEM
SUBJECT: MICROPROCESSOR & ASSEMBLY LANGUAGE
PROGRAMMING
UNIT: III
Types of address decoding:
There are two types of address decoding mechanism, based on address lines used for generating chip
select signal.
1. Absolute decoding
2. Partial decoding
Absolute decoding:
All the higher order lines of microprocessor, left after using the required signals for memory are
completely used for generating chip select signal. This type of decoding is called absolute decoding.
Partial decoding / Linear decoding:
Only some of the address lines of microprocessor left after using the required signals for memory are
used for generating chip select signal. Because of this multiple address ranges will be formed. If total
memory space is not required for the system then, this type of address decoding can be used. The
advantage of this technique is fewer components are required for memory interfacing because of this
board size reduces and in turn cost reduces.
Example:
Q). Connect 512 bytes of memory to 8085
1. For interfacing 512 bytes 9 address lines are required. So A0-A8 can be used to directly connect
to address bus of memory.
2. In the remaining A9-A15 for example only A15-A12 are used for generating chip select signal.
A11-A9 are don’t care signals.
IO interfacing to 8085
There are two techniques through which devices can be interfaced to microprocessor.
1. Memory mapped I/O
2. Peripheral mapped I/O or I/O mapped I/O