Lab 1 Construction of a Logic Probe

Objectives
The following are objectives of this lab:

1. Construction of a logic probe. We use a 7404 inverter to accomplish this.

2. Use the logic probe for the purpose of testing another circuit.
3. Produce a simulated failure and troubleshoot the failure using the logic probe
4. Measure threshold levels of TTL logic with the digital multimeter (DMM)

Materials Required
1. 7404 hex inverter
2. Two LEDs (light-emitting diodes)
3. Two signal diodes (1N914 or equal)
4. Resistors : three 330 Ω, one 2 k Ω
5. 1 k Ω potentiometer
6. Breadboard, wiring kit

Project Statement
Digital circuits represent digital bits or binary digits and have voltage levels that represent the two digits.
Transistors are used in the various gate circuits used in the labs and represent binary numbers as either
ON or OFF voltage conditions. A number of different types of logic circuits exist. One, TTL or transistor-
transistor logic, is still somewhat popular and is used in this lab and subsequent labs. Logic levels for 1
and 0 are displayed in the figure below (figure 1-1). The ON voltage level is high and the OFF is low. ON
does not have to be at the maximum or power supply level, however, and OFF does not have to be 0
volts. A range of valid voltage levels exist for the ON or 1 and for the OFF or 0 values.

Illegal logic levels

5 Max legal logic level
Fig. 1-1 TTL Voltage Levels
4
Logic HIGH
Volts

2 Min valid input. HIGH = VIH = 2.0 V

Invalid range
1
Max valid input. LOW = VIL = 0.8 V
Logic LOW

In the various circuits of this lab as well as those of future labs, the power and 0 volt connections must
both be connected. Pins for power and 0 V are Pin 7 for 0 volt and Pin 14 for +5 V.

Lab 1 – Logic Probe 1

 Power Supply found on most benches in lab

Fixed 5 V Variable Variable

Supply Supply A Supply B

0V 5V 0V 0-17V 0V 0-17V

-+ -+
0V +5V
entire entire
length of length of
board board

7404

Fig. 1-2 Power to Breadboard

and 7404 Chip

Notch at top

Pin 1 Pin 14
Pins are
counted
counter- Figure 1-3 Pin Connection Diagram of 7404
clockwise
from top
left

Pin 7 Pin 8

The circuit to be built is a logic probe. This logic probe is a wire that is used to detect the presence of a
HIGH (1 value) or a LOW (0 value) in a circuit. If neither voltage is present, neither HIGH or LOW is
reported. The logic probe will report each condition described above with LED’s. The LOW inverter
pulls the LED to a low value when not on. The top inverter pulls the HIGH LED off when not high. Thus
neither LED will light unless the proper voltage for a high or low is detected. The values of the logic in

Lab 1 – Logic Probe 2

Fig. 1-1 above are seen in that any voltage of 2.0 V or higher will turn on the HIGH LED and values less
than .8 V will turn on the LOW LED. Values in the middle will not turn on either LED.

VIN Y6 A6 Y5 A5 Y4 A4
14 13 12 11 10 9 8

Figure 1-4 Connection diagram of 7404

7404
74H04
1 2 3 4 5 6 7 74L04
A1 Y1 A2 Y2 A3 Y3 0V 74LS04
74S04

Pre-lab Questions
1. How are pins numbered on a 7404?

Pin_____ Pin_____
Pin_____ Pin_____
Pin_____ Pin_____
Pin_____ Pin_____
Pin_____ Pin_____
Pin_____ Pin_____
Pin_____ Pin_____

2. What is the range of voltages that are invalid on a 7404 or other typical TTL IC?

Lab 1 – Logic Probe 3

Procedure
Simple Logic Probe

1. The circuit below in Fig. 1-5 shows the 7404 with pin numbers and connecting circuit. The
schematic circuit shows components as symbols. Below the schematic are the symbols and
outline of devices used. The resistors are shown with color bands. Value of colors can be found
on a chart at the end of the report. Diodes are polarized devices with a line across the device in
the downstream or cathode end. LEDs likewise are polarized with the downstream side flat.
Polarized devices must be connected in the correct direction to work properly. Test the circuit
by connecting the probe to +5.0 V. If correctly connected, the high LED will turn on. Then
connect the probe to 0 V. The low LED will turn on. When the probe is not attached to either
+5 or 0 V, neither LED should be lit. When done with this, have instructor observe and initial.

+5V +5V
330 Inst
2K
13 12 11 10 LOW LED Initials:

D1
+5V Fig 1-5 Schematic of
Probe
330 Logic Probe
D2
1 2 HIGH LED

2 K, 330 Resistor
Fig 1-6 Schematic and
1N914 diode Outline of Devices

LED

Fig 1-7 Device Layout

0V 5V on Breadboard
-+ Probe -+ and Resistor
Colorcode
2.2 KΩ

Vcc
330Ω
7404

330Ω
Lo
330Ω
Hi

Lab 1 – Logic Probe 4

2. To test the voltage threshold values of the inverter, use the probe and the 1KΩ potentiometer.
Add the potentiometer to the breadboard as shown in Fig. 1-8 below. You will find values close
to those of the graph below of Fig. 1-9. Use a DMM to read and record the threshold values at
which the high LED just about turns off and at which the low LED just turns on. These values are
to be recorded in the report.

0V 5V
-+ -+

2 KΩ
Schematic of Potentiometer
Vcc
5V
Vcc

330Ω To probe 1KΩ Potentiometer

7404 (varies from
0 to 5 V)
0V
Probe
330Ω
Lo Fig. 1-8 Layout with
330Ω
Hi Potentiometer

1KΩ
Pot

DMM

(set to Volt)

Illegal logic levels

5 Max legal logic level

4
Logic HIGH Hi LED On
Volts

3 Fig. 1-9 Test for TTL Voltage

Levels
2 Min valid input. HIGH = VIH = 2.0 V
Invalid range Both LED s off
1 Max valid input. LOW = VIL = 0.8 V
Logic LOW
Lo LED On

Actual logic thresholds: HIGH ________ V LOW ________ V

Lab 1 – Logic Probe 5

3. This step uses one of the un-used inverters (pin 3 and pin 4) to test the effect of an inverter in a
circuit. The inverter output (pin 4) is connected to the probe while the input (pin 3) is
connected to HI (+5V), LO (0 V) and allowed to float (not connected). The 7404 has six
independent inverters with the logic probe using three. The power supply and 0 volt
connections are shared for the six. Otherwise, they are independent. Report the output in
Table 1-1 as HI, LO or neither.

3 4 (connect to probe)

Connect 3 to +5 V

+5 V

3 4 (connect to probe)

Connect 3 to 0 V Fig. 1-10 Testing single

0V Inverter

3 4 (connect to probe)

Disconnect wire to 3
open

3 4 (connect to probe)

0V 5V
-+ -+

2 KΩ

Fig. 1-11 Connection Diagram

330Ω Vcc for One Inverter

7404

330Ω
Lo
330Ω
Hi

Table 1-1 Output Logic Level

Step Input is LOW Input is OPEN Input is HIGH
3 One Inverter

Lab 1 – Logic Probe 6

 4. In step 4, two non-used inverters are used to find the effect of two inverters in a circuit. The
inverters are shown connected below in Fig. 1-12 and in the connection diagram below. Fill in
Table 1-2 with the results as before.

4 5
3 6

Connect 3 to +5 V
+5 V
4 5
3 6 (connect to probe)

Connect 3 to 0 V
Fig. 1-12 Testing two
0V inverters in series
4 5
3 6 (connect to probe)

Disconnect wire to 3

open
4 5
3 6 (connect to probe)

0V 5V
-+ -+

2 KΩ

Fig. 1-13 Connection Diagram

330Ω Vcc for Two Inverters

7404

330Ω
Lo
330Ω
Hi

Table 1-2 Output Logic Level

Step Input is LOW Input is OPEN Input is HIGH
4 Two Inverters

Lab 1 – Logic Probe 7

 5. Follow the schematic diagram below to connect two inverters in a cross-coupled design. The
circuit works as a memory circuit. When complete, demonstrate to your instructor and get his
initials in the space provided. The circuit provides feedback to hold a circuit in a particular state.
This is a simple memory device remembering the last state the circuit was in. Vin (pin 3) is the
input to the circuit. Demonstrate to your instructor by first touching to 0 V. Observe the
output. Then lift the probe to pin 3. Observe the output. Then touch the input (pin 3) to +5.0 V
and then lift the probe. Again, observe the output.

Top
inverter
Inst
VIN 3 4 Initials:
VOUT to probe

Fig. 1-14 Two Inverts

Cross-Coupled
5 6
Lower
inverter
Cross-coupled inverters

0V 5V
-+ VIN -+

Fig. 1-15 Connection Diagram

2 KΩ
for Cross-Coupled
Inverters
330Ω Vcc

7404

330Ω
Lo
330Ω
Hi

6. Create a faullt in the circuit above by removing the wire connected to pin 5. Then touch the
wire attached to pin 3 to 0 V. Record voltage levels at Pin 4, Pin 5 and Pin 6 in the table below
with the DMM.

Table 1-3 Input Output

Logic Level Logic Level Logic Level Logic Level
Step (pin 3) (pin 4) (pin 5) (pin 6)
6 Fault: open at pin 5 0V

Lab 1 – Logic Probe 8

Review Questions
1. Is the circuit below of Fig. 1-16 the same as Fig. 1-14?

VIN VOUT

3 4 5 6
Fig. 1-16

Justify your answer:

Conclusion:

Lab 1 – Logic Probe 9