Design and Fabrication of 1550 NM Photonic Crystal Surface Emitting Lasers

DEGREE PROJECT IN ENGINEERING PHYSICS,
SECOND CYCLE, 30 CREDITS

STOCKHOLM, SWEDEN 2018
Design and Fabrication of 1550 nm

Photonic Crystal Surface Emitting
Lasers
JOÃO MARTINS DE PINA
KTH ROYAL INSTITUTE OF TECHNOLOGY

SCHOOL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE
iii
Abstract
In this study, the design and fabrication of a monolithic InP-based 1550-nm photonic-crystal surface-
emitting laser (PCSEL) is reported. The device is composed by an InGaAsP multi-quantum well (MQW)
active layer and InP photonic crystal (PhC) formed by metal organic chemical vapour deposition (MOCVD).
A theoretical study based mainly on the Fourier modal method using Stanford Stratified Structure Solver
(S 4 ) and finite element analysis using COMSOL Multiphysics was carried out in order to optimize the
emission at 1550 nm due to the two-dimensional band-edge resonance effect at the Γ point.
The device design and modeling, materials testing (annealing and MOCVD regrowth), process opti-
mization and the fabrication of light emitting diodes (LEDs) based on the same structure as the PCSELs
(without the PhC) is reported. The fabricated devices show a low series resistance of 8.19 Ω and a turn-on
voltage of 0.84 V. The average differential output power is 41 mW/A with an electroluminescent peak at 1511
nm. The full assembly of the final PCSEL devices is beyond the scope of the present thesis and corresponds
to an ongoing project expected to be finalized within the coming year. However, detailed guidelines and
fabrication instructions, including the manufacturing of an appropriate lithographic mask set, are provided.
Keywords: Photonic crystal, surface-emitting laser, metal organic chemical vapour deposition, III-V semi-
conductors, light emitting diode.
iv
Sammanfattning
Föreliggande examensarbete rapporterar designen och tillverkningsprocessen för en monolitisk InP-

baserad 1550-nm så kallad Photonic-Crystal Surface-Emitting Laser (PCSEL). Komponenten bestå r av
en aktiv kvantbrunnsstruktur i InGaAsP och ett fotoniskt-kristall (PhC)-lager i InP, bägge odlade med
hjälp av metalorganisk gasfasepitaxi (MOCVD). En teoretisk studie baserad på Fourier-modalmetoden med
användning av Stanford Stratified Structure Solver (S 4 ) och finit elementanalys-metoden med med hjälp
av av COMSOL Multiphysics utfördes för att optimera emissionen vid 1550 nm genom en tvådimensionell
bandkantsresonanseffekt vid Γ punkten.
Rapporten går igenom komponentdesign och modellering, materialtestning (värmebehandling och MOCVD-
återväxt), processoptimering och tillverkning av lysdioder (LED) baserade på samma struktur som PCSEL-
komponenterna (men utan PhC-strukturering). De tillverkade lysdioderna uppvisar en låg serieresistans
på 8.19 Ω och en framspänning på 0.84 V. Den genomsnittliga differentiella utgångseffekten är 41 mW/A
med en luminescenstopp vid 1511 nm. Den slutliga tillverkningen av färdiga PCSEL-enheter ligger utanför
ramen för detta examensarbete och motsvarar istället ett pågående projekt som förväntas bli slutfört inom
det kommande året. Däremot ges detaljerade riktlinjer och tillverkningsinstruktioner, för vilket ett fotolito-
grafiskt mask-set även tagits fram.
v
Acknowledgements
First and foremost, I want to express my gratitude to my examiner, Prof. Mattias Hammar, and to my
supervisor, Carl Reuterskiöld Hedlund. To Prof. Mattias, for the opportunity and guidance throughout this
project. To Carl, for the availability, sense of humor and teachings.
To all my office colleagues and friends with which I shared this experience. A special word of appreciation
to Andrea, Carlos, Corrado and Yandi, who closely shared these moments with me and made this period so
much better.
A special thank you to several cleanroom members for their help and availability. To Cecilia Aronsson for
being always available to share her knowledge on microprocessing. To Dr. Henry Bleichner, for contributing
with the required material for CMP, and to Susanne Almqvist, for her kindness in sharing her knowledge on
III-V processing. Thank you to IRnova, from which both belong. To Prof. Max Yan for his help regarding
photonic crystals and computational electromagnetics. To Dr. Qin Wang, for her close support throughout
several stages of the project. To Dr. Yong-Bin Wang, for his immediate help with ME-RIE every time something
went wrong.
A word of great appreciation to Prof. Weidong Zhou’s group from The University of Texas at Arlington
(UTA) for its essential help with e-beam lithography and the simulation work performed. To Dr. Seungwon
Yeom and Akhil Kalapala for their helpful collaboration.
To the friends I made in Stockholm (Sweden), Hamilton (Canada), Lisbon and Olhão (Portugal), lots of
them now spread around the world. You made this journey extraordinary.
Sou um sortudo pela família que tenho. A ela dedicarei sempre tudo o que atingir.
João Martins de Pina,

Stockholm, September 2018
Contents
Contents vi
List of Figures viii
List of Tables x
List of Acronyms xi
1 Introduction 1
2 Theoretical background and simulations 3

2.1 Photonic crystals and modulation of light . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2 Photonic crystal based devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 Simulation methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.1 Plane wave expansion method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3.2 Fourier modal method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3.3 Finite element method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.4 Finite-difference time-domain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Functioning details and simulations on PCSEL . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.5 Light emitting mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Fabrication technology and process optimization 15

3.1 Lithography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.1 Electron beam lithography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2 Chemical mechanical polishing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3 Plasma-enhanced chemical vapour deposition . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Metal organic chemical vapour deposition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.5 Electron beam physical vapour deposition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5.1 Annealing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.6 Dry etching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.6.1 Magnetically-enhanced reactive ion etching . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.6.2 Inductively coupled plasma - reactive ion etching . . . . . . . . . . . . . . . . . . . . . . 20
3.7 Wet etching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4 Regrowth trial 23
4.1 Annealing tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.2 Regrowth tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5 Device architecture and considerations 29

5.1 Electrodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2 Anti-reflection and isolation layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.3 Buffer layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.4 Spacer layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.5 Multi-quantum wells . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.6 Photonic crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.7 Capping layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.8 Regrowth and contact layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.9 Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Process flow 37
vi
CONTENTS vii
7 LED characterization 43
7.1 Light-current-voltage curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
7.1.1 Pad resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
7.2 Spectrum analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
8 Conclusion 47
Appendices 49
A1 Chemical polishing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
A2 Processing parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
A2.1 Inductively coupled plasma - reactive ion etching . . . . . . . . . . . . . . . . . . . . . . 51
A2.2 Plasma-enhanced chemical vapour deposition . . . . . . . . . . . . . . . . . . . . . . . . 51
A3 Regrowth trial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
A4 Study on p-cladding layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
A5 Set-up calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Bibliography 55
List of Figures
1.1 Schematic of the PCSEL structure. Arrows on the right indicate the two stages of MOCVD growth. 1
2.1 Replication of Hirose et al. work [1]. a, photonic band diagram obtained using the plane wave
expansion method applied to Hirose’s structure. Right plot shows a more detailed view over the
gamma point. b, amplitude of the magnetic field distributions around the air hole (layout shown in
black) in the direction perpendicular to the PhC plane at the individual band-edge modes A-D. c,
light diffraction in the PhC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Transmission spectra of PhC filters with different wavelength selectivity. a, spectra obtained using
finite-method analysis. b, spectra obtained using Fourier modal method. . . . . . . . . . . . . . . . 5
2.3 Replication of the transmission spectra obtained by Deng et al. [2] using S 4 software package. The
simulations were performed on the same structure with varying thickness (t/a). . . . . . . . . . . . 9
2.4 Transmission spectra showing the PhC’s resonance peaks. a, peak position variation as a function
of the incident angle. b, for an incident angle of 2◦ , peak variation for different number of Fourier
terms (nG) used during simulations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.5 Simulations done over resonance mode D. a, field profile. b, Q factor extrapolation from the reso-
nance peak. The number of points were decreased by a factor of 200 to allow better visualization of
the plot. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1 Characterization of the wafer’s back-side before polishing. a, optical microscopy showing surface
roughness. b, AFM characterization on a 15x15 µm area. c, 3D rendering of b. . . . . . . . . . . 16
3.2 Characterization of the wafer’s back-side after CMP. a, optical microscopy. Image contrast was
increased by 50 %. b, AFM characterization on a 15x15 µm area. c, roughness analysis on data
shown in b. d, AFM characterization on a 1x1 µm area. . . . . . . . . . . . . . . . . . . . . . . . 17
3.3 SEM images of MOCVD doped/undoped InP heterostructure on a, a trench. b, on flat wafer surface. 18
3.4 IV measurement of a device after different annealing temperatures. . . . . . . . . . . . . . . . . . . 19
3.5 Step size of etched SiO2 as a function of time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.6 SEM images of InP etched samples using ICP-RIE. a, cleaved profile of a line. b, top view of
different patterned shapes (the inset shows a cleaved profile of a triangle). . . . . . . . . . . . . . 21
3.7 SEM images of InP etched samples using ICP-RIE with a hard mask patterned by e-beam. a,
etching duration of 126 s. b, etching duration of 190 s. . . . . . . . . . . . . . . . . . . . . . . . . 21
3.8 Step size of etched InP and InGaAs using HCl:H3 PO4 (1:10) and H3 PO4 :H2 O2 :H2 O (3:1:100) as a
function of time, respectively. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1 The lithography mask used for the annealing tests. a, a picture of the mask. b, a microscope picture
of 2 µm features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.2 SEM images of feature re-shaping with annealing at 470 ◦ C. a, before annealing. b, after annealing. 26
4.3 Information regarding crystal orientation of the features after annealing. . . . . . . . . . . . . . . . 26
4.4 SEM images of a successful regrowth trial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 Schematic of the PCSEL structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.2 Selected area of the designed lithography masks. a, trench opening for device isolation (p-side). b,
opening for the back-side (p-side) electrode within the isolation. c, opening for the top-side (n-side)
electrode. d, resist patterning for lift-off process around top-side (n-side) electrode. Blue squares
on a and b are used as e-beam lithography alignment marks. . . . . . . . . . . . . . . . . . . . . . 30
5.3 Reflectivity of SiO2 and Si3 N4 coatings as a function of its thickness for 1550 nm wavelength. An
ideal coating (refractive index of 1.78) is also plotted. . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.4 Wavelength from which light absorption occurs as a function of the InP/InGaAs/InP well’s width. 32
5.5 Ideal p-clad thickness for constructive interference between the ongoing wave and the wave reflected
in the semiconductor/metal interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
viii
List of Figures ix
5.6 A schematic of the two possible structures. a, SiO2 is used as an isolation layer. b, a mesa structure
is formed and is isolated with SiO2 . The dashed line area represents the geometric location of the
MQWs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.7 Finite-element simulations performed on the device without mesa isolation. a, simulated structure.
b, current density distribution on the device. The inset shows the current density distribution in a
geometric plane that goes through the device. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.8 Top view of current distribution obtained using the finite-element method. a, structure without
mesa isolation. b, structure with mesa isolation. The black lines delimit the front side electrode. . 35
5.9 Current density profile within the MQWs region with and without mesa isolation. a, profile over
the whole MQWs length. The dashed vertical lines represent the width shown in b. The position 0
µm and 200 µm represents the interface between the mesa and the SiO2 isolation. b, profile over a
reduced central area of the MQWs length. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.1 Pictures of the alignment marks formed during 2-Alignment marks (1st mask step). a, alignment
marks on SiO2 hard mask. b, alignment marks on InP after SiO2 hard mask removal. Insets on
both pictures are of finer alignment marks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
6.2 Results obtained during device’s front electrode fabrication. a, picture of one device’s electrode
opening. b, profilometer measurement showing electrode’s opening height. . . . . . . . . . . . . . . 39
6.3 Results obtained during device’s isolation stage. a, top view of one device’s isolation. b, profilometer
measurement showing isolation’s depth. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.4 Results obtained during device’s back electrode fabrication. a, picture of one device’s electrode
opening. b, profilometer measurement showing electrode’s opening in the middle of the isolation
done in the previous step. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.5 Results obtained during device’s top electrode fabrication. a, picture of one device’s electrode. b,
schematic of the final device. c, picture of a final device. . . . . . . . . . . . . . . . . . . . . . . . . 42
7.1 Two wafers were processed. a1, IV curve of devices from wafer 1. b1, IV curve of devices from wafer
2. a2, IL curve of devices from wafer 1. b2, IL curve of devices from wafer 2. Color of a specific
device’s curve is kept from plot 1 to 2. Since no relation is found for devices of different sizes, size
of each device is not stated. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
7.2 Electrical behavior dependence on the probing spot. . . . . . . . . . . . . . . . . . . . . . . . . . . 45
7.3 Pad’s electrical properties discrepancies. a, measured and expected IV considering the electrode’s
simulated resistance. b, current density distribution between the pad and the electrode for applied
current of 1 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7.4 Emission spectra of a 200x200 µm device. a, emission spectra for different drive currents. b, peak
wavelength of the different fabricated devices. The position of the device in the wafer is shown in
the inset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
8.1 Height profile over a 250 µm scan on different samples. a, not polished sample. b, sample on
H3 PO4 :HCl for 20 min. c, sample on HCl:H2 O for 5 min. d, sample on H3 PO4 :HCl for 60 min.
Scan on d was done on two crystallographic directions. The data was leveled to average height of
0 to allow easier comparison. Dips within features horizontally distanced less than 4 µm from each
other aren’t completely resolved by the equipment used for this analysis. . . . . . . . . . . . . . . 50
8.2 Microscope pictures of the studied samples. a, sample without polishing. b, sample on H3 PO4 :HCl
for 60 min. The topography contrast was enhanced by phase contrast. . . . . . . . . . . . . . . . . 51
8.3 SEM pictures of InP annealed in an arsine environment. a, profile of a 2 µm line. b, top view on 2
µm circular shapes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
8.4 Top view SEM pictures of the different annealed samples. a, not annealed InP. b, InP in arsine
environment (InP-As). c, InP in phosphine environment (InP-P). d, InP with SiO2 cap in phosphine
environment (SiO2 -P). e, InP with InGaAs cap in arsine environment (InGaAs-As). f, InP with
InGaAs cap in phosphine environment (InGaAs-P). . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
8.5 PCSEL back-side clad optimization script. a, the developed GUI. b, the simulated structure. . . . 53
8.6 Different power/current (W/A) values obtained for the different calibration trials. . . . . . . . . . 53
List of Tables
2.1 Description of the simulated model, based on [3]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 Step temperature increase used. Time is shown in minutes and temperature (temp.) in Celsius.
Values shown in bold represent periods where temperature remains stable. . . . . . . . . . . . . . . 19
3.2 Parameters used for SiO2 etching. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 Before and after annealing profile SEM pictures at several temperatures (T) for 2 µm lines. . . . . 24
4.2 Line width quantification (top and bottom surface of 2 µm lines) done over SEM pictures of the
annealed and not annealed samples at 3 different temperatures. . . . . . . . . . . . . . . . . . . . . 24
4.3 Before and after annealing profile SEM pictures at 630 ◦ C for 2 µm lines at different annealing
environments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.4 Quantification of the line width (top, middle and bottom width of the 2 µm lines) done over SEM
pictures of the annealed and not annealed samples with different capping layers. Environment (Env.)
is of phosphine (P) or arsine (As). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1 Detailed description of each PCSEL’s layer. Layer X may not be required in the actual device. Q
1.2 refers to In0.485 Ga0.515 As0.83 P0.17 while Q 1.5 refers to In0.76 Ga0.24 As0.83 P0.17 . The air filling
factor of the PhC is given as ff. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.1 Number of fabricated devices of each size. Devices’ area is squared. . . . . . . . . . . . . . . . . . . 43

7.2 Characterization of the devices. Uncertainty presented corresponds to one standard deviation. . . 44
8.1 Different etchants and process time. Time was established as a function of the etching rate. A red
object was used to facilitate a qualitative assess of reflection. . . . . . . . . . . . . . . . . . . . . . 49
8.2 InP ICP-RIE process’s parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
8.3 PECVD SiO2 process’s parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
x
List of Acronyms
AFM Atomic force microscopy

CMP Chemical mechanical polishing
CQD Colloidal quantum dots
CVD Chemical vapour deposition
DBR Distributed Bragg reflector
E-beam Electron beam
EB-PVD Electron beam physical vapour deposition
FDTD Finite-different time-domain
FEM Finite element method
FF Air-hole filling factor
FMM Fourier modal method
GUI Graphical user interface
ICP-RIE Inductively coupled plasma - reactive ion etching
IL curve Current-light curve
IV curve Current-voltage curve
LED Light emitting diode
LIV Light-current-voltage curve
ME-RIE Magnetically-enhanced reactive ion etching
MOCVD Metal organic chemical vapour deposition
MQWs Multi-quantum wells
PBDL Photonic bandgap defect mode laser
PBEL Photonic band-edge lasers
PCSEL Photonic crystal surface-emitting laser
PECVD Plasma-enhanced chemical vapour deposition
PhC Photonic crystal
PWEM Plane wave expansion method
RTA Rapid thermal annealing
SEM Scanning electron microscopy
SMU Source measurement unit
TE Transverse-electric
TM Transverse-magnetic
VCSEL Vertical-cavity surface-emitting laser
xi
Chapter 1
Introduction
As a high-intensity, narrow-band, highly directional, coherent light source, the laser has a strong impact
in present technology and research. Applications are found in diagnosis and treatment in modern medicine,
surgical procedures, 3D structure manufacturing and material processing, spectrometers and sensors, optical
communications, etc. Several semiconductor laser architectures are continuously studied to achieve improved
properties such as high frequency operation, narrow linewidth or high output power. Further work is developed
to increase availability of devices operating with emission at 1550 nm, which is optimum for transmission through
glass optical fibers, the so-called telecommunication transmission window [4]. Edge-emitting lasers, whose
emission is parallel to the wafer’s surface, have high output power but often compromised beam properties.
On the other hand, surface-emitting lasers, such as VCSELs (vertical-cavity surface-emitting lasers), achieve
high beam quality and allow on chip integration. However, due to its small emission area, its output power is
quite modest [1]. Photonic crystal surface-emitting lasers (PCSELs) use a state of the art architecture in order
to achieve high output power and high beam quality simultaneously. They comprise a multi-quantum wells
(MQWs) active region and a photonic crystal (PhC) to explore the two-dimensional band-edge resonant effect
at the Γ point. Optically and electrically pumped InP/InGaAsP PCSELs on Si with emission at 1550 nm have
been achieved [3, 5, 6, 7] using transfer printing in order to attach a wafer enclosing the photonic crystal to a
freestanding membrane containing the active region of the device. This technology allows for silicon-integrated
laser sources but requires a more complex device design and current injection scheme that compromises the
device performance. Watt-class electrically pumped GaAs PCSEL devices have been achieved with emission
at 980 nm [1, 8]. These exceptional results are partly due to the manufacturing process that allows a fully
monolithic device design with uniform current injection through a large-area active region.
As its name implies, the PCSEL func-
tioning is based upon the use of a pho-
tonic crystal. These optical structures al-
low the control over light propagation due
to its periodic variation of the index of re-
fraction. Analogously to electrons mov-
ing within a crystal, whose structure’s pe-
riodic potential prevents propagation in
certain directions, the variation of refrac-
tive index leads to photon’s reflections at
the interfaces which promotes similar phe-
nomena as with electrons [9]. These prop-
erties allow its usage in applications rang-
Figure 1.1: Schematic of the PCSEL structure. Arrows on the right
ing from lasers to optical filters.
indicate the two stages of MOCVD growth.
The major goal of this project is to fab-
ricate a PCSEL emitting at 1550 nm that follows the structure shown in Figure 1.1. In order to achieve this,
the final devices should be able to operate with high beam quality while producing high output power. To date,
these properties have not yet been achieved in a similar monolithic structure emitting at 1550 nm.
As mentioned, several optically pumped devices emitting at 1550 nm have been fabricated previously.
Although emitting at an optimum wavelength, these devices’ output power is significantly reduced due to the
wafer bonding technique used during its manufacturing. This project attempts to solve this by creating the
structure in two metal organic chemical vapour deposition (MOCVD) steps as shown in Figure 1.1. After the
first growing step (indicated by the arrows shown in Figure 1.1), the PhC is patterned and another MOCVD
growth is done on top of it. If done correctly, the required voids in the structure will be kept leading to the
device’s functioning.
The project itself consists of seven different stages outlined bellow. Due to time limitations, the work done
1
2 CHAPTER 1. INTRODUCTION
throughout this thesis focused on the first five stages.
Process planning, testing and optimization. The fabricated device is fairly complex and its process
required extensive planning. Although standard in micro and nanofabrication, some processes required
optimization before being applied in the fabrication of the actual devices. A total of six lithography masks
were designed for material testing and for the manufacturing of the PCSELs.
Theoretical study of the device. As it will be explained in further sections of this work, theoretical studies
were carried out in order to design the photonic crystal and assuring lasing at the wavelength of interest.
Simulations on these were mostly based on the Fourier modal method using Stanford Stratified Structure
Solver (S 4 ), although COMSOL Multiphysics (finite element method) was also used. Some studies were
also carried in order to tune the thickness of other layers of the device. Minor simulations to quantify the
improvement of the device’s electric properties due to some design choices were also performed.
Material testing. A limiting step of the device’s fabrication is on the regrowth stage due to the risk of
fulfilling the PhC’s holes and thus making it inoperative. As such, tests were carried in order to study the
effect of temperature on the photonic crystal. Lastly, regrowth tests were carried out in order to assure
the viability of the process.
Fabrication of light emitting diodes (LEDs). A LED can be manufactured using the exact same structure
of the designed PCSEL, with the exception of the PhC layer. Once produced, information can be obtained
regarding the feasibility of the planed project flow and some design considerations, such as the formation
of ohmic contacts, well performed device electrical isolation and good functioning of the multi-quantum
wells. A comparison between this device and the PCSEL should reveal the direct effects of the PhC on
the device’s performance. By itself, these LEDs may find applications on remote control devices, machine
vision systems, infrared cameras, sensors, surveillance systems, toll systems, biometrics, etc.
Characterization of the fabricated LEDs. As an individual analysis and for further comparison with
the PCSELs, several tests are performed on the fabricated LEDs. Electroluminescence analysis is carried
out to verify the wavelength distribution and emission peak. IV (current-voltage) and IL (current-light)
sweeps are performed on the fabricated devices.
Fabrication of the PCSELs. As stated, the PCSEL structure is based on the LED structure, including
a PhC layer that is not present on the latter device. Based on successful results of the material testing
essays and the fabrication of the LEDs, the PCSEL fabrication should be equally possible.
Characterization of the fabricated PCSELs. The PCSELs should be equally tested as the fabricated
LEDs to allow comparison between both devices. Other tests, such as beam divergence quantification
and beam broadening with increased drive current, polarization profile and intensity measurements for
different polarization angles can also be performed.
This report addresses all the above topics, directing itself to the production of a PCSEL. Although the
PCSEL was not fabricated, due to the high resemblance between it and the LED, this work will refer consistently
to the production of the first. The required minor changes during the processing stage in order to produce the
LED instead of the PCSEL will be properly stated.
This thesis was carried out at the School of Electrical Engineering and Computer Science (EECS) at Kung-
liga Tekniska Högskolan (KTH, Royal Institute of Technology) under the supervision of Prof. Mattias Hammar.
The project is done in collaboration with Prof. Weidong Zhou (Zhou Lab) from the Department of Electrical
Engineering (EE) at The University of Texas at Arlington (UTA). The Zhou Lab was responsible for elec-
tron beam (e-beam) lithography during this project and was in close collaboration with the simulation work
performed.
Chapter 2
Theoretical background and simulations
A brief description on the theoretical concepts behind the project is made in this section. A more detailed
description on the simulations done and considerations regarding this device’s architecture is given. In order to
improve understanding over the simulations done and check its validity, several analysis were done on devices
whose results were published in literature in order to compare the results. Some of this work will be shown in
this chapter.
2.1 Photonic crystals and modulation of light

Light traveling through an uniform medium scatters when interacts with a non-uniformity (for instance,
a particle), deviating from its original trajectory. Scattering by a homogeneous sphere was described first by
Gustav Mie, whose work can be applied on situations where the wavelength of light is comparable with the
size of the uniformity. Several non-uniformities randomly located in the medium will produce several scattered
waves which interfere constructively or destructively with each others and with the light source. If these non-
uniformities are strategically placed, the interaction between the scattering waves can be tuned according to
our interest. Different scattering phenomenas may be achieved if these non-uniformities are made periodic in
space, possibly leading to complete destructive interference (forbidden light propagation) or the formation of
coherent beams of light. These multidimensional periodic structures are achieved with the periodic modulation
of the refractive index of the medium, and are named photonic crystals. The periodic variation of the refractive
index can be done in one or several directions of space, leading to 1D, 2D or 3D photonic crystals which allow
different controls over light propagation. This periodic modulation leads to an analogy with the atomic lattice
of solid-state physics and consequent charge carrier movement, which represented one of the major mysteries of
the 19th century physics. In crystals, atoms are arranged periodically in all directions to form the structure’s
lattice. Due to the formed periodic potential, electrons can propagate without scattering on the constituents
of the structure. Based on the theory of quantum mechanics, electrons propagate as waves which in a periodic
medium can propagate without scattering within some conditions [10]. This potential also forbids certain
energy electrons to propagate in specific directions and if sufficiently strong, may avoid propagation completely
(referred as the band gap in solid state physics’ band diagrams). Likewise, photons traveling through a periodic
medium such as a photonic crystal will produce similar phenomenas as electrons in a periodic potential, allowing
light from certain frequencies to propagate only in specific directions [10]. Taking into account the directions
on which light with certain frequencies can propagate, a photonic band diagram can be drawn as shown in
Figure 2.1a.
The results shown in Figure 2.1 are a replication of the work made by Hirose et al. [1] using the plane wave
expansion method (PWEM) and finite element method (FEM) through COMSOL Multiphysics (whose calcu-
lation methods will be explained posteriorly). The simulated structure is a GaAs crystal slab with cylindrical
air holes (radius of 57 nm) periodically distributed in a square lattice with lattice constant of 287 nm. As
shown, different light frequencies can only propagate in certain directions of the lattice and are reflected when
directed at forbidden directions. Since Maxwell’s equations are scale invariant, the frequency of the photonic
band diagram is commonly expressed in units of c/a, where c denotes light’s velocity and a the lattice period-
icity (also named lattice constant). Therefore, the same band diagram can be used for different frequencies by
varying the lattice constant of the structure.
On the right of Figure 2.1a is shown a more detailed view of the band diagram on the Γ point. This area
is of interest since the band edges in this point are two local maximums and minimums. In this situation,
photons will have zero group velocity which leads to the formation of a standing wave [11]. Light is repeatedly
scattered in different non-uniformities and interacts constructively within itself. The different waves are thus
coupled in an enhanced feedback phenomena. The four standing waves formed at the Γ point (named from A
to D) resonate differently at different frequencies (the standing wave’s state of excitation is quantized). These
3
4 CHAPTER 2. THEORETICAL BACKGROUND AND SIMULATIONS
Figure 2.1: Replication of Hirose et al. work [1]. a, photonic band diagram obtained using the plane wave expansion
method applied to Hirose’s structure. Right plot shows a more detailed view over the gamma point. b, amplitude of
the magnetic field distributions around the air hole (layout shown in black) in the direction perpendicular to the PhC
plane at the individual band-edge modes A-D. c, light diffraction in the PhC.
quantized standing wave’s states of excitation are termed field modes. The band structure shown in Figure
2.1a is calculated for the electric field within the PhC’s surface plane, commonly called transverse-electric (TE)
modes. Similarly, TM refers to transverse-magnetic [11].
The TE modes indicated in Figure 2.1a are shown in Figure 2.1b. On Figure 2.1c is shown the diffraction of
an incident light beam (red arrow) on the PhC. The standing wave (corresponding to each of the field modes) is
formed due to several Bragg diffractions. The incident light beam can undergo second-order Bragg diffraction
and be reflected backwards (180 ◦ ), and first-order Bragg diffraction to be reflected perpendicularly (90 ◦ and
-90 ◦ ) [1], as shown by the black arrows on Figure 2.1c. The waves diffracted in all four directions couple
with each other, forming the standing wave and the corresponding field mode. The standing wave is formed
not only with the contributions of the surrounding non-uniformities, but with interactions of a higher number
of non-uniformities of the PhC [1, 11]. A study regarding it will follow the simulation work done on Section
2.4. The first-order Bragg diffraction condition is also assured for a reflection perpendicular to the PhC plane
(orange arrow). This diffraction is crucial for the PCSEL functioning, as it will be described posteriorly.
Other resonance points (such as the M point) can also be used to achieve lasing. However, this coupling is
not as multi-directional (as on the Γ point), resulting in an overall decrease of output light coherence [8, 12].
An important concept regarding the field modes shown in Figure 2.1b is its symmetry properties. As shown
in different works using the band-edge effect at the Γ point, the modes A and B are expected to achieve threshold
before modes C and D [1, 7, 8]. Most fabricated devices achieve lasing through modes A and B. However, the
output power is reduced due to the symmetric shape (circle) of the air holes [1]. Due to its symmetry, the in-
plane electromagnetic field is also symmetric and destructive interference happens for diffraction on the direction
perpendicular to the PhC surface’s plane. Since there is no light output, the mode is said to be non-leaky.
If the in-plane electromagnetic field is asymmetric, light output can be achieved and the mode is said to be
leaky. Although threshold is easily achieved in modes A and B, the visible symmetry in respect to the unit cell
center makes these modes non-leaky, while mode C and D are leaky. In practice, light output is still achievable
since the structure is not ideally symmetric due to fabrication limitations, which contributes positively to the
2.2. PHOTONIC CRYSTAL BASED DEVICES 5
device’s functioning. A strategy followed by Hirose et al. [1] consists of using a right-isosceles-triangle-shaped
air holes instead of circular air holes. This breaks the symmetry of the in-plane field which avoids destructive
interference of the output light. This strategy will be taken into consideration while designing the device of
this study.
Stimulated emission of light is achieved by coupling the PhC’s modes with the active layer of the device,
which requires proximity between these layers [8]. The coupling between the active layer fields with the standing
wave of the PhC’s mode, in a phenomena referred as evanescent coupling, leads to stimulated light emission
which further contributes to in-plane coupling and emission in the perpendicular direction to the PhC’s surface
plane.
2.2 Photonic crystal based devices

Several devices based on PhCs have been studied, fabricated and are commercially available, ranging from
lasers, filters and sensors. Although a review which includes a broad range of applications was not found, a
detailed report on several devices and its functioning was done by Zhou et al. [13] and De La Rue and Seassal
[14], for instance. In order to show the potentialities of PhCs, a brief overview on some of these devices is done
in this section.
As described in Section 2.1, one of the most attractive features of PhCs relates to its capability of forbidding
light propagation in certain directions (or even completely) due to the existence of a band gap. This phenomena
can be beneficially used in energy harvesting applications, specifically in solar cells. An ideal semiconductor used
on energy harvesting applications is a perfect absorber of energies above the bandgap, but also emits light at
the bandgap due to carrier recombination. Although the bandgap is an intrinsic property of the semiconductor,
by incorporating a 2D photonic crystal on the solar cell structure its absorption and emission properties can be
changed, modifying the effective bandgap of the device [15]. This is particularly important in thin-film solar
cells since light absorption decreases with the decrease of the semiconductor thicknesses, whose absorption is
mainly reduced for lower frequencies [16]. If designed correctly, the photonic crystal works as a light trapping
mechanism which reflects light emitted from the semiconductor, promoting re-absorption. This leads to an
increase in carrier density and hence an higher open-circuit voltage [15]. Nevertheless, the bandgap of 2D PhC
is usually narrow which forbids its use as a trapping component on broadband applications. As such, its use
can be combined with 1D PhCs (such as a distributed Bragg reflector [DBR]) which although provide worse
light trapping at specific wavelengths, can cover a broader infrared region of the light spectrum. Although the
use of a DBR on a thin-film solar cell, by itself, improved significantly the IV characteristics of the fabricated
device, the best achieved performance by Sheng et al. [17] was obtained when combining both a 1D and 2D
PhC in a solar cell.
Not only for solar cells, but also for lasers and sensors, being able to reflect or transmit specific ranges of
light’s wavelength can be extremely beneficial. By properly defining the PhC’s parameters such as material
(refractive index), radius and thickness (commonly given in r/a and t/a proportions due to the scale invariance
of Maxwell’s equations, as explained in Section 2.1), broadband and narrow band filters can be fabricated, as
shown in Figure 2.2.
Figure 2.2: Transmission spectra of PhC filters with different wavelength selectivity. a, spectra obtained using finite-
method analysis. b, spectra obtained using Fourier modal method.
The transmission spectra shown in Figure 2.2 consists of three different filters with high Q, medium Q and
low Q, designed and modeled by Zhou et al. [18], and here replicated using two different simulation methods
(an explanation regarding the methods used is given in Section 2.3). The referred Q factor of the filter,
commonly applied when characterizing a laser’s emission peak, is a parameter that characterizes how damped
the system is. This is linked with the relation between the bandwidth of the peak to its center frequency.
Higher damped resonances (low Q factor) dissipate energy faster than high Q resonances. The latter resonance
has a slower energy loss (it resonates for longer), which is beneficial to achieve lasing threshold in lasers, as
it will be explained in Section 2.4. The results obtained by both methods are significantly similar. On the
simulation done by finite-element method using COMSOL Multiphysics (Figure 2.2a), results could be improved
by decreasing the step size used during the wavelength’s sweep. This would possibly improve the analysis on
the high Q filter by showing peak resonance’s transmission from 0 till 1, as shown in Figure 2.2b. In Figure 2.2b
(Fourier modal method using Stanford Stratified Structure Solver [S4 ]), results could be improved by taking
into account a higher number of contributions by surrounding air holes in the PhC. This was shown to shift
the right side of the resonance peaks on the low Q filter, improving similarities between the results obtained by
the two methods. Both methods are also in agreement with the work done by Zhou et al. [18] and differences
are mostly related to the different number of contributions and the simulated refractive index, since it is not
explicitly given in the replicated work. Due to time constrains and due to the required computational power,
the results weren’t additionally improved. The low Q filter is an example of broadband reflectors which could
be used on solar cells for light trapping in the infrared region of the spectra, for instance. Contrarily, the high
Q filter allows only a narrow range of wavelength to be transmitted [18].
As sensors, PhCs can be used to enhance absorption at a particular wavelength. This increases the sensitivity
of the photodetector or, when such is not required, it may lead to more compact devices. By filling the air
holes of the PhC with colloidal quantum dots (CQD) with absorption at 1550 nm, Chen et al. [19] improved
light absorption of the CQDs by a factor of 9. This was achieved by matching the resonance peak of the PhC
with the absorption wavelength of the CQDs. The high Q factor of the resonance and consequently slower
energy lost should improve energy absorption since the resonant mode field necessarily overlaps with the CQDs
since they are within the PhC. Similar results were achieved by Chadha et al. [20] by placing 100 nm InGaAs
nanomembrane on top of a PhC. The resonant mode decays away from the PhC, overlapping the InGaAs
membrane and improving 1520 nm light absorption from 4 % to 64 %. Both cases are also reviewed in [13].
Laser stands for light amplification by stimulated emission of radiation. In direct band transitions, the
recombination of electrons in the conduction band with holes in the valence band leads to random emission
time and direction, leading to incoherent light emission [21]. This is called spontaneous emission and it is the
light mechanism behind LED’s functioning. When a photon is incident on an excited system, it stimulates
carrier recombination to generate a new photon. The properties (frequency, phase, direction) of the generated
photon are identical to the incident photon, and stimulated light emission is achieved [21]. As a major branch
on the field of photonics, several studies are made on the incorporation of PhCs in lasers. A detailed description
regarding several laser architectures using 2D PhCs is given in [13]. In opposition to edge-emitting lasers, PhCs
are applied mostly on surface-emitting lasers which gather advantages such as fabrication on a single chip and
on chip integration. VCSELs’ architecture was one of the first to use (1D) PhCs, by forming a cavity with two
DBRs in order to confine light [22]. This allows single longitudinal (perpendicular to surface plane) mode but
single transverse mode operation is hardly achieved for higher driving currents [23, 24]. Newer architectures
explore the use of a PhC in order to achieve single mode operation, by fabricating it within the DBR. The
devices fabricated in [23, 24] used a PhC defect cavity. These PhCs have a disturbance on its periodicity (for
instance, a missing air hole) which promotes light confinement within the area of disturbance, leading to single
transversal mode emission of light. These lasing modes which take advantage of a defect in the PhC are also
used in the design of photonic bandgap defect mode lasers (PBDL) [13]. These lasers use a PhC with a single
defect in order to trap photons and achieve lateral localization [22]. The state of the art architecture of PCSEL,
used in this work, allows surface emission using a defect-free photonic crystal. As explained in Section 2.1, this
architecture uses the band edge effect at the Γ point where photons have zero group velocity, leading to coherent
interaction and the formation a standing wave. Due to first-order Bragg diffraction, reflections perpendicular
to the PhC also occur leading to coherent light emission. Several works explore this effect for emission at 980
nm [1, 11, 25, 26, 27] and 1550 nm [3, 7].
2.3 Simulation methods
Different simulation techniques were used during this study. Although several information can be found
about these, an introduction regarding each of them is done here. Focus is given to the eigenvalue solving
of Maxwell’s equations since it was the main method used on the theoretical work performed. The reader is
further directed to more detailed sources for added information.
2.3. SIMULATION METHODS 7
2.3.1 Plane wave expansion method

The frequency of light which propagates in a crystal structure can be obtained after formulating Maxwell’s
equations as an eigenvalue problem. Instead of representing electromagnetic fields in a real space grid, these
are represented as a sum of infinite extended planewaves in the Fourier space. This Fourier transformation is
made over the three dimensional space coordinates. Maxwell’s equations are treated to achieve an eigenvalue
equation that can be solved. Maxwell’s equations govern all the field simulations and are shown in Equation
2.1 (Gauss’s law), 2.2 (Gauss’s law for magnetic fields), 2.3 (Faraday’s law) and 2.4 (Ampere’s law).
~ =ρ
∇·D (2.1)
~ =0
∇·B (2.2)
~
∂B
~ =−
∇×E (2.3)
∂t
~
~ = ∂ D + J~
∇×H (2.4)
∂t
On the above equations, D ~ is a vector field representing the electric flux density (that relates with the electric
~ ~ ~
field, E, by D = o r E, where is the permittivity) and ρ the electric charge density. The magnetic flux density
~ which is related to the magnetic field through the permeability, µ, by B
is represented by B, ~ = µo µr H.
~ The
indexes r and o relate to the structure’s relative and absolute permittivity and permeability. Current density
is represented by J~ and t represents time.
These equations can be treated in order to achieve a relation dependent of a single field. By assuming
the inexistence of external perturbations and perfect dielectricity of the medium (and thus, non-magnetic),
equations can be treated to obtain Equation 2.7.
From Equation 2.3,
~ ~ ~
∇×E ~ = −µo ∂ H ⇐⇒ ∇ × ∇ × E
~ = − ∂B ⇒ ∇ × E ~ = −µo ∇ × ∂ H (2.5)
∂t ∂t ∂t
Substituting from 2.4,
2~
∇×∇×E ~ = −µo o r ∂ E (2.6)
∂t2
Assuming the fields as time-harmonic, its variation is constant in time and the second derivative in order
of time can be substituted by a constant periodicity, treating the single frequency steady state problem by
∂2 2
substituting ∂t 2 by −ω , where ω represents the field’s frequency. The minus is for mathematical convenience.
This transforms Equation 2.6 into Equation 2.7.

2
1 ~ =ω E
∇×∇×E ~ (2.7)
r c2
Note that the permeability and the permittivity can be related to determine the phase velocity of light, and
thus µo o = c12 , where c represents the speed of light.
Following the same strategy, three other decoupled equations can be obtained and can be verified in [28, 29].
The left side of Equation 2.7 can be expanded by performing the vectorial operations bellow.
∂Ey
   
∂Ez i j k
−
 
i j k ∂y ∂z
1 ∂ ∂ ∂  1  ∂E ∂Ez  1  ∂ ∂ ∂
∇ ×  ∂x = ∇×  ∂zx − = (2.8)

∂y ∂z ∂x  ∂x ∂y ∂z
r r r ∂Ez
 
∂Ey ∂Ex ∂Ey ∂Ex ∂Ez ∂Ey ∂Ex
Ex Ey Ez ∂x − ∂y ∂y − ∂z ∂z − ∂x ∂x − ∂y
Adding the expansion of Equation 2.8 to Equation 2.7, Equation 2.9 is obtained.
 2
∂ 2 Ey  1 ∂ Ey − ∂ 2 Ex ∂ 2 Ex ∂ 2 Ez ω2
 
∂ 2 Ex ∂ 2 Ex ∂ 2 Ez − + = Ex
∂x∂y − ∂y 2 − ∂z 2 + ∂x∂z 
 
2 Ex  r ∂x∂y

 ∂y 2 ∂z 2 ∂x∂z c2
1  ∂ 2 Ex ∂ 2 Ey ∂ 2 Ey ∂ 2 Ez  ω   1 ∂ 2 Ex ∂ 2 Ey ∂ 2 Ey ∂ 2 Ez ω2
− ∂x2 − ∂z 2 + = 2 Ey ⇐⇒ r ∂x∂y − ∂x2 − ∂z 2 + ∂y∂z = c2 Ey (2.9)
r  ∂x∂y ∂y∂z  c
∂ 2 Ey Ez

∂ 2 Ez ∂ 2 Ez ∂ 2 Ex 2
 1 ∂ Ey −
 ∂ 2 Ez ∂ 2 Ez ∂ 2 Ex ω2
∂x2 − ∂y 2 + ∂x∂z + ∂y∂z

r ∂y∂z ∂x2 − ∂y 2 + ∂x∂z = c2 Ez
Fourier expansion is now used to represent the field and the refractive index of the medium, the two periodic
parameters of the problem. This method is applied frequently to determine the dispersion relation (Figure 2.1a)
of a PhC due to its periodicity, and thus the importance of the Fourier space. The vectorial operations on
the equations obtained in an analogous way to Equation 2.7 are shown in [28]. The more dimensions are
considered, the more time-consuming the treatment becomes, although not necessarily more complex. In [29],
the same results are shown with a different mathematical treatment for all three dimensions. The mathematical
treatment used to obtain Figure 2.1 follows the method presented in [29].
For a one dimensional PhC, the dielectric constant and field will vary periodically in one dimension only.
For TE modes (transverse-electric mode, with electric field in the x and y direction) and propagation in the z
direction, considering symmetry in the surface plane, Equation 2.9 can be reduced to Equation 2.10 [28].
2
∂ 2 Ey ω2

1 ∂ Ey
− 2
− 2
= 2 Ey (2.10)
r ∂x ∂z c
Assuming the periodicity to be a, the periodic functions will vary as u(z) = u(z + a). This periodicity is
represented by expanding the equation to an infinite sum of sines and cosines (or a complex exponential). The
Fourier expansion of the two periodic properties of the system is given by Equation 2.11 and Equation 2.12
[28].
∞
1 X 2πm
(z) = cm e−j a z (2.11)
r m=−∞
∞
2πn
X
Ey (z) = cn e−j a z e−jkz (2.12)
n=−∞
The Fourier coefficients number is indexed by m and n. The wave vector is represented by the letter k.
An exponential term would be added for x and y if propagation was considered in such direction [28]. By
substituting Equation 2.11 and 2.12 in Equation 2.10, the eigenvalue Equation 2.13 is obtained.
∞ ∞ ∞
!
X
−j 2πm
X 2πn −j( 2πn ω2 X 2πn
cm e a z
( 2
+ k) cn e a z+kz)
= 2 cn e−j a z e−jkz (2.13)
m=−∞ n=−∞
a c n=−∞
The following auxiliary calculation were made to facilitate the substitution.
∂2
Ey (z) = 0
∂x2
∞ ∞
∂2 ∂ X 2πn −j( 2πn
X 2πn −j( 2πn z+kz)
E (z) = −j( + k)c e a z+kz) = −( + k)2 cn a
y n
∂z 2 ∂z n=−∞ a n=−∞
a
Equation 2.13 can be further simplified as explained in [28], however, just by itself, it is converted to an
eigenvalue problem that can be solved numerically to find the frequencies allowed to propagate in k (in this 1D
example, kz ). To solve the problem, the number of terms used on the Fourier expansion have to be limited (n
and m needs to be truncated to have a finite number). The solution converges to a value while increasing the
number of terms used. The Fourier coefficient decreases for higher values of n and m, so the first terms have
a higher impact on the solution [9]. Although a higher number of terms will improve accuracy of the solution,
the computational time is roughly proportional to the cube of n so the number has to be limited [30].
These are the conceptual basis behind the PWEM. This section is based on [28, 29], however, it demonstrates
more sorely the derivation till Equation 2.13. This method is here more developed since the same mathematical
formulation is behind the Fourier modal method, briefly explained in Section 2.3.2.
2.3.2 Fourier modal method

The Fourier modal method (FMM), also named rigorous coupled wave theory, calculates the electromagnetic
propagation through a periodic structure in a non-iterative, deterministic manner [13]. Alike the PWEM, this is
done by expanding the field into pseudo Fourier series and the refractive index of the medium to Fourier series,
and further solving Maxwell’s equations as an eigenvalue problem [31, 32]. A general FMM is divided into
three calculation steps and includes three different space areas. The periodic structure (the PhC) is within the
middle area enclosed by two semi-infinite areas. The incident wave is sent from the top semi-infinite area which
is transparent to radiation (non-absorbent), while the bottom semi-infinite area is fully opaque (absorbent).
On the first step of calculation, incomplete expressions modulating the electromagnetic field throughout the
whole structure are found. Subsequently, the equations are restricted by the applied boundary conditions in
2.3. SIMULATION METHODS 9
order to determine its missing coefficients. On the third step, the quantities of interest (such as transmission
and reflection) are extracted from the obtained coefficients [32].
The FMM was predominantly used in this study through the software package Stanford Stratified Structure
Solver (S 4 ) [30]. This package combines FMM with the scattering matrix algorithm. This extends its function-
ality by modeling wave propagation through a multi-block structure, decoupling recurrences of scattered waves
at the different interfaces [32].
A transmission spectra obtained using S 4 is shown in Figure 2.3. This analysis is done for a square lattice
LiNbO3 photonic crystal slab, replicating the finite-different time-domain (FDTD) modeling and fabrication
work done by Deng et al. [2]. The results obtained between both methods are extremely comparable.
The analysis was done by varying the thicknesses of
the PhC while keeping the other parameters constant (the
lattice constant, a, the radius of the air holes and the
background material). Although not related to the Fourier
modal method itself, it is important to comment briefly the
variation of the transmission spectra with the variation of
the slab’s thickness. A Fabry-Pérot interferometer consists
of two reflecting surfaces (mirrors) enclosing a transmis-
sion medium. Reflections from the mirrors interact con-
structively or destructively, leading to peaks and dips on
the transmission spectra as a function of the wavelength of
light. Since the PhC slab has finite thickness, Fabry-Pérot
oscillations occur within the slab, leading to interferences
that are more visible when the thickness approaches the
wavelength of light [2], which can be seen in Figure 2.3.
2.3.3 Finite element method

The laws of physic are usually described by ordinary
or partial differential equations [33]. On some problems
with complex geometric and material properties, it is not
possible to achieve analytical mathematical solutions and a
study must rely on numerical methods [33, 34]. The finite
element method directs the problem by dividing a more
complex structure into several smaller elements (the finite
elements), connecting them through nodes in a process re- Figure 2.3: Replication of the transmission spectra
ferred to as discretization. Instead of finding a solution for obtained by Deng et al. [2] using S 4
software package.
the partial differential equations that govern the system, The simulations were performed on the same structure
with varying thickness (t/a).
the FEM modulates the discrete elements to create a sys-
tem of algebraic equations, obtaining the solution over the whole system by taking into account the individual
contributions of the finite units [34]. The first step of FEM is the discretization of the structure. The discretized
finite elements affect computational time and required storage but should be chosen wisely to achieve an accu-
rate solution. For a 3D system, the most common elements take the form of hexahedra or tetrahedra, being
the latter more adequate to irregular structures. System areas with higher variation of the quantity of interest
should be discretized by smaller elements. This method was used through the software package COMSOL Mul-
tiphysics [35] which creates automatically an optimized discretization around areas of higher variation, such as
geometric irregularities, although the elements can be further improved. Each of the elements is modulated
by a displacement function, commonly linear, polynomial or cubic which defines the element in terms of its
nodes [34]. The set of algebraic equations for a particular element is equal to the number of its nodes and it
is named element equations. These sets of equations are assembled in a global system of equations on which
boundary conditions are applied to truncate the system. In this study, several different boundary conditions
were applied through COMSOL Multiphysics. As an example, the perfectly matched layer has an anisotropic
complex valued permittivity, whose value increases throughout the thickness of the layer. This assures that no
reflections happen to the electromagnetic light directed at the boundary. The light that is transmitted through
the boundary is gradually absorbed due to the increasing complex permittivity. After applying the boundary
conditions, the global system of equations can be solved for the quantities of interest.
2.3.4 Finite-difference time-domain

Although the final-difference time-domain method wasn’t significantly used throughout this study, a brief
explanation regarding the theoretical concepts behind its functioning is made due to its versatility and impor-
tance to the field. Simulations were performed using the open-source software package MEEP [36]. Equation
2.3 and 2.4 show that time variation of the magnetic field leads to a variation across the space of the electric
field and vice versa, respectively. The FDTD method is based on the solution iteration between these two
relations in order to follow the electromagnetic field evolution throughout the structure as a function of time.
On a 1D scenario (propagation on x), the resulting equations obtained after curling both Equation 2.3 and 2.4
can be combined to decouple the electric and magnetic field, obtaining wave equations as Equation 2.14.
∂2u ∂2u
2
= c−2 2 (2.14)
∂x ∂t
Where u is a function representing E or H. The finite-difference method is now applied through the central
differencing scheme. This discretization method approximates the derivatives of the function by a two point
formula, sampling the field and time into small steps of ∆x and ∆t, respectively. The second order derivative
of u as a function of x and t is shown by Equations 2.15.
n n
∂ 2 u uni+1 − 2uni + uni−1 ∂ 2 u un+1
i − 2uni + uin−1
= = (2.15)
∂x2 ∆x2 ∂t2 ∆t2

i i
The discretization of space is done on the first expression for the before and after position (i) for the same
temporal step (n). The same logic applies to the temporal expression. By substituting Equations 2.15 on
Equation 2.14 and rearranging it, the following relation can be found.
2
c∆t
un+1
i = (uni+1 − 2uni + uni−1 ) + 2uni − un−1
i (2.16)
∆x
The highlighted terms show how the future time step un+1i can be calculated based on past time step uin−1 .
Contrary to the 1D scenario where decoupled wave equations can be obtained, on a 3D scenario, the
coupled Equations 2.3 and 2.4 are discretized using Yee’s algorithm. In this algorithm, the fields and its three
spatial components are treated as a grid with a spatial offset between one another. Each electric field spatial
component is surrounded by four magnetic field components and vice-versa. The electric and magnetic field
are also spaced in time by half-time steps ( 12 ∆t) in a method named leapfrog time-stepping. This algorithm
allows the evaluation of the fields in each ∆t step, yet not at the same instance.
The versatility and simplicity of the FDTD method make it widely popular, existing several softwares and
own-made code based on it. Another advantage is being developed in time domain, which allows a broadband
of frequencies to be simulated in only one run [37].
2.4 Functioning details and simulations on PCSEL

The simulation work on this type of device follows the theoretical analysis performed in [7, 3, 38]. This
analysis will be explained and replications using S 4 on the results obtained by some authors will be made. By
replicating the simulation results of working devices, the written scripts are assured to be correct and thus can
be applied on the actual device studied in this report. The structure here presented is always assumed to have a
square lattice and circular air holes. The first considerations to have are over the PhC’s geometric parameters.
As a first approximation, the lattice constant (a) is chosen to be equal to the wavelength of interest in
order to fulfill Bragg’s conditions. This is a requirement to achieve 2D feedback on the PhC’s surface
plane and further light emission in a perpendicular direction to it.
The radius (and thus the r/a relation) of the circular holes affects differently the functioning of the
device. Although the radius of the air holes doesn’t modify the periodicity of the PhC, it also affects
the wavelength of light that achieves feedback [11] because it changes the overall refractive index of the
structure. This variation also affects the electromagnetic field confinement in the structure’s active region
(as it will be discussed in this section), since it changes the refractive index contrast between the PhC and
the surrounding layers. This is particularly important when fabricating a PhC of the same material as
the surrounding layers (as in this study). To fabricate a similar structure with a Si PhC on top of Si, Liu
et al. [7] used higher radius holes to improve the refractive index contrast in this area of the device. On
the other hand, smaller r/a is preferable to improve the Q factor of the emission (consequently, decreasing
the threshold of the device) [3, 39]. By approaching the radius of the holes to zero, the Q factor increase
is so high that the structure becomes a wavelength-mode resonance [39].
The air hole shape impacts the mode profile. As explained in Section 2.1, one of it’s direct effects regards
its symmetry which may result in leaky or non-leaky modes. The vertical asymmetry of the air holes also
appears to contribute beneficially to the radiation output of the device [1], although this property is still
to be more explored.
2.4. FUNCTIONING DETAILS AND SIMULATIONS ON PCSEL 11
The thickness of the PhC also has an impact on the modes as shown in Figure 2.3. This Figure is of
harder analysis due to light oscillation on the slab, which are more significant for increasing thicknesses.
The resonance peaks due to the PhC are still present but slightly shifted since a thickness variation may
also have an effect on the effective refractive index of the slab [2]. A more important impact regards light
coupling in the 2D feedback mechanism in the PhC. Intuitively, this mechanism is enhanced for better
mode confinement within the slab. An increase in thickness improves mode confinement which translates
in better light coupling, consequently improving the feedback mechanism [11]. This improvement is
calculated to increase up to a certain thickness value, remaining roughly constant for higher values above
it [11].
The size of the PhC impacts the parameters of the device in a non-linear way. The Q factor is significantly
decreased for smaller devices (smaller periodicity) which indicates a decrease of in-plane coupling, with
power escaping from the edges due to week lateral confinement [38]. On a similar device, Liu et al.
[38] showed theoretically and experimentally that lateral size bellow 100a decreases significantly the Q
factor. This lateral confinement can be improved by increasing the refractive index contrast on the edge
of the PhC. In the work developed by Liu et al., the Q factor was significantly increased by limiting the
lateral dimensions by etching (thus creating a lateral PhC/air interface), which improves refractive index
contrast and consequently lateral confinement.
The work and structure done by Zhao et al. [3] was used as an example and the simulations were performed
on it. This study not only achieved worth mentioning results, but describes in a detailed way the structure
fabricated. This is beneficial since it allows a closer comparison between these simulation results and the ones
published by Zhao and its group. The fabricated structure follows the design shown in Table 2.1. The relative
permittivity values on the table aren’t given in [3], but were estimated by considering the materials used.
Table 2.1: Description of the simulated model, based on [3].
Layer material Thickness Relative permittivity

InGaAs 40 nm 12.02
InP 130 nm 10.10
InGaAsP (barrier) 33 nm 11.63
InGaAsP (MQWs) 61 nm 12.24
InGaAsP (barrier) 33 nm 11.63
Si (PhC) 230 nm 10.9
SiO2 400 nm 2.07
At resonance wavelengths there is a peak or a dip in the transmission/reflection spectra, and thus simulations
to obtain these spectras can be used to identify the resonance position. From normal incidence (Γ point),
by changing the incident angle towards the surface plane the photonic band in Γ-X and Γ-M direction can
be obtained. Several studies use the in-plane wave vector kk relation to the incident angle through kk =
2π/λo sin(θ) to calculate the photonic bands in the Γ-X direction, where λo is the wavelength in free space.
Figure 2.4a shows the four resonance peaks (A-D) as a function of the incident light angle on the Γ-X direction.
The transmission spectra was obtained by setting the excitation to a p-polarized incident planewave. P and
s-polarizations refer to the plane on which the electric field of the incident wave is oscillating. On p-polarization
the electric field is within the plane of incidence, and thus the magnetic field is within the PhC’s surface plane in
this situation. The resonance peaks obtained are due to TM modes instead of TE modes (as the modes shown
in Figure 2.1). Some authors perform this analysis on TE modes, while others on TM modes (such as the study
presented here). Although there is no consensus regarding which approach leads to better results, both fields
achieve resonance at around the same frequency range at the Γ point. Since light emitted from the quantum
wells by spontaneous emission should come with different polarizations, both methods should be equally valid.
At normal incidence, almost two of the peaks disappear which means the resonance doesn’t couple with the
incident wave. This is due to the mismatch between the symmetry of the mode and the symmetry of the wave
vector of a diffracted wave from an external incidence source, making coupling forbidden [40].
Since the Fourier modal method is based on Fourier expansion (as explained in Section 2.3.2), the number
of Fourier terms used impacts the results obtained. An ideal expansion would require the use of an infinite
number of terms, so this number needs to be limited. The analysis shown in Figure 2.4a uses 100 Fourier terms
which is sufficient to have a good perception of the PhC’s resonances. The variation of the resonances with an
increasing number of terms is shown in Figure 2.4b. A more significant variation is seen in peaks A and C.
Further on, the confinement factor (ΓM QW ) of the resonance is calculated. This parameter is a measure on
how much the cavity’s field is confined within the active region of the device and can be calculated through
Equation 2.17.
Figure 2.4: Transmission spectra showing the PhC’s resonance peaks. a, peak position variation as a function of the
incident angle. b, for an incident angle of 2◦ , peak variation for different number of Fourier terms (nG) used during
simulations.
R
M QW
u2 dv
ΓM QW = R (2.17)
cav
u2 dv
Where u represents the electric or magnetic field depending on the analysis being done over the TE or TM
modes, respectively. These values are obtained by integrating the field standing wave distribution over the
active region and comparing it to the overall field in the cavity. The field profile of mode D is shown in Figure
2.5a as a function of z (the device’s normal axis) along with the refractive index of each composing material.
Figure 2.5: Simulations done over resonance mode D. a, field profile. b, Q factor extrapolation from the resonance
peak. The number of points were decreased by a factor of 200 to allow better visualization of the plot.
The Q factor of the resonance is then calculated by Fano-fitting the guided resonances in the transmission
spectra. The peaks shown in Figure 2.4 are classified as Fano-resonances due to its asymmetric line shape [41].
This shape arises from the interaction between the discrete resonance state from the PhC with the continuum
states of the background. Equation 2.18 was adapted from [41] to modulate the resonance from the transmission
(T) spectra.
(q + Ω)2 (f − fo )
T = 4sin2 (δ) ×a+b Ω= (2.18)
1 + Ω2 ∆
The parameter Ω allows the extraction of the resonance frequency peak (fo ) and the width(∆) with which
the Q factor can be calculated. The parameter δ is the phase shift of the continuum, and is also related to
q by q = cot(δ). The parameters a and b were introduced to the equation given by [41] to improve fitting
on non-ideal shapes where, for instance, the dip doesn’t achieve a transmission of 0 due to limitations of the
simulation. Fano-fitting done to mode D is shown in Figure 2.5b.
2.5. LIGHT EMITTING MECHANISM 13
Assuming that in-plane loss is negligible, focus can be put on the vertical radiation loss and the gain
threshold (gth ) can be estimated by Equation 2.19.
2π
gth = (2.19)
a Qf actor ΓM QW
The gain threshold is a parameter that estimates which mode is more probable to lase and is correlated
with the actual lasing threshold of the device. This parameter is used to know if the device can actually
achieve lasing, and if so, which mode will do it. The structure should be optimized to have the mode with
the lowest gain threshold to match the wavelength of interest. The obtained confinement factor is of 19.4 %
(Figure 2.5a) and the Q factor is of 1.27x103 (Figure 2.5b). The estimated gain threshold of mode D is of 528.9
cm−1 (compared to 536.2 cm−1 [3]) which is a significantly similar result to literature considering possible small
discrepancies between the structures simulated.
2.5 Light emitting mechanism

In this section, a brief overview over the light emitting processes of the fabricated device is done. This
description is made concise since only basic knowledge of semiconductor materials is required to understand it.
A more detailed focus is put on concepts which will be discussed during results discussion.
The light emitting mechanism used consists of a InGaAsP heterostructure. A heterostructure is mini-
mally composed by a thin layer of one material surrounded by barriers made of another material. This creates
a potential offset in the conduction and valence band between both sets of materials with the creation of a
potential well, with a minimum in the intermediate layer. Since the de Broglie wavelength of the electrons
and holes is comparable with the intermediate layer’s thickness (in this work, of 7.5 nm), discrete energy levels
appear in the conduction and valence band. The carriers wave nature is significant and thus its existence
within the well occurs as a standing wave with discrete energy values. Hence the quantization of the system,
this structure is named quantum well [42]. For a quantum well where the barriers’ potential is assumed as
infinite, the waves correspondent to the quantized energy states are completely confined within the well. For
a real structure (a finite quantum well), the standing waves aren’t completely confined within the walls of the
well, but exponentially decay in the barriers. The energy levels obtained from approximating the structure to
an infinite quantum well are usually higher than the actual energy levels. Using the finite quantum well model,
the results can be obtained in a straightforward way using numerical methods [42, 43].
Since the wave is not strictly confined within the well, in the presence of several quantum wells (a multi-
quantum well structure) with thin barrier layers, the resonant states of the different quantum wells may couple
forming a quasi-bound state between the wells (instead of a bound state for individual wells). Transmission of
electrons between adjacent quantum wells is thus possible and the resulting behavior is called a miniband. This
name exposes the behavior of the carriers, which propagates as if in a band with a smaller energy range. The
energy difference between the different minibands is also smaller compared to the semiconductor’s band gap,
therefore being called of minigap. The set of several periodic quantum wells where this phenomena is verified
is called a superlattice, since the structure sets a second level of periodicity on top of the arrangement of the
crystal [43].
Light emission occurs when electrons in the conduction band recombine with holes in the valence band.
Since electrons are in a higher state of energy, this recombination process leads to energy release in the form of
a photon due to energy conservation requirements. This mechanism is named of band-to-band recombination.
Although this transition should be the dominant recombination process in the MQWs structure of the
fabricated device, two other transitions are common and worth mentioning. The Auger recombination process
(which mainly occurs for high drive currents) is acknowledged to be a common cause of LEDs efficiency drop
[44]. During a band-to-band recombination, the released energy may contribute to the excitation of an electron
in the conduction band, leading it to more energetic states. When the excited electron decays to lower energy
levels in the conduction band, it releases a phonon which increases device’s temperature. Therefore, this
recombination not only decreases directly light emission efficiency, but also increases thermal scattering due
to the release of a phonon. On the other hand, the presence of defects or unwanted atoms in the structure
may lead to an energy level within the band gap, called a trap. The electron decays to this energy level before
recombining with a hole in the valence band. Since the energy difference between the trap and the valence
band is smaller than compared to the conduction band, the photon emitted is also less energetic. Defects on
the active region may also lead to completely non-radiative recombinations. The recombination time of these
transition is significantly lower compared to radiative transitions. As such, defects in the active region decrease
significantly light emission.
Chapter 3
Fabrication technology and process

optimization
A brief description of some of the fabrication techniques used throughout this study is made. Processes
that required optimization or have a substantial role on the device’s fabrication and operation are addressed in
further detail. The term recipe is used to mention a specific set of process’s parameters.
3.1 Lithography
Lithography is a set of microfabrication processes used to transfer a pattern from a mask to a polymeric
photosensitive film (named photoresist or resist) deposited on the substrate of interest. These processes com-
monly rely on UV light in order to expose some areas of the photoresist which can be removed or held in place,
leaving open areas on the substrate that can undergo further processing. Material deposition, etching, plating,
doping and other processes can be done on the substrate, leaving the areas covered with photoresist untreated.
Posteriorly, the photoresist is removed [45].
3.1.1 Electron beam lithography

Although optical lithography is the most conventional method in microfabrication, the resolutions obtained
are limited by the light’s wavelength. When the size of the mask’s aperture is on the same order of magnitude
as the wavelength, diffraction becomes critical which prevents patterning of small features. Several techniques
can be used to stretch the diffraction limits, such as the use of deep UV radiation. Although there are several
available emission sources, the depth of field is limited by the light’s wavelength which also restrains its use.
Other techniques such as the use of x-ray or extreme UV radiation, off-axis illumination and optical proximity
correction are also used, each with limiting disadvantages [46].
This study’s devices were fabricated mainly using standard optical lithography, however, the photonic crystal
features were patterned using electron beam lithography due to its small size. The system is itself very similar to
a scanning electron microscope (SEM) with similar electron beam source and acceleration mechanism, suffering
from similar problems as it [46]. Much like the optical lithography process where the photoresist is sensitive
to the emitted radiation, e-beam lithography relies on electron-sensitive polymers [46]. Limitations are due
to aberrations and although the surface’s footprint is quite reduced, scattering of the beam inside the resist
leads to higher exposure volume [45]. Although high resolutions are achievable, its usage is mainly adopted in
research and for lithography masks’ fabrication since high patterning time and cost are limiting factors.
The e-beam lithography process required for this project was done in The University of Texas at Arlington.
3.2 Chemical mechanical polishing

Although all MOCVD growth stages are done on the front side of the wafer, the described device requires
processing on both sides of it since lasing is done from the back-side. The processed wafers are bought polished
on the front surface (which allows direct MOCVD growth) but the surface roughness on its back side requires
polishing before further steps of fabrication. For posterior comparison, the back-side is characterized by atomic
force microscopy (AFM) and optical microscopy (Figure 3.1). WSXM software [47] is used for data analysis.
Before polishing, the back-side shows several cavities with height differences of roughly 2 µm. Surface
roughness should promote scattering reducing significantly device’s light output.
A solely chemical polishing attempt was done and the results are shown in Appendix A1. Although surface
roughness was decreased, it was still significant for the device’s purpose.
15
16 CHAPTER 3. FABRICATION TECHNOLOGY AND PROCESS OPTIMIZATION
Figure 3.1: Characterization of the wafer’s back-side before polishing. a, optical microscopy showing surface roughness.
b, AFM characterization on a 15x15 µm area. c, 3D rendering of b.
Chemical mechanical polishing (CMP) was used to polish the back side of the wafers. The process was exe-
cuted using Logitech LP 50 Precision Lapping & Polishing Machine with a polishing cloth of shore A/hardness
92 (shore durometer). The slurry used was sodium hypochlorite based fluid which promotes polishing through
two independent mechanisms: mechanical etching due to abrasive particles and chemical etching. Since the
information is proprietary, no detailed information was given by the manufacturer. However, the chemical
processes promoted by the used slurry should be related to the ionogenic nature of III-V materials such as
InP which is capable of forming ions that bond with the slurry, leading to the dissolution of InP. The slurry
is dispensed at a rate of 1 drop per second. This rate is substantially uncertain but also forgiving. The major
criteria is that the pad is kept wet throughout the process. The pad is moved at 80 rpm and the substrate
holder is kept rotating at 60 rpm. The process time averaged to around 15 min with an etch rate of 1 µm/min.
This value should be used as a reference and not as absolute, since the etching rate is decreased with further
usage of the pad. The wafer is attached to a substrate holder using a mounting wax (#71-10040 from Allied
High Tech Products, inc.) soluble in acetone. A transducer indicator was used to measure the wafer height in
order to assure uniform polishing. Height differences within the wafer were assured to be bellow 40 µm before
starting the process. A microscope inspection should always be performed afterwards to confirm the quality of
the process.
Results obtained are shown in Figure 3.2 with visible improvements compared to Figure 3.1. Height varia-
tions decreased from roughly 2 µm to 14 nm and follow a normal distribution (Figure 3.2c) centered at around
6.2 nm. Scratches shown in Figure 3.2b are common in polishing processes from dragging released particles.
The RMS roughness (deviations of the profile height to the mean line) is of 1.48 nm. Several particles are seen
in Figure 3.2b showing the need of a more intense cleaning process. A smaller scan is shown in Figure 3.2d
showing the limitation of this polishing process with the polishing pads used.
3.3. PLASMA-ENHANCED CHEMICAL VAPOUR DEPOSITION 17
Figure 3.2: Characterization of the wafer’s back-side after CMP. a, optical microscopy. Image contrast was increased by
50 %. b, AFM characterization on a 15x15 µm area. c, roughness analysis on data shown in b. d, AFM characterization
on a 1x1 µm area.
3.3 Plasma-enhanced chemical vapour deposition

On several stages of the project, SiO2 was deposited to serve as a hard mask or as an actual component of
the fabricated device. This deposition can be done using several chemical vapour deposition (CVD) techniques,
some of them requiring the use of high temperatures (thermal CVD processes). Depositions that require the
use of high temperature limit the range of substrate materials that can be processed. To reduce the deposition
temperature, the precursor gases can be decomposed and its reaction promoted using plasma, in a process
named plasma-enhanced chemical vapour deposition (PECVD) [45]. In this method, a RF field is produced
in between the substrate (bottom electrode) and the top electrode to produce the plasma and promote the
deposition. As a disadvantage, the SiO2 deposited is not stoichiometric, being less dense and possibly having a
different refractive index [45, 48] compared to thermal SiO2 . Although the quality of the oxide produced allows
its use as isolation and hard mask, it may decrease the quality of the anti-reflection coating due to variations
of the refractive index.
A silane (SiH4 ) and nitrogen peroxide (N2 O) gas sources are used to deliver silicon and oxygen, respectively.
The recipe used deposits 195 nm/min. More detailed information regarding the recipe is shown in Appendix
A2.2.
3.4 Metal organic chemical vapour deposition

Although this technique wasn’t performed by me during the course of this work, its high importance for
the manufacturing of the device requires that a brief explanation of it is given. For the production of the
device, different III-V compounds (InP, InGaAs, InGaAsP) were grown by metal organic chemical vapour
deposition. This technique mostly uses metalorganic compounds with alkyl radicals attached [49], for instance,
trimethylindium ([CH3 ]3 In) as an indium source, trimethylgallium ([CH3 ]3 Ga) as a gallium source, arsine
(AsH3 ) as an arsenic source and phosphine (PH3 ) as a phosphorus source. These were the compounds used
during this project. Reactants are mostly transported to the reactor using hydrogen through the bubbler
systems [49]. Dopants can also be introduced in several forms. Liquid diethylzinc ([C2 H5 ]2 Zn) is introduced
in the reactor by a bubbler for p-type doping while n-type doping can be obtained with silicon, whose source
used during this study was silane (SiH4 ) in gas form. The reactor used has a horizontal geometry, promoting
gas flow parallel to the wafer’s surface. The substrate holder is rotated throughout the process to homogenize
growth rate. The gases decompose and are adsorbed on the heated surface, where mass flow occurs and growth
can be achieved [49].
Figure 3.3: SEM images of MOCVD doped/undoped InP heterostructure on a, a trench. b, on flat wafer surface.
An example of a InP MOCVD layer on InP substrate is shown in Figure 3.3. Side defects are due to cleaving
and not due to the growing process itself. The shown layer is a heterostructure with n-doped and undoped InP.
Undoped InP can be selectively etched which creates a depth contrast between the two materials grown (one
layer of each indicated by a red line in Figure 3.3a). This is useful to understand the growth directions of the
layer. In this Figure, growth is done on the trench over the (111) plane. This is the less surface energy plane
[50, 51] so growth should be preferential. Figure 3.3b shows the obtained top surface after MOCVD growth in
a plane surface.
3.5 Electron beam physical vapour deposition
The metalization steps for contact formation were done by electron beam physical vapour deposition (EB-
PVD). Within a high vacuum chamber, electrons are accelerated towards a metal boat (usually made of tungsten
due to its high melting point). The metal to be deposited is placed inside the metal boat where it evaporates,
posteriorly depositing all over the chamber. The system used allowed substrate rotation to increase deposition
uniformity. Deposition rate is monitored using a piezoelectric crystal resonator.
3.5.1 Annealing
The set of metals used (InP-Ti/Pt/Au) for the electrodes was based on the work done by Katz, A et al. [52]
and it will be further explained in Section 5.1 of Chapter 5. This study obtained optimized results for rapid
thermal annealing (RTA) at 450 ◦ C for 30 s. The fabricated devices were functional before any annealing step
but great improvements were verified after annealing. This process was done using a conventional furnace which
requires a step increase in temperature. Two different temperature schemes were tried based on information
from previous works. The used temperature schemes are shown in Table 3.1.
3.6. DRY ETCHING 19
350 ◦ C 375 ◦
C
Step Time Temp. Time Temp.
1 10 200 10 200
2 5 250 5 250
3 10 250 10 250
4 3 275 3 275
5 4 300 4 300
6 3 330 3 330
7 3 350 3 350
8 1 350 3 375
9 30 50 1 375
10 30 50
Table 3.1: Step temperature increase used. Time is

shown in minutes and temperature (temp.) in Cel- Figure 3.4: IV measurement of a device after differ-
sius. Values shown in bold represent periods where ent annealing temperatures.
temperature remains stable.
There is a clear improvement on the IV behavior of the device after the annealing process, as shown in Figure
3.4. This improvement is qualitatively visible in terms of the threshold voltage decrease and overall resistance.
A quantitative analysis over the annealed devices is done in Chapter 7. The furnace used (Programmable
Process Furnace PEO-603) overshoots the temperature in the chamber in comparison with the input value.
For an input of 350 ◦ C, chamber’s temperature is of around 380 ± 15 ◦ C. A similar increase is verified for an
input temperature of 375 ◦ C. No further optimization was done due to time and material shortage. Although
a proper comparison cannot be done in between input temperature of 350 ◦ C and 375 ◦ C based on only one
device, information from previous works showed that 350 ◦ C leads to better results. As such, an annealing
process with input temperature of 350 ◦ C was performed to all devices.
3.6 Dry etching

Wet etching allows material removal with economical and straightforward processing. The etchants used
can be selective to a particular material or orientation [48] and etching rates can be significantly modified by
changing the concentration of the etchant. However, etching is mostly done in an isotropic manner which leads
to non-vertical side-walls and thus lost of pattern features.
Dry etching techniques provide significantly lower lateral etch rates due to unidirectional etching, translating
to accurately reproduced mask patterns [45, 48]. This study required several dry etching stages to fabricate
the several SiO2 hard-masks and to etch InP to produce the photonic crystal layer of the device.
3.6.1 Magnetically-enhanced reactive ion etching

Reactive ion etching techniques promote the formation of plasma due to alternating electromagnetic fields.
Plasma is mainly formed by a radio frequency field (13.56 MHz) which allows the ionization of gases in a vacu-
umed chamber [45]. Magnetically-enhanced reactive ion etching (ME-RIE) is a reactive ion etching technique
that further improves ion and free-radical densities in plasma by applying a magnetic field [53]. Large mass
ions and radicals aren’t significantly affected by the applied magnetic field, but electrons travel in a helical path
due to the promoted Lorentz force. Since the mean free path is increased, impact ionization is also increased
which leads to a more energetic plasma [53].
A SiO2 dry etching procedure was optimized using Applied Materials Precision 5000 Mark II to form the
several hard masks used throughout this study. Although other recipes were optimized previously by other
groups, none of them could be used directly in our study due to the size of the wafers used (2”). Applied
Materials Precision 5000 Mark II is prepared for 4” wafers’ processing and thus it required the usage of a
carrier wafer to place the 2” wafers in the chamber. The carrier wafer decreased the cooling efficiency of the
process and led consistently to burned resist. The optimized recipe uses significantly low RF power, decreasing
plasma energy and thus energy transference to the resist. Thermal balance is still not completely achieved on
a continuous etching scheme, so a pulsed etching process (with etching steps of 30 s) is required. The effect
of the optimized recipe in two different regions of the wafer (Pattern 1 and Pattern 2) is shown in Figure 3.5.
Due to time shortage, a small sample size was collected and thus no error bars were added to the Figure.
Parameter
Substrate temperature (◦ C) null
Pressure (mT) 150
RF Power (W) 150
Magnetic field (G) 30
Gas 1/Flow (sccm) CHF3 15
Gas 2/Flow (sccm) CF4 5
Gas 3/Flow (sccm) Ar 50
Gas 4/Flow (sccm) He 8
Time (s) 30
Table 3.2: Parameters used for SiO2 etching.
Figure 3.5: Step size of etched SiO2 as a function of time.
Photoresist was patterned in order to only expose some areas of the SiO2 , and thus the shown steps include
the thickness of the resist deposited by spin-coating. The area limited by vertical red lines (from 0 to 6 min of
etching) can be used to obtain the joint etching rate of SiO2 and resist (MEGAPOSIT SPR-700 from Rohm
and Haas). The step is decreased from 9.5 to 12 min (area limited by black vertical lines) because the SiO2 was
etched completely and thus only the resist thickness is being decreased. Considering both areas of the Figure,
the SiO2 etching rate was found to be of 37 ± 4 nm per minute. The recipe was used numerous times with
good reproducibility.
The different gases and process parameters used are shown in Table 3.2. Ionized CHF3 leads to charged
species as CF+3 that are accelerated against the substrate and etch it due it impact. CF4 leads to radical
formation which is extremely reactive, leading to chemical etching [45]. Ar is a non-reactive gas with higher
mass which should promote physical etching. The cooling of the wafer is done by He.
3.6.2 Inductively coupled plasma - reactive ion etching

Just as ME-RIE, conventional reactive ion etching systems use chamber produced plasma to etch a material
of interest. The process behind it is both chemical and physical, being the latter non-selective. To improve
the plasma density and thus the etching rate, higher RF power has to be used which will also lead to higher
self-biasing voltage on the system’s cathode where the wafer is placed. This will increase plasma density and
lead to a higher etching rate, but due to the higher voltage towards the cathode, ion sputtering (physical)
processes will rise and selectivity is lost [46]. Inductively coupled plasma - reactive ion etching (ICP-RIE)
promotes the generation of plasma in a separate chamber. The etching chamber has a second RF power source,
which allows independent control of the self-biasing voltage. This dual-chamber architecture allows high plasma
density while maintaining the selectivity of the plasma towards the material of interest [46].
ICP-RIE was used to etch exposed InP areas while covering further areas with a SiO2 hard mask. The
recipe used was optimized by Shahid, N. [48] in the same system used in this study. More detailed information
regarding the recipe is shown in Appendix A2.1. The gases present are Cl2 , CH4 and H2 . These compounds
react with InP to form volatile substances such as InClz and In(CH3 )z [54]. Although H2 may be part of the
etching mechanism by producing PHz compounds, its presence should mainly contribute to the passivation of
the side-walls and thus increase etching anisotropy. The wafer is introduced in the chamber using a Si carrier
wafer which is also etched throughout the process. This etching mechanism is improved with the presence of
H2 and released Si leads to the formation of a SiOz passivation on the etched side-walls, increasing anisotropy
[48, 55].
Some of the results obtained for micrometer sized structures using this method are shown in Figure 3.6.
Etching rate is shown to be dependent on feature size. For the structures shown in Figure 3.6a (lines with
1.5 µm width), measured etching rate is of 197 ± 11 nm. The interior angle obtained with this recipe is of 83
± 4◦ .
For a 126 s etching process done on smaller structures (circler holes with 130 nm diameter) obtained by
e-beam lithography, measured etching rate is reduced to 132 ± 9 nm with similar interior angle (Figure 3.7a).
3.7. WET ETCHING 21
Figure 3.6: SEM images of InP etched samples using ICP-RIE. a, cleaved profile of a line. b, top view of different
patterned shapes (the inset shows a cleaved profile of a triangle).
Side-wall profile is slightly worsen for deeper etching (190 s) as shown in Figure 3.7b.
Figure 3.7: SEM images of InP etched samples using ICP-RIE with a hard mask patterned by e-beam. a, etching
duration of 126 s. b, etching duration of 190 s.
3.7 Wet etching

As mentioned in Section 3.6, wet etching is mostly isotropic which limits its application when sharp features
are required. However, its availability and the possibility to control the etching rate by using different etchant
concentrations can be beneficial.
During this study, wet etching was used to pattern the alignment marks and to improve the electrical
isolation of the device by etching trenches around it (creating a mesa structure). As such, two wet etching
recipes were tested and its etching rate estimated and optimized.
For InP etching the chosen etchant was HCl:H3 PO4 (1:10) whose composition is standard in the industry
since it can be highly anisotropic and it doesn’t etch InGaAs and InGaAsP [56, 57]. The etching mechanism
is mainly dependent on the HCl concentration since the original bonds of InP are replaced by In-Cl and P-H
leading to its dissolution [58]. Etching rate is decreased for higher concentrations of H3 PO4 [57] because it
decreases HCl mobility in the solution. Ionogenic III-V materials such as InP can be etched using H3 PO4 which
should dissolve the material by releasing an indium cation and PH3 [59]. This etchant also allows oxide removal
which should keep the reaction even if oxide is formed [59, 60].
InGaAs etching was performed by using H3 PO4 :H2 O2 :H2 O (3:1:100). As opposed to HCl:H3 PO4 , the
etchant profile is isotropic so it should be avoided if sharp features are required. This etchant is selective
to InGaAs and thus the InP and InGaAsP etching rate is significantly reduced [56]. The etching mechanism
should be regulated by two independent reactions. While H2 O2 promotes oxide formation, H3 PO4 subsequently
removes it [60].
Figure 3.8: Step size of etched InP and InGaAs using HCl:H3 PO4 (1:10) and H3 PO4 :H2 O2 :H2 O (3:1:100) as a function
of time, respectively.
The etching rates of both InP and InGaAs are shown in Figure 3.8. Compared to dry etching, the estimated
etching rate uncertainty is significantly higher. InP etching rate by HCl:H3 PO4 (1:10) was shown to be 424
± 98 nm per minute. InGaAs etching rate by H3 PO4 :H2 O2 :H2 O (3:1:100) is of 75 ± 16 nm per minute. As
the uncertainties show, wet etching shouldn’t be used when high precision is required. However, the obtained
uncertainties may be reduced by proper steering and heat control.
Chapter 4
Regrowth trial
A limiting step on the fabrication of the PCSEL is on the MOCVD regrowth stage. As shown in Figure
1.1, after the first MOCVD growth, the wafer is e-beam patterned in order to fabricate the PhC. Posteriorly,
there is a second regrowth stage that should form the cladding and contact layer, while leaving the PhC’s air
holes intact. In order to study the viability of this process stage, two different tests were performed. First,
using samples produced with standard lithography, features’ deformation was analyzed after it being exposed to
different annealing temperatures. Secondly, re-growth trials were done on samples whose feature size is similar
to the expected features of the PCSEL’s PhC. Since my participation in the latter stage was mainly related to
ICP-RIE of InP, the complete study is not shown. Some comments are given to some of the obtained results.
4.1 Annealing tests

Temperatures ranging from 550 ◦ C to 700 ◦ C [61] are usually required to grow InP by MOCVD. In order to
successfully grow on top of the PhC, its features need to withstand temperatures in that range without major
deformation. In order to perform this study, a basic lithography mask was designed. This mask (Figure 4.1a)
contains several different sized shapes (circles, squares and triangles) and lines. The lines showed to be mainly
useful for depth measurements during different process optimizations (Chapter 3), while the different shapes
allowed easier qualitative view on the feature deformation after each annealing run.
Figure 4.1: The lithography mask used for the annealing tests. a, a picture of the mask. b, a microscope picture of 2
µm features.
The study was conducted for 10 min at 3 different temperatures - 580 ◦ C, 630 ◦ C and 680 ◦ C - since it is a
temperature range where MOCVD growth is achievable. The samples are kept in the chamber during warming
and cooling of it with duration dependent on the temperature tested. Each produced sample was cleaved into
two and only one of the parts was annealed. This allows direct comparison between both parts since lithography
conditions are thus the same. The samples are annealed in a phosphine environment to stabilize phosphorous.
Results of annealed samples in an arsine environment can be seen in Appendix A3. Table 4.1 shows before and
after annealing pictures of InP samples without a capping layer.
23
24 CHAPTER 4. REGROWTH TRIAL
Table 4.1: Before and after annealing profile SEM pictures at several temperatures (T) for 2 µm lines.
T (◦ C) Before annealing After annealing
580
630
680
Results are quantified by measuring the top and bottom surface variation of the trenches width. Although
several lines and shapes were analyzed, the quantification is done over the side profile of 2 µm width lines.
Quantification was done using ImageJ [62] and is compiled on Table 4.2. Due to the small sample size, the
measurement is presented without its respective uncertainty.
Table 4.2: Line width quantification (top and bottom surface of 2 µm lines) done over SEM pictures of the annealed
and not annealed samples at 3 different temperatures.
T (◦ C) Top surface variation (%) Bottom surface variation (%)

580 2.3 -17.5
630 2.4 -26.5
680 5.9 -19.9
Due to uncertainties regarding viewing angle, surface roughness, difficulties while positioning the measuring
cursor on the annealed samples due to the lack of sharp edges and the small sample size, the results shouldn’t
be interpreted as absolute. However, it clearly shows a significant decrease of the line width at the bottom
surface of the feature (of around - 21 %) and a slight increase on the top surface (of around 3 %).
These results quantify the substantial deformation that is faced by the features while exposed to high
temperatures (required for MOCVD growth). In order to suppress this effect, different capping layers were
tested similarly. Tests using annealed samples with a capping layer of SiO2 (approximately 235 nm) and
InGaAs (approximately 15 nm) were also carried at 630 ◦ C using different annealing environments (arsine and
phosphine). Results are gathered in Table 4.3 and can be compared to the sample annealed at 630 ◦ C without
capping (Table 4.1).
Quantization not only was done by measuring the top and bottom width of the 2 µm lines, but also the
width in between the top and bottom surface due to the obtained step profile. Results are compiled in Table
4.4.
4.1. ANNEALING TESTS 25
Table 4.3: Before and after annealing profile SEM pictures at 630 ◦ C for 2 µm lines at different annealing environments.
Capping/
Before annealing After annealing
Environment
SiO2 /
Phosphine
InGaAs/
Arsine
InGaAs/
Phosphine
Table 4.4: Quantification of the line width (top, middle and bottom width of the 2 µm lines) done over SEM pictures
of the annealed and not annealed samples with different capping layers. Environment (Env.) is of phosphine (P) or
arsine (As).
Capping Env. Top variation (%) Middle variation (%) Bottom variation (%)
No cap. P 2.3 -10.5 -17.5
SiO2 P -1.6 -2.23 -21.5
InGaAs As 4.5 2.5 1.2
InGaAs P 4.0 8.4 6.5
The results are significantly improved by using a capping layer. The main reason of variation of the uncapped
samples (Table 4.1) should be related to material flow on the top surface. This leads to the re-shaping of the
feature to less energetic crystal planes. Capping the sample with materials that withstand higher temperatures
prevents this movement.
On the SiO2 capped sample, the walls are kept straight except near the bottom surface where a significant
variation is observed. This variation may not be due to material flow on the top surface, but mainly due to
material flow on the bottom surface. Surface roughness appears to be decreased and material should accumulate
on the edges of the bottom surface forming (111) planes. These (111) planes are also verified in the InGaAs
capped sample annealed in phosphine (InGaAs-P).
Regarding the InGaAs capped samples, the variation is extremely reduced on both annealing environments.
The visible surface roughness on the InGaAs capped sample annealed in arsine (InGaAs-As) in comparison
with the flat surface of the InGaAs-P is probably due to exchange reaction of As with P, which is not stabilized
in an arsine environment. This leads to lattice mismatch at the surface which promotes surface roughness.
Although not visible in the pictures of Table 4.3, the surface of InGaAs-P is slightly degraded because arsine is
26 CHAPTER 4. REGROWTH TRIAL
not fully stabilized in a phosphine environment. As such, the best capping and temperature rising conditions
(a phosphine environment would have to be established right before the InP regrowth would start) for the
regrowth are an InGaAs layer in an arsine environment.
Comparisons of the 2 µm shapes (circles, squares and triangles) between the annealed and not annealed
samples for the several capping layers and environments at 630 ◦ C are shown in Appendix A3. Such as the
features shown in this Chapter, the results shown considerable deformations even when a capping layer is used.
This is mainly visible in the sample with a SiO2 capping layer, since the capping layer prevents top deformation
but the feature is still re-shaped in its interior. To understand if re-shaping can be avoided for significantly low
temperatures, a sample with e-beam patterned features and no capping was annealed at 470 ◦ C in a phosphine
environment. The before and after results are shown in Figure 4.2.
Figure 4.2: SEM images of feature re-shaping with annealing at 470 ◦ C. a, before annealing. b, after annealing.
These results show that feature re-shaping cannot be avoided without the use of a capping layer. Possibly,
side wall passivation is also required.
Figure 4.3 shows the orientation of the crystallographic planes of
the obtained diamonds after annealing. The shape of an object is set
in order to minimize its total surface energy [63]. Lower surface energy
crystallographic planes are thus expected to prevail on the equilibrium
shape [64]. If surface energy is high, re-shaping is inevitable. Since
the features are formed by ICP-RIE, the exposed surfaces are defective
and contain several dangling bonds which lead to the high surface en-
ergy of the plane (even if some side-wall passivation process is present,
as mentioned in Section 3.6.2 of Chapter 3). The obtained diamond
shape is defined by four (100) planes whose surface energy is signif-
icantly lower than higher Miller indexes faces, which are obviously
present in the circular feature before annealing. In a diamond struc-
ture, considering minimization of the surface energy, the planes (111)
should be favorable to (100) [50, 51]. This implies that the structure
should be in a metastable configuration only. For higher temperatures,
the outcome should follow the results shown in Figure 4.1 with a clear
preference over this particular (111) plane. This also explains the lack
of a particular trend in the results shown in Table 4.2 for different tem-
peratures. The higher temperatures used don’t allow the structure to
be kept in the metastable state shown in Figure 4.2b, re-shaping the Figure 4.3: Information regarding crys-
walls to the less surface energy structure with (111) planes. tal orientation of the features after anneal-
ing.
4.2 Regrowth tests
As mentioned, my participation in this stage of the project was limited to ICP-RIE of InP samples. As such, the
full study is not presented and only one of the best achieved results is shown in Figure 4.4. The heterojunction
shown in Figure 4.4 (lines parallel to the surface) is of doped and undoped InP. This is done throughout all the
regrowth stage. As shown in Figure 3.3 of Chapter 3, a stained etching process selective to undoped InP can
be done after MOCVD (providing contrast) to further analyze mass transport and kinetics of the growth. This
4.2. REGROWTH TESTS 27
is helpful to optimize the MOCVD growth conditions in order to improve the shapes of the features and the
top surface of the structure. To achieve these results, growth conditions were changed after closing the holes
in order to obtain better surface uniformity.
Figure 4.4: SEM images of a successful regrowth trial.
Further details of the study are expected to be reported further on.

Chapter 5
Device architecture and considerations
In this chapter, the different fabrication choices and layer specifications will be justified. These considerations
are taken into account while designing the lithography masks created for this project, which will be presented.
The fabricated LED and the intended PCSEL follow the structure shown in Figure 5.1. These schematics
are analogous but yet more detailed compared to the one shown in Figure 1.1.
Figure 5.1: Schematic of the PCSEL structure.
Each of the layers, its thickness, description and corresponding material is shown in Table 5.1. This table
follows the layer numeration shown in Figure 5.1.
5.1 Electrodes
This section refers to layers 1 and 28 of the device.
To decrease process complexity, the device is fabricated with only one metalization step in each side of the
wafer. This avoids a second metalization step commonly used to deposit the pads. This step is frequently
required in order to deposit a different metal on top of SiO2 , which promotes adhesion of other top metals
that otherwise would take off (for instance, Au doesn’t adhere to SiO2 ). Although several metal combinations
were studied with successful results on n-InP and p-InP in previous studies [65, 66], most require rapid thermal
annealing and/or a second metalization step. In order to surpass the problem, the metal combination used was
of Ti/Pt/Au. This metal combination is based on the work by Katz, A. et al. [52]. This strategy was used on
both sides of the device since ohmic contacts are formed both on Zn doped p-InGaAs and S doped n-InP. Au is
used as the bonding pad due to its high corrosion resistance and low resistivity. Pt serves as a diffusion barrier
layer, avoiding Ti-Au reactions that would lead to the formation of α and β TiAu phases [52] which have a low
work function. A higher work function is preferable for p-type contacts [67], and thus Schottky contacts may be
formed with p-InGaAs if a diffusion barrier is not used. Ti promotes good adhesion to the semiconductor and
to the oxide, allowing the one step metalization pretended. Ohmic contacts are formed without any posterior
annealing step using this metal combination, however, contact resistivity can be substantially decreased through
a 30 s RTA process at 450 ◦ C. Katz, A. et al. [52] achieved a minimum contact resistivity of 5.5x10−7 Ω.cm2
and 8.0x10−6 Ω.cm2 for the p and n contacts, respectively.
The device’s bottom electrode (layer 28, p-side) is formed by creating an opening on the SiO2 isolation layer,
as shown by the lithography mask schematic on Figure 5.2b (blue square). There is no particular limitation
regarding the thickness of the deposited metal rather than being thicker than the SiO2 isolation of 195 nm .
The device’s top electrode (layer 1, n-side) is ring/window shaped and is achieved by a lift-off process. This
electrode is formed by creating an opening on the SiO2 anti-reflection and isolation layer, as shown by the
29
30 CHAPTER 5. DEVICE ARCHITECTURE AND CONSIDERATIONS
Table 5.1: Detailed description of each PCSEL’s layer. Layer X may not be required in the actual device. Q 1.2 refers
to In0.485 Ga0.515 As0.83 P0.17 while Q 1.5 refers to In0.76 Ga0.24 As0.83 P0.17 . The air filling factor of the PhC is given as ff.
Thickness Refractive Doping

Layer Description Material Dopant
(nm) index (cm−3 )
1 Electrode (ring) From air to InP:
Au 250 0.524-10.742i
Pt 60 1.772-16.193i
Ti 50 3.685-4.609i
2 Anti-reflection SiO2 270 1.44
layer / isolation
3 Substrate InP 350 000 3.17 S 3x1018
4 Buffer layer InP 50 3.17 Si 2x1018
5 Spacer layer InP 40 3.17 Undoped
6 ... MQWs Q 1.2 (x9)/ 7.5 3.4 Undoped
22 Q 1.5 (x8) 7.5 3.5
23 Spacer layer InP 65 3.17 Undoped
24 PhC InP 415 1xff + Undoped
3.17x(1-ff )
X Capping layer In0.53 Ga0.47 As 5 3.595 Undoped
First 100 nm
undoped;
Regrowth
25 InP 1781 3.17-0.001i Zn increased
(p-clad)
doping till
layer 23.
26 Contact layer In0.53 Ga0.47 As 60 3.595-0.075i Zn 1x1019
27 Isolation SiO2 195 1.44
28 Electrode From InGaAs to air:
Ti 50 3.685-4.609i
Pt 60 1.772-16.193i
Au 250 0.524-10.742i
lithography mask schematic at Figure 5.2c. The deposited metal needs to be thicker than the SiO2 layer of 270
nm, but still be reasonably thin to facilitate the lift-off process (resist will lift-off on the grey areas of Figure
5.2d).
Figure 5.2: Selected area of the designed lithography masks. a, trench opening for device isolation (p-side). b, opening
for the back-side (p-side) electrode within the isolation. c, opening for the top-side (n-side) electrode. d, resist patterning
for lift-off process around top-side (n-side) electrode. Blue squares on a and b are used as e-beam lithography alignment
marks.
5.2 Anti-reflection and isolation layer

This section refers to layer 2 of the device.
The SiO2 on the top side of the device carries two functions. First, it is used as an isolation layer to
prevent direct contact between the metal and the semiconductor on undesirable areas. Secondly, it is used as
an anti-reflection layer, increasing light transmission from the device to its exterior. For simplicity, a single
5.3. BUFFER LAYER 31
layer anti-reflection coating is used. Compared to multi-layer coatings, the use of only one layer improves
transmission for a narrow wavelength range. Even so, since the laser spectrum is expected to be narrow,
it should be suitable for this application if correctly tuned. By following the normal incidence transmission
relation obtained by Fresnel’s equations and considering the two interfaces the light faces (from InP to SiO2
and from SiO2 to air), we can obtain an estimation of the proportion of reflected light from InP to air. From
Fresnel equations it can be estimated that the ideal coating to maximize transmission is equal to the geometric
mean between the interior and exterior material. In the considered system, the ideal refractive index would
be of 1.78. Two easily available coating are of SiO2 and Si3 N4 . The reflectivity of each of these coatings as a
function of its thickness is shown in Figure 5.3. Due to the multiple interfaces of the system, instead of using
directly Fresnel’s equations, Figure 5.3 is obtained by the transfer matrix method which allows a more complete
estimation by considering that the reflections themselves are also posteriorly reflected/transmitted.
As shown, only the ideal coating with refractive index of
1.78 can achieve zero reflectivity. Since the refractive index
of Si3 N4 is closer to the ideal value than SiO2 , reflectivity
can go as low as 1.3 %. The minimum reflectivity obtained
by using SiO2 is of 4.4 %. Since both of these values are sig-
nificantly low, SiO2 is used on this device since deposition
and etching processes (Chapter 3) were already optimized
for it. The minimum reflectivity for any coating layer is
achieved for a thickness of a quarter light’s wavelength in
the material. When light reflects at the second interface,
it travels backwards another quarter wavelength distance,
being 180 ◦ out of phase with the first reflection, avoiding
it due to destructive interference between both waves. If no
anti-reflection coating is present (direct InP-air interface), Figure 5.3: Reflectivity of SiO and Si N coatings
2 3 4
reflectivity would be of 27 %. as a function of its thickness for 1550 nm wavelength.
An ideal coating (refractive index of 1.78) is also plot-
ted.
5.3 Buffer layer
A thin buffer layer is commonly used in between the substrate and the active layers of the wafer. This layer
also accommodates a slight lattice mismatch that can exist and smooths out the surface for posterior growth
stages.
5.4 Spacer layer

A spacer layer is used to separate the active region of the device (MQWs) from the doped semiconductor
layers. A major concern regards the diffusion of Zn from the device’s p-side to the MQWs. The electron
acceptor character of this p-dopant may lead to unwanted (not light-emitting) carrier recombination on the
device’s active region. Studies done on Zn diffusion on InP using diethylzinc (the same Zn precursor used during
this study) showed that diffusion depths of 1.5 µm are achieved during the colling down of the reactor with a
constant diethylzinc flow [68]. Although conditions aren’t comparable between the study and our project, it
shows the spacer layer importance for the functioning of the devices.
In a processing perspective, layer 23 is also important to avoid damaging of the MQWs during the PhC
(layer 24) etching step.
Both spacer layers function also as a cladding layer, although its not its main role in the device’s functioning.
5.5 Multi-quantum wells

This section refers to layers 6 to 22 of the device.
The MQWs form the device’s active region and are responsible for the emission of light at 1550 nm. As
explained in Section 2.5 of Chapter 2, carriers are confined by reducing the width of the well which leads to
discrete energy levels. By tunning the width (as shown in relation to the capping layer in Section 5.7) and
strain of the well, the energy levels can be tuned to promote 1550 nm light emission from carrier recombination.
Although it improves confinement in the conduction band, strain has a bigger impact in the valence band near
the Γ point. The crystal symmetry produces degenerate valence bands at the Γ point corresponding to light
and heavy hole bands (named by the capability of the carrier to move within the crystal). By straining the
well and distorting crystal’s symmetry, the light and heavy hole bands are separated. Therefore, strain has a
role on the energy levels (especially in the valence band) and has to be tuned according to the wavelength of
interest.
The active region of the device is composed by 8 quantum wells. Each well is made out of wider bandgap
In0.485 Ga0.515 As0.83 P0.17 (Q 1.2) and narrower bandgap In0.76 Ga0.24 As0.83 P0.17 (Q 1.5), from which the carriers
recombine. Electrons and holes favor Q 1.5 regions due to its lower potential (narrower band), recombining in
the well. This interface is classified as type I [43].
The light emission wavelength is adjusted through several calibration trials from which the strain and the
emission peak is analyzed through x-ray spectroscopy and photoluminescence. As mentioned in Section 3.4
of Chapter 3, the MOCVD growth wasn’t performed by me during this work. As such, no further details are
given.
5.6 Photonic crystal

Due to time limitations, the results referring to the photonic crystal of
the actual device aren’t published in this work. This work is ongoing and
should be completed in the following months.
5.7 Capping layer

This section refers to the layer stated as X in Table 5.1. This layer is
not present in the LED devices, but may be present in future PCSEL’s
structures.
As shown in Chapter 4, the features on InP tend to be significantly
deformed during high temperature processes (such as MOCVD) due to sur-
face mass flow and re-shaping to less energetic crystallographic planes. This
phenomena is diminished with the use of a capping layer, such as InGaAs,
which improves substantially the shape of the features after the annealing
process. InGaAs is problematic since it absorbs 1550 nm wavelength (bulk
InGaAs has a bandgap of 0.74 eV [69]) and thus it would decrease light Figure 5.4: Wavelength from
output. In order to avoid absorption by this layer, its thickness needs to be which light absorption occurs as
sufficiently small in order to promote confinement. As mentioned in Section a function of the InP/InGaAs/InP
2.5 of Chapter 2, the energy levels of a finite well can be determined nu- well’s width.
merically. The width of this layer (of the well) needs to be reduced enough
in order to have the lowest transition energies higher than the 1550 nm wavelength’s energy. By matching
Schrödinger equation outside and inside the well, Equations 5.1 can be derived. For a detailed explanation, the
interested reader is advised to consult [43].
r 2
h̄2 k 2 h̄2

mV w2 1

tan 2θ
θ= E= = (5.1)
−cot 2h̄2 θ2 2m 2m w
The tan θ and cos θ are for odd and even wave functions, respectively. Parameter m stands for the carrier
mass, V for the depth of the well (the offset between the two materials’ bands), w for the width of the well
and k is the wave number. The reduced Planck’s constant is given by h̄. The parameter θ relates to the wave
number by θ = ka 2 . The offset of a non-confined well in the valence band is of 0.34 eV while on the conduction
band is of 0.26 eV [70]. The electron effective mass is of 0.042mo [71, 69], light hole effective mass is of 0.051mo
[72, 69] and heavy hole effective mass is of 0.45mo [69], being mo the electron mass. Transitions involving light
holes are more energetic, so focus is given to heavy holes.
Using the relations and conditions above, we can estimate the existence of four bound states in the valence
band and one in the conduction band for a well’s width of 5 nm. The lowest energy transition is in between the
first bound state of each band. For a thickness of 5 nm, 1550 nm light is not absorbed (only light with wavelength
bellow 1425 nm). For a thickness of 7.5 nm, light with wavelength bellow 1515 nm is absorbed. Figure 5.4
shows the wavelength from which absorption occurs as a function of the layer thickness. Considering possible
uncertainties with the calculations, possible uncertainties on the MOCVD growth of the layer and variations
of the emitted light’s wavelength (as it was later shown after device fabrication), an InGaAs thickness of 5 nm
was chosen as a capping layer.
5.8 Regrowth and contact layer

5.8. REGROWTH AND CONTACT LAYER 33
As explained, the limiting step for the success of this project is on this regrowth stage, where MOCVD
has to be done on top of the PhC while keeping its features intact. This is not a problem regarding the LED
structures since there is no PhC.
This layer also functions has the device’s cladding layer. Being of InP, which has lower refractive index than
the MQWs, it helps confining the formed fields in the active region and the modes in the PhC, as shown in
Chapter 2.
The InGaAs contact layer is required to form ohmic contacts on the p-side of the device. Following the same
reasoning of Section 5.7, this layer absorbs part of the light that is transmitted through it, but is required in
order to properly conduct current through the device. Since no optimization study was done in order to verify
the minimum required thickness of this layer, a thickness of 60 nm was chosen.
The thickness of the regrowth layer (layer 25) and contact layer (layer 26) are chosen in order to maximize
light output. As a first approximation, the p-clad thickness is chosen to be around 3 to 4 times the wavelength
in the material. Vacuum wavelength of 1550 nm, is of 489 nm in InP. On similarly designed GaAs 980
nm lasers (roughly 290 nm wavelength in GaAs), the regrowth layer thickness ranged from 1 µm till 3 µm
[1, 11, 25, 26, 27], roughly corresponding to 3 to 10 times the wavelength of interest. Although this device’s
cladding layer is relatively small compared to the thicknesses used in these studies, the thick PhC layer (roughly
twice as thick as the layer present in the studies mentioned) should be enough to successfully confine the fields
within the active region.
When light produced on the MQWs interacts with the PhC in order to excite the mode, light is reflected
upwards and downwards perpendicularly to the PhC’s surface plane. The light traveling downwards (to the
p-side of the device) will be partly reflected on the electrode’s metal which will be covering the bottom end of
the device. This light will be directed upwards and will interact with the light primarly reflected upwards on
the PhC. Therefore, the p-clad thickness is tuned in order to promote constructive interference between the
two waves. Although light is also reflected in the InP/InGaAs interface, this reflection is significantly small
and is ignored. A basic graphical user interface (GUI) based on a Matlab script was written for this task and
is shown in Appendix A4. This script is based on the time independent wave propagation equation, as shown
by Equation 5.2.
4πκ 2πn 4πκ 2n0 κ1

E = e−x λ × cos( x + φ) (5.2) α= (5.3) β = arctan (5.4)
λ λ n20 − n21 − κ21
Where E is the electric field, and κ the complex index of refraction of light at the wavelength λ in the
material with refractive index n. The absorption coefficient (α) relates to the complex index of refraction by
Equation 5.3. An optimal constructive interference is obtained for a p-clad thickness of 1858 nm, as shown in
Figure 5.5. A thickness of 1781 nm was used instead on the LED due to problems during calculations.
Figure 5.5: Ideal p-clad thickness for constructive interference between the ongoing wave and the wave reflected in the
semiconductor/metal interface.
The electric field amplitude is assumed to be maximum at the center of the PhC and no reflection is
theorized in between the PhC and the p-clad. The existing reflection in this interface cannot be controlled
by the thickness variation of the p-clad and contact layer, which is the purpose of this analysis, and thus it
is ignored. The waves’ amplitude reduction at the p-clad/InGaAs and InGaAs/metal interface is taken into
account. Amplitude reduction due to absorption in the InGaAs layer is around 3.6 % in each direction.
Due to the metal combination used (Section 5.1), transmission in the InGaAs/Ti interface is significantly
high (roughly 70 %). The transmitted light is rapidly absorbed in the metal layer. If another metal was used,
for instance, Au, transmission would be reduced to only 8 % due to a higher refractive index difference. In such
situation, the impact of this analysis on the device’s light output would be higher since a considerable quantity
of light would be reflected at this interface and would interact with the outgoing waves.
The thickness of the InP p-clad layer is optimized for phase matching between the ongoing and reflected
wave. Ideally, light traveling from a low refractive index medium to a high refractive index medium undergoes
a 180◦ phase shift when reflected at the interface. If this reflection is done at the waves’ node, the reflected
light will be in phase with the ongoing wave, interacting constructively. Destructive interference will happen
if the ongoing light reflects at its anti-node. On practical cases, the phase shift (β) felt by the wave is not
exactly 180◦ , but it can be estimated by Equation 5.4 [73]. The subscript 0 and 1 on Equation 5.4 relate to
the semiconductor and metal, respectively. Since the phase shift is less than 180◦ , the reflection is optimized
to happen slightly further from the waves’ node, as shown in Figure 5.5.
Hirose et al. [1] performed a different theoretical analysis on their device with the same goal. If applied to
their device, this script obtains similar results, with a slight shift of 4 nm between optimal thicknesses.
5.9 Isolation
The lithography masks are designed to manufacture simultaneously 16 devices of different sizes. The last
processing step is dicing, where each device is individualized. SiO2 is deposited everywhere and openings are
done using the lithography mask’s features shown in Figure 5.2b and 5.2c for the device’s back and front side
electrode, respectively. After the metalization step, the metal is in contact with the semiconductor only in
the opened regions. Each die has only one device, and thus only one opening on the front side and another
opening on the back side. This assures that current flows between the device’s electrodes. A comparison was
done regarding the SiO2 isolation used. In Figure 5.6a the dielectric is only used to separate the metal from
the semiconductor in unwanted areas. In Figure 5.6b, a mesa is defined and isolated with SiO2 to avoid current
dispersion.
Figure 5.6: A schematic of the two possible structures. a, SiO2 is used as an isolation layer. b, a mesa structure is
formed and is isolated with SiO2 . The dashed line area represents the geometric location of the MQWs.
Finite-element simulations using COMSOL Multiphysics were performed in order to better understand the
current distribution in the device. The simulated structures (Figure 5.7) consist of a 350 µm InP slab (the
thickness of the used wafer) with Au electrodes. A voltage of 2 V is applied from the back electrode (positive)
to the front electrode. The current scale is to be seen as a reference, and not as an absolute value since the
simulated device was significantly simplified.
Although Figure 5.7b is not conclusive, it shows current dispersion on a volume larger than the device. This
means that not all current flowing through the electrodes passes through the MQWs in a desired area. The
same simulation was applied on the device with mesa isolation, whose schematic is shown in Figure 5.6b. A top
view of the current distribution on the MQWs plane with and without mesa isolation is shown in Figure 5.8.
In Figure 5.8 is also represented, by black lines, the device’s top electrode in a ring shape. Due to this
required design (a ring electrode is needed for light emission through it), there is some current dispersion to
the outside of the active region of the device when current is flowing from the back to the top electrode, as
shown in Figure 5.8a. By creating a mesa isolation, all current is confined within the device’s active region as
shown in Figure 5.8b. Since all current is passing through the desired area of the MQWs, as a consequence,
the devices’ threshold voltage (not to be confused with lasing or gain threshold) should be decreased. Finite
element simulations over the active region (200 µm x 200 µm x 127.5 nm) show that current going through the
MQWs volume region (dashed line in Figure 5.6) is improved by 16 % with this design.
5.9. ISOLATION 35
Figure 5.7: Finite-element simulations performed on the device without mesa isolation. a, simulated structure. b,
current density distribution on the device. The inset shows the current density distribution in a geometric plane that
goes through the device.
Figure 5.8: Top view of current distribution obtained using the finite-element method. a, structure without mesa
isolation. b, structure with mesa isolation. The black lines delimit the front side electrode.
The current density profile within the MQWs is plotted in Figure 5.9. Figure 5.9a shows that the 16 %
improvement in current confinement due to the limitation of current dispersion from the mesa isolation mainly
translates to higher current passing through the side edges of the mesa. Still, an improvement along the whole
width of the MQWs is still visible in Figure 5.9b, which only focus in a more central area of the MQWs region
(from 25 µm till 175 µm) . Integrating over the active region but excluding the edges (150 µm x 150 µm x
127.5 nm) show a current improvement of 5.2 % only. Although a smaller improvement compared to the overall
current increase in the area, it is still substantial. Therefore, this design choice was added to the device and it
is performed by the lithography mask shown in Figure 5.2a.
Figure 5.9: Current density profile within the MQWs region with and without mesa isolation. a, profile over the whole
MQWs length. The dashed vertical lines represent the width shown in b. The position 0 µm and 200 µm represents the
interface between the mesa and the SiO2 isolation. b, profile over a reduced central area of the MQWs length.
Chapter 6
Process flow
The different process steps for the fabrication of the LEDs (and posteriorly for the fabrication of the PCSELs)
are shown in this section. The fabrication difference between the LEDs and the PCSELs is only related to the
PhC manufacturing. After the fabrication of the LEDs, the process was reviewed and slight improvements were
added. The new process stages that weren’t taken during the manufacturing are also included in this section,
but highlighted using * on the respective step. A more detailed description regarding each of the processes
used is given in Chapter 3. A detailed view over the layer thicknesses, doping and materials is given in Table
5.1. All wafers required CMP on its back side before further processing. Although not mentioned, cleaning
steps in acetone, isopropanol and water were taken when required.
1- MOCVD Growth
1. Growth of n-InP (buffer layer);

2. Growth of i-InP (spacer layer);
3. Growth of the active region (MQWs);
4. Growth of i-InP (spacer layer and photonic crystal layer);
5. Growth of InGaAs (capping layer). This may not be required.
2- Alignment marks (1st mask step)
1. Deposition of 195 nm of SiO2 by PECVD in the back side of the

wafer for protection*;
2. Deposition of 195 nm of SiO2 by PECVD (hard mask);
3. Deposition of hexamethyldisilazane (HMDS);
4. Spin coating of negative photoresist Ma-N - 1420 at 3000 rpm
for 30 s;
5. Baking at 100 ◦ C for 120 s;
6. Exposure to 550 mJ/cm2 in soft contact mode;
7. Development with ma-D 533/S at 20 ◦ C for 50 s. Rinsing in
bubbler;
8. Light ashing (250 W / O2 200 sccm) for 30 s;
9. Etching of SiO2 by ME-RIE with 20 % over etch;
10. Resist removal in acetone;
11. Strong ashing (1000 W / O2 500 sccm) for 5 min;
12. Etching of the semiconductor;
a) InGaAs (capping layer) etching with H3 PO4 :H2 O2 :H2 O
(3:1:100) for 20 s if capping layer is present;
b) InP (PhC and spacer layer) etching with HCl:H3 PO4 (1:10)
for 2 min;
c) InGaAsP (MQWs) etching with H3 PO4 :H2 O2 :H2 O (1:1:8)
for 2 min;
37
38 CHAPTER 6. PROCESS FLOW
d) InP (spacer layer, buffer layer and partly the substrate)

etching with HCl:H3PO4 (1:10) for 3 min;
13. Removal of SiO2 by ME-RIE with 20 % over etch.
The alignment marks obtained by this wet etching step are shown in Figure 6.1, where a comparison in
between the SiO2 hard mask features and the wet etched InP patterns are shown. Figure 6.1a contrast was
computer enhanced for better visualization.
Figure 6.1: Pictures of the alignment marks formed during 2-Alignment marks (1st mask step). a, alignment marks
on SiO2 hard mask. b, alignment marks on InP after SiO2 hard mask removal. Insets on both pictures are of finer
alignment marks.
The lack of definition shown in the fine alignment marks on the SiO2 hard mask (and posteriorly on InP)
is probably due to the resist used. The resist showed to be spoilt and it was renewed further on. The same
process was previously tested and better results were obtained.
3- Photonic crystal
The e-beam patterning is done at UTA. Therefore, expected process steps are shown with lack of detail.
Steps numbered 3.8. to 3.10. are done at KTH.
1. Deposition of 260 nm of SiO2 (hard mask);

2. Deposition of HMDS;
3. Spin-coating of e-beam resist;
4. E-beam patterning;
5. Etching of SiO2 ;
6. Resist removal;
7. Strong ashing;
8. Light C6 H8 O7 (citric acid) etching before the following step to
remove formed oxides on the openings;
9. Etching of InP by ICP-RIE for roughly 3 min;
10. Removal of SiO2 in buffer HF for 2 min.
39
4- MOCVD regrowth
1. Semiconductor cleaning with a set of acids, bases and solvents;

2. Growth of InP (cladding layer);
3. Growth of InGaAs (contact layer).
5- Device’s front side electrode (2nd mask step)

This process step is done using the lithography mask whose pattern is shown in Figure 5.2c. This process
is done on the back-side of the wafer, corresponding to the device’s front side. Therefore, in comparison with
the previous step, the wafer is processed on the opposite side.
1. Deposition of 270 nm of SiO2 by PECVD (electrode isolation

and anti-reflection coating);
for 30 s;
bubbler;
10. Strong ashing (1000 W / O2 500 sccm) for 5 min.
A view of the device’s front electrode (ring) is shown in Figure 6.2a. The SiO2 deposited on step 5.1.
corresponds to the device’s anti-reflection layer, of 270 nm, as explained in Section 5.2 of Chapter 5. A
profilometer measurement showing the opening on the SiO2 , of roughly 270 nm as pretended, is shown in
Figure 6.2b.
Figure 6.2: Results obtained during device’s front electrode fabrication. a, picture of one device’s electrode opening.
b, profilometer measurement showing electrode’s opening height.
Although the area of the device, including the SiO2 anti-reflection coating withing the electrode’s region,
is in good condition, some damage is showed in Figure 6.2a. Since the wafer was properly cleaned throughout
different stages of manufacturing, the damage is probably related to the first stages of the device manufacturing
(2- Alignment marks [1st mask step]) when the wafer back side (the side now processed) wasn’t protected. When
handling the wafer, its back side was in contact with different surfaces, causing the damage. A new first step
on 2- Alignment marks (1st mask step) was now added in order to prevent this damage from happening in the
future.
6- Device’s back side isolation (3rd mask step)

This process step is done using the lithography mask whose pattern is shown in Figure 5.2a. This process
is done on the front side of the wafer, corresponding to the device’s back side. Therefore, in comparison with
the previous step, the wafer is processed on the opposite side.
1. Deposition of 195 nm of SiO2 by PECVD (hard mask);

for 30 s;
bubbler;
10. Strong ashing (1000 W / O2 500 sccm) for 5 min;
11. Etching of InP;
a) InGaAs (contact layer) etching with H3 PO4 :H2 O2 :H2 O
(3:1:100) for 2 min;
b) InP (cladding layer, PhC and spacer layer) etching with
HCl:H3 PO4 (1:10) for 8 min;
c) InGaAsP (MQWs) etching with H3 PO4 :H2 O2 :H2 O (1:1:8)
for 2 min;
d) InP (spacer layer, buffer layer and partly the substrate)
etching with HCl:H3 PO4 (1:10) for 2 min;
12. Removal of SiO2 by ME-RIE with 20 % over etch.
A view of the device’s back isolation is shown in Figure 6.3a. The profilometer measurement (Figure 6.2b)
shows a step height of roughly 2200 nm, which is slightly less than pretended. Yet, it should contribute towards
device electrical improvement.
Figure 6.3: Results obtained during device’s isolation stage. a, top view of one device’s isolation. b, profilometer
measurement showing isolation’s depth.
41
7- Device’s back side electrode (4th mask step)

This process step is done using the lithography mask whose pattern is shown in Figure 5.2b. This process
is done on the front side of the wafer, corresponding to the device’s back side.
1. Deposition of 195 nm of SiO2 by PECVD (electrode isolation);

for 30 s;
bubbler;
10. Strong ashing (1000 W / O2 500 sccm) for 5 min.
A view of the device’s back side (isolation and electrode opening) is shown in Figure 6.4a. The profilometer
measurement (Figure 6.4b) shows the electrode opening in the middle of the 2200 nm step height of the isolation
done in the previous step.
Figure 6.4: Results obtained during device’s back electrode fabrication. a, picture of one device’s electrode opening.
b, profilometer measurement showing electrode’s opening in the middle of the isolation done in the previous step.
The step height of the electrode opening shown in Figure 6.4b is roughly of 225 nm. The deposited SiO2
thickness is of 195 nm, which means that the surface of the InGaAs layer was also partly etched. The SiO2
surface (covering the whole scan length except in the range of 240 µm to 330 µm) also appears to be irregular,
which means it was also damaged. Since the SiO2 was protected with photoresist till process step 7.9., this
damage occurred necessarily during ashing. Since previous ashing steps didn’t cause any visible damage (for
instance, on Figure 6.2 of 5- Device’s front side electrode [2nd mask step]), the problem should be related to
chamber’s contamination. This process was done in an instrument which also allows reactive ion etching of
SiO2 . Although a chamber’s cleaning step is always performed before every ashing process, it’s duration was
probably insufficient. In the future, this step should be performed in another tool.
The InGaAs contact layer was reduced from 60 nm to 30 nm according to the profilometer measurement
(assuming that the SiO2 thickness remained constant). Although this showed to be enough for ohmic contact
formation, the surface roughness probably increased contact’s resistivity. As shown in Section 5.8 of Chapter 5,
the p-cladding layer and the contact layer were optimized to improve light output. By decreasing the contact
layer by 30 nm, a PCSEL output power would be decreased due to destructive interference in between the
outgoing light and the waves reflected on the back electrode’s metal. This is not critical on the structure here
presented since no standing wave is formed on the LEDs. However, this can be critical for the planned PCSEL
structures and caution should be given.
8- Device’s top side electrode metalization (5th mask step)

This process step is done using the lithography mask whose pattern is shown in Figure 5.2d. This process
is performed on the back side of the wafer, corresponding to the device’s top side.
1. Baking at 180 ◦ C for 5 min;

2. Spin coating of lift-off resist LOR 5A at 2500 rpm for 45 s;
3. Baking at 180 ◦ C for 3 min 20 s;
4. Spin coating of positive photoresist SPR 700 - 1.2 at 4000 rpm
for 30 s;
8. Development with CD-26 at 20 ◦ C for 60 s. Rinsing in bubbler;
9. Citric acid bath for 30 s just before the next step;
10. Metal e-beam evaporation;
11. Lift-off with mr. Rem - 700 at 60 ◦ C until all unwanted metal
is released.
9- Device’s back side electrode metalization

This process is done on the top side of the wafer, corresponding to the device’s back side. Since the deposited
SiO2 has an opening only on the electrode placement, the whole back side is metalized.
1. Citric acid bath for 30 s just before the next step;

2. Metal e-beam evaporation;
3. Annealing at 350◦ ;
4. Dicing of the wafers to isolate the devices from each other using
a diamond pen.
A view of the device’s top side is shown in Figure 6.5a. A schematic of the device obtained after the last
processing step is also shown in Figure 6.5b next to a picture of the actual device (Figure 6.5c).
Figure 6.5: Results obtained during device’s top electrode fabrication. a, picture of one device’s electrode. b, schematic
of the final device. c, picture of a final device.
Chapter 7
LED characterization
In this chapter, the results obtained from different characterization techniques performed on the fabricated
devices are shown. When required, the results are explained and justified with the use of simulations. All devices
were primarily characterized before the annealing stage. Since the annealing process improved significantly the
results (as shown in Subsection 3.5.1 of Chapter 3), only the results after this stage are shown.
A total of 14 devices were fully fabricated. From these, 2 devices weren’t working, 1 was working poorly
(with roughly half of the power emission) and 1 stopped working due to problems with transient peaks of the
source measurement unit (SMU) used. The two non-working devices showed an almost linear behavior in the
IV analysis and almost null light output. This should be due to some defect within the structure, allowing the
charge carriers to flow through this path. The 10 properly working devices have different sizes, shown in Table
7.1.
Table 7.1: Number of fabricated devices of each size. Devices’ area is squared.
Device lateral size (µm) Number of fabricated devices

50 2
100 3
150 2
200 3
7.1 Light-current-voltage curves

The devices were initial characterized by driving current through its electrodes and measuring the corre-
sponding voltage drop and emitted light. The curves obtained from the relation between these parameters
are named light-current-voltage curves (LIV). The LIV curve can be divided into two components, being the
first analysis a IV curve (current-voltage curve) with a drive current sweep from 0 to 50 mA. The devices were
processed in two different wafers, named wafer 1 and 2 from now forward. Although no relation is verified in the
LIV curves between the devices of different sizes (as such, size is not stated in Figure 7.1), there is differences
between both processed wafers. Several reasons may explain these differences. There are no differences between
the processing stages of the wafers except in device’s isolation (Section 5.9 of Chapter 5). In this stage, wafer
2 was better isolated compared to wafer 1. IV curve results are shown in Figure 7.1a1 and 7.1b1.
Regarding Figure 7.1a1 and 7.1b1 (corresponding to wafer 1 and 2, respectively), the IV curve shows a
different behavior in the drive current region of 0 to 5 mA. In this region, voltage increases steeply as a function
of the drive current due to the depletion region, whose ionized donors and acceptors oppose to charge flow. An
ideal junction would allow current flow only at a certain voltage (named threshold voltage, Vt ). As stated, the
only recognized difference between the devices is regarding current isolation. This isolation was done to decrease
current dispersion, increasing current density in the device’s mesa (Section 5.9 of Chapter 5). However, it was
recognized that a significant current increase is given near the mesa’s walls (Figure 5.9). This should lead to
higher leakage through the edges of the device leading to the IV profile shown before reaching threshold. This
is not problematic for this device since it is not thought to work as a rectifier diode.
As stated, no significant difference is shown between devices of different sizes. Since the same current is
being driven through the active region (meaning the same number of carriers per unit of time), a similar number
of radiative recombinations happens within different sized devices. As such, no power difference is expected nor
shown in the current-light curves (IL curves) shown in Figure 7.1a2 and 7.1b2 (corresponding to wafer 1 and
2, respectively). This means that the active region is not saturated for this drive current, which is expected
due to the large device size. It is also expected that smaller devices will reach saturation before larger devices
43
44 CHAPTER 7. LED CHARACTERIZATION
Figure 7.1: Two wafers were processed. a1, IV curve of devices from wafer 1. b1, IV curve of devices from wafer 2.
a2, IL curve of devices from wafer 1. b2, IL curve of devices from wafer 2. Color of a specific device’s curve is kept
from plot 1 to 2. Since no relation is found for devices of different sizes, size of each device is not stated.
due to higher current density on the active region, possibly being more vulnerable to current crowding effects.
Since the electrodes’ size is scaled for different sized devices (the front and back side electrode are smaller for
smaller devices), resistance should be higher for smaller devices, which is not verified. This is probably due to
other areas of higher resistance that overpower the expected resistance variation with device’s size. For a drive
current range of 0 to 5 mA, wafer 1’s light output is steadier compared to wafer 2. This follows the remarks
given regarding the IV behavior shown in both wafers. The possibly negative effect of the isolation on the
IV curves should have a positive role in light output. As shown in Figure 5.9, current is confined within the
mesa, which should promote more carrier recombination in the region bellow the top ring electrode. Due to
improper isolation, current spreading may lead to recombination outside this region. The resulting light output
is partially blocked by the top ring electrode which decreases overall efficiency of the device. For higher driving
currents, some devices of wafer 1 start reaching saturation while light output from devices of wafer 2 increase
steadily. Since other devices with equal size and from the same wafer don’t reach saturation, this shouldn’t
be related to the saturation of the MQWs. This might be related to defects (traps) in the active region (as
mentioned in Section 2.5 of Chapter 2) whose availability is increased for higher driving currents, decreasing
power output.
Table 7.2: Characterization of the devices. Uncertainty presented corresponds to one standard deviation.
Parameter Wafer 1 Wafer 2

Threshold voltage (V) 0.88 ± 0.05 0.81 ± 0.03
Series resistance (Ω) 7.12 ± 1.63 9.25 ± 0.91
Ideality factor 4.03 ± 0.89 2.23 ± 0.37
Power (mW/A) 37.33 ± 4.57 43.18 ± 4.80
Quantum efficiency (%) 6.13 ± 0.52 6.50 ± 0.23
Differences between light output power of the better performing devices of each wafer aren’t significant due
7.1. LIGHT-CURRENT-VOLTAGE CURVES 45
to the measurement uncertainties related to the placement of the detector. Since LEDs have a broad emission
angle, small variations on the measurement of the output power may occur due to unoptimized positioning of
the detector. Remarks regarding set-up calibration are given in Appendix A5.
Devices’ properties were quantified and results are compiled in Table 7.2. Threshold voltage and series
resistance was obtained by linearizing the IV region of 25 to 50 mA. By performing a current sweep, fewer
values are obtained before the threshold voltage of the device. As such, ideality factor was obtained through
the first four values of each plot only. Power was obtained through linearizion of the IL region in the range of
25 to 35 mA. Quantum efficiency (number of produced photons per number of injected carriers) was obtained
from the differential power value in the 10 mA to 15 mA region. The two less efficient devices of wafer 1 were
excluded from this calculation.
Threshold voltage, series resistance, power and quantum efficiency values between the two wafers match
if considered one standard deviation uncertainty. The small number of devices fabricated leads to a higher
discrepancy regarding parameter’s average value. A bigger discrepancy is shown in the series resistance of the
devices of wafer 1. This is partly explained by the low resistance of the device plotted in yellow color of wafer
1, which does not follow the average trend.
Regarding the ideality factor, it is closer to ideal in wafer 2. Both devices have a high ideality factor which
is expected since they aren’t optimized as rectifier diodes. However, standard IV methods for ideality factor
estimation aren’t ideal for LEDs, being the obtained values usually significantly higher than the values obtained
with other techniques [74].
On average, the devices have a threshold voltage of 0.84 ± 0.05 V, series resistance of 8.19 ± 1.68 Ω, ideality
factor of 3.15 ± 1.13, power of 40.99 ± 5.32 mW/A and differential quantum efficiency of 6.36 ± 0.38 %.
7.1.1 Pad resistance

The fabricated devices are composed by a front central electrode to which 4 pads are attached (as shown
in Figure 6.5c). The pad allows an easier device probing, although such is also possible through the central
electrode. It is verified that the LIV curve (focusing on the current-voltage component, IV) is substantially
worsen when probing through the pad. This difference is shown in Figure 7.2.
Figure 7.2: Electrical behavior dependence on the probing spot.
The derivative of the IV plot shown in Figure 7.2 is the device’s resistance. As shown, the IV plot shows
a higher resistance (of roughly 14.8 Ω compared to 6.5 Ω) when probed through the pad. Through simple
calculations using Ohm’s law the resistance of the pad can be estimated. This estimation is not exact since it
doesn’t take into consideration, for instance, the curvature of the pad’s line connecting the pad to the electrode.
For a proper estimation, simulations using COMSOL Multiphysics were performed and are shown in Figure
7.3.
Similar to the calculation using Ohm’s law, the simulations estimate a pad resistance of 4.1 Ω. This value
still does not justify the verified differences on the IV curve between the probing spots, as shown in Figure
7.3a. In this Figure, the IV measurement done on the electrode is adjusted taking into account the expected
resistance (4.1 Ω) obtained through simulation. As mentioned in Chapter 6, the deposited SiO2 showed some
damage. Adding to it, several particles were found in the AFM analysis (Section 3.2 of Chapter 3) performed
on the polished side of the sample. Since the metalization process is done on top of the SiO2 , the pad’s electrical
properties should be decreased due to surface roughness and the particles present. As mentioned previously,
on future project stages more care should be taken.
46 CHAPTER 7. LED CHARACTERIZATION
Figure 7.3: Pad’s electrical properties discrepancies. a, measured and expected IV considering the electrode’s simulated
resistance. b, current density distribution between the pad and the electrode for applied current of 1 A.
7.2 Spectrum analysis

The emission spectra of the devices was analyzed in order to determine the emission’s peak wavelength.
This is of added importance in order to set the PhC’s parameters accordingly. The results are shown in Figure
7.4. The emission spectra for different current injections does not show a significant change in the shape of
the emission nor the peak wavelength. The small red shift in the spectra shown in Figure 7.4a (of around 1.5
nm) is not present in all measured devices. The peak with the highest power corresponds to the lowest energy
transition (first band of the conduction band, E1 , to first heavy hole band, Hh1 ). The second visible peak is a
higher energy transition from the second eigenstate in the conduction band to the second heavy hole state in
the valence band (E2 to Hh2 ). Other transitions shouldn’t be distinguishable at room temperature [75].
Figure 7.4: Emission spectra of a 200x200 µm device. a, emission spectra for different drive currents. b, peak
wavelength of the different fabricated devices. The position of the device in the wafer is shown in the inset.
Figure 7.4b shows the dependence between the peak emission wavelength and the size of the device. This
dependence is not related to the size of the device, but to its positioning in the wafer. The wavelength appears
to be slightly reduced towards the edges of the wafer. Discrepancies are expected due to edge effects and
uncertainties during MOCVD growth. The positioning of the devices in the wafer is shown in the inset of
Figure 7.4b. The average peak wavelength is of 1511 ± 6 nm.
Chapter 8
Conclusion
The progress and results obtained leave a positive perspective towards the fabrication of a PCSEL emitting
at 1550 nm. The different components of the future device were studied in detail to promote and optimize its
functioning through means of simulation and process optimization. Different simulation methods were studied
and used to reproduce the results in literature for similar devices. By replicating the simulation results of
working devices, the written simulation scripts are assured to be correct and thus can be applied on the actual
device studied in this report. This work is ongoing and should be completed within the following months.
One of the major challenges of the project is accomplishing a second growth stage on the PhC while
leaving its features close to intact. A lithography mask was designed to pattern InP with different shapes
and further analyze its deformation when subjected to high temperatures. Temperatures ranging from 550 ◦ C
to 650 ◦ C [61] are usually required for MOCVD growth and InP showed to be significantly deformed within
this range, with the bottom surface shrinking roughly 20 %. At the low temperature of 470 ◦ C the features
were still deformed. Circular features transformed to rhombus which implies re-shaping to lower surface energy
crystallographic planes. The results were substantially improved with the use of a capping layer that withstands
high temperatures, such as InGaAs. This layer decreases material flow allowing the feature to remain almost
intact.
Manufacturing processes on III-V materials required for the fabrication of the devices were tested, charac-
terized and optimized with good results. The back-side of InP wafers were successfully polished by CMP until
a RMS roughness bellow 2 nm was achieved. A ME-RIE process was optimized allowing handling of SiO2 on
2” wafers, whose processing suffered from over-heating and consequently burning of the photoresist mask. The
etching conditions optimized require extended processing time, yet, achieve results with high reproducibility
and on-wafer uniformity. Annealing temperatures for the formation of ohmic contacts were tested and III-V
materials’ dry and wet etching were proven based on previous knowledge. Etching rates were estimated for the
latter.
The device was further designed in regard to the thickness of each layer and corresponding materials, with
focus on the metal combination used for the electrodes, anti-reflection layer, p-clad thickness and well width of
the PhC’s capping layer. Simulations on the electrical behavior of the device were carried out and consequently
a mesa structure was fabricated to improve current density in the MQWs region by about 5.2 %.
The full process was planned and lithography masks were designed to fabricate the PCSELs. In order to
test the process and for further comparison with the PCSELs, a LED structure based on the same design
was fabricated. The fabricated devices have sizes ranging from 50x50 µm to 200x200 µm and show a low
series resistance of 8.19 Ω and a turn-on voltage of 0.84 V. Average power output is of 40.99 mW/A and peak
wavelength was slightly dependent on the position of the device on the wafer, ranging from 1500 to 1514 nm.
The maximum achieved power output from one device is of 51.2 mW/A with an electroluminescent peak at
1503 nm.
47
Appendices
A1 - Chemical polishing
Surface roughness can be decreased by using wet etching. This isotropic etching method will decrease the
size of larger roughness features due to its higher surface exposure compared to smaller features. Different
etchants with different etching rates were used and are shown in Table 8.1.
Table 8.1: Different etchants and process time. Time was established as a function of the etching rate. A red object
was used to facilitate a qualitative assess of reflection.
Time Time
Etchant Result Etchant Result
(min) (min)
Not polished — H3 PO4 : HCl 20
3H2 SO4 :
H2 O2 : H2 O 30 H3 PO4 : HCl 60
3H2 SO4 :
H2 O2 120 HCl : H2 O 5
C6 H8 O7 : H3 PO4 :
2H2 O2 120 H2 O2 : H2 O 20
Solutions as C6 H8 O7 :2H2 O2 and H3 PO4 :H2 O2 :H2 O have considerably low etching rates and thus no visible
effect on the surface roughness by unaided eye.
Both piranha solutions (3H2 SO4 :H2 O2 :H2 O and 3H2 SO4 :H2 O2 ) have an impact on the wafer’s surface and
improve reflection. However, this is done in a non-uniform way with the formation of several macro features
(approximately 100 µm) distributed throughout the surface of the wafer.
The results shown on H3 PO4 :HCl (for 20 min and 60 min) and HCl:H2 O are significantly superior to the other
etchants and thus were further inspected using a profilometer. Results are grouped in Figure 8.1.
The height profile of the unpolished sample (Figure 8.1a) shows several peaks and dips with significant
height difference in between them, which should decrease light reflection as shown in Table 8.1.
The best result is shown in Figure 8.1c with very smooth features over the scan length. However, HCl:H2 O
promotes a non-uniform etching with some areas not being etched away (several point features could be noticed
by unaided eye in the surface of the sample). This etchant promotes the dissolution of InP by replacing the
original bonds with In-Cl and P-H [58]. The study done by Notten [58] demonstrates that the dissolution of
49
50 CHAPTER 8. CONCLUSION
Figure 8.1: Height profile over a 250 µm scan on different samples. a, not polished sample. b, sample on H3 PO4 :HCl
for 20 min. c, sample on HCl:H2 O for 5 min. d, sample on H3 PO4 :HCl for 60 min. Scan on d was done on two
crystallographic directions. The data was leveled to average height of 0 to allow easier comparison. Dips within features
horizontally distanced less than 4 µm from each other aren’t completely resolved by the equipment used for this analysis.
InP is not a diffusion limited process, being the etching controlled kinetically. The lack of uniformity shouldn’t
be related to uneven transport of the reactant to the wafer’s surface. Some oxidation of the surface in some
localized areas could explain the irregular etching, however, more tests beyond the purpose of this study would
be required for a proper conclusion.
Both H3 PO4 :HCl reactions decrease surface roughness on the majority of the scan length, which can also
be seen by the higher reflection shown in Table 8.1. However, periodic dips are shown in both samples. This
is more visible in Figure 8.1d where the orientation of the scan is taken into account by following two different
crystallographic orientations. A scan done over the wafer’s orientation <010> is almost perfectly flat. On the
other hand, a scan over the direction <011> shows to have periodic dips, as it can be seen in Figure 8.2b. The
etching mechanism should also not be diffusion related since it doesn’t depend on the degree of agitation [76].
The topography shown in Figure 8.2b should be related to different etching rates of different crystallographic
planes, which promotes preferential etching of some areas compared to others. The direction <011> goes
through (111) planes that are less surface energetic. This should decrease the etching rate and lead to the
features shown in Figure 8.2b.
Although none of the etchants decreased the wafer’s surface roughness sufficiently, the shown study (whose
results could be improved with further optimization) gave information regarding which etchant is better for
wet etching processes that were done in subsequently stages of the device’s fabrication (such as the patterning
of the alignment marks on the wafer). The shown decrease of surface roughness may also be used as a first
stage polishing, without further improvement, combined with second stage mechanical polishing method with
fine grits.
No detailed comment is done on the chemical processes behind each etching mechanism since it is not the
purpose of this essay and a more detailed analysis would be required for such.
51
Figure 8.2: Microscope pictures of the studied samples. a, sample without polishing. b, sample on H3 PO4 :HCl for 60
min. The topography contrast was enhanced by phase contrast.
A2 - Processing parameters
A more detailed information regarding some process parameters is given here.
A2.1 - Inductively coupled plasma - reactive ion etching

The used recipe was optimized by Shahid, N. [48] and further details can be seen in his work. There is a
minor difference in the H2 and CH4 proportions optimized by Shahid, N. and the used recipe (Table 8.2).
Table 8.2: InP ICP-RIE process’s parameters.
Parameters
Pressure (mT) 4
RF power (W) 100
ICP power (W) 1000
DC Bias (V) 260
Gas 1/Flow (sccm) Cl2 9
Gas 2/Flow (sccm) CH4 7.5
Gas 3/Flow (sccm) H2 5.5
Etch rate (nm/min) 330
A2.2 - Plasma-enhanced chemical vapour deposition

The used recipe was formerly developed and thus this work didn’t focus on its optimization. Table 8.3
shows detailed information regarding the recipe used.
Table 8.3: PECVD SiO2 process’s parameters.
Parameters
Substrate temperature (◦ C) 400
Pressure (mT) 1500
RF power (W) 26
Gas 1/Flow (sccm) SiH4 30
Gas 2/Flow (sccm) N2 O 3000
Deposition rate (nm/min) 195
A3 - Regrowth trial
During temperature rising (required before starting the growing process) and annealing, the chamber en-
vironment needs to match the material of interest in order to stabilize it. Figure 8.3 shows InP annealed in
an arsine environment (instead of a phosphine environment, as required), which lead to the sublimation of
phosphorus.
Figure 8.3: SEM pictures of InP annealed in an arsine environment. a, profile of a 2 µm line. b, top view on 2 µm
circular shapes.
Similar to what is shown in Table 4.3, the results of the annealing tests at 630 ◦ C for the samples with and
without capping are shown in Figure 8.4. This Figure shows top view SEM pictures on 2 µm features (squares,
triangles and circle) of the tested samples. SiO2 capping layer was removed before imaging.
Figure 8.4: Top view SEM pictures of the different annealed samples. a, not annealed InP. b, InP in arsine environment
(InP-As). c, InP in phosphine environment (InP-P). d, InP with SiO2 cap in phosphine environment (SiO2 -P). e, InP
with InGaAs cap in arsine environment (InGaAs-As). f, InP with InGaAs cap in phosphine environment (InGaAs-P).
Although in a qualitative way, the pictures shown in Figure 8.4 match the comment given regarding Table
4.4.
53
A4 - Study on p-cladding layer

The script used in this calculation is not presented because by copping it from this document to MatLab
several formating errors would occur. However, a GUI version of the script was also developed and it can
be found at MathWorks File Exchange under the name of PCSEL Wave propagation. An image of the devel-
oped GUI and the simulated structure is shown in Figure 8.5. By inputting the different material types and
thicknesses, it can easily be adapted to similar structures.
Figure 8.5: PCSEL back-side clad optimization script. a, the developed GUI. b, the simulated structure.
A5 - Set-up calibration
During device’s characterization, an InGaAs photodetector connected to a signal amplification system was
used. The output current signal of the set-up has to be converted to power. In order to do so, a calibration
procedure was executed by comparing the output current of our system with the measured power value obtained
with an optical powermeter. Since the output current values given by the set-up vary linearly with the incident
power, this procedure allows to obtain a power/current (W/A) value which can be used to transform directly
the output current values to power.
A total of 8 calibration trials were performed. As shown in Figure 8.6, the obtained power/current value
slightly changes from trial to trial. This is due to variation differences in the position of the detectors, especially
the powermeter. The InGaAs detector is broad area and is closely placed on top of the device used for cali-
bration, which means most light should be contributing for the measurement. The powermeter used, however,
has a smaller detection area and its architecture forbids it to be closely placed on top of the device. This
should mean that the power measured is smaller than the actual power, which means that the power/current
value estimated should be smaller than the real value. The obtained power/current value of 25 ± 3 W/A is an
underestimation of the actual value.
Figure 8.6: Different power/current (W/A) values obtained for the different calibration trials.
Figure 8 shows the discrepancy between the results obtained in the different trials. The y-axis range was
chosen to be roughly twice the average power/current value. The presented values have error bars corresponding
to one standard deviation, but due to their small size they are almost indistinguishable.
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TRITA EECS-EX-2018:582
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Design and Fabrication of 1550 NM Photonic Crystal Surface Emitting Lasers

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Design and Fabrication of 1550 NM Photonic Crystal Surface Emitting Lasers

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DEGREE PROJECT IN ENGINEERING PHYSICS,

SECOND CYCLE, 30 CREDITS

Design and Fabrication of 1550 nm

JOÃO MARTINS DE PINA

KTH ROYAL INSTITUTE OF TECHNOLOGY

Föreliggande examensarbete rapporterar designen och tillverkningsprocessen för en monolitisk InP-

João Martins de Pina,

List of Figures viii

2 Theoretical background and simulations 3

3 Fabrication technology and process optimization 15

5 Device architecture and considerations 29

5.1 Schematic of the PCSEL structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.1 Description of the simulated model, based on [3]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

7.1 Number of fabricated devices of each size. Devices’ area is squared. . . . . . . . . . . . . . . . . . . 43

AFM Atomic force microscopy

throughout this thesis focused on the first five stages.

Theoretical background and simulations

2.1 Photonic crystals and modulation of light

2.2 Photonic crystal based devices

2.3 Simulation methods

2.3.1 Plane wave expansion method

This transforms Equation 2.6 into Equation 2.7.

The following auxiliary calculation were made to facilitate the substitution.

2.3.2 Fourier modal method

2.3.3 Finite element method

2.3.4 Finite-difference time-domain

2.4 Functioning details and simulations on PCSEL

Table 2.1: Description of the simulated model, based on [3].

Layer material Thickness Relative permittivity

2.5 Light emitting mechanism

Fabrication technology and process

3.1.1 Electron beam lithography

3.2 Chemical mechanical polishing

3.3 Plasma-enhanced chemical vapour deposition

3.4 Metal organic chemical vapour deposition

3.5 Electron beam physical vapour deposition

Table 3.1: Step temperature increase used. Time is

3.6 Dry etching

3.6.1 Magnetically-enhanced reactive ion etching

Table 3.2: Parameters used for SiO2 etching.

Figure 3.5: Step size of etched SiO2 as a function of time.

3.6.2 Inductively coupled plasma - reactive ion etching

3.7 Wet etching

4.1 Annealing tests

T (◦ C) Before annealing After annealing

T (◦ C) Top surface variation (%) Bottom surface variation (%)

Figure 4.4: SEM images of a successful regrowth trial.

Further details of the study are expected to be reported further on.

Device architecture and considerations

Figure 5.1: Schematic of the PCSEL structure.

Thickness Refractive Doping

5.2 Anti-reflection and isolation layer

5.4 Spacer layer

5.5 Multi-quantum wells

5.6 Photonic crystal

5.7 Capping layer

5.8 Regrowth and contact layer

4πκ 2πn 4πκ 2n0 κ1

1. Growth of n-InP (buffer layer);

2- Alignment marks (1st mask step)

1. Deposition of 195 nm of SiO2 by PECVD in the back side of the

d) InP (spacer layer, buffer layer and partly the substrate)

1. Deposition of 260 nm of SiO2 (hard mask);