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Implement an AC-switch triggering circuit

using an optical Triac
Laurent Gonthier, Jean-Michel Simonnet, and Antoine Passal,
STMicroelectronics
10/4/2010 12:02 AM EDT
Laurent Gonthier, Jean-Michel Simonnet, and Antoine Passal,
STMicroelectronics
Understand how to drive and couple a driver/trigger to an optical Triac

Several different technologies and designs are available among solid-state switches today. The major families are the
standard Triacs (triode for alternating current), the snubberless Triacs, and the AC-switch (ACS) devices released in the
early 1990s. These devices are all triggered thanks to a gate current, but this current could be sunk from or sourced to the
gate, depending on the technology or design. The triggering circuit has then to take into account the AC-switch type to
correctly trigger it. For ACS devices, due to silicon structure, the gate current can only be sunk from the gate.

Sometimes, the control circuit has also to be insulated from the mains voltage. This occurs, for example, when the MCU
reference is not the same than the AC switch reference. This is the case with new appliances using an inverter for 3-phase
motor control, where the MCU is connected on the DC rail, and the ACS switch is referenced to line.

But it is also required if the appliance designer wants to insulate all the low-voltage circuit from the line. This solution is
often expensive, as it would be easier to use an "insulated-enough" user-interface and keep all electronics referenced to the
line. This is particularly the case when only a few push-buttons are accessible for the end-user.

The standard insulated solution used to trigger a Triac is an opto-Triac connected in series with the Triac A2 and G
terminals. A resistor is also connected in series to reduce the gate current applied by the opto-Triac. Such a solution is
good for all Triacs. The device is then triggered by a positive gate current when the voltage across the Triac, just before
turn-on, is positive, and by a negative current in the reverse situation. The Triac is then triggered in what are called Q1 and
Q3 quadrants.

For ACS devices, as previously said, these devices can only be triggered by a negative current. If an opto-Triac is used to
drive them, the ACS will only be turned on for a negative bias voltage (where the gate current will also be negative). This
will lead to a half-cycle conduction of the ACS.

Certainly, for most applications, such an operating mode is not convenient, but there are new applications where the load
only has to conduct in half-cycle mode. For example, this is the case for some pumps, such as used in coffee machines,
which feature an internal diode, and also for some electromagnets used for door-lock function in washing machines, for
which single half-cycle conduction is enough to trigger them.

If the line voltage is applied across the gate and COM terminals, the internal P-N junction may be damaged as its breakdown
level is around 10 V. This case could occur during devices switching transients or if the opto-Triac is fails in short-circuit
mode. The solution is then to add a low-voltage or high-voltage diode, respectively, in parallel to the COM-G junction or in
series with the opto-Triac (Figure 1).
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Figure 1: Solution for half-cycle ACS control with opto-Triac.

(Click on image to enlarge)

Note that in this second case (diode in series with opto), the opto-Triac and the diode could be replaced by a reverse-
blocking opto-thyristor, with anode terminal connected to ACS gate.

For home appliances, most loads are controlled in full-cycle mode. The previous schematic has then to be adapted to ensure
ACS triggering for each cycle. The solution is to add a low-voltage capacitor to store some charge, to apply a gate current
at the beginning of the positive conduction. This solution is presented in Figure 2, which also uses two low-voltage
diodes.

Figure 2: Solution for full-cycle ACS control with opto-Triac.

(Click on image to enlarge)

The operation principle is presented on Figure 3:

1: Opto-Triac is turn on and capacitor C is charged up to reach VGT parameter (~0.7 V). ACS is then triggered in Q3
quadrant, for which the IGT current is lower than in Q2.
2: ACS is ON up to next zero current crossing point. G-COM voltage is kept down to -0.7 V, and capacitor C is kept
charged.
3: ACS current increases, VG-COM increases and so capacitor C is discharged through G and COM, applying a
peak current up to 10 mA which triggers the ACS.

To apply enough gate current, a high-value capacitor--in the range of 330 µF--has to be used.

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Figure 3: Operation of circuit of Figure 2.

(Click on image to enlarge)

Noted that the ACS is off in every cycle, for the time required to charge back the C capacitor. This leads to ACS turn-on
when the voltage across its terminals equal approximately 10 V. This behavior doesn’t result in too high EMI disturbance,
as the line current is not cut. Indeed, thanks to capacitor C charge, the line current is still approximately sinusoidal.
These three schematics can also be adapted by adding, as is well known, an R-C snubber circuit between resistor R and the
opto-Triac to increase this last device immunity and enlarge the gate pulse width, to better trigger the AC switch.

About the authors

The three authors are with the Appliance & Industrial segments at STMicroelectronics, Industrial and Multisegment Sector
(IMS), Application Specific Discretes (ASD) & Integrated Passive and Active Devices (IPAD) Division, in Tours, France:

Laurent Gonthier is an application manager and has been with ST for 13 years and worked for two years previously on
power motor control. He holds a Master's degree from E.N.S.E.E.I.H.T Power Electronics Engineering school, Toulouse,
France (1994) and a Ph.D. from Franche-Comte University, France (1997).

Jean-Michel Simonnet is an application engineer and has been with ST for 15 years. He holds a Master's degree from
Microelectronics University, Bordeaux, France (1991).

Antoine Passal is an application engineer and has been with ST for five years. He holds an associate degree in electronics
engineering from Tours University, France (2005).

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