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fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2015.2408053, IEEE Transactions on Power Electronics
0885-8993 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2015.2408053, IEEE Transactions on Power Electronics
i.e. zero steady state error and transient time constant of 𝜔𝐶−1
are requested. Transforming (9) into Laplace domain results in
1 1 A C
I (s) A I * ( s ) TDC ( s ) (10)
s s C s s C
with
C ( s) Ls R
1
I ( s) C
TDC ( s) . (11)
I ( s) s C 1 C ( s) Ls R 1
Fig. 1. Averaged equivalent circuit of a generalized power converter current *
loop.
Desired loop gain is then
The controlled converter output voltage is given by
C
C ( s ) Ls R
1
vC (t ) d (t ) vDC (t ), (1) , (12)
s
where vDC(t) is equivalent DC link voltage of the converter satisfied by the following PI controller,
C Ls R
and d(t) is current controller output, satisfying
0 d 1 KI
(2) CDC ( s) K P , DC (13)
in case of DC-DC converter and s s
1 d 1 (3) with
in case of DC-AC or AC-DC converter (i.e. the power flow of KP, DC LC , KI RC . (14)
the circuit in Fig.1 may be bidirectional). Current loop
dynamics is then governed by B. AC system
di (t ) Next, consider an AC system with the following reference
L d (t )vDC (t ) Ri (t ) vL (t ) (4)
dt current,
and is nonlinear in general since vDC(t) is a regulated quantity i* (t ) A sin 0t u(t ) (15)
as well. Control closed-loop block diagram of the current loop or
is shown in Fig. 2. The error between the reference current i*
A0
and actual current i is processed by the compensator C(s). I * (s) (16)
Here, the uncontrolled voltage and the equivalent DC-linked s 02
2
voltages are assumed measurable and used as feedforward in Laplace domain. Utilizing (13) would lead to
signals to the controller in order to decouple the system
A0 s C 1
dynamics from external disturbances [26], [27], i.e. the control I ( s) C A 20 C 2 2 .
signal is given by s 0 s C
2 2
C 0 s 0 s C
2
1
d (t ) vN (t ) vL (t ) , (5)
Transforming (17) into time domain results in
(17)
vDC (t )
where vN(t) is the compensator output signal. The closed-loop C 1 0 C t
i (t ) A sin t tg e u (t ),
C2 02 C
system dynamics is then given by 0 0
di (t )
L Ri (t ) vN (t ). (6) (18)
dt i.e. steady-state error is expected both in amplitude and phase
responses. Both can be minimized by increasing ωC,
necessitating high control bandwidth which is not always
available. Alternatively, it is proposed to define the desired
time-domain behavior by
i(t ) A 1 eC t sin 0t u(t ), (19)
Fig. 2. Closed-loop system block diagram. requesting zero steady state amplitude error with transient
time constant of 𝜔𝐶−1 and zero instantaneous steady state phase
III. COMPENSATOR DESIGN
error. Transforming (19) into Laplace domain results in
A. DC system
A0 A0
Assume a DC system with reference current given by I ( s)
i (t ) A u (t )
*
(7) s 0 ( s C )2 02
2 2
(20)
or A0 2C s C2
A 2 I * ( s) TAC ( s )
I * (s) (8) s 0 ( s C ) 0
2 2 2
s with
in Laplace domain. Desired time-domain output current
behavior is defined by
i(t ) A 1 eC t u(t ), (9)
0885-8993 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2015.2408053, IEEE Transactions on Power Electronics
C ( s) Ls R
1
I ( s) 2C s C2
TAC ( s) . 40
I * ( s) 1 C ( s) Ls R 1 ( s C ) 2 02 20
(21)
i* [A]
0
It is interesting to note that
1
TDC ( s j0 ) TDC ( s j0 ) .
-20
TAC ( s ) (22) DC AC
2 -40
0 0.1 0.2 0.3 0.4 0.5 0.6
Desired loop gain is then obtained as
2C s C2
C ( s ) Ls R
1 40
, (23)
s 2 02 20
satisfied by the following PR controller,
Ls R 2C s C2
i [A]
0
C AC ( s ) -20
s 2 02 (24) AC DC
-40
K s K 0 0.1 0.2 0.3 0.4 0.5 0.6
K P , AC 2 R1 2 2 R 2 2 time [s]
s 0 s 0 Fig. 3. Simulation results. Top: reference signals, Bottom: output signals for
with ωC = 10π [rad/s].
K P , AC 2 LC , K R1 LC2 2 RC ,
(25) In order to demonstrate the tracking quality, Fig. 4 presents
K R 2 RC2 2 LC02 . AC system simulation results. It may be concluded that phase
Note that unlike PR controllers proposed in the literature by tracking error remains zero at all times while output signal
far, the numerator of (24) includes additional term KR2, amplitude converges to reference signal amplitude at desired
allowing to obtain the desired transient behavior. In addition, rate.
unlike stated in [9], [27], it can be easily shown that typical
30
PR controller utilizing coefficients of PI controller (14),
20
2K I s 2 R s
C ( s ) K P , DC LC 2 C 2
current [A]
(26) 10
s 0
2 2
s 0 0
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2 2
VI. CONCLUSION
C , AC 0 A method for deriving proportional-resonant controller
0 2 4 5 (27)
C , DC
C , DC
structure and coefficients according to desired transient
C , DC behavior of AC signal amplitude, applied to typical power
for ωC,DC > ω0 which is a realistic assumption when high converter current loop was presented. Since AC signal
performance is required. Equation (27) is shown graphically in envelope was treated as DC signal, its transient behavior was
Fig. 5, indicating that the ratio of AC system crossover shaped utilizing well-known approach employed in DC
frequency and DC system crossover frequency varies from systems loop shaping. Moreover, zero phase tracking error
2.45 for ωC,DC = ω0 down to 2.05 for ωC,DC >> ω0. was assured at all times. While desired transient performance
was perfectly achieved, the crossover frequency and transient
2.45
processes time constant were shown to be nonlinearly related,
2.4
which is the main drawback of the proposed method.
Nevertheless, for practical cases the resulting bandwidth was
2.35 shown increase two-fold compared to equivalent DC system
bandwidth.
2.3
C,AC/C,DC
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2.25
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0885-8993 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2015.2408053, IEEE Transactions on Power Electronics
0885-8993 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.