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The phase-locked loop (PLL) is used extensively in electronic communications for performing
modulation, demodulation, frequency generation, and frequency synthesis. PLLs are used in both
transmitters and receivers with both analog and digital modulation and with the transmission of digital
pulses. Phase-locked loops were first used in 1932 for synchronous detection of radio signals,
instrumentation circuits, and space telemetry systems. However, for many years the use of PLLs was
avoided because of their large size, necessary complexity, narrow bandwidth, and expense. With the
advent of large-scale integration, PLLs now take up little space, are easy to use, and are more reliable.
Therefore, PLLs have changed from a specialized design technique to a general-purpose, universal
building block with numerous applications. Today, over a dozen different integrated-circuit PLL
produces are available from several IC manufacturers. Some of these are designated as general-
purpose circuits suitable for a multitude of uses, while others are intended or optimized for special
applications such as tone detection, stereo decoding, and frequency synthesis.
Essentially, a PLL is a closed-loop feedback control system in which the frequency of the
feedback signal voltage is the parameter of interest rather than simply a voltage. The PLL provides
frequency selective tuning and filtering without the need for coils or inductors. The basic phase-
locked-loop circuit is shown in Figure 2-21 and consists of four primary blocks: a phase comparator
(mixer), a low-pass filter, a low-gain amplifier (op-amp), and a voltage-controlled oscillator (VCO).
With no external input signal, the output voltage, Vout, is equal to zero. The VCO operates at a set
frequency called its natural or free-running frequency (ƒn), which is set by external (Rt) and capacitor
(Ct). If an input signal is applied to the system, the phase comparator compares the phase and
frequency of the input signal with the VCO natural frequency and generates an error voltage,
External
signal Phase-locked loop
Vi sin(2πƒit + θi)
Phase comparator
Kd (V/rad) Vd(t) Low-pass Low-gain
-π/2 +V filter amplifier Vout
rad Kƒ(V/V) Ka (V/V)
+π/2
-V 0° rad
Voltage-controlled oscillator
VCO output (ƒn)
ƒo = ƒn + ∆ƒ Ko (Hz/V)
Timing
Timing
capacitor, Ct
resistor, Rt
FIGURE 2-22 PLL lock range FIGURE 2-23 PLL capture range
Vd(t), that is related to the phase and frequency difference between the two signals. This error voltage
is then filtered, amplified, and applied to the input internal of the VCO. If the input frequency, ƒi, is
sufficiently close to the VCO naturally frequency, ƒn’ the feedback nature of the PLL causes the VCO
to synchronize, or lock, to the incoming signal. Once in lock, the VCO frequency is identical to the
input signal, except for a finite phase difference that is equal to the phase of incoming signal minus
the phase of the VCO output signal.
Lock range. Lock range is defined as the range of frequencies in the vicinity of the VCO’s
natural frequency (ƒn) over which the PLL can maintain lock with an input signal. This presumes that
the PLL was initially locked onto the input signal. Lock range is also known as tracking range. It is
the range of frequencies over which the PLL will accurately track or follow the input frequency.
Lock range increases as the overall loop gain of the PLL is increased (loop gain is discussed in a later
section of this chapter).
Hold-in range is equal to half the lock range (that is, lock range = 2 x hold-in range). The relationship
between lock and hold-in range is shown in frequency diagram form in Figure 2-22. The lowest
frequency that the PLL will track is called the lower lock limit (ƒu), and the highest frequency that the
PLL will track is called the upper lock limit (ƒtu). The lock range depends on the transfer functions
(gains) of the phase comparator, low-gain amplifier, and VCO.
Capture range. Capture range is defined as the band of frequencies in the vicinity of ƒn where
the PLL can establish or acquire lock with an input signal. The capture range is generally between 1.1
and 1.7 times the natural frequency of the VCO. Capture range is also known as acquisition range.
Capture range is related to the bandwidth of the low-pass filter. The capture range of a PLL decreases
as the bandwidth of the filter is reduced. Pull-in range is the peak capture range (that is, capture
range = 2 x pull-in range). Capture and pull-in ranges are shown in frequency diagram form in Figure
2-23. The lowest frequency the PLL can lock onto is called the lower capture limit (ƒcl), and the
highest frequency the PLL can lock onto is called the upper capture limit (ƒcu).
The capture range is never greater than, and is almost less than, the lock range. The relationship
among capture, lock, hold-in, and pull-in range is shown in frequency diagram form in Figure 2-24.
Note that lock range > capture range and hold-in range > pull-in range.
Voltage-Controlled Oscillator
A voltage-controlled oscillator (VCO) is an oscillator (more specifically, a free-running
multivibrator) with a stable frequency of oscillation that depends on an external bias voltage. The
output from a VCO is a frequency, and its input is a bias or control signal that may be a dc or ac
Bias (volts)
FIGURE 2-24 PLL capture and lock ranges FIGURE 2-25 Voltage-controlled oscillator
input bias voltage-versus-output frequency
characteristics
voltage. When a dc or slowly changing ac voltage is applied to the VCO input, the output frequency
changes or deviates proportionally. Figure 2-25 shows a transfer curve (output frequency-versus-
input bias voltage characteristics) for a typical VCO. The output frequency (ƒo) with 0-V input bias is
the VCO’s natural frequency (ƒn), which is determined by an external RC network, and the change in
the output frequency caused by a change in the input voltage is called frequency deviation (∆ƒ).
Consequently, ƒo = ƒn + ∆ƒ, where ƒo = VCO output frequency. For a symmetrical ∆ƒ, the natural
frequency of the VCO should be centered within the linear portion of the input-versus-output curve.
The transfer function for a VCO is
∆ƒ
Ko = ∆V (2-10)
Phase Comparator
A phase comparator, sometimes called a phase detector, is a nonlinear device with two input signals:
an externally generated frequency (ƒi) and the VCO output frequency (ƒo). The output from a phase
comparator is the product of the two signals of frequencies ƒ i and ƒo and, therefore, contains their sum
and difference frequencies (ƒi + ƒo). The topic of mixing is analyzed in more detail later in this
chapter. Figure 2-26a shows the schematic diagram for a simple phase comparator. νo is applied
simultaneously to the two halves of input transformer T1. D1, R1, and C1 make up a half-wave
rectifier, as do D2, R2, and C2 (note that C1 = C2 and R1 = R2). During the positive alternation of νo, D1
and D2 are forward biased and on, charging C1 and C2 to equal values but with opposite polarities.
Therefore, C1 and C2 discharge equally through R1 and R2, respectively, keeping the output voltage
equal to 0 V. This is shown in Figure 2-26c. The two half-wave rectifiers produce equal-magnitude,
opposite-polarity output voltages. Therefore, the output voltage due to νo is constant and equal to 0 V.
The corresponding input and output waveforms for a square-wave VCO signal are shown in Figure 2-
26d.
Circuit operation. When an external input signal [νin = Vi sin(2πƒit] is applied to the phase
comparator, its voltage adds to νo, causing C1 and C2 to charge and discharge, producing a
proportional change in the output voltage. Figure 2-27a shows the unfiltered output waveform shaded
D1
+ R1
External C1
Input signal VCO input signal Vo
sin (2πƒot) Vout
Vi (t) = Vi sin (2πƒit)
C2 R2
D2
(a)
“on”
+ -
- D1 + +
C1 R1
Vi + + Vo
-
- - Vout = + VC1 – VC2 = 0 V
-
+ - R2
C2
- D2
+ +
+ -
“on”
(b)
“off”
Ti
D1 + +
C1 R1
-
Vi - Vo + - Vout = + VC1 – VC2 = 0 V
-
- R2
C2
D2
+ +
“off”
(c)
+V
Diodes D1
and D2 “on”
input voltage Vo
Diodes D1
-V
and D2 “off”
C1 charging C1 discharging
+V
VC1
Output voltage Vout
0V
VC2
C2 charging C2 discharging
-V
(d)
FIGURE 2-26 Phase comparator: [a] schematic diagram; [b] output voltage due to positive half
cycle of Voi [c] output voltage due to negative half-cycle of Voi; [d] input and output voltage
waveforms
when ƒo = ƒi and νo leads νi by 90°. For the phase comparator to operate properly, νo must be much
larger than νi. Therefore, D1 and D2 are switched on only during the positive alternation of νo and are
off during the negative alternation. During the first half of the on time, the voltage applied to D1 = νo
– νi, and the voltage applied to D2 = Vo + νi. Therefore, C1 is discharging while C2 is charging.
During the second half of the on time, the voltage applied to D1 = νo + νi, the voltage applied to D2 =
νo – νi, and C1 is charging while C2 is discharging. During the off time, C1 are neither charging nor
discharging. For each complete cycle of νo, C1 and C2 charge and discharge equally and the average
output voltage remains at 0 V. Thus, the average value of V out is 0 V when the input and VCO output
signals are equal in frequency and 90° out of phase.
Figure 2-27b shows the unfiltered output voltage waveform shaded when νo leads νi by 45°. νi is
positive for 75% of the on time and negative for a the remaining 25%. As a result, the average output
voltage for one cycle of νo is positive and approximately equal to 0.3 V, where V is the peak input
voltage. Figure 2-27c shows the unfiltered output waveform when νo and νi are in phase. During the
entire on time, νi is positive. Consequently, the output voltage is positive and approximately equal to
0.636 V. Figure 2-27d and e show the unfiltered output waveform when ν o leads νi by 135° and 180°,
respectively. It can be seen that the output voltage goes negative when ν o leads νi by more than 90°
and reaches its maximum value when νo leads νi by 180°. In essence, a phase comparator rectifies νi
and integrates it to produce an output that is proportional to the difference in phase between νo and νi.
T
+V
D1 and D2
“on”
Vo
D1 and D2
-V “off”
T/2
+V
T/2
Vi
Vd = V average = 0 V
-V
(a)
T
+V
D1 and D2
“on”
Vo
D1 and D2
-V “off”
3T/4
T/2
+V
Vd = V average = 0.3V
Vi
-V
(b)
T
+V
D1 and D2
“on”
Vo
D1 and D2
-V “off”
T
+V
Vi Vd = V average = 0.636 V
-V
(c)
T
+V
D1 and D2
“on”
Vo
D1 and D2
-V “off”
+V T/4
3T/4
Vi
Vd = V average = -0.3 V
-V
(d)
T
+V
D1 and D2
“on”
Vo
D1 and D2
-V “off”
+V
T
Vi
Vd = V average = -0.636 V
-V
(e)
FIGURE 2-27 Phase comparator output voltage waveforms: [a] Vo leads Vi by 90°; [b] Vo leads
Vi by 45°; [c] Vo and Vi in phase; [d] Vo leads Vi by 135°; [e] Vo leads Vi by 180°.
Vout +V
+V
Vout
180° 135° 180°
0V 0V
0° 90° 0° 45° 90°
π rad π rad
0 rad π/2 rad 0 rad π/2 rad
-V
-V
(a) (b)
Vout
+V
+190°
0V
-90° 0°
+π /2rad
-π/2 rad 0 rad
-V
(c)
FIGURE 2-28 Phase comparator output voltage [Vd] versus phase difference [θe] characteristics:
[a] square-wave inputs; [b] sinusoidal inputs; [c] square-wave inputs, phase bias reference
Figure 2-28 shows the output voltage-versus-input phase difference characteristic for the phase
comparator shown in Figure 2-26a. Figure 2-28a shows the curve for a square-wave phase
comparator. The curve has a triangular shape with a negative slope from 0° to 180°. Vout is maximum
positive when νo and νi are in phase, 0 V when νo leads νi by 90° and maximum negative when νo leads
νi by 180∆. If νo advances more than 180°, the output voltage become less negative, and if νo lags
behind νν the output voltage become less positive. Therefore, the maximum phase difference that the
comparator can track is 90° + 90° or from 0° to 180°. The phase comparator produces an output
voltage that is proportional to the difference in phase between νo and νi. This phase difference is
called the phase error. The phase error is expressed mathematically as
θe = θi – θo (2-11)
where θe = phase error (radians)
θo = phase of the VCO output signal voltage (radians)
θi = phase of the external input signal voltage (radians)
The output from the phase comparator is linear for phase errors between 0° and 180° (0 to π radians).
Therefore, the transfer function for a square-wave phase comparator for phase errors between 0° and
180° is given as
Vout 2V
Kd = θ e = π (2-12)
(b)
-V
(a)
FIGURE 2-29 Phase comparator output voltage: [a] unfiltered output voltage waveform when Vi
leads Vo by 90°; [b] output voltage-versus-phase difference characteristics
Figure 2-28b shows the output voltage-versus-input phase difference curve for an analog phase
comparator with sinusoidal characteristics. The phase error versus output is nearly linear only from
45° to 135°. Therefore, the transfer function is given as
Vout
Kd = θe volts per radian (2-13)
Loop Operation
For the following explanation, refer to Figure 2-30.
External input
signal
Vi sin(2π f1t + θi) ƒi, ƒo, ƒi = ƒo, Beat frequency
and fi – fo Low-pass (ƒi – ƒo)
Phase θe = θi – θo Phase comparator loop filter Amplifier Vout
error Kd(V/rad) Vd (t ) (LPF) Ka(V/V)
Kƒ(V/V)
Θo
(a)
+
ƒ (Hz)
0 t
d
(b)
FIGURE 2-30 PLL operation: [a] block diagram; [b] beat frequency
Loop acquisition. An external input signal [(Vi sin(2πƒit + θ i)] enters the phase comparator and
mixes with the VCO output signal (a square wave with fundamental frequency ƒ o). Initially, the two
frequencies are not equal (ƒo ≠ ƒi) and the loop is unlocked. Because the phase comparator is a
nonlinear device, the input and VCO signals mix and generate cross-product frequencies (that is, sum
and difference frequencies). Therefore, the primary output frequencies from the phase comparator are
the external input frequency (ƒi), the VCO output frequency (ƒo), and their sum (ƒi + ƒo) and
difference (ƒi – ƒo) frequencies.
The low-pass filter (LPF) blocks the two original input frequencies and the sum frequency; thus,
the input to the amplifier is simply the difference frequency (ƒi – ƒo), sometimes called the beat
frequency). The beat frequency is amplified and then applied to the input of the voltage-controlled
oscillator, where it deviates the VCO by an amount proportional to its polarity and amplitude. As the
VCO output frequency changes, the amplitude and frequency of the beat frequency changes
proportionately. Figure 2-30b shows the beat frequency produced when the VCO is swept by the
difference frequency (ƒd). After several cycles around the loop, the VCO output frequency equals the
external input frequency and the loop is said to be locked. Once lock has occurred, the beat frequency
at the output of the LPF is 0 Hz (a dc voltage), which is necessary to bias the VCO and keep it locked
to the external input frequency. In essence, the phase comparator is a frequency comparator until
frequency acquisition (zero beat) is achieved, then it becomes a phase comparator. Once the loop is
locked, the difference in phase between the external input and VCO output frequencies is converted to
a bias voltage (Vd) in the phase comparator, amplified, and then fed back to the VCO to hold lock.
Therefore, it is necessary that a phase error be maintained between the external input signal and the
VCO output signal. The change in the VCO frequency required to achieve lock and the time required
to achieve lock (acquisition or pull-in time) for a PLL with no loop filter (loop filters are explained
later in this chapter) is approximately equal to 5/Kv seconds, where Kv is the open-loop gain of the
PLL. Once the loop is locked, any change in he input frequency is seen as a phase error, and the
comparator produces a corresponding change in its output voltage, Vd. The change in voltage is
amplified and fed back to the VCO to reestablished lock. Thus, the loop dynamically adjusts itself to
follow input frequency changes.
Mathematically, the output from the phase comparator is (considering only the fundamental
frequency for Vo and excluding the 90° phase bias)
Vd = [V sin(2πƒot + θ o) x V sin(2πƒit + θ i)]
V V
= 2 cos(2πƒot + θ o – 2πƒot – θi) - 2 cos(2πƒot + θo + 2πƒi t – θi)
When ƒo = ƒi, V
Vd = 2 cos(θi + θo) (2-14)
V
= 2 cos θe
where θi + θo = θe (phase error). θe is the phase error required to change the VCO output frequency
from ƒn to ƒi (a change = ∆ƒ) and is often called the static phase error.
Loop gain. The loop gain for a PLL is simply the product of the individual gains or transfer
functions around the loop. In Figure 2-30, the open-loop gain is the product of the phase comparator
gain, the low-pass filter gain, the amplifier gain, and the VCO gain. Mathematically, open-loop gain
is
Kv = KdKƒKaKo (2-15)
As previously stated, the hold-in range for a PLL is the range of input frequencies over which the
PLL will remain locked. This presumes that the PLL was initially locked. The hold-in range is
limited by the peak-to-peak swing in the phase comparator output voltage (∆Vd) and depends on the
phase comparator, amplifier, and VCO transfer functions. From Figure 2-28c it can be seen that the
phase comparator output voltage (Vd) is corrective for +π/2 radians (+90°). Beyond these limits, the
polarity of Vd reverses and actually chases the VCO frequency away from the external input
frequency. Therefore, the maximum phase error (θe) that is allowed is +π/2 radians and the maximum
phase comparator output voltage is
where + Vd(max) = maximum peak change at the phase comparator output voltage
Kd = phase comparator transfer function
Consequently, the maximum change in the VCO output frequency is
π
+∆ƒmax = + 2 rad (Kd)(Kƒ)(Ka)(Ko) (2-21)
where +∆ƒmax is the hold-in range (maximum peak change in VCO output frequency).
Substituting Kv for KdKƒKaKo yields
π
+∆ƒmax = + 2 rad (Kv) (2-22)
102 20 log Kv
ωv = Kv = 125.6krad/s
0
1 rad/s
-3 dB
Closed-loop frequency response
-6 dB/octave
ω (rad/s) -20 dB/decade
where Kv = (Kd)(Kƒ)(Ko) for a simple loop with a LPF, phase comparator, and VCO or Kv = (Kd)(Kƒ)
(Ka)(Ko) for a loop with an amplifier.
The lock range in radians per second is π times the dc loop voltage gain and is independent of the
LPF response. The capture range depends on the lock range and on the LPF response, so it changes
2√ (∆ƒmax)
capture range = RC
with the type of filter used and with the filter cutoff frequency. For a simple singe-pole RC LPF, it is
given by