UNIVERSITY OF GONDAR

INSTITUTE OF TECHNOLOGY
Department of Electrical and Computer Engineering
Course name: Digital Logic Design
Course code: ECEg3141
Course instructor: Amare Worku
Contact information:
Email: amareworku2154@gmail.com
Consultation hours:
Monday: from 8:00-11:00
 CHAPTER FIVE
5.1 COMBINATIONAL LOGIC

 AND-OR logic

 AND-OR invert logic

 Exclusive or logic

 Exclusive nor logic

 Universal property of NOR and NAND gates

 Introduction

 Combinational circuits: Logic circuits whose outputs at any time are determined directly and
only from the present input combination .
 i.e. they have no memory.
 AND-OR Logic

 The AND-OR logic is used to implement SOP expressions.

 In general, all AND-OR circuit can have any number of AND gates each with any number of
inputs.

Four input AND-OR logic diagram

Truth table for 4 input AND-OR logic
 AND-OR invert Logic

 The AND-OR invert logic is used to implement POS expressions.

Four input AND-OR invert logic diagram

Exclusive-OR logic
 Exclusive-NOR Logic

 The complement of the exclusive-OR function is the exclusive-NOR, which is derived as

follows:
 Cont.…

 Example: Develop a logic circuit with four input variables that will only produce a 1 output
when exactly three input variables are 1s.
 Cont.….

 Example: Reduce the combinational logic circuit in Fig below.

 THE UNIVERSAL PROPERTY OF NAND AND NOR GATES

NAND gate
 The NAND Gate as a Universal Logic Element:
 The NAND gate is a universal gate because it can be used to produce
the NOT, the AND, the OR, and the NOR functions.
Cont.….
 THE UNIVERSAL PROPERTY OF NAND AND NOR GATES

NOR gate
 The NOR Gate as a Universal Logic Element:
 The NOR gate is a universal gate because it can be used to produce
the NOT, the AND, the OR, and the NAND functions.
Cont.…..
 Cont.…..

 Example ,a three variable combinational logic circuit whose output

always zero iff two of consecutive inputs are 1.
 PARITY GENERATOR AND CHECKER

parity generator and checker:

 In Chapter 2, we saw that a transmitter can attach a parity bit to a set of data bits before
transmitting the data bits to a receiver.
 Example, Consider four bit data to be transmitted,D0D1D2D3 ,draw the logic circuit for the
parity bit to even parity bit generator and odd parity bit generator ?
 5.2 Functions of Combinational Logic

 Adders
 Subtractor
 Comparators
 Decoders
 Encoders
 Multiplexers
 Demultiplexers
 Adders
 Adders are important in
 computers
 other types of digital systems in which numerical data are processed
 There are two type of adder:
 half adder and
 Full adder
 The Half-Adder

 Basic rule for binary addition.

 The operations are performed by a logic ckt called a half-adder.

 Cont.….

• The half-adder accepts two binary digits on its inputs and produces two binary digits on its
outputs, a sum bit and a carry bit.
 The Full-Adder

 The full-adder
accepts two
input bits and
an input carry
and generates a
sum output and
an output carry.
Cont.…..
Cont.…..
 example

 Evaluate the sum and carry of the following full adder ckt,
 Parallel Binary Adders

 Two or more full adders are connected to form parallel binary adders.
 To add two binary numbers, a full-adder is required for each bit in the numbers.
 So, for 2-bit numbers, two adders are needed.
 Cont.….

 The carry output of each adder is connected to the carry input of the next higher-order adder.
 Four-Bit Parallel Adders

 A group of 4 bits is called a nibble. A basic 4-bit parallel adder is implemented with four full-
adder stages as shown.
 Cont.……

The carry output of each adder is

connected to the carry input of the next
higher-order adder as indicated. These
are called internal carries.
Reading assignment

 Ripple carry adder

 Look ahead carry adder
 subtractor
 In electronics, a subtractor can be designed using the same approach as that of an adder.
 The binary subtraction process is summarized below.
 As with an adder, in the general case of calculations on multi-bit numbers, three bits are
involved
in performing the subtraction for each bit: the minuend (Xi), subtrahend (Yi), and a borrow in
from the previous (less significant) bit order position (Bi).
 The outputs are the difference bit (Di) and borrow bit Bi + 1.
 Likewise adder ,there are two type of subractor:
 Half subtractor
 Full subtractor
 Half subtractor

 The half-subtractor is a combinational circuit which is used to perform subtraction of two bits.
 It has two inputs, X (minuend) and Y (subtrahend) and two outputs D (difference) and B
(borrow).
 The truth table for the half subtractor is given below
 Full Subtractor

 A full subtractor performs subtraction operation on two bits, a minuend and a subtrahend, and
also takes
into consideration whether a ‘1’ has already been borrowed by the previous adjacent lower
minuend bit or not.
 As a result, there are three bits to be handled at the input of a full subtractor, namely the two
bits to be subtracted and a borrow bit designated as Bin.
 There are two outputs, namely the DIFFERENCE output D and the BORROW output Bo.
 The BORROW output bit tells whether the minuend bit needs to borrow a ‘1’ from the next
possible higher minuend bit.
 Cont.……

 The Boolean expressions for the two output variables are given by the equations
cont.……
 Comparators

 To compare the magnitude of two binary quantities to determine the relationship of those
quantities.
 The simplest form  a comparator ckt determines whether two numbers are equal.
 Equality
 XOR gate can be used as a 2-bit comparator.
 Inequality

 To compare binary numbers containing two bits each:

 Four bit magnitude comparator

 In order to determine whether A is greater than or less than B, we inspect the

relative magnitude of pairs of significant digits, starting from the most significant
position.
 The comparison is done by successively comparing the next adjacent lower pair
of digits if the digits of the pair under examination are equal.
 The comparison continues until a pair of unequal digits is reached. In the pair of
unequal digits, if Ai = 1 and Bi = 0, then A > B, and if Ai = 0,Bi = 1 then A < B. If
X, Y and Z are three variables respectively representing the A = B, A > B and A <
B conditions.
 Cont.……

 Then ,number one = A (A0A1A2A3)

number two = B(B0B1B2B3) ,then the Boolean expression representing these conditions
are given by the equations.
A=B X
A>B Y
A<B Z

X=1, implies ,A =B
Y =1,implies ,A> B
Z =1,Implies ,A<B
then the logic ckt becomes
 Cont.……

 To determine an inequality of binary numbers A and B, you first examine the highest-order bit
in each number:
 If A3=1 and B3=0  number A is greater than number B
 If A3=0 and B3=1  number A is less than number B
 If A3=B3  you must examine the next lower bit position
for an equality.
 Decoders

 A decoder detects the presence of a specified combination of bits (code) on its inputs and
indicates the presence of that code by a specified output level.
 In its general form, a decoder has n input lines to handle n bits and forms one to 2n output
lines to indicate the presence of one or more n-bit combinations.
 The Basic Binary Decoder
Suppose we need to determine when a binary 1001 occurs on the inputs of a digital ckt.
 The 4-Bit Decoder

 In order to decode all possible combinations of four bits, 16 decoding gates are required
(24=16).
 This type of decoder is commonly called either:
 A 4-line-to-16-line decoder, or
 A 1-of-16 decoder
 Decoding functions and truth table for a 4-line-to-16-line decoder with active-LOW outputs 
see the next slide.
Cont.……..
Cont.……
 The BCD-to-Decimal Decoder

 The BCD-to-decimal converts each BCD code

into one of ten possible decimal digit
indications.
 Called  4-line-to-10-line decoder or
 1-of-10 decoder
 The BCD-to-7-Segment Decoder

 The BCD-to-7-segment decoder accepts the

BCD Code on its inputs and provides
outputs to drive 7-segment display
devices to produce a decimal readout.
Cont.…..
 Encoders
 An encoder is a combinational logic ckt that essentially performs a
“reverse” decoder function.
 An encoder accepts an active level on one of its inputs representing a
digit, such as a decimal or octal digit, and converts it to a coded output
such as BCD or binary.
 Encoders can also be devised to encode various symbols and alphabetic
characters.
 The Decimal-to-BCD Encoder

 It has 10 inputs and 4 outputs

corresponding to the BCD code.
 A3 = 8+9
 A2 = 4+5+6+7
 A1 = 2+3+6+7
 A0 = 1+3+5+7+9
Cont.…..

NOTE: A 0-digit input is not needed because the BCD

outputs are all LOW when there are no HIGH input.
 Code Converters
 Binary-to-gray & gray-to-binary conversion.
 Multiplexers (Data Selectors)
 A MUX is a device that allows digital information from several sources to be
routed onto a single line for data transmission over that line to a common
destination.
 The basic MUX has several data-input lines and a single output line.
 It also has data-select inputs, which permit digital data on any one of the inputs to
be switched to the output line.
Basic Two-Input Multiplexer
Four input MUX
Cont.…..
Cont.…..
Cont.……
Cont.……….
Demultiplexers
 A DEMUX basically
reverses the MUX
function.
 It takes digital
information from one
line and distributes it
to a given number of
output lines.
 It also known as data
distributor.
Three data selector demux
Cont.….
 Reading assignment

About Priority encoder.

About Cascading of mux and demux.
Real application of encoder ,decoder, multiplexer and
demultiplexer.
 Group assignment
should be clear and neat and also as much as possible use coloured
marker
 1.draw the four bit full adder logic circuit which is analogues
to the parallel adder but do not use parallel adder logic symbol
rather than use logic gate.
 2. draw the diagram of 4-line-to-16-line logic circuit with
active high outputs system.
 3.draw the logic circuit with four data selector lines and single
input data line with result of sixteen different data type.